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https://github.com/Fishwaldo/Star64_linux.git
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This patch fixes a wrong ifdef in the board setup code, leading to the GPIO pin not being pulled high, and thus the USB switch not being powered at all. This finishes the rename of CONFIG_USB_OHCI to CONFIG_USB_OHCI_HCD, which started in 2005 (before 2.6.12-rc2), then probably because things were working anyway for most people got forgotten. [Ralf: Paolo's original patch didn't fix the module case, Florian's patch only fixed MTX1 etc. so this is a combined patch plus some cleanups.] Cc: Giuseppe Patanè <giuseppe.patane@tvblob.com> Cc: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Paolo 'Blaisorblade' Giarrusso <blaisorblade@yahoo.it> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Florian Fainelli <florian.fainelli@telecomint.eu> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
132 lines
4.2 KiB
C
132 lines
4.2 KiB
C
/*
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* Copyright 2000 MontaVista Software Inc.
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* Author: MontaVista Software, Inc.
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* ppopov@mvista.com or source@mvista.com
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
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* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/init.h>
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#include <linux/sched.h>
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#include <linux/ioport.h>
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#include <linux/mm.h>
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#include <linux/console.h>
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#include <linux/delay.h>
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#include <asm/cpu.h>
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#include <asm/bootinfo.h>
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#include <asm/irq.h>
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#include <asm/mipsregs.h>
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#include <asm/reboot.h>
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#include <asm/pgtable.h>
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#include <asm/mach-au1x00/au1000.h>
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#include <asm/mach-pb1x00/pb1500.h>
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void board_reset (void)
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{
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/* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
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au_writel(0x00000000, 0xAE00001C);
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}
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void __init board_setup(void)
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{
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u32 pin_func;
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u32 sys_freqctrl, sys_clksrc;
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sys_clksrc = sys_freqctrl = pin_func = 0;
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// set AUX clock to 12MHz * 8 = 96 MHz
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au_writel(8, SYS_AUXPLL);
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au_writel(0, SYS_PINSTATERD);
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udelay(100);
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#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
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/* GPIO201 is input for PCMCIA card detect */
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/* GPIO203 is input for PCMCIA interrupt request */
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au_writel(au_readl(GPIO2_DIR) & (u32)(~((1<<1)|(1<<3))), GPIO2_DIR);
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/* zero and disable FREQ2 */
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sys_freqctrl = au_readl(SYS_FREQCTRL0);
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sys_freqctrl &= ~0xFFF00000;
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au_writel(sys_freqctrl, SYS_FREQCTRL0);
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/* zero and disable USBH/USBD clocks */
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sys_clksrc = au_readl(SYS_CLKSRC);
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sys_clksrc &= ~0x00007FE0;
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au_writel(sys_clksrc, SYS_CLKSRC);
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sys_freqctrl = au_readl(SYS_FREQCTRL0);
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sys_freqctrl &= ~0xFFF00000;
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sys_clksrc = au_readl(SYS_CLKSRC);
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sys_clksrc &= ~0x00007FE0;
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// FREQ2 = aux/2 = 48 MHz
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sys_freqctrl |= ((0<<22) | (1<<21) | (1<<20));
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au_writel(sys_freqctrl, SYS_FREQCTRL0);
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/*
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* Route 48MHz FREQ2 into USB Host and/or Device
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*/
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#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
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sys_clksrc |= ((4<<12) | (0<<11) | (0<<10));
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#endif
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au_writel(sys_clksrc, SYS_CLKSRC);
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pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x8000);
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// 2nd USB port is USB host
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pin_func |= 0x8000;
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au_writel(pin_func, SYS_PINFUNC);
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#endif /* defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) */
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#ifdef CONFIG_PCI
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// Setup PCI bus controller
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au_writel(0, Au1500_PCI_CMEM);
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au_writel(0x00003fff, Au1500_CFG_BASE);
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#if defined(__MIPSEB__)
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au_writel(0xf | (2<<6) | (1<<4), Au1500_PCI_CFG);
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#else
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au_writel(0xf, Au1500_PCI_CFG);
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#endif
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au_writel(0xf0000000, Au1500_PCI_MWMASK_DEV);
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au_writel(0, Au1500_PCI_MWBASE_REV_CCL);
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au_writel(0x02a00356, Au1500_PCI_STATCMD);
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au_writel(0x00003c04, Au1500_PCI_HDRTYPE);
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au_writel(0x00000008, Au1500_PCI_MBAR);
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au_sync();
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#endif
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/* Enable sys bus clock divider when IDLE state or no bus activity. */
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au_writel(au_readl(SYS_POWERCTRL) | (0x3 << 5), SYS_POWERCTRL);
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/* Enable the RTC if not already enabled */
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if (!(au_readl(0xac000028) & 0x20)) {
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printk("enabling clock ...\n");
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au_writel((au_readl(0xac000028) | 0x20), 0xac000028);
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}
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/* Put the clock in BCD mode */
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if (au_readl(0xac00002C) & 0x4) { /* reg B */
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au_writel(au_readl(0xac00002c) & ~0x4, 0xac00002c);
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au_sync();
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}
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}
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