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The inbound and outbound windows have completely separate control registers sets in the host controller MMIO space. Windows control register are accessed through an MMIO base address and an offset that depends on the window index. Since inbound and outbound windows control registers are completely separate there is no real need to use different window indexes in the inbound/outbound windows initialization routines to prevent clashing. To fix this inconsistency, change the MEM inbound window index to 0, mirroring the outbound window set-up. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> [lorenzo.pieralisi@arm.com: update commit log] Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Minghuan Lian <Minghuan.Lian@nxp.com> Reviewed-by: Subrahmanya Lingappa <l.subrahmanya@mobiveil.co.in> |
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| .. | ||
| dwc | ||
| Kconfig | ||
| Makefile | ||
| pci-aardvark.c | ||
| pci-ftpci100.c | ||
| pci-host-common.c | ||
| pci-host-generic.c | ||
| pci-hyperv.c | ||
| pci-mvebu.c | ||
| pci-rcar-gen2.c | ||
| pci-tegra.c | ||
| pci-thunder-ecam.c | ||
| pci-thunder-pem.c | ||
| pci-v3-semi.c | ||
| pci-versatile.c | ||
| pci-xgene-msi.c | ||
| pci-xgene.c | ||
| pcie-altera-msi.c | ||
| pcie-altera.c | ||
| pcie-cadence-ep.c | ||
| pcie-cadence-host.c | ||
| pcie-cadence.c | ||
| pcie-cadence.h | ||
| pcie-iproc-bcma.c | ||
| pcie-iproc-msi.c | ||
| pcie-iproc-platform.c | ||
| pcie-iproc.c | ||
| pcie-iproc.h | ||
| pcie-mediatek.c | ||
| pcie-mobiveil.c | ||
| pcie-rcar.c | ||
| pcie-rockchip-ep.c | ||
| pcie-rockchip-host.c | ||
| pcie-rockchip.c | ||
| pcie-rockchip.h | ||
| pcie-tango.c | ||
| pcie-xilinx-nwl.c | ||
| pcie-xilinx.c | ||
| vmd.c | ||