Nicholas Kazlauskas fb6959ae50 drm/amd/display: Embed DCN2 SOC bounding box ... [Why] In order to support uclk switching on NV10 the SOC bounding box needs to be updated. [How] We currently read the constants from the gpu info FW, but supporting workarounds in DC for different versions of the FW adds additional complexity to the codebase. NV10 has been released so it's cleanest to keep the bounding box and source code in sync by embedding the bounding box like we do for other ASICs. Fixes: 02316e963a ("drm/amd/display: Force uclk to max for every state") Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2019-07-30 23:48:33 -05:00
..
amdgpu_dm	drm/amdgpu/powerplay: provide the interface to disable uclk switch for DAL	2019-07-30 23:48:33 -05:00
dc	drm/amd/display: Embed DCN2 SOC bounding box	2019-07-30 23:48:33 -05:00
include	drm/amd/display: handle active dongle port type is DP++ or DP case	2019-07-18 14:27:27 -05:00
modules	drm/amd/display: Optimize gamma calculations	2019-07-18 14:27:25 -05:00
Kconfig	drm/amd/display: Add drm_audio_component support to amdgpu_dm	2019-07-11 14:37:24 -05:00
Makefile	drm/amd/display: move clk_mgr files to right place	2019-05-31 10:39:31 -05:00
TODO