mirror of
https://github.com/Fishwaldo/bl_mcu_sdk.git
synced 2025-07-06 04:48:44 +00:00
[feat][sf] add 2 line flash program support
This commit is contained in:
parent
21e2591a25
commit
147df677b1
8 changed files with 868 additions and 340 deletions
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@ -201,21 +201,21 @@ typedef struct
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* @brief Efuse Ldo11 Vout Sel Trim definition
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*/
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typedef struct {
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uint32_t sel_value : 4; /*!< value trim */
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uint32_t parity : 1; /*!< Parity of capcode */
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uint32_t en : 1; /*!< Enable status */
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uint32_t rsvd : 26; /*!< Reserved */
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}Efuse_Ldo11VoutSelTrim_Info_Type;
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uint32_t sel_value : 4; /*!< value trim */
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uint32_t parity : 1; /*!< Parity of capcode */
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uint32_t en : 1; /*!< Enable status */
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uint32_t rsvd : 26; /*!< Reserved */
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} Efuse_Ldo11VoutSelTrim_Info_Type;
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/**
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* @brief Efuse Tx Power definition
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*/
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typedef struct {
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uint32_t txpower : 5; /*!< txpower value */
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uint32_t parity : 1; /*!< Parity of capcode */
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uint32_t en : 1; /*!< Enable status */
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uint32_t rsvd : 25; /*!< Reserved */
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}Efuse_TxPower_Info_Type;
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uint32_t txpower : 5; /*!< txpower value */
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uint32_t parity : 1; /*!< Parity of capcode */
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uint32_t en : 1; /*!< Enable status */
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uint32_t rsvd : 25; /*!< Reserved */
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} Efuse_TxPower_Info_Type;
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/*@} end of group EF_CTRL_Public_Types */
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@ -469,6 +469,7 @@ BL_Err_Type Sec_Eng_Trng_Enable(void);
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void Sec_Eng_Trng_Int_Enable(void);
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void Sec_Eng_Trng_Int_Disable(void);
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BL_Err_Type Sec_Eng_Trng_Read(uint8_t data[32]);
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BL_Err_Type Sec_Eng_Trng_Get_Random(uint8_t *data, uint32_t len);
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void Sec_Eng_Trng_Int_Read_Trigger(void);
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void Sec_Eng_Trng_Int_Read(uint8_t data[32]);
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void Sec_Eng_Trng_Disable(void);
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@ -38,15 +38,14 @@
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#include "bl602_common.h"
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#include "bl602_sflash.h"
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#include "bl602_sflash_ext.h"
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#include "bl602_xip_sflash.h"
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#include "bl602_sf_cfg.h"
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#include "bl602_sf_cfg_ext.h"
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/** @addtogroup BL602_Peripheral_Driver
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* @{
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*/
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/** @addtogroup XIP_SFLASH
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/** @addtogroup XIP_SFLASH_EXT
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* @{
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*/
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@ -71,7 +70,23 @@
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/** @defgroup XIP_SFLASH_EXT_Public_Functions
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* @{
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*/
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BL_Err_Type XIP_SFlash_State_Restore_Ext(SPI_Flash_Cfg_Type *pFlashCfg,uint32_t offset);
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BL_Err_Type XIP_SFlash_Erase_Need_Lock_Ext(SPI_Flash_Cfg_Type *pFlashCfg,uint32_t startaddr,
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uint32_t endaddr);
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BL_Err_Type XIP_SFlash_Write_Need_Lock_Ext(SPI_Flash_Cfg_Type *pFlashCfg,uint32_t addr,uint8_t *data,
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uint32_t len);
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BL_Err_Type XIP_SFlash_Read_Need_Lock_Ext(SPI_Flash_Cfg_Type *pFlashCfg,uint32_t addr,uint8_t *data,
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uint32_t len);
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BL_Err_Type XIP_SFlash_GetJedecId_Need_Lock_Ext(SPI_Flash_Cfg_Type *pFlashCfg,uint8_t *data);
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BL_Err_Type XIP_SFlash_GetDeviceId_Need_Lock_Ext(SPI_Flash_Cfg_Type *pFlashCfg,uint8_t *data);
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BL_Err_Type XIP_SFlash_GetUniqueId_Need_Lock_Ext(SPI_Flash_Cfg_Type *pFlashCfg,uint8_t *data,
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uint8_t idLen);
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BL_Err_Type XIP_SFlash_RCV_Enable_Need_Lock(SPI_Flash_Cfg_Type *pFlashCfg, uint8_t rCmd, uint8_t wCmd,
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uint8_t bitPos);
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int XIP_SFlash_Read_With_Lock_Ext(SPI_Flash_Cfg_Type *pFlashCfg,uint32_t addr, uint8_t *dst, int len);
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int XIP_SFlash_Write_With_Lock_Ext(SPI_Flash_Cfg_Type *pFlashCfg,uint32_t addr, uint8_t *src, int len);
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int XIP_SFlash_Erase_With_Lock_Ext(SPI_Flash_Cfg_Type *pFlashCfg,uint32_t addr, int len);
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int XIP_SFlash_RCV_Enable_With_Lock(SPI_Flash_Cfg_Type *pFlashCfg, uint8_t rCmd, uint8_t wCmd, uint8_t bitPos);
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BL_Err_Type XIP_SFlash_Init(SPI_Flash_Cfg_Type *pFlashCfg);
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int XIP_SFlash_Read(uint32_t addr, uint8_t *dst, int len);
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int XIP_SFlash_Write(uint32_t addr, uint8_t *src, int len);
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@ -79,7 +94,7 @@ int XIP_SFlash_Erase(uint32_t addr, int len);
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/*@} end of group XIP_SFLASH_EXT_Public_Functions */
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/*@} end of group XIP_SFLASH */
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/*@} end of group XIP_SFLASH_EXT */
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/*@} end of group BL602_Peripheral_Driver */
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@ -27,7 +27,7 @@ void main(void)
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static BL_Err_Type PtTable_Flash_Read(uint32_t addr, uint8_t *data, uint32_t len)
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{
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XIP_SFlash_Read_Need_Lock(pFlashCfg, addr, data, len);
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XIP_SFlash_Read_Need_Lock_Ext(pFlashCfg, addr, data, len);
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return SUCCESS;
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}
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@ -68,14 +68,14 @@ static int8_t mfg_flash_program(void)
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mfg_print("mfg_flash_write\r\n");
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ret = XIP_SFlash_Erase_Need_Lock(pFlashCfg, rf_para_addr, rf_para_addr + 15);
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ret = XIP_SFlash_Erase_Need_Lock_Ext(pFlashCfg, rf_para_addr, rf_para_addr + 15);
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if (ret != SUCCESS) {
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mfg_print("Flash erase error\r\n");
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return -1;
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}
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ret = XIP_SFlash_Write_Need_Lock(pFlashCfg, rf_para_addr, (uint8_t *)&rf_para, sizeof(rf_para));
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ret = XIP_SFlash_Write_Need_Lock_Ext(pFlashCfg, rf_para_addr, (uint8_t *)&rf_para, sizeof(rf_para));
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if (ret != SUCCESS) {
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mfg_print("Flash write error\r\n");
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@ -91,7 +91,7 @@ static int8_t mfg_flash_read(void)
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mfg_print("mfg_flash_read\r\n");
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ret = XIP_SFlash_Read_Need_Lock(pFlashCfg, rf_para_addr, (uint8_t *)&rf_para, sizeof(rf_para));
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ret = XIP_SFlash_Read_Need_Lock_Ext(pFlashCfg, rf_para_addr, (uint8_t *)&rf_para, sizeof(rf_para));
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if (ret != SUCCESS) {
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mfg_print("Flash write error\r\n");
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@ -1529,6 +1529,43 @@ BL_Err_Type Sec_Eng_Trng_Read(uint8_t data[32])
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return SUCCESS;
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}
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/****************************************************************************/ /**
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* @brief TRNG get random data out
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*
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* @param data: TRNG output data buffer
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*
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* @param len: total length to get in bytes
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*
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* @return SUCCESS
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*
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*******************************************************************************/
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BL_Err_Type Sec_Eng_Trng_Get_Random(uint8_t *data, uint32_t len)
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{
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uint8_t tmpBuf[32];
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uint32_t readLen = 0;
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uint32_t i = 0, cnt = 0;
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while (readLen < len) {
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if (Sec_Eng_Trng_Read(tmpBuf) != SUCCESS) {
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return -1;
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}
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cnt = len - readLen;
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if (cnt > sizeof(tmpBuf)) {
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cnt = sizeof(tmpBuf);
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}
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for (i = 0; i < cnt; i++) {
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data[readLen + i] = tmpBuf[i];
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}
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readLen += cnt;
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}
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return 0;
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}
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/****************************************************************************/ /**
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* @brief TRNG Interrupt Read Trigger
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*
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@ -51,349 +51,481 @@
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/** @defgroup SF_CFG_EXT_Private_Macros
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* @{
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*/
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#define BFLB_FLASH_CFG_MAGIC "FCFG"
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#define BFLB_FLASH_CFG_MAGIC "FCFG"
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/*@} end of group SF_CFG_EXT_Private_Macros */
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/** @defgroup SF_CFG_EXT_Private_Types
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* @{
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*/
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typedef struct
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{
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typedef struct {
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uint32_t jedecID;
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char *name;
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const SPI_Flash_Cfg_Type *cfg;
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} Flash_Info_t;
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}Flash_Info_t;
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/*@} end of group SF_CFG_EXT_Private_Types */
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/** @defgroup SF_CFG_EXT_Private_Variables
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* @{
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*/
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static const ATTR_TCM_CONST_SECTION SPI_Flash_Cfg_Type flashCfg_FM_25Q08 = {
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.resetCreadCmd = 0xff,
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.resetCreadCmdSize = 3,
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.mid = 0xc8,
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static const ATTR_TCM_CONST_SECTION SPI_Flash_Cfg_Type flashCfg_FM_25Q08={
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.resetCreadCmd=0xff,
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.resetCreadCmdSize=3,
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.mid=0xc8,
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.deBurstWrapCmd = 0x77,
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.deBurstWrapCmdDmyClk = 0x3,
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.deBurstWrapDataMode = SF_CTRL_DATA_4_LINES,
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.deBurstWrapData = 0xF0,
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.deBurstWrapCmd=0x77,
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.deBurstWrapCmdDmyClk=0x3,
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.deBurstWrapDataMode=SF_CTRL_DATA_4_LINES,
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.deBurstWrapData=0xF0,
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/*reg*/
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.writeEnableCmd = 0x06,
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.wrEnableIndex = 0x00,
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.wrEnableBit = 0x01,
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.wrEnableReadRegLen = 0x01,
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/*reg*/
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.writeEnableCmd=0x06,
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.wrEnableIndex=0x00,
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.wrEnableBit=0x01,
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.wrEnableReadRegLen=0x01,
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.qeIndex = 1,
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.qeBit = 0x01,
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.qeWriteRegLen = 0x02,
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.qeReadRegLen = 0x1,
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.qeIndex=1,
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.qeBit=0x01,
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.qeWriteRegLen=0x02,
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.qeReadRegLen=0x1,
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.busyIndex = 0,
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.busyBit = 0x00,
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.busyReadRegLen = 0x1,
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.releasePowerDown = 0xab,
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.busyIndex=0,
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.busyBit=0x00,
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.busyReadRegLen=0x1,
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.releasePowerDown=0xab,
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.readRegCmd[0] = 0x05,
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.readRegCmd[1] = 0x35,
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.writeRegCmd[0] = 0x01,
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.writeRegCmd[1] = 0x01,
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.readRegCmd[0]=0x05,
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.readRegCmd[1]=0x35,
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.writeRegCmd[0]=0x01,
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.writeRegCmd[1]=0x01,
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.fastReadQioCmd = 0xeb,
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.frQioDmyClk = 16 / 8,
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.cReadSupport = 1,
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.cReadMode = 0x20,
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.fastReadQioCmd=0xeb,
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.frQioDmyClk=16/8,
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.cReadSupport=1,
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.cReadMode=0xa0,
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.burstWrapCmd = 0x77,
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.burstWrapCmdDmyClk = 0x3,
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.burstWrapDataMode = SF_CTRL_DATA_4_LINES,
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.burstWrapData = 0x40,
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/*erase*/
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.chipEraseCmd = 0xc7,
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.sectorEraseCmd = 0x20,
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.blk32EraseCmd = 0x52,
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.blk64EraseCmd = 0xd8,
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/*write*/
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.pageProgramCmd = 0x02,
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.qpageProgramCmd = 0x32,
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.qppAddrMode = SF_CTRL_ADDR_1_LINE,
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.burstWrapCmd=0x77,
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.burstWrapCmdDmyClk=0x3,
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.burstWrapDataMode=SF_CTRL_DATA_4_LINES,
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.burstWrapData=0x40,
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/*erase*/
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.chipEraseCmd=0xc7,
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.sectorEraseCmd=0x20,
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.blk32EraseCmd=0x52,
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.blk64EraseCmd=0xd8,
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/*write*/
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.pageProgramCmd=0x02,
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.qpageProgramCmd=0x32,
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.qppAddrMode=SF_CTRL_ADDR_1_LINE,
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.ioMode = SF_CTRL_QIO_MODE,
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.clkDelay = 1,
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.clkInvert = 0x3f,
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.ioMode=SF_CTRL_QIO_MODE,
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.clkDelay=1,
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.clkInvert=0x3f,
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.resetEnCmd = 0x66,
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.resetCmd = 0x99,
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.cRExit = 0xff,
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.wrEnableWriteRegLen = 0x00,
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.resetEnCmd=0x66,
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.resetCmd=0x99,
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.cRExit=0xff,
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.wrEnableWriteRegLen=0x00,
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/*id*/
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.jedecIdCmd = 0x9f,
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.jedecIdCmdDmyClk = 0,
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.qpiJedecIdCmd = 0x9f,
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.qpiJedecIdCmdDmyClk = 0x00,
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.sectorSize = 4,
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.pageSize = 256,
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/*id*/
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.jedecIdCmd=0x9f,
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.jedecIdCmdDmyClk=0,
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.qpiJedecIdCmd=0x9f,
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.qpiJedecIdCmdDmyClk=0x00,
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.sectorSize=4,
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.pageSize=256,
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/*read*/
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.fastReadCmd = 0x0b,
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.frDmyClk = 8 / 8,
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.qpiFastReadCmd = 0x0b,
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.qpiFrDmyClk = 8 / 8,
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.fastReadDoCmd = 0x3b,
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.frDoDmyClk = 8 / 8,
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.fastReadDioCmd = 0xbb,
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.frDioDmyClk = 0,
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.fastReadQoCmd = 0x6b,
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.frQoDmyClk = 8 / 8,
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/*read*/
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.fastReadCmd=0x0b,
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.frDmyClk=8/8,
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.qpiFastReadCmd =0x0b,
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.qpiFrDmyClk=8/8,
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.fastReadDoCmd=0x3b,
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.frDoDmyClk=8/8,
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.fastReadDioCmd=0xbb,
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.frDioDmyClk=0,
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.fastReadQoCmd=0x6b,
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.frQoDmyClk=8/8,
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.qpiFastReadQioCmd = 0xeb,
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.qpiFrQioDmyClk = 16 / 8,
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.qpiPageProgramCmd = 0x02,
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.writeVregEnableCmd = 0x50,
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.qpiFastReadQioCmd=0xeb,
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.qpiFrQioDmyClk=16/8,
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.qpiPageProgramCmd=0x02,
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.writeVregEnableCmd=0x50,
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/* qpi mode */
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.enterQpi = 0x38,
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.exitQpi = 0xff,
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/* qpi mode */
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.enterQpi=0x38,
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.exitQpi=0xff,
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/*AC*/
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.timeEsector = 300,
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.timeE32k = 1200,
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.timeE64k = 1200,
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.timePagePgm = 5,
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.timeCe = 20 * 1000,
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.pdDelay = 20,
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.qeData = 0,
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/*AC*/
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.timeEsector=300,
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.timeE32k=1200,
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.timeE64k=1200,
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.timePagePgm=5,
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.timeCe=20*1000,
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.pdDelay=20,
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.qeData=0,
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};
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static const ATTR_TCM_CONST_SECTION SPI_Flash_Cfg_Type flashCfg_Gd_Md_40D = {
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.resetCreadCmd = 0xff,
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.resetCreadCmdSize = 3,
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.mid = 0x51,
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static const ATTR_TCM_CONST_SECTION SPI_Flash_Cfg_Type flashCfg_Gd_Md_40D={
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.resetCreadCmd=0xff,
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.resetCreadCmdSize=3,
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.mid=0x51,
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.deBurstWrapCmd = 0x77,
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.deBurstWrapCmdDmyClk = 0x3,
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.deBurstWrapDataMode = SF_CTRL_DATA_4_LINES,
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.deBurstWrapData = 0xF0,
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.deBurstWrapCmd=0x77,
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.deBurstWrapCmdDmyClk=0x3,
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.deBurstWrapDataMode=SF_CTRL_DATA_4_LINES,
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.deBurstWrapData=0xF0,
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/*reg*/
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.writeEnableCmd = 0x06,
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.wrEnableIndex = 0x00,
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.wrEnableBit = 0x01,
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.wrEnableReadRegLen = 0x01,
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/*reg*/
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.writeEnableCmd=0x06,
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.wrEnableIndex=0x00,
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.wrEnableBit=0x01,
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.wrEnableReadRegLen=0x01,
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.qeIndex = 1,
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.qeBit = 0x01,
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.qeWriteRegLen = 0x02,
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.qeReadRegLen = 0x1,
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.qeIndex=1,
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.qeBit=0x01,
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.qeWriteRegLen=0x02,
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.qeReadRegLen=0x1,
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.busyIndex = 0,
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.busyBit = 0x00,
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.busyReadRegLen = 0x1,
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.releasePowerDown = 0xab,
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.busyIndex=0,
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.busyBit=0x00,
|
||||
.busyReadRegLen=0x1,
|
||||
.releasePowerDown=0xab,
|
||||
|
||||
.readRegCmd[0] = 0x05,
|
||||
.readRegCmd[1] = 0x35,
|
||||
.writeRegCmd[0] = 0x01,
|
||||
.writeRegCmd[1] = 0x01,
|
||||
.readRegCmd[0]=0x05,
|
||||
.readRegCmd[1]=0x35,
|
||||
.writeRegCmd[0]=0x01,
|
||||
.writeRegCmd[1]=0x01,
|
||||
|
||||
.fastReadQioCmd = 0xeb,
|
||||
.frQioDmyClk = 16 / 8,
|
||||
.cReadSupport = 0,
|
||||
.cReadMode = 0xA0,
|
||||
.fastReadQioCmd=0xeb,
|
||||
.frQioDmyClk=16/8,
|
||||
.cReadSupport=0,
|
||||
.cReadMode=0xA0,
|
||||
|
||||
.burstWrapCmd = 0x77,
|
||||
.burstWrapCmdDmyClk = 0x3,
|
||||
.burstWrapDataMode = SF_CTRL_DATA_4_LINES,
|
||||
.burstWrapData = 0x40,
|
||||
/*erase*/
|
||||
.chipEraseCmd = 0xc7,
|
||||
.sectorEraseCmd = 0x20,
|
||||
.blk32EraseCmd = 0x52,
|
||||
.blk64EraseCmd = 0xd8,
|
||||
/*write*/
|
||||
.pageProgramCmd = 0x02,
|
||||
.qpageProgramCmd = 0x32,
|
||||
.qppAddrMode = SF_CTRL_ADDR_1_LINE,
|
||||
.burstWrapCmd=0x77,
|
||||
.burstWrapCmdDmyClk=0x3,
|
||||
.burstWrapDataMode=SF_CTRL_DATA_4_LINES,
|
||||
.burstWrapData=0x40,
|
||||
/*erase*/
|
||||
.chipEraseCmd=0xc7,
|
||||
.sectorEraseCmd=0x20,
|
||||
.blk32EraseCmd=0x52,
|
||||
.blk64EraseCmd=0xd8,
|
||||
/*write*/
|
||||
.pageProgramCmd=0x02,
|
||||
.qpageProgramCmd=0x32,
|
||||
.qppAddrMode=SF_CTRL_ADDR_1_LINE,
|
||||
|
||||
.ioMode = SF_CTRL_DO_MODE,
|
||||
.clkDelay = 1,
|
||||
.clkInvert = 0x3f,
|
||||
.ioMode=SF_CTRL_DO_MODE,
|
||||
.clkDelay=1,
|
||||
.clkInvert=0x3f,
|
||||
|
||||
.resetEnCmd = 0x66,
|
||||
.resetCmd = 0x99,
|
||||
.cRExit = 0xff,
|
||||
.wrEnableWriteRegLen = 0x00,
|
||||
.resetEnCmd=0x66,
|
||||
.resetCmd=0x99,
|
||||
.cRExit=0xff,
|
||||
.wrEnableWriteRegLen=0x00,
|
||||
|
||||
/*id*/
|
||||
.jedecIdCmd = 0x9f,
|
||||
.jedecIdCmdDmyClk = 0,
|
||||
.qpiJedecIdCmd = 0x9f,
|
||||
.qpiJedecIdCmdDmyClk = 0x00,
|
||||
.sectorSize = 4,
|
||||
.pageSize = 256,
|
||||
/*id*/
|
||||
.jedecIdCmd=0x9f,
|
||||
.jedecIdCmdDmyClk=0,
|
||||
.qpiJedecIdCmd=0x9f,
|
||||
.qpiJedecIdCmdDmyClk=0x00,
|
||||
.sectorSize=4,
|
||||
.pageSize=256,
|
||||
|
||||
/*read*/
|
||||
.fastReadCmd = 0x0b,
|
||||
.frDmyClk = 8 / 8,
|
||||
.qpiFastReadCmd = 0x0b,
|
||||
.qpiFrDmyClk = 8 / 8,
|
||||
.fastReadDoCmd = 0x3b,
|
||||
.frDoDmyClk = 8 / 8,
|
||||
.fastReadDioCmd = 0xbb,
|
||||
.frDioDmyClk = 0,
|
||||
.fastReadQoCmd = 0x6b,
|
||||
.frQoDmyClk = 8 / 8,
|
||||
/*read*/
|
||||
.fastReadCmd=0x0b,
|
||||
.frDmyClk=8/8,
|
||||
.qpiFastReadCmd =0x0b,
|
||||
.qpiFrDmyClk=8/8,
|
||||
.fastReadDoCmd=0x3b,
|
||||
.frDoDmyClk=8/8,
|
||||
.fastReadDioCmd=0xbb,
|
||||
.frDioDmyClk=0,
|
||||
.fastReadQoCmd=0x6b,
|
||||
.frQoDmyClk=8/8,
|
||||
|
||||
.qpiFastReadQioCmd = 0xeb,
|
||||
.qpiFrQioDmyClk = 16 / 8,
|
||||
.qpiPageProgramCmd = 0x02,
|
||||
.writeVregEnableCmd = 0x50,
|
||||
.qpiFastReadQioCmd=0xeb,
|
||||
.qpiFrQioDmyClk=16/8,
|
||||
.qpiPageProgramCmd=0x02,
|
||||
.writeVregEnableCmd=0x50,
|
||||
|
||||
/* qpi mode */
|
||||
.enterQpi = 0x38,
|
||||
.exitQpi = 0xff,
|
||||
/* qpi mode */
|
||||
.enterQpi=0x38,
|
||||
.exitQpi=0xff,
|
||||
|
||||
/*AC*/
|
||||
.timeEsector = 300,
|
||||
.timeE32k = 1200,
|
||||
.timeE64k = 1200,
|
||||
.timePagePgm = 5,
|
||||
.timeCe = 20 * 1000,
|
||||
.pdDelay = 20,
|
||||
.qeData = 0,
|
||||
/*AC*/
|
||||
.timeEsector=300,
|
||||
.timeE32k=1200,
|
||||
.timeE64k=1200,
|
||||
.timePagePgm=5,
|
||||
.timeCe=20*1000,
|
||||
.pdDelay=20,
|
||||
.qeData=0,
|
||||
};
|
||||
|
||||
static const ATTR_TCM_CONST_SECTION SPI_Flash_Cfg_Type flashCfg_XM25QH16 = {
|
||||
.resetCreadCmd = 0xff,
|
||||
.resetCreadCmdSize = 3,
|
||||
.mid = 0x20,
|
||||
static const ATTR_TCM_CONST_SECTION SPI_Flash_Cfg_Type flashCfg_XM25QH16={
|
||||
.resetCreadCmd=0xff,
|
||||
.resetCreadCmdSize=3,
|
||||
.mid=0x20,
|
||||
|
||||
.deBurstWrapCmd = 0x77,
|
||||
.deBurstWrapCmdDmyClk = 0x3,
|
||||
.deBurstWrapDataMode = SF_CTRL_DATA_4_LINES,
|
||||
.deBurstWrapData = 0xF0,
|
||||
.deBurstWrapCmd=0x77,
|
||||
.deBurstWrapCmdDmyClk=0x3,
|
||||
.deBurstWrapDataMode=SF_CTRL_DATA_4_LINES,
|
||||
.deBurstWrapData=0xF0,
|
||||
|
||||
/*reg*/
|
||||
.writeEnableCmd = 0x06,
|
||||
.wrEnableIndex = 0x00,
|
||||
.wrEnableBit = 0x01,
|
||||
.wrEnableReadRegLen = 0x01,
|
||||
/*reg*/
|
||||
.writeEnableCmd=0x06,
|
||||
.wrEnableIndex=0x00,
|
||||
.wrEnableBit=0x01,
|
||||
.wrEnableReadRegLen=0x01,
|
||||
|
||||
.qeIndex = 1,
|
||||
.qeBit = 0x01,
|
||||
.qeWriteRegLen = 0x01,
|
||||
.qeReadRegLen = 0x1,
|
||||
.qeIndex=1,
|
||||
.qeBit=0x01,
|
||||
.qeWriteRegLen=0x01,
|
||||
.qeReadRegLen=0x1,
|
||||
|
||||
.busyIndex = 0,
|
||||
.busyBit = 0x00,
|
||||
.busyReadRegLen = 0x1,
|
||||
.releasePowerDown = 0xab,
|
||||
.busyIndex=0,
|
||||
.busyBit=0x00,
|
||||
.busyReadRegLen=0x1,
|
||||
.releasePowerDown=0xab,
|
||||
|
||||
.readRegCmd[0] = 0x05,
|
||||
.readRegCmd[1] = 0x35,
|
||||
.writeRegCmd[0] = 0x01,
|
||||
.writeRegCmd[1] = 0x31,
|
||||
.readRegCmd[0]=0x05,
|
||||
.readRegCmd[1]=0x35,
|
||||
.writeRegCmd[0]=0x01,
|
||||
.writeRegCmd[1]=0x31,
|
||||
|
||||
.fastReadQioCmd = 0xeb,
|
||||
.frQioDmyClk = 16 / 8,
|
||||
.cReadSupport = 1,
|
||||
.cReadMode = 0x20,
|
||||
.fastReadQioCmd=0xeb,
|
||||
.frQioDmyClk=16/8,
|
||||
.cReadSupport=1,
|
||||
.cReadMode=0x20,
|
||||
|
||||
.burstWrapCmd = 0x77,
|
||||
.burstWrapCmdDmyClk = 0x3,
|
||||
.burstWrapDataMode = SF_CTRL_DATA_4_LINES,
|
||||
.burstWrapData = 0x40,
|
||||
/*erase*/
|
||||
.chipEraseCmd = 0xc7,
|
||||
.sectorEraseCmd = 0x20,
|
||||
.blk32EraseCmd = 0x52,
|
||||
.blk64EraseCmd = 0xd8,
|
||||
/*write*/
|
||||
.pageProgramCmd = 0x02,
|
||||
.qpageProgramCmd = 0x32,
|
||||
.qppAddrMode = SF_CTRL_ADDR_1_LINE,
|
||||
.burstWrapCmd=0x77,
|
||||
.burstWrapCmdDmyClk=0x3,
|
||||
.burstWrapDataMode=SF_CTRL_DATA_4_LINES,
|
||||
.burstWrapData=0x40,
|
||||
/*erase*/
|
||||
.chipEraseCmd=0xc7,
|
||||
.sectorEraseCmd=0x20,
|
||||
.blk32EraseCmd=0x52,
|
||||
.blk64EraseCmd=0xd8,
|
||||
/*write*/
|
||||
.pageProgramCmd=0x02,
|
||||
.qpageProgramCmd=0x32,
|
||||
.qppAddrMode=SF_CTRL_ADDR_1_LINE,
|
||||
|
||||
.ioMode = SF_CTRL_QIO_MODE,
|
||||
.clkDelay = 1,
|
||||
.clkInvert = 0x3f,
|
||||
.ioMode=SF_CTRL_QIO_MODE,
|
||||
.clkDelay=1,
|
||||
.clkInvert=0x3f,
|
||||
|
||||
.resetEnCmd = 0x66,
|
||||
.resetCmd = 0x99,
|
||||
.cRExit = 0xff,
|
||||
.wrEnableWriteRegLen = 0x00,
|
||||
.resetEnCmd=0x66,
|
||||
.resetCmd=0x99,
|
||||
.cRExit=0xff,
|
||||
.wrEnableWriteRegLen=0x00,
|
||||
|
||||
/*id*/
|
||||
.jedecIdCmd = 0x9f,
|
||||
.jedecIdCmdDmyClk = 0,
|
||||
.qpiJedecIdCmd = 0x9f,
|
||||
.qpiJedecIdCmdDmyClk = 0x00,
|
||||
.sectorSize = 4,
|
||||
.pageSize = 256,
|
||||
/*id*/
|
||||
.jedecIdCmd=0x9f,
|
||||
.jedecIdCmdDmyClk=0,
|
||||
.qpiJedecIdCmd=0x9f,
|
||||
.qpiJedecIdCmdDmyClk=0x00,
|
||||
.sectorSize=4,
|
||||
.pageSize=256,
|
||||
|
||||
/*read*/
|
||||
.fastReadCmd = 0x0b,
|
||||
.frDmyClk = 8 / 8,
|
||||
.qpiFastReadCmd = 0x0b,
|
||||
.qpiFrDmyClk = 8 / 8,
|
||||
.fastReadDoCmd = 0x3b,
|
||||
.frDoDmyClk = 8 / 8,
|
||||
.fastReadDioCmd = 0xbb,
|
||||
.frDioDmyClk = 0,
|
||||
.fastReadQoCmd = 0x6b,
|
||||
.frQoDmyClk = 8 / 8,
|
||||
/*read*/
|
||||
.fastReadCmd=0x0b,
|
||||
.frDmyClk=8/8,
|
||||
.qpiFastReadCmd =0x0b,
|
||||
.qpiFrDmyClk=8/8,
|
||||
.fastReadDoCmd=0x3b,
|
||||
.frDoDmyClk=8/8,
|
||||
.fastReadDioCmd=0xbb,
|
||||
.frDioDmyClk=0,
|
||||
.fastReadQoCmd=0x6b,
|
||||
.frQoDmyClk=8/8,
|
||||
|
||||
.qpiFastReadQioCmd = 0xeb,
|
||||
.qpiFrQioDmyClk = 16 / 8,
|
||||
.qpiPageProgramCmd = 0x02,
|
||||
.writeVregEnableCmd = 0x50,
|
||||
.qpiFastReadQioCmd=0xeb,
|
||||
.qpiFrQioDmyClk=16/8,
|
||||
.qpiPageProgramCmd=0x02,
|
||||
.writeVregEnableCmd=0x50,
|
||||
|
||||
/* qpi mode */
|
||||
.enterQpi = 0x38,
|
||||
.exitQpi = 0xff,
|
||||
/* qpi mode */
|
||||
.enterQpi=0x38,
|
||||
.exitQpi=0xff,
|
||||
|
||||
/*AC*/
|
||||
.timeEsector = 400,
|
||||
.timeE32k = 1600,
|
||||
.timeE64k = 2000,
|
||||
.timePagePgm = 5,
|
||||
.timeCe = 20 * 1000,
|
||||
.pdDelay = 3,
|
||||
.qeData = 0,
|
||||
/*AC*/
|
||||
.timeEsector=400,
|
||||
.timeE32k=1600,
|
||||
.timeE64k=2000,
|
||||
.timePagePgm=5,
|
||||
.timeCe=20*1000,
|
||||
.pdDelay=3,
|
||||
.qeData=0,
|
||||
};
|
||||
|
||||
static const ATTR_TCM_CONST_SECTION Flash_Info_t flashInfos[] = {
|
||||
static const ATTR_TCM_CONST_SECTION SPI_Flash_Cfg_Type flashCfg_MX_KH25={
|
||||
.resetCreadCmd=0xff,
|
||||
.resetCreadCmdSize=3,
|
||||
.mid=0xc2,
|
||||
|
||||
.deBurstWrapCmd=0x77,
|
||||
.deBurstWrapCmdDmyClk=0x3,
|
||||
.deBurstWrapDataMode=SF_CTRL_DATA_4_LINES,
|
||||
.deBurstWrapData=0xF0,
|
||||
|
||||
/*reg*/
|
||||
.writeEnableCmd=0x06,
|
||||
.wrEnableIndex=0x00,
|
||||
.wrEnableBit=0x01,
|
||||
.wrEnableReadRegLen=0x01,
|
||||
|
||||
.qeIndex=1,
|
||||
.qeBit=0x01,
|
||||
.qeWriteRegLen=0x01,
|
||||
.qeReadRegLen=0x1,
|
||||
|
||||
.busyIndex=0,
|
||||
.busyBit=0x00,
|
||||
.busyReadRegLen=0x1,
|
||||
.releasePowerDown=0xab,
|
||||
|
||||
.readRegCmd[0]=0x05,
|
||||
.readRegCmd[1]=0x00,
|
||||
.writeRegCmd[0]=0x01,
|
||||
.writeRegCmd[1]=0x00,
|
||||
|
||||
.fastReadQioCmd=0xeb,
|
||||
.frQioDmyClk=16/8,
|
||||
.cReadSupport=0,
|
||||
.cReadMode=0x20,
|
||||
|
||||
.burstWrapCmd=0x77,
|
||||
.burstWrapCmdDmyClk=0x3,
|
||||
.burstWrapDataMode=SF_CTRL_DATA_4_LINES,
|
||||
.burstWrapData=0x40,
|
||||
/*erase*/
|
||||
.chipEraseCmd=0xc7,
|
||||
.sectorEraseCmd=0x20,
|
||||
.blk32EraseCmd=0x52,
|
||||
.blk64EraseCmd=0xd8,
|
||||
/*write*/
|
||||
.pageProgramCmd=0x02,
|
||||
.qpageProgramCmd=0x32,
|
||||
.qppAddrMode=SF_CTRL_ADDR_1_LINE,
|
||||
|
||||
.ioMode=0x11,
|
||||
.clkDelay=1,
|
||||
.clkInvert=0x3f,
|
||||
|
||||
.resetEnCmd=0x66,
|
||||
.resetCmd=0x99,
|
||||
.cRExit=0xff,
|
||||
.wrEnableWriteRegLen=0x00,
|
||||
|
||||
/*id*/
|
||||
.jedecIdCmd=0x9f,
|
||||
.jedecIdCmdDmyClk=0,
|
||||
.qpiJedecIdCmd=0x9f,
|
||||
.qpiJedecIdCmdDmyClk=0x00,
|
||||
.sectorSize=4,
|
||||
.pageSize=256,
|
||||
|
||||
/*read*/
|
||||
.fastReadCmd=0x0b,
|
||||
.frDmyClk=8/8,
|
||||
.qpiFastReadCmd =0x0b,
|
||||
.qpiFrDmyClk=8/8,
|
||||
.fastReadDoCmd=0x3b,
|
||||
.frDoDmyClk=8/8,
|
||||
.fastReadDioCmd=0xbb,
|
||||
.frDioDmyClk=0,
|
||||
.fastReadQoCmd=0x6b,
|
||||
.frQoDmyClk=8/8,
|
||||
|
||||
.qpiFastReadQioCmd=0xeb,
|
||||
.qpiFrQioDmyClk=16/8,
|
||||
.qpiPageProgramCmd=0x02,
|
||||
.writeVregEnableCmd=0x50,
|
||||
|
||||
/* qpi mode */
|
||||
.enterQpi=0x38,
|
||||
.exitQpi=0xff,
|
||||
|
||||
/*AC*/
|
||||
.timeEsector=300,
|
||||
.timeE32k=1200,
|
||||
.timeE64k=1200,
|
||||
.timePagePgm=5,
|
||||
.timeCe=20*1000,
|
||||
.pdDelay=20,
|
||||
.qeData=0,
|
||||
};
|
||||
|
||||
static const ATTR_TCM_CONST_SECTION Flash_Info_t flashInfos[]={
|
||||
{
|
||||
.jedecID = 0x1440A1,
|
||||
.jedecID=0x1440A1,
|
||||
//.name="FM_25Q08",
|
||||
.cfg = &flashCfg_FM_25Q08,
|
||||
.cfg=&flashCfg_FM_25Q08,
|
||||
},
|
||||
{
|
||||
.jedecID = 0x134051,
|
||||
.jedecID=0x134051,
|
||||
//.name="GD_MD04D_04_33",
|
||||
.cfg = &flashCfg_Gd_Md_40D,
|
||||
.cfg=&flashCfg_Gd_Md_40D,
|
||||
},
|
||||
{
|
||||
.jedecID = 0x144020,
|
||||
.jedecID=0x144020,
|
||||
//.name="XM_25QH80_80_33",
|
||||
.cfg = &flashCfg_XM25QH16,
|
||||
.cfg=&flashCfg_XM25QH16,
|
||||
},
|
||||
{
|
||||
.jedecID = 0x154020,
|
||||
.jedecID=0x154020,
|
||||
//.name="XM_25QH16_16_33",
|
||||
.cfg = &flashCfg_XM25QH16,
|
||||
.cfg=&flashCfg_XM25QH16,
|
||||
},
|
||||
{
|
||||
.jedecID = 0x164020,
|
||||
.jedecID=0x164020,
|
||||
//.name="XM_25QH32_32_33",
|
||||
.cfg = &flashCfg_XM25QH16,
|
||||
.cfg=&flashCfg_XM25QH16,
|
||||
},
|
||||
{
|
||||
.jedecID = 0x15605E,
|
||||
.jedecID=0x1320C2,
|
||||
//.name="MX_KH40_04_33",
|
||||
.cfg=&flashCfg_MX_KH25,
|
||||
},
|
||||
{
|
||||
.jedecID=0x1420C2,
|
||||
//.name="MX_KH80_08_33",
|
||||
.cfg=&flashCfg_MX_KH25,
|
||||
},
|
||||
{
|
||||
.jedecID=0x1520C2,
|
||||
//.name="MX_KH16_16_33",
|
||||
.cfg=&flashCfg_MX_KH25,
|
||||
},
|
||||
{
|
||||
.jedecID=0x13325E,
|
||||
//.name="ZB_D40B_80_33",
|
||||
.cfg=&flashCfg_MX_KH25,
|
||||
},
|
||||
{
|
||||
.jedecID=0x14325E,
|
||||
//.name="ZB_D80B_80_33",
|
||||
.cfg=&flashCfg_MX_KH25,
|
||||
},
|
||||
{
|
||||
.jedecID=0x15605E,
|
||||
//.name="ZB_25VQ16_16_33",
|
||||
.cfg = &flashCfg_XM25QH16,
|
||||
.cfg=&flashCfg_XM25QH16,
|
||||
},
|
||||
{
|
||||
.jedecID=0x15345E,
|
||||
//.name="ZB_25WQ16_16_33",
|
||||
.cfg=&flashCfg_XM25QH16,
|
||||
},
|
||||
{
|
||||
.jedecID=0x1560EB,
|
||||
//.name="TH_25Q16",
|
||||
.cfg=&flashCfg_FM_25Q08,
|
||||
},
|
||||
};
|
||||
|
||||
|
@ -415,7 +547,7 @@ static const ATTR_TCM_CONST_SECTION Flash_Info_t flashInfos[] = {
|
|||
* @{
|
||||
*/
|
||||
|
||||
/****************************************************************************/ /**
|
||||
/****************************************************************************//**
|
||||
* @brief Get flash config according to flash ID
|
||||
*
|
||||
* @param flashID: Flash ID
|
||||
|
@ -424,32 +556,29 @@ static const ATTR_TCM_CONST_SECTION Flash_Info_t flashInfos[] = {
|
|||
* @return SUCCESS or ERROR
|
||||
*
|
||||
*******************************************************************************/
|
||||
BL_Err_Type ATTR_TCM_SECTION SF_Cfg_Get_Flash_Cfg_Need_Lock_Ext(uint32_t flashID, SPI_Flash_Cfg_Type *pFlashCfg)
|
||||
BL_Err_Type ATTR_TCM_SECTION SF_Cfg_Get_Flash_Cfg_Need_Lock_Ext(uint32_t flashID,SPI_Flash_Cfg_Type * pFlashCfg)
|
||||
{
|
||||
uint32_t i;
|
||||
uint8_t buf[sizeof(SPI_Flash_Cfg_Type) + 8];
|
||||
uint32_t crc, *pCrc;
|
||||
uint8_t buf[sizeof(SPI_Flash_Cfg_Type)+8];
|
||||
uint32_t crc,*pCrc;
|
||||
|
||||
if (flashID == 0) {
|
||||
XIP_SFlash_Read_Via_Cache_Need_Lock(8 + BL602_FLASH_XIP_BASE, buf, sizeof(SPI_Flash_Cfg_Type) + 8);
|
||||
|
||||
if (BL602_MemCmp(buf, BFLB_FLASH_CFG_MAGIC, 4) == 0) {
|
||||
crc = BFLB_Soft_CRC32((uint8_t *)buf + 4, sizeof(SPI_Flash_Cfg_Type));
|
||||
pCrc = (uint32_t *)(buf + 4 + sizeof(SPI_Flash_Cfg_Type));
|
||||
|
||||
if (*pCrc == crc) {
|
||||
BL602_MemCpy_Fast(pFlashCfg, (uint8_t *)buf + 4, sizeof(SPI_Flash_Cfg_Type));
|
||||
return SUCCESS;
|
||||
if(flashID==0){
|
||||
XIP_SFlash_Read_Via_Cache_Need_Lock(8+BL602_FLASH_XIP_BASE,buf,sizeof(SPI_Flash_Cfg_Type)+8);
|
||||
if(BL602_MemCmp(buf,BFLB_FLASH_CFG_MAGIC,4)==0){
|
||||
crc=BFLB_Soft_CRC32((uint8_t *)buf+4,sizeof(SPI_Flash_Cfg_Type));
|
||||
pCrc=(uint32_t *)(buf+4+sizeof(SPI_Flash_Cfg_Type));
|
||||
if(*pCrc==crc){
|
||||
BL602_MemCpy_Fast(pFlashCfg,(uint8_t *)buf+4,sizeof(SPI_Flash_Cfg_Type));
|
||||
return SUCCESS ;
|
||||
}
|
||||
}
|
||||
} else {
|
||||
if (SF_Cfg_Get_Flash_Cfg_Need_Lock(flashID, pFlashCfg)) {
|
||||
}else{
|
||||
if(SF_Cfg_Get_Flash_Cfg_Need_Lock(flashID, pFlashCfg) == SUCCESS){
|
||||
return SUCCESS;
|
||||
}
|
||||
|
||||
for (i = 0; i < sizeof(flashInfos) / sizeof(flashInfos[0]); i++) {
|
||||
if (flashInfos[i].jedecID == flashID) {
|
||||
BL602_MemCpy_Fast(pFlashCfg, flashInfos[i].cfg, sizeof(SPI_Flash_Cfg_Type));
|
||||
for(i=0;i<sizeof(flashInfos)/sizeof(flashInfos[0]);i++){
|
||||
if(flashInfos[i].jedecID==flashID){
|
||||
BL602_MemCpy_Fast(pFlashCfg,flashInfos[i].cfg,sizeof(SPI_Flash_Cfg_Type));
|
||||
return SUCCESS;
|
||||
}
|
||||
}
|
||||
|
@ -458,7 +587,7 @@ BL_Err_Type ATTR_TCM_SECTION SF_Cfg_Get_Flash_Cfg_Need_Lock_Ext(uint32_t flashID
|
|||
return ERROR;
|
||||
}
|
||||
|
||||
/****************************************************************************/ /**
|
||||
/****************************************************************************//**
|
||||
* @brief Identify one flash
|
||||
*
|
||||
* @param callFromFlash: code run at flash or ram
|
||||
|
@ -471,31 +600,31 @@ BL_Err_Type ATTR_TCM_SECTION SF_Cfg_Get_Flash_Cfg_Need_Lock_Ext(uint32_t flashID
|
|||
*
|
||||
*******************************************************************************/
|
||||
uint32_t ATTR_TCM_SECTION SF_Cfg_Flash_Identify_Ext(uint8_t callFromFlash,
|
||||
uint32_t autoScan, uint32_t flashPinCfg, uint8_t restoreDefault, SPI_Flash_Cfg_Type *pFlashCfg)
|
||||
uint32_t autoScan,uint32_t flashPinCfg,uint8_t restoreDefault,SPI_Flash_Cfg_Type * pFlashCfg)
|
||||
{
|
||||
uint32_t jdecId = 0;
|
||||
uint32_t i = 0;
|
||||
uint32_t ret = 0;
|
||||
uint32_t jdecId=0;
|
||||
uint32_t i=0;
|
||||
uint32_t ret=0;
|
||||
|
||||
ret = SF_Cfg_Flash_Identify(callFromFlash, autoScan, flashPinCfg, restoreDefault, pFlashCfg);
|
||||
|
||||
if ((ret & BFLB_FLASH_ID_VALID_FLAG) != 0) {
|
||||
ret=SF_Cfg_Flash_Identify(callFromFlash,autoScan,flashPinCfg,restoreDefault,pFlashCfg);
|
||||
if(callFromFlash){
|
||||
SFlash_Set_IDbus_Cfg(pFlashCfg,pFlashCfg->ioMode&0xf,1,0,32);
|
||||
}
|
||||
if((ret&BFLB_FLASH_ID_VALID_FLAG)!=0){
|
||||
return ret;
|
||||
}
|
||||
|
||||
jdecId = (ret & 0xffffff);
|
||||
|
||||
for (i = 0; i < sizeof(flashInfos) / sizeof(flashInfos[0]); i++) {
|
||||
if (flashInfos[i].jedecID == jdecId) {
|
||||
BL602_MemCpy_Fast(pFlashCfg, flashInfos[i].cfg, sizeof(SPI_Flash_Cfg_Type));
|
||||
jdecId=(ret&0xffffff);
|
||||
for(i=0;i<sizeof(flashInfos)/sizeof(flashInfos[0]);i++){
|
||||
if(flashInfos[i].jedecID==jdecId){
|
||||
BL602_MemCpy_Fast(pFlashCfg,flashInfos[i].cfg,sizeof(SPI_Flash_Cfg_Type));
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (i == sizeof(flashInfos) / sizeof(flashInfos[0])) {
|
||||
if(i==sizeof(flashInfos)/sizeof(flashInfos[0])){
|
||||
return jdecId;
|
||||
} else {
|
||||
return (jdecId | BFLB_FLASH_ID_VALID_FLAG);
|
||||
}else{
|
||||
return (jdecId|BFLB_FLASH_ID_VALID_FLAG);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
@ -399,12 +399,45 @@ BL_Err_Type TIMER_Init(TIMER_CFG_Type *timerCfg)
|
|||
if (timerCfg->countMode == TIMER_COUNT_PRELOAD) {
|
||||
/* Configure timer preload value */
|
||||
TIMER_SetPreloadValue(timerCh, timerCfg->preLoadVal);
|
||||
}
|
||||
|
||||
/* Configure match compare values */
|
||||
TIMER_SetCompValue(timerCh, TIMER_COMP_ID_0, timerCfg->matchVal0);
|
||||
TIMER_SetCompValue(timerCh, TIMER_COMP_ID_1, timerCfg->matchVal1);
|
||||
TIMER_SetCompValue(timerCh, TIMER_COMP_ID_2, timerCfg->matchVal2);
|
||||
/* Configure match compare values */
|
||||
if (timerCfg->matchVal0 > 1 + timerCfg->preLoadVal) {
|
||||
TIMER_SetCompValue(timerCh, TIMER_COMP_ID_0, timerCfg->matchVal0 - 2);
|
||||
} else {
|
||||
TIMER_SetCompValue(timerCh, TIMER_COMP_ID_0, timerCfg->matchVal0);
|
||||
}
|
||||
|
||||
if (timerCfg->matchVal1 > 1 + timerCfg->preLoadVal) {
|
||||
TIMER_SetCompValue(timerCh, TIMER_COMP_ID_1, timerCfg->matchVal1 - 2);
|
||||
} else {
|
||||
TIMER_SetCompValue(timerCh, TIMER_COMP_ID_1, timerCfg->matchVal1);
|
||||
}
|
||||
|
||||
if (timerCfg->matchVal2 > 1 + timerCfg->preLoadVal) {
|
||||
TIMER_SetCompValue(timerCh, TIMER_COMP_ID_2, timerCfg->matchVal2 - 2);
|
||||
} else {
|
||||
TIMER_SetCompValue(timerCh, TIMER_COMP_ID_2, timerCfg->matchVal2);
|
||||
}
|
||||
} else {
|
||||
/* Configure match compare values */
|
||||
if (timerCfg->matchVal0 > 1) {
|
||||
TIMER_SetCompValue(timerCh, TIMER_COMP_ID_0, timerCfg->matchVal0 - 2);
|
||||
} else {
|
||||
TIMER_SetCompValue(timerCh, TIMER_COMP_ID_0, timerCfg->matchVal0);
|
||||
}
|
||||
|
||||
if (timerCfg->matchVal1 > 1) {
|
||||
TIMER_SetCompValue(timerCh, TIMER_COMP_ID_1, timerCfg->matchVal1 - 2);
|
||||
} else {
|
||||
TIMER_SetCompValue(timerCh, TIMER_COMP_ID_1, timerCfg->matchVal1);
|
||||
}
|
||||
|
||||
if (timerCfg->matchVal2 > 1) {
|
||||
TIMER_SetCompValue(timerCh, TIMER_COMP_ID_2, timerCfg->matchVal2 - 2);
|
||||
} else {
|
||||
TIMER_SetCompValue(timerCh, TIMER_COMP_ID_2, timerCfg->matchVal2);
|
||||
}
|
||||
}
|
||||
|
||||
#ifndef BFLB_USE_HAL_DRIVER
|
||||
Interrupt_Handler_Register(TIMER_CH0_IRQn, TIMER_CH0_IRQHandler);
|
||||
|
|
|
@ -35,13 +35,16 @@
|
|||
*/
|
||||
|
||||
#include "string.h"
|
||||
#include "bl602_sf_cfg.h"
|
||||
#include "bl602_sf_cfg_ext.h"
|
||||
#include "bl602_xip_sflash.h"
|
||||
#include "bl602_xip_sflash_ext.h"
|
||||
|
||||
/** @addtogroup BL602_Peripheral_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup XIP_SFLASH
|
||||
/** @addtogroup XIP_SFLASH_EXT
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
@ -82,7 +85,319 @@ static uint8_t aesEnable;
|
|||
* @{
|
||||
*/
|
||||
|
||||
/****************************************************************************/ /**
|
||||
/*@} end of group XIP_SFLASH_EXT_Private_Functions */
|
||||
|
||||
/** @defgroup XIP_SFLASH_EXT_Public_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/****************************************************************************//**
|
||||
* @brief Restore flash controller state
|
||||
*
|
||||
* @param pFlashCfg: Flash config pointer
|
||||
* @param offset: CPU XIP flash offset
|
||||
*
|
||||
* @return SUCCESS or ERROR
|
||||
*
|
||||
*******************************************************************************/
|
||||
__WEAK
|
||||
BL_Err_Type ATTR_TCM_SECTION XIP_SFlash_State_Restore_Ext(SPI_Flash_Cfg_Type *pFlashCfg,uint32_t offset)
|
||||
{
|
||||
uint32_t tmp[1];
|
||||
SF_Ctrl_IO_Type ioMode = (SF_Ctrl_IO_Type)pFlashCfg->ioMode&0xf;
|
||||
|
||||
SF_Ctrl_Set_Flash_Image_Offset(offset);
|
||||
|
||||
SFlash_SetBurstWrap(pFlashCfg);
|
||||
SFlash_Read(pFlashCfg,ioMode,1,0x0,(uint8_t *)tmp, sizeof(tmp));
|
||||
SFlash_Set_IDbus_Cfg(pFlashCfg,ioMode,1,0,32);
|
||||
|
||||
return SUCCESS;
|
||||
}
|
||||
|
||||
/*@} end of group XIP_SFLASH_EXT_Public_Functions */
|
||||
|
||||
/** @defgroup XIP_SFLASH_EXT_Public_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/****************************************************************************//**
|
||||
* @brief Erase flash one region
|
||||
*
|
||||
* @param pFlashCfg: Flash config pointer
|
||||
* @param startaddr: start address to erase
|
||||
* @param endaddr: end address(include this address) to erase
|
||||
*
|
||||
* @return SUCCESS or ERROR
|
||||
*
|
||||
*******************************************************************************/
|
||||
__WEAK
|
||||
BL_Err_Type ATTR_TCM_SECTION XIP_SFlash_Erase_Need_Lock_Ext(SPI_Flash_Cfg_Type *pFlashCfg,uint32_t startaddr,uint32_t endaddr)
|
||||
{
|
||||
BL_Err_Type stat;
|
||||
uint32_t offset;
|
||||
SF_Ctrl_IO_Type ioMode = (SF_Ctrl_IO_Type)pFlashCfg->ioMode&0xf;
|
||||
|
||||
stat=XIP_SFlash_State_Save(pFlashCfg,&offset);
|
||||
if(stat!=SUCCESS){
|
||||
SFlash_Set_IDbus_Cfg(pFlashCfg,ioMode,1,0,32);
|
||||
}else{
|
||||
stat=SFlash_Erase(pFlashCfg,startaddr,endaddr);
|
||||
XIP_SFlash_State_Restore_Ext(pFlashCfg,offset);
|
||||
}
|
||||
|
||||
return stat;
|
||||
}
|
||||
|
||||
/****************************************************************************//**
|
||||
* @brief Program flash one region
|
||||
*
|
||||
* @param pFlashCfg: Flash config pointer
|
||||
* @param addr: start address to be programed
|
||||
* @param data: data pointer to be programed
|
||||
* @param len: data length to be programed
|
||||
*
|
||||
* @return SUCCESS or ERROR
|
||||
*
|
||||
*******************************************************************************/
|
||||
__WEAK
|
||||
BL_Err_Type ATTR_TCM_SECTION XIP_SFlash_Write_Need_Lock_Ext(SPI_Flash_Cfg_Type *pFlashCfg,uint32_t addr,uint8_t *data, uint32_t len)
|
||||
{
|
||||
BL_Err_Type stat;
|
||||
uint32_t offset;
|
||||
SF_Ctrl_IO_Type ioMode = (SF_Ctrl_IO_Type)pFlashCfg->ioMode&0xf;
|
||||
|
||||
stat=XIP_SFlash_State_Save(pFlashCfg,&offset);
|
||||
if(stat!=SUCCESS){
|
||||
SFlash_Set_IDbus_Cfg(pFlashCfg,ioMode,1,0,32);
|
||||
}else{
|
||||
stat= SFlash_Program(pFlashCfg,ioMode,addr,data,len);
|
||||
XIP_SFlash_State_Restore_Ext(pFlashCfg,offset);
|
||||
}
|
||||
|
||||
return stat;
|
||||
}
|
||||
|
||||
/****************************************************************************//**
|
||||
* @brief Read data from flash
|
||||
*
|
||||
* @param pFlashCfg: Flash config pointer
|
||||
* @param addr: flash read start address
|
||||
* @param data: data pointer to store data read from flash
|
||||
* @param len: data length to read
|
||||
*
|
||||
* @return SUCCESS or ERROR
|
||||
*
|
||||
*******************************************************************************/
|
||||
__WEAK
|
||||
BL_Err_Type ATTR_TCM_SECTION XIP_SFlash_Read_Need_Lock_Ext(SPI_Flash_Cfg_Type *pFlashCfg,uint32_t addr,uint8_t *data, uint32_t len)
|
||||
{
|
||||
BL_Err_Type stat;
|
||||
uint32_t offset;
|
||||
SF_Ctrl_IO_Type ioMode = (SF_Ctrl_IO_Type)pFlashCfg->ioMode&0xf;
|
||||
|
||||
stat=XIP_SFlash_State_Save(pFlashCfg,&offset);
|
||||
if(stat!=SUCCESS){
|
||||
SFlash_Set_IDbus_Cfg(pFlashCfg,ioMode,1,0,32);
|
||||
}else{
|
||||
stat=SFlash_Read(pFlashCfg,ioMode,0,addr, data,len);
|
||||
XIP_SFlash_State_Restore_Ext(pFlashCfg,offset);
|
||||
}
|
||||
|
||||
return stat;
|
||||
}
|
||||
|
||||
/****************************************************************************//**
|
||||
* @brief Get Flash Jedec ID
|
||||
*
|
||||
* @param pFlashCfg: Flash config pointer
|
||||
* @param data: data pointer to store Jedec ID Read from flash
|
||||
*
|
||||
* @return SUCCESS or ERROR
|
||||
*
|
||||
*******************************************************************************/
|
||||
__WEAK
|
||||
BL_Err_Type ATTR_TCM_SECTION XIP_SFlash_GetJedecId_Need_Lock_Ext(SPI_Flash_Cfg_Type *pFlashCfg,uint8_t *data)
|
||||
{
|
||||
BL_Err_Type stat;
|
||||
uint32_t offset;
|
||||
SF_Ctrl_IO_Type ioMode = (SF_Ctrl_IO_Type)pFlashCfg->ioMode&0xf;
|
||||
|
||||
stat=XIP_SFlash_State_Save(pFlashCfg,&offset);
|
||||
if(stat!=SUCCESS){
|
||||
SFlash_Set_IDbus_Cfg(pFlashCfg,ioMode,1,0,32);
|
||||
}else{
|
||||
SFlash_GetJedecId(pFlashCfg,data);
|
||||
XIP_SFlash_State_Restore_Ext(pFlashCfg,offset);
|
||||
}
|
||||
|
||||
return SUCCESS;
|
||||
}
|
||||
|
||||
/****************************************************************************//**
|
||||
* @brief Get Flash Device ID
|
||||
*
|
||||
* @param pFlashCfg: Flash config pointer
|
||||
* @param data: data pointer to store Device ID Read from flash
|
||||
*
|
||||
* @return SUCCESS or ERROR
|
||||
*
|
||||
*******************************************************************************/
|
||||
__WEAK
|
||||
BL_Err_Type ATTR_TCM_SECTION XIP_SFlash_GetDeviceId_Need_Lock_Ext(SPI_Flash_Cfg_Type *pFlashCfg,uint8_t *data)
|
||||
{
|
||||
BL_Err_Type stat;
|
||||
uint32_t offset;
|
||||
SF_Ctrl_IO_Type ioMode = (SF_Ctrl_IO_Type)pFlashCfg->ioMode&0xf;
|
||||
|
||||
stat=XIP_SFlash_State_Save(pFlashCfg,&offset);
|
||||
if(stat!=SUCCESS){
|
||||
SFlash_Set_IDbus_Cfg(pFlashCfg,ioMode,1,0,32);
|
||||
}else{
|
||||
SFlash_GetDeviceId(data);
|
||||
XIP_SFlash_State_Restore_Ext(pFlashCfg,offset);
|
||||
}
|
||||
|
||||
return SUCCESS;
|
||||
}
|
||||
|
||||
/****************************************************************************//**
|
||||
* @brief Get Flash Unique ID
|
||||
*
|
||||
* @param pFlashCfg: Flash config pointer
|
||||
* @param data: data pointer to store Device ID Read from flash
|
||||
* @param idLen: Unique id len
|
||||
*
|
||||
* @return SUCCESS or ERROR
|
||||
*
|
||||
*******************************************************************************/
|
||||
__WEAK
|
||||
BL_Err_Type ATTR_TCM_SECTION XIP_SFlash_GetUniqueId_Need_Lock_Ext(SPI_Flash_Cfg_Type *pFlashCfg,uint8_t *data,uint8_t idLen)
|
||||
{
|
||||
BL_Err_Type stat;
|
||||
uint32_t offset;
|
||||
SF_Ctrl_IO_Type ioMode = (SF_Ctrl_IO_Type)pFlashCfg->ioMode&0xf;
|
||||
|
||||
stat=XIP_SFlash_State_Save(pFlashCfg,&offset);
|
||||
if(stat!=SUCCESS){
|
||||
SFlash_Set_IDbus_Cfg(pFlashCfg,ioMode,1,0,32);
|
||||
}else{
|
||||
SFlash_GetUniqueId(data,idLen);
|
||||
XIP_SFlash_State_Restore_Ext(pFlashCfg,offset);
|
||||
}
|
||||
|
||||
return SUCCESS;
|
||||
}
|
||||
|
||||
/****************************************************************************//**
|
||||
* @brief Sflash enable RCV mode to recovery for erase while power drop need lock
|
||||
*
|
||||
* @param pFlashCfg: Flash config pointer
|
||||
* @param rCmd: Read RCV register cmd
|
||||
* @param wCmd: Write RCV register cmd
|
||||
* @param bitPos: RCV register bit pos
|
||||
*
|
||||
* @return SUCCESS or ERROR
|
||||
*
|
||||
*******************************************************************************/
|
||||
__WEAK
|
||||
BL_Err_Type ATTR_TCM_SECTION XIP_SFlash_RCV_Enable_Need_Lock(SPI_Flash_Cfg_Type *pFlashCfg, uint8_t rCmd, uint8_t wCmd, uint8_t bitPos)
|
||||
{
|
||||
BL_Err_Type stat;
|
||||
uint32_t offset;
|
||||
SF_Ctrl_IO_Type ioMode = (SF_Ctrl_IO_Type)pFlashCfg->ioMode&0xf;
|
||||
|
||||
stat=XIP_SFlash_State_Save(pFlashCfg,&offset);
|
||||
if(stat!=SUCCESS){
|
||||
SFlash_Set_IDbus_Cfg(pFlashCfg,ioMode,1,0,32);
|
||||
}else{
|
||||
stat=SFlash_RCV_Enable(pFlashCfg, rCmd, wCmd, bitPos);
|
||||
XIP_SFlash_State_Restore_Ext(pFlashCfg,offset);
|
||||
}
|
||||
|
||||
return stat;
|
||||
}
|
||||
|
||||
/****************************************************************************//**
|
||||
* @brief Read data from flash with lock
|
||||
*
|
||||
* @param pFlashCfg: Flash config pointer
|
||||
* @param addr: flash read start address
|
||||
* @param dst: data pointer to store data read from flash
|
||||
* @param len: data length to read
|
||||
*
|
||||
* @return 0
|
||||
*
|
||||
*******************************************************************************/
|
||||
__WEAK
|
||||
int ATTR_TCM_SECTION XIP_SFlash_Read_With_Lock_Ext(SPI_Flash_Cfg_Type *pFlashCfg,uint32_t addr, uint8_t *dst, int len)
|
||||
{
|
||||
__disable_irq();
|
||||
XIP_SFlash_Read_Need_Lock_Ext(pFlashCfg, addr, dst, len);
|
||||
__enable_irq();
|
||||
return 0;
|
||||
}
|
||||
|
||||
/****************************************************************************//**
|
||||
* @brief Program flash one region with lock
|
||||
*
|
||||
* @param pFlashCfg: Flash config pointer
|
||||
* @param addr: Start address to be programed
|
||||
* @param src: Data pointer to be programed
|
||||
* @param len: Data length to be programed
|
||||
*
|
||||
* @return 0
|
||||
*
|
||||
*******************************************************************************/
|
||||
__WEAK
|
||||
int ATTR_TCM_SECTION XIP_SFlash_Write_With_Lock_Ext(SPI_Flash_Cfg_Type *pFlashCfg,uint32_t addr, uint8_t *src, int len)
|
||||
{
|
||||
__disable_irq();
|
||||
XIP_SFlash_Write_Need_Lock_Ext(pFlashCfg, addr, src, len);
|
||||
__enable_irq();
|
||||
return 0;
|
||||
}
|
||||
|
||||
/****************************************************************************//**
|
||||
* @brief Erase flash one region with lock
|
||||
*
|
||||
* @param pFlashCfg: Flash config pointer
|
||||
* @param addr: Start address to be erased
|
||||
* @param len: Data length to be erased
|
||||
*
|
||||
* @return 0
|
||||
*
|
||||
*******************************************************************************/
|
||||
__WEAK
|
||||
int ATTR_TCM_SECTION XIP_SFlash_Erase_With_Lock_Ext(SPI_Flash_Cfg_Type *pFlashCfg,uint32_t addr, int len)
|
||||
{
|
||||
__disable_irq();
|
||||
XIP_SFlash_Erase_Need_Lock_Ext(pFlashCfg, addr, addr + len - 1);
|
||||
__enable_irq();
|
||||
return 0;
|
||||
}
|
||||
|
||||
/****************************************************************************//**
|
||||
* @brief Sflash enable RCV mode to recovery for erase while power drop with lock
|
||||
*
|
||||
* @param pFlashCfg: Flash config pointer
|
||||
* @param rCmd: Read RCV register cmd
|
||||
* @param wCmd: Write RCV register cmd
|
||||
* @param bitPos: RCV register bit pos
|
||||
*
|
||||
* @return 0
|
||||
*
|
||||
*******************************************************************************/
|
||||
__WEAK
|
||||
int ATTR_TCM_SECTION XIP_SFlash_RCV_Enable_With_Lock(SPI_Flash_Cfg_Type *pFlashCfg, uint8_t rCmd, uint8_t wCmd, uint8_t bitPos)
|
||||
{
|
||||
__disable_irq();
|
||||
XIP_SFlash_RCV_Enable_Need_Lock(pFlashCfg, rCmd, wCmd, bitPos);
|
||||
__enable_irq();
|
||||
return 0;
|
||||
}
|
||||
|
||||
/****************************************************************************//**
|
||||
* @brief Read data from flash with lock
|
||||
*
|
||||
* @param pFlashCfg:Flash config pointer
|
||||
|
@ -95,23 +410,22 @@ BL_Err_Type ATTR_TCM_SECTION XIP_SFlash_Init(SPI_Flash_Cfg_Type *pFlashCfg)
|
|||
{
|
||||
uint32_t ret;
|
||||
|
||||
if (pFlashCfg == NULL) {
|
||||
if(pFlashCfg==NULL){
|
||||
/* Get flash config identify */
|
||||
XIP_SFlash_Opt_Enter(&aesEnable);
|
||||
ret = SF_Cfg_Flash_Identify_Ext(1, 1, 0, 0, &flashCfg);
|
||||
ret=SF_Cfg_Flash_Identify_Ext(1,1,0,0,&flashCfg);
|
||||
XIP_SFlash_Opt_Exit(aesEnable);
|
||||
|
||||
if ((ret & BFLB_FLASH_ID_VALID_FLAG) == 0) {
|
||||
if((ret&BFLB_FLASH_ID_VALID_FLAG)==0){
|
||||
return ERROR;
|
||||
}
|
||||
} else {
|
||||
memcpy(&flashCfg, pFlashCfg, sizeof(flashCfg));
|
||||
}else{
|
||||
memcpy(&flashCfg,pFlashCfg,sizeof(flashCfg));
|
||||
}
|
||||
|
||||
|
||||
return SUCCESS;
|
||||
}
|
||||
|
||||
/****************************************************************************/ /**
|
||||
/****************************************************************************//**
|
||||
* @brief Read data from flash with lock
|
||||
*
|
||||
* @param addr: flash read start address
|
||||
|
@ -126,13 +440,13 @@ int ATTR_TCM_SECTION XIP_SFlash_Read(uint32_t addr, uint8_t *dst, int len)
|
|||
{
|
||||
__disable_irq();
|
||||
XIP_SFlash_Opt_Enter(&aesEnable);
|
||||
XIP_SFlash_Read_Need_Lock(&flashCfg, addr, dst, len);
|
||||
XIP_SFlash_Read_Need_Lock_Ext(&flashCfg, addr, dst, len);
|
||||
XIP_SFlash_Opt_Exit(aesEnable);
|
||||
__enable_irq();
|
||||
return 0;
|
||||
}
|
||||
|
||||
/****************************************************************************/ /**
|
||||
/****************************************************************************//**
|
||||
* @brief Program flash one region with lock
|
||||
*
|
||||
* @param addr: Start address to be programed
|
||||
|
@ -147,13 +461,13 @@ int ATTR_TCM_SECTION XIP_SFlash_Write(uint32_t addr, uint8_t *src, int len)
|
|||
{
|
||||
__disable_irq();
|
||||
XIP_SFlash_Opt_Enter(&aesEnable);
|
||||
XIP_SFlash_Write_Need_Lock(&flashCfg, addr, src, len);
|
||||
XIP_SFlash_Write_Need_Lock_Ext(&flashCfg, addr, src, len);
|
||||
XIP_SFlash_Opt_Exit(aesEnable);
|
||||
__enable_irq();
|
||||
return 0;
|
||||
}
|
||||
|
||||
/****************************************************************************/ /**
|
||||
/****************************************************************************//**
|
||||
* @brief Erase flash one region with lock
|
||||
*
|
||||
* @param addr: Start address to be erased
|
||||
|
@ -167,12 +481,11 @@ int ATTR_TCM_SECTION XIP_SFlash_Erase(uint32_t addr, int len)
|
|||
{
|
||||
__disable_irq();
|
||||
XIP_SFlash_Opt_Enter(&aesEnable);
|
||||
XIP_SFlash_Erase_Need_Lock(&flashCfg, addr, addr + len - 1);
|
||||
XIP_SFlash_Erase_Need_Lock_Ext(&flashCfg, addr, addr + len - 1);
|
||||
XIP_SFlash_Opt_Exit(aesEnable);
|
||||
__enable_irq();
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*@} end of group XIP_SFLASH_EXT_Public_Functions */
|
||||
|
||||
/*@} end of group XIP_SFLASH_EXT */
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue