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[refactor] rename NVIC as CPU_Interrupt

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This commit is contained in:
jzlv 2021-08-05 20:43:13 +08:00
parent 7e77a26dad
commit 1c26e68beb
23 changed files with 70 additions and 69 deletions
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6
drivers/bl602_driver/hal_drv/src/hal_dma.c
View file

@ -70,7 +70,7 @@ int dma_open(struct device *dev, uint16_t oflag)
/* Disable all interrupt */
DMA_IntMask(dma_device->ch, DMA_INT_ALL, MASK);
/* Enable uart interrupt*/
NVIC_DisableIRQ(DMA_ALL_IRQn);
CPU_Interrupt_Disable(DMA_ALL_IRQn);
DMA_Disable();
@ -111,7 +111,7 @@ int dma_control(struct device *dev, int cmd, void *args)
DMA_IntMask(dma_device->ch, DMA_INT_ERR, UNMASK);
/* Enable uart interrupt*/
NVIC_EnableIRQ(DMA_ALL_IRQn);
CPU_Interrupt_Enable(DMA_ALL_IRQn);
break;
case DEVICE_CTRL_CLR_INT /* constant-expression */:
@ -120,7 +120,7 @@ int dma_control(struct device *dev, int cmd, void *args)
DMA_IntMask(dma_device->ch, DMA_INT_ERR, MASK);
/* Enable uart interrupt*/
NVIC_DisableIRQ(DMA_ALL_IRQn);
CPU_Interrupt_Disable(DMA_ALL_IRQn);
break;
case DEVICE_CTRL_GET_INT /* constant-expression */:

4
drivers/bl602_driver/hal_drv/src/hal_gpio.c
View file

@ -84,7 +84,7 @@ void gpio_set_mode(uint32_t pin, uint32_t mode)
break;
default:
NVIC_DisableIRQ(GPIO_INT0_IRQn);
CPU_Interrupt_Disable(GPIO_INT0_IRQn);
GLB_GPIO_IntMask(pin, MASK);
gpio_cfg.gpioMode = GPIO_MODE_INPUT;
@ -135,7 +135,7 @@ void gpio_set_mode(uint32_t pin, uint32_t mode)
return;
}
NVIC_EnableIRQ(GPIO_INT0_IRQn);
CPU_Interrupt_Enable(GPIO_INT0_IRQn);
break;
}

4
drivers/bl602_driver/hal_drv/src/hal_mtimer.c
View file

@ -42,7 +42,7 @@ static void Systick_Handler(void)
*/
void mtimer_set_alarm_time(uint64_t ticks, void (*interruptfun)(void))
{
NVIC_DisableIRQ(MTIME_IRQn);
CPU_Interrupt_Disable(MTIME_IRQn);
uint32_t ulCurrentTimeHigh, ulCurrentTimeLow;
volatile uint32_t *const pulTimeHigh = (volatile uint32_t *const)(CLIC_CTRL_ADDR + CLIC_MTIME + 4);
@ -71,7 +71,7 @@ void mtimer_set_alarm_time(uint64_t ticks, void (*interruptfun)(void))
next_compare_tick += (uint64_t)current_set_ticks;
Interrupt_Handler_Register(MTIME_IRQn, Systick_Handler);
NVIC_EnableIRQ(MTIME_IRQn);
CPU_Interrupt_Enable(MTIME_IRQn);
}
/**

8
drivers/bl602_driver/hal_drv/src/hal_uart.c
View file

@ -170,9 +170,9 @@ int uart_control(struct device *dev, int cmd, void *args)
}
if (uart_device->id == UART0_ID) {
NVIC_EnableIRQ(UART0_IRQn);
CPU_Interrupt_Enable(UART0_IRQn);
} else if (uart_device->id == UART1_ID) {
NVIC_EnableIRQ(UART1_IRQn);
CPU_Interrupt_Enable(UART1_IRQn);
}
break;
@ -190,9 +190,9 @@ int uart_control(struct device *dev, int cmd, void *args)
}
if (uart_device->id == UART0_ID) {
NVIC_DisableIRQ(UART0_IRQn);
CPU_Interrupt_Disable(UART0_IRQn);
} else if (uart_device->id == UART1_ID) {
NVIC_DisableIRQ(UART1_IRQn);
CPU_Interrupt_Disable(UART1_IRQn);
}
break;

4
drivers/bl602_driver/risc-v/Core/Include/cmsis_compatible_gcc.h
View file

@ -120,9 +120,9 @@ extern void clic_disable_interrupt(uint32_t source);
extern void clic_set_pending(uint32_t source);
extern void clic_clear_pending(uint32_t source);
#define NVIC_EnableIRQ clic_enable_interrupt
#define CPU_Interrupt_Enable clic_enable_interrupt
#define NVIC_DisableIRQ clic_disable_interrupt
#define CPU_Interrupt_Disable clic_disable_interrupt
#define NVIC_ClearPendingIRQ clic_clear_pending

14
drivers/bl602_driver/std_drv/src/bl602_dma.c
View file

@ -547,7 +547,7 @@ BL_Err_Type DMA_LLI_PpStruct_Set_Transfer_Len(DMA_LLI_PP_Struct *dmaPpStruct, ui
*******************************************************************************/
void DMA_LLI_PpBuf_Start_New_Transmit(DMA_LLI_PP_Buf *dmaPpBuf)
{
NVIC_DisableIRQ(DMA_ALL_IRQn);
CPU_Interrupt_Disable(DMA_ALL_IRQn);
if (dmaPpBuf->lliListHeader[dmaPpBuf->idleIndex] != NULL) {
DMA_LLI_Update(dmaPpBuf->dmaChan, (uint32_t)dmaPpBuf->lliListHeader[dmaPpBuf->idleIndex]);
@ -555,7 +555,7 @@ void DMA_LLI_PpBuf_Start_New_Transmit(DMA_LLI_PP_Buf *dmaPpBuf)
dmaPpBuf->idleIndex = (dmaPpBuf->idleIndex == 0) ? 1 : 0;
}
NVIC_EnableIRQ(DMA_ALL_IRQn);
CPU_Interrupt_Enable(DMA_ALL_IRQn);
}
/****************************************************************************/ /**
@ -568,10 +568,10 @@ void DMA_LLI_PpBuf_Start_New_Transmit(DMA_LLI_PP_Buf *dmaPpBuf)
*******************************************************************************/
DMA_LLI_Ctrl_Type *DMA_LLI_PpBuf_Remove_Completed_List(DMA_LLI_PP_Buf *dmaPpBuf)
{
NVIC_DisableIRQ(DMA_ALL_IRQn);
CPU_Interrupt_Disable(DMA_ALL_IRQn);
dmaPpBuf->lliListHeader[!dmaPpBuf->idleIndex] = NULL;
NVIC_EnableIRQ(DMA_ALL_IRQn);
CPU_Interrupt_Enable(DMA_ALL_IRQn);
return dmaPpBuf->lliListHeader[!dmaPpBuf->idleIndex];
}
@ -587,7 +587,7 @@ DMA_LLI_Ctrl_Type *DMA_LLI_PpBuf_Remove_Completed_List(DMA_LLI_PP_Buf *dmaPpBuf)
void DMA_LLI_PpBuf_Append(DMA_LLI_PP_Buf *dmaPpBuf, DMA_LLI_Ctrl_Type *dmaLliList)
{
DMA_LLI_Ctrl_Type *pLliList = NULL;
NVIC_DisableIRQ(DMA_ALL_IRQn);
CPU_Interrupt_Disable(DMA_ALL_IRQn);
pLliList = dmaPpBuf->lliListHeader[dmaPpBuf->idleIndex];
@ -608,7 +608,7 @@ void DMA_LLI_PpBuf_Append(DMA_LLI_PP_Buf *dmaPpBuf, DMA_LLI_Ctrl_Type *dmaLliLis
}
if (DMA_Channel_Is_Busy(dmaPpBuf->dmaChan) == RESET) {
/* DMA stopped: maybe stop just a few minutes ago(not enter INT due to NVIC_DisableIRQ)
/* DMA stopped: maybe stop just a few minutes ago(not enter INT due to CPU_Interrupt_Disable)
or has already stopped before this function is called */
if (dmaPpBuf->lliListHeader[!dmaPpBuf->idleIndex] == NULL) {
/* DMA has already stopped before this function is called */
@ -616,7 +616,7 @@ void DMA_LLI_PpBuf_Append(DMA_LLI_PP_Buf *dmaPpBuf, DMA_LLI_Ctrl_Type *dmaLliLis
}
}
NVIC_EnableIRQ(DMA_ALL_IRQn);
CPU_Interrupt_Enable(DMA_ALL_IRQn);
}
/****************************************************************************/ /**

2
drivers/bl702_driver/hal_drv/src/hal_adc.c
View file

@ -184,7 +184,7 @@ int adc_control(struct device *dev, int cmd, void *args)
if (mask & ADC_EVEN_INT_NEG_SATURATION_IT) {
ADC_IntMask(ADC_EVEN_INT_NEG_SATURATION, UNMASK);
}
NVIC_EnableIRQ(GPADC_DMA_IRQn);
CPU_Interrupt_Enable(GPADC_DMA_IRQn);
break;
case DEVICE_CTRL_CLR_INT /* constant-expression */:

4
drivers/bl702_driver/hal_drv/src/hal_dma.c
View file

@ -70,7 +70,7 @@ int dma_open(struct device *dev, uint16_t oflag)
/* Disable all interrupt */
DMA_IntMask(dma_device->ch, DMA_INT_ALL, MASK);
/* Enable uart interrupt*/
NVIC_DisableIRQ(DMA_ALL_IRQn);
CPU_Interrupt_Disable(DMA_ALL_IRQn);
DMA_Disable();
@ -90,7 +90,7 @@ int dma_open(struct device *dev, uint16_t oflag)
Interrupt_Handler_Register(DMA_ALL_IRQn, DMA0_IRQ);
/* Enable uart interrupt*/
NVIC_EnableIRQ(DMA_ALL_IRQn);
CPU_Interrupt_Enable(DMA_ALL_IRQn);
return 0;
}
/**

2
drivers/bl702_driver/hal_drv/src/hal_emac.c
View file

@ -344,7 +344,7 @@ int emac_init(emac_device_t *emac_cfg)
EMAC_Int_Callback_Install(EMAC_INT_RX_BUSY_IDX, emac_rx_busy_callback);
NVIC_EnableIRQ(EMAC_IRQn);
CPU_Interrupt_Enable(EMAC_IRQn);
EMAC_ClrIntStatus(EMAC_INT_ALL);
EMAC_IntMask(EMAC_INT_ALL, UNMASK);

4
drivers/bl702_driver/hal_drv/src/hal_gpio.c
View file

@ -83,7 +83,7 @@ void gpio_set_mode(uint32_t pin, uint32_t mode)
case GPIO_HZ_MODE:
GLB_GPIO_Set_HZ(pin);
default:
NVIC_DisableIRQ(GPIO_INT0_IRQn);
CPU_Interrupt_Disable(GPIO_INT0_IRQn);
GLB_GPIO_IntMask(pin, MASK);
gpio_cfg.gpioMode = GPIO_MODE_INPUT;
@ -134,7 +134,7 @@ void gpio_set_mode(uint32_t pin, uint32_t mode)
return;
}
NVIC_EnableIRQ(GPIO_INT0_IRQn);
CPU_Interrupt_Enable(GPIO_INT0_IRQn);
break;
}

4
drivers/bl702_driver/hal_drv/src/hal_keyscan.c
View file

@ -85,12 +85,12 @@ int keyscan_control(struct device *dev, int cmd, void *args)
Interrupt_Handler_Register(KYS_IRQn, KeyScan_IRQ);
#endif
BL_WR_REG(KYS_BASE, KYS_KS_INT_EN, 1);
NVIC_EnableIRQ(KYS_IRQn);
CPU_Interrupt_Enable(KYS_IRQn);
break;
case DEVICE_CTRL_CLR_INT /* constant-expression */:
Interrupt_Handler_Register(KYS_IRQn, NULL);
BL_WR_REG(KYS_BASE, KYS_KS_INT_EN, 0);
NVIC_DisableIRQ(KYS_IRQn);
CPU_Interrupt_Disable(KYS_IRQn);
break;
case DEVICE_CTRL_GET_INT:
return (BL_RD_REG(KYS_BASE, KYS_KS_INT_STS) & 0xf);

4
drivers/bl702_driver/hal_drv/src/hal_mtimer.c
View file

@ -42,7 +42,7 @@ static void Systick_Handler(void)
*/
void mtimer_set_alarm_time(uint64_t ticks, void (*interruptfun)(void))
{
NVIC_DisableIRQ(MTIME_IRQn);
CPU_Interrupt_Disable(MTIME_IRQn);
uint32_t ulCurrentTimeHigh, ulCurrentTimeLow;
volatile uint32_t *const pulTimeHigh = (volatile uint32_t *const)(CLIC_CTRL_ADDR + CLIC_MTIME + 4);
@ -71,7 +71,7 @@ void mtimer_set_alarm_time(uint64_t ticks, void (*interruptfun)(void))
next_compare_tick += (uint64_t)current_set_ticks;
Interrupt_Handler_Register(MTIME_IRQn, Systick_Handler);
NVIC_EnableIRQ(MTIME_IRQn);
CPU_Interrupt_Enable(MTIME_IRQn);
}
/**

4
drivers/bl702_driver/hal_drv/src/hal_pm.c
View file

@ -134,8 +134,8 @@ void pm_hbn_irq_register(void (*hbn_irq)(uint8_t event))
hbn_irq_callback = hbn_irq;
Interrupt_Handler_Register(HBN_OUT0_IRQn, HBN_OUT0_IRQ);
Interrupt_Handler_Register(HBN_OUT1_IRQn, HBN_OUT1_IRQ);
NVIC_EnableIRQ(HBN_OUT0_IRQn);
NVIC_EnableIRQ(HBN_OUT1_IRQn);
CPU_Interrupt_Enable(HBN_OUT0_IRQn);
CPU_Interrupt_Enable(HBN_OUT1_IRQn);
}
static void HBN_OUT0_IRQ(void)

9
drivers/bl702_driver/hal_drv/src/hal_power.c
View file

@ -32,7 +32,7 @@
#include "power_config.h"
#include "hal_power.h"
#define ALWAYS_DISABLE_AON_PAD_9 (0)
#define ALWAYS_DISABLE_AON_PAD_9 (0)
/**
* @brief gating peripheral clock for power saving
@ -1074,7 +1074,6 @@ static ATTR_TCM_SECTION void PDS_Power_On_Flash(PDS_APP_CFG_Type *cfg)
void ATTR_TCM_SECTION PDS_Mode_Enter(PDS_APP_CFG_Type *cfg)
{
PDS_DEFAULT_LV_CFG_Type *pPdsCfg = NULL;
uint32_t tmpVal = 0, tmpVal2 = 0;
if (cfg->useXtal32k) {
HBN_32K_Sel(HBN_32K_XTAL);
@ -1106,6 +1105,8 @@ void ATTR_TCM_SECTION PDS_Mode_Enter(PDS_APP_CFG_Type *cfg)
}
#if ALWAYS_DISABLE_AON_PAD_9
uint32_t tmpVal = 0, tmpVal2 = 0;
/* always disable and mask aon_pad_GPIO9, mask/unmask and ie_enable/ie_disable */
tmpVal = BL_RD_REG(HBN_BASE, HBN_IRQ_MODE);
tmpVal2 = BL_GET_REG_BITS_VAL(tmpVal, HBN_PIN_WAKEUP_MASK);
@ -1428,7 +1429,7 @@ int lp_enter_pds(uint32_t sleep_time, void (*preCbFun)(void), void (*postCbFun)(
HBN_Clear_IRQ(HBN_INT_GPIO13);
/* enable PDS interrupt to wakeup CPU (PDS1:CPU not powerdown, CPU __WFI) */
NVIC_EnableIRQ(PDS_WAKEUP_IRQn);
CPU_Interrupt_Enable(PDS_WAKEUP_IRQn);
/* clear and mask PDS int */
PDS_IntMask(PDS_INT_WAKEUP, UNMASK);
@ -1456,7 +1457,7 @@ int lp_enter_pds(uint32_t sleep_time, void (*preCbFun)(void), void (*postCbFun)(
*
* @note now default hbn level is hbn1
*/
int lp_enter_hbn(uint32_t sleepTime , uint8_t hbn_level)
int lp_enter_hbn(uint32_t sleepTime, uint8_t hbn_level)
{
HBN_APP_CFG_Type cfg = {
.useXtal32k = 0, /*!< Wheather use xtal 32K as 32K clock source,otherwise use rc32k */

6
drivers/bl702_driver/hal_drv/src/hal_pwm.c
View file

@ -76,7 +76,7 @@ int pwm_open(struct device *dev, uint16_t oflag)
BL_WR_REG(PWMx, PWM_INTERRUPT, BL_SET_REG_BITS_VAL(tmpVal, PWM_INT_PERIOD_CNT, pwm_device->it_pulse_count));
Interrupt_Handler_Register(PWM_IRQn, PWM_IRQ);
PWM_IntMask(pwm_device->ch, PWM_INT_PULSE_CNT, UNMASK);
NVIC_EnableIRQ(PWM_IRQn);
CPU_Interrupt_Enable(PWM_IRQn);
}
return 0;
@ -122,10 +122,10 @@ int pwm_control(struct device *dev, int cmd, void *args)
if ((uint32_t)args) {
PWM_IntMask(pwm_device->ch, PWM_INT_PULSE_CNT, UNMASK);
NVIC_EnableIRQ(PWM_IRQn);
CPU_Interrupt_Enable(PWM_IRQn);
} else {
PWM_IntMask(pwm_device->ch, PWM_INT_PULSE_CNT, MASK);
NVIC_DisableIRQ(PWM_IRQn);
CPU_Interrupt_Disable(PWM_IRQn);
}
break;

16
drivers/bl702_driver/hal_drv/src/hal_qdec.c
View file

@ -81,7 +81,7 @@ int qdec_open(struct device *dev, uint16_t oflag)
QDEC_SetIntMask(qdec_device->id, QDEC_INT_SAMPLE, MASK);
QDEC_SetIntMask(qdec_device->id, QDEC_INT_ERROR, MASK);
QDEC_SetIntMask(qdec_device->id, QDEC_INT_OVERFLOW, MASK);
// NVIC_EnableIRQ(QDEC1_IRQn);
// CPU_Interrupt_Enable(QDEC1_IRQn);
}
#endif
#ifdef BSP_USING_QDEC2
@ -91,7 +91,7 @@ int qdec_open(struct device *dev, uint16_t oflag)
QDEC_SetIntMask(qdec_device->id, QDEC_INT_SAMPLE, MASK);
QDEC_SetIntMask(qdec_device->id, QDEC_INT_ERROR, MASK);
QDEC_SetIntMask(qdec_device->id, QDEC_INT_OVERFLOW, MASK);
// NVIC_EnableIRQ(QDEC2_IRQn);
// CPU_Interrupt_Enable(QDEC2_IRQn);
}
#endif
}
@ -128,22 +128,22 @@ int qdec_control(struct device *dev, int cmd, void *args)
QDEC_SetIntMask(qdec_device->id, QDEC_INT_OVERFLOW, UNMASK);
}
if (qdec_device->id == QDEC0_ID) {
NVIC_EnableIRQ(QDEC0_IRQn);
CPU_Interrupt_Enable(QDEC0_IRQn);
} else if (qdec_device->id == QDEC1_ID) {
NVIC_EnableIRQ(QDEC1_IRQn);
CPU_Interrupt_Enable(QDEC1_IRQn);
} else if (qdec_device->id == QDEC2_ID) {
NVIC_EnableIRQ(QDEC2_IRQn);
CPU_Interrupt_Enable(QDEC2_IRQn);
}
break;
}
case DEVICE_CTRL_CLR_INT: {
if (qdec_device->id == QDEC0_ID) {
NVIC_DisableIRQ(QDEC0_IRQn);
CPU_Interrupt_Disable(QDEC0_IRQn);
} else if (qdec_device->id == QDEC1_ID) {
NVIC_DisableIRQ(QDEC1_IRQn);
CPU_Interrupt_Disable(QDEC1_IRQn);
} else if (qdec_device->id == QDEC2_ID) {
NVIC_DisableIRQ(QDEC2_IRQn);
CPU_Interrupt_Disable(QDEC2_IRQn);
}
break;
}

2
drivers/bl702_driver/hal_drv/src/hal_spi.c
View file

@ -54,7 +54,7 @@ int spi_open(struct device *dev, uint16_t oflag)
SPI_IntMask(spi_device->id, SPI_INT_ALL, MASK);
/* Enable uart interrupt*/
NVIC_DisableIRQ(SPI_IRQn);
CPU_Interrupt_Disable(SPI_IRQn);
SPI_Disable(spi_device->id, spi_device->mode);

8
drivers/bl702_driver/hal_drv/src/hal_timer.c
View file

@ -204,10 +204,10 @@ int timer_control(struct device *dev, int cmd, void *args)
if (timer_device->id == TIMER_CH0) {
NVIC_ClearPendingIRQ(TIMER_CH0_IRQn);
NVIC_EnableIRQ(TIMER_CH0_IRQn);
CPU_Interrupt_Enable(TIMER_CH0_IRQn);
} else if (timer_device->id == TIMER_CH1) {
NVIC_ClearPendingIRQ(TIMER_CH1_IRQn);
NVIC_EnableIRQ(TIMER_CH1_IRQn);
CPU_Interrupt_Enable(TIMER_CH1_IRQn);
}
break;
@ -223,9 +223,9 @@ int timer_control(struct device *dev, int cmd, void *args)
offset++;
}
if (timer_device->id == TIMER_CH0) {
NVIC_DisableIRQ(TIMER_CH0_IRQn);
CPU_Interrupt_Disable(TIMER_CH0_IRQn);
} else if (timer_device->id == TIMER_CH1) {
NVIC_DisableIRQ(TIMER_CH1_IRQn);
CPU_Interrupt_Disable(TIMER_CH1_IRQn);
}
break;
}

8
drivers/bl702_driver/hal_drv/src/hal_uart.c
View file

@ -151,9 +151,9 @@ int uart_control(struct device *dev, int cmd, void *args)
offset++;
}
if (uart_device->id == UART0_ID)
NVIC_EnableIRQ(UART0_IRQn);
CPU_Interrupt_Enable(UART0_IRQn);
else if (uart_device->id == UART1_ID)
NVIC_EnableIRQ(UART1_IRQn);
CPU_Interrupt_Enable(UART1_IRQn);
break;
}
@ -166,9 +166,9 @@ int uart_control(struct device *dev, int cmd, void *args)
offset++;
}
if (uart_device->id == UART0_ID)
NVIC_DisableIRQ(UART0_IRQn);
CPU_Interrupt_Disable(UART0_IRQn);
else if (uart_device->id == UART1_ID)
NVIC_DisableIRQ(UART1_IRQn);
CPU_Interrupt_Disable(UART1_IRQn);
break;
}

6
drivers/bl702_driver/hal_drv/src/hal_usb.c
View file

@ -214,7 +214,7 @@ int usb_open(struct device *dev, uint16_t oflag)
usb_xcvr_config(DISABLE);
usb_xcvr_config(ENABLE);
NVIC_DisableIRQ(USB_IRQn);
CPU_Interrupt_Disable(USB_IRQn);
usbCfg.DeviceAddress = 0;
usbCfg.EnumInEn = ENABLE;
@ -278,7 +278,7 @@ int usb_open(struct device *dev, uint16_t oflag)
USB_Clr_IntStatus(USB_INT_ALL);
Interrupt_Handler_Register(USB_IRQn, USB_FS_IRQ);
NVIC_EnableIRQ(USB_IRQn);
CPU_Interrupt_Enable(USB_IRQn);
USB_Enable();
return 0;
@ -292,7 +292,7 @@ int usb_open(struct device *dev, uint16_t oflag)
int usb_close(struct device *dev)
{
/* disable all interrupts and force USB reset */
NVIC_DisableIRQ(USB_IRQn);
CPU_Interrupt_Disable(USB_IRQn);
USB_IntMask(USB_INT_LPM_WAKEUP, MASK);
USB_IntMask(USB_INT_LPM_PACKET, MASK);

4
drivers/bl702_driver/risc-v/Core/Include/cmsis_compatible_gcc.h
View file

@ -120,9 +120,9 @@ extern void clic_disable_interrupt(uint32_t source);
extern void clic_set_pending(uint32_t source);
extern void clic_clear_pending(uint32_t source);
#define NVIC_EnableIRQ clic_enable_interrupt
#define CPU_Interrupt_Enable clic_enable_interrupt
#define NVIC_DisableIRQ clic_disable_interrupt
#define CPU_Interrupt_Disable clic_disable_interrupt
#define NVIC_ClearPendingIRQ clic_clear_pending

14
drivers/bl702_driver/std_drv/src/bl702_dma.c
View file

@ -476,7 +476,7 @@ BL_Err_Type DMA_LLI_PpStruct_Set_Transfer_Len(DMA_LLI_PP_Struct *dmaPpStruct, ui
*******************************************************************************/
void DMA_LLI_PpBuf_Start_New_Transmit(DMA_LLI_PP_Buf *dmaPpBuf)
{
NVIC_DisableIRQ(DMA_ALL_IRQn);
CPU_Interrupt_Disable(DMA_ALL_IRQn);
if (dmaPpBuf->lliListHeader[dmaPpBuf->idleIndex] != NULL) {
DMA_LLI_Update(dmaPpBuf->dmaChan, (uint32_t)dmaPpBuf->lliListHeader[dmaPpBuf->idleIndex]);
@ -484,7 +484,7 @@ void DMA_LLI_PpBuf_Start_New_Transmit(DMA_LLI_PP_Buf *dmaPpBuf)
dmaPpBuf->idleIndex = (dmaPpBuf->idleIndex == 0) ? 1 : 0;
}
NVIC_EnableIRQ(DMA_ALL_IRQn);
CPU_Interrupt_Enable(DMA_ALL_IRQn);
}
/****************************************************************************/ /**
@ -497,10 +497,10 @@ void DMA_LLI_PpBuf_Start_New_Transmit(DMA_LLI_PP_Buf *dmaPpBuf)
*******************************************************************************/
DMA_LLI_Ctrl_Type *DMA_LLI_PpBuf_Remove_Completed_List(DMA_LLI_PP_Buf *dmaPpBuf)
{
NVIC_DisableIRQ(DMA_ALL_IRQn);
CPU_Interrupt_Disable(DMA_ALL_IRQn);
dmaPpBuf->lliListHeader[!dmaPpBuf->idleIndex] = NULL;
NVIC_EnableIRQ(DMA_ALL_IRQn);
CPU_Interrupt_Enable(DMA_ALL_IRQn);
return dmaPpBuf->lliListHeader[!dmaPpBuf->idleIndex];
}
@ -516,7 +516,7 @@ DMA_LLI_Ctrl_Type *DMA_LLI_PpBuf_Remove_Completed_List(DMA_LLI_PP_Buf *dmaPpBuf)
void DMA_LLI_PpBuf_Append(DMA_LLI_PP_Buf *dmaPpBuf, DMA_LLI_Ctrl_Type *dmaLliList)
{
DMA_LLI_Ctrl_Type *pLliList = NULL;
NVIC_DisableIRQ(DMA_ALL_IRQn);
CPU_Interrupt_Disable(DMA_ALL_IRQn);
pLliList = dmaPpBuf->lliListHeader[dmaPpBuf->idleIndex];
@ -537,7 +537,7 @@ void DMA_LLI_PpBuf_Append(DMA_LLI_PP_Buf *dmaPpBuf, DMA_LLI_Ctrl_Type *dmaLliLis
}
if (DMA_Channel_Is_Busy(dmaPpBuf->dmaChan) == RESET) {
/* DMA stopped: maybe stop just a few minutes ago(not enter INT due to NVIC_DisableIRQ)
/* DMA stopped: maybe stop just a few minutes ago(not enter INT due to CPU_Interrupt_Disable)
or has already stopped before this function is called */
if (dmaPpBuf->lliListHeader[!dmaPpBuf->idleIndex] == NULL) {
/* DMA has already stopped before this function is called */
@ -545,7 +545,7 @@ void DMA_LLI_PpBuf_Append(DMA_LLI_PP_Buf *dmaPpBuf, DMA_LLI_Ctrl_Type *dmaLliLis
}
}
NVIC_EnableIRQ(DMA_ALL_IRQn);
CPU_Interrupt_Enable(DMA_ALL_IRQn);
}
/****************************************************************************/ /**

2
examples/camera/camera_interleave_pbuf/main.c
View file

@ -192,7 +192,7 @@ int ATTR_TCM_SECTION main(void)
CAM_IntMask(CAM_INT_ALL, MASK);
CAM_Int_Callback_set(CAM_INT_NORMAL_0, &CAM_Interrupt_Normal);
CAM_IntMask(CAM_INT_NORMAL_0, UNMASK);
NVIC_EnableIRQ(CAM_IRQn);
CPU_Interrupt_Enable(CAM_IRQn);
System_NVIC_SetPriority(CAM_IRQn, 4, 1);
if (SUCCESS != image_sensor_init(DISABLE, &camera_cfg, &mjpeg_cfg)) {