[feat][global_irq] add nesting for global irq enable and disable

common/misc/misc.h

@@ -88,14 +88,20 @@
 
 #define BIT(x) (1 << (x))
 
+static uint8_t nesting = 0;
+
 __attribute__((always_inline)) __STATIC_INLINE__ void enable_irq(void)
 {
-    __ASM__ volatile("csrsi mstatus, 8");
+    nesting--;
+    if (nesting == 0) {
+        __ASM__ volatile("csrsi mstatus, 8");
+    }
 }
 
 __attribute__((always_inline)) __STATIC_INLINE__ void disable_irq(void)
 {
     __ASM__ volatile("csrci mstatus, 8");
+    nesting++;
 }
 
 /**

drivers/bl602_driver/risc-v/Core/Include/cmsis_compatible_gcc.h

@@ -82,14 +82,20 @@
 //}
 #define __SEV() __ASM volatile("sev") /* This implementation generates debug information */
 
+static uint8_t nesting2 = 0;
+
 __attribute__((always_inline)) __STATIC_INLINE void __enable_irq(void)
 {
-    __ASM volatile("csrsi mstatus, 8");
+    nesting2--;
+    if (nesting2 == 0) {
+        __ASM volatile("csrsi mstatus, 8");
+    }
 }
 
 __attribute__((always_inline)) __STATIC_INLINE void __disable_irq(void)
 {
     __ASM volatile("csrci mstatus, 8");
+    nesting2++;
 }
 
 __attribute__((always_inline)) __STATIC_INLINE uint32_t __REV(uint32_t value)

drivers/bl602_driver/startup/system_bl602.c

@@ -30,6 +30,11 @@ void SystemInit(void)
     uint32_t i = 0;
     uint32_t tmpVal = 0;
 
+<<<<<<< HEAD
+=======
+    __disable_irq();
+
+>>>>>>> [feat][global_irq] add nesting for global irq enable and disable
     /* disable hardware_pullup_pull_down (reg_en_hw_pu_pd = 0) */
     tmpVal = BL_RD_REG(HBN_BASE, HBN_IRQ_MODE);
     tmpVal = BL_CLR_REG_BIT(tmpVal, HBN_REG_EN_HW_PU_PD);
@@ -71,14 +76,12 @@ void SystemInit(void)
         p[i] = 0;
     }
 
-    /* global IRQ enable */
-    __enable_irq();
-
     /* init bor for all platform */
     system_bor_init();
+    /* global IRQ enable */
+    __enable_irq();
 }
 
 void System_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
 {
-
 }

drivers/bl702_driver/risc-v/Core/Include/cmsis_compatible_gcc.h

@@ -82,14 +82,20 @@
 //}
 #define __SEV() __ASM volatile("sev") /* This implementation generates debug information */
 
+static uint8_t nesting2 = 0;
+
 __attribute__((always_inline)) __STATIC_INLINE void __enable_irq(void)
 {
-    __ASM volatile("csrsi mstatus, 8");
+    nesting2--;
+    if (nesting2 == 0) {
+        __ASM volatile("csrsi mstatus, 8");
+    }
 }
 
 __attribute__((always_inline)) __STATIC_INLINE void __disable_irq(void)
 {
     __ASM volatile("csrci mstatus, 8");
+    nesting2++;
 }
 
 __attribute__((always_inline)) __STATIC_INLINE uint32_t __REV(uint32_t value)

drivers/bl702_driver/startup/system_bl702.c

@@ -52,7 +52,7 @@ void USB_DoNothing_IRQHandler(void)
 
 void system_bor_init(void)
 {
-    HBN_BOR_CFG_Type borCfg = { 1 /* pu_bor */, 0 /* irq_bor_en */, 1 /* bor_vth */, 1 /* bor_sel */ };
+    HBN_BOR_CFG_Type borCfg = { 0 /* pu_bor */, 0 /* irq_bor_en */, 1 /* bor_vth */, 0 /* bor_sel */ };
     HBN_Set_BOR_Cfg(&borCfg);
 }
 
@@ -66,6 +66,9 @@ void SystemInit(void)
     uint8_t isInternalFlash = 0;
     uint8_t isInternalPsram = 0;
 
+    /* global IRQ disable */
+    __disable_irq();
+
     /* disable hardware_pullup_pull_down (reg_en_hw_pu_pd = 0) */
     tmpVal = BL_RD_REG(HBN_BASE, HBN_IRQ_MODE);
     tmpVal = BL_CLR_REG_BIT(tmpVal, HBN_REG_EN_HW_PU_PD);
@@ -110,9 +113,9 @@ void SystemInit(void)
 
     /* SF io select from efuse value */
     tmpVal = BL_RD_WORD(0x40007074);
-    flashCfg = ((tmpVal>>26)&7);
+    flashCfg = ((tmpVal >> 26) & 7);
-    psramCfg = ((tmpVal>>24)&3);
+    psramCfg = ((tmpVal >> 24) & 3);
-    if (flashCfg==1 || flashCfg==2) {
+    if (flashCfg == 1 || flashCfg == 2) {
         isInternalFlash = 1;
     } else {
         isInternalFlash = 0;
@@ -123,9 +126,9 @@ void SystemInit(void)
         isInternalPsram = 0;
     }
     tmpVal = BL_RD_REG(GLB_BASE, GLB_GPIO_USE_PSRAM__IO);
-    if(isInternalFlash==1 && isInternalPsram==0){
+    if (isInternalFlash == 1 && isInternalPsram == 0) {
         tmpVal = BL_SET_REG_BITS_VAL(tmpVal, GLB_CFG_GPIO_USE_PSRAM_IO, 0x3f);
-    }else{
+    } else {
         tmpVal = BL_SET_REG_BITS_VAL(tmpVal, GLB_CFG_GPIO_USE_PSRAM_IO, 0x00);
     }
     BL_WR_REG(GLB_BASE, GLB_GPIO_USE_PSRAM__IO, tmpVal);
@@ -133,18 +136,12 @@ void SystemInit(void)
 #ifdef BFLB_EFLASH_LOADER
     Interrupt_Handler_Register(USB_IRQn, USB_DoNothing_IRQHandler);
 #endif
-
-    /* global IRQ enable */
-    __enable_irq();
-
     /* init bor for all platform */
     system_bor_init();
-
+    /* global IRQ enable */
-    /* release 64K OCARAM for appliction */
+    __enable_irq();
-    GLB_Set_EM_Sel(GLB_EM_0KB);
 }
 
 void System_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
 {
-    
 }