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[feat][wakeup] add gpio wakeup config process

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This commit is contained in:
jzlv 2021-08-07 18:49:21 +08:00
parent 6bfe2a9b1b
commit 2d438d8ce0
2 changed files with 63 additions and 7 deletions
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51
bsp/board/bl702/board.c
View file

@ -165,10 +165,18 @@ static const struct pin_mux_cfg af_pin_table[] = {
static void board_pin_mux_init(void)
{
GLB_GPIO_Cfg_Type gpio_cfg;
uint32_t tmpVal;
gpio_cfg.drive = 0;
gpio_cfg.smtCtrl = 1;
/*disable wakeup irq and aon ie*/
tmpVal = BL_RD_REG(HBN_BASE, HBN_IRQ_MODE);
tmpVal = BL_SET_REG_BITS_VAL(tmpVal, HBN_PIN_WAKEUP_MASK, 0x1f);
tmpVal = BL_SET_REG_BITS_VAL(tmpVal, HBN_REG_AON_PAD_IE_SMT, 0);
tmpVal = BL_CLR_REG_BIT(tmpVal, HBN_REG_EN_HW_PU_PD);
tmpVal = BL_SET_REG_BITS_VAL(tmpVal, HBN_PIN_WAKEUP_MODE, HBN_GPIO_INT_TRIGGER_ASYNC_FALLING_EDGE);
BL_WR_REG(HBN_BASE, HBN_IRQ_MODE, tmpVal);
for (int i = 0; i < sizeof(af_pin_table) / sizeof(af_pin_table[0]); i++) {
gpio_cfg.gpioMode = GPIO_MODE_AF;
gpio_cfg.pullType = GPIO_PULL_UP;
@ -178,6 +186,43 @@ static void board_pin_mux_init(void)
/*if reset state*/
if (af_pin_table[i].func == GPIO_FUN_UNUSED) {
continue;
} else if (af_pin_table[i].func == GPIO_FUN_WAKEUP) {
/*if gpio wakeup func*/
if (af_pin_table[i].pin == GPIO_PIN_9) {
HBN_Clear_IRQ(HBN_INT_GPIO9);
/*enable gpio9 wakeup and irq unmask*/
tmpVal = BL_RD_REG(HBN_BASE, HBN_IRQ_MODE);
tmpVal &= ~(1 << 3); //gpio9 unmask
tmpVal |= (1 << 8); //gpio9 ie smt
BL_WR_REG(HBN_BASE, HBN_IRQ_MODE, tmpVal);
} else if (af_pin_table[i].pin == GPIO_PIN_10) {
HBN_Clear_IRQ(HBN_INT_GPIO10);
/*enable gpio10 wakeup and irq unmask*/
tmpVal = BL_RD_REG(HBN_BASE, HBN_IRQ_MODE);
tmpVal &= ~(1 << 4); //gpio10 unmask
tmpVal |= (1 << 9); //gpio10 ie smt
BL_WR_REG(HBN_BASE, HBN_IRQ_MODE, tmpVal);
} else if (af_pin_table[i].pin == GPIO_PIN_11) {
HBN_Clear_IRQ(HBN_INT_GPIO11);
/*enable gpio11 wakeup and irq unmask*/
tmpVal = BL_RD_REG(HBN_BASE, HBN_IRQ_MODE);
tmpVal &= ~(1 << 5); //gpio11 unmask
tmpVal |= (1 << 10); //gpio11 ie smt
BL_WR_REG(HBN_BASE, HBN_IRQ_MODE, tmpVal);
} else if (af_pin_table[i].pin == GPIO_PIN_12) {
HBN_Clear_IRQ(HBN_INT_GPIO12);
/*enable gpio12 wakeup and irq unmask*/
tmpVal = BL_RD_REG(HBN_BASE, HBN_IRQ_MODE);
tmpVal &= ~(1 << 6); //gpio12 unmask
tmpVal |= (1 << 11); //gpio12 ie smt
BL_WR_REG(HBN_BASE, HBN_IRQ_MODE, tmpVal);
}
continue;
} else if (af_pin_table[i].func == GPIO_FUN_PWM) {
/*if pwm func*/
gpio_cfg.pullType = GPIO_PULL_DOWN;
@ -270,8 +315,8 @@ void bl_show_info(void)
MSG("Copyright (c) 2021 Bouffalolab team\r\n");
#if 0
MSG("root clock:%dM\r\n", system_clock_get(SYSTEM_CLOCK_ROOT_CLOCK) / 1000000);
MSG("fclk clock:%dM\r\n", system_clock_get(SYSTEM_CLOCK_FCLK) / 1000000);
MSG("root clock:%dM\r\n", system_clock_get(SYSTEM_CLOCK_ROOT_CLOCK) / 1000000);/*root clock before f_div*/
MSG("fclk clock:%dM\r\n", system_clock_get(SYSTEM_CLOCK_FCLK) / 1000000);/*after f_div,this is system core clock*/
MSG("bclk clock:%dM\r\n", system_clock_get(SYSTEM_CLOCK_BCLK) / 1000000);
MSG("uart clock:%dM\r\n", peripheral_clock_get(PERIPHERAL_CLOCK_UART) / 1000000);

19
drivers/bl702_driver/hal_drv/src/hal_pm.c
View file

@ -51,13 +51,24 @@ ATTR_TCM_SECTION void pm_hbn_mode_enter(enum pm_hbn_sleep_level hbn_level)
__disable_irq();
for (GLB_GPIO_Type pin = GLB_GPIO_PIN_0; pin < GLB_GPIO_PIN_MAX; pin++) {
if (pin == GLB_GPIO_PIN_10 || pin == GLB_GPIO_PIN_11 || pin == GLB_GPIO_PIN_12)
continue;
if ((pin >= GLB_GPIO_PIN_9) && (pin <= GLB_GPIO_PIN_13)) {
tmpVal = BL_RD_REG(HBN_BASE, HBN_IRQ_MODE);
if (tmpVal & (1 << (pin - 1))) {
continue;
}
}
GLB_GPIO_Set_HZ(pin);
}
HBN_Clear_IRQ(HBN_INT_GPIO9);
HBN_Clear_IRQ(HBN_INT_GPIO13);
/* set clear bit */
tmpVal = BL_RD_REG(HBN_BASE, HBN_IRQ_CLR);
tmpVal |= (0x10 << 0);
BL_WR_REG(HBN_BASE, HBN_IRQ_CLR, tmpVal);
/* unset clear bit */
tmpVal = BL_RD_REG(HBN_BASE, HBN_IRQ_CLR);
tmpVal &= (~(0x10 << 0));
BL_WR_REG(HBN_BASE, HBN_IRQ_CLR, tmpVal);
if (hbn_level >= PM_HBN_LEVEL_2)
HBN_Power_Off_RC32K();