[sync] sync from internal repo

* use nuttx libc, disable system libc
* use tlsf as default
* update lhal flash driver
* add example readme
* add flash ini for new flash tool
* add fw header for new flash tool
This commit is contained in:
jzlv 2023-01-17 20:54:15 +08:00
parent 89592fc9a3
commit 356f258e83
554 changed files with 79150 additions and 46596 deletions

View file

@ -0,0 +1,44 @@
# flash_dma
## Support CHIP
| CHIP | Remark |
|:----------------:|:------:|
|BL602/BL604 | |
|BL702/BL704/BL706 | |
|BL616/BL618 | |
|BL808 | |
## Compile
- BL602/BL604
```
make CHIP=bl602 BOARD=bl602dk
```
- BL702/BL704/BL706
```
make CHIP=bl702 BOARD=bl702dk
```
- BL616/BL618
```
make CHIP=bl616 BOARD=bl616dk
```
- BL808
```
make CHIP=bl808 BOARD=bl808dk CPU_ID=m0
make CHIP=bl808 BOARD=bl808dk CPU_ID=d0
```
## Flash
```
make flash CHIP=chip_name COMX=xxx # xxx is your com name
```

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@ -0,0 +1,11 @@
[cfg]
# 0: no erase, 1:programmed section erase, 2: chip erase
erase = 1
# skip mode set first para is skip addr, second para is skip len, multi-segment region with ; separated
skip_mode = 0x0, 0x0
# 0: not use isp mode, #1: isp mode
boot2_isp_mode = 0
[FW]
filedir = ./build/build_out/flash*_$(CHIPNAME).bin
address = 0x000000

View file

@ -2,10 +2,16 @@
#include "bflb_dma.h"
#include "board.h"
#define FLASH_RW_START_ADDR 0x10000
#define DMA_FLASH_ADDR_OFFSET 28 /* 0 or 28 for unaligned case */
#define DMA_BUFFER_LENGTH 260
#define DMA_FLASH_ADDR_OFFSET 0 /* 0 or 28 */
static ATTR_NOCACHE_NOINIT_RAM_SECTION uint8_t dst_buffer[DMA_BUFFER_LENGTH];
static uint8_t write_buf[DMA_BUFFER_LENGTH];
static uint8_t dma_tc_flag0 = 0;
struct bflb_device_s *dma0_ch0;
static uint64_t start_time;
static uint8_t src_burst[] = {
DMA_BURST_INCR1,
@ -67,12 +73,6 @@ static uint8_t dst_width[] = {
DMA_DATA_WIDTH_32BIT,
};
static uint8_t dma_tc_flag0 = 0;
struct bflb_device_s *dma0_ch0;
volatile uint64_t start_time;
void dma0_ch0_isr(void *arg)
{
printf("cost time:%d us\r\n", (uint32_t)(bflb_mtimer_get_time_us() - start_time));
@ -83,18 +83,15 @@ void dma0_ch0_isr(void *arg)
int main(void)
{
board_init();
uint8_t write_buf[DMA_BUFFER_LENGTH];
for (uint16_t i = 0; i < DMA_BUFFER_LENGTH; i++) {
write_buf[i] = (i & 0xff) + i / 256;
}
/* erase 0x00010000 4k flash */
bflb_flash_erase(0x00010000, 4096);
/* erase flash */
bflb_flash_erase(FLASH_RW_START_ADDR, 4096);
/* write 0x00010000 flash data */
bflb_flash_write(0x00010000, write_buf, sizeof(write_buf)); /* FLASH_XIP_BASE - 0x2000 + 0x00010000 */
/* write flash data */
bflb_flash_write(FLASH_RW_START_ADDR, write_buf, sizeof(write_buf)); /* FLASH_XIP_BASE - 0x2000 + 0x00010000 */
dma0_ch0 = bflb_device_get_by_name("dma0_ch0");
@ -120,7 +117,7 @@ int main(void)
struct bflb_dma_channel_lli_pool_s lli[1]; /* max trasnfer size 4064 * 1 */
struct bflb_dma_channel_lli_transfer_s transfers[1];
transfers[0].src_addr = (uint32_t)(FLASH_XIP_BASE - bflb_flash_get_image_offset() + 0x00010000 + DMA_FLASH_ADDR_OFFSET);
transfers[0].src_addr = (uint32_t)(FLASH_XIP_BASE - bflb_flash_get_image_offset() + FLASH_RW_START_ADDR + DMA_FLASH_ADDR_OFFSET);
transfers[0].dst_addr = (uint32_t)dst_buffer;
transfers[0].nbytes = DMA_BUFFER_LENGTH - DMA_FLASH_ADDR_OFFSET;
@ -141,7 +138,7 @@ int main(void)
}
}
printf("flash test success\r\n");
printf("flash dam case success\r\n");
while (1) {
}
}