mirror of
https://github.com/Fishwaldo/bl_mcu_sdk.git
synced 2025-07-06 12:58:45 +00:00
[update][wdg] update wdg demo
This commit is contained in:
parent
d075071312
commit
39fc0d73c8
13 changed files with 161 additions and 64 deletions
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@ -19,6 +19,7 @@
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#define TIMER_COMP_ID_0 0
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#define TIMER_COMP_ID_0 0
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#define TIMER_COMP_ID_1 1
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#define TIMER_COMP_ID_1 1
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#define TIMER_COMP_ID_2 2
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#define TIMER_COMP_ID_2 2
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#define TIMER_COMP_NONE 3
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/**
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/**
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* @}
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* @}
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*/
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*/
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@ -4,17 +4,28 @@
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#include "bflb_core.h"
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#include "bflb_core.h"
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#include "bflb_clock.h"
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#include "bflb_clock.h"
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/** @defgroup WDG_MODE Watch-dog reset/interrupt mode definition
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* @{
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*/
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#define WDG_MODE_INTERRUPT 0
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#define WDG_MODE_RESET 1
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/**
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* @}
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*/
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/**
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/**
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* @brief WDG configuration structure
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* @brief WDG configuration structure
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*
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*
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* @param clock_source Wdg clock source, use BFLB_SYSTEM_* definition
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* @param clock_source Wdg clock source, use BFLB_SYSTEM_* definition
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* @param clock_div Wdg clock divison value, from 0 to 255
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* @param clock_div Wdg clock divison value, from 0 to 255
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* @param comp_val Wdg compare value
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* @param comp_val Wdg compare value
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* @param mode Wdg reset/interrupt mode
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*/
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*/
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struct bflb_wdg_config_s {
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struct bflb_wdg_config_s {
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uint8_t clock_source;
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uint8_t clock_source;
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uint8_t clock_div;
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uint8_t clock_div;
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uint16_t comp_val;
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uint16_t comp_val;
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uint8_t mode;
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};
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};
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#ifdef __cplusplus
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#ifdef __cplusplus
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@ -9,6 +9,11 @@ void bflb_timer_init(struct bflb_device_s *dev, const struct bflb_timer_config_s
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reg_base = dev->reg_base;
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reg_base = dev->reg_base;
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/* Disable timer */
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regval = getreg32(reg_base + TIMER_TCER_OFFSET);
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regval &= ~(1 << (dev->idx + 1));
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putreg32(regval, reg_base + TIMER_TCER_OFFSET);
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/* Configure clock source */
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/* Configure clock source */
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if (config->clock_source == BFLB_SYSTEM_CPU_CLK) {
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if (config->clock_source == BFLB_SYSTEM_CPU_CLK) {
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clk_source = 0;
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clk_source = 0;
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@ -16,7 +21,7 @@ void bflb_timer_init(struct bflb_device_s *dev, const struct bflb_timer_config_s
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clk_source = 3;
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clk_source = 3;
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} else if (config->clock_source == BFLB_SYSTEM_32K_CLK) {
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} else if (config->clock_source == BFLB_SYSTEM_32K_CLK) {
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clk_source = 1;
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clk_source = 1;
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} else if (config->clock_source == BFLB_SYSTEM_1K_CLK){
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} else if (config->clock_source == BFLB_SYSTEM_1K_CLK) {
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clk_source = 2;
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clk_source = 2;
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}
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}
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@ -48,7 +53,9 @@ void bflb_timer_init(struct bflb_device_s *dev, const struct bflb_timer_config_s
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/* Configure preload trigger source */
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/* Configure preload trigger source */
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regval = getreg32(reg_base + TIMER_TPLCR0_OFFSET + 4 * dev->idx);
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regval = getreg32(reg_base + TIMER_TPLCR0_OFFSET + 4 * dev->idx);
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regval &= ~TIMER_TPLCR0_MASK;
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regval &= ~TIMER_TPLCR0_MASK;
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regval |= ((config->trigger_comp_id + 1) << TIMER_TPLCR0_SHIFT);
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if (config->trigger_comp_id != TIMER_COMP_NONE) {
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regval |= ((config->trigger_comp_id + 1) << TIMER_TPLCR0_SHIFT);
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}
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putreg32(regval, reg_base + TIMER_TPLCR0_OFFSET + 4 * dev->idx);
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putreg32(regval, reg_base + TIMER_TPLCR0_OFFSET + 4 * dev->idx);
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if (config->counter_mode == TIMER_COUNTER_MODE_PROLOAD) {
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if (config->counter_mode == TIMER_COUNTER_MODE_PROLOAD) {
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@ -164,9 +171,9 @@ bool bflb_timer_get_compint_status(struct bflb_device_s *dev, uint8_t cmp_no)
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if (regval & (1 << cmp_no)) {
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if (regval & (1 << cmp_no)) {
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return true;
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return true;
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} else {
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return false;
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}
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}
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return false;
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}
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}
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void bflb_timer_compint_clear(struct bflb_device_s *dev, uint8_t cmp_no)
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void bflb_timer_compint_clear(struct bflb_device_s *dev, uint8_t cmp_no)
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@ -15,7 +15,11 @@ void bflb_wdg_init(struct bflb_device_s *dev, const struct bflb_wdg_config_s *co
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regval = getreg32(reg_base + TIMER_WMER_OFFSET);
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regval = getreg32(reg_base + TIMER_WMER_OFFSET);
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regval &= ~TIMER_WE;
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regval &= ~TIMER_WE;
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regval &= ~TIMER_WRIE;
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if (config->mode == WDG_MODE_INTERRUPT) {
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regval &= ~TIMER_WRIE;
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} else {
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regval |= TIMER_WRIE;
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}
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putreg32(regval, reg_base + TIMER_WMER_OFFSET);
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putreg32(regval, reg_base + TIMER_WMER_OFFSET);
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/* Configure clock source */
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/* Configure clock source */
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@ -72,7 +76,6 @@ void bflb_wdg_stop(struct bflb_device_s *dev)
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regval = getreg32(reg_base + TIMER_WMER_OFFSET);
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regval = getreg32(reg_base + TIMER_WMER_OFFSET);
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regval &= ~TIMER_WE;
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regval &= ~TIMER_WE;
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regval &= ~TIMER_WRIE;
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putreg32(regval, reg_base + TIMER_WMER_OFFSET);
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putreg32(regval, reg_base + TIMER_WMER_OFFSET);
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}
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}
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@ -1,55 +0,0 @@
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#include "bflb_mtimer.h"
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#include "bflb_wdg.h"
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#include "board.h"
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struct bflb_device_s *wdt;
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static volatile uint8_t wdt_int_arrived = 0;
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void wdt_isr(int irq, void *arg)
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{
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wdt_int_arrived = 1;
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bflb_wdg_compint_clear(wdt);
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}
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int main(void)
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{
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board_init();
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printf("Timer watchdog interrupt test\r\n");
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struct bflb_wdg_config_s wdt_cfg;
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wdt_cfg.clock_source = BFLB_SYSTEM_32K_CLK;
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wdt_cfg.clock_div = 0;
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wdt_cfg.comp_val = 64000;
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wdt = bflb_device_get_by_name("watchdog");
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bflb_wdg_init(wdt, &wdt_cfg);
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bflb_irq_attach(wdt->irq_num, wdt_isr, wdt);
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bflb_irq_enable(wdt->irq_num);
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wdt_int_arrived = 0;
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bflb_wdg_start(wdt);
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/* delay 1s and wdt interrupt should not trigger. */
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bflb_mtimer_delay_ms(1000);
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bflb_wdg_reset_countervalue(wdt);
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if (wdt_int_arrived) {
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printf("Error! Delay 1s, WDT interrupt should not arrive\r\n");
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bflb_wdg_stop(wdt);
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}
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/* delay 2s will trigger WDT interrupt */
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bflb_mtimer_delay_ms(2000);
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bflb_wdg_reset_countervalue(wdt);
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if (wdt_int_arrived) {
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printf("Delay 2s, WDT interrupt arrived\r\n");
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} else {
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printf("Error! Delay 2s, WDT interrupt should arrive\r\n");
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printf("get wdt cnt = %d\r\n", bflb_wdg_get_countervalue(wdt));
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}
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bflb_wdg_stop(wdt);
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while (1) {
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bflb_mtimer_delay_ms(1500);
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}
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}
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@ -6,4 +6,4 @@ find_package(bouffalo_sdk REQUIRED HINTS $ENV{BL_SDK_BASE})
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sdk_set_main_file(main.c)
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sdk_set_main_file(main.c)
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project(wdg)
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project(wdg_int)
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@ -1,5 +1,5 @@
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SDK_DEMO_PATH ?= .
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SDK_DEMO_PATH ?= .
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BL_SDK_BASE ?= $(SDK_DEMO_PATH)/../../..
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BL_SDK_BASE ?= $(SDK_DEMO_PATH)/../../../..
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export BL_SDK_BASE
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export BL_SDK_BASE
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57
examples/peripherals/wdg/wdg_int/main.c
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57
examples/peripherals/wdg/wdg_int/main.c
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@ -0,0 +1,57 @@
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#include "bflb_mtimer.h"
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#include "bflb_wdg.h"
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#include "board.h"
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struct bflb_device_s *wdg;
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static volatile uint8_t wdg_int_arrived = 0;
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void wdg_isr(int irq, void *arg)
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{
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wdg_int_arrived = 1;
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bflb_wdg_compint_clear(wdg);
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}
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int main(void)
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{
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board_init();
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printf("Watchdog interrupt test\r\n");
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struct bflb_wdg_config_s wdg_cfg;
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wdg_cfg.clock_source = BFLB_SYSTEM_32K_CLK;
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wdg_cfg.clock_div = 0;
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wdg_cfg.comp_val = 64000;
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wdg_cfg.mode = WDG_MODE_INTERRUPT;
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wdg = bflb_device_get_by_name("watchdog");
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bflb_wdg_init(wdg, &wdg_cfg);
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bflb_irq_attach(wdg->irq_num, wdg_isr, wdg);
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bflb_irq_enable(wdg->irq_num);
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wdg_int_arrived = 0;
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bflb_wdg_start(wdg);
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/* delay 1s and wdg interrupt should not trigger. */
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bflb_mtimer_delay_ms(1000);
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bflb_wdg_reset_countervalue(wdg);
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if (wdg_int_arrived) {
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printf("Error! Delay 1s, wdg interrupt should not arrive\r\n");
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bflb_wdg_stop(wdg);
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} else {
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printf("Delay 1s, wdg interrupt not arrive, pass\r\n");
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}
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/* delay 2s will trigger wdg interrupt */
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bflb_mtimer_delay_ms(2000);
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bflb_wdg_reset_countervalue(wdg);
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if (wdg_int_arrived) {
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printf("Delay 2s, wdg interrupt arrived, pass\r\n");
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} else {
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printf("Error! Delay 2s, wdg interrupt not arrived, count = %d\r\n",
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bflb_wdg_get_countervalue(wdg));
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}
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bflb_wdg_stop(wdg);
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while (1) {
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bflb_mtimer_delay_ms(1500);
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}
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}
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9
examples/peripherals/wdg/wdg_reset/CMakeLists.txt
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9
examples/peripherals/wdg/wdg_reset/CMakeLists.txt
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@ -0,0 +1,9 @@
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cmake_minimum_required(VERSION 3.15)
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include(proj.conf)
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find_package(bouffalo_sdk REQUIRED HINTS $ENV{BL_SDK_BASE})
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sdk_set_main_file(main.c)
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project(wdg_reset)
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13
examples/peripherals/wdg/wdg_reset/Makefile
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13
examples/peripherals/wdg/wdg_reset/Makefile
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SDK_DEMO_PATH ?= .
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BL_SDK_BASE ?= $(SDK_DEMO_PATH)/../../../..
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export BL_SDK_BASE
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CHIP ?= bl616
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BOARD ?= bl616dk
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CROSS_COMPILE ?= riscv64-unknown-elf-
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# add custom cmake definition
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#cmake_definition+=-Dxxx=sss
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include $(BL_SDK_BASE)/project.build
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50
examples/peripherals/wdg/wdg_reset/main.c
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50
examples/peripherals/wdg/wdg_reset/main.c
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#include "bflb_mtimer.h"
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#include "bflb_wdg.h"
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#include "board.h"
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struct bflb_device_s *wdg;
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static volatile uint8_t wdg_int_arrived = 0;
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int main(void)
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{
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board_init();
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printf("Watchdog interrupt test\r\n");
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struct bflb_wdg_config_s wdg_cfg;
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wdg_cfg.clock_source = BFLB_SYSTEM_32K_CLK;
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wdg_cfg.clock_div = 0;
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wdg_cfg.comp_val = 64000;
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wdg_cfg.mode = WDG_MODE_RESET;
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wdg = bflb_device_get_by_name("watchdog");
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bflb_wdg_init(wdg, &wdg_cfg);
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wdg_int_arrived = 0;
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bflb_wdg_start(wdg);
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/* delay 1s and wdg interrupt should not trigger. */
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bflb_mtimer_delay_ms(1000);
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bflb_wdg_reset_countervalue(wdg);
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if (wdg_int_arrived) {
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printf("Error! Delay 1s, wdg not reset.\r\n");
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bflb_wdg_stop(wdg);
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} else {
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printf("Delay 1s, wdg interrupt not arrive, pass\r\n");
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}
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printf("Next delay 2s, wdg will reset it.");
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/* delay 2s will trigger wdg interrupt */
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bflb_mtimer_delay_ms(2000);
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bflb_wdg_reset_countervalue(wdg);
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if (wdg_int_arrived) {
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printf("Delay 2s, wdg reset, pass\r\n");
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} else {
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printf("Error! Delay 2s, wdg not reset, count = %d\r\n",
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bflb_wdg_get_countervalue(wdg));
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}
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bflb_wdg_stop(wdg);
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while (1) {
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bflb_mtimer_delay_ms(1500);
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}
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}
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1
examples/peripherals/wdg/wdg_reset/proj.conf
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1
examples/peripherals/wdg/wdg_reset/proj.conf
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@ -0,0 +1 @@
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#set(CONFIG_XXX 1)
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