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[update][lhal] update gpio, dbi, mjpeg api

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This commit is contained in:
jzlv 2023-03-06 10:55:17 +08:00
parent eb7afedb20
commit 424f8530a0
5 changed files with 49 additions and 89 deletions
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3
drivers/lhal/include/bflb_i2s.h
View file

@ -75,6 +75,9 @@
#define I2S_CMD_CHANNEL_LR_EXCHG (0x06)
#define I2S_CMD_MUTE (0x07)
#define I2S_CMD_BIT_REVERSE (0x08)
/**
* @}
*/
/** @defgroup I2S_CMD_DATA_ENABLE_TYPE i2s data enable type
* @{

16
drivers/lhal/include/bflb_mjpeg.h
View file

@ -30,7 +30,7 @@
/** @defgroup MJPEG_INTSTS mjpeg interrupt status definition
* @{
*/
#define MJPEG_INTSTS_ONE_FRAME (1 << 4)
#define MJPEG_INTSTS_ONE_FRAME (1 << 4)
/**
* @}
*/
@ -38,12 +38,21 @@
/** @defgroup MJPEG_INTCLR mjpeg interrupt clear definition
* @{
*/
#define MJPEG_INTCLR_ONE_FRAME (1 << 8)
#define MJPEG_INTCLR_ONE_FRAME (1 << 8)
/**
* @}
*/
#define MJPEG_MAX_FRAME_COUNT 4
/** @defgroup MJPEG_CMD mjpeg feature control cmd definition
* @{
*/
#define MJPEG_CMD_SET_INPUTADDR0 0x00
#define MJPEG_CMD_SET_INPUTADDR1 0x01
/**
* @}
*/
#define MJPEG_MAX_FRAME_COUNT 4
/**
* @brief MJPEG configuration structure
@ -59,6 +68,7 @@
struct bflb_mjpeg_config_s {
uint8_t format;
uint8_t quality;
uint16_t rows;
uint16_t resolution_x;
uint16_t resolution_y;
uint32_t input_bufaddr0;

4
drivers/lhal/src/bflb_dbi.c
View file

@ -770,9 +770,9 @@ int bflb_dbi_feature_control(struct bflb_device_s *dev, int cmd, size_t arg)
/* dbi output pixel format, arg use @ref DBI_PIXEL_OUTPUT_FORMAT */
regval = getreg32(reg_base + DBI_PIX_CNT_OFFSET);
if (arg == DBI_PIXEL_OUTPUT_FORMAT_RGB_565) {
regval |= DBI_CR_DBI_PIX_FORMAT;
} else if (arg == DBI_PIXEL_OUTPUT_FORMAT_RGB_888) {
regval &= ~DBI_CR_DBI_PIX_FORMAT;
} else if (arg == DBI_PIXEL_OUTPUT_FORMAT_RGB_888) {
regval |= DBI_CR_DBI_PIX_FORMAT;
}
putreg32(regval, reg_base + DBI_PIX_CNT_OFFSET);
break;

71
drivers/lhal/src/bflb_gpio.c
View file

@ -412,74 +412,7 @@ void bflb_gpio_uart_init(struct bflb_device_s *dev, uint8_t pin, uint8_t uart_fu
#if defined(BL616) || defined(BL808) || defined(BL606P) || defined(BL628)
void bflb_gpio_iso11898_init(struct bflb_device_s *dev, uint8_t pin, uint8_t iso11898_func)
{
uint32_t reg_base;
uint32_t regval;
uint8_t sig;
uint8_t sig_pos;
reg_base = dev->reg_base;
#define GLB_ISO11898_CFG1_OFFSET (0x154)
#define GLB_ISO11898_CFG2_OFFSET (0x158)
uint32_t regval2;
sig = pin % 12;
if (sig < 8) {
sig_pos = sig << 2;
regval = getreg32(reg_base + GLB_ISO11898_CFG1_OFFSET);
regval &= (~(0x0f << sig_pos));
regval |= (iso11898_func << sig_pos);
for (uint8_t i = 0; i < 8; i++) {
/* reset other sigs which are the same with iso11898_func */
sig_pos = i << 2;
if (((regval & (0x0f << sig_pos)) == (iso11898_func << sig_pos)) && (i != sig) && (iso11898_func != 0x0f)) {
regval &= (~(0x0f << sig_pos));
regval |= (0x0f << sig_pos);
}
}
regval2 = getreg32(reg_base + GLB_ISO11898_CFG2_OFFSET);
for (uint8_t i = 8; i < 12; i++) {
/* reset other sigs which are the same with iso11898_func */
sig_pos = (i - 8) << 2;
if (((regval2 & (0x0f << sig_pos)) == (iso11898_func << sig_pos)) && (i != sig) && (iso11898_func != 0x0f)) {
regval2 &= (~(0x0f << sig_pos));
regval2 |= (0x0f << sig_pos);
}
}
putreg32(regval, reg_base + GLB_ISO11898_CFG1_OFFSET);
putreg32(regval2, reg_base + GLB_ISO11898_CFG2_OFFSET);
} else {
sig_pos = (sig - 8) << 2;
regval = getreg32(reg_base + GLB_ISO11898_CFG2_OFFSET);
regval &= (~(0x0f << sig_pos));
regval |= (iso11898_func << sig_pos);
for (uint8_t i = 8; i < 12; i++) {
/* reset other sigs which are the same with iso11898_func */
sig_pos = (i - 8) << 2;
if (((regval & (0x0f << sig_pos)) == (iso11898_func << sig_pos)) && (i != sig) && (iso11898_func != 0x0f)) {
regval &= (~(0x0f << sig_pos));
regval |= (0x0f << sig_pos);
}
}
regval2 = getreg32(reg_base + GLB_ISO11898_CFG1_OFFSET);
for (uint8_t i = 0; i < 8; i++) {
/* reset other sigs which are the same with iso11898_func */
sig_pos = i << 2;
if (((regval2 & (0x0f << sig_pos)) == (iso11898_func << sig_pos)) && (i != sig) && (iso11898_func != 0x0f)) {
regval2 &= (~(0x0f << sig_pos));
regval2 |= (0x0f << sig_pos);
}
}
putreg32(regval, reg_base + GLB_ISO11898_CFG2_OFFSET);
putreg32(regval2, reg_base + GLB_ISO11898_CFG1_OFFSET);
}
bflb_gpio_init(dev, pin, (7 << GPIO_FUNC_SHIFT) | GPIO_ALTERNATE | GPIO_PULLUP | GPIO_SMT_EN | GPIO_DRV_1);
bflb_gpio_uart_init(dev, pin, iso11898_func);
}
#endif
@ -511,4 +444,4 @@ int bflb_gpio_feature_control(struct bflb_device_s *dev, int cmd, size_t arg)
break;
}
return ret;
}
}

44
drivers/lhal/src/bflb_mjpeg.c
View file

@ -39,8 +39,7 @@ void bflb_mjpeg_init(struct bflb_device_s *dev, const struct bflb_mjpeg_config_s
{
uint32_t regval;
uint32_t reg_base;
uint32_t rows;
uint32_t min_framesize = 0;
uint16_t blocks;
reg_base = dev->reg_base;
@ -135,39 +134,31 @@ void bflb_mjpeg_init(struct bflb_device_s *dev, const struct bflb_mjpeg_config_s
putreg32(config->input_bufaddr0, reg_base + MJPEG_YY_FRAME_ADDR_OFFSET);
putreg32(config->input_bufaddr1, reg_base + MJPEG_UV_FRAME_ADDR_OFFSET);
rows = MJPEG_MAX_FRAME_COUNT * config->resolution_y / 8; /* with 4 frames default */
blocks = config->rows / 8;
switch (config->format) {
case MJPEG_FORMAT_YUV422_YUYV:
case MJPEG_FORMAT_YUV422_YVYU:
case MJPEG_FORMAT_YUV422_UYVY:
case MJPEG_FORMAT_YUV422_VYUY:
putreg32((0 << 16) + rows, reg_base + MJPEG_YUV_MEM_OFFSET); /* uv << 16 + yy */
min_framesize = config->resolution_x * config->resolution_y * 2 * MJPEG_MAX_FRAME_COUNT;
putreg32((0 << 16) + blocks, reg_base + MJPEG_YUV_MEM_OFFSET); /* uv << 16 + yy */
break;
case MJPEG_FORMAT_YUV422SP_NV16:
case MJPEG_FORMAT_YUV422SP_NV61:
putreg32((rows << 16) + rows, reg_base + MJPEG_YUV_MEM_OFFSET);
min_framesize = config->resolution_x * config->resolution_y * 2 * MJPEG_MAX_FRAME_COUNT;
putreg32((blocks << 16) + blocks, reg_base + MJPEG_YUV_MEM_OFFSET);
break;
case MJPEG_FORMAT_YUV420SP_NV12:
case MJPEG_FORMAT_YUV420SP_NV21:
putreg32((rows << 16) + rows, reg_base + MJPEG_YUV_MEM_OFFSET);
min_framesize = config->resolution_x * config->resolution_y * 3 / 2 * MJPEG_MAX_FRAME_COUNT;
putreg32((blocks << 16) + blocks, reg_base + MJPEG_YUV_MEM_OFFSET);
break;
case MJPEG_FORMAT_GRAY:
putreg32((0 << 16) + rows, reg_base + MJPEG_YUV_MEM_OFFSET);
min_framesize = config->resolution_x * config->resolution_y * 1 * MJPEG_MAX_FRAME_COUNT;
putreg32((0 << 16) + blocks, reg_base + MJPEG_YUV_MEM_OFFSET);
break;
default:
break;
}
if (min_framesize > config->output_bufsize) {
printf("mjpeg output size is too small\r\n");
}
putreg32(config->output_bufaddr, reg_base + MJPEG_JPEG_FRAME_ADDR_OFFSET);
putreg32(config->output_bufsize / 128, reg_base + MJPEG_JPEG_STORE_MEMORY_OFFSET);
@ -552,4 +543,27 @@ void bflb_mjpeg_set_yuv420sp_cam_input(struct bflb_device_s *dev, uint8_t yy, ui
regval |= (yy << MJPEG_REG_YY_DVP2AXI_SEL_SHIFT);
regval |= (uv << MJPEG_REG_UV_DVP2AXI_SEL_SHIFT);
putreg32(regval, reg_base + MJPEG_CONTROL_2_OFFSET);
}
int bflb_mjpeg_feature_control(struct bflb_device_s *dev, int cmd, size_t arg)
{
int ret = 0;
uint32_t reg_base;
reg_base = dev->reg_base;
switch (cmd) {
case MJPEG_CMD_SET_INPUTADDR0:
putreg32(arg, reg_base + MJPEG_YY_FRAME_ADDR_OFFSET);
break;
case MJPEG_CMD_SET_INPUTADDR1:
putreg32(arg, reg_base + MJPEG_UV_FRAME_ADDR_OFFSET);
break;
default:
ret = -EPERM;
break;
}
return ret;
}