From 5ff36fc8135149c7eddd88c7c5c7f8e4d9fe4960 Mon Sep 17 00:00:00 2001 From: jzlv Date: Tue, 22 Mar 2022 11:19:23 +0800 Subject: [PATCH] [update][boot2] update boot2 driver --- drivers/bl702_driver/hal_drv/inc/hal_boot2.h | 163 +++-- .../bl702_driver/hal_drv/inc/hal_sec_hash.h | 16 +- drivers/bl702_driver/hal_drv/src/hal_boot2.c | 356 +++++++---- .../bl702_driver/hal_drv/src/hal_sec_hash.c | 139 +++- examples/boot2_iap/CMakeLists.txt | 21 +- examples/boot2_iap/bflb_eflash_loader_cmds.c | 58 +- .../boot2_iap/bflb_eflash_loader_interface.c | 6 +- examples/boot2_iap/bflb_eflash_loader_uart.c | 4 - examples/boot2_iap/blsp_boot2_iap.c | 601 ------------------ examples/boot2_iap/blsp_boot2_iap_flash.ld | 205 ------ examples/boot2_iap/blsp_boot_decompress.c | 7 +- examples/boot2_iap/blsp_boot_parser.c | 209 +----- examples/boot2_iap/blsp_boot_parser.h | 1 - examples/boot2_iap/blsp_bootinfo.h | 138 +--- examples/boot2_iap/blsp_common.c | 74 +-- examples/boot2_iap/blsp_common.h | 8 - examples/boot2_iap/blsp_media_boot.c | 220 +++---- examples/boot2_iap/blsp_media_boot.h | 4 +- examples/boot2_iap/blsp_port.c | 181 ++---- examples/boot2_iap/blsp_port.h | 16 +- examples/boot2_iap/blsp_ram_image_boot.c | 232 +++++++ examples/boot2_iap/compile_cmd.txt | 1 - examples/boot2_iap/main.c | 104 +-- examples/boot2_iap/partition_cfg_1M.toml | 29 - 24 files changed, 1076 insertions(+), 1717 deletions(-) delete mode 100644 examples/boot2_iap/blsp_boot2_iap.c delete mode 100644 examples/boot2_iap/blsp_boot2_iap_flash.ld create mode 100644 examples/boot2_iap/blsp_ram_image_boot.c delete mode 100644 examples/boot2_iap/compile_cmd.txt delete mode 100644 examples/boot2_iap/partition_cfg_1M.toml diff --git a/drivers/bl702_driver/hal_drv/inc/hal_boot2.h b/drivers/bl702_driver/hal_drv/inc/hal_boot2.h index c7f00250..ba1921f1 100644 --- a/drivers/bl702_driver/hal_drv/inc/hal_boot2.h +++ b/drivers/bl702_driver/hal_drv/inc/hal_boot2.h @@ -44,48 +44,55 @@ extern "C"{ #include "bl702_sflash.h" #include "bl702_glb.h" - -#define HAL_EFUSE_CPU_MAX 2 -#define HAL_EFUSE_PK_HASH_SIZE 256 / 8 - #define BL_TCM_BASE BL702_TCM_BASE #define BL_SYS_CLK_PLL GLB_SYS_CLK_DLL144M #define BL_SFLASH_CLK GLB_SFLASH_CLK_72M #define HAL_PLL_CFG_MAGICCODE "PCFG" -#define BL_FLASH_XIP_BASE BL702_FLASH_XIP_BASE -#define HAL_BOOT2_SUPPORT_DECOMPRESS 0 /* 1 support decompress, 0 not support */ -#define HAL_BOOT2_SUPPORT_USB_IAP 1 /* 1 support decompress, 0 not support */ -#define HAL_BOOT2_SUPPORT_EFLASH_LOADER_RAM 0 /* 1 support decompress, 0 not support */ -#define HAL_BOOT2_SUPPORT_EFLASH_LOADER_FLASH 1 /* 1 support decompress, 0 not support */ - -#define HAL_BOOT2_FW_IMG_OFFSET_AFTER_HEADER 4*1024 - -#define HAL_BOOT2_HASH_SIZE 256 / 8 +#define HAL_BOOT2_PK_HASH_SIZE 256 / 8 +#define HAL_BOOT2_IMG_HASH_SIZE 256 / 8 #define HAL_BOOT2_ECC_KEYXSIZE 256 / 8 #define HAL_BOOT2_ECC_KEYYSIZE 256 / 8 -#define HAL_BOOT2_SIGN_MAXSIZE 2048 / 8 +#define HAL_BOOT2_SIGN_MAXSIZE (2048 / 8) #define HAL_BOOT2_DEADBEEF_VAL 0xdeadbeef +#define HAL_BOOT2_CPU0_MAGIC "BFNP" +#define HAL_BOOT2_CPU1_MAGIC "BFAP" +#define HAL_BOOT2_CP_FLAG 0x02 +#define HAL_BOOT2_MP_FLAG 0x01 +#define HAL_BOOT2_SP_FLAG 0x00 + +#define HAL_BOOT2_SUPPORT_DECOMPRESS 1 /* 1 support decompress, 0 not support */ +#define HAL_BOOT2_SUPPORT_USB_IAP 0 /* 1 support decompress, 0 not support */ +#define HAL_BOOT2_SUPPORT_EFLASH_LOADER_RAM 1 /* 1 support decompress, 0 not support */ +#define HAL_BOOT2_SUPPORT_EFLASH_LOADER_FLASH 0 /* 1 support decompress, 0 not support */ + +#define HAL_BOOT2_CPU_GROUP_MAX 1 #define HAL_BOOT2_CPU_MAX 1 +#define HAL_BOOT2_RAM_IMG_COUNT_MAX 0 -#define HAL_BOOT2_CPU0_MAGIC "BFNP" -#define HAL_BOOT2_CPU1_MAGIC "BFAP" - - - - - +#define HAL_BOOT2_FW_IMG_OFFSET_AFTER_HEADER 4*1024 typedef struct { - uint8_t encrypted[HAL_EFUSE_CPU_MAX]; - uint8_t sign[HAL_EFUSE_CPU_MAX]; + uint8_t encrypted[HAL_BOOT2_CPU_GROUP_MAX]; + uint8_t sign[HAL_BOOT2_CPU_GROUP_MAX]; uint8_t hbn_check_sign; - uint8_t rsvd[3]; + uint8_t rsvd[1]; uint8_t chip_id[8]; - uint8_t pk_hash_cpu0[HAL_EFUSE_PK_HASH_SIZE]; - uint8_t pk_hash_cpu1[HAL_EFUSE_PK_HASH_SIZE]; + uint8_t pk_hash_cpu0[HAL_BOOT2_PK_HASH_SIZE]; + uint8_t pk_hash_cpu1[HAL_BOOT2_PK_HASH_SIZE]; + uint8_t uart_download_cfg; + uint8_t sf_pin_cfg; + uint8_t keep_dbg_port_closed; + uint8_t boot_pin_cfg; } boot2_efuse_hw_config; +struct __attribute__((packed, aligned(4))) hal_flash_config +{ + uint32_t magicCode; /*'FCFG'*/ + SPI_Flash_Cfg_Type cfg; + uint32_t crc32; +} ; + typedef struct { uint8_t xtal_type; @@ -105,18 +112,57 @@ typedef struct uint32_t crc32; } hal_pll_config; -typedef struct -{ - uint32_t magicCode; /*'FCFG'*/ - SPI_Flash_Cfg_Type cfg; - uint32_t crc32; -} hal_flash_config; + +struct __attribute__((packed, aligned(4))) hal_basic_cfg_t { + uint32_t sign_type : 2; /* [1: 0] for sign */ + uint32_t encrypt_type : 2; /* [3: 2] for encrypt */ + uint32_t key_sel : 2; /* [5: 4] key slot */ + uint32_t xts_mode : 1; /* [6] for xts mode */ + uint32_t aes_region_lock : 1; /* [7] rsvd */ + uint32_t no_segment : 1; /* [8] no segment info */ + uint32_t boot2_enable : 1; /* [9] boot2 enable */ + uint32_t boot2_rollback : 1; /* [10] boot2 rollback */ + uint32_t cpu_master_id : 4; /* [14: 11] master id */ + uint32_t notload_in_bootrom : 1; /* [15] notload in bootrom */ + uint32_t crc_ignore : 1; /* [16] ignore crc */ + uint32_t hash_ignore : 1; /* [17] hash ignore */ + uint32_t power_on_mm : 1; /* [18] power on mm */ + uint32_t em_sel : 3; /* [21: 19] em_sel */ + uint32_t cmds_en : 1; /* [22] command spliter enable */ + uint32_t cmds_wrap_mode : 2; /* [24: 23] cmds wrap mode */ + uint32_t cmds_wrap_len : 4; /* [28: 25] cmds wrap len */ + uint32_t icache_invalid : 1; /* [29] icache invalid */ + uint32_t dcache_invalid : 1; /* [30] dcache invalid */ + uint32_t fpga_halt_release : 1; /* [31] FPGA halt release function */ + + uint32_t group_image_offset; /* flash controller offset */ + uint32_t aes_region_len; /* aes region length */ + + uint32_t img_len_cnt; /* image length or segment count */ + uint32_t hash[8]; /* hash of the image */ +}; + +struct __attribute__((packed, aligned(4))) hal_cpu_cfg_t { + uint8_t config_enable; /* coinfig this cpu */ + uint8_t halt_cpu; /* halt this cpu */ + uint8_t cache_enable : 1; /* cache setting */ + uint8_t cache_wa : 1; /* cache setting */ + uint8_t cache_wb : 1; /* cache setting */ + uint8_t cache_wt : 1; /* cache setting */ + uint8_t cache_way_dis : 4; /* cache setting */ + uint8_t rsvd; + + uint32_t image_address_offset; /* image address on flash */ + uint32_t boot_entry; /* entry point of the m0 image */ + uint32_t msp_val; /* msp value */ +}; + struct hal_bootheader_t { uint32_t magicCode; /*'BFXP'*/ uint32_t rivison; - hal_flash_config flash_cfg; + struct hal_flash_config flash_cfg; hal_pll_config clk_cfg; __PACKED_UNION { @@ -156,7 +202,7 @@ struct hal_bootheader_t } img_start; - uint8_t hash[HAL_BOOT2_HASH_SIZE]; /*hash of the image*/ + uint8_t hash[HAL_BOOT2_IMG_HASH_SIZE]; /*hash of the image*/ uint32_t rsv1; uint32_t rsv2; @@ -165,44 +211,15 @@ struct hal_bootheader_t typedef struct { - uint8_t encrypt_type; - uint8_t sign_type; - uint8_t key_sel; uint8_t img_valid; + uint8_t pk_src; + uint8_t rsvd[2]; - uint8_t no_segment; - uint8_t cache_enable; - uint8_t cache_way_disable; - uint8_t hash_ignore; + struct hal_basic_cfg_t basic_cfg; - uint8_t aes_region_lock; - uint8_t halt_cpu1; - uint8_t cpu_type; - uint8_t r[1]; + struct hal_cpu_cfg_t cpu_cfg[HAL_BOOT2_CPU_MAX]; - __PACKED_UNION - { - uint32_t segment_cnt; - uint32_t img_len; - } - img_segment_info; - - uint32_t msp_val; - uint32_t entry_point; - __PACKED_UNION - { - uint32_t ram_addr; - uint32_t flash_offset; - } - img_start; - uint32_t sig_len; - uint32_t sig_len2; - - uint32_t deal_len; - uint32_t max_input_len; - - uint8_t img_hash[HAL_BOOT2_HASH_SIZE]; //hash of the whole (all)images - uint8_t aes_iv[16 + 4]; //iv in boot header + uint8_t aes_iv[16 + 4]; //iv in boot header uint8_t eckye_x[HAL_BOOT2_ECC_KEYXSIZE]; //ec key in boot header uint8_t eckey_y[HAL_BOOT2_ECC_KEYYSIZE]; //ec key in boot header @@ -241,7 +258,15 @@ void hal_boot2_debug_usb_port_init(void); void hal_boot2_debug_uart_gpio_deinit(void); int32_t hal_boot_parse_bootheader(boot2_image_config *boot_img_cfg, uint8_t *data); void hal_boot2_clean_cache(void); - +BL_Err_Type hal_boot2_set_cache(uint8_t cont_read, boot2_image_config *boot_img_cfg); +void hal_boot2_get_ram_img_cnt(char* img_name[],uint32_t *ram_img_cnt ); +void hal_boot2_get_img_info(uint8_t *data, uint32_t *image_offset, uint32_t *img_len,uint8_t **hash); +void hal_boot2_release_cpu(uint32_t core, uint32_t boot_addr); +uint32_t hal_boot2_get_xip_addr(uint32_t flash_addr); +uint32_t hal_boot2_get_grp_count(void); +uint32_t hal_boot2_get_cpu_count(void); +uint32_t hal_boot2_get_feature_flag(void); +uint32_t hal_boot2_get_bootheader_offset(void); #ifdef __cplusplus } #endif diff --git a/drivers/bl702_driver/hal_drv/inc/hal_sec_hash.h b/drivers/bl702_driver/hal_drv/inc/hal_sec_hash.h index a14e00ba..172ad679 100644 --- a/drivers/bl702_driver/hal_drv/inc/hal_sec_hash.h +++ b/drivers/bl702_driver/hal_drv/inc/hal_sec_hash.h @@ -52,9 +52,21 @@ typedef struct sec_hash_device { uint8_t type; /*!< Sha has feed data */ } sec_hash_device_t; -int sec_hash_register(enum sec_hash_index_type index, const char *name); +typedef struct +{ + uint32_t shaBuf[64 / 4]; /*!< Data not processed but in this temp buffer */ + uint32_t shaPadding[64 / 4]; /*!< Padding data */ + uint8_t type; /*!< Sha has feed data */ +} sec_hash_handle_t; + +int sec_hash_init(sec_hash_handle_t *handle, uint8_t type); +int sec_hash_deinit(sec_hash_handle_t *handle); +int sec_hash_update(sec_hash_handle_t *handle, const void *buffer, uint32_t size); +int sec_hash_finish(sec_hash_handle_t *handle, void *buffer); int sec_hash_sha256_register(enum sec_hash_index_type index, const char *name); +int sec_hash_sha224_register(enum sec_hash_index_type index, const char *name); + #ifdef __cplusplus } #endif -#endif \ No newline at end of file +#endif diff --git a/drivers/bl702_driver/hal_drv/src/hal_boot2.c b/drivers/bl702_driver/hal_drv/src/hal_boot2.c index 79d93691..0767d521 100644 --- a/drivers/bl702_driver/hal_drv/src/hal_boot2.c +++ b/drivers/bl702_driver/hal_drv/src/hal_boot2.c @@ -149,7 +149,7 @@ void ATTR_TCM_SECTION hal_boot2_sboot_finish(void) } /** - * @brief hal_boot2_pll_init + * @brief hal_boot2_uart_gpio_init * * @return */ @@ -207,6 +207,32 @@ void hal_boot2_debug_uart_gpio_deinit(void) } +/****************************************************************************/ /** + * @brief Check bootheader crc + * + * @param data: bootheader data pointer + * + * @return boot_error_code type + * +*******************************************************************************/ +static uint32_t hal_boot_check_bootheader(struct hal_bootheader_t *header) +{ + uint32_t crc_pass = 0; + uint32_t crc; + + if (header->bootCfg.bval.crcIgnore == 1 && header->crc32 == HAL_BOOT2_DEADBEEF_VAL) { + //MSG("Crc ignored\r\n"); + crc_pass = 1; + } else { + crc = BFLB_Soft_CRC32((uint8_t *)header, sizeof(struct hal_bootheader_t) - sizeof(header->crc32)); + + if (header->crc32 == crc) { + crc_pass = 1; + } + } + return crc_pass; +} + /****************************************************************************/ /** * @brief Check if the input public key is the same as burned in the efuse * @@ -219,135 +245,233 @@ void hal_boot2_debug_uart_gpio_deinit(void) int32_t hal_boot_parse_bootheader(boot2_image_config *boot_img_cfg, uint8_t *data) { struct hal_bootheader_t *header = (struct hal_bootheader_t *)data; - uint32_t crc; uint32_t crc_pass = 0; uint32_t i = 0; uint32_t *phash = (uint32_t *)header->hash; - int32_t ret; - if (header->bootCfg.bval.crcIgnore == 1 && header->crc32 == HAL_BOOT2_DEADBEEF_VAL) { - //MSG("Crc ignored\r\n"); - crc_pass = 1; - } else { - crc = BFLB_Soft_CRC32((uint8_t *)header, sizeof(struct hal_bootheader_t) - sizeof(header->crc32)); + crc_pass=hal_boot_check_bootheader(header); - if (header->crc32 == crc) { - crc_pass = 1; - } - } - - if (crc_pass) { - if (header->bootCfg.bval.notLoadInBoot) { - return 0x0202; - } - - /* Get which CPU's img it is*/ - for (i = 0; i < HAL_BOOT2_CPU_MAX; i++) { - if (0 == memcmp((void *)&header->magicCode, HAL_BOOT2_CPU0_MAGIC, - sizeof(header->magicCode))) { - break; - } else if (0 == memcmp((void *)&header->magicCode, HAL_BOOT2_CPU1_MAGIC, - sizeof(header->magicCode))) { - break; - } - } - - if (i == HAL_BOOT2_CPU_MAX) { - /* No cpu img magic match */ - //MSG_ERR("Magic code error\r\n"); - return 0x0203; - } - - boot_img_cfg->cpu_type = i; - boot_img_cfg->entry_point = 0; - /* Set image valid 0 as default */ - boot_img_cfg->img_valid = 0; - - /* Deal with pll config */ - - /* Encrypt and sign */ - boot_img_cfg->encrypt_type = header->bootCfg.bval.encrypt_type; - boot_img_cfg->sign_type = header->bootCfg.bval.sign; - boot_img_cfg->key_sel = header->bootCfg.bval.key_sel; - - /* Xip relative */ - boot_img_cfg->no_segment = header->bootCfg.bval.no_segment; - boot_img_cfg->cache_enable = header->bootCfg.bval.cache_enable; - boot_img_cfg->aes_region_lock = header->bootCfg.bval.aes_region_lock; - boot_img_cfg->halt_cpu1 = header->bootCfg.bval.halt_cpu1; - boot_img_cfg->cache_way_disable = header->bootCfg.bval.cache_way_disable; - boot_img_cfg->hash_ignore = header->bootCfg.bval.hash_ignore; - /* Firmware len*/ - boot_img_cfg->img_segment_info.img_len = header->img_segment_info.img_len; - - /* Boot entry and flash offset */ - boot_img_cfg->entry_point = header->bootEntry; - boot_img_cfg->img_start.flash_offset = header->img_start.flash_offset; - - //MSG("sign %d,encrypt:%d\r\n", boot_img_cfg->sign_type,boot_img_cfg->encrypt_type); - - /* Check encrypt and sign match*/ - if (g_efuse_cfg.encrypted[i] != 0) { - if (boot_img_cfg->encrypt_type == 0) { - //MSG_ERR("Encrypt not fit\r\n"); - return 0x0205; - } - } - - if (g_efuse_cfg.sign[i] ^ boot_img_cfg->sign_type) { - //MSG_ERR("sign not fit\r\n"); - boot_img_cfg->sign_type = g_efuse_cfg.sign[i]; - return 0x0206; - } - - if (g_ps_mode == 1 && (!g_efuse_cfg.hbn_check_sign)) { - /* In HBN Mode, if user select to ignore hash and sign*/ - boot_img_cfg->hash_ignore = 1; - } else if ((boot_img_cfg->hash_ignore == 1 && *phash != HAL_BOOT2_DEADBEEF_VAL) || - g_efuse_cfg.sign[i] != 0) { - /* If signed or user not really want to ignore, hash can't be ignored*/ - boot_img_cfg->hash_ignore = 0; - } - - if (g_user_hash_ignored) { - boot_img_cfg->hash_ignore = 1; - } - - ARCH_MemCpy_Fast(boot_img_cfg->img_hash, header->hash, sizeof(header->hash)); - - if (boot_img_cfg->img_segment_info.img_len == 0) { - return 0x0207; - } - - /* Start hash here*/ - //Sec_Eng_SHA256_Init(&g_sha_ctx, SEC_ENG_SHA_ID0, SEC_ENG_SHA256, g_sha_tmp_buf, g_padding); - //Sec_Eng_SHA_Start(SEC_ENG_SHA_ID0); - device_unregister("dev_check_hash"); - sec_hash_sha256_register(0,"dev_check_hash"); - dev_check_hash = device_find("dev_check_hash"); - if(dev_check_hash){ - ret = device_open(dev_check_hash, 0); - if(ret){ - //MSG_ERR("hash dev open err\r\n"); - return 0xffff; - } - }else{ - //MSG_ERR("hash dev find err\r\n"); - return 0xffff; - } - - } else { + if (!crc_pass) { //MSG_ERR("bootheader crc error\r\n"); //blsp_dump_data((uint8_t *)&crc, 4); return 0x0204; } + if (header->bootCfg.bval.notLoadInBoot) { + return 0x0202; + } + + /* Get which CPU's img it is*/ + for (i = 0; i < HAL_BOOT2_CPU_MAX; i++) { + if (0 == memcmp((void *)&header->magicCode, HAL_BOOT2_CPU0_MAGIC, + sizeof(header->magicCode))) { + break; + } else if (0 == memcmp((void *)&header->magicCode, HAL_BOOT2_CPU1_MAGIC, + sizeof(header->magicCode))) { + break; + } + } + + if (i == HAL_BOOT2_CPU_MAX) { + /* No cpu img magic match */ + //MSG_ERR("Magic code error\r\n"); + return 0x0203; + } + + if(boot_img_cfg==NULL){ + return 0; + } + + boot_img_cfg->pk_src=i; + boot_img_cfg->img_valid=0; + + /* Deal with pll config */ + + /* Encrypt and sign */ + boot_img_cfg->basic_cfg.encrypt_type = header->bootCfg.bval.encrypt_type; + boot_img_cfg->basic_cfg.sign_type = header->bootCfg.bval.sign; + boot_img_cfg->basic_cfg.key_sel = header->bootCfg.bval.key_sel; + + /* Xip relative */ + boot_img_cfg->basic_cfg.no_segment = header->bootCfg.bval.no_segment; + boot_img_cfg->cpu_cfg[0].cache_enable = header->bootCfg.bval.cache_enable; + boot_img_cfg->basic_cfg.aes_region_lock = header->bootCfg.bval.aes_region_lock; + //boot_img_cfg->cpu_cfg[1].halt_cpu = header->bootCfg.bval.halt_cpu1; + boot_img_cfg->cpu_cfg[0].cache_way_dis = header->bootCfg.bval.cache_way_disable; + boot_img_cfg->basic_cfg.hash_ignore = header->bootCfg.bval.hash_ignore; + /* Firmware len*/ + boot_img_cfg->basic_cfg.img_len_cnt= header->img_segment_info.img_len; + + /* Boot entry and flash offset */ + boot_img_cfg->cpu_cfg[0].boot_entry = header->bootEntry; + boot_img_cfg->basic_cfg.group_image_offset = header->img_start.flash_offset; + + boot_img_cfg->cpu_cfg[0].config_enable=1; + boot_img_cfg->cpu_cfg[0].halt_cpu =0; + + //MSG("sign %d,encrypt:%d\r\n", boot_img_cfg->sign_type,boot_img_cfg->encrypt_type); + + /* Check encrypt and sign match*/ + if (g_efuse_cfg.encrypted[i] != 0) { + if (boot_img_cfg->basic_cfg.encrypt_type == 0) { + //MSG_ERR("Encrypt not fit\r\n"); + return 0x0205; + } + } + + if (g_efuse_cfg.sign[i] !=boot_img_cfg->basic_cfg.sign_type) { + //MSG_ERR("sign not fit\r\n"); + boot_img_cfg->basic_cfg.sign_type = g_efuse_cfg.sign[i]; + return 0x0206; + } + + if (g_ps_mode == 1 && (!g_efuse_cfg.hbn_check_sign)) { + /* In HBN Mode, if user select to ignore hash and sign*/ + boot_img_cfg->basic_cfg.hash_ignore = 1; + } else if ((boot_img_cfg->basic_cfg.hash_ignore == 1 && *phash != HAL_BOOT2_DEADBEEF_VAL) || + g_efuse_cfg.sign[i] != 0) { + /* If signed or user not really want to ignore, hash can't be ignored*/ + boot_img_cfg->basic_cfg.hash_ignore = 0; + } + + if (g_user_hash_ignored) { + boot_img_cfg->basic_cfg.hash_ignore = 1; + } + + ARCH_MemCpy_Fast(boot_img_cfg->basic_cfg.hash, header->hash, sizeof(header->hash)); + + if (boot_img_cfg->basic_cfg.img_len_cnt == 0) { + return 0x0207; + } + return 0; } -void hal_boot2_clean_cache(void) +void ATTR_TCM_SECTION hal_boot2_clean_cache(void) { - + /* no need clean again since hal_boot2_set_cache will also clean + unused way,and bl702 no data cache except psram */ } +BL_Err_Type ATTR_TCM_SECTION hal_boot2_set_cache(uint8_t cont_read, boot2_image_config *boot_img_cfg) +{ + return flash_set_cache(cont_read, boot_img_cfg->cpu_cfg[0].cache_enable, + boot_img_cfg->cpu_cfg[0].cache_way_dis, + boot_img_cfg->basic_cfg.group_image_offset); +} + +/****************************************************************************/ /** + * @brief get the ram image name and count + * + * @param img_name: ram image name in partition + * @param ram_img_cnt: ram image count that support boot from flash + * + * @return None + * +*******************************************************************************/ +void hal_boot2_get_ram_img_cnt(char* img_name[],uint32_t *ram_img_cnt ) +{ + *ram_img_cnt=0; +} + +/****************************************************************************/ /** + * @brief get the ram image info + * + * @param data: bootheader information + * @param image_offset: ram image offset in flash(from of bootheader) + * @param img_len: ram image length + * @param hash: pointer to hash pointer + * + * @return None + * +*******************************************************************************/ +void hal_boot2_get_img_info(uint8_t *data, uint32_t *image_offset, uint32_t *img_len,uint8_t **hash) +{ + *img_len=0; +} + +/****************************************************************************/ /** + * @brief release other cpu to boot up + * + * @param core: core number + * @param boot_addr: boot address + * + * @return None + * +*******************************************************************************/ +void ATTR_TCM_SECTION hal_boot2_release_cpu(uint32_t core, uint32_t boot_addr) +{ + +} + +/****************************************************************************/ /** + * @brief get xip address according to flash addr + * + * @param flash_addr: flash address + * + * @return XIP Address + * +*******************************************************************************/ +uint32_t hal_boot2_get_xip_addr(uint32_t flash_addr) +{ + uint32_t img_offset= SF_Ctrl_Get_Flash_Image_Offset(); + if(flash_addr>=img_offset){ + return BL702_FLASH_XIP_BASE+(flash_addr-img_offset); + }else{ + return 0; + } +} + +/****************************************************************************/ /** + * @brief get multi-group count + * + * @param None + * + * @return 1 for multi-group 0 for not + * +*******************************************************************************/ +uint32_t hal_boot2_get_grp_count(void) +{ + return 1; +} + +/****************************************************************************/ /** + * @brief get cpu count + * + * @param None + * + * @return 1 for multi-group 0 for not + * +*******************************************************************************/ +uint32_t hal_boot2_get_cpu_count(void) +{ + return 1; +} + +/****************************************************************************/ /** + * @brief get cpu count + * + * @param None + * + * @return 1 for multi-group 0 for not + * +*******************************************************************************/ +uint32_t ATTR_TCM_SECTION hal_boot2_get_feature_flag(void) +{ + return HAL_BOOT2_SP_FLAG; +} + +/****************************************************************************/ /** + * @brief get boot header offset + * + * @param None + * + * @return bootheader offset + * +*******************************************************************************/ +uint32_t hal_boot2_get_bootheader_offset(void) +{ + return 0x00; +} + diff --git a/drivers/bl702_driver/hal_drv/src/hal_sec_hash.c b/drivers/bl702_driver/hal_drv/src/hal_sec_hash.c index cb04e632..736c0811 100644 --- a/drivers/bl702_driver/hal_drv/src/hal_sec_hash.c +++ b/drivers/bl702_driver/hal_drv/src/hal_sec_hash.c @@ -28,7 +28,11 @@ void SEC_SHA_IRQHandler(void); static sec_hash_device_t sec_hashx_device[SEC_HASH_MAX_INDEX] = { 0 }; + static SEC_Eng_SHA256_Ctx shaCtx; + +static SEC_Eng_SHA256_Ctx sha256Ctx; + /** * @brief * @@ -175,6 +179,137 @@ int sec_hash_read(struct device *dev, uint32_t pos, void *buffer, uint32_t size) return ret; } +/** + * @brief + * + * @param handle + * @param type + * @return int + */ +int sec_hash_init(sec_hash_handle_t *handle, uint8_t type) +{ + int ret = 0; + + switch (type) { + case SEC_HASH_SHA1: + ret = -1; + break; + + case SEC_HASH_SHA224: + handle->type = type; + Sec_Eng_SHA256_Init(&sha256Ctx, SEC_ENG_SHA_ID0, SEC_ENG_SHA224, handle->shaBuf, handle->shaPadding); + Sec_Eng_SHA_Start(SEC_ENG_SHA_ID0); + break; + + case SEC_HASH_SHA256: + handle->type = type; + Sec_Eng_SHA256_Init(&sha256Ctx, SEC_ENG_SHA_ID0, SEC_ENG_SHA256, handle->shaBuf, handle->shaPadding); + Sec_Eng_SHA_Start(SEC_ENG_SHA_ID0); + break; + + case SEC_HASH_SHA384: + case SEC_HASH_SHA512: + ret = -1; + break; + + default: + ret = -1; + break; + } + + return ret; +} +/** + * @brief + * + * @param handle + * @return int + */ +int sec_hash_deinit(sec_hash_handle_t *handle) +{ + memset(handle->shaBuf, 0, sizeof(handle->shaBuf)); + memset(handle->shaPadding, 0, sizeof(handle->shaPadding)); + + return 0; +} + +/** + * @brief + * + * @param handle + * @param buffer + * @param size + * @return int + */ +int sec_hash_update(sec_hash_handle_t *handle, const void *buffer, uint32_t size) +{ + int ret = 0; + + switch (handle->type) { + case SEC_HASH_SHA1: + ret = -1; + break; + + case SEC_HASH_SHA224: + Sec_Eng_SHA256_Update(&sha256Ctx, SEC_ENG_SHA_ID0, (uint8_t *)buffer, size); + break; + + case SEC_HASH_SHA256: + Sec_Eng_SHA256_Update(&sha256Ctx, SEC_ENG_SHA_ID0, (uint8_t *)buffer, size); + break; + + case SEC_HASH_SHA384: + case SEC_HASH_SHA512: + ret = -1; + break; + + default: + ret = -1; + break; + } + + return ret; +} + +/** + * @brief + * + * @param handle + * @param buffer + * @return int + */ +int sec_hash_finish(sec_hash_handle_t *handle, void *buffer) +{ + int ret = 0; + + switch (handle->type) { + case SEC_HASH_SHA1: + ret = -1; + break; + + case SEC_HASH_SHA224: + Sec_Eng_SHA256_Finish(&sha256Ctx, SEC_ENG_SHA_ID0, (uint8_t *)buffer); + ret = 28; + break; + + case SEC_HASH_SHA256: + Sec_Eng_SHA256_Finish(&sha256Ctx, SEC_ENG_SHA_ID0, (uint8_t *)buffer); + ret = 32; + break; + + case SEC_HASH_SHA384: + case SEC_HASH_SHA512: + ret = -1; + break; + + default: + ret = -1; + break; + } + + return ret; +} + /** * @brief * @@ -238,7 +373,7 @@ int sec_hash_sha224_register(enum sec_hash_index_type index, const char *name) * * @param handle */ -void sec_hash_isr(sec_hash_device_t *handle) +void sec_hash_isr(void) { } @@ -248,5 +383,5 @@ void sec_hash_isr(sec_hash_device_t *handle) */ void SEC_SHA_IRQ(void) { - sec_hash_isr(&sec_hashx_device[0]); + sec_hash_isr(); } \ No newline at end of file diff --git a/examples/boot2_iap/CMakeLists.txt b/examples/boot2_iap/CMakeLists.txt index d5373505..3f25d4ea 100644 --- a/examples/boot2_iap/CMakeLists.txt +++ b/examples/boot2_iap/CMakeLists.txt @@ -1,24 +1,33 @@ +set(TARGET_REQUIRED_LIBS xz) + if((${CHIP} STREQUAL "bl702")) - set(TARGET_REQUIRED_LIBS xz usb_stack) + list(APPEND TARGET_REQUIRED_LIBS usb_stack ) set(BSP_COMMON_DIR ${CMAKE_SOURCE_DIR}/bsp/bsp_common) set(TARGET_REQUIRED_PRIVATE_INCLUDE ${BSP_COMMON_DIR}/usb) -elseif ((${CHIP} STREQUAL "bl602")) - set(TARGET_REQUIRED_LIBS xz) endif() - - list(APPEND TARGET_REQUIRED_SRCS blsp_common.c blsp_media_boot.c ) list(APPEND TARGET_REQUIRED_SRCS blsp_boot_parser.c blsp_boot_decompress.c blsp_port.c ) list(APPEND TARGET_REQUIRED_SRCS bflb_eflash_loader_uart.c ) #bflb_eflash_loader_gpio.c list(APPEND TARGET_REQUIRED_SRCS bflb_eflash_loader_cmds.c ) +list(APPEND TARGET_REQUIRED_SRCS blsp_ram_image_boot.c ) list(APPEND TARGET_REQUIRED_SRCS bflb_eflash_loader_interface.c ) if((${CHIP} STREQUAL "bl702")) list(APPEND TARGET_REQUIRED_SRCS bflb_eflash_loader_usb.c ) list(APPEND TARGET_REQUIRED_SRCS ${BSP_COMMON_DIR}/usb/usb_dc.c ${BSP_COMMON_DIR}/usb/uart_interface.c ) endif() -SET(LINKER_SCRIPT ${BOOT2_LINKER_SCRIPT}) + +SET(LINKER_SCRIPT ${BOOT2_LINKER_SCRIPT}) + +list(APPEND GLOBAL_C_FLAGS -DCONFIG_ERR_NOT_DUMP_MCAUSE_INFO) +list(APPEND GLOBAL_C_FLAGS -DCONFIG_ERR_NOT_DUMP_ALL_REGS) +#list(APPEND GLOBAL_C_FLAGS -D_vsnprintf=vsnprintf) +list(APPEND GLOBAL_C_FLAGS -DCONFIG_SUPPORT_UART_CLOCK_GET_ONLY) +list(APPEND GLOBAL_C_FLAGS -D__NO_HBN_RECV_IN_STARTUP) +list(APPEND GLOBAL_C_FLAGS -DCONFIG_SUPPORT_U32_DIV_ONLY) +list(REMOVE_ITEM GLOBAL_C_FLAGS -O2) +list(APPEND GLOBAL_C_FLAGS -Os) set(mains main.c) diff --git a/examples/boot2_iap/bflb_eflash_loader_cmds.c b/examples/boot2_iap/bflb_eflash_loader_cmds.c index 93a49045..87d7dcd6 100644 --- a/examples/boot2_iap/bflb_eflash_loader_cmds.c +++ b/examples/boot2_iap/bflb_eflash_loader_cmds.c @@ -47,13 +47,7 @@ #define BFLB_EFLASH_LOADER_CHECK_LEN 2048 #define BFLB_EFLASH_MAX_SIZE 2 * 1024 * 1024 - - - - - extern struct device *download_uart; -extern struct device *dev_check_hash; #if BLSP_BOOT2_SUPPORT_EFLASH_LOADER_RAM static struct image_cfg_t image_cfg; @@ -87,6 +81,7 @@ static int32_t bflb_eflash_loader_cmd_xip_read_flash_start(uint16_t cmd, uint8_t static int32_t bflb_eflash_loader_cmd_xip_read_flash_finish(uint16_t cmd, uint8_t *data, uint16_t len); #endif +#if BLSP_BOOT2_SUPPORT_EFLASH_LOADER_FLASH||BLSP_BOOT2_SUPPORT_EFLASH_LOADER_RAM static const struct eflash_loader_cmd_cfg_t eflash_loader_cmds[] = { #if BLSP_BOOT2_SUPPORT_EFLASH_LOADER_RAM /*for bl602*/ @@ -113,6 +108,7 @@ static const struct eflash_loader_cmd_cfg_t eflash_loader_cmds[] = { { BFLB_EFLASH_LOADER_CMD_FLASH_READ_JEDECID, EFLASH_LOADER_CMD_ENABLE, bflb_eflash_loader_cmd_read_jedec_id }, #endif }; +#endif #if BLSP_BOOT2_SUPPORT_EFLASH_LOADER_RAM /* ack host with command process result */ @@ -121,12 +117,12 @@ static void bflb_bootrom_cmd_ack(uint32_t result) if (result == 0) { /*OK*/ eflash_loader_cmd_ack_buf[0] = BFLB_BOOTROM_CMD_ACK; - bflb_eflash_loader_if_write((uint32_t *)eflash_loader_cmd_ack_buf, 2); + bflb_eflash_loader_if_write((uint32_t *)eflash_loader_cmd_ack_buf, 2); return; } else { /* FL+Error code(2bytes) */ eflash_loader_cmd_ack_buf[0] = BFLB_BOOTROM_CMD_NACK | ((result << 16) & 0xffff0000); - bflb_eflash_loader_if_write(eflash_loader_cmd_ack_buf, 4); + bflb_eflash_loader_if_write(eflash_loader_cmd_ack_buf, 4); } } @@ -145,7 +141,7 @@ static int32_t bflb_bootrom_cmd_get_bootinfo(uint16_t cmd, uint8_t *data, uint16 *((uint32_t *)(bootinfo + 4)) = BFLB_BOOTROM_VERSION; memcpy(bootinfo + 8, &otp_cfg, 16); - bflb_eflash_loader_if_write(eflash_loader_cmd_ack_buf, bootinfo[2] + 4); + bflb_eflash_loader_if_write(eflash_loader_cmd_ack_buf, bootinfo[2] + 4); return BFLB_EFLASH_LOADER_SUCCESS; } @@ -198,8 +194,8 @@ int32_t bflb_bootrom_parse_bootheader(uint8_t *data) image_cfg.aes_region_lock = header->bootcfg.bval.aes_region_lock; image_cfg.halt_ap = header->bootcfg.bval.halt_ap; image_cfg.cache_way_disable = header->bootcfg.bval.cache_way_disable; - image_cfg.hash_ignore = header->bootcfg.bval.hash_ignore; + image_cfg.hash_ignore = header->bootcfg.bval.hash_ignore; /* firmware len*/ image_cfg.img_segment_info.segment_cnt = header->img_segment_info.segment_cnt; @@ -300,7 +296,7 @@ static int32_t bflb_bootrom_cmd_load_segheader(uint16_t cmd, uint8_t *data, uint segdatainfo[2] = sizeof(segment_hdr); segdatainfo[3] = 0x00; memcpy(&segdatainfo[4], (void *)&segment_hdr, sizeof(segment_hdr)); - bflb_eflash_loader_if_write(eflash_loader_cmd_ack_buf, segdatainfo[2] + 4); + bflb_eflash_loader_if_write(eflash_loader_cmd_ack_buf, segdatainfo[2] + 4); } else { bflb_bootrom_cmd_ack(ret); } @@ -459,12 +455,12 @@ static void bflb_eflash_loader_cmd_ack(uint32_t result) if (result == 0) { /*OK*/ g_eflash_loader_cmd_ack_buf[0] = BFLB_EFLASH_LOADER_CMD_ACK; - bflb_eflash_loader_if_write((uint32_t *)g_eflash_loader_cmd_ack_buf, 2); + bflb_eflash_loader_if_write((uint32_t *)g_eflash_loader_cmd_ack_buf, 2); return; } else { /* FL+Error code(2bytes) */ g_eflash_loader_cmd_ack_buf[0] = BFLB_EFLASH_LOADER_CMD_NACK | ((result << 16) & 0xffff0000); - bflb_eflash_loader_if_write(g_eflash_loader_cmd_ack_buf, 4); + bflb_eflash_loader_if_write(g_eflash_loader_cmd_ack_buf, 4); } } @@ -479,6 +475,8 @@ static int32_t bflb_eflash_loader_cmd_read_jedec_id(uint16_t cmd, uint8_t *data, tmp_buf[2] = 4; tmp_buf[3] = 0; flash_read_jedec_id((uint8_t *)&ackdata[1]); + ackdata[1] &= 0x00ffffff; + ackdata[1] |= 0x80000000; bflb_eflash_loader_if_write((uint32_t *)ackdata, 4 + 4); return BFLB_EFLASH_LOADER_SUCCESS; } @@ -618,42 +616,32 @@ static int32_t bflb_eflash_loader_cmd_xip_readSha_flash(uint16_t cmd, uint8_t *d /* Init SHA and input SHA temp buffer for scattered data and g_padding buffer */ //Sec_Eng_SHA256_Init(&sha_ctx, shaId, SEC_ENG_SHA256, g_sha_tmp_buf, g_padding); //Sec_Eng_SHA_Start(shaId); - device_unregister("dev_check_hash"); - sec_hash_sha256_register(SEC_HASH0_INDEX,"dev_check_hash"); - dev_check_hash = device_find("dev_check_hash"); - if(dev_check_hash){ - ret = device_open(dev_check_hash, 0); - if(ret){ - MSG_ERR("hash dev open err\r\n"); - return BFLB_BOOT2_FAIL; - } - }else{ - MSG_ERR("hash dev find err\r\n"); - return BFLB_BOOT2_FAIL; - } - //device_open(dev_check_hash, 0); + sec_hash_init(&hash_handle, SEC_HASH_SHA256); while (read_len > 0) { if (read_len > BFLB_EFLASH_LOADER_READBUF_SIZE) { blsp_mediaboot_read(startaddr, g_sha_in_buf, BFLB_EFLASH_LOADER_READBUF_SIZE); /*cal sha here*/ //Sec_Eng_SHA256_Update(&sha_ctx, shaId, (uint8_t *)g_sha_in_buf, BFLB_EFLASH_LOADER_READBUF_SIZE); - device_write(dev_check_hash, 0, g_sha_in_buf, BFLB_EFLASH_LOADER_READBUF_SIZE); + //device_write(dev_check_hash, 0, g_sha_in_buf, BFLB_EFLASH_LOADER_READBUF_SIZE); + sec_hash_update(&hash_handle, g_sha_in_buf, BFLB_EFLASH_LOADER_READBUF_SIZE); read_len -= BFLB_EFLASH_LOADER_READBUF_SIZE; startaddr += BFLB_EFLASH_LOADER_READBUF_SIZE; } else { blsp_mediaboot_read(startaddr, g_sha_in_buf, read_len); /*cal sha here*/ //Sec_Eng_SHA256_Update(&sha_ctx, shaId, (uint8_t *)g_sha_in_buf, read_len); - device_write(dev_check_hash, 0, g_sha_in_buf, read_len); + //device_write(dev_check_hash, 0, g_sha_in_buf, read_len); + sec_hash_update(&hash_handle, g_sha_in_buf, read_len); read_len -= read_len; startaddr += read_len; } } //Sec_Eng_SHA256_Finish(&sha_ctx, shaId, &ackdata[4]); - device_read(dev_check_hash, 0, &ackdata[4], 0); - device_close(dev_check_hash); + //device_read(dev_check_hash, 0, &ackdata[4], 0); + //device_close(dev_check_hash); + sec_hash_finish(&hash_handle, (uint8_t *)&ackdata[4]); for (sha_len = 0; sha_len < 32; sha_len++) { MSG("\r\n"); @@ -666,7 +654,7 @@ static int32_t bflb_eflash_loader_cmd_xip_readSha_flash(uint16_t cmd, uint8_t *d ackdata[1] = (BFLB_EFLASH_LOADER_CMD_ACK >> 8) & 0xff; ackdata[2] = sha_len & 0xff; ackdata[3] = (sha_len >> 8) & 0xff; - bflb_eflash_loader_if_write((uint32_t *)ackdata, sha_len + 4); + bflb_eflash_loader_if_write((uint32_t *)ackdata, sha_len + 4); } return ret; @@ -690,9 +678,10 @@ static int32_t bflb_eflash_loader_cmd_set_flash_para(uint16_t cmd, uint8_t *data int32_t bflb_eflash_loader_cmd_process(uint8_t cmdid, uint8_t *data, uint16_t len) { - int i = 0; + int32_t ret = BFLB_EFLASH_LOADER_SUCCESS; - +#if BLSP_BOOT2_SUPPORT_EFLASH_LOADER_FLASH||BLSP_BOOT2_SUPPORT_EFLASH_LOADER_RAM + int i = 0; for (i = 0; i < sizeof(eflash_loader_cmds) / sizeof(eflash_loader_cmds[0]); i++) { if (eflash_loader_cmds[i].cmd == cmdid) { if (EFLASH_LOADER_CMD_ENABLE == eflash_loader_cmds[i].enabled && NULL != eflash_loader_cmds[i].cmd_process) { @@ -704,6 +693,7 @@ int32_t bflb_eflash_loader_cmd_process(uint8_t cmdid, uint8_t *data, uint16_t le break; } } +#endif return ret; } diff --git a/examples/boot2_iap/bflb_eflash_loader_interface.c b/examples/boot2_iap/bflb_eflash_loader_interface.c index 724f2162..a7e2375b 100644 --- a/examples/boot2_iap/bflb_eflash_loader_interface.c +++ b/examples/boot2_iap/bflb_eflash_loader_interface.c @@ -25,10 +25,12 @@ eflash_loader_if_cfg_t * bflb_eflash_loader_if_set(eflash_loader_if_type_t type) eflash_loader_if_cfg.maxlen=BFLB_EFLASH_LOADER_READBUF_SIZE; eflash_loader_if_cfg.timeout=BFLB_EFLASH_LOADER_IF_UART_RX_TIMEOUT; eflash_loader_if_cfg.boot_if_init=bflb_eflash_loader_uart_init; +#if BLSP_BOOT2_SUPPORT_EFLASH_LOADER_FLASH||BLSP_BOOT2_SUPPORT_EFLASH_LOADER_RAM eflash_loader_if_cfg.boot_if_handshake_poll=bflb_eflash_loader_uart_handshake_poll; eflash_loader_if_cfg.boot_if_recv=bflb_eflash_loader_uart_recv; eflash_loader_if_cfg.boot_if_send=bflb_eflash_loader_uart_send; eflash_loader_if_cfg.boot_if_wait_tx_idle=bflb_eflash_loader_usart_wait_tx_idle; +#endif eflash_loader_if_cfg.boot_if_deinit=bflb_eflash_loader_uart_deinit; //eflash_loader_if_cfg.boot_if_changerate=bflb_eflash_loader_uart_change_rate; @@ -87,7 +89,6 @@ int32_t bflb_eflash_loader_if_deinit() return eflash_loader_if_cfg.boot_if_deinit(); } - int32_t bflb_eflash_loader_main() { int32_t ret; @@ -97,7 +98,7 @@ int32_t bflb_eflash_loader_main() uint8_t err_cnt = 0; uint8_t to_cnt = 0; - MSG("bflb_eflash_loader_main\r\n"); + MSG("eflash_loader_main\r\n"); pt_table_dump(); ret = pt_table_get_iap_para(&p_iap_param); if(0 != ret){ @@ -123,7 +124,6 @@ int32_t bflb_eflash_loader_main() break; } - MSG("Recv\r\n"); //eflash_loader_dump_data(recv_buf,total_len); cmd_len = recv_buf[2] + (recv_buf[3] << 8); MSG("cmd_len %d\r\n", cmd_len); diff --git a/examples/boot2_iap/bflb_eflash_loader_uart.c b/examples/boot2_iap/bflb_eflash_loader_uart.c index 9b2037c5..9d9a07e0 100644 --- a/examples/boot2_iap/bflb_eflash_loader_uart.c +++ b/examples/boot2_iap/bflb_eflash_loader_uart.c @@ -47,10 +47,6 @@ static uint32_t g_detected_baudrate; static void bflb_eflash_loader_usart_if_deinit(); struct device *download_uart = NULL; -enum uart_index_type board_get_debug_uart_index(void) -{ - return 1; -} void bflb_dump_data(uint8_t *buf, uint32_t size) { for (int i = 0; i < size; i++) { diff --git a/examples/boot2_iap/blsp_boot2_iap.c b/examples/boot2_iap/blsp_boot2_iap.c deleted file mode 100644 index 285ac7eb..00000000 --- a/examples/boot2_iap/blsp_boot2_iap.c +++ /dev/null @@ -1,601 +0,0 @@ -/** - ****************************************************************************** - * @file blsp_boot2.c - * @version V1.2 - * @date - * @brief This file is the peripheral case c file - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2020 Bouffalo Lab

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of Bouffalo Lab nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -#include "bflb_platform.h" -#include "bflb_eflash_loader_interface.h" -#include "blsp_port.h" -#include "blsp_bootinfo.h" -#include "blsp_media_boot.h" -#include "blsp_boot_decompress.h" -#include "blsp_common.h" -#include "blsp_version.h" -#include "partition.h" -#include "softcrc.h" -#include "hal_uart.h" -#include "hal_flash.h" -#include "hal_boot2.h" -#include "hal_clock.h" - - -uint8_t *g_boot2_read_buf; -boot2_image_config g_boot_img_cfg[2]; -boot2_efuse_hw_config g_efuse_cfg; -uint8_t g_ps_mode = BFLB_PSM_ACTIVE; -uint8_t g_cpu_count; -uint32_t g_user_hash_ignored = 0; -uint8_t g_usb_init_flag = 0; - - - -/****************************************************************************/ /** - * @brief Boot2 runs error call back function - * - * @param log: Log to print - * - * @return None - * -*******************************************************************************/ -static void blsp_boot2_on_error(void *log) -{ - while (1) { -#if BLSP_BOOT2_SUPPORT_USB_IAP - bflb_eflash_loader_if_set(BFLB_EFLASH_LOADER_IF_USB); - if(0 == g_usb_init_flag){ - bflb_eflash_loader_if_init(); - g_usb_init_flag = 1; - } - - if (0 == bflb_eflash_loader_if_handshake_poll(1)) { - bflb_eflash_loader_main(); - } -#endif - bflb_eflash_loader_if_set(BFLB_EFLASH_LOADER_IF_UART); - if (0 == bflb_eflash_loader_if_handshake_poll(0)) { - bflb_eflash_loader_main(); - } - - MSG_ERR("%s\r\n", (char *)log); - ARCH_Delay_MS(500); - } -} - -/****************************************************************************/ /** - * @brief Boot2 Dump partition entry - * - * @param ptEntry: Partition entry pointer to dump - * - * @return None - * -*******************************************************************************/ -void blsp_dump_pt_entry(pt_table_entry_config *pt_entry) -{ - MSG("Name=%s\r\n", pt_entry->name); - MSG("Age=%d\r\n", (unsigned int)pt_entry->age); - MSG("active Index=%d\r\n", (unsigned int)pt_entry->active_index); - MSG("active start_address=%08x\r\n", (unsigned int)pt_entry->start_address[pt_entry->active_index & 0x01]); -} - -/****************************************************************************/ /** - * @brief Boot2 check XZ FW and do decompression - * - * @param activeID: Active partition table ID - * @param ptStuff: Pointer of partition table stuff - * @param ptEntry: Pointer of active entry - * - * @return 1 for find XZ FW and decompress success, 0 for other cases - * -*******************************************************************************/ -#if BLSP_BOOT2_SUPPORT_DECOMPRESS -static int blsp_boot2_check_xz_fw(pt_table_id_type activeID, pt_table_stuff_config *ptStuff, pt_table_entry_config *ptEntry) -{ - uint8_t buf[6]; - - if(BFLB_BOOT2_SUCCESS != blsp_mediaboot_read(ptEntry->start_address[ptEntry->active_index], buf, sizeof(buf))) - { - MSG_ERR("Read fw fail\r\n"); - return 0; - } - - if(blsp_boot2_dump_critical_flag()) - { - blsp_dump_data(buf, sizeof(buf)); - } - - if(blsp_boot2_verify_xz_header(buf) == 1) - { - MSG("XZ image\r\n"); - - if(BFLB_BOOT2_SUCCESS == blsp_boot2_update_fw(activeID, ptStuff, ptEntry)) - { - return 1; - } - else - { - MSG_ERR("Img decompress fail\r\n"); - /* Set flag to make it not boot */ - ptEntry->active_index = 0; - ptEntry->start_address[0] = 0; - return 0; - } - } - - return 0; -} -#endif - -/****************************************************************************/ /** - * @brief Boot2 copy firmware from OTA region to normal region - * - * @param activeID: Active partition table ID - * @param ptStuff: Pointer of partition table stuff - * @param ptEntry: Pointer of active entry - * - * @return BL_Err_Type - * -*******************************************************************************/ -static int blsp_boot2_do_fw_copy(pt_table_id_type active_id, pt_table_stuff_config *pt_stuff, pt_table_entry_config *pt_entry) -{ - uint8_t active_index = pt_entry->active_index; - uint32_t src_address = pt_entry->start_address[active_index & 0x01]; - uint32_t dest_address = pt_entry->start_address[!(active_index & 0x01)]; - uint32_t dest_max_size = pt_entry->max_len[!(active_index & 0x01)]; - uint32_t total_len = pt_entry->len; - uint32_t deal_len = 0; - uint32_t cur_len = 0; - - MSG("OTA copy src address %08x, dest address %08x, total len %d\r\n",src_address,dest_address,total_len); - - if (SUCCESS != flash_erase(dest_address, dest_max_size)) { - MSG_ERR("Erase flash fail"); - return BFLB_BOOT2_FLASH_ERASE_ERROR; - } - - while (deal_len < total_len) { - cur_len = total_len - deal_len; - - if (cur_len > BFLB_BOOT2_READBUF_SIZE) { - cur_len = BFLB_BOOT2_READBUF_SIZE; - } - - if (BFLB_BOOT2_SUCCESS != blsp_mediaboot_read(src_address, g_boot2_read_buf, cur_len)) { - MSG_ERR("Read FW fail when copy\r\n"); - return BFLB_BOOT2_FLASH_READ_ERROR; - } - - if (SUCCESS != flash_write(dest_address, g_boot2_read_buf, cur_len)) { - MSG_ERR("Write flash fail"); - return BFLB_BOOT2_FLASH_WRITE_ERROR; - } - - src_address += cur_len; - dest_address += cur_len; - deal_len += cur_len; - } - - return BFLB_BOOT2_SUCCESS; -} - -/****************************************************************************/ /** - * @brief Boot2 deal with one firmware - * - * @param activeID: Active partition table ID - * @param ptStuff: Pointer of partition table stuff - * @param ptEntry: Pointer of active entry - * @param fwName: Firmware name pointer - * @param type: Firmware name ID - * - * @return 0 for partition table changed,need re-parse,1 for partition table or entry parsed successfully - * -*******************************************************************************/ -static int blsp_boot2_deal_one_fw(pt_table_id_type active_id, pt_table_stuff_config *pt_stuff, - pt_table_entry_config *pt_entry, uint8_t *fw_name, - pt_table_entry_type type) -{ - uint32_t ret; - - if (fw_name != NULL) { - MSG("Get FW:%s\r\n", fw_name); - ret = pt_table_get_active_entries_by_name(pt_stuff, fw_name, pt_entry); - } else { - MSG("Get FW ID:%d\r\n", type); - ret = pt_table_get_active_entries_by_id(pt_stuff, type, pt_entry); - } - - if (PT_ERROR_SUCCESS != ret) { - MSG_ERR("Entry not found\r\n"); - } else { - //blsp_dump_pt_entry(pt_entry); - MSG("Check Img\r\n"); -#if BLSP_BOOT2_SUPPORT_DECOMPRESS - if(blsp_boot2_check_xz_fw(active_id,pt_stuff,pt_entry)==1){ - return 0; - } -#endif - /* Check if this partition need copy */ - if (pt_entry->active_index >= 2) { - MSG("Find OTA image, do image copy\r\n"); - if (BFLB_BOOT2_SUCCESS == blsp_boot2_do_fw_copy(active_id, pt_stuff, pt_entry)) { - - pt_entry->active_index = !(pt_entry->active_index & 0x01); - pt_entry->age++; - ret = pt_table_update_entry((pt_table_id_type)(!active_id), pt_stuff, pt_entry); - - if (ret != PT_ERROR_SUCCESS) { - MSG_ERR("Update Partition table entry fail, After Image Copy\r\n"); - return BFLB_BOOT2_FAIL; - }else{ - MSG("OTA image copy done\r\n"); - } - - return 0; - } - } - } - - return 1; -} - -/****************************************************************************/ /** - * @brief Boot2 Roll back pt entry - * - * @param activeID: Active partition table ID - * @param ptStuff: Pointer of partition table stuff - * @param ptEntry: Pointer of active entry - * - * @return boot_error_code - * -*******************************************************************************/ -#ifdef BLSP_BOOT2_ROLLBACK -static int32_t blsp_boot2_rollback_ptentry(pt_table_id_type active_id, pt_table_stuff_config *pt_stuff, pt_table_entry_config *pt_entry) -{ - int32_t ret; - - pt_entry->active_index = !(pt_entry->active_index & 0x01); - pt_entry->age++; - ret = pt_table_update_entry((pt_table_id_type)(!active_id), pt_stuff, pt_entry); - - if (ret != PT_ERROR_SUCCESS) { - MSG_ERR("Update PT entry fail\r\n"); - return BFLB_BOOT2_FAIL; - } - - return BFLB_BOOT2_SUCCESS; -} -#endif - -/****************************************************************************/ /** - * @brief Boot2 get mfg start up request - * - * @param activeID: Active partition table ID - * @param ptStuff: Pointer of partition table stuff - * @param ptEntry: Pointer of active entry - * - * @return 0 for partition table changed,need re-parse,1 for partition table or entry parsed successfully - * -*******************************************************************************/ -static void blsp_boot2_get_mfg_startreq(pt_table_id_type active_id, pt_table_stuff_config *pt_stuff, pt_table_entry_config *pt_entry, uint8_t *user_fw_name) -{ - uint32_t ret; - uint32_t len = 0; - uint8_t tmp[16 + 1] = { 0 }; - - ret = pt_table_get_active_entries_by_name(pt_stuff, (uint8_t *)"mfg", pt_entry); - - if (PT_ERROR_SUCCESS == ret) { - MSG("read mfg flag addr:%08x,", pt_entry->start_address[0] + MFG_START_REQUEST_OFFSET); - flash_read(pt_entry->start_address[0] + MFG_START_REQUEST_OFFSET, tmp, sizeof(tmp) - 1); - MSG("%s\r\n", tmp); - if (tmp[0] == '0' || tmp[0] == '1') { - len = strlen((char *)tmp); - if (len < 9) { - arch_memcpy(user_fw_name, tmp, len); - MSG("%s", tmp); - } - } - } else { - MSG("MFG not found\r\n"); - } -} - -/****************************************************************************/ /** - * @brief Boot2 main function - * - * @param None - * - * @return Return value - * -*******************************************************************************/ -int main(void) -{ - uint32_t ret = 0, i = 0; - pt_table_stuff_config pt_table_stuff[2]; - pt_table_id_type active_id; - /* Init to zero incase only one cpu boot up*/ - pt_table_entry_config pt_entry[BFLB_BOOT2_CPU_MAX] = { 0 }; - uint32_t boot_header_addr[BFLB_BOOT2_CPU_MAX] = { 0 }; - uint8_t boot_need_rollback[BFLB_BOOT2_CPU_MAX] = { 0 }; - uint8_t pt_parsed = 1; - uint8_t user_fw_name[9] = { 0 }; - uint32_t user_fw; -#ifdef BLSP_BOOT2_ROLLBACK - uint8_t roll_backed = 0; -#endif - - uint8_t mfg_mode_flag = 0; - //boot_clk_config clk_cfg; - uint8_t flash_cfg_buf[4 + sizeof(SPI_Flash_Cfg_Type) + 4] = { 0 }; - uint32_t crc; - uint8_t *flash_cfg = NULL; - uint32_t flash_cfg_len = 0; - - system_mtimer_clock_init(); - peripheral_clock_init(); - - -#if (BLSP_BOOT2_MODE == BOOT2_MODE_RELEASE) - bflb_platform_print_set(1); -#endif - -#if (BLSP_BOOT2_MODE == BOOT2_MODE_DEBUG) - bflb_platform_print_set(0); -#endif - -#if (BLSP_BOOT2_MODE == BOOT2_MODE_DEEP_DEBUG) - bflb_platform_print_set(0); - hal_boot2_debug_uart_gpio_init(); -#endif - - - bflb_eflash_loader_if_set(BFLB_EFLASH_LOADER_IF_UART); - bflb_eflash_loader_if_init(); - - - - - simple_malloc_init(g_malloc_buf, sizeof(g_malloc_buf)); - g_boot2_read_buf = vmalloc(BFLB_BOOT2_READBUF_SIZE); - - hal_boot2_custom(); - flash_init(); - - bflb_platform_deinit_time(); - - if (blsp_boot2_get_feature_flag() == BLSP_BOOT2_CP_FLAG) { - MSG("BLSP_Boot2_CP:%s,%s\r\n", __DATE__, __TIME__); - } else if (blsp_boot2_get_feature_flag() == BLSP_BOOT2_MP_FLAG) { - MSG("BLSP_Boot2_MC:%s,%s\r\n", __DATE__, __TIME__); - } else { - MSG("BLSP_Boot2_SP:%s,%s\r\n", __DATE__, __TIME__); - } -#ifdef BL_SDK_VER - MSG("sdk:%s\r\n", BL_SDK_VER); -#else - MSG("MCU SDK:%s\r\n", MCU_SDK_VERSION); - MSG("BSP Driver:%s\r\n", BSP_DRIVER_VERSION); - MSG("BSP Common:%s\r\n", BSP_COMMON_VERSION); -#endif - - - MSG("Get efuse config\r\n"); - hal_boot2_get_efuse_cfg(&g_efuse_cfg); - - /* Reset Sec_Eng for using */ - hal_boot2_reset_sec_eng(); - if (blsp_boot2_get_feature_flag() != BLSP_BOOT2_SP_FLAG) { - /* Get cpu count info */ - g_cpu_count = blsp_boot2_get_cpu_count(); - } else { - g_cpu_count = 1; - } - - /* Get power save mode */ - g_ps_mode = blsp_read_power_save_mode(); - - /* Get User specified FW */ - user_fw = hal_boot2_get_user_fw(); - arch_memcpy(user_fw_name, &user_fw, 4); - MSG("user_fw %s\r\n",user_fw_name); - - /* Set flash operation function, read via xip */ - pt_table_set_flash_operation(flash_erase, flash_write, flash_read); - -#if BLSP_BOOT2_SUPPORT_USB_IAP - if(memcmp(user_fw_name,(char *)"USB",3) == 0){ - hal_boot2_clr_user_fw(); - bflb_eflash_loader_if_set(BFLB_EFLASH_LOADER_IF_USB); - bflb_eflash_loader_if_init(); - g_usb_init_flag = 1; - if (0 == bflb_eflash_loader_if_handshake_poll(user_fw_name[3])) { - bflb_eflash_loader_main(); - } - } -#endif - - pt_table_dump(); - - while (1) { - mfg_mode_flag = 0; - - do { - active_id = pt_table_get_active_partition_need_lock(pt_table_stuff); - - if (PT_TABLE_ID_INVALID == active_id) { - blsp_boot2_on_error("No valid PT\r\n"); - } - - MSG("Active PT:%d,Age %d\r\n", active_id, pt_table_stuff[active_id].pt_table.age); - - blsp_boot2_get_mfg_startreq(active_id, &pt_table_stuff[active_id], &pt_entry[0], user_fw_name); - - /* Get entry and boot */ - if (user_fw_name[0] == '0') { - g_user_hash_ignored = 1; - pt_parsed = blsp_boot2_deal_one_fw(active_id, &pt_table_stuff[active_id], &pt_entry[0], &user_fw_name[1], PT_ENTRY_FW_CPU0); - if (pt_parsed == 0) { - continue; - } else { - hal_boot2_clr_user_fw(); - } - mfg_mode_flag = 1; - user_fw_name[0] = 0; - } else if (user_fw_name[0] == '1' && g_cpu_count > 1) { - g_user_hash_ignored = 1; - pt_parsed = blsp_boot2_deal_one_fw(active_id, &pt_table_stuff[active_id], &pt_entry[1], &user_fw_name[1], PT_ENTRY_FW_CPU1); - if (pt_parsed == 0) { - continue; - } else { - hal_boot2_clr_user_fw(); - } - mfg_mode_flag = 1; - user_fw_name[0] = 0; - } else { - pt_parsed = blsp_boot2_deal_one_fw(active_id, &pt_table_stuff[active_id], &pt_entry[0], NULL, PT_ENTRY_FW_CPU0); - if (pt_parsed == 0) { - continue; - } - if (g_cpu_count > 1) { - pt_parsed = blsp_boot2_deal_one_fw(active_id, &pt_table_stuff[active_id], &pt_entry[1], NULL, PT_ENTRY_FW_CPU1); - if (pt_parsed == 0) { - continue; - } - } - } - } while (pt_parsed == 0); - - /* Pass data to App*/ - blsp_boot2_pass_parameter(NULL, 0); - /* Pass active partition table ID */ - blsp_boot2_pass_parameter(&active_id, 4); - /* Pass active partition table content: table header+ entries +crc32 */ - blsp_boot2_pass_parameter(&pt_table_stuff[active_id], sizeof(pt_table_config) + 4 + - pt_table_stuff[active_id].pt_table.entryCnt * sizeof(pt_table_entry_config)); - - /* Pass flash config */ - if (pt_entry[0].start_address[pt_entry[0].active_index] != 0) { - //flash_read(BLSP_BOOT2_XIP_BASE + pt_entry[0].start_address[pt_entry[0].active_index] + 8, flash_cfg_buf, sizeof(flash_cfg_buf)); - /* Include magic and CRC32 */ - flash_get_cfg(&flash_cfg,&flash_cfg_len); - arch_memcpy(flash_cfg_buf, "FCFG", 4); - arch_memcpy(flash_cfg_buf+4, flash_cfg, flash_cfg_len); - crc = BFLB_Soft_CRC32(flash_cfg, flash_cfg_len); - arch_memcpy(flash_cfg_buf+4+flash_cfg_len, &crc, sizeof(crc)); - blsp_boot2_pass_parameter(flash_cfg_buf, sizeof(flash_cfg_buf)); - } - - MSG("Boot start\r\n"); - - for (i = 0; i < g_cpu_count; i++) { - boot_header_addr[i] = pt_entry[i].start_address[pt_entry[i].active_index]; - } - -#ifdef BLSP_BOOT2_ROLLBACK - /* mfg mode do not need roll back */ - if (roll_backed == 0 && mfg_mode_flag == 0) { - ret = blsp_mediaboot_main(boot_header_addr, boot_need_rollback, 1); - } else { - ret = blsp_mediaboot_main(boot_header_addr, boot_need_rollback, 0); - } -#else - ret = blsp_mediaboot_main(boot_header_addr, boot_need_rollback, 0); -#endif - - if (mfg_mode_flag == 1) { - continue; - } - -#ifdef BLSP_BOOT2_ROLLBACK - - /* If rollback is done, we still fail, break */ - if (roll_backed) { - break; - } - - MSG("Boot return 0x%04x\r\n", ret); - MSG("Check Rollback\r\n"); - - for (i = 0; i < g_cpu_count; i++) { - if (boot_need_rollback[i] != 0) { - MSG("Rollback %d\r\n", i); - - if (BFLB_BOOT2_SUCCESS == blsp_boot2_rollback_ptentry(active_id, &pt_table_stuff[active_id], &pt_entry[i])) { - roll_backed = 1; - } - } - } - - /* If need no rollback, boot fail due to other reseaon instead of imgae issue,break */ - if (roll_backed == 0) { - break; - } - -#else - break; -#endif - } - - /* We should never get here unless boot fail */ - MSG_ERR("Media boot return %d\r\n", ret); - - while (1) { -#if BLSP_BOOT2_SUPPORT_USB_IAP - bflb_eflash_loader_if_set(BFLB_EFLASH_LOADER_IF_USB); - if(0 == g_usb_init_flag){ - bflb_eflash_loader_if_init(); - g_usb_init_flag = 1; - } - - if (0 == bflb_eflash_loader_if_handshake_poll(1)) { - bflb_eflash_loader_main(); - } -#endif - bflb_eflash_loader_if_set(BFLB_EFLASH_LOADER_IF_UART); - if (0 == bflb_eflash_loader_if_handshake_poll(0)) { - bflb_eflash_loader_main(); - } - - MSG_ERR("BLSP boot2 fail\r\n"); - ARCH_Delay_MS(500); - } -} - -void bfl_main() -{ - main(); -} - - - - diff --git a/examples/boot2_iap/blsp_boot2_iap_flash.ld b/examples/boot2_iap/blsp_boot2_iap_flash.ld deleted file mode 100644 index 4f967b47..00000000 --- a/examples/boot2_iap/blsp_boot2_iap_flash.ld +++ /dev/null @@ -1,205 +0,0 @@ -/**************************************************************************************** -* @file map.txt -* -* @brief This file is the map file (gnuarm or armgcc). -* -* Copyright (C) BouffaloLab 2018 -* -**************************************************************************************** -*/ - -/* configure the CPU type */ -OUTPUT_ARCH( "riscv" ) -/* link with the standard c library */ -INPUT(-lc) -/* link with the standard GCC library */ -INPUT(-lgcc) -/* configure the entry point */ -ENTRY(_enter) - -StackSize = 0x1000; /* 4KB */ -HeapSize = 0x1000; /* 4KB */ - -MEMORY -{ - xip_memory (rx) : ORIGIN = 0x23000000, LENGTH = 64K - itcm_memory (rx) : ORIGIN = 0x22014000, LENGTH = 16K - dtcm_memory (rx) : ORIGIN = 0x42018000, LENGTH = 32K - ram_memory (!rx) : ORIGIN = 0x42020000, LENGTH = 60K -} - -SECTIONS -{ - PROVIDE(__metal_chicken_bit = 0); - - .text : - { - . = ALIGN(4); - __text_code_start__ = .; - - KEEP (*(.text.metal.init.enter)) - KEEP (*(SORT_NONE(.init))) - /* section information for finsh shell */ - . = ALIGN(4); - _shell_command_start = .; - KEEP(*(shellCommand)) - _shell_command_end = .; - - *(EXCLUDE_FILE ( *bl702_uart.c.obj* *hal_uart.c.obj* ) .text*) - - *(.rodata) - *(.rodata.*) - *(.srodata) - *(.srodata.*) - - . = ALIGN(4); - __text_code_end__ = .; - } > xip_memory - - . = ALIGN(4); - __itcm_load_addr = .; - - .itcm_region : AT (__itcm_load_addr) - { - . = ALIGN(4); - __tcm_code_start__ = .; - *(.tcm_code) - *(.tcm_const) - *(.sclock_rlt_code) - *(.sclock_rlt_const) - *bl602_romapi.o(.text) - *bl602_romapi.o(.text.*) - *bl602_romapi.o(.rodata) - *bl602_romapi.o(.rodata.*) - *bl602_romapi.o(.srodata) - *bl602_romapi.o(.srodata.*) - *bl702_uart.c.obj* (.text*) - *hal_uart.c.obj* (.text*) - . = ALIGN(4); - __tcm_code_end__ = .; - - } > itcm_memory - - __dtcm_load_addr = __itcm_load_addr + SIZEOF(.itcm_region); - - .dtcm_region : AT (__dtcm_load_addr) - { - . = ALIGN(4); - __tcm_data_start__ = .; - - *(.tcm_data) - /* *finger_print.o(.data*) */ - - . = ALIGN(4); - __tcm_data_end__ = .; - } > dtcm_memory - - /* .heap_dummy section doesn't contains any symbols. It is only - * used for linker to calculate size of heap sections, and assign - * values to heap symbols later */ - .heap_dummy (NOLOAD): - { - . = ALIGN(0x4); - . = . + HeapSize; - . = ALIGN(0x4); - } > dtcm_memory - - _HeapBase = ORIGIN(dtcm_memory) + LENGTH(dtcm_memory) - StackSize - HeapSize; - _HeapSize = HeapSize; - - /* Check if data + heap + stack exceeds RAM limit */ - ASSERT(_HeapBase >= __tcm_data_end__, "region RAM overflowed with stack") - - /*************************************************************************/ - /* .stack_dummy section doesn't contains any symbols. It is only - * used for linker to calculate size of stack sections, and assign - * values to stack symbols later */ - .stack_dummy (NOLOAD): - { - . = ALIGN(0x4); - . = . + StackSize; - . = ALIGN(0x4); - } > dtcm_memory - - /* Set stack top to end of RAM, and stack limit move down by - * size of stack_dummy section */ - __StackTop = ORIGIN(dtcm_memory) + LENGTH(dtcm_memory); - __StackLimit = __StackTop - SIZEOF(.stack_dummy); - - /* Check if data + heap + stack exceeds RAM limit */ - ASSERT(__StackLimit >= __tcm_data_end__, "region RAM overflowed with stack") - /*************************************************************************/ - - __system_ram_load_addr = __dtcm_load_addr + SIZEOF(.dtcm_region); - - .system_ram_data_region : AT (__system_ram_load_addr) - { - . = ALIGN(4); - __system_ram_data_start__ = .; - - *(.system_ram) - - . = ALIGN(4); - __system_ram_data_end__ = .; - } > ram_memory - - __ram_load_addr = __system_ram_load_addr + SIZEOF(.system_ram_data_region); - - /* Data section */ - RAM_DATA : AT (__ram_load_addr) - { - . = ALIGN(4); - __ram_data_start__ = .; - - PROVIDE( __global_pointer$ = . + 0x800 ); - - *(.data) - *(.data.*) - *(.sdata) - *(.sdata.*) - *(.sdata2) - *(.sdata2.*) - - . = ALIGN(4); - __ram_data_end__ = .; - } > ram_memory - - .bss (NOLOAD) : - { - . = ALIGN(4); - __bss_start__ = .; - - *(.bss*) - *(.sbss*) - *(COMMON) - - . = ALIGN(4); - __bss_end__ = .; - } > ram_memory - - .noinit_data (NOLOAD) : - { - . = ALIGN(4); - __noinit_data_start__ = .; - - *(.noinit_data*) - - . = ALIGN(4); - __noinit_data_end__ = .; - } > ram_memory - - .heap (NOLOAD): - { - . = ALIGN(4); - __HeapBase = .; - - /*__end__ = .;*/ - /*end = __end__;*/ - KEEP(*(.heap*)) - - . = ALIGN(4); - __HeapLimit = .; - } > ram_memory - -} - diff --git a/examples/boot2_iap/blsp_boot_decompress.c b/examples/boot2_iap/blsp_boot_decompress.c index 042e53b7..fe0787b3 100644 --- a/examples/boot2_iap/blsp_boot_decompress.c +++ b/examples/boot2_iap/blsp_boot_decompress.c @@ -237,11 +237,6 @@ int32_t blsp_boot2_update_fw(pt_table_id_type active_id, pt_table_stuff_config * return BFLB_BOOT2_SUCCESS; } - - MSG("Do decompress,xz start address %08x,dest address %08x\r\n",\ - pt_entry->start_address[active_index],\ - pt_entry->start_address[!(active_index & 0x01)]); - /* Do decompress */ if (BFLB_BOOT2_SUCCESS == blsp_boot2_fw_decompress(pt_entry->start_address[active_index], pt_entry->start_address[!(active_index & 0x01)], @@ -252,7 +247,7 @@ int32_t blsp_boot2_update_fw(pt_table_id_type active_id, pt_table_stuff_config * ret = pt_table_update_entry((pt_table_id_type)(!active_id), pt_stuff, pt_entry); if (ret != PT_ERROR_SUCCESS) { - MSG_ERR("Do Decompress Update Partition table entry fail\r\n"); + MSG_ERR("Update Partition table entry fail\r\n"); return BFLB_BOOT2_FAIL; } } else { diff --git a/examples/boot2_iap/blsp_boot_parser.c b/examples/boot2_iap/blsp_boot_parser.c index c45a9adf..c2de994b 100644 --- a/examples/boot2_iap/blsp_boot_parser.c +++ b/examples/boot2_iap/blsp_boot_parser.c @@ -45,8 +45,6 @@ extern uint32_t g_user_hash_ignored; -struct device *dev_check_hash; - /****************************************************************************/ /** * @brief Check if the input public key is the same as burned in the efuse * @@ -56,13 +54,13 @@ struct device *dev_check_hash; * @return 1 for valid and 0 for invalid * *******************************************************************************/ -static uint32_t blsp_boot_parse_is_pkhash_valid(uint8_t cpu_type, uint8_t *pkhash) +static uint32_t blsp_boot_parse_is_pkhash_valid(uint8_t pk_src, uint8_t *pkhash) { - if (cpu_type == BFLB_BOOT2_CPU_0) { + if (pk_src == BFLB_BOOT2_CPU_0) { if (0 == memcmp(g_efuse_cfg.pk_hash_cpu0, pkhash, BFLB_BOOT2_PK_HASH_SIZE)) { return 1; } - } else if (cpu_type == BFLB_BOOT2_CPU_1) { + } else if (pk_src == BFLB_BOOT2_CPU_1) { if (0 == memcmp(g_efuse_cfg.pk_hash_cpu1, pkhash, BFLB_BOOT2_PK_HASH_SIZE)) { return 1; } @@ -71,145 +69,7 @@ static uint32_t blsp_boot_parse_is_pkhash_valid(uint8_t cpu_type, uint8_t *pkhas return 0; } -/****************************************************************************/ /** - * @brief Check if the input public key is the same as burned in the efuse - * - * @param g_boot_img_cfg: Boot image config pointer - * @param data: Image data pointer - * - * @return boot_error_code type - * -*******************************************************************************/ -int32_t blsp_boot_parse_bootheader(boot2_image_config *boot_img_cfg, uint8_t *data) -{ - boot_header_config *header = (boot_header_config *)data; - uint32_t crc; - uint32_t crc_pass = 0; - uint32_t i = 0; - uint32_t *phash = (uint32_t *)header->hash; - int32_t ret; - if (header->bootCfg.bval.crcIgnore == 1 && header->crc32 == BFLB_BOOT2_DEADBEEF_VAL) { - MSG("Crc ignored\r\n"); - crc_pass = 1; - } else { - crc = BFLB_Soft_CRC32((uint8_t *)header, sizeof(boot_header_config) - sizeof(header->crc32)); - - if (header->crc32 == crc) { - crc_pass = 1; - } - } - - if (crc_pass) { - if (header->bootCfg.bval.notLoadInBoot) { - return BFLB_BOOT2_IMG_BOOTHEADER_NOT_LOAD_ERROR; - } - - /* Get which CPU's img it is*/ - for (i = 0; i < BFLB_BOOT2_CPU_MAX; i++) { - if (0 == memcmp((void *)&header->magicCode, BFLB_BOOT2_CPU0_MAGIC, - sizeof(header->magicCode))) { - break; - } else if (0 == memcmp((void *)&header->magicCode, BFLB_BOOT2_CPU1_MAGIC, - sizeof(header->magicCode))) { - break; - } - } - - if (i == BFLB_BOOT2_CPU_MAX) { - /* No cpu img magic match */ - MSG_ERR("Magic code error\r\n"); - return BFLB_BOOT2_IMG_BOOTHEADER_MAGIC_ERROR; - } - - boot_img_cfg->cpu_type = i; - boot_img_cfg->entry_point = 0; - /* Set image valid 0 as default */ - boot_img_cfg->img_valid = 0; - - /* Deal with pll config */ - - /* Encrypt and sign */ - boot_img_cfg->encrypt_type = header->bootCfg.bval.encrypt_type; - boot_img_cfg->sign_type = header->bootCfg.bval.sign; - boot_img_cfg->key_sel = header->bootCfg.bval.key_sel; - - /* Xip relative */ - boot_img_cfg->no_segment = header->bootCfg.bval.no_segment; - boot_img_cfg->cache_enable = header->bootCfg.bval.cache_enable; - boot_img_cfg->aes_region_lock = header->bootCfg.bval.aes_region_lock; - boot_img_cfg->halt_cpu1 = header->bootCfg.bval.halt_cpu1; - boot_img_cfg->cache_way_disable = header->bootCfg.bval.cache_way_disable; - boot_img_cfg->hash_ignore = header->bootCfg.bval.hash_ignore; - - /* Firmware len*/ - boot_img_cfg->img_segment_info.img_len = header->img_segment_info.img_len; - - /* Boot entry and flash offset */ - boot_img_cfg->entry_point = header->bootEntry; - boot_img_cfg->img_start.flash_offset = header->img_start.flash_offset; - - MSG("sign %d,encrypt:%d\r\n", boot_img_cfg->sign_type, - boot_img_cfg->encrypt_type); - - /* Check encrypt and sign match*/ - if (g_efuse_cfg.encrypted[i] != 0) { - if (boot_img_cfg->encrypt_type == 0) { - MSG_ERR("Encrypt not fit\r\n"); - return BFLB_BOOT2_IMG_BOOTHEADER_ENCRYPT_NOTFIT; - } - } - - if (g_efuse_cfg.sign[i] ^ boot_img_cfg->sign_type) { - MSG_ERR("sign not fit\r\n"); - boot_img_cfg->sign_type = g_efuse_cfg.sign[i]; - return BFLB_BOOT2_IMG_BOOTHEADER_SIGN_NOTFIT; - } - - if (g_ps_mode == BFLB_PSM_HBN && (!g_efuse_cfg.hbn_check_sign)) { - /* In HBN Mode, if user select to ignore hash and sign*/ - boot_img_cfg->hash_ignore = 1; - } else if ((boot_img_cfg->hash_ignore == 1 && *phash != BFLB_BOOT2_DEADBEEF_VAL) || - g_efuse_cfg.sign[i] != 0) { - /* If signed or user not really want to ignore, hash can't be ignored*/ - boot_img_cfg->hash_ignore = 0; - } - - if (g_user_hash_ignored) { - boot_img_cfg->hash_ignore = 1; - } - - ARCH_MemCpy_Fast(boot_img_cfg->img_hash, header->hash, sizeof(header->hash)); - - if (boot_img_cfg->img_segment_info.img_len == 0) { - return BFLB_BOOT2_IMG_SEGMENT_CNT_ERROR; - } - - /* Start hash here*/ - //Sec_Eng_SHA256_Init(&g_sha_ctx, SEC_ENG_SHA_ID0, SEC_ENG_SHA256, g_sha_tmp_buf, g_padding); - //Sec_Eng_SHA_Start(SEC_ENG_SHA_ID0); - device_unregister("dev_check_hash"); - sec_hash_sha256_register(SEC_HASH0_INDEX,"dev_check_hash"); - dev_check_hash = device_find("dev_check_hash"); - if(dev_check_hash){ - ret = device_open(dev_check_hash, 0); - if(ret){ - MSG_ERR("hash dev open err\r\n"); - return BFLB_BOOT2_FAIL; - } - }else{ - MSG_ERR("hash dev find err\r\n"); - return BFLB_BOOT2_FAIL; - } - - } else { - MSG_ERR("bootheader crc error\r\n"); - blsp_dump_data((uint8_t *)&crc, 4); - return BFLB_BOOT2_IMG_BOOTHEADER_CRC_ERROR; - } - - return BFLB_BOOT2_SUCCESS; -} /****************************************************************************/ /** * @brief Parse public key @@ -224,38 +84,18 @@ int32_t blsp_boot_parse_bootheader(boot2_image_config *boot_img_cfg, uint8_t *da int32_t blsp_boot_parse_pkey(boot2_image_config *g_boot_img_cfg, uint8_t *data, uint8_t own) { boot_pk_config *cfg = (boot_pk_config *)data; - uint32_t pk_hash[BFLB_BOOT2_PK_HASH_SIZE / 4]; - int32_t ret; - + uint32_t pk_hash[BFLB_BOOT2_PK_HASH_SIZE / 4]; if (cfg->crc32 == BFLB_Soft_CRC32((uint8_t *)cfg, sizeof(boot_pk_config) - 4)) { /* Check public key with data info in OTP*/ - //Sec_Eng_SHA256_Update(&g_sha_ctx, SEC_ENG_SHA_ID0, data, BFLB_BOOT2_ECC_KEYXSIZE + BFLB_BOOT2_ECC_KEYYSIZE); - //Sec_Eng_SHA256_Finish(&g_sha_ctx, SEC_ENG_SHA_ID0, (uint8_t *)pk_hash); - - //Sec_Eng_SHA256_Init(&g_sha_ctx, SEC_ENG_SHA_ID0, SEC_ENG_SHA256, g_sha_tmp_buf, g_padding); - //Sec_Eng_SHA_Start(SEC_ENG_SHA_ID0); - - device_write(dev_check_hash, 0, data, BFLB_BOOT2_ECC_KEYXSIZE + BFLB_BOOT2_ECC_KEYYSIZE); - device_read(dev_check_hash,0,pk_hash,0); - - device_unregister("dev_check_hash"); - sec_hash_sha256_register(SEC_HASH0_INDEX,"dev_check_hash"); - dev_check_hash = device_find("dev_check_hash"); - if(dev_check_hash){ - ret = device_open(dev_check_hash, 0); - if(ret){ - MSG_ERR("hash dev open err\r\n"); - return BFLB_BOOT2_FAIL; - } - }else{ - MSG_ERR("hash dev find err\r\n"); - return BFLB_BOOT2_FAIL; - } + sec_hash_update(&hash_handle, data, HAL_BOOT2_ECC_KEYXSIZE + HAL_BOOT2_ECC_KEYYSIZE); + sec_hash_finish(&hash_handle, (uint8_t *)pk_hash); + sec_hash_deinit(&hash_handle); + sec_hash_init(&hash_handle, SEC_HASH_SHA256); /* Check pk is valid */ if (own == 1) { - if (1 != blsp_boot_parse_is_pkhash_valid(g_boot_img_cfg->cpu_type, + if (1 != blsp_boot_parse_is_pkhash_valid(g_boot_img_cfg->pk_src, (uint8_t *)pk_hash)) { MSG_ERR("PK sha error\r\n"); return BFLB_BOOT2_IMG_PK_HASH_ERROR; @@ -299,10 +139,10 @@ int32_t blsp_boot_parse_signature(boot2_image_config *g_boot_img_cfg, uint8_t *d if (memcmp(&crc, &cfg->signature[cfg->sig_len], 4) == 0) { if (own == 1) { ARCH_MemCpy_Fast(g_boot_img_cfg->signature, cfg->signature, cfg->sig_len); - g_boot_img_cfg->sig_len = cfg->sig_len; + //g_boot_img_cfg->sig_len = cfg->sig_len; } else { ARCH_MemCpy_Fast(g_boot_img_cfg->signature2, cfg->signature, cfg->sig_len); - g_boot_img_cfg->sig_len2 = cfg->sig_len; + //g_boot_img_cfg->sig_len2 = cfg->sig_len; } } else { MSG_ERR("SIG crc error\r\n"); @@ -329,9 +169,9 @@ int32_t blsp_boot_parse_aesiv(boot2_image_config *g_boot_img_cfg, uint8_t *data) memcpy(g_boot_img_cfg->aes_iv, cfg->aes_iv, sizeof(boot_aes_config)); /* Update image hash */ - if (!g_boot_img_cfg->hash_ignore) { + if (!g_boot_img_cfg->basic_cfg.hash_ignore) { //Sec_Eng_SHA256_Update(&g_sha_ctx, SEC_ENG_SHA_ID0, data, sizeof(boot_aes_config)); - device_write(dev_check_hash, 0, data, sizeof(boot_aes_config)); + sec_hash_update(&hash_handle, data, sizeof(boot_aes_config)); } } else { MSG_ERR("AES IV crc error\r\n"); @@ -362,17 +202,17 @@ int32_t blsp_boot_parser_check_signature(boot2_image_config *g_boot_img_cfg) return BFLB_BOOT2_SUCCESS; } - if(g_boot_img_cfg->sign_type) + if(g_boot_img_cfg->basic_cfg.sign_type) { MSG("Check sig1\r\n"); startTime = bflb_platform_get_time_ms(); - +#if 1 sec_ecdsa_init(&ecdsaHandle, ECP_SECP256R1); ecdsaHandle.publicKeyx = (uint32_t *)g_boot_img_cfg->eckye_x; ecdsaHandle.publicKeyy = (uint32_t *)g_boot_img_cfg->eckey_y; - sec_ecdsa_verify(&ecdsaHandle, (uint32_t *)g_boot_img_cfg->img_hash, sizeof(g_boot_img_cfg->img_hash) / 4, + sec_ecdsa_verify(&ecdsaHandle, (uint32_t *)g_boot_img_cfg->basic_cfg.hash, 8, (uint32_t *)g_boot_img_cfg->signature, (uint32_t *)&g_boot_img_cfg->signature[32]); - +#endif //ret=bflb_ecdsa_verify(0,(uint32_t *)g_boot_img_cfg->img_hash,sizeof(g_boot_img_cfg->img_hash), // (uint32_t *)g_boot_img_cfg->eckye_x,(uint32_t *)g_boot_img_cfg->eckey_y, // (uint32_t *)g_boot_img_cfg->signature,(uint32_t *)&g_boot_img_cfg->signature[32]); @@ -399,18 +239,17 @@ int32_t blsp_boot_parser_check_signature(boot2_image_config *g_boot_img_cfg) *******************************************************************************/ int32_t blsp_boot_parser_check_hash(boot2_image_config *g_boot_img_cfg) { - uint32_t img_hash_cal[BFLB_BOOT2_HASH_SIZE / 4]; + uint32_t img_hash_cal[HAL_BOOT2_IMG_HASH_SIZE / 4]; - if (!g_boot_img_cfg->hash_ignore) { + if (!g_boot_img_cfg->basic_cfg.hash_ignore) { //Sec_Eng_SHA256_Finish(&g_sha_ctx, SEC_ENG_SHA_ID0, (uint8_t *)img_hash_cal); - device_read(dev_check_hash,0,img_hash_cal,0); - device_close(dev_check_hash); + sec_hash_finish(&hash_handle, (uint8_t *)img_hash_cal); + sec_hash_deinit(&hash_handle); - if (memcmp(img_hash_cal, g_boot_img_cfg->img_hash, - sizeof(g_boot_img_cfg->img_hash)) != 0) { + if (memcmp(img_hash_cal, g_boot_img_cfg->basic_cfg.hash,32) != 0) { MSG_ERR("Hash error\r\n"); - blsp_dump_data(img_hash_cal, BFLB_BOOT2_HASH_SIZE); - blsp_dump_data(g_boot_img_cfg->img_hash, BFLB_BOOT2_HASH_SIZE); + blsp_dump_data(img_hash_cal, HAL_BOOT2_IMG_HASH_SIZE); + blsp_dump_data(g_boot_img_cfg->basic_cfg.hash, HAL_BOOT2_IMG_HASH_SIZE); return BFLB_BOOT2_IMG_HASH_ERROR; } else { MSG("Hash Success\r\n"); diff --git a/examples/boot2_iap/blsp_boot_parser.h b/examples/boot2_iap/blsp_boot_parser.h index 9c77d15f..253b8d9e 100644 --- a/examples/boot2_iap/blsp_boot_parser.h +++ b/examples/boot2_iap/blsp_boot_parser.h @@ -38,7 +38,6 @@ #include "stdint.h" -int32_t blsp_boot_parse_bootheader(boot2_image_config *g_boot_img_cfg, uint8_t *data); int32_t blsp_boot_parse_pkey(boot2_image_config *g_boot_img_cfg, uint8_t *data, uint8_t own); int32_t blsp_boot_parse_signature(boot2_image_config *g_boot_img_cfg, uint8_t *data, uint8_t own); int32_t blsp_boot_parse_aesiv(boot2_image_config *g_boot_img_cfg, uint8_t *data); diff --git a/examples/boot2_iap/blsp_bootinfo.h b/examples/boot2_iap/blsp_bootinfo.h index 9d139cf6..eeb09190 100644 --- a/examples/boot2_iap/blsp_bootinfo.h +++ b/examples/boot2_iap/blsp_bootinfo.h @@ -40,31 +40,25 @@ #include "blsp_port.h" #include "hal_flash.h" #include "hal_boot2.h" +#include "hal_sec_hash.h" -#define BFLB_BOOT2_CPU0_MAGIC "BFNP" -#define BFLB_BOOT2_CPU1_MAGIC "BFAP" #define BFLB_BOOT2_FLASH_CFG_MAGIC "FCFG" #define BFLB_BOOT2_PLL_CFG_MAGICCODE "PCFG" #define BFLB_BOOT2_FLASH_TZC_MAGIC "TCFG" -#define BFLB_BOOT2_DEADBEEF_VAL 0xdeadbeef + #define BFLB_BOOT2_READBUF_SIZE 4 * 1024 -#define BFLB_FW_IMG_OFFSET_AFTER_HEADER 4 * 1024 +#define BFLB_FW_IMG_OFFSET_AFTER_HEADER HAL_BOOT2_FW_IMG_OFFSET_AFTER_HEADER /* Image owner type */ #define BFLB_BOOT2_CPU_0 0 #define BFLB_BOOT2_CPU_1 1 -#define BFLB_BOOT2_CPU_MAX HAL_EFUSE_CPU_MAX /* Public key hash size */ -#define BFLB_BOOT2_PK_HASH_SIZE HAL_EFUSE_PK_HASH_SIZE -#define BFLB_BOOT2_HASH_SIZE 256 / 8 -/* Public key type */ -#define BFLB_BOOT2_ECC_KEYXSIZE 256 / 8 -#define BFLB_BOOT2_ECC_KEYYSIZE 256 / 8 -#define BFLB_BOOT2_SIGN_MAXSIZE 2048 / 8 +#define BFLB_BOOT2_PK_HASH_SIZE HAL_BOOT2_PK_HASH_SIZE + /* Power save define */ #define BFLB_PSM_ACTIVE 0 @@ -124,56 +118,7 @@ typedef enum { } boot_error_code; -typedef struct -{ - uint32_t magicCode; /*'BFXP'*/ - uint32_t rivison; - hal_flash_config flash_cfg; - hal_pll_config clk_cfg; - __PACKED_UNION - { - __PACKED_STRUCT - { - uint32_t sign : 2; /* [1: 0] for sign*/ - uint32_t encrypt_type : 2; /* [3: 2] for encrypt */ - uint32_t key_sel : 2; /* [5: 4] for key sel in boot interface*/ - uint32_t rsvd6_7 : 2; /* [7: 6] for encrypt*/ - uint32_t no_segment : 1; /* [8] no segment info */ - uint32_t cache_enable : 1; /* [9] for cache */ - uint32_t notLoadInBoot : 1; /* [10] not load this img in bootrom */ - uint32_t aes_region_lock : 1; /* [11] aes region lock */ - uint32_t cache_way_disable : 4; /* [15: 12] cache way disable info*/ - uint32_t crcIgnore : 1; /* [16] ignore crc */ - uint32_t hash_ignore : 1; /* [17] hash crc */ - uint32_t halt_cpu1 : 1; /* [18] halt ap */ - uint32_t rsvd19_31 : 13; /* [31:19] rsvd */ - } - bval; - uint32_t wval; - } - bootCfg; - __PACKED_UNION - { - uint32_t segment_cnt; - uint32_t img_len; - } - img_segment_info; - - uint32_t bootEntry; /* entry point of the image*/ - __PACKED_UNION - { - uint32_t ram_addr; - uint32_t flash_offset; - } - img_start; - - uint8_t hash[BFLB_BOOT2_HASH_SIZE]; /*hash of the image*/ - - uint32_t rsv1; - uint32_t rsv2; - uint32_t crc32; -} boot_header_config; typedef struct { @@ -183,68 +128,19 @@ typedef struct typedef struct { - uint8_t eckye_x[BFLB_BOOT2_ECC_KEYXSIZE]; //ec key in boot header - uint8_t eckey_y[BFLB_BOOT2_ECC_KEYYSIZE]; //ec key in boot header + uint8_t eckye_x[HAL_BOOT2_ECC_KEYXSIZE]; //ec key in boot header + uint8_t eckey_y[HAL_BOOT2_ECC_KEYYSIZE]; //ec key in boot header uint32_t crc32; } boot_pk_config; typedef struct { uint32_t sig_len; - uint8_t signature[BFLB_BOOT2_SIGN_MAXSIZE]; + uint8_t signature[HAL_BOOT2_SIGN_MAXSIZE]; uint32_t crc32; } boot_sign_config; -typedef struct -{ - uint8_t encrypt_type; - uint8_t sign_type; - uint8_t key_sel; - uint8_t img_valid; - uint8_t no_segment; - uint8_t cache_enable; - uint8_t cache_way_disable; - uint8_t hash_ignore; - - uint8_t aes_region_lock; - uint8_t halt_cpu1; - uint8_t cpu_type; - uint8_t r[1]; - - __PACKED_UNION - { - uint32_t segment_cnt; - uint32_t img_len; - } - img_segment_info; - - uint32_t msp_val; - uint32_t entry_point; - __PACKED_UNION - { - uint32_t ram_addr; - uint32_t flash_offset; - } - img_start; - uint32_t sig_len; - uint32_t sig_len2; - - uint32_t deal_len; - uint32_t max_input_len; - - uint8_t img_hash[BFLB_BOOT2_HASH_SIZE]; //hash of the whole (all)images - uint8_t aes_iv[16 + 4]; //iv in boot header - - uint8_t eckye_x[BFLB_BOOT2_ECC_KEYXSIZE]; //ec key in boot header - uint8_t eckey_y[BFLB_BOOT2_ECC_KEYYSIZE]; //ec key in boot header - uint8_t eckey_x2[BFLB_BOOT2_ECC_KEYXSIZE]; //ec key in boot header - uint8_t eckey_y2[BFLB_BOOT2_ECC_KEYYSIZE]; //ec key in boot header - - uint8_t signature[BFLB_BOOT2_SIGN_MAXSIZE]; //signature in boot header - uint8_t signature2[BFLB_BOOT2_SIGN_MAXSIZE]; //signature in boot header - -} boot2_image_config; typedef struct { @@ -253,15 +149,25 @@ typedef struct uint32_t default_xip_addr; } boot_cpu_config; +/** + * @brief ram image config type + */ +typedef struct +{ + uint8_t valid; /*!< valid or not */ + uint8_t core; /*!< which core to run */ + uint32_t boot_addr ; /*!< boot addr */ +} ram_img_config_t; + typedef void (*pentry_t)(void); -extern boot2_image_config g_boot_img_cfg[2]; +extern ram_img_config_t ram_img_config[BLSP_BOOT2_RAM_IMG_COUNT_MAX]; +extern boot2_image_config g_boot_img_cfg[BLSP_BOOT2_CPU_GROUP_MAX]; extern boot2_efuse_hw_config g_efuse_cfg; extern uint8_t g_ps_mode; -extern uint8_t g_cpu_count; +//extern uint8_t g_cpu_count; extern uint8_t *g_boot2_read_buf; - - +extern sec_hash_handle_t hash_handle; #endif /* __BLSP_BOOTINFO_H__ */ diff --git a/examples/boot2_iap/blsp_common.c b/examples/boot2_iap/blsp_common.c index ece2c11b..c87e632b 100644 --- a/examples/boot2_iap/blsp_common.c +++ b/examples/boot2_iap/blsp_common.c @@ -45,9 +45,8 @@ #include "hal_flash.h" #include "hal_boot2.h" #include "bflb_eflash_loader.h" -#include "hal_clock.h" -uint8_t g_malloc_buf[BFLB_BOOT2_XZ_MALLOC_BUF_SIZE] __attribute__((section(".noinit_data"))); +ATTR_NOCACHE_NOINIT_RAM_SECTION uint8_t g_malloc_buf[BFLB_BOOT2_XZ_MALLOC_BUF_SIZE]; int32_t blsp_boot2_set_encrypt(uint8_t index, boot2_image_config *g_boot_img_cfg); @@ -87,6 +86,8 @@ void blsp_dump_data(void *datain, int len) *******************************************************************************/ int32_t blsp_mediaboot_pre_jump(void) { + extern void system_mtimer_clock_reinit(void); + /* reinit mtimer clock */ system_mtimer_clock_reinit(); @@ -100,6 +101,7 @@ int32_t blsp_mediaboot_pre_jump(void) bflb_platform_deinit(); /* Jump to entry */ + __disable_irq(); blsp_boot2_jump_entry(); return BFLB_BOOT2_SUCCESS; @@ -118,9 +120,7 @@ void blsp_boot2_exit(void) hal_boot2_sboot_finish(); /* Release other CPUs*/ - if (g_cpu_count != 1 && !g_boot_img_cfg[0].halt_cpu1) { - blsp_boot2_releae_other_cpu(); - } + blsp_boot2_releae_other_cpu(); /* Stay here */ while (1) { @@ -140,19 +140,20 @@ void blsp_boot2_exit(void) void ATTR_TCM_SECTION blsp_boot2_jump_entry(void) { pentry_t pentry; - uint32_t i = 0; int32_t ret; + + hal_boot2_clean_cache(); hal_boot2_sboot_finish(); /*Note:enable cache with flash offset, after this, should be no flash directl read, If need read, should take flash offset into consideration */ if (0 != g_efuse_cfg.encrypted[0]) { /*for encrypted img, use none-continuos read*/ - ret = flash_set_cache(0, g_boot_img_cfg[0].cache_enable, g_boot_img_cfg[0].cache_way_disable, g_boot_img_cfg[0].img_start.flash_offset); + ret = hal_boot2_set_cache(0, &g_boot_img_cfg[0]); } else { /*for unencrypted img, use continuos read*/ - ret = flash_set_cache(1, g_boot_img_cfg[0].cache_enable, g_boot_img_cfg[0].cache_way_disable, g_boot_img_cfg[0].img_start.flash_offset); + ret = hal_boot2_set_cache(1, &g_boot_img_cfg[0]); } if (ret != BFLB_BOOT2_SUCCESS) { @@ -162,51 +163,30 @@ void ATTR_TCM_SECTION blsp_boot2_jump_entry(void) if (0 != g_efuse_cfg.encrypted[0]) { blsp_boot2_set_encrypt(0, &g_boot_img_cfg[0]); blsp_boot2_set_encrypt(1, &g_boot_img_cfg[1]); - /* Get msp and pc value */ - for (i = 0; i < g_cpu_count; i++) { - if (g_boot_img_cfg[i].img_valid) { - //if(bootImgCfg[i].entryPoint==0){ -#ifdef ARCH_ARM - blsp_mediaboot_read(g_boot_img_cfg[i].img_start.flash_offset, - (uint8_t *)&g_boot_img_cfg[i].msp_val, 4); - blsp_mediaboot_read(bootImgCfg[i].imgStart.flashOffset + 4, - (uint8_t *)&g_boot_img_cfg[i].entry_point, 4); -#endif - //} - } - } - if (blsp_boot2_get_feature_flag() == BLSP_BOOT2_CP_FLAG) { +#if BLSP_BOOT2_CPU_MAX>1 + if (hal_boot2_get_feature_flag() == HAL_BOOT2_CP_FLAG) { /*co-processor*/ - g_boot_img_cfg[1].img_start.flash_offset = g_boot_img_cfg[0].img_start.flash_offset; - g_boot_img_cfg[1].msp_val = g_boot_img_cfg[0].msp_val; - g_boot_img_cfg[1].entry_point = g_boot_img_cfg[0].entry_point; - g_boot_img_cfg[1].cache_enable = g_boot_img_cfg[0].cache_enable; - g_boot_img_cfg[1].img_valid = 1; - g_boot_img_cfg[1].cache_way_disable = 0xf; + g_boot_img_cfg[0].cpu_cfg[1].msp_val = g_boot_img_cfg[0].cpu_cfg[0].msp_val; + g_boot_img_cfg[0].cpu_cfg[1].boot_entry = g_boot_img_cfg[0].cpu_cfg[0].boot_entry; + g_boot_img_cfg[0].cpu_cfg[1].cache_enable = g_boot_img_cfg[0].cpu_cfg[0].cache_enable; + g_boot_img_cfg[0].img_valid = 1; + g_boot_img_cfg[0].cpu_cfg[1].cache_way_dis = 0xf; } +#endif } + blsp_boot2_releae_other_cpu(); + /* Deal CPU0's entry point */ - if (g_boot_img_cfg[0].img_valid) { - pentry = (pentry_t)g_boot_img_cfg[0].entry_point; - - if (g_boot_img_cfg[0].msp_val != 0) { - __set_MSP(g_boot_img_cfg[0].msp_val); + for(uint32_t group = 0; group < BLSP_BOOT2_CPU_GROUP_MAX; group++){ + if(g_boot_img_cfg[group].img_valid&&g_boot_img_cfg[group].cpu_cfg[0].config_enable){ + if(g_boot_img_cfg[group].cpu_cfg[0].halt_cpu == 0){ + pentry = (pentry_t)g_boot_img_cfg[group].cpu_cfg[0].boot_entry; + if(pentry){ + pentry(); + } + } } - - /* Release other CPUs unless user halt it */ - if (g_cpu_count != 1 && !g_boot_img_cfg[0].halt_cpu1) { - blsp_boot2_releae_other_cpu(); - } - - if (pentry != NULL) { - pentry(); - } - } - - /* Release other CPUs unless user halt it */ - if (g_cpu_count != 1 && !g_boot_img_cfg[0].halt_cpu1) { - blsp_boot2_releae_other_cpu(); } /* If cann't jump stay here */ diff --git a/examples/boot2_iap/blsp_common.h b/examples/boot2_iap/blsp_common.h index c3974278..19b87ae1 100644 --- a/examples/boot2_iap/blsp_common.h +++ b/examples/boot2_iap/blsp_common.h @@ -40,19 +40,11 @@ #define BFLB_BOOT2_XZ_MALLOC_BUF_SIZE 80*1024 -#define BLSP_BOOT2_CP_FLAG 0x02 -#define BLSP_BOOT2_MP_FLAG 0x01 -#define BLSP_BOOT2_SP_FLAG 0x00 - void blsp_dump_data(void *datain, int len); void blsp_boot2_jump_entry(void); int32_t blsp_mediaboot_pre_jump(void); uint8_t blsp_boot2_get_feature_flag(void); -uint8_t blsp_boot2_get_log_disable_flag(void); -uint8_t blsp_boot2_8m_support_flag(void); uint8_t blsp_boot2_dump_critical_flag(void); -uint32_t blsp_boot2_get_baudrate(void); -uint8_t blsp_boot2_get_tx_gpio(void); extern uint8_t g_malloc_buf[BFLB_BOOT2_XZ_MALLOC_BUF_SIZE]; diff --git a/examples/boot2_iap/blsp_media_boot.c b/examples/boot2_iap/blsp_media_boot.c index 672f2735..13cbf557 100644 --- a/examples/boot2_iap/blsp_media_boot.c +++ b/examples/boot2_iap/blsp_media_boot.c @@ -47,8 +47,6 @@ #include "hal_uart.h" extern int main(void); -extern struct device *dev_check_hash; - /****************************************************************************/ /** * @brief Media boot calculate hash * @@ -65,7 +63,6 @@ static int32_t blsp_mediaboot_cal_hash(uint32_t start_addr, uint32_t total_len) uint32_t addr = start_addr; int32_t ret; uint32_t dump_cnt = 0; - while (deal_len < total_len) { read_len = total_len - deal_len; @@ -87,10 +84,9 @@ static int32_t blsp_mediaboot_cal_hash(uint32_t start_addr, uint32_t total_len) dump_cnt = 1; } + /* Update hash*/ - //Sec_Eng_SHA256_Update(&g_sha_ctx, SEC_ENG_SHA_ID0, (uint8_t *)g_boot2_read_buf, read_len); - device_write(dev_check_hash, 0, g_boot2_read_buf, read_len); - //blsp_dump_data((uint8_t *)g_boot2_read_buf,readLen); + sec_hash_update(&hash_handle, g_boot2_read_buf, read_len); addr += read_len; deal_len += read_len; @@ -124,7 +120,7 @@ static int32_t blsp_mediaboot_read_signaure(uint32_t addr, uint32_t *len) addr += sizeof(sig_len); - if(sig_len > BFLB_BOOT2_SIGN_MAXSIZE) + if(sig_len > HAL_BOOT2_SIGN_MAXSIZE) { return BFLB_BOOT2_IMG_SIGNATURE_LEN_ERROR; } @@ -154,36 +150,39 @@ static int32_t blsp_mediaboot_read_signaure(uint32_t addr, uint32_t *len) * @return BL_Err_Type * *******************************************************************************/ -static int32_t blsp_mediaboot_parse_one_fw(boot2_image_config *boot_img_cfg, uint32_t boot_header_addr, uint32_t img_addr) +static int32_t blsp_mediaboot_parse_one_group(boot2_image_config *boot_img_cfg, uint32_t boot_header_addr, uint32_t img_addr) { - uint32_t addr = boot_header_addr; + uint32_t addr; int32_t ret; uint32_t sig_len=0; + addr=boot_header_addr+hal_boot2_get_bootheader_offset(); /* Read boot header*/ MSG("R header from %08x\r\n", addr); - ret = blsp_mediaboot_read(addr, g_boot2_read_buf, sizeof(boot_header_config)); + ret = blsp_mediaboot_read(addr, g_boot2_read_buf, sizeof(struct hal_bootheader_t)); if (ret != BFLB_BOOT2_SUCCESS) { return ret; } if (blsp_boot2_dump_critical_flag()) { - blsp_dump_data(g_boot2_read_buf, sizeof(boot_header_config)); + blsp_dump_data(g_boot2_read_buf, sizeof(struct hal_bootheader_t)); } - addr += sizeof(boot_header_config); - ret = blsp_boot_parse_bootheader(boot_img_cfg, (uint8_t *)g_boot2_read_buf); + addr += sizeof(struct hal_bootheader_t); + ret = hal_boot_parse_bootheader(boot_img_cfg, (uint8_t *)g_boot2_read_buf); if (ret != BFLB_BOOT2_SUCCESS) { return ret; } + /* we init hash here since aes iv need to be caled as image hash */ + sec_hash_init(&hash_handle, SEC_HASH_SHA256); /* Due to OTA, the flash_offset is changed, so copy from partition info */ - boot_img_cfg->img_start.flash_offset = img_addr; + boot_img_cfg->basic_cfg.group_image_offset = img_addr; /* If sign enable,get pk key and signature*/ - if(boot_img_cfg->sign_type){ + if(boot_img_cfg->basic_cfg.sign_type){ /* Read public key */ MSG("R PK\r\n"); ret=blsp_mediaboot_read(addr,g_boot2_read_buf,sizeof(boot_pk_config)); @@ -198,22 +197,22 @@ static int32_t blsp_mediaboot_parse_one_fw(boot2_image_config *boot_img_cfg, uin if(ret!=BFLB_BOOT2_SUCCESS){ return ret; } -#ifdef BOOT2_MC - /* Read public key 2*/ - MSG("R PK2\r\n"); - ret=blsp_mediaboot_read(addr,g_boot2_read_buf,sizeof(boot_pk_config)); - if(ret!=BFLB_BOOT2_SUCCESS){ - return ret; + if(hal_boot2_get_grp_count()>1){ + /* Read public key 2*/ + MSG("R PK2\r\n"); + ret=blsp_mediaboot_read(addr,g_boot2_read_buf,sizeof(boot_pk_config)); + if(ret!=BFLB_BOOT2_SUCCESS){ + return ret; + } + if(blsp_boot2_dump_critical_flag()){ + blsp_dump_data(g_boot2_read_buf,sizeof(boot_pk_config)); + } + addr+=sizeof(boot_pk_config); + ret=blsp_boot_parse_pkey(boot_img_cfg,(uint8_t *)g_boot2_read_buf,0); + if(ret!=BFLB_BOOT2_SUCCESS){ + return ret; + } } - if(blsp_boot2_dump_critical_flag()){ - blsp_dump_data(g_boot2_read_buf,sizeof(boot_pk_config)); - } - addr+=sizeof(boot_pk_config); - ret=blsp_boot_parse_pkey(boot_img_cfg,(uint8_t *)g_boot2_read_buf,0); - if(ret!=BFLB_BOOT2_SUCCESS){ - return ret; - } -#endif /* Read signature*/ MSG_DBG("R SIG1\r\n"); blsp_mediaboot_read_signaure(addr,&sig_len); @@ -231,28 +230,28 @@ static int32_t blsp_mediaboot_parse_one_fw(boot2_image_config *boot_img_cfg, uin return ret; } -#ifdef BOOT2_MC - /* Read signature2*/ - MSG_DBG("R SIG2\r\n"); - blsp_mediaboot_read_signaure(addr,&sig_len); - if(ret!=BFLB_BOOT2_SUCCESS){ - return ret; + if(hal_boot2_get_grp_count()>1){ + /* Read signature2*/ + MSG_DBG("R SIG2\r\n"); + blsp_mediaboot_read_signaure(addr,&sig_len); + if(ret!=BFLB_BOOT2_SUCCESS){ + return ret; + } + if(blsp_boot2_dump_critical_flag()){ + blsp_dump_data(g_boot2_read_buf,sig_len); + } + /*len+data+crc*/ + addr+=sizeof(sig_len); + addr+=(sig_len+4); + ret=blsp_boot_parse_signature(boot_img_cfg,(uint8_t *)g_boot2_read_buf,0); + if(ret!=BFLB_BOOT2_SUCCESS){ + return ret; + } } - if(blsp_boot2_dump_critical_flag()){ - blsp_dump_data(g_boot2_read_buf,sig_len); - } - /*len+data+crc*/ - addr+=sizeof(sig_len); - addr+=(sig_len+4); - ret=blsp_boot_parse_signature(boot_img_cfg,(uint8_t *)g_boot2_read_buf,0); - if(ret!=BFLB_BOOT2_SUCCESS){ - return ret; - } -#endif } /* If encrypt enable,get AES key*/ - if(boot_img_cfg->encrypt_type){ + if(boot_img_cfg->basic_cfg.encrypt_type){ /* Read aes iv*/ MSG_DBG("R IV\r\n"); ret=blsp_mediaboot_read(addr,g_boot2_read_buf,sizeof(boot_aes_config)); @@ -269,21 +268,19 @@ static int32_t blsp_mediaboot_parse_one_fw(boot2_image_config *boot_img_cfg, uin } } - if (boot_img_cfg->no_segment) { + if (boot_img_cfg->basic_cfg.no_segment) { /* Flash image */ - if (!boot_img_cfg->hash_ignore) { - MSG("Cal hash\r\n"); - MSG("calc hash addr 0x%08x,len %d\r\n",img_addr,boot_img_cfg->img_segment_info.img_len); + if (!boot_img_cfg->basic_cfg.hash_ignore) { + MSG("Cal hash addr 0x%08x,len %d\r\n",img_addr,boot_img_cfg->basic_cfg.img_len_cnt); ret = blsp_mediaboot_cal_hash(img_addr, - boot_img_cfg->img_segment_info.img_len); + boot_img_cfg->basic_cfg.img_len_cnt); if (ret != BFLB_BOOT2_SUCCESS) { - MSG_ERR("blsp cal hash err\r\n"); + MSG_ERR("Cal hash err\r\n"); return ret; } ret = blsp_boot_parser_check_hash(boot_img_cfg); - device_unregister("dev_check_hash"); if (ret != BFLB_BOOT2_SUCCESS) { return ret; @@ -322,102 +319,107 @@ int32_t ATTR_TCM_SECTION blsp_mediaboot_read(uint32_t addr, uint8_t *data, uint3 /****************************************************************************/ /** * @brief Media boot main process * - * @param cpuBootheaderAddr[BFLB_BOOT2_CPU_MAX]: CPU bootheader address list - * @param cpuRollBack[BFLB_BOOT2_CPU_MAX]: CPU need roll back flag hold list + * @param cpuBootheaderAddr[BLSP_BOOT2_CPU_GROUP_MAX]: CPU bootheader address list + * @param cpuRollBack[BLSP_BOOT2_CPU_GROUP_MAX]: CPU need roll back flag hold list * @param rollBack: 1 for rollback when imge error occurs, 0 for not rollback when imge error occurs * - * @return BL_Err_Type + * @return int32_t * *******************************************************************************/ -int32_t blsp_mediaboot_main(uint32_t cpu_boot_header_addr[BFLB_BOOT2_CPU_MAX], uint8_t cpu_roll_back[BFLB_BOOT2_CPU_MAX],uint8_t roll_back) +int32_t blsp_mediaboot_main(uint32_t group_boot_header_addr[BLSP_BOOT2_CPU_GROUP_MAX], uint8_t group_roll_back[BLSP_BOOT2_CPU_GROUP_MAX],uint8_t roll_back) { int32_t ret; - uint32_t i = 0; - uint32_t valid_img_found = 0; - uint32_t boot_header_addr[BFLB_BOOT2_CPU_MAX]; + uint32_t i = 0,core; + uint32_t valid_group_found = 0; + uint32_t boot_header_addr[BLSP_BOOT2_CPU_GROUP_MAX]; + MSG("Media boot main\r\n"); /* Reset some parameters*/ - for (i = 0; i < BFLB_BOOT2_CPU_MAX; i++) { + for (i = 0; i < BLSP_BOOT2_CPU_GROUP_MAX; i++) { memset(&g_boot_img_cfg[i], 0, sizeof(g_boot_img_cfg[i])); - boot_header_addr[i] = cpu_boot_header_addr[i]; - cpu_roll_back[i] = 0; + boot_header_addr[i] = group_boot_header_addr[i]; + group_roll_back[i] = 0; } - g_boot_img_cfg[0].halt_cpu1 = 0; - /* Try to boot from flash */ - for (i = 0; i < g_cpu_count; i++) { + for (i = 0; i < BLSP_BOOT2_CPU_GROUP_MAX; i++) { if (boot_header_addr[i] == 0) { - MSG_ERR("CPU %d not boot\r\n", i); + MSG_ERR("Group %d not boot\r\n", i); continue; } - ret = blsp_mediaboot_parse_one_fw(&g_boot_img_cfg[i], boot_header_addr[i], + ret = blsp_mediaboot_parse_one_group(&g_boot_img_cfg[i], boot_header_addr[i], boot_header_addr[i] + BFLB_FW_IMG_OFFSET_AFTER_HEADER); if (ret != BFLB_BOOT2_SUCCESS) { - MSG_ERR("CPU %d boot fail\r\n", i); - cpu_roll_back[i] = 1; + MSG_ERR("Group %d parse fail\r\n", i); + group_roll_back[i] = 1; } else { - valid_img_found++; + valid_group_found++; } } - if (valid_img_found != g_cpu_count && 1 == roll_back) { - /* For CP and DP, found CPU0 image is taken as correct when the other not found, others as wrong and try to rollback */ - if (cpu_roll_back[0] == 0 && valid_img_found == 1) { - MSG("Found One img Only\r\n"); - } else { - MSG_ERR("Image roll back\r\n"); + /* roll_back == 1 means need to check rock back, and can not jump away */ + if ((valid_group_found != hal_boot2_get_grp_count()) && (1 == roll_back)) { +#if BLSP_BOOT2_CPU_GROUP_MAX>1 + if (boot_header_addr[1] == 0 && (valid_group_found == 1)) + { + MSG("One group Only\r\n"); + } + else +#endif + { + MSG_ERR("Group roll back\r\n"); return BFLB_BOOT2_IMG_Roll_Back; } } - if (valid_img_found == 0) { - MSG_ERR("no valid img found\r\n"); + if (valid_group_found == 0) { + MSG_ERR("no valid group found\r\n"); return BFLB_BOOT2_IMG_ALL_INVALID_ERROR; } /* Get msp and pc value */ - for (i = 0; i < g_cpu_count; i++) { - if (g_boot_img_cfg[i].img_valid) { - if (g_boot_img_cfg[i].entry_point == 0) { -#ifdef ARCH_ARM - blsp_mediaboot_read(g_boot_img_cfg[i].img_start.flash_offset, - (uint8_t *)&g_boot_img_cfg[i].msp_val, 4); - blsp_mediaboot_read(g_boot_img_cfg[i].img_start.flash_offset + 4, - (uint8_t *)&g_boot_img_cfg[i].entry_point, 4); -#endif + for (i = 0; i < BLSP_BOOT2_CPU_GROUP_MAX; i++) { + if (!g_boot_img_cfg[i].img_valid) { + continue; + } + for(core = 0; core < BLSP_BOOT2_CPU_MAX; core++){ + if (g_boot_img_cfg[i].cpu_cfg[core].boot_entry == 0) { + #ifdef ARCH_RISCV - g_boot_img_cfg[i].entry_point = ((uint32_t )main) & 0xff000000; + g_boot_img_cfg[i].cpu_cfg[core].boot_entry = ((uint32_t )main) & 0xff000000; #endif } } } - - if (blsp_boot2_get_feature_flag() == BLSP_BOOT2_CP_FLAG) { - /*co-processor*/ - g_boot_img_cfg[1].img_start.flash_offset = g_boot_img_cfg[0].img_start.flash_offset; - g_boot_img_cfg[1].msp_val = g_boot_img_cfg[0].msp_val; - g_boot_img_cfg[1].entry_point = g_boot_img_cfg[0].entry_point; - g_boot_img_cfg[1].cache_enable = g_boot_img_cfg[0].cache_enable; - g_boot_img_cfg[1].img_valid = 1; - g_boot_img_cfg[1].cache_way_disable = 0xf; + for(i=0;i1 + MSG("group[%d],core[%d] halt cpu %d\r\n",0,1,g_boot_img_cfg[0].cpu_cfg[1].halt_cpu); +#endif blsp_boot2_show_timer(); - - +#if BLSP_BOOT2_SUPPORT_EFLASH_LOADER_FLASH||BLSP_BOOT2_SUPPORT_EFLASH_LOADER_RAM if (0 == bflb_eflash_loader_if_handshake_poll(0)) { bflb_eflash_loader_main(); } - +#endif + /* Prepare jump to entry*/ blsp_mediaboot_pre_jump(); diff --git a/examples/boot2_iap/blsp_media_boot.h b/examples/boot2_iap/blsp_media_boot.h index 85df4d12..f09bf34b 100644 --- a/examples/boot2_iap/blsp_media_boot.h +++ b/examples/boot2_iap/blsp_media_boot.h @@ -42,9 +42,11 @@ #include "blsp_bootinfo.h" int32_t blsp_mediaboot_read(uint32_t addr, uint8_t *data, uint32_t len); -int32_t blsp_mediaboot_main(uint32_t cpu_boot_header_addr[BFLB_BOOT2_CPU_MAX], uint8_t cpu_roll_back[BFLB_BOOT2_CPU_MAX],uint8_t roll_back); +int32_t blsp_mediaboot_main(uint32_t cpu_boot_header_addr[BLSP_BOOT2_CPU_GROUP_MAX], uint8_t cpu_roll_back[BLSP_BOOT2_CPU_GROUP_MAX],uint8_t roll_back); void blsp_boot2_show_timer(void); +#define BLSP_BOOT2_PSRAM_BASE 0x50000000 + #endif /* __BLSP_MEDIA_BOOT_H__ */ diff --git a/examples/boot2_iap/blsp_port.c b/examples/boot2_iap/blsp_port.c index 45982e63..a1c21d49 100644 --- a/examples/boot2_iap/blsp_port.c +++ b/examples/boot2_iap/blsp_port.c @@ -46,6 +46,19 @@ #include "hal_boot2.h" extern uint32_t __boot2_pass_param_addr; +static uint32_t start_time=0; +/****************************************************************************/ /** +* @brief Boot2 show timer for cal boot time +* +* @param None +* +* @return None +* +*******************************************************************************/ +void blsp_boot2_start_timer(void) +{ + start_time=(uint32_t)bflb_platform_get_time_ms(); +} /****************************************************************************/ /** * @brief Boot2 show timer for cal boot time @@ -57,20 +70,7 @@ extern uint32_t __boot2_pass_param_addr; *******************************************************************************/ void blsp_boot2_show_timer(void) { - MSG("Counter value=%d\n", (unsigned int)bflb_platform_get_time_ms()); -} - -/****************************************************************************/ /** -* @brief Boot2 get cpu count info -* -* @param None -* -* @return None -* -*******************************************************************************/ -uint32_t blsp_boot2_get_cpu_count(void) -{ - return 1; + MSG("Counter value=%d\n", (unsigned int)bflb_platform_get_time_ms()-start_time); } /****************************************************************************/ /** @@ -126,6 +126,40 @@ void blsp_boot2_pass_parameter(void *data, uint32_t len) *******************************************************************************/ void ATTR_TCM_SECTION blsp_boot2_releae_other_cpu(void) { +#if BLSP_BOOT2_RAM_IMG_COUNT_MAX>0 + uint32_t i=0; + pentry_t pentry; +#endif +#if BLSP_BOOT2_CPU_MAX>1 + uint32_t group,core; + /* deal Other CPUs' entry point and release*/ + for(group = 0; group < BLSP_BOOT2_CPU_GROUP_MAX; group++){ + for(core = 1; core < BLSP_BOOT2_CPU_MAX; core++){ + if(g_boot_img_cfg[group].cpu_cfg[core].config_enable){ + if(g_boot_img_cfg[group].cpu_cfg[core].halt_cpu == 0){ + hal_boot2_release_cpu(core, g_boot_img_cfg[group].cpu_cfg[core].boot_entry); + } + } + } + } +#endif +#if BLSP_BOOT2_RAM_IMG_COUNT_MAX>0 + /* deal with ram image */ + for(i=0;iimg_valid==0){ + return BFLB_BOOT2_SUCCESS; + } /* FIXME:,1:lock, should be 1??*/ - if (g_boot_img_cfg->encrypt_type != 0) { - len = g_boot_img_cfg->img_segment_info.img_len; + if (g_boot_img_cfg->basic_cfg.encrypt_type != 0) { + len = g_boot_img_cfg->basic_cfg.img_len_cnt; if (len != 0) { - SF_Ctrl_AES_Set_Key_BE(index, NULL, (SF_Ctrl_AES_Key_Type)(g_boot_img_cfg->encrypt_type - 1)); - SF_Ctrl_AES_Set_IV_BE(index, g_boot_img_cfg->aes_iv, g_boot_img_cfg->img_start.flash_offset); + SF_Ctrl_AES_Set_Key_BE(index, NULL, (SF_Ctrl_AES_Key_Type)(g_boot_img_cfg->basic_cfg.encrypt_type - 1)); + SF_Ctrl_AES_Set_IV_BE(index, g_boot_img_cfg->aes_iv, g_boot_img_cfg->basic_cfg.group_image_offset); SF_Ctrl_AES_Set_Region(index, 1 /*enable this region*/, 1 /*hardware key*/, - g_boot_img_cfg->img_start.flash_offset, - g_boot_img_cfg->img_start.flash_offset + len - 1, - g_boot_img_cfg->aes_region_lock /*lock*/); + g_boot_img_cfg->basic_cfg.group_image_offset, + g_boot_img_cfg->basic_cfg.group_image_offset + len - 1, + g_boot_img_cfg->basic_cfg.aes_region_lock /*lock*/); aes_enabled = 1; } } @@ -166,88 +203,6 @@ int32_t ATTR_TCM_SECTION blsp_boot2_set_encrypt(uint8_t index, boot2_image_confi return BFLB_BOOT2_SUCCESS; } -typedef void (*pFunc)(void); -extern pFunc __Vectors[]; -/****************************************************************************/ /** - * @brief Boot2 Get log tx GPIO - * - * @param None - * - * @return None - * -*******************************************************************************/ -uint8_t ATTR_TCM_SECTION blsp_boot2_get_tx_gpio(void) -{ - uint8_t *p = ((uint8_t *)&__Vectors[9] + 1); - - return *p; -} - -/****************************************************************************/ /** - * @brief Boot2 Get UART Port - * - * @param None - * - * @return 0(UART0)/1(UART1) - * -*******************************************************************************/ -uint8_t ATTR_TCM_SECTION blsp_boot2_get_uart_port(void) -{ - uint8_t *p = ((uint8_t *)&__Vectors[9] + 2); - - return *p; -} - -/****************************************************************************/ /** - * @brief Boot2 Get Feature Flag - * - * @param None - * - * @return None - * -*******************************************************************************/ -uint8_t ATTR_TCM_SECTION blsp_boot2_get_feature_flag(void) -{ - static uint8_t boot2_flag = 0xff; - uint8_t *p = ((uint8_t *)&__Vectors[10] + 0); - - if (boot2_flag == 0xff) { - boot2_flag = *p; - } - - return boot2_flag; -} - -/****************************************************************************/ /** - * @brief Boot2 Get log disable Flag - * - * @param None - * - * @return None - * -*******************************************************************************/ -uint8_t ATTR_TCM_SECTION blsp_boot2_get_log_disable_flag(void) -{ - uint8_t *p = ((uint8_t *)&__Vectors[10] + 1); - - return *p; -} - -/****************************************************************************/ /** - * @brief Boot2 Get 8M Flash support Flag - * - * @param None - * - * @return None - * -*******************************************************************************/ -uint8_t ATTR_TCM_SECTION blsp_boot2_8m_support_flag(void) -{ - uint8_t *p = ((uint8_t *)&__Vectors[10] + 2); - - return *p; -} - /****************************************************************************/ /** * @brief Boot2 Get dump critical data flag * @@ -258,25 +213,9 @@ uint8_t ATTR_TCM_SECTION blsp_boot2_8m_support_flag(void) *******************************************************************************/ uint8_t ATTR_TCM_SECTION blsp_boot2_dump_critical_flag(void) { - uint8_t *p = ((uint8_t *)&__Vectors[10] + 3); - - return *p; -} - -/****************************************************************************/ /** - * @brief Boot2 Get Baudrate - * - * @param None - * - * @return None - * -*******************************************************************************/ -uint32_t ATTR_TCM_SECTION blsp_boot2_get_baudrate(void) -{ - uint32_t *p = ((uint32_t *)&__Vectors[13]); - - return *p; + return 0; } + diff --git a/examples/boot2_iap/blsp_port.h b/examples/boot2_iap/blsp_port.h index 56738b7c..21102dec 100644 --- a/examples/boot2_iap/blsp_port.h +++ b/examples/boot2_iap/blsp_port.h @@ -48,19 +48,23 @@ #define BLSP_BOOT2_ROLLBACK #define BLSP_BOOT2_SUPPORT_DECOMPRESS HAL_BOOT2_SUPPORT_DECOMPRESS #define BLSP_BOOT2_SUPPORT_USB_IAP HAL_BOOT2_SUPPORT_USB_IAP -#define BLSP_BOOT2_SUPPORT_EFLASH_LOADER_RAM HAL_BOOT2_SUPPORT_EFLASH_LOADER_RAM -#define BLSP_BOOT2_SUPPORT_EFLASH_LOADER_FLASH HAL_BOOT2_SUPPORT_EFLASH_LOADER_FLASH +#define BLSP_BOOT2_SUPPORT_EFLASH_LOADER_RAM HAL_BOOT2_SUPPORT_EFLASH_LOADER_RAM +#define BLSP_BOOT2_SUPPORT_EFLASH_LOADER_FLASH HAL_BOOT2_SUPPORT_EFLASH_LOADER_FLASH -#define BOOT2_MODE_RELEASE 0x01 -#define BOOT2_MODE_DEBUG 0x02 -#define BOOT2_MODE_DEEP_DEBUG 0x04 -#define BLSP_BOOT2_MODE BOOT2_MODE_DEBUG +#define BOOT2_MODE_RELEASE 0x01 +#define BOOT2_MODE_DEBUG 0x02 +#define BOOT2_MODE_DEEP_DEBUG 0x04 +#define BLSP_BOOT2_MODE BOOT2_MODE_DEBUG +#define BLSP_BOOT2_CPU_GROUP_MAX HAL_BOOT2_CPU_GROUP_MAX +#define BLSP_BOOT2_CPU_MAX HAL_BOOT2_CPU_MAX +#define BLSP_BOOT2_RAM_IMG_COUNT_MAX HAL_BOOT2_RAM_IMG_COUNT_MAX uint32_t blsp_boot2_get_cpu_count(void); uint8_t blsp_read_power_save_mode(void); void blsp_boot2_pass_parameter(void *data, uint32_t len); void blsp_boot2_releae_other_cpu(void); +void blsp_boot2_start_timer(void); void blsp_boot2_show_timer(void); void blsp_boot2_init_sec_eng_pka(void); diff --git a/examples/boot2_iap/blsp_ram_image_boot.c b/examples/boot2_iap/blsp_ram_image_boot.c new file mode 100644 index 00000000..321ada80 --- /dev/null +++ b/examples/boot2_iap/blsp_ram_image_boot.c @@ -0,0 +1,232 @@ +/** + ****************************************************************************** + * @file blsp_ram_image_boot.c + * @version V1.2 + * @date + * @brief This file is the peripheral case c file + ****************************************************************************** + * @attention + * + *

© COPYRIGHT(c) 2020 Bouffalo Lab

+ * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of Bouffalo Lab nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + +#include "bflb_platform.h" +#include "bflb_eflash_loader_interface.h" +#include "blsp_port.h" +#include "blsp_bootinfo.h" +#include "blsp_media_boot.h" +#include "blsp_boot_decompress.h" +#include "blsp_common.h" +#include "blsp_version.h" +#include "partition.h" +#include "softcrc.h" +#include "hal_uart.h" +#include "hal_flash.h" +#include "hal_boot2.h" +#include "hal_sec_hash.h" + +#if BLSP_BOOT2_RAM_IMG_COUNT_MAX>0 + +ram_img_config_t ram_img_config[BLSP_BOOT2_RAM_IMG_COUNT_MAX]={0}; +#define LZ4D_FLAG 0x184D2204 +extern void unlz4(const void *aSource, void *aDestination, uint32_t FileLen); + +/****************************************************************************/ /** + * @brief Boot2 cal image hash + * + * @param src: image address on flash + * @param total_len: total len to copy + * @param hash:hash pointer + * + * @return 0 for success ,-1 for fail + * +*******************************************************************************/ +__UNUSED__ static int blsp_cal_ram_img_hash(uint32_t src,uint32_t total_len,uint8_t *hash) +{ + //flash_read_via_xip(src, dest,total_len); + uint32_t cur_len=0; + uint32_t read_len=0; + uint32_t cal_hash[8]; + + sec_hash_init(&hash_handle, SEC_HASH_SHA256); + + + while(cur_lenBFLB_BOOT2_READBUF_SIZE){ + read_len=BFLB_BOOT2_READBUF_SIZE; + } + flash_read(src+cur_len,g_boot2_read_buf,read_len); + sec_hash_update(&hash_handle, g_boot2_read_buf, read_len); + cur_len+=read_len; + } + sec_hash_finish(&hash_handle, (uint8_t *)cal_hash); + sec_hash_deinit(&hash_handle); + if(memcmp(hash,cal_hash,32)!=0){ + MSG_ERR("Cal hash error\r\n"); + return -1; + } + return 0; +} + +/****************************************************************************/ /** + * @brief Boot2 copy image from flash to ram + * + * @param src: image address on flash + * @param dest: ram address to copy to + * @param total_len: total len to copy + * + * @return 0 for success ,-1 for fail + * +*******************************************************************************/ +__UNUSED__ static int blsp_do_ram_img_copy(uint32_t src,uint32_t dest,uint32_t total_len,uint8_t **hash) +{ + //flash_read_via_xip(src, dest,total_len); + uint32_t cur_len=0; + uint32_t read_len=0; + uint32_t *p=(uint32_t *)g_boot2_read_buf; + uint32_t xip_addr=0; + int ret=0; + + g_boot2_read_buf[0]=0x0; + g_boot2_read_buf[1]=0x0; + flash_read(src,g_boot2_read_buf,4); + if(*p==LZ4D_FLAG){ + if(*hash!=NULL){ + MSG("Cal hash\r\n"); + ret=blsp_cal_ram_img_hash(src,total_len,*hash); + if(ret!=0){ + return BFLB_BOOT2_IMG_HASH_ERROR; + } + } + xip_addr=hal_boot2_get_xip_addr(src); + MSG("LZ4 image found, Decompress from %08x to %08x\r\n",xip_addr,dest); + if(xip_addr!=0){ + unlz4((const void *)xip_addr, (void *)dest, total_len); + MSG("LZ4 done\r\n"); + L1C_DCache_Clean_All(); + return 0; + }else{ + MSG_ERR("Get XIP Addr fail\r\n"); + return -1; + } + } + while(cur_lenBFLB_BOOT2_READBUF_SIZE){ + read_len=BFLB_BOOT2_READBUF_SIZE; + } + flash_read(src+cur_len,g_boot2_read_buf,read_len); + arch_memcpy((void*)(dest+cur_len),g_boot2_read_buf,read_len); + cur_len+=read_len; + } + + L1C_DCache_Clean_By_Addr(dest,total_len); + if(*hash!=NULL){ + MSG("Cal hash\r\n"); + ret=blsp_cal_ram_img_hash(src,total_len,*hash); + if(ret!=0){ + return BFLB_BOOT2_IMG_HASH_ERROR; + } + } + return 0; +} + +/****************************************************************************/ /** + * @brief Boot2 do ram iamge boot,check partition to boot these images up + * + * @param activeID: Active partition table ID + * @param ptStuff: Pointer of partition table stuff + * @param ptEntry: Pointer of active entry + * + * @return None + * +*******************************************************************************/ +__UNUSED__ int blsp_do_ram_image_boot(pt_table_id_type active_id, pt_table_stuff_config *pt_stuff, pt_table_entry_config *pt_entry) +{ + int ret; + uint32_t img_len=0; + uint32_t img_offset=0; + char* img_name[BLSP_BOOT2_RAM_IMG_COUNT_MAX]; + uint32_t ram_img_cnt=0; + uint32_t i=0; + uint8_t active_index=0; + uint32_t hash[8]; + uint8_t *phash=(uint8_t *)hash; + int try_again=0; + void blsp_dump_pt_entry(pt_table_entry_config *pt_entry); + int32_t blsp_boot2_rollback_ptentry(pt_table_id_type active_id, + pt_table_stuff_config *pt_stuff, pt_table_entry_config *pt_entry); + + hal_boot2_get_ram_img_cnt(img_name,&ram_img_cnt); + if(ram_img_cnt==0){ + return try_again; + } + for(i=0;ilen as flag for ram load, this + is very tricky but no rsvd word found */ + if((pt_entry->len&0xF0000000)==0){ + continue; + } + ram_img_config[i].valid=1; + ram_img_config[i].boot_addr=pt_entry->len&0xfffffff0; + ram_img_config[i].core=pt_entry->len&0x0f; + active_index=pt_entry->active_index&0x01; + MSG("header addr:%08x\r\n",pt_entry->start_address[active_index]); + flash_read(pt_entry->start_address[active_index], + g_boot2_read_buf,BFLB_BOOT2_READBUF_SIZE); + hal_boot2_get_img_info(g_boot2_read_buf,&img_offset,&img_len,&phash); + if(img_len){ + MSG("copy from %08x to %08x,len %d\r\n", + pt_entry->start_address[active_index]+img_offset, + ram_img_config[i].boot_addr, + img_len); + ret=blsp_do_ram_img_copy(pt_entry->start_address[active_index]+img_offset, + ram_img_config[i].boot_addr, + img_len,&phash); + if(BFLB_BOOT2_IMG_HASH_ERROR==ret){ + ret=blsp_boot2_rollback_ptentry(active_id, &pt_stuff[active_id], pt_entry); + if(ret==BFLB_BOOT2_SUCCESS){ + try_again=1; + break; + }else{ + MSG("Roll back entry fail\r\n"); + } + } + }else{ + MSG("Get ram image infor fail\r\n"); + } + } else { + MSG("%s not found\r\n",img_name[i]); + } + } + return try_again; +} +#endif \ No newline at end of file diff --git a/examples/boot2_iap/compile_cmd.txt b/examples/boot2_iap/compile_cmd.txt deleted file mode 100644 index 225b3e0a..00000000 --- a/examples/boot2_iap/compile_cmd.txt +++ /dev/null @@ -1 +0,0 @@ -make build SUPPORT_XZ=y APP=boot2 BOARD=bl706_avb \ No newline at end of file diff --git a/examples/boot2_iap/main.c b/examples/boot2_iap/main.c index f68086db..7c7f9a9a 100644 --- a/examples/boot2_iap/main.c +++ b/examples/boot2_iap/main.c @@ -47,16 +47,16 @@ #include "hal_uart.h" #include "hal_flash.h" #include "hal_boot2.h" -#include "hal_clock.h" uint8_t *g_boot2_read_buf; -boot2_image_config g_boot_img_cfg[2]; +boot2_image_config g_boot_img_cfg[BLSP_BOOT2_CPU_GROUP_MAX]; boot2_efuse_hw_config g_efuse_cfg; uint8_t g_ps_mode = BFLB_PSM_ACTIVE; -uint8_t g_cpu_count; uint32_t g_user_hash_ignored = 0; uint8_t g_usb_init_flag = 0; - +ATTR_NOCACHE_RAM_SECTION sec_hash_handle_t hash_handle ; +int blsp_do_ram_image_boot(pt_table_id_type active_id, pt_table_stuff_config *pt_stuff, + pt_table_entry_config *pt_entry); /****************************************************************************/ /** * @brief Boot2 runs error call back function * @@ -79,11 +79,12 @@ static void blsp_boot2_on_error(void *log) bflb_eflash_loader_main(); } #endif +#if BLSP_BOOT2_SUPPORT_EFLASH_LOADER_FLASH||BLSP_BOOT2_SUPPORT_EFLASH_LOADER_RAM bflb_eflash_loader_if_set(BFLB_EFLASH_LOADER_IF_UART); if (0 == bflb_eflash_loader_if_handshake_poll(0)) { bflb_eflash_loader_main(); } - +#endif MSG_ERR("%s\r\n", (char *)log); arch_delay_ms(500); } @@ -237,17 +238,17 @@ static int blsp_boot2_deal_one_fw(pt_table_id_type active_id, pt_table_stuff_con #endif /* Check if this partition need copy */ if (pt_entry->active_index >= 2) { - MSG("Find OTA image, do image copy\r\n"); + MSG("Do image copy\r\n"); if (BFLB_BOOT2_SUCCESS == blsp_boot2_do_fw_copy(active_id, pt_stuff, pt_entry)) { pt_entry->active_index = !(pt_entry->active_index & 0x01); pt_entry->age++; ret = pt_table_update_entry((pt_table_id_type)(!active_id), pt_stuff, pt_entry); if (ret != PT_ERROR_SUCCESS) { - MSG_ERR("Update Partition table entry fail, After Image Copy\r\n"); + MSG_ERR("Update Partition table entry fail\r\n"); return BFLB_BOOT2_FAIL; } else { - MSG("OTA image copy done\r\n"); + MSG("Done\r\n"); } return 0; @@ -269,7 +270,7 @@ static int blsp_boot2_deal_one_fw(pt_table_id_type active_id, pt_table_stuff_con * *******************************************************************************/ #ifdef BLSP_BOOT2_ROLLBACK -static int32_t blsp_boot2_rollback_ptentry(pt_table_id_type active_id, pt_table_stuff_config *pt_stuff, pt_table_entry_config *pt_entry) +int32_t blsp_boot2_rollback_ptentry(pt_table_id_type active_id, pt_table_stuff_config *pt_stuff, pt_table_entry_config *pt_entry) { int32_t ret; @@ -334,26 +335,30 @@ int main(void) pt_table_stuff_config pt_table_stuff[2]; pt_table_id_type active_id; /* Init to zero incase only one cpu boot up*/ - pt_table_entry_config pt_entry[BFLB_BOOT2_CPU_MAX] = { 0 }; - uint32_t boot_header_addr[BFLB_BOOT2_CPU_MAX] = { 0 }; - uint8_t boot_need_rollback[BFLB_BOOT2_CPU_MAX] = { 0 }; + pt_table_entry_config pt_entry[BLSP_BOOT2_CPU_GROUP_MAX] = { 0 }; + uint32_t boot_header_addr[BLSP_BOOT2_CPU_GROUP_MAX] = { 0 }; + uint8_t boot_need_rollback[BLSP_BOOT2_CPU_GROUP_MAX] = { 0 }; uint8_t pt_parsed = 1; uint8_t user_fw_name[9] = { 0 }; uint32_t user_fw; #ifdef BLSP_BOOT2_ROLLBACK uint8_t roll_backed = 0; #endif - uint8_t mfg_mode_flag = 0; //boot_clk_config clk_cfg; uint8_t flash_cfg_buf[4 + sizeof(SPI_Flash_Cfg_Type) + 4] = { 0 }; uint32_t crc; uint8_t *flash_cfg = NULL; uint32_t flash_cfg_len = 0; + extern void system_mtimer_clock_init(void); + extern void peripheral_clock_init(void); system_mtimer_clock_init(); peripheral_clock_init(); + blsp_boot2_start_timer(); + hal_boot2_get_efuse_cfg(&g_efuse_cfg); + #if (BLSP_BOOT2_MODE == BOOT2_MODE_RELEASE) bflb_platform_print_set(1); #endif @@ -372,19 +377,26 @@ int main(void) simple_malloc_init(g_malloc_buf, sizeof(g_malloc_buf)); g_boot2_read_buf = vmalloc(BFLB_BOOT2_READBUF_SIZE); - - hal_boot2_custom(); - flash_init(); - - bflb_platform_deinit_time(); - - if (blsp_boot2_get_feature_flag() == BLSP_BOOT2_CP_FLAG) { - MSG("BLSP_Boot2_CP:%s,%s\r\n", __DATE__, __TIME__); - } else if (blsp_boot2_get_feature_flag() == BLSP_BOOT2_MP_FLAG) { - MSG("BLSP_Boot2_MC:%s,%s\r\n", __DATE__, __TIME__); - } else { - MSG("BLSP_Boot2_SP:%s,%s\r\n", __DATE__, __TIME__); + ret = hal_boot2_custom(); + MSG("custom %04x\r\n",ret); + ret = flash_init(); + if(ret){ + while(1){ + MSG_ERR("flash cfg get err\r\n"); + arch_delay_ms(500); + } } + MSG("flash init ret %d\r\n",(int)ret); + + MSG("BLSP Boot2 start:%s,%s\r\n", __DATE__, __TIME__); + MSG("Group=%d,CPU Count=%d\r\n", hal_boot2_get_grp_count(),hal_boot2_get_cpu_count()); +#if BLSP_BOOT2_CPU_MAX>1 + if (hal_boot2_get_feature_flag() == HAL_BOOT2_CP_FLAG) { + MSG("Boot As Co-CPU\r\n"); + }else{ + MSG("Boot As Normal\r\n"); + } +#endif #ifdef BL_SDK_VER MSG("sdk:%s\r\n", BL_SDK_VER); #else @@ -393,18 +405,8 @@ int main(void) MSG("BSP Common:%s\r\n", BSP_COMMON_VERSION); #endif - MSG("Get efuse config\r\n"); - hal_boot2_get_efuse_cfg(&g_efuse_cfg); - /* Reset Sec_Eng for using */ hal_boot2_reset_sec_eng(); - if (blsp_boot2_get_feature_flag() != BLSP_BOOT2_SP_FLAG) { - /* Get cpu count info */ - g_cpu_count = blsp_boot2_get_cpu_count(); - } else { - g_cpu_count = 1; - } - /* Get power save mode */ g_ps_mode = blsp_read_power_save_mode(); @@ -428,11 +430,21 @@ int main(void) } #endif - pt_table_dump(); + //pt_table_dump(); +#if BLSP_BOOT2_RAM_IMG_COUNT_MAX>0 + /* Deal with ram image: copy from flash to ram like */ + do { + active_id = pt_table_get_active_partition_need_lock(pt_table_stuff); + if (PT_TABLE_ID_INVALID == active_id) { + blsp_boot2_on_error("No valid PT\r\n"); + } + ret=blsp_do_ram_image_boot(active_id, &pt_table_stuff[active_id], &pt_entry[0]); + } while (ret != 0); +#endif + /* Deal with flash image */ while (1) { mfg_mode_flag = 0; - do { active_id = pt_table_get_active_partition_need_lock(pt_table_stuff); @@ -455,7 +467,7 @@ int main(void) } mfg_mode_flag = 1; user_fw_name[0] = 0; - } else if (user_fw_name[0] == '1' && g_cpu_count > 1) { + } else if (user_fw_name[0] == '1' && BLSP_BOOT2_CPU_GROUP_MAX > 1) { g_user_hash_ignored = 1; pt_parsed = blsp_boot2_deal_one_fw(active_id, &pt_table_stuff[active_id], &pt_entry[1], &user_fw_name[1], PT_ENTRY_FW_CPU1); if (pt_parsed == 0) { @@ -466,11 +478,13 @@ int main(void) mfg_mode_flag = 1; user_fw_name[0] = 0; } else { + /* partition type 0 is group0*/ pt_parsed = blsp_boot2_deal_one_fw(active_id, &pt_table_stuff[active_id], &pt_entry[0], NULL, PT_ENTRY_FW_CPU0); if (pt_parsed == 0) { continue; } - if (g_cpu_count > 1) { + /* partition type 1 is group1 */ + if (BLSP_BOOT2_CPU_GROUP_MAX > 1) { pt_parsed = blsp_boot2_deal_one_fw(active_id, &pt_table_stuff[active_id], &pt_entry[1], NULL, PT_ENTRY_FW_CPU1); if (pt_parsed == 0) { continue; @@ -501,7 +515,7 @@ int main(void) MSG("Boot start\r\n"); - for (i = 0; i < g_cpu_count; i++) { + for (i = 0; i < BLSP_BOOT2_CPU_GROUP_MAX; i++) { boot_header_addr[i] = pt_entry[i].start_address[pt_entry[i].active_index]; } @@ -527,12 +541,11 @@ int main(void) break; } - MSG("Boot return 0x%04x\r\n", ret); - MSG("Check Rollback\r\n"); + MSG("Boot return 0x%04x\r\nCheck Rollback\r\n", ret); - for (i = 0; i < g_cpu_count; i++) { + for (i = 0; i < BLSP_BOOT2_CPU_GROUP_MAX; i++) { if (boot_need_rollback[i] != 0) { - MSG("Rollback %d\r\n", i); + MSG("Rollback group %d\r\n", i); if (BFLB_BOOT2_SUCCESS == blsp_boot2_rollback_ptentry(active_id, &pt_table_stuff[active_id], &pt_entry[i])) { roll_backed = 1; @@ -565,11 +578,12 @@ int main(void) bflb_eflash_loader_main(); } #endif +#if BLSP_BOOT2_SUPPORT_EFLASH_LOADER_FLASH||BLSP_BOOT2_SUPPORT_EFLASH_LOADER_RAM bflb_eflash_loader_if_set(BFLB_EFLASH_LOADER_IF_UART); if (0 == bflb_eflash_loader_if_handshake_poll(0)) { bflb_eflash_loader_main(); } - +#endif MSG_ERR("BLSP boot2 fail\r\n"); arch_delay_ms(500); } diff --git a/examples/boot2_iap/partition_cfg_1M.toml b/examples/boot2_iap/partition_cfg_1M.toml deleted file mode 100644 index 6395682b..00000000 --- a/examples/boot2_iap/partition_cfg_1M.toml +++ /dev/null @@ -1,29 +0,0 @@ -[pt_table] -#partition table is 4K in size -address0 = 0xE000 -address1 = 0xF000 - -[[pt_entry]] -type = 0 -name = "FW" -device = 0 -address0 = 0x010000 -size0 = 0x60000 -address1 = 0x70000 -size1 = 0x60000 -# compressed image must set len,normal image can left it to 0 -len = 0 - - - -[[pt_entry]] -type = 7 -name = "factory" -device = 0 -address0 = 0x0FB000 -size0 = 0x4000 -address1 = 0 -size1 = 0 -# compressed image must set len,normal image can left it to 0 -len = 0 -