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https://github.com/Fishwaldo/bl_mcu_sdk.git
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[update][lhal] update lhal
* update lhal api comments * add cam driver * add efuse driver * add iso11898 driver
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jzlv
parent
185805cbbe
commit
a77b0dc866
60 changed files with 8782 additions and 429 deletions
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@ -1,44 +1,16 @@
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/**
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******************************************************************************
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* @file bflb_emac.h
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* @version V1.0
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* @date 2022-09-27
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* @brief This file is the low hardware abstraction layer file
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT(c) 2022 Bouffalo Lab</center></h2>
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of Bouffalo Lab nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************
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*/
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#ifndef _BFLB_EMAC_H
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#define _BFLB_EMAC_H
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#include "bflb_core.h"
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/** @addtogroup LHAL
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* @{
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*/
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/** @addtogroup EMAC
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* @{
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*/
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#define EMAC_DO_FLUSH_DATA (1)
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/* EMAC clock use external or use internal; 0: used external 1: used internal */
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@ -63,8 +35,11 @@
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#define EMAC_CMD_SET_MAX_FRAME (0x0D)
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#define EMAC_CMD_SET_MAXRET (0x0E)
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#define EMAC_CMD_SET_COLLVALID (0x0F)
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/**
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* @}
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*/
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/** @defgroup PHY state definition
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/** @defgroup PHY_STATE phy state definition
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* @{
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*/
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#define PHY_STATE_DOWN (0) /* PHY is not usable */
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@ -74,6 +49,9 @@
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#define PHY_STATE_NOLINK (4) /* no cable connected */
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#define PHY_STATE_STOPPED (5) /* PHY has been stopped */
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#define PHY_STATE_TESTING (6) /* in test mode */
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/**
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* @}
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*/
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/* EMAC PACKET */
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#define EMAC_NORMAL_PACKET (uint32_t)(0)
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@ -156,7 +134,7 @@ struct bflb_emac_config_s {
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* @param phy_address EMAC phy address
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* @param phy_id EMAC phy read phy id
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*/
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struct emac_phy_cfg_s {
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struct bflb_emac_phy_cfg_s {
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uint8_t auto_negotiation;
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uint8_t full_duplex;
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uint8_t phy_state;
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@ -166,68 +144,200 @@ struct emac_phy_cfg_s {
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uint32_t phy_id;
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};
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/**
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* @brief Note: Always write DWORD1 (buffer addr) first then DWORD0 for racing concern.
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*/
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struct emac_bd_desc_s {
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uint32_t C_S_L; /*!< Buffer Descriptors(BD) control,status,length */
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uint32_t Buffer; /*!< BD buffer address */
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};
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/**
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* @brief emac handle type definition
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* @param bd Tx descriptor header pointer
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* @param tx_index_emac TX index: EMAC
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* @param tx_index_cpu TX index: CPU/SW
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* @param tx_buff_limit TX index max
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* @param rsv0 rsv0
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* @param rx_index_emac RX index: EMAC
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* @param rx_index_cpu RX index: CPU/SW
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* @param rx_buff_limit RX index max
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* @param rsv1 rsv1
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*
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*/
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struct emac_handle_s {
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struct emac_bd_desc_s *bd;
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uint8_t tx_index_emac;
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uint8_t tx_index_cpu;
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uint8_t tx_buff_limit;
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uint8_t rsv0;
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uint8_t rx_index_emac;
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uint8_t rx_index_cpu;
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uint8_t rx_buff_limit;
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uint8_t rsv1;
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};
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief
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*
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* @param [in] dev
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* @param [in] config
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*/
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void bflb_emac_init(struct bflb_device_s *dev, const struct bflb_emac_config_s *config);
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void bflb_emac_bd_init(struct bflb_device_s *dev, uint8_t *eth_tx_buff, uint8_t tx_buf_count, uint8_t *eth_rx_buff, uint8_t rx_buf_count);
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int emac_bd_fragment_support(void);
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int bflb_emac_feature_control(struct bflb_device_s *dev, int cmd, size_t arg);
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void bflb_emac_int_enable(struct bflb_device_s *dev, uint32_t flag, bool enable);
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void bflb_emac_int_clear(struct bflb_device_s *dev, uint32_t flag);
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uint32_t bflb_emac_get_int_status(struct bflb_device_s *dev);
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uint32_t bflb_emac_bd_get_cur_active(struct bflb_device_s *dev, uint8_t bdt);
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void bflb_emac_bd_rx_enqueue(uint32_t index);
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void bflb_emac_bd_rx_on_err(uint32_t index);
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void bflb_emac_bd_tx_dequeue(uint32_t index);
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void bflb_emac_bd_tx_on_err(uint32_t index);
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int bflb_emac_bd_tx_enqueue(uint32_t flags, uint32_t len, const uint8_t *data_in);
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int bflb_emac_bd_rx_dequeue(uint32_t flags, uint32_t *len, uint8_t *data_out);
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int bflb_emac_phy_reg_read(struct bflb_device_s *dev, uint16_t phy_reg, uint16_t *phy_reg_val);
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int bflb_emac_phy_reg_write(struct bflb_device_s *dev, uint16_t phy_reg, uint16_t phy_reg_val);
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/**
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* @brief
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*
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* @param [in] dev
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*/
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void bflb_emac_stop(struct bflb_device_s *dev);
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/**
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* @brief
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*
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* @param [in] dev
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*/
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void bflb_emac_start(struct bflb_device_s *dev);
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/**
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* @brief
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*
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* @param [in] dev
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*/
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void bflb_emac_start_tx(struct bflb_device_s *dev);
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/**
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* @brief
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*
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* @param [in] dev
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*/
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void bflb_emac_stop_tx(struct bflb_device_s *dev);
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/**
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* @brief
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*
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* @param [in] dev
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*/
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void bflb_emac_start_rx(struct bflb_device_s *dev);
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/**
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* @brief
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*
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* @param [in] dev
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*/
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void bflb_emac_stop_rx(struct bflb_device_s *dev);
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/**
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* @brief
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*
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* @param [in] dev
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* @param [in] eth_tx_buff
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* @param [in] tx_buf_count
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* @param [in] eth_rx_buff
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* @param [in] rx_buf_count
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*/
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void bflb_emac_bd_init(struct bflb_device_s *dev, uint8_t *eth_tx_buff, uint8_t tx_buf_count, uint8_t *eth_rx_buff, uint8_t rx_buf_count);
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/**
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* @brief
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*
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* @param [in] dev
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* @param [in] bdt
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* @return uint32_t
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*/
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uint32_t bflb_emac_bd_get_cur_active(struct bflb_device_s *dev, uint8_t bdt);
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/**
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* @brief
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*
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* @param [in] index
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*/
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void bflb_emac_bd_rx_enqueue(uint32_t index);
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/**
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* @brief
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*
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* @param [in] index
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*/
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void bflb_emac_bd_rx_on_err(uint32_t index);
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/**
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* @brief
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*
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* @param [in] index
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*/
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void bflb_emac_bd_tx_dequeue(uint32_t index);
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/**
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* @brief
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*
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* @param [in] index
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*/
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void bflb_emac_bd_tx_on_err(uint32_t index);
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/**
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* @brief
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*
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* @param [in] flags
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* @param [in] len
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* @param [in] data_in
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* @return int
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*/
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int bflb_emac_bd_tx_enqueue(uint32_t flags, uint32_t len, const uint8_t *data_in);
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/**
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* @brief
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*
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* @param [in] flags
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* @param [in] len
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* @param [in] data_out
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* @return int
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*/
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int bflb_emac_bd_rx_dequeue(uint32_t flags, uint32_t *len, uint8_t *data_out);
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/**
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* @brief
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*
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* @return int
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*/
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int emac_bd_fragment_support(void);
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/**
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* @brief
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*
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* @param [in] dev
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* @param [in] flag
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* @param [in] enable
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*/
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void bflb_emac_int_enable(struct bflb_device_s *dev, uint32_t flag, bool enable);
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/**
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* @brief
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*
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* @param [in] dev
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* @param [in] flag
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*/
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void bflb_emac_int_clear(struct bflb_device_s *dev, uint32_t flag);
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/**
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* @brief
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*
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* @param [in] dev
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* @return uint32_t
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*/
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uint32_t bflb_emac_get_int_status(struct bflb_device_s *dev);
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/**
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* @brief
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*
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* @param [in] dev
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* @param [in] cmd
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* @param [in] arg
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* @return int
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*/
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int bflb_emac_feature_control(struct bflb_device_s *dev, int cmd, size_t arg);
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/**
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* @brief
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*
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* @param [in] dev
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* @param [in] phy_reg
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* @param [in] phy_reg_val
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* @return int
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*/
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int bflb_emac_phy_reg_read(struct bflb_device_s *dev, uint16_t phy_reg, uint16_t *phy_reg_val);
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/**
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* @brief
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*
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* @param [in] dev
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* @param [in] phy_reg
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* @param [in] phy_reg_val
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* @return int
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*/
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int bflb_emac_phy_reg_write(struct bflb_device_s *dev, uint16_t phy_reg, uint16_t phy_reg_val);
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#ifdef __cplusplus
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}
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#endif
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#endif /* _BFLB_EMAC_H */
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/**
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* @}
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*/
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/**
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* @}
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*/
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#endif
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