GitHub-Mirror/bl_mcu_sdk
2
0
Fork 0
mirror of https://github.com/Fishwaldo/bl_mcu_sdk.git synced 2025-07-06 21:08:50 +00:00
Code Issues Projects Releases Packages Wiki Activity Actions

[fix] fix some code bugs

Browse source
This commit is contained in:
jzlv 2021-07-26 10:47:01 +08:00
parent 291ab32674
commit cbedd52d06
7 changed files with 84 additions and 88 deletions
Download patch file Download diff file Expand all files Collapse all files

2
drivers/bl702_driver/hal_drv/inc/hal_dma.h
View file

@ -192,7 +192,7 @@ typedef struct dma_device {
#define DMA_DEV(dev) ((dma_device_t *)dev)
int dma_register(enum dma_index_type, const char *name);
int dma_register(enum dma_index_type index, const char *name);
int dma_allocate_register(const char *name);
int dma_reload(struct device *dev, uint32_t src_addr, uint32_t dst_addr, uint32_t transfer_size);

2
drivers/bl702_driver/hal_drv/src/hal_dac.c
View file

@ -64,6 +64,7 @@ int dac_open(struct device *dev, uint16_t oflag)
/* 12.2880MHZ / 24 / 64 = 8KHZ*/
GLB_Set_DAC_CLK(ENABLE, GLB_DAC_CLK_AUDIO_PLL, 24);
dacCfg.div = DAC_CLK_DIV_64;
break;
case DAC_CLK_16KHZ:
/* set audio pll as 12.288MHZ*/
@ -71,6 +72,7 @@ int dac_open(struct device *dev, uint16_t oflag)
/* 12.2880MHZ / 24 / 32 = 16KHZ*/
GLB_Set_DAC_CLK(ENABLE, GLB_DAC_CLK_AUDIO_PLL, 24);
dacCfg.div = DAC_CLK_DIV_32;
break;
case DAC_CLK_44P1KHZ:
/* set audio pll as 11.2896MHZ*/

2
drivers/bl702_driver/hal_drv/src/hal_sec_ecdsa.c
View file

@ -651,7 +651,7 @@ static int32_t sec_ecdh_get_scalar_point(uint8_t id, const uint32_t *pkX, const
MSG("R.y%n=\r\n");
bflb_platform_dump(pRy, ECP_SECP256R1_SIZE);
#endif
return -1;
return 0;
}
static int32_t sec_ecc_is_zero(uint8_t *a, uint32_t len)

5
drivers/bl702_driver/hal_drv/src/hal_sec_hash.c
View file

@ -76,9 +76,8 @@ int sec_hash_open(struct device *dev, uint16_t oflag)
*/
int sec_hash_close(struct device *dev)
{
sec_hash_device_t *sec_hash_device = (sec_hash_device_t *)dev;
memset(sec_hash_device, 0, sizeof(sec_hash_device_t));
//sec_hash_device_t *sec_hash_device = (sec_hash_device_t *)dev;
//memset(sec_hash_device, 0, sizeof(sec_hash_device_t)); //will cause crash
return 0;
}
/**

66
drivers/bl702_driver/std_drv/src/bl702_hbn.c
View file

@ -1561,23 +1561,6 @@ BL_Err_Type HBN_Clear_Reset_Event(void)
return SUCCESS;
}
/****************************************************************************/ /**
* @brief HBN out0 IRQHandler install
*
* @param None
*
* @return SUCCESS or ERROR
*
*******************************************************************************/
BL_Err_Type HBN_Out0_IRQHandler_Install(void)
{
#ifndef BFLB_USE_HAL_DRIVER
Interrupt_Handler_Register(HBN_OUT0_IRQn, HBN_OUT0_IRQHandler);
#endif
return SUCCESS;
}
/****************************************************************************/ /**
* @brief HBN out0 install interrupt callback
*
@ -1597,23 +1580,6 @@ BL_Err_Type HBN_Out0_Callback_Install(HBN_OUT0_INT_Type intType, intCallback_Typ
return SUCCESS;
}
/****************************************************************************/ /**
* @brief HBN out1 IRQHandler install
*
* @param None
*
* @return SUCCESS or ERROR
*
*******************************************************************************/
BL_Err_Type HBN_Out1_IRQHandler_Install(void)
{
#ifndef BFLB_USE_HAL_DRIVER
Interrupt_Handler_Register(HBN_OUT1_IRQn, HBN_OUT1_IRQHandler);
#endif
return SUCCESS;
}
/****************************************************************************/ /**
* @brief HBN out1 install interrupt callback
*
@ -1810,7 +1776,6 @@ BL_Err_Type HBN_Set_BOR_Cfg(HBN_BOR_CFG_Type *cfg)
* @return None
*
*******************************************************************************/
#ifndef BFLB_USE_HAL_DRIVER
void HBN_OUT0_IRQHandler(void)
{
if (SET == HBN_Get_INT_State(HBN_INT_GPIO9)) {
@ -1862,7 +1827,6 @@ void HBN_OUT0_IRQHandler(void)
}
}
}
#endif
/****************************************************************************/ /**
* @brief HBN OUT1 interrupt handler
@ -1872,7 +1836,6 @@ void HBN_OUT0_IRQHandler(void)
* @return None
*
*******************************************************************************/
#ifndef BFLB_USE_HAL_DRIVER
void HBN_OUT1_IRQHandler(void)
{
/* PIR */
@ -1911,7 +1874,6 @@ void HBN_OUT1_IRQHandler(void)
}
}
}
#endif
/****************************************************************************/ /**
* @brief Enable HBN mode
@ -2014,6 +1976,34 @@ void ATTR_TCM_SECTION HBN_Enable(uint8_t aGPIOIeCfg, HBN_LDO_LEVEL_Type ldoLevel
}
}
/****************************************************************************/ /**
* @brief HBN out0 IRQHandler install
*
* @param None
*
* @return SUCCESS or ERROR
*
*******************************************************************************/
BL_Err_Type HBN_Out0_IRQHandler_Install(void)
{
Interrupt_Handler_Register(HBN_OUT0_IRQn, HBN_OUT0_IRQHandler);
return SUCCESS;
}
/****************************************************************************/ /**
* @brief HBN out1 IRQHandler install
*
* @param None
*
* @return SUCCESS or ERROR
*
*******************************************************************************/
BL_Err_Type HBN_Out1_IRQHandler_Install(void)
{
Interrupt_Handler_Register(HBN_OUT1_IRQn, HBN_OUT1_IRQHandler);
return SUCCESS;
}
/*@} end of group HBN_Public_Functions */
/*@} end of group HBN */

53
drivers/bl702_driver/std_drv/src/bl702_pds.c
View file

@ -286,7 +286,7 @@ BL_Err_Type PDS_IntEn(PDS_INT_Type intType, BL_Fun_Type enable)
case PDS_INT_WAKEUP:
case PDS_INT_RF_DONE:
case PDS_INT_PLL_DONE:
break;
return ERROR;
case PDS_INT_PDS_SLEEP_CNT:
offset = 16;
@ -381,7 +381,7 @@ BL_Err_Type PDS_IntMask(PDS_INT_Type intType, BL_Mask_Type intMask)
case PDS_INT_KYS_QDEC:
case PDS_INT_MAX:
default:
break;
return ERROR;
}
tmpVal = BL_RD_REG(PDS_BASE, PDS_INT);
@ -423,35 +423,35 @@ BL_Sts_Type PDS_Get_IntStatus(PDS_INT_Type intType)
break;
case PDS_INT_PDS_SLEEP_CNT:
offset = 16;
offset = 24;
break;
case PDS_INT_HBN_IRQ_OUT0:
offset = 17;
offset = 25;
break;
case PDS_INT_HBN_IRQ_OUT1:
offset = 18;
offset = 26;
break;
case PDS_INT_GPIO_IRQ:
offset = 19;
offset = 27;
break;
case PDS_INT_IRRX:
offset = 20;
offset = 28;
break;
case PDS_INT_BLE_SLP_IRQ:
offset = 21;
offset = 29;
break;
case PDS_INT_USB_WKUP:
offset = 22;
offset = 30;
break;
case PDS_INT_KYS_QDEC:
offset = 23;
offset = 31;
break;
case PDS_INT_MAX:
@ -664,23 +664,6 @@ BL_Err_Type PDS_Set_Vddcore_GPIO_IntClear(void)
return SUCCESS;
}
/****************************************************************************/ /**
* @brief PDS wakeup IRQHandler install
*
* @param None
*
* @return SUCCESS or ERROR
*
*******************************************************************************/
BL_Err_Type PDS_WAKEUP_IRQHandler_Install(void)
{
#ifndef BFLB_USE_HAL_DRIVER
Interrupt_Handler_Register(PDS_WAKEUP_IRQn, PDS_WAKEUP_IRQHandler);
#endif
return SUCCESS;
}
/****************************************************************************/ /**
* @brief Install PDS interrupt callback function
*
@ -1320,7 +1303,6 @@ void ATTR_TCM_SECTION PDS_Manual_Force_Turn_On(PDS_FORCE_Type domain)
* @return None
*
*******************************************************************************/
#ifndef BFLB_USE_HAL_DRIVER
void PDS_WAKEUP_IRQHandler(void)
{
for (PDS_INT_Type intType = PDS_INT_WAKEUP; intType < PDS_INT_MAX; intType++) {
@ -1331,7 +1313,20 @@ void PDS_WAKEUP_IRQHandler(void)
PDS_IntClear();
}
#endif
/****************************************************************************/ /**
* @brief PDS wakeup IRQHandler install
*
* @param None
*
* @return SUCCESS or ERROR
*
*******************************************************************************/
BL_Err_Type PDS_WAKEUP_IRQHandler_Install(void)
{
Interrupt_Handler_Register(PDS_WAKEUP_IRQn, PDS_WAKEUP_IRQHandler);
return SUCCESS;
}
/*@} end of group PDS_Public_Functions */

42
drivers/bl702_driver/std_drv/src/bl702_sec_eng.c
View file

@ -1957,14 +1957,19 @@ static BL_Err_Type Sec_Eng_PKA_Wait_ISR(void)
#ifndef __GNUC__
__ASM void Sec_Eng_PKA_Read_Block(uint32_t *dest, const uint32_t *src, uint32_t len)
{
PUSH{ R3 - R6, LR } Start0
CMP R2,
# 4 BLT Finish0
LDR R3,
[R1] LDR R4, [R1] LDR R5, [R1] LDR R6, [R1] STMIA R0 !, { R3 - R6 } SUBS R2, R2, #4 B Start0 Finish0 POP
{
R3 - R6, PC
}
PUSH {R3-R6,LR}
Start0
CMP R2,#4
BLT Finish0
LDR R3,[R1]
LDR R4,[R1]
LDR R5,[R1]
LDR R6,[R1]
STMIA R0!,{R3-R6}
SUBS R2,R2,#4
B Start0
Finish0
POP {R3-R6,PC}
}
#else
void Sec_Eng_PKA_Read_Block(uint32_t *dest, const uint32_t *src, uint32_t len)
@ -2011,14 +2016,19 @@ void Sec_Eng_PKA_Read_Block(uint32_t *dest, const uint32_t *src, uint32_t len)
#ifndef __GNUC__
__ASM void Sec_Eng_PKA_Write_Block(uint32_t *dest, const uint32_t *src, uint32_t len)
{
PUSH{ R3 - R6, LR } Start1
CMP R2,
# 4 BLT Finish1
LDMIA R1 !,
{ R3 - R6 } STR R3, [R0] STR R4, [R0] STR R5, [R0] STR R6, [R0] SUBS R2, R2, #4 B Start1 Finish1 POP
{
R3 - R6, PC
}
PUSH {R3-R6,LR}
Start1
CMP R2,#4
BLT Finish1
LDMIA R1!,{R3-R6}
STR R3,[R0]
STR R4,[R0]
STR R5,[R0]
STR R6,[R0]
SUBS R2,R2,#4
B Start1
Finish1
POP {R3-R6,PC}
}
#else
void Sec_Eng_PKA_Write_Block(uint32_t *dest, const uint32_t *src, uint32_t len)