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jzlv 2021-06-20 12:25:46 +08:00
parent 47ce9f871c
commit d427e7fdda
1131 changed files with 7338846 additions and 422042 deletions
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12
bsp/board/bl602_iot/bl602_config.h
View file

@ -1,24 +1,24 @@
/**
* @file bl602_config.h
* @brief
*
* @brief
*
* Copyright (c) 2021 Bouffalolab team
*
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
*
* http://www.apache.org/licenses/LICENSE-2.0
*
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
*
*/
#ifndef __BL702_CONFIG_H__

228
bsp/board/bl602_iot/board.c
View file

@ -1,24 +1,24 @@
/**
* @file board.c
* @brief
*
* @brief
*
* Copyright (c) 2021 Bouffalolab team
*
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
*
* http://www.apache.org/licenses/LICENSE-2.0
*
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
*
*/
#include "hal_gpio.h"
@ -26,130 +26,70 @@
#include "bl602_glb.h"
#include "pinmux_config.h"
struct pin_mux_cfg
{
struct pin_mux_cfg {
uint8_t pin;
uint16_t func;
};
static const struct pin_mux_cfg af_pin_table[] =
{
{
.pin = GPIO_PIN_0,
.func = CONFIG_GPIO0_FUNC
},
{
.pin = GPIO_PIN_1,
.func = CONFIG_GPIO1_FUNC
},
{
.pin = GPIO_PIN_2,
.func = CONFIG_GPIO2_FUNC
},
{
.pin = GPIO_PIN_3,
.func = CONFIG_GPIO3_FUNC
},
{
.pin = GPIO_PIN_4,
.func = CONFIG_GPIO4_FUNC
},
{
.pin = GPIO_PIN_5,
.func = CONFIG_GPIO5_FUNC
},
{
.pin = GPIO_PIN_6,
.func = CONFIG_GPIO6_FUNC
},
{
.pin = GPIO_PIN_7,
.func = CONFIG_GPIO7_FUNC
},
{
.pin = GPIO_PIN_8,
.func = CONFIG_GPIO8_FUNC
},
{
.pin = GPIO_PIN_9,
.func = CONFIG_GPIO9_FUNC
},
{
.pin = GPIO_PIN_10,
.func = CONFIG_GPIO10_FUNC
},
{
.pin = GPIO_PIN_11,
.func = CONFIG_GPIO11_FUNC
},
{
.pin = GPIO_PIN_12,
.func = CONFIG_GPIO12_FUNC
},
{
.pin = GPIO_PIN_13,
.func = CONFIG_GPIO13_FUNC
},
{
.pin = GPIO_PIN_14,
.func = CONFIG_GPIO14_FUNC
},
{
.pin = GPIO_PIN_15,
.func = CONFIG_GPIO15_FUNC
},
{
.pin = GPIO_PIN_16,
.func = CONFIG_GPIO16_FUNC
},
{
.pin = GPIO_PIN_17,
.func = CONFIG_GPIO17_FUNC
},
{
.pin = GPIO_PIN_18,
.func = CONFIG_GPIO18_FUNC
},
{
.pin = GPIO_PIN_19,
.func = CONFIG_GPIO19_FUNC
},
{
.pin = GPIO_PIN_20,
.func = CONFIG_GPIO20_FUNC
},
{
.pin = GPIO_PIN_21,
.func = CONFIG_GPIO21_FUNC
},
{
.pin = GPIO_PIN_22,
.func = CONFIG_GPIO22_FUNC
},
{
.pin = GPIO_PIN_23,
.func = CONFIG_GPIO23_FUNC
},
{
.pin = GPIO_PIN_24,
.func = CONFIG_GPIO24_FUNC
},
{
.pin = GPIO_PIN_25,
.func = CONFIG_GPIO25_FUNC
},
{
.pin = GPIO_PIN_26,
.func = CONFIG_GPIO26_FUNC
},
{
.pin = GPIO_PIN_27,
.func = CONFIG_GPIO27_FUNC
},
{
.pin = GPIO_PIN_28,
.func = CONFIG_GPIO28_FUNC
},
static const struct pin_mux_cfg af_pin_table[] = {
{ .pin = GPIO_PIN_0,
.func = CONFIG_GPIO0_FUNC },
{ .pin = GPIO_PIN_1,
.func = CONFIG_GPIO1_FUNC },
{ .pin = GPIO_PIN_2,
.func = CONFIG_GPIO2_FUNC },
{ .pin = GPIO_PIN_3,
.func = CONFIG_GPIO3_FUNC },
{ .pin = GPIO_PIN_4,
.func = CONFIG_GPIO4_FUNC },
{ .pin = GPIO_PIN_5,
.func = CONFIG_GPIO5_FUNC },
{ .pin = GPIO_PIN_6,
.func = CONFIG_GPIO6_FUNC },
{ .pin = GPIO_PIN_7,
.func = CONFIG_GPIO7_FUNC },
{ .pin = GPIO_PIN_8,
.func = CONFIG_GPIO8_FUNC },
{ .pin = GPIO_PIN_9,
.func = CONFIG_GPIO9_FUNC },
{ .pin = GPIO_PIN_10,
.func = CONFIG_GPIO10_FUNC },
{ .pin = GPIO_PIN_11,
.func = CONFIG_GPIO11_FUNC },
{ .pin = GPIO_PIN_12,
.func = CONFIG_GPIO12_FUNC },
{ .pin = GPIO_PIN_13,
.func = CONFIG_GPIO13_FUNC },
{ .pin = GPIO_PIN_14,
.func = CONFIG_GPIO14_FUNC },
{ .pin = GPIO_PIN_15,
.func = CONFIG_GPIO15_FUNC },
{ .pin = GPIO_PIN_16,
.func = CONFIG_GPIO16_FUNC },
{ .pin = GPIO_PIN_17,
.func = CONFIG_GPIO17_FUNC },
{ .pin = GPIO_PIN_18,
.func = CONFIG_GPIO18_FUNC },
{ .pin = GPIO_PIN_19,
.func = CONFIG_GPIO19_FUNC },
{ .pin = GPIO_PIN_20,
.func = CONFIG_GPIO20_FUNC },
{ .pin = GPIO_PIN_21,
.func = CONFIG_GPIO21_FUNC },
{ .pin = GPIO_PIN_22,
.func = CONFIG_GPIO22_FUNC },
{ .pin = GPIO_PIN_23,
.func = CONFIG_GPIO23_FUNC },
{ .pin = GPIO_PIN_24,
.func = CONFIG_GPIO24_FUNC },
{ .pin = GPIO_PIN_25,
.func = CONFIG_GPIO25_FUNC },
{ .pin = GPIO_PIN_26,
.func = CONFIG_GPIO26_FUNC },
{ .pin = GPIO_PIN_27,
.func = CONFIG_GPIO27_FUNC },
{ .pin = GPIO_PIN_28,
.func = CONFIG_GPIO28_FUNC },
};
static void board_pin_mux_init(void)
@ -159,19 +99,15 @@ static void board_pin_mux_init(void)
gpio_cfg.drive = 0;
gpio_cfg.smtCtrl = 1;
for (int i = 0; i < sizeof(af_pin_table)/sizeof(af_pin_table[0]); i++)
{
for (int i = 0; i < sizeof(af_pin_table) / sizeof(af_pin_table[0]); i++) {
gpio_cfg.gpioMode = GPIO_MODE_AF;
gpio_cfg.pullType = GPIO_PULL_UP;
gpio_cfg.gpioPin = af_pin_table[i].pin;
gpio_cfg.gpioFun = af_pin_table[i].func;
gpio_cfg.gpioPin = af_pin_table[i].pin;
gpio_cfg.gpioFun = af_pin_table[i].func;
if(af_pin_table[i].func == GPIO_FUN_UNUSED)
{
if (af_pin_table[i].func == GPIO_FUN_UNUSED) {
continue;
}
else if(af_pin_table[i].func == GPIO_FUN_PWM)
{
} else if (af_pin_table[i].func == GPIO_FUN_PWM) {
gpio_cfg.pullType = GPIO_PULL_DOWN;
}
// else if((af_pin_table[i].func == GPIO_FUN_DAC)|| (af_pin_table[i].func == GPIO_FUN_ADC))
@ -179,15 +115,14 @@ static void board_pin_mux_init(void)
// gpio_cfg.gpioFun = GPIO_FUN_ANALOG;
// gpio_cfg.gpioMode = GPIO_MODE_ANALOG;
// }
else if((af_pin_table[i].func & 0x70) == 0x70)
{
else if ((af_pin_table[i].func & 0x70) == 0x70) {
gpio_cfg.gpioFun = GPIO_FUN_UART;
uint8_t sig = af_pin_table[i].func & 0x07;
GLB_UART_Fun_Sel((gpio_cfg.gpioPin % 8), sig);
}
GLB_GPIO_Init(&gpio_cfg);
}
}
static void board_clock_init(void)
@ -198,6 +133,7 @@ static void board_clock_init(void)
void bl_show_info(void)
{
MSG("\r\n");
MSG(" ____ __ __ _ _ _ \r\n");
MSG(" | _ \\ / _|/ _| | | | | | | \r\n");
MSG(" | |_) | ___ _ _| |_| |_ __ _| | ___ | | __ _| |__ \r\n");
@ -205,17 +141,17 @@ void bl_show_info(void)
MSG(" | |_) | (_) | |_| | | | || (_| | | (_) | | (_| | |_) |\r\n");
MSG(" |____/ \\___/ \\__,_|_| |_| \\__,_|_|\\___/|_|\\__,_|_.__/ \r\n");
MSG("\r\n");
MSG("Build:%s,%s\r\n",__TIME__,__DATE__);
MSG("Build:%s,%s\r\n", __TIME__, __DATE__);
MSG("Copyright (c) 2021 Bouffalolab team\r\n");
#if 0
MSG("root clock:%dM\r\n",system_clock_get(SYSTEM_CLOCK_ROOT_CLOCK)/1000000);
MSG("fclk clock:%dM\r\n",system_clock_get(SYSTEM_CLOCK_FCLK)/1000000);
MSG("bclk clock:%dM\r\n",system_clock_get(SYSTEM_CLOCK_BCLK)/1000000);
#if 0
MSG("root clock:%dM\r\n", system_clock_get(SYSTEM_CLOCK_ROOT_CLOCK) / 1000000);
MSG("fclk clock:%dM\r\n", system_clock_get(SYSTEM_CLOCK_FCLK) / 1000000);
MSG("bclk clock:%dM\r\n", system_clock_get(SYSTEM_CLOCK_BCLK) / 1000000);
MSG("uart clock:%dM\r\n",peripheral_clock_get(PERIPHERAL_CLOCK_UART)/1000000);
MSG("spi clock:%dM\r\n",peripheral_clock_get(PERIPHERAL_CLOCK_SPI)/1000000);
MSG("i2c clock:%dM\r\n",peripheral_clock_get(PERIPHERAL_CLOCK_I2C)/1000000);
MSG("uart clock:%dM\r\n", peripheral_clock_get(PERIPHERAL_CLOCK_UART) / 1000000);
MSG("spi clock:%dM\r\n", peripheral_clock_get(PERIPHERAL_CLOCK_SPI) / 1000000);
MSG("i2c clock:%dM\r\n", peripheral_clock_get(PERIPHERAL_CLOCK_I2C) / 1000000);
#endif
}

42
bsp/board/bl602_iot/clock_config.h
View file

@ -1,55 +1,55 @@
/**
* @file clock_config.h
* @brief
*
* @brief
*
* Copyright (c) 2021 Bouffalolab team
*
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
*
* http://www.apache.org/licenses/LICENSE-2.0
*
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
*
*/
#ifndef _CLOCK_CONFIG_H
#define _CLOCK_CONFIG_H
#define BSP_ROOT_CLOCK_SOURCE ROOT_CLOCK_SOURCE_PLL_160M
#define BSP_ROOT_CLOCK_SOURCE ROOT_CLOCK_SOURCE_PLL_160M
#if defined(BSP_ROOT_CLOCK_SOURCE)
#define BSP_HCLK_DIV 0
#define BSP_BCLK_DIV 1
#define BSP_HCLK_DIV 0
#define BSP_BCLK_DIV 1
#endif
#if defined(BSP_USING_UART0)||defined(BSP_USING_UART1)
#define BSP_UART_CLOCK_SOURCE ROOT_CLOCK_SOURCE_PLL_160M
#define BSP_UART_CLOCK_DIV 0
#endif
#if defined(BSP_USING_UART0) || defined(BSP_USING_UART1)
#define BSP_UART_CLOCK_SOURCE ROOT_CLOCK_SOURCE_PLL_160M
#define BSP_UART_CLOCK_DIV 0
#endif
#if defined(BSP_USING_I2C0)
#define BSP_I2C_CLOCK_SOURCE ROOT_CLOCK_SOURCE_BCLK
#define BSP_I2C_CLOCK_DIV 0
#define BSP_I2C_CLOCK_SOURCE ROOT_CLOCK_SOURCE_BCLK
#define BSP_I2C_CLOCK_DIV 0
#endif
#if defined(BSP_USING_SPI0)
#define BSP_SPI_CLOCK_SOURCE ROOT_CLOCK_SOURCE_BCLK
#define BSP_SPI_CLOCK_DIV 0
#define BSP_SPI_CLOCK_SOURCE ROOT_CLOCK_SOURCE_BCLK
#define BSP_SPI_CLOCK_DIV 0
#endif
#if defined(BSP_USING_ADC0)
#define BSP_ADC_CLOCK_SOURCE ROOT_CLOCK_SOURCE_XCLK
#define BSP_ADC_CLOCK_DIV 0
#define BSP_ADC_CLOCK_SOURCE ROOT_CLOCK_SOURCE_XCLK
#define BSP_ADC_CLOCK_DIV 0
#endif
#if defined(BSP_USING_DAC0)
#define BSP_DAC_CLOCK_SOURCE ROOT_CLOCK_SOURCE_AUPLL
#define BSP_DAC_CLOCK_DIV 1
#define BSP_DAC_CLOCK_SOURCE ROOT_CLOCK_SOURCE_AUPLL
#define BSP_DAC_CLOCK_DIV 1
#endif
#endif

369
bsp/board/bl602_iot/peripheral_config.h
View file

@ -1,24 +1,24 @@
/**
* @file peripheral_config.h
* @brief
*
* @brief
*
* Copyright (c) 2021 Bouffalolab team
*
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
*
* http://www.apache.org/licenses/LICENSE-2.0
*
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
*
*/
#ifndef _PERIPHERAL_CONFIG_H_
@ -39,272 +39,265 @@
#define BSP_USING_DMA0_CH6
#define BSP_USING_DMA0_CH7
/* PERIPHERAL CONFIG */
#if defined(BSP_USING_ADC0)
#ifndef ADC0_CONFIG
#define ADC0_CONFIG \
{ \
.clk_div = ADC_CLOCK_DIV_32,\
.vref = ADC_VREF_3P2V,\
.continuous_conv_mode = DISABLE,\
.differential_mode = DISABLE,\
.data_width = ADC_DATA_WIDTH_16B_WITH_256_AVERAGE,\
.fifo_threshold = ADC_FIFO_THRESHOLD_1BYTE,\
.gain = ADC_GAIN_1\
}
#define ADC0_CONFIG \
{ \
.clk_div = ADC_CLOCK_DIV_32, \
.vref = ADC_VREF_3P2V, \
.continuous_conv_mode = DISABLE, \
.differential_mode = DISABLE, \
.data_width = ADC_DATA_WIDTH_16B_WITH_256_AVERAGE, \
.fifo_threshold = ADC_FIFO_THRESHOLD_1BYTE, \
.gain = ADC_GAIN_1 \
}
#endif
#endif
#if defined(BSP_USING_DAC0)
#ifndef DAC_CONFIG
#define DAC_CONFIG \
{ \
.clk = DAC_CLK_500KHZ,\
.pin.dac0 = GLB_GPIO_PIN_11,\
.pin.pin_num = 1,\
}
#define DAC_CONFIG \
{ \
.clk = DAC_CLK_500KHZ, \
.pin.dac0 = GLB_GPIO_PIN_11, \
.pin.pin_num = 1, \
}
#endif
#endif
#if defined(BSP_USING_UART0)
#ifndef UART0_CONFIG
#define UART0_CONFIG \
{ \
.id = 0, \
.baudrate = 2000000,\
.databits = UART_DATA_LEN_8, \
.stopbits = UART_STOP_ONE, \
.parity = UART_PAR_NONE, \
.fifo_threshold = 1, \
}
#ifndef UART0_CONFIG
#define UART0_CONFIG \
{ \
.id = 0, \
.baudrate = 2000000, \
.databits = UART_DATA_LEN_8, \
.stopbits = UART_STOP_ONE, \
.parity = UART_PAR_NONE, \
.fifo_threshold = 1, \
}
#endif
#endif
#if defined(BSP_USING_UART1)
#ifndef UART1_CONFIG
#define UART1_CONFIG \
{ \
.id = 1, \
.baudrate = 2000000,\
.databits = UART_DATA_LEN_8, \
.stopbits = UART_STOP_ONE, \
.parity = UART_PAR_NONE, \
.fifo_threshold = 64, \
}
#ifndef UART1_CONFIG
#define UART1_CONFIG \
{ \
.id = 1, \
.baudrate = 2000000, \
.databits = UART_DATA_LEN_8, \
.stopbits = UART_STOP_ONE, \
.parity = UART_PAR_NONE, \
.fifo_threshold = 64, \
}
#endif
#endif
#if defined(BSP_USING_SPI0)
#ifndef SPI0_CONFIG
#define SPI0_CONFIG \
{ \
.id = 0, \
.clk = 18000000,\
.mode = SPI_MASTER_MODE, \
.direction = SPI_MSB_BYTE0_DIRECTION_FIRST, \
.clk_polaraity = SPI_POLARITY_LOW, \
.clk_phase = SPI_PHASE_1EDGE, \
.datasize = SPI_DATASIZE_8BIT, \
.fifo_threshold = 1, \
}
#define SPI0_CONFIG \
{ \
.id = 0, \
.clk = 18000000, \
.mode = SPI_MASTER_MODE, \
.direction = SPI_MSB_BYTE0_DIRECTION_FIRST, \
.clk_polaraity = SPI_POLARITY_LOW, \
.clk_phase = SPI_PHASE_1EDGE, \
.datasize = SPI_DATASIZE_8BIT, \
.fifo_threshold = 1, \
}
#endif
#endif
#if defined(BSP_USING_PWM_CH2)
#ifndef PWM_CH2_CONFIG
#define PWM_CH2_CONFIG \
{ \
.ch = 2, \
.frequency = 1000000, \
.dutycycle = 0, \
.it_pulse_count = 0,\
}
#define PWM_CH2_CONFIG \
{ \
.ch = 2, \
.frequency = 1000000, \
.dutycycle = 0, \
.it_pulse_count = 0, \
}
#endif
#endif
#if defined(BSP_USING_I2S0)
#ifndef I2S0_CONFIG
#define I2S0_CONFIG \
{ \
.id = 0, \
.iis_mode = I2S_MODE_MASTER,\
.interface_mode = I2S_MODE_LEFT, \
.sampl_freq_hz = 16*1000, \
.channel_num = I2S_FS_CHANNELS_NUM_MONO, \
.frame_size = I2S_FRAME_LEN_16, \
.data_size = I2S_DATA_LEN_16, \
.fifo_threshold = 8, \
}
#define I2S0_CONFIG \
{ \
.id = 0, \
.iis_mode = I2S_MODE_MASTER, \
.interface_mode = I2S_MODE_LEFT, \
.sampl_freq_hz = 16 * 1000, \
.channel_num = I2S_FS_CHANNELS_NUM_MONO, \
.frame_size = I2S_FRAME_LEN_16, \
.data_size = I2S_DATA_LEN_16, \
.fifo_threshold = 8, \
}
#endif
#endif
#if defined(BSP_USING_DMA0_CH0)
#ifndef DMA0_CH0_CONFIG
#define DMA0_CH0_CONFIG \
{ \
.id = 0, \
.ch = 0,\
.direction = DMA_MEMORY_TO_MEMORY,\
.transfer_mode = DMA_LLI_ONCE_MODE, \
.src_req = DMA_REQUEST_NONE, \
.dst_req = DMA_REQUEST_NONE, \
.src_width = DMA_TRANSFER_WIDTH_32BIT , \
.dst_width = DMA_TRANSFER_WIDTH_32BIT , \
}
#define DMA0_CH0_CONFIG \
{ \
.id = 0, \
.ch = 0, \
.direction = DMA_MEMORY_TO_MEMORY, \
.transfer_mode = DMA_LLI_ONCE_MODE, \
.src_req = DMA_REQUEST_NONE, \
.dst_req = DMA_REQUEST_NONE, \
.src_width = DMA_TRANSFER_WIDTH_32BIT, \
.dst_width = DMA_TRANSFER_WIDTH_32BIT, \
}
#endif
#endif
#if defined(BSP_USING_DMA0_CH1)
#ifndef DMA0_CH1_CONFIG
#define DMA0_CH1_CONFIG \
{ \
.id = 0, \
.ch = 1,\
.direction = DMA_MEMORY_TO_MEMORY, \
.transfer_mode = DMA_LLI_ONCE_MODE, \
.src_req = DMA_REQUEST_NONE, \
.dst_req = DMA_REQUEST_NONE, \
.src_width = DMA_TRANSFER_WIDTH_16BIT , \
.dst_width = DMA_TRANSFER_WIDTH_16BIT , \
}
#define DMA0_CH1_CONFIG \
{ \
.id = 0, \
.ch = 1, \
.direction = DMA_MEMORY_TO_MEMORY, \
.transfer_mode = DMA_LLI_ONCE_MODE, \
.src_req = DMA_REQUEST_NONE, \
.dst_req = DMA_REQUEST_NONE, \
.src_width = DMA_TRANSFER_WIDTH_16BIT, \
.dst_width = DMA_TRANSFER_WIDTH_16BIT, \
}
#endif
#endif
#if defined(BSP_USING_DMA0_CH2)
#ifndef DMA0_CH2_CONFIG
#define DMA0_CH2_CONFIG \
{ \
.id = 0, \
.ch = 2,\
.direction = DMA_MEMORY_TO_PERIPH, \
.transfer_mode = DMA_LLI_ONCE_MODE, \
.src_req = DMA_REQUEST_NONE, \
.dst_req = DMA_REQUEST_UART1_TX, \
.src_width = DMA_TRANSFER_WIDTH_8BIT , \
.dst_width = DMA_TRANSFER_WIDTH_8BIT , \
}
#define DMA0_CH2_CONFIG \
{ \
.id = 0, \
.ch = 2, \
.direction = DMA_MEMORY_TO_PERIPH, \
.transfer_mode = DMA_LLI_ONCE_MODE, \
.src_req = DMA_REQUEST_NONE, \
.dst_req = DMA_REQUEST_UART1_TX, \
.src_width = DMA_TRANSFER_WIDTH_8BIT, \
.dst_width = DMA_TRANSFER_WIDTH_8BIT, \
}
#endif
#endif
#if defined(BSP_USING_DMA0_CH3)
#ifndef DMA0_CH3_CONFIG
#define DMA0_CH3_CONFIG \
{ \
.id = 0, \
.ch = 3,\
.direction = DMA_MEMORY_TO_PERIPH, \
.transfer_mode = DMA_LLI_ONCE_MODE, \
.src_req = DMA_REQUEST_NONE, \
.dst_req = DMA_REQUEST_SPI0_TX, \
.src_width = DMA_TRANSFER_WIDTH_8BIT , \
.dst_width = DMA_TRANSFER_WIDTH_8BIT , \
}
#define DMA0_CH3_CONFIG \
{ \
.id = 0, \
.ch = 3, \
.direction = DMA_MEMORY_TO_PERIPH, \
.transfer_mode = DMA_LLI_ONCE_MODE, \
.src_req = DMA_REQUEST_NONE, \
.dst_req = DMA_REQUEST_SPI0_TX, \
.src_width = DMA_TRANSFER_WIDTH_8BIT, \
.dst_width = DMA_TRANSFER_WIDTH_8BIT, \
}
#endif
#endif
#if defined(BSP_USING_DMA0_CH4)
#ifndef DMA0_CH4_CONFIG
#define DMA0_CH4_CONFIG \
{ \
.id = 0, \
.ch = 4,\
.direction = DMA_PERIPH_TO_MEMORY, \
.transfer_mode = DMA_LLI_ONCE_MODE, \
.src_req = DMA_REQUEST_SPI0_RX, \
.dst_req = DMA_REQUEST_NONE, \
.src_width = DMA_TRANSFER_WIDTH_8BIT , \
.dst_width = DMA_TRANSFER_WIDTH_8BIT , \
}
#define DMA0_CH4_CONFIG \
{ \
.id = 0, \
.ch = 4, \
.direction = DMA_PERIPH_TO_MEMORY, \
.transfer_mode = DMA_LLI_ONCE_MODE, \
.src_req = DMA_REQUEST_SPI0_RX, \
.dst_req = DMA_REQUEST_NONE, \
.src_width = DMA_TRANSFER_WIDTH_8BIT, \
.dst_width = DMA_TRANSFER_WIDTH_8BIT, \
}
#endif
#endif
#if defined(BSP_USING_DMA0_CH5)
#ifndef DMA0_CH5_CONFIG
#define DMA0_CH5_CONFIG \
{ \
.id = 0, \
.ch = 5,\
.direction = DMA_MEMORY_TO_PERIPH, \
.transfer_mode = DMA_LLI_CYCLE_MODE, \
.src_req = DMA_REQUEST_NONE, \
.dst_req = DMA_REQUEST_I2S_TX, \
.src_width = DMA_TRANSFER_WIDTH_16BIT , \
.dst_width = DMA_TRANSFER_WIDTH_16BIT , \
}
#define DMA0_CH5_CONFIG \
{ \
.id = 0, \
.ch = 5, \
.direction = DMA_MEMORY_TO_PERIPH, \
.transfer_mode = DMA_LLI_CYCLE_MODE, \
.src_req = DMA_REQUEST_NONE, \
.dst_req = DMA_REQUEST_I2S_TX, \
.src_width = DMA_TRANSFER_WIDTH_16BIT, \
.dst_width = DMA_TRANSFER_WIDTH_16BIT, \
}
#endif
#endif
#if defined(BSP_USING_DMA0_CH6)
#ifndef DMA0_CH6_CONFIG
#define DMA0_CH6_CONFIG \
{ \
.id = 0, \
.ch = 6,\
.direction = DMA_MEMORY_TO_PERIPH, \
.transfer_mode = DMA_LLI_CYCLE_MODE, \
.src_req = DMA_REQUEST_NONE, \
.dst_req = DMA_REQUEST_I2S_TX, \
.src_width = DMA_TRANSFER_WIDTH_16BIT , \
.dst_width = DMA_TRANSFER_WIDTH_16BIT , \
}
#define DMA0_CH6_CONFIG \
{ \
.id = 0, \
.ch = 6, \
.direction = DMA_MEMORY_TO_PERIPH, \
.transfer_mode = DMA_LLI_CYCLE_MODE, \
.src_req = DMA_REQUEST_NONE, \
.dst_req = DMA_REQUEST_I2S_TX, \
.src_width = DMA_TRANSFER_WIDTH_16BIT, \
.dst_width = DMA_TRANSFER_WIDTH_16BIT, \
}
#endif
#endif
#if defined(BSP_USING_DMA0_CH7)
#ifndef DMA0_CH7_CONFIG
#define DMA0_CH7_CONFIG \
{ \
.id = 0, \
.ch = 0,\
.direction = DMA_MEMORY_TO_MEMORY,\
.transfer_mode = DMA_LLI_ONCE_MODE, \
.src_req = DMA_REQUEST_NONE, \
.dst_req = DMA_REQUEST_NONE, \
.src_width = DMA_TRANSFER_WIDTH_32BIT , \
.dst_width = DMA_TRANSFER_WIDTH_32BIT , \
}
#define DMA0_CH7_CONFIG \
{ \
.id = 0, \
.ch = 0, \
.direction = DMA_MEMORY_TO_MEMORY, \
.transfer_mode = DMA_LLI_ONCE_MODE, \
.src_req = DMA_REQUEST_NONE, \
.dst_req = DMA_REQUEST_NONE, \
.src_width = DMA_TRANSFER_WIDTH_32BIT, \
.dst_width = DMA_TRANSFER_WIDTH_32BIT, \
}
#endif
#endif
#if defined(BSP_USING_I2C0)
#ifndef I2C0_CONFIG
#define I2C0_CONFIG \
{ \
.id = 0, \
.mode = I2C_HW_MODE,\
.phase = 15, \
}
#define I2C0_CONFIG \
{ \
.id = 0, \
.mode = I2C_HW_MODE, \
.phase = 15, \
}
#endif
#endif
#if defined (BSP_USING_TIMER_CH0)
#if defined(BSP_USING_TIMER_CH0)
#ifndef TIMER_CH0_CONFIG
#define TIMER_CH0_CONFIG \
{ \
.id = 0, \
.ch = 0, \
.cnt_mode = TIMER_CNT_PRELOAD, \
.pl_trig_src = TIMER_PL_TRIG_COMP0, \
}
#define TIMER_CH0_CONFIG \
{ \
.id = 0, \
.ch = 0, \
.cnt_mode = TIMER_CNT_PRELOAD, \
.pl_trig_src = TIMER_PL_TRIG_COMP0, \
}
#endif
#endif
#if defined (BSP_USING_TIMER_CH1)
#if defined(BSP_USING_TIMER_CH1)
#ifndef TIMER_CH1_CONFIG
#define TIMER_CH1_CONFIG \
{ \
.id = 0, \
.ch = 1, \
.cnt_mode = TIMER_CNT_PRELOAD, \
.pl_trig_src = TIMER_PL_TRIG_COMP0, \
}
#define TIMER_CH1_CONFIG \
{ \
.id = 0, \
.ch = 1, \
.cnt_mode = TIMER_CNT_PRELOAD, \
.pl_trig_src = TIMER_PL_TRIG_COMP0, \
}
#endif
#endif

12
bsp/board/bl602_iot/pinmux_config.h
View file

@ -1,24 +1,24 @@
/**
* @file pinmux_config.h
* @brief
*
* @brief
*
* Copyright (c) 2021 Bouffalolab team
*
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
*
* http://www.apache.org/licenses/LICENSE-2.0
*
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
*
*/
#ifndef _PINMUX_CONFIG_H
#define _PINMUX_CONFIG_H

288
bsp/board/bl706_avb/board.c
View file

@ -3,166 +3,88 @@
#include "bl702_glb.h"
#include "pinmux_config.h"
struct pin_mux_cfg
{
struct pin_mux_cfg {
uint8_t pin;
uint16_t func;
};
static const struct pin_mux_cfg af_pin_table[] =
{
{
.pin = GPIO_PIN_0,
.func = CONFIG_GPIO0_FUNC
},
{
.pin = GPIO_PIN_1,
.func = CONFIG_GPIO1_FUNC
},
{
.pin = GPIO_PIN_2,
.func = CONFIG_GPIO2_FUNC
},
{
.pin = GPIO_PIN_3,
.func = CONFIG_GPIO3_FUNC
},
{
.pin = GPIO_PIN_4,
.func = CONFIG_GPIO4_FUNC
},
{
.pin = GPIO_PIN_5,
.func = CONFIG_GPIO5_FUNC
},
{
.pin = GPIO_PIN_6,
.func = CONFIG_GPIO6_FUNC
},
{
.pin = GPIO_PIN_7,
.func = CONFIG_GPIO7_FUNC
},
{
.pin = GPIO_PIN_8,
.func = CONFIG_GPIO8_FUNC
},
{
.pin = GPIO_PIN_9,
.func = CONFIG_GPIO9_FUNC
},
{
.pin = GPIO_PIN_10,
.func = CONFIG_GPIO10_FUNC
},
{
.pin = GPIO_PIN_11,
.func = CONFIG_GPIO11_FUNC
},
{
.pin = GPIO_PIN_12,
.func = CONFIG_GPIO12_FUNC
},
{
.pin = GPIO_PIN_13,
.func = CONFIG_GPIO13_FUNC
},
{
.pin = GPIO_PIN_14,
.func = CONFIG_GPIO14_FUNC
},
{
.pin = GPIO_PIN_15,
.func = CONFIG_GPIO15_FUNC
},
{
.pin = GPIO_PIN_16,
.func = CONFIG_GPIO16_FUNC
},
{
.pin = GPIO_PIN_17,
.func = CONFIG_GPIO17_FUNC
},
{
.pin = GPIO_PIN_18,
.func = CONFIG_GPIO18_FUNC
},
{
.pin = GPIO_PIN_19,
.func = CONFIG_GPIO19_FUNC
},
{
.pin = GPIO_PIN_20,
.func = CONFIG_GPIO20_FUNC
},
{
.pin = GPIO_PIN_21,
.func = CONFIG_GPIO21_FUNC
},
{
.pin = GPIO_PIN_22,
.func = CONFIG_GPIO22_FUNC
},
{
.pin = GPIO_PIN_23,
.func = CONFIG_GPIO23_FUNC
},
{
.pin = GPIO_PIN_24,
.func = CONFIG_GPIO24_FUNC
},
{
.pin = GPIO_PIN_25,
.func = CONFIG_GPIO25_FUNC
},
{
.pin = GPIO_PIN_26,
.func = CONFIG_GPIO26_FUNC
},
{
.pin = GPIO_PIN_27,
.func = CONFIG_GPIO27_FUNC
},
{
.pin = GPIO_PIN_28,
.func = CONFIG_GPIO28_FUNC
},
{
.pin = GPIO_PIN_29,
.func = CONFIG_GPIO29_FUNC
},
{
.pin = GPIO_PIN_30,
.func = CONFIG_GPIO30_FUNC
},
{
.pin = GPIO_PIN_31,
.func = CONFIG_GPIO31_FUNC
},
{
.pin = GPIO_PIN_32,
.func = CONFIG_GPIO32_FUNC
},
{
.pin = GPIO_PIN_33,
.func = CONFIG_GPIO33_FUNC
},
{
.pin = GPIO_PIN_34,
.func = CONFIG_GPIO34_FUNC
},
{
.pin = GPIO_PIN_35,
.func = CONFIG_GPIO35_FUNC
},
{
.pin = GPIO_PIN_36,
.func = CONFIG_GPIO36_FUNC
},
{
.pin = GPIO_PIN_37,
.func = CONFIG_GPIO37_FUNC
}
static const struct pin_mux_cfg af_pin_table[] = {
{ .pin = GPIO_PIN_0,
.func = CONFIG_GPIO0_FUNC },
{ .pin = GPIO_PIN_1,
.func = CONFIG_GPIO1_FUNC },
{ .pin = GPIO_PIN_2,
.func = CONFIG_GPIO2_FUNC },
{ .pin = GPIO_PIN_3,
.func = CONFIG_GPIO3_FUNC },
{ .pin = GPIO_PIN_4,
.func = CONFIG_GPIO4_FUNC },
{ .pin = GPIO_PIN_5,
.func = CONFIG_GPIO5_FUNC },
{ .pin = GPIO_PIN_6,
.func = CONFIG_GPIO6_FUNC },
{ .pin = GPIO_PIN_7,
.func = CONFIG_GPIO7_FUNC },
{ .pin = GPIO_PIN_8,
.func = CONFIG_GPIO8_FUNC },
{ .pin = GPIO_PIN_9,
.func = CONFIG_GPIO9_FUNC },
{ .pin = GPIO_PIN_10,
.func = CONFIG_GPIO10_FUNC },
{ .pin = GPIO_PIN_11,
.func = CONFIG_GPIO11_FUNC },
{ .pin = GPIO_PIN_12,
.func = CONFIG_GPIO12_FUNC },
{ .pin = GPIO_PIN_13,
.func = CONFIG_GPIO13_FUNC },
{ .pin = GPIO_PIN_14,
.func = CONFIG_GPIO14_FUNC },
{ .pin = GPIO_PIN_15,
.func = CONFIG_GPIO15_FUNC },
{ .pin = GPIO_PIN_16,
.func = CONFIG_GPIO16_FUNC },
{ .pin = GPIO_PIN_17,
.func = CONFIG_GPIO17_FUNC },
{ .pin = GPIO_PIN_18,
.func = CONFIG_GPIO18_FUNC },
{ .pin = GPIO_PIN_19,
.func = CONFIG_GPIO19_FUNC },
{ .pin = GPIO_PIN_20,
.func = CONFIG_GPIO20_FUNC },
{ .pin = GPIO_PIN_21,
.func = CONFIG_GPIO21_FUNC },
{ .pin = GPIO_PIN_22,
.func = CONFIG_GPIO22_FUNC },
{ .pin = GPIO_PIN_23,
.func = CONFIG_GPIO23_FUNC },
{ .pin = GPIO_PIN_24,
.func = CONFIG_GPIO24_FUNC },
{ .pin = GPIO_PIN_25,
.func = CONFIG_GPIO25_FUNC },
{ .pin = GPIO_PIN_26,
.func = CONFIG_GPIO26_FUNC },
{ .pin = GPIO_PIN_27,
.func = CONFIG_GPIO27_FUNC },
{ .pin = GPIO_PIN_28,
.func = CONFIG_GPIO28_FUNC },
{ .pin = GPIO_PIN_29,
.func = CONFIG_GPIO29_FUNC },
{ .pin = GPIO_PIN_30,
.func = CONFIG_GPIO30_FUNC },
{ .pin = GPIO_PIN_31,
.func = CONFIG_GPIO31_FUNC },
{ .pin = GPIO_PIN_32,
.func = CONFIG_GPIO32_FUNC },
{ .pin = GPIO_PIN_33,
.func = CONFIG_GPIO33_FUNC },
{ .pin = GPIO_PIN_34,
.func = CONFIG_GPIO34_FUNC },
{ .pin = GPIO_PIN_35,
.func = CONFIG_GPIO35_FUNC },
{ .pin = GPIO_PIN_36,
.func = CONFIG_GPIO36_FUNC },
{ .pin = GPIO_PIN_37,
.func = CONFIG_GPIO37_FUNC }
};
@ -173,43 +95,32 @@ static void board_pin_mux_init(void)
gpio_cfg.drive = 0;
gpio_cfg.smtCtrl = 1;
for (int i = 0; i < sizeof(af_pin_table)/sizeof(af_pin_table[0]); i++)
{
for (int i = 0; i < sizeof(af_pin_table) / sizeof(af_pin_table[0]); i++) {
gpio_cfg.gpioMode = GPIO_MODE_AF;
gpio_cfg.pullType = GPIO_PULL_UP;
gpio_cfg.gpioPin = af_pin_table[i].pin;
gpio_cfg.gpioFun = af_pin_table[i].func;
gpio_cfg.gpioPin = af_pin_table[i].pin;
gpio_cfg.gpioFun = af_pin_table[i].func;
if(af_pin_table[i].func == GPIO_FUN_UNUSED)
{
if (af_pin_table[i].func == GPIO_FUN_UNUSED) {
continue;
}
else if(af_pin_table[i].func == GPIO_FUN_PWM)
{
} else if (af_pin_table[i].func == GPIO_FUN_PWM) {
gpio_cfg.pullType = GPIO_PULL_DOWN;
}
else if((af_pin_table[i].func == GPIO_FUN_DAC)|| (af_pin_table[i].func == GPIO_FUN_ADC))
{
gpio_cfg.gpioFun = GPIO_FUN_ANALOG;
} else if ((af_pin_table[i].func == GPIO_FUN_DAC) || (af_pin_table[i].func == GPIO_FUN_ADC)) {
gpio_cfg.gpioFun = GPIO_FUN_ANALOG;
gpio_cfg.gpioMode = GPIO_MODE_ANALOG;
}
else if((af_pin_table[i].func & 0x70) == 0x70)
{
} else if ((af_pin_table[i].func & 0x70) == 0x70) {
gpio_cfg.gpioFun = GPIO_FUN_UART;
uint8_t sig = af_pin_table[i].func & 0x07;
if (gpio_cfg.gpioPin > 31)
{
GLB_UART_Fun_Sel(((gpio_cfg.gpioPin-9) % 8), sig);
}
else
{
if (gpio_cfg.gpioPin > 31) {
GLB_UART_Fun_Sel(((gpio_cfg.gpioPin - 9) % 8), sig);
} else {
GLB_UART_Fun_Sel((gpio_cfg.gpioPin % 8), sig);
}
}
GLB_GPIO_Init(&gpio_cfg);
}
}
static void board_clock_init(void)
@ -220,6 +131,7 @@ static void board_clock_init(void)
void bl_show_info(void)
{
MSG("\r\n");
MSG(" ____ __ __ _ _ _ \r\n");
MSG(" | _ \\ / _|/ _| | | | | | | \r\n");
MSG(" | |_) | ___ _ _| |_| |_ __ _| | ___ | | __ _| |__ \r\n");
@ -227,17 +139,17 @@ void bl_show_info(void)
MSG(" | |_) | (_) | |_| | | | || (_| | | (_) | | (_| | |_) |\r\n");
MSG(" |____/ \\___/ \\__,_|_| |_| \\__,_|_|\\___/|_|\\__,_|_.__/ \r\n");
MSG("\r\n");
MSG("Build:%s,%s\r\n",__TIME__,__DATE__);
MSG("Build:%s,%s\r\n", __TIME__, __DATE__);
MSG("Copyright (c) 2021 Bouffalolab team\r\n");
#if 0
MSG("root clock:%dM\r\n",system_clock_get(SYSTEM_CLOCK_ROOT_CLOCK)/1000000);
MSG("fclk clock:%dM\r\n",system_clock_get(SYSTEM_CLOCK_FCLK)/1000000);
MSG("bclk clock:%dM\r\n",system_clock_get(SYSTEM_CLOCK_BCLK)/1000000);
#if 0
MSG("root clock:%dM\r\n", system_clock_get(SYSTEM_CLOCK_ROOT_CLOCK) / 1000000);
MSG("fclk clock:%dM\r\n", system_clock_get(SYSTEM_CLOCK_FCLK) / 1000000);
MSG("bclk clock:%dM\r\n", system_clock_get(SYSTEM_CLOCK_BCLK) / 1000000);
MSG("uart clock:%dM\r\n",peripheral_clock_get(PERIPHERAL_CLOCK_UART)/1000000);
MSG("spi clock:%dM\r\n",peripheral_clock_get(PERIPHERAL_CLOCK_SPI)/1000000);
MSG("i2c clock:%dM\r\n",peripheral_clock_get(PERIPHERAL_CLOCK_I2C)/1000000);
MSG("uart clock:%dM\r\n", peripheral_clock_get(PERIPHERAL_CLOCK_UART) / 1000000);
MSG("spi clock:%dM\r\n", peripheral_clock_get(PERIPHERAL_CLOCK_SPI) / 1000000);
MSG("i2c clock:%dM\r\n", peripheral_clock_get(PERIPHERAL_CLOCK_I2C) / 1000000);
#endif
}

58
bsp/board/bl706_avb/clock_config.h
View file

@ -1,68 +1,72 @@
/**
* @file clock_config.h
* @brief
*
* @brief
*
* Copyright (c) 2021 Bouffalolab team
*
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
*
* http://www.apache.org/licenses/LICENSE-2.0
*
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
*
*/
#ifndef _CLOCK_CONFIG_H
#define _CLOCK_CONFIG_H
#define BSP_ROOT_CLOCK_SOURCE ROOT_CLOCK_SOURCE_PLL_144M
#define BSP_ROOT_CLOCK_SOURCE ROOT_CLOCK_SOURCE_PLL_144M
// #define BSP_AUDIO_PLL_CLOCK_SOURCE AUDIO_PLL_CLOCK_24000000_HZ
#if defined(BSP_ROOT_CLOCK_SOURCE)
#define BSP_HCLK_DIV 0
#define BSP_BCLK_DIV 1
#define BSP_HCLK_DIV 0
#define BSP_BCLK_DIV 1
#endif
#if defined(BSP_USING_UART0)||defined(BSP_USING_UART1)
#define BSP_UART_CLOCK_SOURCE ROOT_CLOCK_SOURCE_PLL_96M
#define BSP_UART_CLOCK_DIV 0
#endif
#if defined(BSP_USING_UART0) || defined(BSP_USING_UART1)
#define BSP_UART_CLOCK_SOURCE ROOT_CLOCK_SOURCE_PLL_96M
#define BSP_UART_CLOCK_DIV 0
#endif
#if defined(BSP_USING_I2C0)
#define BSP_I2C_CLOCK_SOURCE ROOT_CLOCK_SOURCE_BCLK
#define BSP_I2C_CLOCK_DIV 9
#define BSP_I2C_CLOCK_SOURCE ROOT_CLOCK_SOURCE_BCLK
#define BSP_I2C_CLOCK_DIV 9
#endif
#if defined(BSP_USING_SPI0)
#define BSP_SPI_CLOCK_SOURCE ROOT_CLOCK_SOURCE_BCLK
#define BSP_SPI_CLOCK_DIV 0
#define BSP_SPI_CLOCK_SOURCE ROOT_CLOCK_SOURCE_BCLK
#define BSP_SPI_CLOCK_DIV 0
#endif
#if defined(BSP_USING_PWM_CH0) || defined(BSP_USING_PWM_CH1) || defined(BSP_USING_PWM_CH2) || defined(BSP_USING_PWM_CH3) || defined(BSP_USING_PWM_CH4) || defined(BSP_USING_PWM_CH5)
#define BSP_PWM_CLOCK_SOURCE ROOT_CLOCK_SOURCE_XCLK
#define BSP_PWM_CLOCK_DIV 0
#endif
#if defined(BSP_USING_IR)
#define BSP_IR_CLOCK_SOURCE ROOT_CLOCK_SOURCE_XCLK
#define BSP_IR_CLOCK_DIV 0
#define BSP_IR_CLOCK_SOURCE ROOT_CLOCK_SOURCE_XCLK
#define BSP_IR_CLOCK_DIV 0
#endif
#if defined(BSP_USING_I2S0)
#define BSP_I2S_CLOCK_SOURCE ROOT_CLOCK_SOURCE_XCLK
#define BSP_I2S_CLOCK_DIV 0
#define BSP_I2S_CLOCK_SOURCE ROOT_CLOCK_SOURCE_XCLK
#define BSP_I2S_CLOCK_DIV 0
#endif
#if defined(BSP_USING_ADC0)
#define BSP_ADC_CLOCK_SOURCE ROOT_CLOCK_SOURCE_XCLK
#define BSP_ADC_CLOCK_DIV 0
#define BSP_ADC_CLOCK_SOURCE ROOT_CLOCK_SOURCE_XCLK
#define BSP_ADC_CLOCK_DIV 0
#endif
#if defined(BSP_USING_DAC0)
#define BSP_DAC_CLOCK_SOURCE ROOT_CLOCK_SOURCE_AUPLL
#define BSP_DAC_CLOCK_DIV 1
#define BSP_DAC_CLOCK_SOURCE ROOT_CLOCK_SOURCE_AUPLL
#define BSP_DAC_CLOCK_DIV 1
#endif
#if defined(BSP_USING_CAM)
#define BSP_CAM_CLOCK_SOURCE ROOT_CLOCK_SOURCE_PLL_96M
#define BSP_CAM_CLOCK_DIV 3
#define BSP_CAM_CLOCK_SOURCE ROOT_CLOCK_SOURCE_PLL_96M
#define BSP_CAM_CLOCK_DIV 3
#endif
#endif

398
bsp/board/bl706_avb/peripheral_config.h
View file

@ -28,271 +28,309 @@
#define BSP_USING_DMA0_CH6
#define BSP_USING_DMA0_CH7
/* PERIPHERAL CONFIG */
#if defined(BSP_USING_ADC0)
#ifndef ADC0_CONFIG
#define ADC0_CONFIG \
{ \
.clk_div = ADC_CLOCK_DIV_32,\
.vref = ADC_VREF_3P2V,\
.continuous_conv_mode = DISABLE,\
.differential_mode = DISABLE,\
.data_width = ADC_DATA_WIDTH_16B_WITH_256_AVERAGE,\
.fifo_threshold = ADC_FIFO_THRESHOLD_1BYTE,\
.gain = ADC_GAIN_1\
}
#define ADC0_CONFIG \
{ \
.clk_div = ADC_CLOCK_DIV_32, \
.vref = ADC_VREF_3P2V, \
.continuous_conv_mode = DISABLE, \
.differential_mode = DISABLE, \
.data_width = ADC_DATA_WIDTH_16B_WITH_256_AVERAGE, \
.fifo_threshold = ADC_FIFO_THRESHOLD_1BYTE, \
.gain = ADC_GAIN_1 \
}
#endif
#endif
#if defined(BSP_USING_DAC0)
#ifndef DAC_CONFIG
#define DAC_CONFIG \
{ \
.clk = DAC_CLK_500KHZ,\
.pin.dac0 = GLB_GPIO_PIN_11,\
.pin.pin_num = 1,\
}
#define DAC_CONFIG \
{ \
.clk = DAC_CLK_500KHZ, \
.pin.dac0 = GLB_GPIO_PIN_11, \
.pin.pin_num = 1, \
}
#endif
#endif
#if defined(BSP_USING_UART0)
#ifndef UART0_CONFIG
#define UART0_CONFIG \
{ \
.id = 0, \
.baudrate = 2000000,\
.databits = UART_DATA_LEN_8, \
.stopbits = UART_STOP_ONE, \
.parity = UART_PAR_NONE, \
.fifo_threshold = 1, \
}
#define UART0_CONFIG \
{ \
.id = 0, \
.baudrate = 2000000, \
.databits = UART_DATA_LEN_8, \
.stopbits = UART_STOP_ONE, \
.parity = UART_PAR_NONE, \
.fifo_threshold = 1, \
}
#endif
#endif
#if defined(BSP_USING_UART1)
#ifndef UART1_CONFIG
#define UART1_CONFIG \
{ \
.id = 1, \
.baudrate = 2000000,\
.databits = UART_DATA_LEN_8, \
.stopbits = UART_STOP_ONE, \
.parity = UART_PAR_NONE, \
.fifo_threshold = 64, \
}
#ifndef UART1_CONFIG
#define UART1_CONFIG \
{ \
.id = 1, \
.baudrate = 2000000, \
.databits = UART_DATA_LEN_8, \
.stopbits = UART_STOP_ONE, \
.parity = UART_PAR_NONE, \
.fifo_threshold = 64, \
}
#endif
#endif
#if defined(BSP_USING_SPI0)
#ifndef SPI0_CONFIG
#define SPI0_CONFIG \
{ \
.id = 0, \
.clk = 36000000,\
.mode = SPI_MASTER_MODE, \
.direction = SPI_MSB_BYTE0_DIRECTION_FIRST, \
.clk_polaraity = SPI_POLARITY_LOW, \
.clk_phase = SPI_PHASE_1EDGE, \
.datasize = SPI_DATASIZE_8BIT, \
.fifo_threshold = 4, \
}
#define SPI0_CONFIG \
{ \
.id = 0, \
.clk = 36000000, \
.mode = SPI_MASTER_MODE, \
.direction = SPI_MSB_BYTE0_DIRECTION_FIRST, \
.clk_polaraity = SPI_POLARITY_LOW, \
.clk_phase = SPI_PHASE_1EDGE, \
.datasize = SPI_DATASIZE_8BIT, \
.fifo_threshold = 4, \
}
#endif
#endif
#if defined(BSP_USING_PWM_CH0)
#ifndef PWM_CH0_CONFIG
#define PWM_CH0_CONFIG \
{ \
.ch = 0, \
.polarity_invert_mode = DISABLE, \
.period = 0, \
.threshold_low = 0, \
.threshold_high = 0, \
.it_pulse_count = 0, \
}
#endif
#endif
#if defined(BSP_USING_PWM_CH1)
#ifndef PWM_CH1_CONFIG
#define PWM_CH1_CONFIG \
{ \
.ch = 1, \
.polarity_invert_mode = DISABLE, \
.period = 0, \
.threshold_low = 0, \
.threshold_high = 0, \
.it_pulse_count = 0, \
}
#endif
#endif
#if defined(BSP_USING_PWM_CH2)
#ifndef PWM_CH2_CONFIG
#define PWM_CH2_CONFIG \
{ \
.ch = 2, \
.frequency = 1000000, \
.dutycycle = 0, \
}
#define PWM_CH2_CONFIG \
{ \
.ch = 2, \
.polarity_invert_mode = DISABLE, \
.period = 0, \
.threshold_low = 0, \
.threshold_high = 0, \
.it_pulse_count = 0, \
}
#endif
#endif
#if defined(BSP_USING_PWM_CH3)
#ifndef PWM_CH3_CONFIG
#define PWM_CH3_CONFIG \
{ \
.ch = 3, \
.polarity_invert_mode = DISABLE, \
.period = 0, \
.threshold_low = 0, \
.threshold_high = 0, \
.it_pulse_count = 0, \
}
#endif
#endif
#if defined(BSP_USING_I2S0)
#ifndef I2S0_CONFIG
#define I2S0_CONFIG \
{ \
.id = 0, \
.iis_mode = I2S_MODE_MASTER,\
.interface_mode = I2S_MODE_LEFT, \
.sampl_freq_hz = 16*1000, \
.channel_num = I2S_FS_CHANNELS_NUM_MONO, \
.frame_size = I2S_FRAME_LEN_16, \
.data_size = I2S_DATA_LEN_16, \
.fifo_threshold = 8, \
}
#define I2S0_CONFIG \
{ \
.id = 0, \
.iis_mode = I2S_MODE_MASTER, \
.interface_mode = I2S_MODE_LEFT, \
.sampl_freq_hz = 16 * 1000, \
.channel_num = I2S_FS_CHANNELS_NUM_MONO, \
.frame_size = I2S_FRAME_LEN_16, \
.data_size = I2S_DATA_LEN_16, \
.fifo_threshold = 8, \
}
#endif
#endif
#if defined(BSP_USING_DMA0_CH0)
#ifndef DMA0_CH0_CONFIG
#define DMA0_CH0_CONFIG \
{ \
.id = 0, \
.ch = 0,\
.direction = DMA_MEMORY_TO_MEMORY,\
.transfer_mode = DMA_LLI_ONCE_MODE, \
.src_req = DMA_REQUEST_NONE, \
.dst_req = DMA_REQUEST_NONE, \
.src_width = DMA_TRANSFER_WIDTH_32BIT , \
.dst_width = DMA_TRANSFER_WIDTH_32BIT , \
}
#define DMA0_CH0_CONFIG \
{ \
.id = 0, \
.ch = 0, \
.direction = DMA_MEMORY_TO_MEMORY, \
.transfer_mode = DMA_LLI_ONCE_MODE, \
.src_req = DMA_REQUEST_NONE, \
.dst_req = DMA_REQUEST_NONE, \
.src_width = DMA_TRANSFER_WIDTH_32BIT, \
.dst_width = DMA_TRANSFER_WIDTH_32BIT, \
}
#endif
#endif
#if defined(BSP_USING_DMA0_CH1)
#ifndef DMA0_CH1_CONFIG
#define DMA0_CH1_CONFIG \
{ \
.id = 0, \
.ch = 1,\
.direction = DMA_MEMORY_TO_MEMORY, \
.transfer_mode = DMA_LLI_ONCE_MODE, \
.src_req = DMA_REQUEST_NONE, \
.dst_req = DMA_REQUEST_NONE, \
.src_width = DMA_TRANSFER_WIDTH_16BIT , \
.dst_width = DMA_TRANSFER_WIDTH_16BIT , \
}
#define DMA0_CH1_CONFIG \
{ \
.id = 0, \
.ch = 1, \
.direction = DMA_MEMORY_TO_MEMORY, \
.transfer_mode = DMA_LLI_ONCE_MODE, \
.src_req = DMA_REQUEST_NONE, \
.dst_req = DMA_REQUEST_NONE, \
.src_width = DMA_TRANSFER_WIDTH_16BIT, \
.dst_width = DMA_TRANSFER_WIDTH_16BIT, \
}
#endif
#endif
#if defined(BSP_USING_DMA0_CH2)
#ifndef DMA0_CH2_CONFIG
#define DMA0_CH2_CONFIG \
{ \
.id = 0, \
.ch = 2,\
.direction = DMA_MEMORY_TO_PERIPH, \
.transfer_mode = DMA_LLI_ONCE_MODE, \
.src_req = DMA_REQUEST_NONE, \
.dst_req = DMA_REQUEST_UART1_TX, \
.src_width = DMA_TRANSFER_WIDTH_8BIT , \
.dst_width = DMA_TRANSFER_WIDTH_8BIT , \
}
#define DMA0_CH2_CONFIG \
{ \
.id = 0, \
.ch = 2, \
.direction = DMA_MEMORY_TO_PERIPH, \
.transfer_mode = DMA_LLI_ONCE_MODE, \
.src_req = DMA_REQUEST_NONE, \
.dst_req = DMA_REQUEST_UART1_TX, \
.src_width = DMA_TRANSFER_WIDTH_8BIT, \
.dst_width = DMA_TRANSFER_WIDTH_8BIT, \
}
#endif
#endif
#if defined(BSP_USING_DMA0_CH3)
#ifndef DMA0_CH3_CONFIG
#define DMA0_CH3_CONFIG \
{ \
.id = 0, \
.ch = 3,\
.direction = DMA_MEMORY_TO_PERIPH, \
.transfer_mode = DMA_LLI_ONCE_MODE, \
.src_req = DMA_REQUEST_NONE, \
.dst_req = DMA_REQUEST_SPI0_TX, \
.src_width = DMA_TRANSFER_WIDTH_8BIT , \
.dst_width = DMA_TRANSFER_WIDTH_8BIT , \
}
#define DMA0_CH3_CONFIG \
{ \
.id = 0, \
.ch = 3, \
.direction = DMA_MEMORY_TO_PERIPH, \
.transfer_mode = DMA_LLI_ONCE_MODE, \
.src_req = DMA_REQUEST_NONE, \
.dst_req = DMA_REQUEST_SPI0_TX, \
.src_width = DMA_TRANSFER_WIDTH_8BIT, \
.dst_width = DMA_TRANSFER_WIDTH_8BIT, \
}
#endif
#endif
#if defined(BSP_USING_DMA0_CH4)
#ifndef DMA0_CH4_CONFIG
#define DMA0_CH4_CONFIG \
{ \
.id = 0, \
.ch = 4,\
.direction = DMA_PERIPH_TO_MEMORY, \
.transfer_mode = DMA_LLI_ONCE_MODE, \
.src_req = DMA_REQUEST_SPI0_RX, \
.dst_req = DMA_REQUEST_NONE, \
.src_width = DMA_TRANSFER_WIDTH_8BIT , \
.dst_width = DMA_TRANSFER_WIDTH_8BIT , \
}
#define DMA0_CH4_CONFIG \
{ \
.id = 0, \
.ch = 4, \
.direction = DMA_PERIPH_TO_MEMORY, \
.transfer_mode = DMA_LLI_ONCE_MODE, \
.src_req = DMA_REQUEST_SPI0_RX, \
.dst_req = DMA_REQUEST_NONE, \
.src_width = DMA_TRANSFER_WIDTH_8BIT, \
.dst_width = DMA_TRANSFER_WIDTH_8BIT, \
}
#endif
#endif
#if defined(BSP_USING_DMA0_CH5)
#ifndef DMA0_CH5_CONFIG
#define DMA0_CH5_CONFIG \
{ \
.id = 0, \
.ch = 5,\
.direction = DMA_MEMORY_TO_PERIPH, \
.transfer_mode = DMA_LLI_CYCLE_MODE, \
.src_req = DMA_REQUEST_NONE, \
.dst_req = DMA_REQUEST_I2S_TX, \
.src_width = DMA_TRANSFER_WIDTH_16BIT , \
.dst_width = DMA_TRANSFER_WIDTH_16BIT , \
}
#define DMA0_CH5_CONFIG \
{ \
.id = 0, \
.ch = 5, \
.direction = DMA_MEMORY_TO_PERIPH, \
.transfer_mode = DMA_LLI_CYCLE_MODE, \
.src_req = DMA_REQUEST_NONE, \
.dst_req = DMA_REQUEST_I2S_TX, \
.src_width = DMA_TRANSFER_WIDTH_16BIT, \
.dst_width = DMA_TRANSFER_WIDTH_16BIT, \
}
#endif
#endif
#if defined(BSP_USING_DMA0_CH6)
#ifndef DMA0_CH6_CONFIG
#define DMA0_CH6_CONFIG \
{ \
.id = 0, \
.ch = 6,\
.direction = DMA_MEMORY_TO_PERIPH, \
.transfer_mode = DMA_LLI_CYCLE_MODE, \
.src_req = DMA_REQUEST_NONE, \
.dst_req = DMA_REQUEST_I2S_TX, \
.src_width = DMA_TRANSFER_WIDTH_16BIT , \
.dst_width = DMA_TRANSFER_WIDTH_16BIT , \
}
#define DMA0_CH6_CONFIG \
{ \
.id = 0, \
.ch = 6, \
.direction = DMA_MEMORY_TO_PERIPH, \
.transfer_mode = DMA_LLI_CYCLE_MODE, \
.src_req = DMA_REQUEST_NONE, \
.dst_req = DMA_REQUEST_I2S_TX, \
.src_width = DMA_TRANSFER_WIDTH_16BIT, \
.dst_width = DMA_TRANSFER_WIDTH_16BIT, \
}
#endif
#endif
#if defined(BSP_USING_DMA0_CH7)
#ifndef DMA0_CH7_CONFIG
#define DMA0_CH7_CONFIG \
{ \
.id = 0, \
.ch = 0,\
.direction = DMA_MEMORY_TO_MEMORY,\
.transfer_mode = DMA_LLI_ONCE_MODE, \
.src_req = DMA_REQUEST_NONE, \
.dst_req = DMA_REQUEST_NONE, \
.src_width = DMA_TRANSFER_WIDTH_32BIT , \
.dst_width = DMA_TRANSFER_WIDTH_32BIT , \
}
#define DMA0_CH7_CONFIG \
{ \
.id = 0, \
.ch = 0, \
.direction = DMA_MEMORY_TO_MEMORY, \
.transfer_mode = DMA_LLI_ONCE_MODE, \
.src_req = DMA_REQUEST_NONE, \
.dst_req = DMA_REQUEST_NONE, \
.src_width = DMA_TRANSFER_WIDTH_32BIT, \
.dst_width = DMA_TRANSFER_WIDTH_32BIT, \
}
#endif
#endif
#if defined(BSP_USING_I2C0)
#ifndef I2C0_CONFIG
#define I2C0_CONFIG \
{ \
.id = 0, \
.mode = I2C_HW_MODE,\
.phase = 15, \
}
#define I2C0_CONFIG \
{ \
.id = 0, \
.mode = I2C_HW_MODE, \
.phase = 15, \
}
#endif
#endif
#if defined (BSP_USING_TIMER_CH0)
#if defined(BSP_USING_TIMER_CH0)
#ifndef TIMER_CH0_CONFIG
#define TIMER_CH0_CONFIG \
{ \
.id = 0, \
.ch = 0, \
.cnt_mode = TIMER_CNT_PRELOAD, \
.pl_trig_src = TIMER_PL_TRIG_COMP0, \
}
#define TIMER_CH0_CONFIG \
{ \
.id = 0, \
.ch = 0, \
.cnt_mode = TIMER_CNT_PRELOAD, \
.pl_trig_src = TIMER_PL_TRIG_COMP0, \
}
#endif
#endif
#if defined (BSP_USING_TIMER_CH1)
#if defined(BSP_USING_TIMER_CH1)
#ifndef TIMER_CH1_CONFIG
#define TIMER_CH1_CONFIG \
{ \
.id = 0, \
.ch = 1, \
.cnt_mode = TIMER_CNT_PRELOAD, \
.pl_trig_src = TIMER_PL_TRIG_COMP2, \
}
#define TIMER_CH1_CONFIG \
{ \
.id = 0, \
.ch = 1, \
.cnt_mode = TIMER_CNT_PRELOAD, \
.pl_trig_src = TIMER_PL_TRIG_COMP2, \
}
#endif
#endif

80
bsp/board/bl706_avb/pinmux_config.h
View file

@ -1,33 +1,33 @@
/**
* @file pinmux_config.h
* @brief
*
* @brief
*
* Copyright (c) 2021 Bouffalolab team
*
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
*
* http://www.apache.org/licenses/LICENSE-2.0
*
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
*
*/
#ifndef _PINMUX_CONFIG_H
#define _PINMUX_CONFIG_H
// <<< Use Configuration Wizard in Context Menu >>>
#define PINMUX_LVGL 0
#define PINMUX_UVC 1
#define PINMUX_CAMERA_LCD 2
#define PINMUX_OTHER 3
#define PINMUX_LVGL 0
#define PINMUX_UVC 1
#define PINMUX_CAMERA_LCD 2
#define PINMUX_OTHER 3
// <q> PINMUX SELECT <2> [PINMUX_LVGL//PINMUX_UVC//PINMUX_CAMERA_LCD]
// <i> config pinmux select
#define PINMUX_SELECT PINMUX_CAMERA_LCD
@ -187,43 +187,43 @@
#elif PINMUX_SELECT == PINMUX_UVC
// <q> GPIO0 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC]
// <i> config gpio0 function
#define CONFIG_GPIO0_FUNC GPIO_FUN_CAM
#define CONFIG_GPIO0_FUNC GPIO_FUN_CAM
// <q> GPIO1 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_UART0_CTS//GPIO_FUN_UART1_CTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC]
// <i> config gpio1 function
#define CONFIG_GPIO1_FUNC GPIO_FUN_CAM
#define CONFIG_GPIO1_FUNC GPIO_FUN_CAM
// <q> GPIO2 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_UART0_TX//GPIO_FUN_UART1_TX//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC]
// <i> config gpio2 function
#define CONFIG_GPIO2_FUNC GPIO_FUN_CAM
#define CONFIG_GPIO2_FUNC GPIO_FUN_CAM
// <q> GPIO3 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_UART0_RX//GPIO_FUN_UART1_RX//GPIO_FUN_QDEC]
// <i> config gpio3 function
#define CONFIG_GPIO3_FUNC GPIO_FUN_CAM
#define CONFIG_GPIO3_FUNC GPIO_FUN_CAM
// <q> GPIO4 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_QDEC]
// <i> config gpio4 function
#define CONFIG_GPIO4_FUNC GPIO_FUN_CAM
#define CONFIG_GPIO4_FUNC GPIO_FUN_CAM
// <q> GPIO5 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_UART0_CTS//GPIO_FUN_UART1_CTS//GPIO_FUN_QDEC]
// <i> config gpio5 function
#define CONFIG_GPIO5_FUNC GPIO_FUN_CAM
#define CONFIG_GPIO5_FUNC GPIO_FUN_CAM
// <q> GPIO6 <2> [GPIO_FUN_UNUSED//GPIO_FUN_CLK_OUT//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_UART0_TX//GPIO_FUN_UART1_TX//GPIO_FUN_QDEC]
// <i> config gpio6 function
#define CONFIG_GPIO6_FUNC GPIO_FUN_CAM
#define CONFIG_GPIO6_FUNC GPIO_FUN_CAM
// <q> GPIO7 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_USB//GPIO_FUN_ANALOG//GPIO_FUN_UART0_RX//GPIO_FUN_UART1_RX//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC]
// <i> config gpio7 function
#define CONFIG_GPIO7_FUNC GPIO_FUN_USB
#define CONFIG_GPIO7_FUNC GPIO_FUN_USB
// <q> GPIO8 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_USB//GPIO_FUN_ANALOG//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC]
// <i> config gpio8 function
#define CONFIG_GPIO8_FUNC GPIO_FUN_USB
#define CONFIG_GPIO8_FUNC GPIO_FUN_USB
// <q> GPIO9 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_ANALOG//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_QDEC]
// <i> config gpio9 function
#define CONFIG_GPIO9_FUNC GPIO_FUN_CLK_OUT
#define CONFIG_GPIO9_FUNC GPIO_FUN_CLK_OUT
// <q> GPIO10 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_ANALOG//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_QDEC]
// <i> config gpio10 function
@ -340,43 +340,43 @@
#elif PINMUX_SELECT == PINMUX_CAMERA_LCD
// <q> GPIO0 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC]
// <i> config gpio0 function
#define CONFIG_GPIO0_FUNC GPIO_FUN_CAM
#define CONFIG_GPIO0_FUNC GPIO_FUN_CAM
// <q> GPIO1 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_UART0_CTS//GPIO_FUN_UART1_CTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC]
// <i> config gpio1 function
#define CONFIG_GPIO1_FUNC GPIO_FUN_CAM
#define CONFIG_GPIO1_FUNC GPIO_FUN_CAM
// <q> GPIO2 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_UART0_TX//GPIO_FUN_UART1_TX//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC]
// <i> config gpio2 function
#define CONFIG_GPIO2_FUNC GPIO_FUN_CAM
#define CONFIG_GPIO2_FUNC GPIO_FUN_CAM
// <q> GPIO3 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_UART0_RX//GPIO_FUN_UART1_RX//GPIO_FUN_QDEC]
// <i> config gpio3 function
#define CONFIG_GPIO3_FUNC GPIO_FUN_CAM
#define CONFIG_GPIO3_FUNC GPIO_FUN_CAM
// <q> GPIO4 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_QDEC]
// <i> config gpio4 function
#define CONFIG_GPIO4_FUNC GPIO_FUN_CAM
#define CONFIG_GPIO4_FUNC GPIO_FUN_CAM
// <q> GPIO5 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_UART0_CTS//GPIO_FUN_UART1_CTS//GPIO_FUN_QDEC]
// <i> config gpio5 function
#define CONFIG_GPIO5_FUNC GPIO_FUN_CAM
#define CONFIG_GPIO5_FUNC GPIO_FUN_CAM
// <q> GPIO6 <2> [GPIO_FUN_UNUSED//GPIO_FUN_CLK_OUT//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_UART0_TX//GPIO_FUN_UART1_TX//GPIO_FUN_QDEC]
// <i> config gpio6 function
#define CONFIG_GPIO6_FUNC GPIO_FUN_CAM
#define CONFIG_GPIO6_FUNC GPIO_FUN_CAM
// <q> GPIO7 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_USB//GPIO_FUN_ANALOG//GPIO_FUN_UART0_RX//GPIO_FUN_UART1_RX//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC]
// <i> config gpio7 function
#define CONFIG_GPIO7_FUNC GPIO_FUN_USB
#define CONFIG_GPIO7_FUNC GPIO_FUN_USB
// <q> GPIO8 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_USB//GPIO_FUN_ANALOG//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC]
// <i> config gpio8 function
#define CONFIG_GPIO8_FUNC GPIO_FUN_USB
#define CONFIG_GPIO8_FUNC GPIO_FUN_USB
// <q> GPIO9 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_ANALOG//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_QDEC]
// <i> config gpio9 function
#define CONFIG_GPIO9_FUNC GPIO_FUN_CLK_OUT
#define CONFIG_GPIO9_FUNC GPIO_FUN_CLK_OUT
// <q> GPIO10 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_ANALOG//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_QDEC]
// <i> config gpio10 function
@ -492,43 +492,43 @@
#else
// <q> GPIO0 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC]
// <i> config gpio0 function
#define CONFIG_GPIO0_FUNC GPIO_FUN_UNUSED
#define CONFIG_GPIO0_FUNC GPIO_FUN_UNUSED
// <q> GPIO1 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_UART0_CTS//GPIO_FUN_UART1_CTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC]
// <i> config gpio1 function
#define CONFIG_GPIO1_FUNC GPIO_FUN_UNUSED
#define CONFIG_GPIO1_FUNC GPIO_FUN_UNUSED
// <q> GPIO2 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_UART0_TX//GPIO_FUN_UART1_TX//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC]
// <i> config gpio2 function
#define CONFIG_GPIO2_FUNC GPIO_FUN_UNUSED
#define CONFIG_GPIO2_FUNC GPIO_FUN_UNUSED
// <q> GPIO3 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_UART0_RX//GPIO_FUN_UART1_RX//GPIO_FUN_QDEC]
// <i> config gpio3 function
#define CONFIG_GPIO3_FUNC GPIO_FUN_UNUSED
#define CONFIG_GPIO3_FUNC GPIO_FUN_UNUSED
// <q> GPIO4 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_QDEC]
// <i> config gpio4 function
#define CONFIG_GPIO4_FUNC GPIO_FUN_UNUSED
#define CONFIG_GPIO4_FUNC GPIO_FUN_UNUSED
// <q> GPIO5 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_UART0_CTS//GPIO_FUN_UART1_CTS//GPIO_FUN_QDEC]
// <i> config gpio5 function
#define CONFIG_GPIO5_FUNC GPIO_FUN_UNUSED
#define CONFIG_GPIO5_FUNC GPIO_FUN_UNUSED
// <q> GPIO6 <2> [GPIO_FUN_UNUSED//GPIO_FUN_CLK_OUT//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_UART0_TX//GPIO_FUN_UART1_TX//GPIO_FUN_QDEC]
// <i> config gpio6 function
#define CONFIG_GPIO6_FUNC GPIO_FUN_UNUSED
#define CONFIG_GPIO6_FUNC GPIO_FUN_UNUSED
// <q> GPIO7 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_USB//GPIO_FUN_ANALOG//GPIO_FUN_UART0_RX//GPIO_FUN_UART1_RX//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC]
// <i> config gpio7 function
#define CONFIG_GPIO7_FUNC GPIO_FUN_UNUSED
#define CONFIG_GPIO7_FUNC GPIO_FUN_UNUSED
// <q> GPIO8 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_USB//GPIO_FUN_ANALOG//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC]
// <i> config gpio8 function
#define CONFIG_GPIO8_FUNC GPIO_FUN_UNUSED
#define CONFIG_GPIO8_FUNC GPIO_FUN_UNUSED
// <q> GPIO9 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_ANALOG//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_QDEC]
// <i> config gpio9 function
#define CONFIG_GPIO9_FUNC GPIO_FUN_UNUSED
#define CONFIG_GPIO9_FUNC GPIO_FUN_UNUSED
// <q> GPIO10 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_ANALOG//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_QDEC]
// <i> config gpio10 function

12
bsp/board/bl706_iot/bl702_config.h
View file

@ -1,24 +1,24 @@
/**
* @file bl702_config.h
* @brief
*
* @brief
*
* Copyright (c) 2021 Bouffalolab team
*
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
*
* http://www.apache.org/licenses/LICENSE-2.0
*
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
*
*/
#ifndef __BL702_CONFIG_H__

300
bsp/board/bl706_iot/board.c
View file

@ -1,24 +1,24 @@
/**
* @file board.c
* @brief
*
* @brief
*
* Copyright (c) 2021 Bouffalolab team
*
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
*
* http://www.apache.org/licenses/LICENSE-2.0
*
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
*
*/
#include "hal_gpio.h"
@ -26,166 +26,88 @@
#include "bl702_glb.h"
#include "pinmux_config.h"
struct pin_mux_cfg
{
struct pin_mux_cfg {
uint8_t pin;
uint16_t func;
};
static const struct pin_mux_cfg af_pin_table[] =
{
{
.pin = GPIO_PIN_0,
.func = CONFIG_GPIO0_FUNC
},
{
.pin = GPIO_PIN_1,
.func = CONFIG_GPIO1_FUNC
},
{
.pin = GPIO_PIN_2,
.func = CONFIG_GPIO2_FUNC
},
{
.pin = GPIO_PIN_3,
.func = CONFIG_GPIO3_FUNC
},
{
.pin = GPIO_PIN_4,
.func = CONFIG_GPIO4_FUNC
},
{
.pin = GPIO_PIN_5,
.func = CONFIG_GPIO5_FUNC
},
{
.pin = GPIO_PIN_6,
.func = CONFIG_GPIO6_FUNC
},
{
.pin = GPIO_PIN_7,
.func = CONFIG_GPIO7_FUNC
},
{
.pin = GPIO_PIN_8,
.func = CONFIG_GPIO8_FUNC
},
{
.pin = GPIO_PIN_9,
.func = CONFIG_GPIO9_FUNC
},
{
.pin = GPIO_PIN_10,
.func = CONFIG_GPIO10_FUNC
},
{
.pin = GPIO_PIN_11,
.func = CONFIG_GPIO11_FUNC
},
{
.pin = GPIO_PIN_12,
.func = CONFIG_GPIO12_FUNC
},
{
.pin = GPIO_PIN_13,
.func = CONFIG_GPIO13_FUNC
},
{
.pin = GPIO_PIN_14,
.func = CONFIG_GPIO14_FUNC
},
{
.pin = GPIO_PIN_15,
.func = CONFIG_GPIO15_FUNC
},
{
.pin = GPIO_PIN_16,
.func = CONFIG_GPIO16_FUNC
},
{
.pin = GPIO_PIN_17,
.func = CONFIG_GPIO17_FUNC
},
{
.pin = GPIO_PIN_18,
.func = CONFIG_GPIO18_FUNC
},
{
.pin = GPIO_PIN_19,
.func = CONFIG_GPIO19_FUNC
},
{
.pin = GPIO_PIN_20,
.func = CONFIG_GPIO20_FUNC
},
{
.pin = GPIO_PIN_21,
.func = CONFIG_GPIO21_FUNC
},
{
.pin = GPIO_PIN_22,
.func = CONFIG_GPIO22_FUNC
},
{
.pin = GPIO_PIN_23,
.func = CONFIG_GPIO23_FUNC
},
{
.pin = GPIO_PIN_24,
.func = CONFIG_GPIO24_FUNC
},
{
.pin = GPIO_PIN_25,
.func = CONFIG_GPIO25_FUNC
},
{
.pin = GPIO_PIN_26,
.func = CONFIG_GPIO26_FUNC
},
{
.pin = GPIO_PIN_27,
.func = CONFIG_GPIO27_FUNC
},
{
.pin = GPIO_PIN_28,
.func = CONFIG_GPIO28_FUNC
},
{
.pin = GPIO_PIN_29,
.func = CONFIG_GPIO29_FUNC
},
{
.pin = GPIO_PIN_30,
.func = CONFIG_GPIO30_FUNC
},
{
.pin = GPIO_PIN_31,
.func = CONFIG_GPIO31_FUNC
},
{
.pin = GPIO_PIN_32,
.func = CONFIG_GPIO32_FUNC
},
{
.pin = GPIO_PIN_33,
.func = CONFIG_GPIO33_FUNC
},
{
.pin = GPIO_PIN_34,
.func = CONFIG_GPIO34_FUNC
},
{
.pin = GPIO_PIN_35,
.func = CONFIG_GPIO35_FUNC
},
{
.pin = GPIO_PIN_36,
.func = CONFIG_GPIO36_FUNC
},
{
.pin = GPIO_PIN_37,
.func = CONFIG_GPIO37_FUNC
}
static const struct pin_mux_cfg af_pin_table[] = {
{ .pin = GPIO_PIN_0,
.func = CONFIG_GPIO0_FUNC },
{ .pin = GPIO_PIN_1,
.func = CONFIG_GPIO1_FUNC },
{ .pin = GPIO_PIN_2,
.func = CONFIG_GPIO2_FUNC },
{ .pin = GPIO_PIN_3,
.func = CONFIG_GPIO3_FUNC },
{ .pin = GPIO_PIN_4,
.func = CONFIG_GPIO4_FUNC },
{ .pin = GPIO_PIN_5,
.func = CONFIG_GPIO5_FUNC },
{ .pin = GPIO_PIN_6,
.func = CONFIG_GPIO6_FUNC },
{ .pin = GPIO_PIN_7,
.func = CONFIG_GPIO7_FUNC },
{ .pin = GPIO_PIN_8,
.func = CONFIG_GPIO8_FUNC },
{ .pin = GPIO_PIN_9,
.func = CONFIG_GPIO9_FUNC },
{ .pin = GPIO_PIN_10,
.func = CONFIG_GPIO10_FUNC },
{ .pin = GPIO_PIN_11,
.func = CONFIG_GPIO11_FUNC },
{ .pin = GPIO_PIN_12,
.func = CONFIG_GPIO12_FUNC },
{ .pin = GPIO_PIN_13,
.func = CONFIG_GPIO13_FUNC },
{ .pin = GPIO_PIN_14,
.func = CONFIG_GPIO14_FUNC },
{ .pin = GPIO_PIN_15,
.func = CONFIG_GPIO15_FUNC },
{ .pin = GPIO_PIN_16,
.func = CONFIG_GPIO16_FUNC },
{ .pin = GPIO_PIN_17,
.func = CONFIG_GPIO17_FUNC },
{ .pin = GPIO_PIN_18,
.func = CONFIG_GPIO18_FUNC },
{ .pin = GPIO_PIN_19,
.func = CONFIG_GPIO19_FUNC },
{ .pin = GPIO_PIN_20,
.func = CONFIG_GPIO20_FUNC },
{ .pin = GPIO_PIN_21,
.func = CONFIG_GPIO21_FUNC },
{ .pin = GPIO_PIN_22,
.func = CONFIG_GPIO22_FUNC },
{ .pin = GPIO_PIN_23,
.func = CONFIG_GPIO23_FUNC },
{ .pin = GPIO_PIN_24,
.func = CONFIG_GPIO24_FUNC },
{ .pin = GPIO_PIN_25,
.func = CONFIG_GPIO25_FUNC },
{ .pin = GPIO_PIN_26,
.func = CONFIG_GPIO26_FUNC },
{ .pin = GPIO_PIN_27,
.func = CONFIG_GPIO27_FUNC },
{ .pin = GPIO_PIN_28,
.func = CONFIG_GPIO28_FUNC },
{ .pin = GPIO_PIN_29,
.func = CONFIG_GPIO29_FUNC },
{ .pin = GPIO_PIN_30,
.func = CONFIG_GPIO30_FUNC },
{ .pin = GPIO_PIN_31,
.func = CONFIG_GPIO31_FUNC },
{ .pin = GPIO_PIN_32,
.func = CONFIG_GPIO32_FUNC },
{ .pin = GPIO_PIN_33,
.func = CONFIG_GPIO33_FUNC },
{ .pin = GPIO_PIN_34,
.func = CONFIG_GPIO34_FUNC },
{ .pin = GPIO_PIN_35,
.func = CONFIG_GPIO35_FUNC },
{ .pin = GPIO_PIN_36,
.func = CONFIG_GPIO36_FUNC },
{ .pin = GPIO_PIN_37,
.func = CONFIG_GPIO37_FUNC }
};
@ -196,43 +118,32 @@ static void board_pin_mux_init(void)
gpio_cfg.drive = 0;
gpio_cfg.smtCtrl = 1;
for (int i = 0; i < sizeof(af_pin_table)/sizeof(af_pin_table[0]); i++)
{
for (int i = 0; i < sizeof(af_pin_table) / sizeof(af_pin_table[0]); i++) {
gpio_cfg.gpioMode = GPIO_MODE_AF;
gpio_cfg.pullType = GPIO_PULL_UP;
gpio_cfg.gpioPin = af_pin_table[i].pin;
gpio_cfg.gpioFun = af_pin_table[i].func;
gpio_cfg.gpioPin = af_pin_table[i].pin;
gpio_cfg.gpioFun = af_pin_table[i].func;
if(af_pin_table[i].func == GPIO_FUN_UNUSED)
{
if (af_pin_table[i].func == GPIO_FUN_UNUSED) {
continue;
}
else if(af_pin_table[i].func == GPIO_FUN_PWM)
{
} else if (af_pin_table[i].func == GPIO_FUN_PWM) {
gpio_cfg.pullType = GPIO_PULL_DOWN;
}
else if((af_pin_table[i].func == GPIO_FUN_DAC)|| (af_pin_table[i].func == GPIO_FUN_ADC))
{
gpio_cfg.gpioFun = GPIO_FUN_ANALOG;
} else if ((af_pin_table[i].func == GPIO_FUN_DAC) || (af_pin_table[i].func == GPIO_FUN_ADC)) {
gpio_cfg.gpioFun = GPIO_FUN_ANALOG;
gpio_cfg.gpioMode = GPIO_MODE_ANALOG;
}
else if((af_pin_table[i].func & 0x70) == 0x70)
{
} else if ((af_pin_table[i].func & 0x70) == 0x70) {
gpio_cfg.gpioFun = GPIO_FUN_UART;
uint8_t sig = af_pin_table[i].func & 0x07;
if (gpio_cfg.gpioPin > 31)
{
GLB_UART_Fun_Sel(((gpio_cfg.gpioPin-9) % 8), sig);
}
else
{
if (gpio_cfg.gpioPin > 31) {
GLB_UART_Fun_Sel(((gpio_cfg.gpioPin - 9) % 8), sig);
} else {
GLB_UART_Fun_Sel((gpio_cfg.gpioPin % 8), sig);
}
}
GLB_GPIO_Init(&gpio_cfg);
}
}
static void board_clock_init(void)
@ -243,6 +154,7 @@ static void board_clock_init(void)
void bl_show_info(void)
{
MSG("\r\n");
MSG(" ____ __ __ _ _ _ \r\n");
MSG(" | _ \\ / _|/ _| | | | | | | \r\n");
MSG(" | |_) | ___ _ _| |_| |_ __ _| | ___ | | __ _| |__ \r\n");
@ -250,17 +162,17 @@ void bl_show_info(void)
MSG(" | |_) | (_) | |_| | | | || (_| | | (_) | | (_| | |_) |\r\n");
MSG(" |____/ \\___/ \\__,_|_| |_| \\__,_|_|\\___/|_|\\__,_|_.__/ \r\n");
MSG("\r\n");
MSG("Build:%s,%s\r\n",__TIME__,__DATE__);
MSG("Build:%s,%s\r\n", __TIME__, __DATE__);
MSG("Copyright (c) 2021 Bouffalolab team\r\n");
#if 0
MSG("root clock:%dM\r\n",system_clock_get(SYSTEM_CLOCK_ROOT_CLOCK)/1000000);
MSG("fclk clock:%dM\r\n",system_clock_get(SYSTEM_CLOCK_FCLK)/1000000);
MSG("bclk clock:%dM\r\n",system_clock_get(SYSTEM_CLOCK_BCLK)/1000000);
#if 0
MSG("root clock:%dM\r\n", system_clock_get(SYSTEM_CLOCK_ROOT_CLOCK) / 1000000);
MSG("fclk clock:%dM\r\n", system_clock_get(SYSTEM_CLOCK_FCLK) / 1000000);
MSG("bclk clock:%dM\r\n", system_clock_get(SYSTEM_CLOCK_BCLK) / 1000000);
MSG("uart clock:%dM\r\n",peripheral_clock_get(PERIPHERAL_CLOCK_UART)/1000000);
MSG("spi clock:%dM\r\n",peripheral_clock_get(PERIPHERAL_CLOCK_SPI)/1000000);
MSG("i2c clock:%dM\r\n",peripheral_clock_get(PERIPHERAL_CLOCK_I2C)/1000000);
MSG("uart clock:%dM\r\n", peripheral_clock_get(PERIPHERAL_CLOCK_UART) / 1000000);
MSG("spi clock:%dM\r\n", peripheral_clock_get(PERIPHERAL_CLOCK_SPI) / 1000000);
MSG("i2c clock:%dM\r\n", peripheral_clock_get(PERIPHERAL_CLOCK_I2C) / 1000000);
#endif
}

54
bsp/board/bl706_iot/clock_config.h
View file

@ -1,64 +1,68 @@
/**
* @file clock_config.h
* @brief
*
* @brief
*
* Copyright (c) 2021 Bouffalolab team
*
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
*
* http://www.apache.org/licenses/LICENSE-2.0
*
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
*
*/
#ifndef _CLOCK_CONFIG_H
#define _CLOCK_CONFIG_H
#define BSP_ROOT_CLOCK_SOURCE ROOT_CLOCK_SOURCE_PLL_144M
#define BSP_ROOT_CLOCK_SOURCE ROOT_CLOCK_SOURCE_PLL_144M
// #define BSP_AUDIO_PLL_CLOCK_SOURCE AUDIO_PLL_CLOCK_24000000_HZ
#if defined(BSP_ROOT_CLOCK_SOURCE)
#define BSP_HCLK_DIV 0
#define BSP_BCLK_DIV 1
#define BSP_HCLK_DIV 0
#define BSP_BCLK_DIV 1
#endif
#if defined(BSP_USING_UART0)||defined(BSP_USING_UART1)
#define BSP_UART_CLOCK_SOURCE ROOT_CLOCK_SOURCE_PLL_96M
#define BSP_UART_CLOCK_DIV 0
#endif
#if defined(BSP_USING_UART0) || defined(BSP_USING_UART1)
#define BSP_UART_CLOCK_SOURCE ROOT_CLOCK_SOURCE_PLL_96M
#define BSP_UART_CLOCK_DIV 0
#endif
#if defined(BSP_USING_I2C0)
#define BSP_I2C_CLOCK_SOURCE ROOT_CLOCK_SOURCE_BCLK
#define BSP_I2C_CLOCK_DIV 0
#define BSP_I2C_CLOCK_SOURCE ROOT_CLOCK_SOURCE_BCLK
#define BSP_I2C_CLOCK_DIV 0
#endif
#if defined(BSP_USING_SPI0)
#define BSP_SPI_CLOCK_SOURCE ROOT_CLOCK_SOURCE_BCLK
#define BSP_SPI_CLOCK_DIV 0
#define BSP_SPI_CLOCK_SOURCE ROOT_CLOCK_SOURCE_BCLK
#define BSP_SPI_CLOCK_DIV 0
#endif
#if defined(BSP_USING_PWM_CH0) || defined(BSP_USING_PWM_CH1) || defined(BSP_USING_PWM_CH2) || defined(BSP_USING_PWM_CH3) || defined(BSP_USING_PWM_CH4) || defined(BSP_USING_PWM_CH5)
#define BSP_PWM_CLOCK_SOURCE ROOT_CLOCK_SOURCE_RC_32K
#define BSP_PWM_CLOCK_DIV 32
#endif
#if defined(BSP_USING_IR)
#define BSP_IR_CLOCK_SOURCE ROOT_CLOCK_SOURCE_XCLK
#define BSP_IR_CLOCK_DIV 0
#define BSP_IR_CLOCK_SOURCE ROOT_CLOCK_SOURCE_XCLK
#define BSP_IR_CLOCK_DIV 0
#endif
#if defined(BSP_USING_I2S0)
#define BSP_I2S_CLOCK_SOURCE ROOT_CLOCK_SOURCE_XCLK
#define BSP_I2S_CLOCK_DIV 0
#define BSP_I2S_CLOCK_SOURCE ROOT_CLOCK_SOURCE_XCLK
#define BSP_I2S_CLOCK_DIV 0
#endif
#if defined(BSP_USING_ADC0)
#define BSP_ADC_CLOCK_SOURCE ROOT_CLOCK_SOURCE_XCLK
#define BSP_ADC_CLOCK_DIV 0
#define BSP_ADC_CLOCK_SOURCE ROOT_CLOCK_SOURCE_XCLK
#define BSP_ADC_CLOCK_DIV 0
#endif
#if defined(BSP_USING_DAC0)
#define BSP_DAC_CLOCK_SOURCE ROOT_CLOCK_SOURCE_AUPLL
#define BSP_DAC_CLOCK_DIV 1
#define BSP_DAC_CLOCK_SOURCE ROOT_CLOCK_SOURCE_AUPLL
#define BSP_DAC_CLOCK_DIV 1
#endif
#endif

413
bsp/board/bl706_iot/peripheral_config.h
View file

@ -1,24 +1,24 @@
/**
* @file peripheral_config.h
* @brief
*
* @brief
*
* Copyright (c) 2021 Bouffalolab team
*
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
*
* http://www.apache.org/licenses/LICENSE-2.0
*
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
*
*/
#ifndef _PERIPHERAL_CONFIG_H_
@ -33,7 +33,10 @@
#define BSP_USING_I2C0
#define BSP_USING_I2S0
#define BSP_USING_USB
#define BSP_USING_PWM_CH0
#define BSP_USING_PWM_CH1
#define BSP_USING_PWM_CH2
#define BSP_USING_PWM_CH3
#define BSP_USING_TIMER_CH0
#define BSP_USING_TIMER_CH1
/* ----------------------*/
@ -52,268 +55,306 @@
/* PERIPHERAL CONFIG */
#if defined(BSP_USING_ADC0)
#ifndef ADC0_CONFIG
#define ADC0_CONFIG \
{ \
.clk_div = ADC_CLOCK_DIV_32,\
.vref = ADC_VREF_3P2V,\
.continuous_conv_mode = DISABLE,\
.differential_mode = DISABLE,\
.data_width = ADC_DATA_WIDTH_16B_WITH_256_AVERAGE,\
.fifo_threshold = ADC_FIFO_THRESHOLD_1BYTE,\
.gain = ADC_GAIN_1\
}
#define ADC0_CONFIG \
{ \
.clk_div = ADC_CLOCK_DIV_32, \
.vref = ADC_VREF_3P2V, \
.continuous_conv_mode = DISABLE, \
.differential_mode = DISABLE, \
.data_width = ADC_DATA_WIDTH_16B_WITH_256_AVERAGE, \
.fifo_threshold = ADC_FIFO_THRESHOLD_1BYTE, \
.gain = ADC_GAIN_1 \
}
#endif
#endif
#if defined(BSP_USING_DAC0)
#ifndef DAC_CONFIG
#define DAC_CONFIG \
{ \
.clk = DAC_CLK_500KHZ,\
.pin.dac0 = GLB_GPIO_PIN_11,\
.pin.pin_num = 1,\
}
#define DAC_CONFIG \
{ \
.clk = DAC_CLK_500KHZ, \
.pin.dac0 = GLB_GPIO_PIN_11, \
.pin.pin_num = 1, \
}
#endif
#endif
#if defined(BSP_USING_UART0)
#ifndef UART0_CONFIG
#define UART0_CONFIG \
{ \
.id = 0, \
.baudrate = 2000000,\
.databits = UART_DATA_LEN_8, \
.stopbits = UART_STOP_ONE, \
.parity = UART_PAR_NONE, \
.fifo_threshold = 1, \
}
#define UART0_CONFIG \
{ \
.id = 0, \
.baudrate = 2000000, \
.databits = UART_DATA_LEN_8, \
.stopbits = UART_STOP_ONE, \
.parity = UART_PAR_NONE, \
.fifo_threshold = 1, \
}
#endif
#endif
#if defined(BSP_USING_UART1)
#ifndef UART1_CONFIG
#define UART1_CONFIG \
{ \
.id = 1, \
.baudrate = 2000000,\
.databits = UART_DATA_LEN_8, \
.stopbits = UART_STOP_ONE, \
.parity = UART_PAR_NONE, \
.fifo_threshold = 64, \
}
#ifndef UART1_CONFIG
#define UART1_CONFIG \
{ \
.id = 1, \
.baudrate = 2000000, \
.databits = UART_DATA_LEN_8, \
.stopbits = UART_STOP_ONE, \
.parity = UART_PAR_NONE, \
.fifo_threshold = 64, \
}
#endif
#endif
#if defined(BSP_USING_SPI0)
#ifndef SPI0_CONFIG
#define SPI0_CONFIG \
{ \
.id = 0, \
.clk = 18000000,\
.mode = SPI_MASTER_MODE, \
.direction = SPI_MSB_BYTE0_DIRECTION_FIRST, \
.clk_polaraity = SPI_POLARITY_LOW, \
.clk_phase = SPI_PHASE_1EDGE, \
.datasize = SPI_DATASIZE_8BIT, \
.fifo_threshold = 1, \
}
#define SPI0_CONFIG \
{ \
.id = 0, \
.clk = 18000000, \
.mode = SPI_MASTER_MODE, \
.direction = SPI_MSB_BYTE0_DIRECTION_FIRST, \
.clk_polaraity = SPI_POLARITY_LOW, \
.clk_phase = SPI_PHASE_1EDGE, \
.datasize = SPI_DATASIZE_8BIT, \
.fifo_threshold = 1, \
}
#endif
#endif
#if defined(BSP_USING_PWM_CH0)
#ifndef PWM_CH0_CONFIG
#define PWM_CH0_CONFIG \
{ \
.ch = 0, \
.polarity_invert_mode = DISABLE, \
.period = 0, \
.threshold_low = 0, \
.threshold_high = 0, \
.it_pulse_count = 0, \
}
#endif
#endif
#if defined(BSP_USING_PWM_CH1)
#ifndef PWM_CH1_CONFIG
#define PWM_CH1_CONFIG \
{ \
.ch = 1, \
.polarity_invert_mode = DISABLE, \
.period = 0, \
.threshold_low = 0, \
.threshold_high = 0, \
.it_pulse_count = 0, \
}
#endif
#endif
#if defined(BSP_USING_PWM_CH2)
#ifndef PWM_CH2_CONFIG
#define PWM_CH2_CONFIG \
{ \
.ch = 2, \
.frequency = 1000000, \
.dutycycle = 0, \
.it_pulse_count = 0,\
}
#define PWM_CH2_CONFIG \
{ \
.ch = 2, \
.polarity_invert_mode = DISABLE, \
.period = 0, \
.threshold_low = 0, \
.threshold_high = 0, \
.it_pulse_count = 0, \
}
#endif
#endif
#if defined(BSP_USING_PWM_CH3)
#ifndef PWM_CH3_CONFIG
#define PWM_CH3_CONFIG \
{ \
.ch = 3, \
.polarity_invert_mode = DISABLE, \
.period = 0, \
.threshold_low = 0, \
.threshold_high = 0, \
.it_pulse_count = 0, \
}
#endif
#endif
#if defined(BSP_USING_I2S0)
#ifndef I2S0_CONFIG
#define I2S0_CONFIG \
{ \
.id = 0, \
.iis_mode = I2S_MODE_MASTER,\
.interface_mode = I2S_MODE_LEFT, \
.sampl_freq_hz = 16*1000, \
.channel_num = I2S_FS_CHANNELS_NUM_MONO, \
.frame_size = I2S_FRAME_LEN_16, \
.data_size = I2S_DATA_LEN_16, \
.fifo_threshold = 8, \
}
#define I2S0_CONFIG \
{ \
.id = 0, \
.iis_mode = I2S_MODE_MASTER, \
.interface_mode = I2S_MODE_LEFT, \
.sampl_freq_hz = 16 * 1000, \
.channel_num = I2S_FS_CHANNELS_NUM_MONO, \
.frame_size = I2S_FRAME_LEN_16, \
.data_size = I2S_DATA_LEN_16, \
.fifo_threshold = 8, \
}
#endif
#endif
#if defined(BSP_USING_DMA0_CH0)
#ifndef DMA0_CH0_CONFIG
#define DMA0_CH0_CONFIG \
{ \
.id = 0, \
.ch = 0,\
.direction = DMA_MEMORY_TO_MEMORY,\
.transfer_mode = DMA_LLI_ONCE_MODE, \
.src_req = DMA_REQUEST_NONE, \
.dst_req = DMA_REQUEST_NONE, \
.src_width = DMA_TRANSFER_WIDTH_32BIT , \
.dst_width = DMA_TRANSFER_WIDTH_32BIT , \
}
#define DMA0_CH0_CONFIG \
{ \
.id = 0, \
.ch = 0, \
.direction = DMA_MEMORY_TO_MEMORY, \
.transfer_mode = DMA_LLI_ONCE_MODE, \
.src_req = DMA_REQUEST_NONE, \
.dst_req = DMA_REQUEST_NONE, \
.src_width = DMA_TRANSFER_WIDTH_32BIT, \
.dst_width = DMA_TRANSFER_WIDTH_32BIT, \
}
#endif
#endif
#if defined(BSP_USING_DMA0_CH1)
#ifndef DMA0_CH1_CONFIG
#define DMA0_CH1_CONFIG \
{ \
.id = 0, \
.ch = 1,\
.direction = DMA_MEMORY_TO_MEMORY, \
.transfer_mode = DMA_LLI_ONCE_MODE, \
.src_req = DMA_REQUEST_NONE, \
.dst_req = DMA_REQUEST_NONE, \
.src_width = DMA_TRANSFER_WIDTH_16BIT , \
.dst_width = DMA_TRANSFER_WIDTH_16BIT , \
}
#define DMA0_CH1_CONFIG \
{ \
.id = 0, \
.ch = 1, \
.direction = DMA_MEMORY_TO_MEMORY, \
.transfer_mode = DMA_LLI_ONCE_MODE, \
.src_req = DMA_REQUEST_NONE, \
.dst_req = DMA_REQUEST_NONE, \
.src_width = DMA_TRANSFER_WIDTH_16BIT, \
.dst_width = DMA_TRANSFER_WIDTH_16BIT, \
}
#endif
#endif
#if defined(BSP_USING_DMA0_CH2)
#ifndef DMA0_CH2_CONFIG
#define DMA0_CH2_CONFIG \
{ \
.id = 0, \
.ch = 2,\
.direction = DMA_MEMORY_TO_PERIPH, \
.transfer_mode = DMA_LLI_ONCE_MODE, \
.src_req = DMA_REQUEST_NONE, \
.dst_req = DMA_REQUEST_UART1_TX, \
.src_width = DMA_TRANSFER_WIDTH_8BIT , \
.dst_width = DMA_TRANSFER_WIDTH_8BIT , \
}
#define DMA0_CH2_CONFIG \
{ \
.id = 0, \
.ch = 2, \
.direction = DMA_MEMORY_TO_PERIPH, \
.transfer_mode = DMA_LLI_ONCE_MODE, \
.src_req = DMA_REQUEST_NONE, \
.dst_req = DMA_REQUEST_UART1_TX, \
.src_width = DMA_TRANSFER_WIDTH_8BIT, \
.dst_width = DMA_TRANSFER_WIDTH_8BIT, \
}
#endif
#endif
#if defined(BSP_USING_DMA0_CH3)
#ifndef DMA0_CH3_CONFIG
#define DMA0_CH3_CONFIG \
{ \
.id = 0, \
.ch = 3,\
.direction = DMA_MEMORY_TO_PERIPH, \
.transfer_mode = DMA_LLI_ONCE_MODE, \
.src_req = DMA_REQUEST_NONE, \
.dst_req = DMA_REQUEST_SPI0_TX, \
.src_width = DMA_TRANSFER_WIDTH_8BIT , \
.dst_width = DMA_TRANSFER_WIDTH_8BIT , \
}
#define DMA0_CH3_CONFIG \
{ \
.id = 0, \
.ch = 3, \
.direction = DMA_MEMORY_TO_PERIPH, \
.transfer_mode = DMA_LLI_ONCE_MODE, \
.src_req = DMA_REQUEST_NONE, \
.dst_req = DMA_REQUEST_SPI0_TX, \
.src_width = DMA_TRANSFER_WIDTH_8BIT, \
.dst_width = DMA_TRANSFER_WIDTH_8BIT, \
}
#endif
#endif
#if defined(BSP_USING_DMA0_CH4)
#ifndef DMA0_CH4_CONFIG
#define DMA0_CH4_CONFIG \
{ \
.id = 0, \
.ch = 4,\
.direction = DMA_PERIPH_TO_MEMORY, \
.transfer_mode = DMA_LLI_ONCE_MODE, \
.src_req = DMA_REQUEST_SPI0_RX, \
.dst_req = DMA_REQUEST_NONE, \
.src_width = DMA_TRANSFER_WIDTH_8BIT , \
.dst_width = DMA_TRANSFER_WIDTH_8BIT , \
}
#define DMA0_CH4_CONFIG \
{ \
.id = 0, \
.ch = 4, \
.direction = DMA_PERIPH_TO_MEMORY, \
.transfer_mode = DMA_LLI_ONCE_MODE, \
.src_req = DMA_REQUEST_SPI0_RX, \
.dst_req = DMA_REQUEST_NONE, \
.src_width = DMA_TRANSFER_WIDTH_8BIT, \
.dst_width = DMA_TRANSFER_WIDTH_8BIT, \
}
#endif
#endif
#if defined(BSP_USING_DMA0_CH5)
#ifndef DMA0_CH5_CONFIG
#define DMA0_CH5_CONFIG \
{ \
.id = 0, \
.ch = 5,\
.direction = DMA_MEMORY_TO_PERIPH, \
.transfer_mode = DMA_LLI_CYCLE_MODE, \
.src_req = DMA_REQUEST_NONE, \
.dst_req = DMA_REQUEST_I2S_TX, \
.src_width = DMA_TRANSFER_WIDTH_16BIT , \
.dst_width = DMA_TRANSFER_WIDTH_16BIT , \
}
#define DMA0_CH5_CONFIG \
{ \
.id = 0, \
.ch = 5, \
.direction = DMA_MEMORY_TO_PERIPH, \
.transfer_mode = DMA_LLI_CYCLE_MODE, \
.src_req = DMA_REQUEST_NONE, \
.dst_req = DMA_REQUEST_I2S_TX, \
.src_width = DMA_TRANSFER_WIDTH_16BIT, \
.dst_width = DMA_TRANSFER_WIDTH_16BIT, \
}
#endif
#endif
#if defined(BSP_USING_DMA0_CH6)
#ifndef DMA0_CH6_CONFIG
#define DMA0_CH6_CONFIG \
{ \
.id = 0, \
.ch = 6,\
.direction = DMA_MEMORY_TO_PERIPH, \
.transfer_mode = DMA_LLI_CYCLE_MODE, \
.src_req = DMA_REQUEST_NONE, \
.dst_req = DMA_REQUEST_I2S_TX, \
.src_width = DMA_TRANSFER_WIDTH_16BIT , \
.dst_width = DMA_TRANSFER_WIDTH_16BIT , \
}
#define DMA0_CH6_CONFIG \
{ \
.id = 0, \
.ch = 6, \
.direction = DMA_MEMORY_TO_PERIPH, \
.transfer_mode = DMA_LLI_CYCLE_MODE, \
.src_req = DMA_REQUEST_NONE, \
.dst_req = DMA_REQUEST_I2S_TX, \
.src_width = DMA_TRANSFER_WIDTH_16BIT, \
.dst_width = DMA_TRANSFER_WIDTH_16BIT, \
}
#endif
#endif
#if defined(BSP_USING_DMA0_CH7)
#ifndef DMA0_CH7_CONFIG
#define DMA0_CH7_CONFIG \
{ \
.id = 0, \
.ch = 0,\
.direction = DMA_MEMORY_TO_MEMORY,\
.transfer_mode = DMA_LLI_ONCE_MODE, \
.src_req = DMA_REQUEST_NONE, \
.dst_req = DMA_REQUEST_NONE, \
.src_width = DMA_TRANSFER_WIDTH_32BIT , \
.dst_width = DMA_TRANSFER_WIDTH_32BIT , \
}
#define DMA0_CH7_CONFIG \
{ \
.id = 0, \
.ch = 0, \
.direction = DMA_MEMORY_TO_MEMORY, \
.transfer_mode = DMA_LLI_ONCE_MODE, \
.src_req = DMA_REQUEST_NONE, \
.dst_req = DMA_REQUEST_NONE, \
.src_width = DMA_TRANSFER_WIDTH_32BIT, \
.dst_width = DMA_TRANSFER_WIDTH_32BIT, \
}
#endif
#endif
#if defined(BSP_USING_I2C0)
#ifndef I2C0_CONFIG
#define I2C0_CONFIG \
{ \
.id = 0, \
.mode = I2C_HW_MODE,\
.phase = 15, \
}
#define I2C0_CONFIG \
{ \
.id = 0, \
.mode = I2C_HW_MODE, \
.phase = 15, \
}
#endif
#endif
#if defined (BSP_USING_TIMER_CH0)
#if defined(BSP_USING_TIMER_CH0)
#ifndef TIMER_CH0_CONFIG
#define TIMER_CH0_CONFIG \
{ \
.id = 0, \
.ch = 0, \
.cnt_mode = TIMER_CNT_PRELOAD, \
.pl_trig_src = TIMER_PL_TRIG_COMP0, \
}
#define TIMER_CH0_CONFIG \
{ \
.id = 0, \
.ch = 0, \
.cnt_mode = TIMER_CNT_PRELOAD, \
.pl_trig_src = TIMER_PL_TRIG_COMP0, \
}
#endif
#endif
#if defined (BSP_USING_TIMER_CH1)
#if defined(BSP_USING_TIMER_CH1)
#ifndef TIMER_CH1_CONFIG
#define TIMER_CH1_CONFIG \
{ \
.id = 0, \
.ch = 1, \
.cnt_mode = TIMER_CNT_PRELOAD, \
.pl_trig_src = TIMER_PL_TRIG_COMP2, \
}
#define TIMER_CH1_CONFIG \
{ \
.id = 0, \
.ch = 1, \
.cnt_mode = TIMER_CNT_PRELOAD, \
.pl_trig_src = TIMER_PL_TRIG_COMP2, \
}
#endif
#endif

22
bsp/board/bl706_iot/pinmux_config.h
View file

@ -1,24 +1,24 @@
/**
* @file pinmux_config.h
* @brief
*
* @brief
*
* Copyright (c) 2021 Bouffalolab team
*
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
*
* http://www.apache.org/licenses/LICENSE-2.0
*
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
*
*/
#ifndef _PINMUX_CONFIG_H
#define _PINMUX_CONFIG_H
@ -39,7 +39,7 @@
// <q> GPIO3 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_UART0_RX//GPIO_FUN_UART1_RX//GPIO_FUN_QDEC]
// <i> config gpio3 function
#define CONFIG_GPIO3_FUNC GPIO_FUN_UNUSED
#define CONFIG_GPIO3_FUNC GPIO_FUN_PWM
// <q> GPIO4 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_QDEC]
// <i> config gpio4 function
@ -67,15 +67,15 @@
// <q> GPIO10 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_ANALOG//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_QDEC]
// <i> config gpio10 function
#define CONFIG_GPIO10_FUNC GPIO_FUN_UNUSED
#define CONFIG_GPIO10_FUNC GPIO_FUN_PWM
// <q> GPIO11 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_ANALOG//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_QDEC]
// <i> config gpio11 function
#define CONFIG_GPIO11_FUNC GPIO_FUN_ADC
#define CONFIG_GPIO11_FUNC GPIO_FUN_PWM
// <q> GPIO12 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_ANALOG//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_QDEC]
// <i> config gpio12 function
#define CONFIG_GPIO12_FUNC GPIO_FUN_ADC
#define CONFIG_GPIO12_FUNC GPIO_FUN_PWM
// <q> GPIO13 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_QDEC]
// <i> config gpio13 function
@ -115,7 +115,7 @@
// <q> GPIO22 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_ANALOG//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC]
// <i> config gpio22 function
#define CONFIG_GPIO22_FUNC GPIO_FUN_PWM
#define CONFIG_GPIO22_FUNC GPIO_FUN_UNUSED
// <q> GPIO23 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_ANALOG//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_QDEC]
// <i> config gpio23 function

12
bsp/board/bl706_lp/bl702_config.h
View file

@ -1,24 +1,24 @@
/**
* @file bl702_config.h
* @brief
*
* @brief
*
* Copyright (c) 2021 Bouffalolab team
*
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
*
* http://www.apache.org/licenses/LICENSE-2.0
*
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
*
*/
#ifndef __BL702_CONFIG_H__

300
bsp/board/bl706_lp/board.c
View file

@ -1,24 +1,24 @@
/**
* @file board.c
* @brief
*
* @brief
*
* Copyright (c) 2021 Bouffalolab team
*
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
*
* http://www.apache.org/licenses/LICENSE-2.0
*
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
*
*/
#include "hal_gpio.h"
@ -26,166 +26,88 @@
#include "bl702_glb.h"
#include "pinmux_config.h"
struct pin_mux_cfg
{
struct pin_mux_cfg {
uint8_t pin;
uint16_t func;
};
static const struct pin_mux_cfg af_pin_table[] =
{
{
.pin = GPIO_PIN_0,
.func = CONFIG_GPIO0_FUNC
},
{
.pin = GPIO_PIN_1,
.func = CONFIG_GPIO1_FUNC
},
{
.pin = GPIO_PIN_2,
.func = CONFIG_GPIO2_FUNC
},
{
.pin = GPIO_PIN_3,
.func = CONFIG_GPIO3_FUNC
},
{
.pin = GPIO_PIN_4,
.func = CONFIG_GPIO4_FUNC
},
{
.pin = GPIO_PIN_5,
.func = CONFIG_GPIO5_FUNC
},
{
.pin = GPIO_PIN_6,
.func = CONFIG_GPIO6_FUNC
},
{
.pin = GPIO_PIN_7,
.func = CONFIG_GPIO7_FUNC
},
{
.pin = GPIO_PIN_8,
.func = CONFIG_GPIO8_FUNC
},
{
.pin = GPIO_PIN_9,
.func = CONFIG_GPIO9_FUNC
},
{
.pin = GPIO_PIN_10,
.func = CONFIG_GPIO10_FUNC
},
{
.pin = GPIO_PIN_11,
.func = CONFIG_GPIO11_FUNC
},
{
.pin = GPIO_PIN_12,
.func = CONFIG_GPIO12_FUNC
},
{
.pin = GPIO_PIN_13,
.func = CONFIG_GPIO13_FUNC
},
{
.pin = GPIO_PIN_14,
.func = CONFIG_GPIO14_FUNC
},
{
.pin = GPIO_PIN_15,
.func = CONFIG_GPIO15_FUNC
},
{
.pin = GPIO_PIN_16,
.func = CONFIG_GPIO16_FUNC
},
{
.pin = GPIO_PIN_17,
.func = CONFIG_GPIO17_FUNC
},
{
.pin = GPIO_PIN_18,
.func = CONFIG_GPIO18_FUNC
},
{
.pin = GPIO_PIN_19,
.func = CONFIG_GPIO19_FUNC
},
{
.pin = GPIO_PIN_20,
.func = CONFIG_GPIO20_FUNC
},
{
.pin = GPIO_PIN_21,
.func = CONFIG_GPIO21_FUNC
},
{
.pin = GPIO_PIN_22,
.func = CONFIG_GPIO22_FUNC
},
{
.pin = GPIO_PIN_23,
.func = CONFIG_GPIO23_FUNC
},
{
.pin = GPIO_PIN_24,
.func = CONFIG_GPIO24_FUNC
},
{
.pin = GPIO_PIN_25,
.func = CONFIG_GPIO25_FUNC
},
{
.pin = GPIO_PIN_26,
.func = CONFIG_GPIO26_FUNC
},
{
.pin = GPIO_PIN_27,
.func = CONFIG_GPIO27_FUNC
},
{
.pin = GPIO_PIN_28,
.func = CONFIG_GPIO28_FUNC
},
{
.pin = GPIO_PIN_29,
.func = CONFIG_GPIO29_FUNC
},
{
.pin = GPIO_PIN_30,
.func = CONFIG_GPIO30_FUNC
},
{
.pin = GPIO_PIN_31,
.func = CONFIG_GPIO31_FUNC
},
{
.pin = GPIO_PIN_32,
.func = CONFIG_GPIO32_FUNC
},
{
.pin = GPIO_PIN_33,
.func = CONFIG_GPIO33_FUNC
},
{
.pin = GPIO_PIN_34,
.func = CONFIG_GPIO34_FUNC
},
{
.pin = GPIO_PIN_35,
.func = CONFIG_GPIO35_FUNC
},
{
.pin = GPIO_PIN_36,
.func = CONFIG_GPIO36_FUNC
},
{
.pin = GPIO_PIN_37,
.func = CONFIG_GPIO37_FUNC
}
static const struct pin_mux_cfg af_pin_table[] = {
{ .pin = GPIO_PIN_0,
.func = CONFIG_GPIO0_FUNC },
{ .pin = GPIO_PIN_1,
.func = CONFIG_GPIO1_FUNC },
{ .pin = GPIO_PIN_2,
.func = CONFIG_GPIO2_FUNC },
{ .pin = GPIO_PIN_3,
.func = CONFIG_GPIO3_FUNC },
{ .pin = GPIO_PIN_4,
.func = CONFIG_GPIO4_FUNC },
{ .pin = GPIO_PIN_5,
.func = CONFIG_GPIO5_FUNC },
{ .pin = GPIO_PIN_6,
.func = CONFIG_GPIO6_FUNC },
{ .pin = GPIO_PIN_7,
.func = CONFIG_GPIO7_FUNC },
{ .pin = GPIO_PIN_8,
.func = CONFIG_GPIO8_FUNC },
{ .pin = GPIO_PIN_9,
.func = CONFIG_GPIO9_FUNC },
{ .pin = GPIO_PIN_10,
.func = CONFIG_GPIO10_FUNC },
{ .pin = GPIO_PIN_11,
.func = CONFIG_GPIO11_FUNC },
{ .pin = GPIO_PIN_12,
.func = CONFIG_GPIO12_FUNC },
{ .pin = GPIO_PIN_13,
.func = CONFIG_GPIO13_FUNC },
{ .pin = GPIO_PIN_14,
.func = CONFIG_GPIO14_FUNC },
{ .pin = GPIO_PIN_15,
.func = CONFIG_GPIO15_FUNC },
{ .pin = GPIO_PIN_16,
.func = CONFIG_GPIO16_FUNC },
{ .pin = GPIO_PIN_17,
.func = CONFIG_GPIO17_FUNC },
{ .pin = GPIO_PIN_18,
.func = CONFIG_GPIO18_FUNC },
{ .pin = GPIO_PIN_19,
.func = CONFIG_GPIO19_FUNC },
{ .pin = GPIO_PIN_20,
.func = CONFIG_GPIO20_FUNC },
{ .pin = GPIO_PIN_21,
.func = CONFIG_GPIO21_FUNC },
{ .pin = GPIO_PIN_22,
.func = CONFIG_GPIO22_FUNC },
{ .pin = GPIO_PIN_23,
.func = CONFIG_GPIO23_FUNC },
{ .pin = GPIO_PIN_24,
.func = CONFIG_GPIO24_FUNC },
{ .pin = GPIO_PIN_25,
.func = CONFIG_GPIO25_FUNC },
{ .pin = GPIO_PIN_26,
.func = CONFIG_GPIO26_FUNC },
{ .pin = GPIO_PIN_27,
.func = CONFIG_GPIO27_FUNC },
{ .pin = GPIO_PIN_28,
.func = CONFIG_GPIO28_FUNC },
{ .pin = GPIO_PIN_29,
.func = CONFIG_GPIO29_FUNC },
{ .pin = GPIO_PIN_30,
.func = CONFIG_GPIO30_FUNC },
{ .pin = GPIO_PIN_31,
.func = CONFIG_GPIO31_FUNC },
{ .pin = GPIO_PIN_32,
.func = CONFIG_GPIO32_FUNC },
{ .pin = GPIO_PIN_33,
.func = CONFIG_GPIO33_FUNC },
{ .pin = GPIO_PIN_34,
.func = CONFIG_GPIO34_FUNC },
{ .pin = GPIO_PIN_35,
.func = CONFIG_GPIO35_FUNC },
{ .pin = GPIO_PIN_36,
.func = CONFIG_GPIO36_FUNC },
{ .pin = GPIO_PIN_37,
.func = CONFIG_GPIO37_FUNC }
};
@ -196,43 +118,32 @@ static void board_pin_mux_init(void)
gpio_cfg.drive = 0;
gpio_cfg.smtCtrl = 1;
for (int i = 0; i < sizeof(af_pin_table)/sizeof(af_pin_table[0]); i++)
{
for (int i = 0; i < sizeof(af_pin_table) / sizeof(af_pin_table[0]); i++) {
gpio_cfg.gpioMode = GPIO_MODE_AF;
gpio_cfg.pullType = GPIO_PULL_UP;
gpio_cfg.gpioPin = af_pin_table[i].pin;
gpio_cfg.gpioFun = af_pin_table[i].func;
gpio_cfg.gpioPin = af_pin_table[i].pin;
gpio_cfg.gpioFun = af_pin_table[i].func;
if(af_pin_table[i].func == GPIO_FUN_UNUSED)
{
if (af_pin_table[i].func == GPIO_FUN_UNUSED) {
continue;
}
else if(af_pin_table[i].func == GPIO_FUN_PWM)
{
} else if (af_pin_table[i].func == GPIO_FUN_PWM) {
gpio_cfg.pullType = GPIO_PULL_DOWN;
}
else if((af_pin_table[i].func == GPIO_FUN_DAC)|| (af_pin_table[i].func == GPIO_FUN_ADC))
{
gpio_cfg.gpioFun = GPIO_FUN_ANALOG;
} else if ((af_pin_table[i].func == GPIO_FUN_DAC) || (af_pin_table[i].func == GPIO_FUN_ADC)) {
gpio_cfg.gpioFun = GPIO_FUN_ANALOG;
gpio_cfg.gpioMode = GPIO_MODE_ANALOG;
}
else if((af_pin_table[i].func & 0x70) == 0x70)
{
} else if ((af_pin_table[i].func & 0x70) == 0x70) {
gpio_cfg.gpioFun = GPIO_FUN_UART;
uint8_t sig = af_pin_table[i].func & 0x07;
if (gpio_cfg.gpioPin > 31)
{
GLB_UART_Fun_Sel(((gpio_cfg.gpioPin-9) % 8), sig);
}
else
{
if (gpio_cfg.gpioPin > 31) {
GLB_UART_Fun_Sel(((gpio_cfg.gpioPin - 9) % 8), sig);
} else {
GLB_UART_Fun_Sel((gpio_cfg.gpioPin % 8), sig);
}
}
GLB_GPIO_Init(&gpio_cfg);
}
}
static void board_clock_init(void)
@ -243,6 +154,7 @@ static void board_clock_init(void)
void bl_show_info(void)
{
MSG("\r\n");
MSG(" ____ __ __ _ _ _ \r\n");
MSG(" | _ \\ / _|/ _| | | | | | | \r\n");
MSG(" | |_) | ___ _ _| |_| |_ __ _| | ___ | | __ _| |__ \r\n");
@ -250,17 +162,17 @@ void bl_show_info(void)
MSG(" | |_) | (_) | |_| | | | || (_| | | (_) | | (_| | |_) |\r\n");
MSG(" |____/ \\___/ \\__,_|_| |_| \\__,_|_|\\___/|_|\\__,_|_.__/ \r\n");
MSG("\r\n");
MSG("Build:%s,%s\r\n",__TIME__,__DATE__);
MSG("Build:%s,%s\r\n", __TIME__, __DATE__);
MSG("Copyright (c) 2021 Bouffalolab team\r\n");
#if 0
MSG("root clock:%dM\r\n",system_clock_get(SYSTEM_CLOCK_ROOT_CLOCK)/1000000);
MSG("fclk clock:%dM\r\n",system_clock_get(SYSTEM_CLOCK_FCLK)/1000000);
MSG("bclk clock:%dM\r\n",system_clock_get(SYSTEM_CLOCK_BCLK)/1000000);
#if 0
MSG("root clock:%dM\r\n", system_clock_get(SYSTEM_CLOCK_ROOT_CLOCK) / 1000000);
MSG("fclk clock:%dM\r\n", system_clock_get(SYSTEM_CLOCK_FCLK) / 1000000);
MSG("bclk clock:%dM\r\n", system_clock_get(SYSTEM_CLOCK_BCLK) / 1000000);
MSG("uart clock:%dM\r\n",peripheral_clock_get(PERIPHERAL_CLOCK_UART)/1000000);
MSG("spi clock:%dM\r\n",peripheral_clock_get(PERIPHERAL_CLOCK_SPI)/1000000);
MSG("i2c clock:%dM\r\n",peripheral_clock_get(PERIPHERAL_CLOCK_I2C)/1000000);
MSG("uart clock:%dM\r\n", peripheral_clock_get(PERIPHERAL_CLOCK_UART) / 1000000);
MSG("spi clock:%dM\r\n", peripheral_clock_get(PERIPHERAL_CLOCK_SPI) / 1000000);
MSG("i2c clock:%dM\r\n", peripheral_clock_get(PERIPHERAL_CLOCK_I2C) / 1000000);
#endif
}

54
bsp/board/bl706_lp/clock_config.h
View file

@ -1,64 +1,68 @@
/**
* @file clock_config.h
* @brief
*
* @brief
*
* Copyright (c) 2021 Bouffalolab team
*
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
*
* http://www.apache.org/licenses/LICENSE-2.0
*
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
*
*/
#ifndef _CLOCK_CONFIG_H
#define _CLOCK_CONFIG_H
#define BSP_ROOT_CLOCK_SOURCE ROOT_CLOCK_SOURCE_XTAL_32M
#define BSP_ROOT_CLOCK_SOURCE ROOT_CLOCK_SOURCE_XTAL_32M
// #define BSP_AUDIO_PLL_CLOCK_SOURCE AUDIO_PLL_CLOCK_24000000_HZ
#if defined(BSP_ROOT_CLOCK_SOURCE)
#define BSP_HCLK_DIV 0
#define BSP_BCLK_DIV 1
#define BSP_HCLK_DIV 0
#define BSP_BCLK_DIV 1
#endif
#if defined(BSP_USING_UART0)||defined(BSP_USING_UART1)
#define BSP_UART_CLOCK_SOURCE ROOT_CLOCK_SOURCE_PLL_96M
#define BSP_UART_CLOCK_DIV 0
#endif
#if defined(BSP_USING_UART0) || defined(BSP_USING_UART1)
#define BSP_UART_CLOCK_SOURCE ROOT_CLOCK_SOURCE_PLL_96M
#define BSP_UART_CLOCK_DIV 0
#endif
#if defined(BSP_USING_I2C0)
#define BSP_I2C_CLOCK_SOURCE ROOT_CLOCK_SOURCE_BCLK
#define BSP_I2C_CLOCK_DIV 0
#define BSP_I2C_CLOCK_SOURCE ROOT_CLOCK_SOURCE_BCLK
#define BSP_I2C_CLOCK_DIV 0
#endif
#if defined(BSP_USING_SPI0)
#define BSP_SPI_CLOCK_SOURCE ROOT_CLOCK_SOURCE_BCLK
#define BSP_SPI_CLOCK_DIV 0
#define BSP_SPI_CLOCK_SOURCE ROOT_CLOCK_SOURCE_BCLK
#define BSP_SPI_CLOCK_DIV 0
#endif
#if defined(BSP_USING_PWM_CH0) || defined(BSP_USING_PWM_CH1) || defined(BSP_USING_PWM_CH2) || defined(BSP_USING_PWM_CH3) || defined(BSP_USING_PWM_CH4) || defined(BSP_USING_PWM_CH5)
#define BSP_PWM_CLOCK_SOURCE ROOT_CLOCK_SOURCE_XCLK
#define BSP_PWM_CLOCK_DIV 0
#endif
#if defined(BSP_USING_IR)
#define BSP_IR_CLOCK_SOURCE ROOT_CLOCK_SOURCE_XCLK
#define BSP_IR_CLOCK_DIV 0
#define BSP_IR_CLOCK_SOURCE ROOT_CLOCK_SOURCE_XCLK
#define BSP_IR_CLOCK_DIV 0
#endif
#if defined(BSP_USING_I2S0)
#define BSP_I2S_CLOCK_SOURCE ROOT_CLOCK_SOURCE_XCLK
#define BSP_I2S_CLOCK_DIV 0
#define BSP_I2S_CLOCK_SOURCE ROOT_CLOCK_SOURCE_XCLK
#define BSP_I2S_CLOCK_DIV 0
#endif
#if defined(BSP_USING_ADC0)
#define BSP_ADC_CLOCK_SOURCE ROOT_CLOCK_SOURCE_XCLK
#define BSP_ADC_CLOCK_DIV 0
#define BSP_ADC_CLOCK_SOURCE ROOT_CLOCK_SOURCE_XCLK
#define BSP_ADC_CLOCK_DIV 0
#endif
#if defined(BSP_USING_DAC0)
#define BSP_DAC_CLOCK_SOURCE ROOT_CLOCK_SOURCE_AUPLL
#define BSP_DAC_CLOCK_DIV 1
#define BSP_DAC_CLOCK_SOURCE ROOT_CLOCK_SOURCE_AUPLL
#define BSP_DAC_CLOCK_DIV 1
#endif
#endif

415
bsp/board/bl706_lp/peripheral_config.h
View file

@ -1,24 +1,24 @@
/**
* @file peripheral_config.h
* @brief
*
* @brief
*
* Copyright (c) 2021 Bouffalolab team
*
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
*
* http://www.apache.org/licenses/LICENSE-2.0
*
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
*
*/
#ifndef _PERIPHERAL_CONFIG_H_
@ -33,8 +33,12 @@
#define BSP_USING_I2C0
#define BSP_USING_I2S0
#define BSP_USING_USB
#define BSP_USING_PWM_CH0
#define BSP_USING_PWM_CH1
#define BSP_USING_PWM_CH2
#define BSP_USING_PWM_CH3
#define BSP_USING_TIMER_CH0
#define BSP_USING_TIMER_CH1
/* ----------------------*/
/* PERIPHERAL With DMA LIST */
@ -48,272 +52,309 @@
#define BSP_USING_DMA0_CH6
#define BSP_USING_DMA0_CH7
/* PERIPHERAL CONFIG */
#if defined(BSP_USING_ADC0)
#ifndef ADC0_CONFIG
#define ADC0_CONFIG \
{ \
.clk_div = ADC_CLOCK_DIV_32,\
.vref = ADC_VREF_3P2V,\
.continuous_conv_mode = DISABLE,\
.differential_mode = DISABLE,\
.data_width = ADC_DATA_WIDTH_16B_WITH_256_AVERAGE,\
.fifo_threshold = ADC_FIFO_THRESHOLD_1BYTE,\
.gain = ADC_GAIN_1\
}
#define ADC0_CONFIG \
{ \
.clk_div = ADC_CLOCK_DIV_32, \
.vref = ADC_VREF_3P2V, \
.continuous_conv_mode = DISABLE, \
.differential_mode = DISABLE, \
.data_width = ADC_DATA_WIDTH_16B_WITH_256_AVERAGE, \
.fifo_threshold = ADC_FIFO_THRESHOLD_1BYTE, \
.gain = ADC_GAIN_1 \
}
#endif
#endif
#if defined(BSP_USING_DAC0)
#ifndef DAC_CONFIG
#define DAC_CONFIG \
{ \
.clk = DAC_CLK_500KHZ,\
.pin.dac0 = GLB_GPIO_PIN_11,\
.pin.pin_num = 1,\
}
#define DAC_CONFIG \
{ \
.clk = DAC_CLK_500KHZ, \
.pin.dac0 = GLB_GPIO_PIN_11, \
.pin.pin_num = 1, \
}
#endif
#endif
#if defined(BSP_USING_UART0)
#ifndef UART0_CONFIG
#define UART0_CONFIG \
{ \
.id = 0, \
.baudrate = 2000000,\
.databits = UART_DATA_LEN_8, \
.stopbits = UART_STOP_ONE, \
.parity = UART_PAR_NONE, \
.fifo_threshold = 1, \
}
#define UART0_CONFIG \
{ \
.id = 0, \
.baudrate = 2000000, \
.databits = UART_DATA_LEN_8, \
.stopbits = UART_STOP_ONE, \
.parity = UART_PAR_NONE, \
.fifo_threshold = 1, \
}
#endif
#endif
#if defined(BSP_USING_UART1)
#ifndef UART1_CONFIG
#define UART1_CONFIG \
{ \
.id = 1, \
.baudrate = 2000000,\
.databits = UART_DATA_LEN_8, \
.stopbits = UART_STOP_ONE, \
.parity = UART_PAR_NONE, \
.fifo_threshold = 64, \
}
#ifndef UART1_CONFIG
#define UART1_CONFIG \
{ \
.id = 1, \
.baudrate = 2000000, \
.databits = UART_DATA_LEN_8, \
.stopbits = UART_STOP_ONE, \
.parity = UART_PAR_NONE, \
.fifo_threshold = 64, \
}
#endif
#endif
#if defined(BSP_USING_SPI0)
#ifndef SPI0_CONFIG
#define SPI0_CONFIG \
{ \
.id = 0, \
.clk = 18000000,\
.mode = SPI_MASTER_MODE, \
.direction = SPI_MSB_BYTE0_DIRECTION_FIRST, \
.clk_polaraity = SPI_POLARITY_LOW, \
.clk_phase = SPI_PHASE_1EDGE, \
.datasize = SPI_DATASIZE_8BIT, \
.fifo_threshold = 1, \
}
#define SPI0_CONFIG \
{ \
.id = 0, \
.clk = 18000000, \
.mode = SPI_MASTER_MODE, \
.direction = SPI_MSB_BYTE0_DIRECTION_FIRST, \
.clk_polaraity = SPI_POLARITY_LOW, \
.clk_phase = SPI_PHASE_1EDGE, \
.datasize = SPI_DATASIZE_8BIT, \
.fifo_threshold = 1, \
}
#endif
#endif
#if defined(BSP_USING_PWM_CH0)
#ifndef PWM_CH0_CONFIG
#define PWM_CH0_CONFIG \
{ \
.ch = 0, \
.polarity_invert_mode = DISABLE, \
.period = 0, \
.threshold_low = 0, \
.threshold_high = 0, \
.it_pulse_count = 0, \
}
#endif
#endif
#if defined(BSP_USING_PWM_CH1)
#ifndef PWM_CH1_CONFIG
#define PWM_CH1_CONFIG \
{ \
.ch = 1, \
.polarity_invert_mode = DISABLE, \
.period = 0, \
.threshold_low = 0, \
.threshold_high = 0, \
.it_pulse_count = 0, \
}
#endif
#endif
#if defined(BSP_USING_PWM_CH2)
#ifndef PWM_CH2_CONFIG
#define PWM_CH2_CONFIG \
{ \
.ch = 2, \
.frequency = 1000000, \
.dutycycle = 0, \
.it_pulse_count = 0,\
}
#define PWM_CH2_CONFIG \
{ \
.ch = 2, \
.polarity_invert_mode = DISABLE, \
.period = 0, \
.threshold_low = 0, \
.threshold_high = 0, \
.it_pulse_count = 0, \
}
#endif
#endif
#if defined(BSP_USING_PWM_CH3)
#ifndef PWM_CH3_CONFIG
#define PWM_CH3_CONFIG \
{ \
.ch = 3, \
.polarity_invert_mode = DISABLE, \
.period = 0, \
.threshold_low = 0, \
.threshold_high = 0, \
.it_pulse_count = 0, \
}
#endif
#endif
#if defined(BSP_USING_I2S0)
#ifndef I2S0_CONFIG
#define I2S0_CONFIG \
{ \
.id = 0, \
.iis_mode = I2S_MODE_MASTER,\
.interface_mode = I2S_MODE_LEFT, \
.sampl_freq_hz = 16*1000, \
.channel_num = I2S_FS_CHANNELS_NUM_MONO, \
.frame_size = I2S_FRAME_LEN_16, \
.data_size = I2S_DATA_LEN_16, \
.fifo_threshold = 8, \
}
#define I2S0_CONFIG \
{ \
.id = 0, \
.iis_mode = I2S_MODE_MASTER, \
.interface_mode = I2S_MODE_LEFT, \
.sampl_freq_hz = 16 * 1000, \
.channel_num = I2S_FS_CHANNELS_NUM_MONO, \
.frame_size = I2S_FRAME_LEN_16, \
.data_size = I2S_DATA_LEN_16, \
.fifo_threshold = 8, \
}
#endif
#endif
#if defined(BSP_USING_DMA0_CH0)
#ifndef DMA0_CH0_CONFIG
#define DMA0_CH0_CONFIG \
{ \
.id = 0, \
.ch = 0,\
.direction = DMA_MEMORY_TO_MEMORY,\
.transfer_mode = DMA_LLI_ONCE_MODE, \
.src_req = DMA_REQUEST_NONE, \
.dst_req = DMA_REQUEST_NONE, \
.src_width = DMA_TRANSFER_WIDTH_32BIT , \
.dst_width = DMA_TRANSFER_WIDTH_32BIT , \
}
#define DMA0_CH0_CONFIG \
{ \
.id = 0, \
.ch = 0, \
.direction = DMA_MEMORY_TO_MEMORY, \
.transfer_mode = DMA_LLI_ONCE_MODE, \
.src_req = DMA_REQUEST_NONE, \
.dst_req = DMA_REQUEST_NONE, \
.src_width = DMA_TRANSFER_WIDTH_32BIT, \
.dst_width = DMA_TRANSFER_WIDTH_32BIT, \
}
#endif
#endif
#if defined(BSP_USING_DMA0_CH1)
#ifndef DMA0_CH1_CONFIG
#define DMA0_CH1_CONFIG \
{ \
.id = 0, \
.ch = 1,\
.direction = DMA_MEMORY_TO_MEMORY, \
.transfer_mode = DMA_LLI_ONCE_MODE, \
.src_req = DMA_REQUEST_NONE, \
.dst_req = DMA_REQUEST_NONE, \
.src_width = DMA_TRANSFER_WIDTH_16BIT , \
.dst_width = DMA_TRANSFER_WIDTH_16BIT , \
}
#define DMA0_CH1_CONFIG \
{ \
.id = 0, \
.ch = 1, \
.direction = DMA_MEMORY_TO_MEMORY, \
.transfer_mode = DMA_LLI_ONCE_MODE, \
.src_req = DMA_REQUEST_NONE, \
.dst_req = DMA_REQUEST_NONE, \
.src_width = DMA_TRANSFER_WIDTH_16BIT, \
.dst_width = DMA_TRANSFER_WIDTH_16BIT, \
}
#endif
#endif
#if defined(BSP_USING_DMA0_CH2)
#ifndef DMA0_CH2_CONFIG
#define DMA0_CH2_CONFIG \
{ \
.id = 0, \
.ch = 2,\
.direction = DMA_MEMORY_TO_PERIPH, \
.transfer_mode = DMA_LLI_ONCE_MODE, \
.src_req = DMA_REQUEST_NONE, \
.dst_req = DMA_REQUEST_UART1_TX, \
.src_width = DMA_TRANSFER_WIDTH_8BIT , \
.dst_width = DMA_TRANSFER_WIDTH_8BIT , \
}
#define DMA0_CH2_CONFIG \
{ \
.id = 0, \
.ch = 2, \
.direction = DMA_MEMORY_TO_PERIPH, \
.transfer_mode = DMA_LLI_ONCE_MODE, \
.src_req = DMA_REQUEST_NONE, \
.dst_req = DMA_REQUEST_UART1_TX, \
.src_width = DMA_TRANSFER_WIDTH_8BIT, \
.dst_width = DMA_TRANSFER_WIDTH_8BIT, \
}
#endif
#endif
#if defined(BSP_USING_DMA0_CH3)
#ifndef DMA0_CH3_CONFIG
#define DMA0_CH3_CONFIG \
{ \
.id = 0, \
.ch = 3,\
.direction = DMA_MEMORY_TO_PERIPH, \
.transfer_mode = DMA_LLI_ONCE_MODE, \
.src_req = DMA_REQUEST_NONE, \
.dst_req = DMA_REQUEST_SPI0_TX, \
.src_width = DMA_TRANSFER_WIDTH_8BIT , \
.dst_width = DMA_TRANSFER_WIDTH_8BIT , \
}
#define DMA0_CH3_CONFIG \
{ \
.id = 0, \
.ch = 3, \
.direction = DMA_MEMORY_TO_PERIPH, \
.transfer_mode = DMA_LLI_ONCE_MODE, \
.src_req = DMA_REQUEST_NONE, \
.dst_req = DMA_REQUEST_SPI0_TX, \
.src_width = DMA_TRANSFER_WIDTH_8BIT, \
.dst_width = DMA_TRANSFER_WIDTH_8BIT, \
}
#endif
#endif
#if defined(BSP_USING_DMA0_CH4)
#ifndef DMA0_CH4_CONFIG
#define DMA0_CH4_CONFIG \
{ \
.id = 0, \
.ch = 4,\
.direction = DMA_PERIPH_TO_MEMORY, \
.transfer_mode = DMA_LLI_ONCE_MODE, \
.src_req = DMA_REQUEST_SPI0_RX, \
.dst_req = DMA_REQUEST_NONE, \
.src_width = DMA_TRANSFER_WIDTH_8BIT , \
.dst_width = DMA_TRANSFER_WIDTH_8BIT , \
}
#define DMA0_CH4_CONFIG \
{ \
.id = 0, \
.ch = 4, \
.direction = DMA_PERIPH_TO_MEMORY, \
.transfer_mode = DMA_LLI_ONCE_MODE, \
.src_req = DMA_REQUEST_SPI0_RX, \
.dst_req = DMA_REQUEST_NONE, \
.src_width = DMA_TRANSFER_WIDTH_8BIT, \
.dst_width = DMA_TRANSFER_WIDTH_8BIT, \
}
#endif
#endif
#if defined(BSP_USING_DMA0_CH5)
#ifndef DMA0_CH5_CONFIG
#define DMA0_CH5_CONFIG \
{ \
.id = 0, \
.ch = 5,\
.direction = DMA_MEMORY_TO_PERIPH, \
.transfer_mode = DMA_LLI_CYCLE_MODE, \
.src_req = DMA_REQUEST_NONE, \
.dst_req = DMA_REQUEST_I2S_TX, \
.src_width = DMA_TRANSFER_WIDTH_16BIT , \
.dst_width = DMA_TRANSFER_WIDTH_16BIT , \
}
#define DMA0_CH5_CONFIG \
{ \
.id = 0, \
.ch = 5, \
.direction = DMA_MEMORY_TO_PERIPH, \
.transfer_mode = DMA_LLI_CYCLE_MODE, \
.src_req = DMA_REQUEST_NONE, \
.dst_req = DMA_REQUEST_I2S_TX, \
.src_width = DMA_TRANSFER_WIDTH_16BIT, \
.dst_width = DMA_TRANSFER_WIDTH_16BIT, \
}
#endif
#endif
#if defined(BSP_USING_DMA0_CH6)
#ifndef DMA0_CH6_CONFIG
#define DMA0_CH6_CONFIG \
{ \
.id = 0, \
.ch = 6,\
.direction = DMA_MEMORY_TO_PERIPH, \
.transfer_mode = DMA_LLI_CYCLE_MODE, \
.src_req = DMA_REQUEST_NONE, \
.dst_req = DMA_REQUEST_I2S_TX, \
.src_width = DMA_TRANSFER_WIDTH_16BIT , \
.dst_width = DMA_TRANSFER_WIDTH_16BIT , \
}
#define DMA0_CH6_CONFIG \
{ \
.id = 0, \
.ch = 6, \
.direction = DMA_MEMORY_TO_PERIPH, \
.transfer_mode = DMA_LLI_CYCLE_MODE, \
.src_req = DMA_REQUEST_NONE, \
.dst_req = DMA_REQUEST_I2S_TX, \
.src_width = DMA_TRANSFER_WIDTH_16BIT, \
.dst_width = DMA_TRANSFER_WIDTH_16BIT, \
}
#endif
#endif
#if defined(BSP_USING_DMA0_CH7)
#ifndef DMA0_CH7_CONFIG
#define DMA0_CH7_CONFIG \
{ \
.id = 0, \
.ch = 0,\
.direction = DMA_MEMORY_TO_MEMORY,\
.transfer_mode = DMA_LLI_ONCE_MODE, \
.src_req = DMA_REQUEST_NONE, \
.dst_req = DMA_REQUEST_NONE, \
.src_width = DMA_TRANSFER_WIDTH_32BIT , \
.dst_width = DMA_TRANSFER_WIDTH_32BIT , \
}
#define DMA0_CH7_CONFIG \
{ \
.id = 0, \
.ch = 0, \
.direction = DMA_MEMORY_TO_MEMORY, \
.transfer_mode = DMA_LLI_ONCE_MODE, \
.src_req = DMA_REQUEST_NONE, \
.dst_req = DMA_REQUEST_NONE, \
.src_width = DMA_TRANSFER_WIDTH_32BIT, \
.dst_width = DMA_TRANSFER_WIDTH_32BIT, \
}
#endif
#endif
#if defined(BSP_USING_I2C0)
#ifndef I2C0_CONFIG
#define I2C0_CONFIG \
{ \
.id = 0, \
.mode = I2C_HW_MODE,\
.phase = 15, \
}
#define I2C0_CONFIG \
{ \
.id = 0, \
.mode = I2C_HW_MODE, \
.phase = 15, \
}
#endif
#endif
#if defined (BSP_USING_TIMER_CH0)
#if defined(BSP_USING_TIMER_CH0)
#ifndef TIMER_CH0_CONFIG
#define TIMER_CH0_CONFIG \
{ \
.id = 0, \
.ch = 0, \
.cnt_mode = TIMER_CNT_PRELOAD, \
.pl_trig_src = TIMER_PL_TRIG_COMP0, \
}
#define TIMER_CH0_CONFIG \
{ \
.id = 0, \
.ch = 0, \
.cnt_mode = TIMER_CNT_PRELOAD, \
.pl_trig_src = TIMER_PL_TRIG_COMP0, \
}
#endif
#endif
#if defined (BSP_USING_TIMER_CH1)
#if defined(BSP_USING_TIMER_CH1)
#ifndef TIMER_CH1_CONFIG
#define TIMER_CH1_CONFIG \
{ \
.id = 0, \
.ch = 1, \
.cnt_mode = TIMER_CNT_PRELOAD, \
.pl_trig_src = TIMER_PL_TRIG_COMP0, \
}
#define TIMER_CH1_CONFIG \
{ \
.id = 0, \
.ch = 1, \
.cnt_mode = TIMER_CNT_PRELOAD, \
.pl_trig_src = TIMER_PL_TRIG_COMP2, \
}
#endif
#endif

12
bsp/board/bl706_lp/pinmux_config.h
View file

@ -1,24 +1,24 @@
/**
* @file pinmux_config.h
* @brief
*
* @brief
*
* Copyright (c) 2021 Bouffalolab team
*
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
*
* http://www.apache.org/licenses/LICENSE-2.0
*
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
*
*/
#ifndef _PINMUX_CONFIG_H
#define _PINMUX_CONFIG_H

343
bsp/bsp_common/es8388/bsp_es8388.c
View file

@ -1,24 +1,24 @@
/**
* @file bsp_es8388.c
* @brief
*
* @brief
*
* Copyright (c) 2021 Bouffalolab team
*
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
*
* http://www.apache.org/licenses/LICENSE-2.0
*
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
*
*/
#include "bflb_platform.h"
@ -37,7 +37,7 @@
* @{
*/
#define ES8388_I2C_SLAVE_ADDR 0x10
#define ES8388_I2C_SLAVE_ADDR 0x10
/*@} end of group ES8388_Private_Macros */
@ -77,7 +77,7 @@
struct device *es8388_i2c = NULL;
/****************************************************************************//**
/****************************************************************************/ /**
* @brief ES8388 write register
*
* @param addr: Register address
@ -97,10 +97,9 @@ BL_Err_Type ES8388_Write_Reg(uint8_t addr, uint8_t data)
msg1.subaddr = addr;
bflb_platform_delay_ms(10);
return i2c_transfer(es8388_i2c, &msg1, 1);
}
/****************************************************************************//**
/****************************************************************************/ /**
* @brief ES8388_Read_Reg
*
* @param addr: Register address
@ -109,19 +108,18 @@ BL_Err_Type ES8388_Write_Reg(uint8_t addr, uint8_t data)
* @return None
*
*******************************************************************************/
BL_Err_Type ES8388_Read_Reg(uint8_t addr, uint8_t* rdata)
BL_Err_Type ES8388_Read_Reg(uint8_t addr, uint8_t *rdata)
{
i2c_msg_t msg1;
i2c_msg_t msg1;
msg1.len = 1,
msg1.buf = rdata;
msg1.subaddr = addr;
msg1.slaveaddr = ES8388_I2C_SLAVE_ADDR,
msg1.flags = SUB_ADDR_1BYTE | I2C_RD;
return i2c_transfer(es8388_i2c, &msg1, 1);
}
/****************************************************************************//**
/****************************************************************************/ /**
* @brief ES8388 codec mode
*
* @param cfg: None
@ -129,111 +127,110 @@ BL_Err_Type ES8388_Read_Reg(uint8_t addr, uint8_t* rdata)
* @return None
*
*******************************************************************************/
void ES8388_Codec_Mode(ES8388_Cfg_Type * cfg){
void ES8388_Codec_Mode(ES8388_Cfg_Type *cfg)
{
uint8_t tempVal = 0;
ES8388_Write_Reg(0x01,0x58);//power down whole chip analog
ES8388_Write_Reg(0x01,0x50);//power up whole chip analog
ES8388_Write_Reg(0x01, 0x58); //power down whole chip analog
ES8388_Write_Reg(0x01, 0x50); //power up whole chip analog
ES8388_Write_Reg(0x02,0xf3);//power down ADC/DAC and reset ADC/DAC state machine
ES8388_Write_Reg(0x02,0xf0);//power on ADC/DAC
ES8388_Write_Reg(0x02, 0xf3); //power down ADC/DAC and reset ADC/DAC state machine
ES8388_Write_Reg(0x02, 0xf0); //power on ADC/DAC
ES8388_Write_Reg(0x2B,0x80);//set internal ADC and DAC use sanme LRCK clock
ES8388_Write_Reg(0x2B, 0x80); //set internal ADC and DAC use sanme LRCK clock
ES8388_Write_Reg(0x00,0x36);//ADC clock is same as DAC . DACMCLK is the chip master clock source
ES8388_Write_Reg(0x00, 0x36); //ADC clock is same as DAC . DACMCLK is the chip master clock source
if(cfg->role == ES8388_MASTER){
ES8388_Write_Reg(0x08,0x80);
}else{
ES8388_Write_Reg(0x08,0x00);
if (cfg->role == ES8388_MASTER) {
ES8388_Write_Reg(0x08, 0x80);
} else {
ES8388_Write_Reg(0x08, 0x00);
}
ES8388_Write_Reg(0x04,0x00);//power up dac
ES8388_Write_Reg(0x04, 0x00); //power up dac
ES8388_Write_Reg(0x05,0x00);//stop lowpower mode
ES8388_Write_Reg(0x06,0xc3);//stop lowpower mode
ES8388_Write_Reg(0x05, 0x00); //stop lowpower mode
ES8388_Write_Reg(0x06, 0xc3); //stop lowpower mode
if(cfg->mic_input_mode == ES8388_SINGLE_ENDED_MIC){
/*
if (cfg->mic_input_mode == ES8388_SINGLE_ENDED_MIC) {
/*
* default set LINPUT1 and RINPUT1 as single ended mic input
* if user want to use LINPUT2 and RINPUT2 as input
* please set 0x0a register as 0x50
*/
ES8388_Write_Reg(0x0A,0x00);//select lin1 and rin1 as micphone input
}else{
ES8388_Write_Reg(0x0A, 0x00); //select lin1 and rin1 as micphone input
} else {
/*
* defualt select LIN1 and RIN1 as Mic diff input
* if user want to use LIN2 and RIN2 as input
* please set 0x0b register as 0x82
*/
ES8388_Write_Reg(0x0A,0xf0);//set micphone input as difference mode
ES8388_Write_Reg(0x0B,0x02);//set LIN1 and RIN1 as micphone different input
ES8388_Write_Reg(0x0A, 0xf0); //set micphone input as difference mode
ES8388_Write_Reg(0x0B, 0x02); //set LIN1 and RIN1 as micphone different input
}
tempVal = cfg->data_width;
tempVal <<= 2;
tempVal |= cfg->i2s_frame;
ES8388_Write_Reg(0x0C,tempVal); //ADC I2S Format sel as i2s_frame , data len as data_width
ES8388_Write_Reg(0x0C, tempVal); //ADC I2S Format sel as i2s_frame , data len as data_width
tempVal = cfg->data_width;
tempVal <<= 2;
tempVal |= cfg->i2s_frame;
tempVal <<= 1;
ES8388_Write_Reg(0x17,tempVal); //DAC I2S Format sel as i2s_frame , data len as data_width
ES8388_Write_Reg(0x17, tempVal); //DAC I2S Format sel as i2s_frame , data len as data_width
/* when work in master mode , BCLK is devided form MCLK
/* when work in master mode , BCLK is devided form MCLK
* default divider is 256 , see datasheet reigster 13
*/
if(cfg->role == ES8388_MASTER){
ES8388_Write_Reg(0x0d,0x02);//ADCLRCK = MCLK/256
ES8388_Write_Reg(0x18,0x02);//DACLRCK = MCLK/256
*/
if (cfg->role == ES8388_MASTER) {
ES8388_Write_Reg(0x0d, 0x02); //ADCLRCK = MCLK/256
ES8388_Write_Reg(0x18, 0x02); //DACLRCK = MCLK/256
}
/*set ADC/DAC default volume as 0 db */
ES8388_Write_Reg(0x10,0x00);//LADC volume as 0db
ES8388_Write_Reg(0x11,0x00);//RADC volume as 0db
ES8388_Write_Reg(0x1A,0x00);//LDAC volume as 0db
ES8388_Write_Reg(0x1B,0x00);//RDAC volume as 0db
ES8388_Write_Reg(0x10, 0x00); //LADC volume as 0db
ES8388_Write_Reg(0x11, 0x00); //RADC volume as 0db
ES8388_Write_Reg(0x1A, 0x00); //LDAC volume as 0db
ES8388_Write_Reg(0x1B, 0x00); //RDAC volume as 0db
tempVal = cfg->mic_pga;
tempVal <<=4 ;
tempVal <<= 4;
tempVal |= cfg->mic_pga;
ES8388_Write_Reg(0x09,tempVal);//set ADC PGA as mic pga
/*ADC ALC default Setting */
ES8388_Write_Reg(0x12,0xE2);
ES8388_Write_Reg(0x13,0xC0);
ES8388_Write_Reg(0x14,0x12);
ES8388_Write_Reg(0x15,0x06);
ES8388_Write_Reg(0x16,0xC3);
/*Mixer setting for LDAC to LOUT and RDAC TO ROUT
ES8388_Write_Reg(0x09, tempVal); //set ADC PGA as mic pga
/*ADC ALC default Setting */
ES8388_Write_Reg(0x12, 0xE2);
ES8388_Write_Reg(0x13, 0xC0);
ES8388_Write_Reg(0x14, 0x12);
ES8388_Write_Reg(0x15, 0x06);
ES8388_Write_Reg(0x16, 0xC3);
/*Mixer setting for LDAC to LOUT and RDAC TO ROUT
* default close mixer
*/
ES8388_Write_Reg(0x27,0xB8);
ES8388_Write_Reg(0x2A,0xB8);
ES8388_Write_Reg(0x27, 0xB8);
ES8388_Write_Reg(0x2A, 0xB8);
ES8388_Write_Reg(0x02,0x00);//startup FSM and DLL
ES8388_Write_Reg(0x02, 0x00); //startup FSM and DLL
bflb_platform_delay_ms(500);
/* set LOUT1 ROUT1 LOUT2 ROUT2 volume */
ES8388_Write_Reg(0x2e,0x1E);
ES8388_Write_Reg(0x2f,0x1E);
ES8388_Write_Reg(0x30,0x1E);
ES8388_Write_Reg(0x31,0x1E);
ES8388_Write_Reg(0x2e, 0x1E);
ES8388_Write_Reg(0x2f, 0x1E);
ES8388_Write_Reg(0x30, 0x1E);
ES8388_Write_Reg(0x31, 0x1E);
//ES8388_Write_Reg(0x04,0x3C);//enable LOUT & ROUT
ES8388_Write_Reg(0x04,0x24);
ES8388_Write_Reg(0x26,0x01);
ES8388_Write_Reg(0x03,0x09);//power up ADC Enable LIN &RIN.
ES8388_Write_Reg(0x04, 0x24);
ES8388_Write_Reg(0x26, 0x01);
ES8388_Write_Reg(0x03, 0x09); //power up ADC Enable LIN &RIN.
}
/****************************************************************************//**
/****************************************************************************/ /**
* @brief ES8388 recording mode
*
* @param cfg: None
@ -241,38 +238,39 @@ void ES8388_Codec_Mode(ES8388_Cfg_Type * cfg){
* @return None
*
*******************************************************************************/
void ES8388_Recording_Mode(ES8388_Cfg_Type * cfg){
void ES8388_Recording_Mode(ES8388_Cfg_Type *cfg)
{
uint8_t tempVal = 0;
MSG("RECORDING\r\n");
ES8388_Write_Reg(0x01,0x58);//power down whole chip analog
ES8388_Write_Reg(0x01,0x50);//power up whole chip analog
ES8388_Write_Reg(0x01, 0x58); //power down whole chip analog
ES8388_Write_Reg(0x01, 0x50); //power up whole chip analog
ES8388_Write_Reg(0x02,0xf3);//power down ADC/DAC and reset ADC/DAC state machine
ES8388_Write_Reg(0x02,0xf0);//power on ADC/DAC
ES8388_Write_Reg(0x2B,0x80);//set internal ADC and DAC use the same LRCK clock
ES8388_Write_Reg(0x00,0x16);//ADC clock is same as DAC. use ADC MCLK as internal MCLK
ES8388_Write_Reg(0x02, 0xf3); //power down ADC/DAC and reset ADC/DAC state machine
ES8388_Write_Reg(0x02, 0xf0); //power on ADC/DAC
ES8388_Write_Reg(0x2B, 0x80); //set internal ADC and DAC use the same LRCK clock
ES8388_Write_Reg(0x00, 0x16); //ADC clock is same as DAC. use ADC MCLK as internal MCLK
if(cfg->role == ES8388_MASTER){
ES8388_Write_Reg(0x08,0x80);
}else{
ES8388_Write_Reg(0x08,0x00);
if (cfg->role == ES8388_MASTER) {
ES8388_Write_Reg(0x08, 0x80);
} else {
ES8388_Write_Reg(0x08, 0x00);
}
ES8388_Write_Reg(0x04,0xc0);
ES8388_Write_Reg(0x05,0x00);
ES8388_Write_Reg(0x06,0xc3);
ES8388_Write_Reg(0x04, 0xc0);
ES8388_Write_Reg(0x05, 0x00);
ES8388_Write_Reg(0x06, 0xc3);
if(cfg->mic_input_mode == ES8388_SINGLE_ENDED_MIC){
/*
if (cfg->mic_input_mode == ES8388_SINGLE_ENDED_MIC) {
/*
* default set LINPUT1 and RINPUT1 as single ended mic input
* if user want to use LINPUT2 and RINPUT2 as input
* please set 0x0a register as 0x50
*/
//ES8388_Write_Reg(0x0A,0x00);//select lin1 and rin1 as micphone input
ES8388_Write_Reg(0x0A,0xf8);
ES8388_Write_Reg(0x0B,0x88); //analog mono mix to left ADC
ES8388_Write_Reg(0x0A, 0xf8);
ES8388_Write_Reg(0x0B, 0x88); //analog mono mix to left ADC
//ES8388_Write_Reg(0x0B,0x90); //analog mono mix to right ADC
}else{
} else {
/*
* defualt select LIN1 and RIN1 as Mic diff input
* if user want to use LIN2 and RIN2 as input
@ -280,40 +278,39 @@ void ES8388_Recording_Mode(ES8388_Cfg_Type * cfg){
*/
//ES8388_Write_Reg(0x0A,0xf0);//set micphone input as difference mode
//ES8388_Write_Reg(0x0B,0x02);//set LIN1 and RIN1 as micphone different input
ES8388_Write_Reg(0x0A,0xf8); // Fixed stereo problems
ES8388_Write_Reg(0x0B,0x82); // stereo
ES8388_Write_Reg(0x0A, 0xf8); // Fixed stereo problems
ES8388_Write_Reg(0x0B, 0x82); // stereo
}
tempVal = cfg->data_width;
tempVal <<= 2;
tempVal |= cfg->i2s_frame;
ES8388_Write_Reg(0x0C,tempVal); //ADC I2S Format sel as i2s_frame , data len as data_width
ES8388_Write_Reg(0x0C, tempVal); //ADC I2S Format sel as i2s_frame , data len as data_width
ES8388_Write_Reg(0x0d,0x02);//ADC LRCK = MCLK/256
ES8388_Write_Reg(0x0d, 0x02); //ADC LRCK = MCLK/256
ES8388_Write_Reg(0x10,0x00);//ADC VOLUME = 0 DB
ES8388_Write_Reg(0x11,0x00);//set ADC VOLUME as 0 DB
ES8388_Write_Reg(0x10, 0x00); //ADC VOLUME = 0 DB
ES8388_Write_Reg(0x11, 0x00); //set ADC VOLUME as 0 DB
tempVal = cfg->mic_pga;
tempVal <<= 4;
tempVal |= cfg->mic_pga;
ES8388_Write_Reg(0x09,tempVal);//MIC PGA SEL
ES8388_Write_Reg(0x09, tempVal); //MIC PGA SEL
ES8388_Write_Reg(0x12,0xe2);//MIC ALC SETTING
ES8388_Write_Reg(0x13,0xc0);
ES8388_Write_Reg(0x14,0x12);
ES8388_Write_Reg(0x15,0x06);
ES8388_Write_Reg(0x16,0xc3);
ES8388_Write_Reg(0x12, 0xe2); //MIC ALC SETTING
ES8388_Write_Reg(0x02,0x55); //startup FSM and DLL
ES8388_Write_Reg(0x03,0x09); //power up adc , enable LIN and RIN
ES8388_Write_Reg(0x13, 0xc0);
ES8388_Write_Reg(0x14, 0x12);
ES8388_Write_Reg(0x15, 0x06);
ES8388_Write_Reg(0x16, 0xc3);
ES8388_Write_Reg(0x02, 0x55); //startup FSM and DLL
ES8388_Write_Reg(0x03, 0x09); //power up adc , enable LIN and RIN
}
/****************************************************************************//**
/****************************************************************************/ /**
* @brief ES8388 Playback mode
*
* @param cfg: None
@ -321,70 +318,69 @@ void ES8388_Recording_Mode(ES8388_Cfg_Type * cfg){
* @return None
*
*******************************************************************************/
void ES8388_Playback_Mode(ES8388_Cfg_Type * cfg){
void ES8388_Playback_Mode(ES8388_Cfg_Type *cfg)
{
uint8_t tempVal = 0;
ES8388_Write_Reg(0x00,0x80); //Reset control port register to default
ES8388_Write_Reg(0x00,0x06); //Close reset
ES8388_Write_Reg(0x00, 0x80); //Reset control port register to default
ES8388_Write_Reg(0x00, 0x06); //Close reset
bflb_platform_delay_ms(10);
ES8388_Write_Reg(0x02,0xF3); //Stop STM, DLL and digital block
if(cfg->role == ES8388_MASTER){
ES8388_Write_Reg(0x08,0x80);
}else{
ES8388_Write_Reg(0x08,0x00);
ES8388_Write_Reg(0x02, 0xF3); //Stop STM, DLL and digital block
if (cfg->role == ES8388_MASTER) {
ES8388_Write_Reg(0x08, 0x80);
} else {
ES8388_Write_Reg(0x08, 0x00);
}
ES8388_Write_Reg(0x2B,0x80); //Set ADC and DAC have the same LRCK
ES8388_Write_Reg(0x00,0x05); //Start up reference
ES8388_Write_Reg(0x01,0x40); //Start up reference
ES8388_Write_Reg(0x2B, 0x80); //Set ADC and DAC have the same LRCK
ES8388_Write_Reg(0x00, 0x05); //Start up reference
ES8388_Write_Reg(0x01, 0x40); //Start up reference
bflb_platform_delay_ms(30);
ES8388_Write_Reg(0x03,0x00); //Power on ADC and LIN/RIN input
ES8388_Write_Reg(0x04,0x3F); //Power on DAC and LOUT/ROUT input
ES8388_Write_Reg(0x03, 0x00); //Power on ADC and LIN/RIN input
ES8388_Write_Reg(0x04, 0x3F); //Power on DAC and LOUT/ROUT input
/* Set ADC */
ES8388_Write_Reg(0x09,0x77); //MicBoost PGA = +21dB
ES8388_Write_Reg(0x0A,0xF0); //Differential input
ES8388_Write_Reg(0x0B,0x02); //Select LIN1 and RIN1 as differential input pairs
ES8388_Write_Reg(0x09, 0x77); //MicBoost PGA = +21dB
ES8388_Write_Reg(0x0A, 0xF0); //Differential input
ES8388_Write_Reg(0x0B, 0x02); //Select LIN1 and RIN1 as differential input pairs
tempVal = cfg->data_width;
tempVal <<= 2;
tempVal |= cfg->i2s_frame;
ES8388_Write_Reg(0x0C,tempVal); //ADC I2S Format sel as i2s_frame , data len as data_width
ES8388_Write_Reg(0x0C, tempVal); //ADC I2S Format sel as i2s_frame , data len as data_width
ES8388_Write_Reg(0x0D,0x04); //MCLK / LRCK = 512
ES8388_Write_Reg(0x10,0x00); //LADC volume = 0dB
ES8388_Write_Reg(0x11,0x00); //RADC volume = 0dB
ES8388_Write_Reg(0x12,0xE2); //ALC enable, PGA Max.Gain = 23.5dB, Min.Gain = 0dB
ES8388_Write_Reg(0x13,0xC0); //ALC target = -4.5dB, ALC hold time = 0 ms
ES8388_Write_Reg(0x14,0x12); //Decay time = 820us, attack time = 416us
ES8388_Write_Reg(0x15,0x06); //ALC mode
ES8388_Write_Reg(0x16,0xC3); //Nose gate =-40.5dB, NGG = 0x01(mute ADC)
ES8388_Write_Reg(0x0D, 0x04); //MCLK / LRCK = 512
ES8388_Write_Reg(0x10, 0x00); //LADC volume = 0dB
ES8388_Write_Reg(0x11, 0x00); //RADC volume = 0dB
ES8388_Write_Reg(0x12, 0xE2); //ALC enable, PGA Max.Gain = 23.5dB, Min.Gain = 0dB
ES8388_Write_Reg(0x13, 0xC0); //ALC target = -4.5dB, ALC hold time = 0 ms
ES8388_Write_Reg(0x14, 0x12); //Decay time = 820us, attack time = 416us
ES8388_Write_Reg(0x15, 0x06); //ALC mode
ES8388_Write_Reg(0x16, 0xC3); //Nose gate =-40.5dB, NGG = 0x01(mute ADC)
tempVal = cfg->data_width;
tempVal <<= 2;
tempVal |= cfg->i2s_frame;
tempVal <<= 1;
ES8388_Write_Reg(0x18,0x04); //MCLK / LRCK = 512
ES8388_Write_Reg(0x1A,0x00); //LDAC volume = 0dB
ES8388_Write_Reg(0x1B,0x00); //RDAC volume = 0dB
ES8388_Write_Reg(0x26,0x00); //Setup mixer
ES8388_Write_Reg(0x27,0xB8); //Setup mixer
ES8388_Write_Reg(0x28,0x38); //Setup mixer
ES8388_Write_Reg(0x29,0x38); //Setup mixer
ES8388_Write_Reg(0x2A,0xB8); //Setup mixer
ES8388_Write_Reg(0x2E,0x1E); //Set Lout/Rout volume:0dB
ES8388_Write_Reg(0x2F,0x1E); //Set Lout/Rout volume:0dB
ES8388_Write_Reg(0x30,0x1E); //Set Lout/Rout volume:0dB
ES8388_Write_Reg(0x31,0x1E); //Set Lout/Rout volume:0dB
ES8388_Write_Reg(0x02,0x00); //Power up DEM and STM
ES8388_Write_Reg(0x18, 0x04); //MCLK / LRCK = 512
ES8388_Write_Reg(0x1A, 0x00); //LDAC volume = 0dB
ES8388_Write_Reg(0x1B, 0x00); //RDAC volume = 0dB
ES8388_Write_Reg(0x26, 0x00); //Setup mixer
ES8388_Write_Reg(0x27, 0xB8); //Setup mixer
ES8388_Write_Reg(0x28, 0x38); //Setup mixer
ES8388_Write_Reg(0x29, 0x38); //Setup mixer
ES8388_Write_Reg(0x2A, 0xB8); //Setup mixer
ES8388_Write_Reg(0x2E, 0x1E); //Set Lout/Rout volume:0dB
ES8388_Write_Reg(0x2F, 0x1E); //Set Lout/Rout volume:0dB
ES8388_Write_Reg(0x30, 0x1E); //Set Lout/Rout volume:0dB
ES8388_Write_Reg(0x31, 0x1E); //Set Lout/Rout volume:0dB
ES8388_Write_Reg(0x02, 0x00); //Power up DEM and STM
}
/****************************************************************************//**
/****************************************************************************/ /**
* @brief ES8388_I2C_Init
*
* @param None
@ -395,10 +391,13 @@ void ES8388_Playback_Mode(ES8388_Cfg_Type * cfg){
int ES8388_Set_Voice_Volume(int volume)
{
int res;
if (volume < 0)
if (volume < 0) {
volume = 0;
else if (volume > 100)
} else if (volume > 100) {
volume = 100;
}
volume /= 3;
res = ES8388_Write_Reg(0x2e, volume);
res |= ES8388_Write_Reg(0x2f, volume);
@ -407,8 +406,7 @@ int ES8388_Set_Voice_Volume(int volume)
return res;
}
/****************************************************************************//**
/****************************************************************************/ /**
* @brief ES8388_I2C_Init
*
* @param None
@ -420,13 +418,13 @@ void ES8388_I2C_Init(void)
{
i2c_register(I2C0_INDEX, "i2c", DEVICE_OFLAG_RDWR);
es8388_i2c = device_find("i2c");
if(es8388_i2c){
if (es8388_i2c) {
device_open(es8388_i2c, 0);
}
}
/****************************************************************************//**
/****************************************************************************/ /**
* @brief ES8388_Reg_Dump
*
* @param None
@ -440,21 +438,23 @@ BL_Err_Type ES8388_Reg_Dump(void)
uint8_t tmp;
for (i = 0; i < 0X3F; i++) {
if(ES8388_Read_Reg(i,&tmp) != SUCCESS)
if (ES8388_Read_Reg(i, &tmp) != SUCCESS) {
bflb_platform_printf("iic read err\r\n");
bflb_platform_printf("Reg[%02x]=%02x \n", i,tmp);
}
bflb_platform_printf("Reg[%02x]=%02x \n", i, tmp);
}
return SUCCESS;
}
/*@} end of group ES8388_Private_Functions */
/** @defgroup ES8388_Public_Functions
* @{
*/
/****************************************************************************//**
/****************************************************************************/ /**
* @brief ES8388 Init function
*
* @param cfg: None
@ -462,17 +462,26 @@ BL_Err_Type ES8388_Reg_Dump(void)
* @return None
*
*******************************************************************************/
void ES8388_Init(ES8388_Cfg_Type * cfg){
void ES8388_Init(ES8388_Cfg_Type *cfg)
{
ES8388_I2C_Init();
switch(cfg -> work_mode){
case ES8388_CODEC_MDOE: ES8388_Codec_Mode(cfg);break;
case ES8388_RECORDING_MODE:ES8388_Recording_Mode(cfg);break;
case ES8388_PLAY_BACK_MODE:ES8388_Playback_Mode(cfg);break;
default:break;
switch (cfg->work_mode) {
case ES8388_CODEC_MDOE:
ES8388_Codec_Mode(cfg);
break;
case ES8388_RECORDING_MODE:
ES8388_Recording_Mode(cfg);
break;
case ES8388_PLAY_BACK_MODE:
ES8388_Playback_Mode(cfg);
break;
default:
break;
}
}
/*@} end of group ES8388_Public_Functions */

147
bsp/bsp_common/es8388/bsp_es8388.h
View file

@ -1,24 +1,24 @@
/**
* @file bsp_es8388.h
* @brief
*
* @brief
*
* Copyright (c) 2021 Bouffalolab team
*
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
*
* http://www.apache.org/licenses/LICENSE-2.0
*
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
*
*/
#ifndef __ES8388_H__
@ -42,75 +42,76 @@
* @brief ES8388 Role Matser Or Slave
*/
typedef enum {
ES8388_MASTER, /*!< Master Mode */
ES8388_SLAVE, /*!< Slave Mode */
}ES8388_Role_Type;
ES8388_MASTER, /*!< Master Mode */
ES8388_SLAVE, /*!< Slave Mode */
} ES8388_Role_Type;
/**
* @brief ES8388 Work Mode
*/
typedef enum {
ES8388_CODEC_MDOE, /*!< ES8388 work at codec mode */
ES8388_RECORDING_MODE, /*!< ES8388 work at recording mode */
ES8388_PLAY_BACK_MODE, /*!< ES8388 work at paly back mode */
ES8388_BY_PASS_MODE, /*!< ES8388 work at by pass mode */
}ES8388_Work_Mode;
ES8388_CODEC_MDOE, /*!< ES8388 work at codec mode */
ES8388_RECORDING_MODE, /*!< ES8388 work at recording mode */
ES8388_PLAY_BACK_MODE, /*!< ES8388 work at paly back mode */
ES8388_BY_PASS_MODE, /*!< ES8388 work at by pass mode */
} ES8388_Work_Mode;
/**
* @brief ES8388 Microphone input type
*/
typedef enum {
ES8388_SINGLE_ENDED_MIC, /*!< Mic Single Input Mode */
ES8388_DIFF_ENDED_MIC, /*!< Mic Different Input Mode */
}ES8388_MIC_Input_Type;
ES8388_SINGLE_ENDED_MIC, /*!< Mic Single Input Mode */
ES8388_DIFF_ENDED_MIC, /*!< Mic Different Input Mode */
} ES8388_MIC_Input_Type;
/**
* @brief ES8388 Microphone pga sel type
*/
typedef enum {
ES8388_MIC_PGA_0DB, /*!< Mic PGA as 0db */
ES8388_MIC_PGA_3DB, /*!< Mic PGA as 3db */
ES8388_MIC_PGA_6DB, /*!< Mic PGA as 6db */
ES8388_MIC_PGA_9DB, /*!< Mic PGA as 9db */
ES8388_MIC_PGA_12DB, /*!< Mic PGA as 12db */
ES8388_MIC_PGA_15DB, /*!< Mic PGA as 15db */
ES8388_MIC_PGA_18DB, /*!< Mic PGA as 18db */
ES8388_MIC_PGA_21DB, /*!< Mic PGA as 21db */
ES8388_MIC_PGA_24DB, /*!< Mic PGA as 24db */
}ES8388_MIC_Input_PGA_Type;
ES8388_MIC_PGA_0DB, /*!< Mic PGA as 0db */
ES8388_MIC_PGA_3DB, /*!< Mic PGA as 3db */
ES8388_MIC_PGA_6DB, /*!< Mic PGA as 6db */
ES8388_MIC_PGA_9DB, /*!< Mic PGA as 9db */
ES8388_MIC_PGA_12DB, /*!< Mic PGA as 12db */
ES8388_MIC_PGA_15DB, /*!< Mic PGA as 15db */
ES8388_MIC_PGA_18DB, /*!< Mic PGA as 18db */
ES8388_MIC_PGA_21DB, /*!< Mic PGA as 21db */
ES8388_MIC_PGA_24DB, /*!< Mic PGA as 24db */
} ES8388_MIC_Input_PGA_Type;
/**
* @brief ES8388 I2S Frame Type
*/
typedef enum {
ES8388_STD_I2S_FRAME, /*!< Standard I2S Frame */
ES8388_LEFT_JUSTIFY_FRAME, /*!< Left Justify Frame */
ES8388_RIGHT_JUSTIFY_FRAME, /*!< Right Justify Frame */
ES8388_DSP_FRAME, /*!< DSP Frame */
}ES8388_I2S_Frame_Type;
ES8388_STD_I2S_FRAME, /*!< Standard I2S Frame */
ES8388_LEFT_JUSTIFY_FRAME, /*!< Left Justify Frame */
ES8388_RIGHT_JUSTIFY_FRAME, /*!< Right Justify Frame */
ES8388_DSP_FRAME, /*!< DSP Frame */
} ES8388_I2S_Frame_Type;
/**
* @brief ES8388 I2S Data Len Type
*/
typedef enum {
ES8388_DATA_LEN_24, /*!< I2S Auido Data Len 24 */
ES8388_DATA_LEN_20, /*!< I2S Auido Data Len 20 */
ES8388_DATA_LEN_18, /*!< I2S Auido Data Len 18 */
ES8388_DATA_LEN_16, /*!< I2S Auido Data Len 16 */
ES8388_DATA_LEN_32, /*!< I2S Auido Data Len 32 */
}ES8388_I2S_Data_Width;
ES8388_DATA_LEN_24, /*!< I2S Auido Data Len 24 */
ES8388_DATA_LEN_20, /*!< I2S Auido Data Len 20 */
ES8388_DATA_LEN_18, /*!< I2S Auido Data Len 18 */
ES8388_DATA_LEN_16, /*!< I2S Auido Data Len 16 */
ES8388_DATA_LEN_32, /*!< I2S Auido Data Len 32 */
} ES8388_I2S_Data_Width;
/**
* @brief ES8388_Cfg_Type
*/
typedef struct {
ES8388_Work_Mode work_mode; /*!< ES8388 work mode */
ES8388_Role_Type role; /*!< ES8388 role */
ES8388_MIC_Input_Type mic_input_mode; /*!< ES8388 mic input mode */
ES8388_MIC_Input_PGA_Type mic_pga; /*!< ES8388 mic PGA */
ES8388_I2S_Frame_Type i2s_frame; /*!< ES8388 I2S frame */
ES8388_I2S_Data_Width data_width; /*!< ES8388 I2S dataWitdh */
}ES8388_Cfg_Type;
typedef struct
{
ES8388_Work_Mode work_mode; /*!< ES8388 work mode */
ES8388_Role_Type role; /*!< ES8388 role */
ES8388_MIC_Input_Type mic_input_mode; /*!< ES8388 mic input mode */
ES8388_MIC_Input_PGA_Type mic_pga; /*!< ES8388 mic PGA */
ES8388_I2S_Frame_Type i2s_frame; /*!< ES8388 I2S frame */
ES8388_I2S_Data_Width data_width; /*!< ES8388 I2S dataWitdh */
} ES8388_Cfg_Type;
/*@} end of group ES8388_Public_Types */
@ -121,52 +122,52 @@ typedef struct {
/** @defgroup ES8388_ROLE_TYPE
* @{
*/
#define IS_ES8388_ROLE_TYPE(type) (((type) == ES8388_MASTER) || \
((type) == ES8388_SLAVE))
#define IS_ES8388_ROLE_TYPE(type) (((type) == ES8388_MASTER) || \
((type) == ES8388_SLAVE))
/** @defgroup ES8388_WORK_MODE
* @{
*/
#define IS_ES8388_WORK_MODE(type) (((type) == ES8388_CODEC_MDOE) || \
((type) == ES8388_RECORDING_MODE) || \
((type) == ES8388_PLAY_BACK_MODE) || \
((type) == ES8388_BY_PASS_MODE))
#define IS_ES8388_WORK_MODE(type) (((type) == ES8388_CODEC_MDOE) || \
((type) == ES8388_RECORDING_MODE) || \
((type) == ES8388_PLAY_BACK_MODE) || \
((type) == ES8388_BY_PASS_MODE))
/** @defgroup ES8388_MIC_INPUT_TYPE
* @{
*/
#define IS_ES8388_MIC_INPUT_TYPE(type) (((type) == ES8388_SINGLE_ENDED_MIC) || \
((type) == ES8388_DIFF_ENDED_MIC))
#define IS_ES8388_MIC_INPUT_TYPE(type) (((type) == ES8388_SINGLE_ENDED_MIC) || \
((type) == ES8388_DIFF_ENDED_MIC))
/** @defgroup ES8388_MIC_INPUT_PGA_TYPE
* @{
*/
#define IS_ES8388_MIC_INPUT_PGA_TYPE(type) (((type) == ES8388_MIC_PGA_0DB) || \
((type) == ES8388_MIC_PGA_3DB) || \
((type) == ES8388_MIC_PGA_6DB) || \
((type) == ES8388_MIC_PGA_9DB) || \
((type) == ES8388_MIC_PGA_12DB) || \
((type) == ES8388_MIC_PGA_15DB) || \
((type) == ES8388_MIC_PGA_18DB) || \
((type) == ES8388_MIC_PGA_21DB) || \
((type) == ES8388_MIC_PGA_24DB))
#define IS_ES8388_MIC_INPUT_PGA_TYPE(type) (((type) == ES8388_MIC_PGA_0DB) || \
((type) == ES8388_MIC_PGA_3DB) || \
((type) == ES8388_MIC_PGA_6DB) || \
((type) == ES8388_MIC_PGA_9DB) || \
((type) == ES8388_MIC_PGA_12DB) || \
((type) == ES8388_MIC_PGA_15DB) || \
((type) == ES8388_MIC_PGA_18DB) || \
((type) == ES8388_MIC_PGA_21DB) || \
((type) == ES8388_MIC_PGA_24DB))
/** @defgroup ES8388_I2S_FRAME_TYPE
* @{
*/
#define IS_ES8388_I2S_FRAME_TYPE(type) (((type) == ES8388_STD_I2S_FRAME) || \
((type) == ES8388_LEFT_JUSTIFY_FRAME) || \
((type) == ES8388_RIGHT_JUSTIFY_FRAME) || \
((type) == ES8388_DSP_FRAME))
#define IS_ES8388_I2S_FRAME_TYPE(type) (((type) == ES8388_STD_I2S_FRAME) || \
((type) == ES8388_LEFT_JUSTIFY_FRAME) || \
((type) == ES8388_RIGHT_JUSTIFY_FRAME) || \
((type) == ES8388_DSP_FRAME))
/** @defgroup ES8388_I2S_DATA_WIDTH
* @{
*/
#define IS_ES8388_I2S_DATA_WIDTH(type) (((type) == ES8388_DATA_LEN_24) || \
((type) == ES8388_DATA_LEN_20) || \
((type) == ES8388_DATA_LEN_18) || \
((type) == ES8388_DATA_LEN_16) || \
((type) == ES8388_DATA_LEN_32))
#define IS_ES8388_I2S_DATA_WIDTH(type) (((type) == ES8388_DATA_LEN_24) || \
((type) == ES8388_DATA_LEN_20) || \
((type) == ES8388_DATA_LEN_18) || \
((type) == ES8388_DATA_LEN_16) || \
((type) == ES8388_DATA_LEN_32))
/*@} end of group ES8388_Public_Constants */
@ -179,7 +180,7 @@ typedef struct {
/** @defgroup ES8388_Public_Functions
* @{
*/
void ES8388_Init(ES8388_Cfg_Type * cfg);
void ES8388_Init(ES8388_Cfg_Type *cfg);
BL_Err_Type ES8388_Reg_Dump(void);
int ES8388_Set_Voice_Volume(int volume);

139
bsp/bsp_common/fatfs/fatfs_sdio_sd.c
View file

@ -1,24 +1,24 @@
/**
* @file fatfs_sdio_sd.c
* @brief
*
* @brief
*
* Copyright (c) 2021 Bouffalolab team
*
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
*
* http://www.apache.org/licenses/LICENSE-2.0
*
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
*
*/
/*-----------------------------------------------------------------------*/
@ -30,8 +30,8 @@
/* storage control modules to the FatFs module with a defined API. */
/*-----------------------------------------------------------------------*/
#include "ff.h" /* Obtains integer types */
#include "diskio.h" /* Declarations of disk functions */
#include "ff.h" /* Obtains integer types */
#include "diskio.h" /* Declarations of disk functions */
#include "bsp_sdio_sdcard.h"
#include "bflb_platform.h"
@ -59,16 +59,17 @@ int RAM_disk_initialize()
int MMC_disk_initialize()
{
static uint8_t inited=0;
static uint8_t inited = 0;
if(inited==0){
if(SDH_Init(SDH_DATA_BUS_WIDTH_4BITS,&gSDCardInfo)==SD_OK){
inited=1;
if (inited == 0) {
if (SDH_Init(SDH_DATA_BUS_WIDTH_4BITS, &gSDCardInfo) == SD_OK) {
inited = 1;
return 0;
}else {
} else {
return -1;
}
}
return 0;
}
@ -77,84 +78,106 @@ int USB_disk_initialize()
return 0;
}
int RAM_disk_read(BYTE* buff, LBA_t sector, UINT count)
int RAM_disk_read(BYTE *buff, LBA_t sector, UINT count)
{
return 0;
}
int MMC_disk_read(BYTE* buff, LBA_t sector, UINT count)
int MMC_disk_read(BYTE *buff, LBA_t sector, UINT count)
{
if(SD_OK==SDH_ReadMultiBlocks(buff,sector,gSDCardInfo.blockSize,count)){
return 0;
}else {
return -1;
}
if (SD_OK == SDH_ReadMultiBlocks(buff, sector, gSDCardInfo.blockSize, count)) {
return 0;
} else {
return -1;
}
}
int USB_disk_read(BYTE* buff, LBA_t sector, UINT count)
int USB_disk_read(BYTE *buff, LBA_t sector, UINT count)
{
return 0;
}
int RAM_disk_write(const BYTE* buff, LBA_t sector, UINT count)
int RAM_disk_write(const BYTE *buff, LBA_t sector, UINT count)
{
return 0;
}
int MMC_disk_write(const BYTE* buff, LBA_t sector, UINT count)
int MMC_disk_write(const BYTE *buff, LBA_t sector, UINT count)
{
if(SD_OK==SDH_WriteMultiBlocks((uint8_t *)buff,sector,gSDCardInfo.blockSize,count)){
return 0;
}else {
return -1;
}
if (SD_OK == SDH_WriteMultiBlocks((uint8_t *)buff, sector, gSDCardInfo.blockSize, count)) {
return 0;
} else {
return -1;
}
}
int USB_disk_write(const BYTE* buff, LBA_t sector, UINT count)
int USB_disk_write(const BYTE *buff, LBA_t sector, UINT count)
{
return 0;
}
int RAM_disk_ioctl(BYTE cmd, void* buff)
int RAM_disk_ioctl(BYTE cmd, void *buff)
{
return 0;
}
int MMC_disk_ioctl(BYTE cmd, void* buff)
int MMC_disk_ioctl(BYTE cmd, void *buff)
{
switch (cmd)
{
// Get R/W sector size (WORD)
case GET_SECTOR_SIZE :
*(WORD * )buff = gSDCardInfo.blockSize;
break;
// Get erase block size in unit of sector (DWORD)
case GET_BLOCK_SIZE :
*(DWORD * )buff = 1;
break;
switch (cmd) {
// Get R/W sector size (WORD)
case GET_SECTOR_SIZE:
*(WORD *)buff = gSDCardInfo.blockSize;
break;
case GET_SECTOR_COUNT:
*(DWORD * )buff = gSDCardInfo.blockCount;
break;
case CTRL_SYNC :
break;
default:
break;
}
return 0;
// Get erase block size in unit of sector (DWORD)
case GET_BLOCK_SIZE:
*(DWORD *)buff = 1;
break;
case GET_SECTOR_COUNT:
*(DWORD *)buff = gSDCardInfo.blockCount;
break;
case CTRL_SYNC:
break;
default:
break;
}
return 0;
}
int USB_disk_ioctl(BYTE cmd, void* buff)
int USB_disk_ioctl(BYTE cmd, void *buff)
{
return 0;
}
DWORD get_fattime(void) {
return ((DWORD)(2015 - 1980) << 25) /* Year 2015 */
| ((DWORD)1 << 21) /* Month 1 */
| ((DWORD)1 << 16) /* Mday 1 */
| ((DWORD)0 << 11) /* Hour 0 */
| ((DWORD)0 << 5) /* Min 0 */
| ((DWORD)0 >> 1); /* Sec 0 */
DWORD get_fattime(void)
{
return ((DWORD)(2015 - 1980) << 25) /* Year 2015 */
| ((DWORD)1 << 21) /* Month 1 */
| ((DWORD)1 << 16) /* Mday 1 */
| ((DWORD)0 << 11) /* Hour 0 */
| ((DWORD)0 << 5) /* Min 0 */
| ((DWORD)0 >> 1); /* Sec 0 */
}
DSTATUS Translate_Result_Code(int result)
{
// MSG("%s\r\n",FR_Table[result]);
return result;
}
FATFS_DiskioDriverTypeDef pNewDiskioDriver;
void fatfs_sdio_driver_register(void)
{
pNewDiskioDriver.MMC_disk_status = MMC_disk_status;
pNewDiskioDriver.MMC_disk_initialize = MMC_disk_initialize;
pNewDiskioDriver.MMC_disk_write = MMC_disk_write;
pNewDiskioDriver.MMC_disk_read = MMC_disk_read;
pNewDiskioDriver.MMC_disk_ioctl = MMC_disk_ioctl;
pNewDiskioDriver.Translate_Result_Code = Translate_Result_Code;
disk_driver_callback_init(&pNewDiskioDriver);
}

106
bsp/bsp_common/fatfs/fatfs_spi_sd.c
View file

@ -1,52 +1,51 @@
/**
* @file fatfs_spi_sd.c
* @brief
*
* @brief
*
* Copyright (c) 2021 Bouffalolab team
*
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
*
* http://www.apache.org/licenses/LICENSE-2.0
*
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
*
*/
#include "diskio.h"
#include "bsp_spi_sd.h"
#include "string.h"
const char * FR_Table[]=
{
"FR_OK：成功", /* (0) Succeeded */
"FR_DISK_ERR：底层硬件错误", /* (1) A hard error occurred in the low level disk I/O layer */
"FR_INT_ERR：断言失败", /* (2) Assertion failed */
"FR_NOT_READY：物理驱动没有工作", /* (3) The physical drive cannot work */
"FR_NO_FILE：文件不存在", /* (4) Could not find the file */
"FR_NO_PATH：路径不存在", /* (5) Could not find the path */
"FR_INVALID_NAME：无效文件名", /* (6) The path name format is invalid */
"FR_DENIED：由于禁止访问或者目录已满访问被拒绝", /* (7) Access denied due to prohibited access or directory full */
"FR_EXIST：文件已经存在", /* (8) Access denied due to prohibited access */
"FR_INVALID_OBJECT：文件或者目录对象无效", /* (9) The file/directory object is invalid */
"FR_WRITE_PROTECTED：物理驱动被写保护", /* (10) The physical drive is write protected */
"FR_INVALID_DRIVE：逻辑驱动号无效", /* (11) The logical drive number is invalid */
"FR_NOT_ENABLED：卷中无工作区", /* (12) The volume has no work area */
"FR_NO_FILESYSTEM：没有有效的FAT卷", /* (13) There is no valid FAT volume */
"FR_MKFS_ABORTED：由于参数错误f_mkfs()被终止", /* (14) The f_mkfs() aborted due to any parameter error */
"FR_TIMEOUT：在规定的时间内无法获得访问卷的许可", /* (15) Could not get a grant to access the volume within defined period */
"FR_LOCKED：由于文件共享策略操作被拒绝", /* (16) The operation is rejected according to the file sharing policy */
"FR_NOT_ENOUGH_CORE：无法分配长文件名工作区", /* (17) LFN working buffer could not be allocated */
"FR_TOO_MANY_OPEN_FILES：当前打开的文件数大于_FS_SHARE", /* (18) Number of open files > _FS_SHARE */
"FR_INVALID_PARAMETER：参数无效" /* (19) Given parameter is invalid */
const char *FR_Table[] = {
"FR_OK：成功", /* (0) Succeeded */
"FR_DISK_ERR：底层硬件错误", /* (1) A hard error occurred in the low level disk I/O layer */
"FR_INT_ERR：断言失败", /* (2) Assertion failed */
"FR_NOT_READY：物理驱动没有工作", /* (3) The physical drive cannot work */
"FR_NO_FILE：文件不存在", /* (4) Could not find the file */
"FR_NO_PATH：路径不存在", /* (5) Could not find the path */
"FR_INVALID_NAME：无效文件名", /* (6) The path name format is invalid */
"FR_DENIED：由于禁止访问或者目录已满访问被拒绝", /* (7) Access denied due to prohibited access or directory full */
"FR_EXIST：文件已经存在", /* (8) Access denied due to prohibited access */
"FR_INVALID_OBJECT：文件或者目录对象无效", /* (9) The file/directory object is invalid */
"FR_WRITE_PROTECTED：物理驱动被写保护", /* (10) The physical drive is write protected */
"FR_INVALID_DRIVE：逻辑驱动号无效", /* (11) The logical drive number is invalid */
"FR_NOT_ENABLED：卷中无工作区", /* (12) The volume has no work area */
"FR_NO_FILESYSTEM：没有有效的FAT卷", /* (13) There is no valid FAT volume */
"FR_MKFS_ABORTED：由于参数错误f_mkfs()被终止", /* (14) The f_mkfs() aborted due to any parameter error */
"FR_TIMEOUT：在规定的时间内无法获得访问卷的许可", /* (15) Could not get a grant to access the volume within defined period */
"FR_LOCKED：由于文件共享策略操作被拒绝", /* (16) The operation is rejected according to the file sharing policy */
"FR_NOT_ENOUGH_CORE：无法分配长文件名工作区", /* (17) LFN working buffer could not be allocated */
"FR_TOO_MANY_OPEN_FILES：当前打开的文件数大于_FS_SHARE", /* (18) Number of open files > _FS_SHARE */
"FR_INVALID_PARAMETER：参数无效" /* (19) Given parameter is invalid */
};
int sd_disk_status(void)
@ -68,33 +67,37 @@ int sd_disk_write(const BYTE *buff, LBA_t sector, UINT count)
int sd_disk_ioctl(BYTE cmd, void *buff)
{
int result = 0;
switch (cmd)
{
case CTRL_SYNC:
result = RES_OK;
break;
case GET_SECTOR_SIZE:
*(DWORD *)buff = SD_CardInfo.CardBlockSize;
result = RES_OK;
break;
case GET_BLOCK_SIZE:
*(WORD *)buff = SD_CardInfo.CardBlockSize;
result = RES_OK;
break;
case GET_SECTOR_COUNT:
*(DWORD *)buff = SD_CardInfo.CardCapacity / SD_CardInfo.CardBlockSize;
result = RES_OK;
break;
default:
result = RES_PARERR;
break;
switch (cmd) {
case CTRL_SYNC:
result = RES_OK;
break;
case GET_SECTOR_SIZE:
*(DWORD *)buff = SD_CardInfo.CardBlockSize;
result = RES_OK;
break;
case GET_BLOCK_SIZE:
*(WORD *)buff = SD_CardInfo.CardBlockSize;
result = RES_OK;
break;
case GET_SECTOR_COUNT:
*(DWORD *)buff = SD_CardInfo.CardCapacity / SD_CardInfo.CardBlockSize;
result = RES_OK;
break;
default:
result = RES_PARERR;
break;
}
return result;
}
DSTATUS Translate_Result_Code(int result)
{
// MSG("%s\r\n",FR_Table[result]);
return result;
}
@ -115,9 +118,10 @@ int shellGetcwd(char *path, unsigned int len)
{
int err;
err = f_getcwd(path, len);
if(err)
{
if (err) {
strcpy(path, "unknow");
}
return 0;
}

413
bsp/bsp_common/il9341/bsp_il9341.c
View file

@ -1,24 +1,24 @@
/**
* @file bsp_il9341.c
* @brief
*
* @brief
*
* Copyright (c) 2021 Bouffalolab team
*
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
*
* http://www.apache.org/licenses/LICENSE-2.0
*
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
*
*/
#include "bsp_il9341.h"
@ -67,13 +67,12 @@
* @{
*/
static struct device* spi0;
static struct device* dma_ch3;
static struct device* dma_ch4;
static struct device *spi0;
static struct device *dma_ch3;
static struct device *dma_ch4;
void dma_ch3_callback(struct device *dev, void *args, uint32_t size, uint32_t event)
{
}
/*@} end of group TFT_LCD_Private_Functions */
@ -83,36 +82,34 @@ void dma_ch3_callback(struct device *dev, void *args, uint32_t size, uint32_t ev
*/
void spi0_init(void)
{
gpio_set_mode(LCD_CS_PIN,GPIO_OUTPUT_MODE);
gpio_set_mode(LCD_DC_PIN,GPIO_OUTPUT_MODE);
gpio_write(LCD_CS_PIN,1); //CS1
gpio_write(LCD_DC_PIN,1); //DC
gpio_set_mode(LCD_CS_PIN, GPIO_OUTPUT_MODE);
gpio_set_mode(LCD_DC_PIN, GPIO_OUTPUT_MODE);
gpio_write(LCD_CS_PIN, 1); //CS1
gpio_write(LCD_DC_PIN, 1); //DC
spi0 = device_find("spi0");
if(spi0)
{
if (spi0) {
device_close(spi0);
}
else{
spi_register(SPI0_INDEX,"spi0",DEVICE_OFLAG_RDWR);
} else {
spi_register(SPI0_INDEX, "spi0", DEVICE_OFLAG_RDWR);
spi0 = device_find("spi0");
}
if(spi0)
{
device_open(spi0,DEVICE_OFLAG_STREAM_TX|DEVICE_OFLAG_STREAM_RX);
if (spi0) {
device_open(spi0, DEVICE_OFLAG_STREAM_TX | DEVICE_OFLAG_STREAM_RX);
}
dma_ch3 = device_find("dma0_ch3");
if(dma_ch3)
{
if (dma_ch3) {
device_close(dma_ch3);
}
else{
} else {
dma_register(DMA0_CH3_INDEX, "dma0_ch3", DEVICE_OFLAG_RDWR);
dma_ch3 = device_find("dma0_ch3");
}
if (dma_ch3)
{
if (dma_ch3) {
DMA_DEV(dma_ch3)->direction = DMA_MEMORY_TO_PERIPH;
DMA_DEV(dma_ch3)->transfer_mode = DMA_LLI_ONCE_MODE;
DMA_DEV(dma_ch3)->src_req = DMA_REQUEST_NONE;
@ -125,29 +122,29 @@ void spi0_init(void)
}
dma_ch4 = device_find("dma0_ch4");
if(dma_ch4)
{
if (dma_ch4) {
device_close(dma_ch4);
}
else{
} else {
dma_register(DMA0_CH4_INDEX, "dma0_ch4", DEVICE_OFLAG_RDWR);
dma_ch4 = device_find("dma0_ch4");
}
if (dma_ch4)
{
DMA_DEV(dma_ch4)->direction = DMA_PERIPH_TO_MEMORY;
if (dma_ch4) {
DMA_DEV(dma_ch4)->direction = DMA_PERIPH_TO_MEMORY;
DMA_DEV(dma_ch4)->transfer_mode = DMA_LLI_ONCE_MODE;
DMA_DEV(dma_ch4)->src_req = DMA_REQUEST_SPI0_RX;
DMA_DEV(dma_ch4)->dst_req = DMA_REQUEST_NONE;
DMA_DEV(dma_ch4)->src_width = DMA_TRANSFER_WIDTH_8BIT ;
DMA_DEV(dma_ch4)->dst_width = DMA_TRANSFER_WIDTH_8BIT ;
DMA_DEV(dma_ch4)->src_width = DMA_TRANSFER_WIDTH_8BIT;
DMA_DEV(dma_ch4)->dst_width = DMA_TRANSFER_WIDTH_8BIT;
device_open(dma_ch4, 0);
device_set_callback(dma_ch4, NULL);
device_control(dma_ch4, DEVICE_CTRL_CLR_INT, NULL);
}
device_control(spi0,DEVICE_CTRL_TX_DMA_SUSPEND,NULL);
device_control(spi0, DEVICE_CTRL_TX_DMA_SUSPEND, NULL);
}
/****************************************************************************//**
/****************************************************************************/ /**
* @brief LCD write command
*
* @param command: Command to write
@ -159,12 +156,11 @@ void LCD_WR_Cmd(uint8_t command)
{
CS1_LOW;
DC_LOW;
spi_transmit(spi0,&command,1,SPI_TRANSFER_TYPE_8BIT);
spi_transmit(spi0, &command, 1, SPI_TRANSFER_TYPE_8BIT);
CS1_HIGH;
}
/****************************************************************************//**
/****************************************************************************/ /**
* @brief LCD write 8-bit data
*
* @param data: 8-bit data to write
@ -176,12 +172,11 @@ void LCD_WR_Byte(uint8_t data)
{
CS1_LOW;
DC_HIGH;
spi_transmit(spi0,&data,1,SPI_TRANSFER_TYPE_8BIT);
spi_transmit(spi0, &data, 1, SPI_TRANSFER_TYPE_8BIT);
CS1_HIGH;
}
/****************************************************************************//**
/****************************************************************************/ /**
* @brief LCD write 16-bit data
*
* @param data: 16-bit data to write
@ -193,12 +188,11 @@ void LCD_WR_HalfWord(uint16_t data)
{
CS1_LOW;
DC_HIGH;
spi_transmit(spi0,&data,1,SPI_TRANSFER_TYPE_16BIT);
spi_transmit(spi0, &data, 1, SPI_TRANSFER_TYPE_16BIT);
CS1_HIGH;
}
/****************************************************************************//**
/****************************************************************************/ /**
* @brief LCD write 32-bit data
*
* @param data: 32-bit data to write
@ -210,26 +204,29 @@ void LCD_WR_Word(uint32_t data)
{
CS1_LOW;
DC_HIGH;
spi_transmit(spi0,&data,1,SPI_TRANSFER_TYPE_32BIT);
spi_transmit(spi0, &data, 1, SPI_TRANSFER_TYPE_32BIT);
CS1_HIGH;
}
void LCD_WR_SPI_DMA(uint16_t *img, uint32_t len)
{
{
DMA_DEV(dma_ch3)->src_width = DMA_TRANSFER_WIDTH_32BIT;
DMA_DEV(dma_ch3)->src_burst_size =0;
DMA_DEV(dma_ch3)->dst_burst_size =1;
device_control(spi0,DEVICE_CTRL_TX_DMA_RESUME,NULL);
DMA_DEV(dma_ch3)->src_burst_size = 0;
DMA_DEV(dma_ch3)->dst_burst_size = 1;
device_control(spi0, DEVICE_CTRL_TX_DMA_RESUME, NULL);
CS1_LOW;
DC_HIGH;
dma_reload(dma_ch3, (uint32_t)img, (uint32_t)DMA_ADDR_SPI_TDR, len);
dma_channel_start(dma_ch3);
while(dma_channel_check_busy(dma_ch3));
device_control(spi0,DEVICE_CTRL_TX_DMA_SUSPEND,NULL);
while (dma_channel_check_busy(dma_ch3))
;
device_control(spi0, DEVICE_CTRL_TX_DMA_SUSPEND, NULL);
CS1_HIGH;
}
/****************************************************************************//**
/****************************************************************************/ /**
* @brief LCD set dir
*
* @param dir: dir
@ -237,29 +234,33 @@ void LCD_WR_SPI_DMA(uint16_t *img, uint32_t len)
* @return None
*
*******************************************************************************/
void LCD_Set_Dir(uint8_t dir )
{
void LCD_Set_Dir(uint8_t dir)
{
LCD_WR_Cmd(0x36);
switch (dir)
{
case 0 :
LCD_WR_Byte(0x08);
break;
case 1 :
LCD_WR_Byte(0xA8);
break;
case 2 :
LCD_WR_Byte(0xC8);
break;
case 3 :
LCD_WR_Byte(0x68);
break;
default:
break;
switch (dir) {
case 0:
LCD_WR_Byte(0x08);
break;
case 1:
LCD_WR_Byte(0xA8);
break;
case 2:
LCD_WR_Byte(0xC8);
break;
case 3:
LCD_WR_Byte(0x68);
break;
default:
break;
}
}
/****************************************************************************//**
/****************************************************************************/ /**
* @brief LCD set address
*
* @param x1: Coordinate x start
@ -270,20 +271,18 @@ void LCD_Set_Dir(uint8_t dir )
* @return None
*
*******************************************************************************/
void LCD_Set_Addr(uint32_t x1,uint32_t y1,uint32_t x2,uint32_t y2)
{
void LCD_Set_Addr(uint32_t x1, uint32_t y1, uint32_t x2, uint32_t y2)
{
LCD_WR_Cmd(0x2a);
LCD_WR_Word(x2 << 24 | (x2 << 8 & 0xff0000) | (x1 << 8 & 0xff00) | (x1 >> 8 & 0xff));
LCD_WR_Cmd(0x2a);
LCD_WR_Word(x2<<24 | (x2<<8&0xff0000) | (x1<<8&0xff00) | (x1>>8&0xff));
LCD_WR_Cmd(0x2b);
LCD_WR_Word(y2 << 24 | (y2 << 8 & 0xff0000) | (y1 << 8 & 0xff00) | (y1 >> 8 & 0xff));
LCD_WR_Cmd(0x2b);
LCD_WR_Word(y2<<24 | (y2<<8&0xff0000) | (y1<<8&0xff00) | (y1>>8&0xff));
LCD_WR_Cmd(0x2C);
LCD_WR_Cmd(0x2C);
}
/****************************************************************************//**
/****************************************************************************/ /**
* @brief SPI LCD init
*
* @param None
@ -295,73 +294,72 @@ void LCD_Init(void)
{
spi0_init();
LCD_WR_Cmd(0x11); /* Exit sleep */
LCD_WR_Cmd(0x11); /* Exit sleep */
bflb_platform_delay_ms(60);
LCD_WR_Cmd(0xcf);
LCD_WR_HalfWord(0xd900);
LCD_WR_Byte(0X30);
LCD_WR_Cmd(0xed);
LCD_WR_Word(0x81120364);
LCD_WR_Cmd(0xe8);
LCD_WR_HalfWord(0x1085);
LCD_WR_Byte(0x78);
LCD_WR_Cmd(0xcb);
LCD_WR_Word(0x34002c39);
LCD_WR_Byte(0x02);
LCD_WR_Cmd(0xf7);
LCD_WR_Byte(0x20);
LCD_WR_Cmd(0xea);
LCD_WR_HalfWord(0x0000);
LCD_WR_Cmd(0xc0); /* Power control */
LCD_WR_Byte(0x23); /* VRH[5:0] */
LCD_WR_Cmd(0xc1); /* Power control */
LCD_WR_Byte(0x12); /* SAP[2:0];BT[3:0] */
LCD_WR_Cmd(0xc0); /* Power control */
LCD_WR_Byte(0x23); /* VRH[5:0] */
LCD_WR_Cmd(0xc1); /* Power control */
LCD_WR_Byte(0x12); /* SAP[2:0];BT[3:0] */
LCD_WR_Cmd(0xc2);
LCD_WR_Byte(0x11);
LCD_WR_Cmd(0xC5); /* VCM control */
LCD_WR_Cmd(0xC5); /* VCM control */
LCD_WR_HalfWord(0x3040);
LCD_WR_Cmd(0xc7); /* VCM control2 */
LCD_WR_Cmd(0xc7); /* VCM control2 */
LCD_WR_Byte(0xa9);
LCD_WR_Cmd(0x3a);
LCD_WR_Cmd(0x3a);
LCD_WR_Byte(0x55);
LCD_WR_Cmd(0x36); /* Memory Access Control */
LCD_WR_Cmd(0x36); /* Memory Access Control */
LCD_WR_Byte(0x08);
LCD_WR_Cmd(0xb1); /* Frame Rate Control */
LCD_WR_Cmd(0xb1); /* Frame Rate Control */
LCD_WR_HalfWord(0x1800);
LCD_WR_Cmd(0xb6); /* Display Function Control */
LCD_WR_Cmd(0xb6); /* Display Function Control */
LCD_WR_HalfWord(0xa20a);
LCD_WR_Cmd(0x0c); /* display pixel format */
LCD_WR_Byte(0xd5); /* RGB 16bits,MCU 16bits */
LCD_WR_Cmd(0xf2); /* 3Gamma Function Disable */
LCD_WR_Cmd(0x0c); /* display pixel format */
LCD_WR_Byte(0xd5); /* RGB 16bits,MCU 16bits */
LCD_WR_Cmd(0xf2); /* 3Gamma Function Disable */
LCD_WR_Byte(0x00);
LCD_WR_Cmd(0xf7);
LCD_WR_Byte(0x20);
LCD_WR_Cmd(0x26); /* Gamma curve selected */
LCD_WR_Cmd(0x26); /* Gamma curve selected */
LCD_WR_Byte(0x01);
LCD_WR_Cmd(0xe0); /* Set Gamma */
LCD_WR_Cmd(0xe0); /* Set Gamma */
LCD_WR_Word(0x0b23241f);
LCD_WR_Word(0xd850080f);
LCD_WR_Word(0x000a083b);
LCD_WR_HalfWord(0x0000);
LCD_WR_Byte(0x00);
LCD_WR_Cmd(0Xe1); /* Set Gamma */
LCD_WR_Cmd(0Xe1); /* Set Gamma */
LCD_WR_Word(0x041c1b00);
LCD_WR_Word(0x272f0710);
LCD_WR_Word(0x0f150744);
LCD_WR_HalfWord(0x3f3f);
LCD_WR_Byte(0x1f);
LCD_WR_Cmd(0x29); /* Display on */
LCD_WR_Cmd(0x29); /* Display on */
}
/****************************************************************************//**
/****************************************************************************/ /**
* @brief LCD clear display
*
* @param color: Color to fill
@ -371,17 +369,17 @@ void LCD_Init(void)
*******************************************************************************/
void LCD_Clear(uint16_t color)
{
uint16_t i,j;
LCD_Set_Addr(0,0,LCD_W-1,LCD_H-1);
for(i=0;i<LCD_W;i++){
for (j=0;j<LCD_H;j++){
uint16_t i, j;
LCD_Set_Addr(0, 0, LCD_W - 1, LCD_H - 1);
for (i = 0; i < LCD_W; i++) {
for (j = 0; j < LCD_H; j++) {
LCD_WR_HalfWord(color);
}
}
}
/****************************************************************************//**
/****************************************************************************/ /**
* @brief LCD draw a point
*
* @param x: Coordinate x
@ -391,14 +389,13 @@ void LCD_Clear(uint16_t color)
* @return None
*
*******************************************************************************/
void LCD_DrawPoint(uint16_t x,uint16_t y,uint16_t color)
void LCD_DrawPoint(uint16_t x, uint16_t y, uint16_t color)
{
LCD_Set_Addr(x,y,x,y);
LCD_Set_Addr(x, y, x, y);
LCD_WR_HalfWord(color);
}
/****************************************************************************//**
/****************************************************************************/ /**
* @brief LCD draw line
*
* @param x1: Coordinate x start
@ -410,39 +407,39 @@ void LCD_DrawPoint(uint16_t x,uint16_t y,uint16_t color)
* @return None
*
*******************************************************************************/
void LCD_DrawLine(uint16_t x1,uint16_t y1,uint16_t x2,uint16_t y2,uint16_t color)
void LCD_DrawLine(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2, uint16_t color)
{
int xVariation,yVariation,temp;
int absX,absY,i;
xVariation = x2-x1;
yVariation = y2-y1;
int xVariation, yVariation, temp;
int absX, absY, i;
xVariation = x2 - x1;
yVariation = y2 - y1;
absX = ABS32(xVariation);
absY = ABS32(yVariation);
if(absX > absY){
for(i=0;i<absX+1;i++){
temp = yVariation*100/absX*i/100;
if(xVariation>0){
LCD_DrawPoint(x1+i,y1+temp,color);
}else{
LCD_DrawPoint(x1-i,y1+temp,color);
if (absX > absY) {
for (i = 0; i < absX + 1; i++) {
temp = yVariation * 100 / absX * i / 100;
if (xVariation > 0) {
LCD_DrawPoint(x1 + i, y1 + temp, color);
} else {
LCD_DrawPoint(x1 - i, y1 + temp, color);
}
}
}
else{
for(i=0;i<absY+1;i++){
temp = xVariation*100/absY*i/100;
if(yVariation>0){
LCD_DrawPoint(x1+temp,y1+i,color);
}else{
LCD_DrawPoint(x1+temp,y1-i,color);
} else {
for (i = 0; i < absY + 1; i++) {
temp = xVariation * 100 / absY * i / 100;
if (yVariation > 0) {
LCD_DrawPoint(x1 + temp, y1 + i, color);
} else {
LCD_DrawPoint(x1 + temp, y1 - i, color);
}
}
}
}
/****************************************************************************//**
/****************************************************************************/ /**
* @brief LCD draw rectangle
*
* @param x1: Coordinate x start
@ -454,16 +451,15 @@ void LCD_DrawLine(uint16_t x1,uint16_t y1,uint16_t x2,uint16_t y2,uint16_t color
* @return None
*
*******************************************************************************/
void LCD_DrawRectangle(uint16_t x1,uint16_t y1,uint16_t x2,uint16_t y2,uint16_t color)
void LCD_DrawRectangle(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2, uint16_t color)
{
LCD_DrawLine(x1,y1,x2,y1,color);
LCD_DrawLine(x2,y1,x2,y2,color);
LCD_DrawLine(x2,y2,x1,y2,color);
LCD_DrawLine(x1,y2,x1,y1,color);
LCD_DrawLine(x1, y1, x2, y1, color);
LCD_DrawLine(x2, y1, x2, y2, color);
LCD_DrawLine(x2, y2, x1, y2, color);
LCD_DrawLine(x1, y2, x1, y1, color);
}
/****************************************************************************//**
/****************************************************************************/ /**
* @brief LCD draw circle
*
* @param x: Center coordinate x
@ -474,36 +470,37 @@ void LCD_DrawRectangle(uint16_t x1,uint16_t y1,uint16_t x2,uint16_t y2,uint16_t
* @return None
*
*******************************************************************************/
void LCD_DrawCircle(uint16_t x,uint16_t y,uint16_t r,uint16_t color)
void LCD_DrawCircle(uint16_t x, uint16_t y, uint16_t r, uint16_t color)
{
int a = 0,b;
int a = 0, b;
int di;
b = r;
di = 3-(r<<1);
while(a <= b)
{
LCD_DrawPoint(x-b,y-a,color);
LCD_DrawPoint(x+b,y-a,color);
LCD_DrawPoint(x-a,y+b,color);
LCD_DrawPoint(x-b,y-a,color);
LCD_DrawPoint(x-a,y-b,color);
LCD_DrawPoint(x+b,y+a,color);
LCD_DrawPoint(x+a,y-b,color);
LCD_DrawPoint(x+a,y+b,color);
LCD_DrawPoint(x-b,y+a,color);
di = 3 - (r << 1);
while (a <= b) {
LCD_DrawPoint(x - b, y - a, color);
LCD_DrawPoint(x + b, y - a, color);
LCD_DrawPoint(x - a, y + b, color);
LCD_DrawPoint(x - b, y - a, color);
LCD_DrawPoint(x - a, y - b, color);
LCD_DrawPoint(x + b, y + a, color);
LCD_DrawPoint(x + a, y - b, color);
LCD_DrawPoint(x + a, y + b, color);
LCD_DrawPoint(x - b, y + a, color);
a++;
if(di<0){
di += 4*a+6;
}else{
di += 10+4*(a-b);
if (di < 0) {
di += 4 * a + 6;
} else {
di += 10 + 4 * (a - b);
b--;
}
LCD_DrawPoint(x+a,y+b,color);
LCD_DrawPoint(x + a, y + b, color);
}
}
/****************************************************************************//**
/****************************************************************************/ /**
* @brief LCD fill the area with color
*
* @param x1: Coordinate x start
@ -515,18 +512,19 @@ void LCD_DrawCircle(uint16_t x,uint16_t y,uint16_t r,uint16_t color)
* @return None
*
*******************************************************************************/
void LCD_DrawArea(uint16_t x1,uint16_t y1,uint16_t x2,uint16_t y2,uint16_t color)
void LCD_DrawArea(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2, uint16_t color)
{
uint16_t i,j;
LCD_Set_Addr(x1,y1,x2,y2);
for(i=y1;i<=y2;i++)
{
for(j=x1;j<=x2;j++)LCD_WR_HalfWord(color);
uint16_t i, j;
LCD_Set_Addr(x1, y1, x2, y2);
for (i = y1; i <= y2; i++) {
for (j = x1; j <= x2; j++) {
LCD_WR_HalfWord(color);
}
}
}
/****************************************************************************//**
/****************************************************************************/ /**
* @brief LCD draw picture
*
* @param x1: Coordinate x start
@ -538,29 +536,29 @@ void LCD_DrawArea(uint16_t x1,uint16_t y1,uint16_t x2,uint16_t y2,uint16_t color
* @return None
*
*******************************************************************************/
void LCD_DrawPicture(uint16_t x1,uint16_t y1,uint16_t x2,uint16_t y2,uint16_t* picture)
void LCD_DrawPicture(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2, uint16_t *picture)
{
uint32_t i;
LCD_Set_Addr(x1,y1,x2,y2);
for(i=0;i<ABS16((x2-x1+1)*(y2-y1+1));i++)
{
LCD_Set_Addr(x1, y1, x2, y2);
for (i = 0; i < ABS16((x2 - x1 + 1) * (y2 - y1 + 1)); i++) {
LCD_WR_HalfWord(picture[i]);
}
}
void LCD_DrawPicture_cam(uint16_t x1,uint16_t y1,uint16_t x2,uint16_t y2,uint16_t* picture)
void LCD_DrawPicture_cam(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2, uint16_t *picture)
{
uint32_t i;
LCD_Set_Addr(x1,y1,x2,y2);
for(i=0;i<ABS16((x2-x1+1)*(y2-y1+1));i++)
{
LCD_Set_Addr(x1, y1, x2, y2);
for (i = 0; i < ABS16((x2 - x1 + 1) * (y2 - y1 + 1)); i++) {
// LCD_WR_Byte(picture[i]);
// LCD_WR_Word(picture[i]);
LCD_WR_HalfWord(picture[i]);
}
}
/****************************************************************************//**
/****************************************************************************/ /**
* @brief LCD use uart to receive picture data and send to display
*
* @param x1: Coordinate x start
@ -578,9 +576,9 @@ void LCD_DrawPicture_cam(uint16_t x1,uint16_t y1,uint16_t x2,uint16_t y2,uint16_
// uint32_t recvCnt = 0;
// uint8_t uartRxBuf[UART_RX_FIFO_SIZE] = {0};
// LCD_Set_Addr(x1,y1,x2,y2);
// UART_Enable(uartId,UART_RX);
// while(rxLen < 2*(x2-x1+1)*(y2-y1+1)){
// while((recvCnt=UART_GetRxFifoCount(uartId)) == 0){}
// rxLen += UART_ReceiveData(uartId,uartRxBuf,recvCnt);
@ -588,12 +586,11 @@ void LCD_DrawPicture_cam(uint16_t x1,uint16_t y1,uint16_t x2,uint16_t y2,uint16_
// LCD_WR_Byte(uartRxBuf[i]);
// }
// }
// UART_Disable(uartId,UART_RX);
// }
/****************************************************************************//**
/****************************************************************************/ /**
* @brief LCD draw a 32*32 chinese character in lattice mode
*
* @param x: Coordinate x
@ -605,27 +602,23 @@ void LCD_DrawPicture_cam(uint16_t x1,uint16_t y1,uint16_t x2,uint16_t y2,uint16_
* @return None
*
*******************************************************************************/
void LCD_DrawChinese(uint16_t x,uint16_t y,uint8_t* character,uint16_t bColor,uint16_t cColor)
void LCD_DrawChinese(uint16_t x, uint16_t y, uint8_t *character, uint16_t bColor, uint16_t cColor)
{
uint8_t i,j;
LCD_Set_Addr(x,y,x+31,y+31);
for(j=0;j<128;j++)
{
for(i=0;i<8;i++)
{
if((*character&(1<<i)) != 0)
{
uint8_t i, j;
LCD_Set_Addr(x, y, x + 31, y + 31);
for (j = 0; j < 128; j++) {
for (i = 0; i < 8; i++) {
if ((*character & (1 << i)) != 0) {
LCD_WR_HalfWord(cColor);
}
else
{
} else {
LCD_WR_HalfWord(bColor);
}
}
character++;
}
}
character++;
}
}
/*@} end of group TFT_LCD_Public_Functions */

48
bsp/bsp_common/il9341/bsp_il9341.h
View file

@ -1,24 +1,24 @@
/**
* @file bsp_il9341.h
* @brief
*
* @brief
*
* Copyright (c) 2021 Bouffalolab team
*
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
*
* http://www.apache.org/licenses/LICENSE-2.0
*
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
*
*/
#ifndef __TFT_LCD_H__
#define __TFT_LCD_H__
@ -50,17 +50,17 @@
#define LCD_CS_PIN GPIO_PIN_10
#define LCD_DC_PIN GPIO_PIN_22
#define CS1_HIGH gpio_write(LCD_CS_PIN,1)
#define CS1_LOW gpio_write(LCD_CS_PIN,0)
#define DC_HIGH gpio_write(LCD_DC_PIN,1)
#define DC_LOW gpio_write(LCD_DC_PIN,0)
#define LCD_W 240 /* LCD width */
#define LCD_H 320 /* LCD height */
#define CS1_HIGH gpio_write(LCD_CS_PIN, 1)
#define CS1_LOW gpio_write(LCD_CS_PIN, 0)
#define DC_HIGH gpio_write(LCD_DC_PIN, 1)
#define DC_LOW gpio_write(LCD_DC_PIN, 0)
#define LCD_W 240 /* LCD width */
#define LCD_H 320 /* LCD height */
/* Turn 24-bit RGB color to 16-bit */
#define RGB(r,g,b) (((r>>3)<<3|(g>>5)|(g>>2)<<13|(b>>3)<<8)&0xffff)
#define RGB(r, g, b) (((r >> 3) << 3 | (g >> 5) | (g >> 2) << 13 | (b >> 3) << 8) & 0xffff)
/* Calculate 32-bit or 16-bit absolute value */
#define ABS32(value) ((value^(value>>31))-(value>>31))
#define ABS16(value) ((value^(value>>15))-(value>>15))
#define ABS32(value) ((value ^ (value >> 31)) - (value >> 31))
#define ABS16(value) ((value ^ (value >> 15)) - (value >> 15))
/*@} end of group TFT_LCD_Public_Macros */
@ -76,19 +76,19 @@ void LCD_WR_Byte(uint8_t data);
void LCD_WR_HalfWord(uint16_t data);
void LCD_WR_Word(uint32_t data);
void LCD_Set_Dir(uint8_t dir);
void LCD_Set_Addr(uint32_t x1,uint32_t y1,uint32_t x2,uint32_t y2);
void LCD_Set_Addr(uint32_t x1, uint32_t y1, uint32_t x2, uint32_t y2);
void LCD_Init(void);
void LCD_Clear(uint16_t color);
void LCD_DrawPoint(uint16_t x,uint16_t y,uint16_t color);
void LCD_DrawLine(uint16_t x1,uint16_t y1,uint16_t x2,uint16_t y2,uint16_t color);
void LCD_DrawRectangle(uint16_t x1,uint16_t y1,uint16_t x2,uint16_t y2,uint16_t color);
void LCD_DrawCircle(uint16_t x,uint16_t y,uint16_t r,uint16_t color);
void LCD_DrawArea(uint16_t x1,uint16_t y1,uint16_t x2,uint16_t y2,uint16_t color);
void LCD_DrawPicture(uint16_t x1,uint16_t y1,uint16_t x2,uint16_t y2,uint16_t* picture);
void LCD_DrawPicture_cam(uint16_t x1,uint16_t y1,uint16_t x2,uint16_t y2,uint16_t* picture);
void LCD_DrawPoint(uint16_t x, uint16_t y, uint16_t color);
void LCD_DrawLine(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2, uint16_t color);
void LCD_DrawRectangle(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2, uint16_t color);
void LCD_DrawCircle(uint16_t x, uint16_t y, uint16_t r, uint16_t color);
void LCD_DrawArea(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2, uint16_t color);
void LCD_DrawPicture(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2, uint16_t *picture);
void LCD_DrawPicture_cam(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2, uint16_t *picture);
void LCD_WR_SPI_DMA(uint16_t *img, uint32_t len);
// void LCD_UartDrawPicture(uint16_t x1,uint16_t y1,uint16_t x2,uint16_t y2,UART_ID_Type uartId);
void LCD_DrawChinese(uint16_t x,uint16_t y,uint8_t* character,uint16_t bColor,uint16_t cColor);
void LCD_DrawChinese(uint16_t x, uint16_t y, uint8_t *character, uint16_t bColor, uint16_t cColor);
/*@} end of group TFT_LCD_Public_Functions */

1035
bsp/bsp_common/image_sensor/bsp_image_sensor.c
View file

File diff suppressed because it is too large Load diff

12
bsp/bsp_common/image_sensor/bsp_image_sensor.h
View file

@ -1,24 +1,24 @@
/**
* @file bsp_gc0308.h
* @brief
*
* @brief
*
* Copyright (c) 2021 Bouffalolab team
*
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
*
* http://www.apache.org/licenses/LICENSE-2.0
*
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
*
*/
#ifndef _IMAGE_SENSOR_H_
#define _IMAGE_SENSOR_H_

62
bsp/bsp_common/lvgl/lv_port_disp.c
View file

@ -3,7 +3,7 @@
*
*/
/*Copy this file as "lv_port_disp.c" and set this value to "1" to enable content*/
/*Copy this file as "lv_port_disp.c" and set this value to "1" to enable content*/
#if 1
/*********************
@ -30,11 +30,11 @@
void LCD_Init(void);
static void disp_init(void);
static void disp_flush(lv_disp_drv_t * disp_drv, const lv_area_t * area, lv_color_t * color_p);
static void disp_flush(lv_disp_drv_t *disp_drv, const lv_area_t *area, lv_color_t *color_p);
#if LV_USE_GPU
static void gpu_blend(lv_disp_drv_t * disp_drv, lv_color_t * dest, const lv_color_t * src, uint32_t length, lv_opa_t opa);
static void gpu_fill(lv_disp_drv_t * disp_drv, lv_color_t * dest_buf, lv_coord_t dest_width,
const lv_area_t * fill_area, lv_color_t color);
static void gpu_blend(lv_disp_drv_t *disp_drv, lv_color_t *dest, const lv_color_t *src, uint32_t length, lv_opa_t opa);
static void gpu_fill(lv_disp_drv_t *disp_drv, lv_color_t *dest_buf, lv_coord_t dest_width,
const lv_area_t *fill_area, lv_color_t color);
#endif
/**********************
@ -48,8 +48,8 @@ static void gpu_fill(lv_disp_drv_t * disp_drv, lv_color_t * dest_buf, lv_coord_t
/**********************
* GLOBAL FUNCTIONS
**********************/
static lv_disp_drv_t Disp_Drv; /*Descriptor of a display driver*/
static lv_disp_drv_t *p_disp_drv_cb;
static lv_disp_drv_t Disp_Drv; /*Descriptor of a display driver*/
static lv_disp_drv_t *p_disp_drv_cb;
void lv_port_disp_init(void)
{
@ -89,9 +89,9 @@ void lv_port_disp_init(void)
// /* Example for 2) */
static lv_disp_buf_t draw_buf_dsc_2;
static lv_color_t draw_buf_2_1[LV_HOR_RES_MAX * 20]; /*A buffer for 10 rows*/
static lv_color_t draw_buf_2_2[LV_HOR_RES_MAX * 20]; /*An other buffer for 10 rows*/
lv_disp_buf_init(&draw_buf_dsc_2, draw_buf_2_1, draw_buf_2_2, LV_HOR_RES_MAX * 20); /*Initialize the display buffer*/
static lv_color_t draw_buf_2_1[LV_HOR_RES_MAX * 20]; /*A buffer for 10 rows*/
static lv_color_t draw_buf_2_2[LV_HOR_RES_MAX * 20]; /*An other buffer for 10 rows*/
lv_disp_buf_init(&draw_buf_dsc_2, draw_buf_2_1, draw_buf_2_2, LV_HOR_RES_MAX * 20); /*Initialize the display buffer*/
// /* Example for 3) *
// static lv_disp_buf_t draw_buf_dsc_3;
@ -103,8 +103,7 @@ void lv_port_disp_init(void)
* Register the display in LVGL
*----------------------------------*/
lv_disp_drv_init(&Disp_Drv); /*Basic initialization*/
lv_disp_drv_init(&Disp_Drv); /*Basic initialization*/
/*Set up the functions to access to your display*/
@ -139,13 +138,13 @@ void lv_port_disp_init(void)
/**********************
* STATIC FUNCTIONS
**********************/
struct device* lcd_spi;
struct device* lcd_dma_tx;
struct device* lcd_dma_rx;
struct device *lcd_spi;
struct device *lcd_dma_tx;
struct device *lcd_dma_rx;
void flush_callback(struct device *dev, void *args, uint32_t size, uint32_t event)
{
device_control(lcd_spi,DEVICE_CTRL_TX_DMA_SUSPEND,NULL);
device_control(lcd_spi, DEVICE_CTRL_TX_DMA_SUSPEND, NULL);
lv_disp_flush_ready(p_disp_drv_cb);
CS1_HIGH;
}
@ -164,25 +163,24 @@ void disp_init(void)
/* Flush the content of the internal buffer the specific area on the display
* You can use DMA or any hardware acceleration to do this operation in the background but
* 'lv_disp_flush_ready()' has to be called when finished. */
static void disp_flush(lv_disp_drv_t * disp_drv, const lv_area_t * area, lv_color_t * color_p)
static void disp_flush(lv_disp_drv_t *disp_drv, const lv_area_t *area, lv_color_t *color_p)
{
/*The most simple case (but also the slowest) to put all pixels to the screen one-by-one*/
static uint8_t rotated_dir = 0;
uint32_t length = (area->y2 - area->y1 +1) * (area->x2 - area->x1 +1) ;
uint32_t length = (area->y2 - area->y1 + 1) * (area->x2 - area->x1 + 1);
if(rotated_dir != disp_drv->rotated)
{
if (rotated_dir != disp_drv->rotated) {
rotated_dir = disp_drv->rotated;
LCD_Set_Dir(rotated_dir);
}
LCD_Set_Addr(area->x1,area->y1,area->x2,area->y2);
LCD_Set_Addr(area->x1, area->y1, area->x2, area->y2);
device_control(lcd_spi,DEVICE_CTRL_TX_DMA_RESUME,NULL);
device_control(lcd_spi, DEVICE_CTRL_TX_DMA_RESUME, NULL);
device_control(lcd_dma_tx, DEVICE_CTRL_SET_INT, NULL);
CS1_LOW;
DC_HIGH;
dma_reload(lcd_dma_tx, (uint32_t)color_p, (uint32_t)DMA_ADDR_SPI_TDR, length*2);
dma_reload(lcd_dma_tx, (uint32_t)color_p, (uint32_t)DMA_ADDR_SPI_TDR, length * 2);
dma_channel_start(lcd_dma_tx);
p_disp_drv_cb = disp_drv;
@ -198,33 +196,35 @@ static void disp_flush(lv_disp_drv_t * disp_drv, const lv_area_t * area, lv_colo
/* If your MCU has hardware accelerator (GPU) then you can use it to blend to memories using opacity
* It can be used only in buffered mode (LV_VDB_SIZE != 0 in lv_conf.h)*/
static void gpu_blend(lv_disp_drv_t * disp_drv, lv_color_t * dest, const lv_color_t * src, uint32_t length, lv_opa_t opa)
static void gpu_blend(lv_disp_drv_t *disp_drv, lv_color_t *dest, const lv_color_t *src, uint32_t length, lv_opa_t opa)
{
/*It's an example code which should be done by your GPU*/
uint32_t i;
for(i = 0; i < length; i++) {
for (i = 0; i < length; i++) {
dest[i] = lv_color_mix(dest[i], src[i], opa);
}
}
/* If your MCU has hardware accelerator (GPU) then you can use it to fill a memory with a color
* It can be used only in buffered mode (LV_VDB_SIZE != 0 in lv_conf.h)*/
static void gpu_fill(lv_disp_drv_t * disp_drv, lv_color_t * dest_buf, lv_coord_t dest_width,
const lv_area_t * fill_area, lv_color_t color)
static void gpu_fill(lv_disp_drv_t *disp_drv, lv_color_t *dest_buf, lv_coord_t dest_width,
const lv_area_t *fill_area, lv_color_t color)
{
/*It's an example code which should be done by your GPU*/
int32_t x, y;
dest_buf += dest_width * fill_area->y1; /*Go to the first line*/
for(y = fill_area->y1; y <= fill_area->y2; y++) {
for(x = fill_area->x1; x <= fill_area->x2; x++) {
for (y = fill_area->y1; y <= fill_area->y2; y++) {
for (x = fill_area->x1; x <= fill_area->x2; x++) {
dest_buf[x] = color;
}
dest_buf+=dest_width; /*Go to the next line*/
dest_buf += dest_width; /*Go to the next line*/
}
}
#endif /*LV_USE_GPU*/
#endif /*LV_USE_GPU*/
#else /* Enable this file at the top */

2
bsp/bsp_common/lvgl/lv_port_disp.h
View file

@ -3,7 +3,7 @@
*
*/
/*Copy this file as "lv_port_disp.h" and set this value to "1" to enable content*/
/*Copy this file as "lv_port_disp.h" and set this value to "1" to enable content*/
#if 1
#ifndef LV_PORT_DISP_TEMPL_H

286
bsp/bsp_common/lvgl/lv_port_fs.c
View file

@ -3,7 +3,7 @@
*
*/
/*Copy this file as "lv_port_fs.c" and set this value to "1" to enable content*/
/*Copy this file as "lv_port_fs.c" and set this value to "1" to enable content*/
#if 1
/*********************
@ -26,10 +26,10 @@
* If you are using a File System library
* it already should have a File type.
* For example FatFS has `file_t `. In this case use `typedef file_t file_t`*/
typedef FIL file_t;
typedef FIL file_t;
/*Similarly to `file_t` create a type for directory reading too */
typedef DIR dir_t;
typedef DIR dir_t;
FATFS FS_OBJ_SD;
@ -38,20 +38,20 @@ FATFS FS_OBJ_SD;
**********************/
static void fs_init(void);
static lv_fs_res_t fs_open (lv_fs_drv_t * drv, void * file_p, const char * path, lv_fs_mode_t mode);
static lv_fs_res_t fs_close (lv_fs_drv_t * drv, void * file_p);
static lv_fs_res_t fs_read (lv_fs_drv_t * drv, void * file_p, void * buf, uint32_t btr, uint32_t * br);
static lv_fs_res_t fs_write(lv_fs_drv_t * drv, void * file_p, const void * buf, uint32_t btw, uint32_t * bw);
static lv_fs_res_t fs_seek (lv_fs_drv_t * drv, void * file_p, uint32_t pos);
static lv_fs_res_t fs_size (lv_fs_drv_t * drv, void * file_p, uint32_t * size_p);
static lv_fs_res_t fs_tell (lv_fs_drv_t * drv, void * file_p, uint32_t * pos_p);
static lv_fs_res_t fs_remove (lv_fs_drv_t * drv, const char *path);
static lv_fs_res_t fs_trunc (lv_fs_drv_t * drv, void * file_p);
static lv_fs_res_t fs_rename (lv_fs_drv_t * drv, const char * oldname, const char * newname);
static lv_fs_res_t fs_free (lv_fs_drv_t * drv, uint32_t * total_p, uint32_t * free_p);
static lv_fs_res_t fs_dir_open (lv_fs_drv_t * drv, void * rddir_p, const char *path);
static lv_fs_res_t fs_dir_read (lv_fs_drv_t * drv, void * rddir_p, char *fn);
static lv_fs_res_t fs_dir_close (lv_fs_drv_t * drv, void * rddir_p);
static lv_fs_res_t fs_open(lv_fs_drv_t *drv, void *file_p, const char *path, lv_fs_mode_t mode);
static lv_fs_res_t fs_close(lv_fs_drv_t *drv, void *file_p);
static lv_fs_res_t fs_read(lv_fs_drv_t *drv, void *file_p, void *buf, uint32_t btr, uint32_t *br);
static lv_fs_res_t fs_write(lv_fs_drv_t *drv, void *file_p, const void *buf, uint32_t btw, uint32_t *bw);
static lv_fs_res_t fs_seek(lv_fs_drv_t *drv, void *file_p, uint32_t pos);
static lv_fs_res_t fs_size(lv_fs_drv_t *drv, void *file_p, uint32_t *size_p);
static lv_fs_res_t fs_tell(lv_fs_drv_t *drv, void *file_p, uint32_t *pos_p);
static lv_fs_res_t fs_remove(lv_fs_drv_t *drv, const char *path);
static lv_fs_res_t fs_trunc(lv_fs_drv_t *drv, void *file_p);
static lv_fs_res_t fs_rename(lv_fs_drv_t *drv, const char *oldname, const char *newname);
static lv_fs_res_t fs_free(lv_fs_drv_t *drv, uint32_t *total_p, uint32_t *free_p);
static lv_fs_res_t fs_dir_open(lv_fs_drv_t *drv, void *rddir_p, const char *path);
static lv_fs_res_t fs_dir_read(lv_fs_drv_t *drv, void *rddir_p, char *fn);
static lv_fs_res_t fs_dir_close(lv_fs_drv_t *drv, void *rddir_p);
extern void fatfs_sd_driver_register(void);
@ -115,46 +115,53 @@ void lv_port_fs_init(void)
**********************/
lv_fs_res_t res_fatfs_to_lv(FRESULT res)
{
if(res==FR_OK)
{
if (res == FR_OK) {
return LV_FS_RES_OK;
}
switch (res)
{
case (FR_DISK_ERR):
res = LV_FS_RES_HW_ERR;
break;
case (FR_NO_FILE):
res = LV_FS_RES_NOT_EX;
break;
case (FR_NO_PATH):
res = LV_FS_RES_NOT_EX;
break;
case (FR_NOT_ENOUGH_CORE):
res = LV_FS_RES_OUT_OF_MEM;
break;
case (FR_LOCKED):
res = LV_FS_RES_LOCKED;
case (FR_TOO_MANY_OPEN_FILES):
res = LV_FS_RES_LOCKED;
break;
case (FR_NO_FILESYSTEM):
res = LV_FS_RES_FS_ERR;
break;
case (FR_WRITE_PROTECTED):
res = LV_FS_RES_DENIED;
break;
case (FR_TIMEOUT):
res = LV_FS_RES_TOUT;
break;
default:
res = LV_FS_RES_UNKNOWN;
switch (res) {
case (FR_DISK_ERR):
res = LV_FS_RES_HW_ERR;
break;
case (FR_NO_FILE):
res = LV_FS_RES_NOT_EX;
break;
case (FR_NO_PATH):
res = LV_FS_RES_NOT_EX;
break;
case (FR_NOT_ENOUGH_CORE):
res = LV_FS_RES_OUT_OF_MEM;
break;
case (FR_LOCKED):
res = LV_FS_RES_LOCKED;
case (FR_TOO_MANY_OPEN_FILES):
res = LV_FS_RES_LOCKED;
break;
case (FR_NO_FILESYSTEM):
res = LV_FS_RES_FS_ERR;
break;
case (FR_WRITE_PROTECTED):
res = LV_FS_RES_DENIED;
break;
case (FR_TIMEOUT):
res = LV_FS_RES_TOUT;
break;
default:
res = LV_FS_RES_UNKNOWN;
}
return res;
}
/* Initialize your Storage device and File system. */
static void fs_init(void)
{
@ -162,8 +169,7 @@ static void fs_init(void)
/*You code here*/
fatfs_sd_driver_register();
f_mount(&FS_OBJ_SD,"sd:",1);
f_mount(&FS_OBJ_SD, "sd:", 1);
}
/**
@ -174,38 +180,39 @@ static void fs_init(void)
* @param mode read: FS_MODE_RD, write: FS_MODE_WR, both: FS_MODE_RD | FS_MODE_WR
* @return LV_FS_RES_OK or any error from lv_fs_res_t enum
*/
static lv_fs_res_t fs_open (lv_fs_drv_t * drv, void * file_p, const char * path, lv_fs_mode_t mode)
static lv_fs_res_t fs_open(lv_fs_drv_t *drv, void *file_p, const char *path, lv_fs_mode_t mode)
{
lv_fs_res_t res = LV_FS_RES_NOT_IMP;
BYTE fatfs_mode;
char *path_buf = NULL;
switch (drv->letter)
{
case 'S':
path_buf = (char *)lv_mem_alloc(sizeof(char) * (strlen(path) + 4));
sprintf(path_buf, "SD:/%s", path);
break;
default:
return LV_FS_RES_NOT_EX;
break;
switch (drv->letter) {
case 'S':
path_buf = (char *)lv_mem_alloc(sizeof(char) * (strlen(path) + 4));
sprintf(path_buf, "SD:/%s", path);
break;
default:
return LV_FS_RES_NOT_EX;
break;
}
switch (mode)
{
case (LV_FS_MODE_RD):
fatfs_mode = FA_READ;
break;
case (LV_FS_MODE_WR):
fatfs_mode = FA_WRITE;
break;
case (LV_FS_MODE_WR|LV_FS_MODE_RD):
fatfs_mode = FA_WRITE|FA_READ;
break;
default:
fatfs_mode = LV_FS_MODE_RD;
break;
switch (mode) {
case (LV_FS_MODE_RD):
fatfs_mode = FA_READ;
break;
case (LV_FS_MODE_WR):
fatfs_mode = FA_WRITE;
break;
case (LV_FS_MODE_WR | LV_FS_MODE_RD):
fatfs_mode = FA_WRITE | FA_READ;
break;
default:
fatfs_mode = LV_FS_MODE_RD;
break;
}
res = f_open((file_t *)file_p, path_buf, fatfs_mode);
@ -222,7 +229,7 @@ static lv_fs_res_t fs_open (lv_fs_drv_t * drv, void * file_p, const char * path,
* @return LV_FS_RES_OK: no error, the file is read
* any error from lv_fs_res_t enum
*/
static lv_fs_res_t fs_close (lv_fs_drv_t * drv, void * file_p)
static lv_fs_res_t fs_close(lv_fs_drv_t *drv, void *file_p)
{
lv_fs_res_t res = LV_FS_RES_NOT_IMP;
@ -243,7 +250,7 @@ static lv_fs_res_t fs_close (lv_fs_drv_t * drv, void * file_p)
* @return LV_FS_RES_OK: no error, the file is read
* any error from lv_fs_res_t enum
*/
static lv_fs_res_t fs_read (lv_fs_drv_t * drv, void * file_p, void * buf, uint32_t btr, uint32_t * br)
static lv_fs_res_t fs_read(lv_fs_drv_t *drv, void *file_p, void *buf, uint32_t btr, uint32_t *br)
{
lv_fs_res_t res = LV_FS_RES_NOT_IMP;
@ -263,7 +270,7 @@ static lv_fs_res_t fs_read (lv_fs_drv_t * drv, void * file_p, void * buf, uint32
* @param br the number of real written bytes (Bytes Written). NULL if unused.
* @return LV_FS_RES_OK or any error from lv_fs_res_t enum
*/
static lv_fs_res_t fs_write(lv_fs_drv_t * drv, void * file_p, const void * buf, uint32_t btw, uint32_t * bw)
static lv_fs_res_t fs_write(lv_fs_drv_t *drv, void *file_p, const void *buf, uint32_t btw, uint32_t *bw)
{
lv_fs_res_t res = LV_FS_RES_NOT_IMP;
@ -282,7 +289,7 @@ static lv_fs_res_t fs_write(lv_fs_drv_t * drv, void * file_p, const void * buf,
* @return LV_FS_RES_OK: no error, the file is read
* any error from lv_fs_res_t enum
*/
static lv_fs_res_t fs_seek (lv_fs_drv_t * drv, void * file_p, uint32_t pos)
static lv_fs_res_t fs_seek(lv_fs_drv_t *drv, void *file_p, uint32_t pos)
{
lv_fs_res_t res = LV_FS_RES_NOT_IMP;
@ -300,7 +307,7 @@ static lv_fs_res_t fs_seek (lv_fs_drv_t * drv, void * file_p, uint32_t pos)
* @param size pointer to a variable to store the size
* @return LV_FS_RES_OK or any error from lv_fs_res_t enum
*/
static lv_fs_res_t fs_size (lv_fs_drv_t * drv, void * file_p, uint32_t * size_p)
static lv_fs_res_t fs_size(lv_fs_drv_t *drv, void *file_p, uint32_t *size_p)
{
//lv_fs_res_t res = LV_FS_RES_NOT_IMP;
@ -316,7 +323,7 @@ static lv_fs_res_t fs_size (lv_fs_drv_t * drv, void * file_p, uint32_t * size_p)
* @return LV_FS_RES_OK: no error, the file is read
* any error from lv_fs_res_t enum
*/
static lv_fs_res_t fs_tell (lv_fs_drv_t * drv, void * file_p, uint32_t * pos_p)
static lv_fs_res_t fs_tell(lv_fs_drv_t *drv, void *file_p, uint32_t *pos_p)
{
//lv_fs_res_t res = LV_FS_RES_NOT_IMP;
@ -331,22 +338,22 @@ static lv_fs_res_t fs_tell (lv_fs_drv_t * drv, void * file_p, uint32_t * pos_p)
* @param path path of the file to delete
* @return LV_FS_RES_OK or any error from lv_fs_res_t enum
*/
static lv_fs_res_t fs_remove (lv_fs_drv_t * drv, const char *path)
static lv_fs_res_t fs_remove(lv_fs_drv_t *drv, const char *path)
{
lv_fs_res_t res = LV_FS_RES_NOT_IMP;
/* Add your code here*/
char *path_buf = NULL;
switch (drv->letter)
{
case 'S':
path_buf = (char *)lv_mem_alloc(sizeof(char) * (strlen(path) + 4));
sprintf(path_buf, "SD:/%s", path);
break;
default:
return LV_FS_RES_NOT_EX;
break;
switch (drv->letter) {
case 'S':
path_buf = (char *)lv_mem_alloc(sizeof(char) * (strlen(path) + 4));
sprintf(path_buf, "SD:/%s", path);
break;
default:
return LV_FS_RES_NOT_EX;
break;
}
res = f_unlink(path_buf);
@ -363,14 +370,14 @@ static lv_fs_res_t fs_remove (lv_fs_drv_t * drv, const char *path)
* @return LV_FS_RES_OK: no error, the file is read
* any error from lv_fs_res_t enum
*/
static lv_fs_res_t fs_trunc (lv_fs_drv_t * drv, void * file_p)
static lv_fs_res_t fs_trunc(lv_fs_drv_t *drv, void *file_p)
{
lv_fs_res_t res = LV_FS_RES_NOT_IMP;
/* Add your code here*/
res = f_truncate((file_t *)file_p);
res = res_fatfs_to_lv(res);
return res;
}
@ -381,25 +388,25 @@ static lv_fs_res_t fs_trunc (lv_fs_drv_t * drv, void * file_p)
* @param newname path with the new name
* @return LV_FS_RES_OK or any error from 'fs_res_t'
*/
static lv_fs_res_t fs_rename (lv_fs_drv_t * drv, const char * oldname, const char * newname)
static lv_fs_res_t fs_rename(lv_fs_drv_t *drv, const char *oldname, const char *newname)
{
lv_fs_res_t res = LV_FS_RES_NOT_IMP;
/* Add your code here*/
char *path_old_buf = NULL;
char *path_new_buf = NULL;
switch (drv->letter)
{
case 'S':
path_old_buf = (char *)lv_mem_alloc(sizeof(char) * (strlen(oldname) + 4));
path_new_buf = (char *)lv_mem_alloc(sizeof(char) * (strlen(newname) + 4));
sprintf(path_old_buf, "SD:/%s", oldname);
sprintf(path_new_buf, "SD:/%s", newname);
break;
default:
return LV_FS_RES_NOT_EX;
break;
switch (drv->letter) {
case 'S':
path_old_buf = (char *)lv_mem_alloc(sizeof(char) * (strlen(oldname) + 4));
path_new_buf = (char *)lv_mem_alloc(sizeof(char) * (strlen(newname) + 4));
sprintf(path_old_buf, "SD:/%s", oldname);
sprintf(path_new_buf, "SD:/%s", newname);
break;
default:
return LV_FS_RES_NOT_EX;
break;
}
res = f_rename(path_old_buf, path_new_buf);
@ -418,27 +425,27 @@ static lv_fs_res_t fs_rename (lv_fs_drv_t * drv, const char * oldname, const cha
* @param free_p pointer to store the free size [kB]
* @return LV_FS_RES_OK or any error from lv_fs_res_t enum
*/
static lv_fs_res_t fs_free (lv_fs_drv_t * drv, uint32_t * total_p, uint32_t * free_p)
static lv_fs_res_t fs_free(lv_fs_drv_t *drv, uint32_t *total_p, uint32_t *free_p)
{
lv_fs_res_t res = LV_FS_RES_NOT_IMP;
char *path = NULL;
FATFS *fs_obj;
/* Add your code here*/
switch (drv->letter)
{
case 'S':
path = "SD:";
fs_obj = &FS_OBJ_SD;
break;
default:
return LV_FS_RES_NOT_EX;
break;
switch (drv->letter) {
case 'S':
path = "SD:";
fs_obj = &FS_OBJ_SD;
break;
default:
return LV_FS_RES_NOT_EX;
break;
}
res = f_getfree(path , free_p, &fs_obj);
res = f_getfree(path, free_p, &fs_obj);
*free_p = (fs_obj->csize) * (*free_p) / 1024;
*total_p = (fs_obj->csize) * (fs_obj->n_fatent - 2) /1024;
*total_p = (fs_obj->csize) * (fs_obj->n_fatent - 2) / 1024;
res = res_fatfs_to_lv(res);
return res;
@ -451,22 +458,22 @@ static lv_fs_res_t fs_free (lv_fs_drv_t * drv, uint32_t * total_p, uint32_t * fr
* @param path path to a directory
* @return LV_FS_RES_OK or any error from lv_fs_res_t enum
*/
static lv_fs_res_t fs_dir_open (lv_fs_drv_t * drv, void * rddir_p, const char *path)
static lv_fs_res_t fs_dir_open(lv_fs_drv_t *drv, void *rddir_p, const char *path)
{
lv_fs_res_t res = LV_FS_RES_NOT_IMP;
/* Add your code here*/
char *path_buf = NULL;
switch (drv->letter)
{
case 'S':
path_buf = (char *)lv_mem_alloc(sizeof(char) * (strlen(path) + 4));
sprintf(path_buf, "SD:/%s", path);
break;
default:
return LV_FS_RES_NOT_EX;
break;
switch (drv->letter) {
case 'S':
path_buf = (char *)lv_mem_alloc(sizeof(char) * (strlen(path) + 4));
sprintf(path_buf, "SD:/%s", path);
break;
default:
return LV_FS_RES_NOT_EX;
break;
}
res = f_opendir(rddir_p, path_buf);
@ -484,7 +491,7 @@ static lv_fs_res_t fs_dir_open (lv_fs_drv_t * drv, void * rddir_p, const char *p
* @param fn pointer to a buffer to store the filename
* @return LV_FS_RES_OK or any error from lv_fs_res_t enum
*/
static lv_fs_res_t fs_dir_read (lv_fs_drv_t * drv, void * rddir_p, char *fn)
static lv_fs_res_t fs_dir_read(lv_fs_drv_t *drv, void *rddir_p, char *fn)
{
lv_fs_res_t res = LV_FS_RES_NOT_IMP;
FILINFO entry;
@ -493,9 +500,8 @@ static lv_fs_res_t fs_dir_read (lv_fs_drv_t * drv, void * rddir_p, char *fn)
res = f_readdir(rddir_p, &entry);
res = res_fatfs_to_lv(res);
if(res == LV_FS_RES_OK)
{
sprintf(fn,"%s%s",(entry.fattrib & AM_DIR)? "/" : "", entry.fname);
if (res == LV_FS_RES_OK) {
sprintf(fn, "%s%s", (entry.fattrib & AM_DIR) ? "/" : "", entry.fname);
}
return res;
@ -507,12 +513,12 @@ static lv_fs_res_t fs_dir_read (lv_fs_drv_t * drv, void * rddir_p, char *fn)
* @param rddir_p pointer to an initialized 'lv_fs_dir_t' variable
* @return LV_FS_RES_OK or any error from lv_fs_res_t enum
*/
static lv_fs_res_t fs_dir_close (lv_fs_drv_t * drv, void * rddir_p)
static lv_fs_res_t fs_dir_close(lv_fs_drv_t *drv, void *rddir_p)
{
lv_fs_res_t res = LV_FS_RES_NOT_IMP;
/* Add your code here*/
f_closedir((dir_t*)rddir_p);
f_closedir((dir_t *)rddir_p);
res = res_fatfs_to_lv(res);
return res;
}

2
bsp/bsp_common/lvgl/lv_port_fs.h
View file

@ -3,7 +3,7 @@
*
*/
/*Copy this file as "lv_port_fs.h" and set this value to "1" to enable content*/
/*Copy this file as "lv_port_fs.h" and set this value to "1" to enable content*/
#if 1
#ifndef LV_PORT_FS_TEMPL_H

132
bsp/bsp_common/lvgl/lv_port_indev.c
View file

@ -3,7 +3,7 @@
*
*/
/*Copy this file as "lv_port_indev.c" and set this value to "1" to enable content*/
/*Copy this file as "lv_port_indev.c" and set this value to "1" to enable content*/
#if 1
/*********************
@ -25,9 +25,9 @@
**********************/
static void touchpad_init(void);
static bool touchpad_read(lv_indev_drv_t * indev_drv, lv_indev_data_t * data);
static bool touchpad_read(lv_indev_drv_t *indev_drv, lv_indev_data_t *data);
//static bool touchpad_is_pressed(void);
static lv_coord_t touchpad_get_xy(lv_coord_t * x, lv_coord_t * y);
static lv_coord_t touchpad_get_xy(lv_coord_t *x, lv_coord_t *y);
// static void mouse_init(void);
// static bool mouse_read(lv_indev_drv_t * indev_drv, lv_indev_data_t * data);
@ -35,7 +35,7 @@ static lv_coord_t touchpad_get_xy(lv_coord_t * x, lv_coord_t * y);
// static void mouse_get_xy(lv_coord_t * x, lv_coord_t * y);
static void keypad_init(void);
static bool keypad_read(lv_indev_drv_t * indev_drv, lv_indev_data_t * data);
static bool keypad_read(lv_indev_drv_t *indev_drv, lv_indev_data_t *data);
static uint32_t keypad_get_key(void);
// static void encoder_init(void);
@ -50,9 +50,9 @@ static uint32_t keypad_get_key(void);
/**********************
* STATIC VARIABLES
**********************/
lv_indev_t * indev_touchpad;
lv_indev_t *indev_touchpad;
//lv_indev_t * indev_mouse;
lv_indev_t * indev_keypad;
lv_indev_t *indev_keypad;
//lv_indev_t * indev_encoder;
//lv_indev_t * indev_button;
@ -188,14 +188,14 @@ static void touchpad_init(void)
}
/* Will be called by the library to read the touchpad */
static bool touchpad_read(lv_indev_drv_t * indev_drv, lv_indev_data_t * data)
static bool touchpad_read(lv_indev_drv_t *indev_drv, lv_indev_data_t *data)
{
static lv_coord_t last_x = 0;
static lv_coord_t last_y = 0;
lv_coord_t xt,yt;
lv_coord_t xt, yt;
/*Save the pressed coordinates and the state*/
if(touchpad_get_xy(&xt,&yt)) {
if (touchpad_get_xy(&xt, &yt)) {
last_x = xt;
last_y = yt;
data->state = LV_INDEV_STATE_PR;
@ -208,7 +208,7 @@ static bool touchpad_read(lv_indev_drv_t * indev_drv, lv_indev_data_t * data)
data->point.y = last_y;
/*Return `false` because we are not buffering and no more data to read*/
return false;
return false;
}
/*Return true is the touchpad is pressed*/
@ -219,18 +219,20 @@ static bool touchpad_read(lv_indev_drv_t * indev_drv, lv_indev_data_t * data)
// }
/*Get the x and y coordinates if the touchpad is pressed*/
static lv_coord_t touchpad_get_xy(lv_coord_t * x, lv_coord_t * y)
static lv_coord_t touchpad_get_xy(lv_coord_t *x, lv_coord_t *y)
{
/*Your code comes here*/
lv_disp_t *p_disp_drv_cb;
lv_disp_t *p_disp_drv_cb;
uint8_t res;
p_disp_drv_cb = lv_disp_get_default();
while(p_disp_drv_cb->driver.buffer->flushing);
device_control(touch_spi, DEVICE_CTRL_SPI_CONFIG_CLOCK, (void*)3600000);
res = touch_read(x,y);
device_control(touch_spi, DEVICE_CTRL_SPI_CONFIG_CLOCK, (void*)36000000);
while (p_disp_drv_cb->driver.buffer->flushing)
;
device_control(touch_spi, DEVICE_CTRL_SPI_CONFIG_CLOCK, (void *)3600000);
res = touch_read(x, y);
device_control(touch_spi, DEVICE_CTRL_SPI_CONFIG_CLOCK, (void *)36000000);
return res;
}
@ -283,14 +285,14 @@ static lv_coord_t touchpad_get_xy(lv_coord_t * x, lv_coord_t * y)
* -----------------*/
#include "hal_adc.h"
#include "hal_gpio.h"
uint8_t PinList[] = {GPIO_PIN_18};
adc_channel_t posChList[] = {ADC_CHANNEL8};
adc_channel_t negChList[] = {ADC_CHANNEL_GND};
uint8_t PinList[] = { GPIO_PIN_18 };
adc_channel_t posChList[] = { ADC_CHANNEL8 };
adc_channel_t negChList[] = { ADC_CHANNEL_GND };
adc_channel_val_t result_val;
struct device* adc_key;
struct device *adc_key;
uint16_t key_value[] = {283,89,198,0,406};
uint16_t key_value[] = { 283, 89, 198, 0, 406 };
/* Initialize your keypad */
static void keypad_init(void)
@ -305,17 +307,17 @@ static void keypad_init(void)
adc_register(ADC0_INDEX, "adc_key", DEVICE_OFLAG_STREAM_RX);
adc_key = device_find("adc_key");
if(adc_key)
{
if (adc_key) {
ADC_DEV(adc_key)->continuous_conv_mode = ENABLE;
device_open(adc_key, DEVICE_OFLAG_STREAM_RX);
device_control(adc_key,DEVICE_CTRL_ADC_CHANNEL_CONFIG,&adc_channel_cfg);
device_control(adc_key, DEVICE_CTRL_ADC_CHANNEL_CONFIG, &adc_channel_cfg);
adc_channel_start(adc_key);
}
}
/* Will be called by the library to read the keypad */
static bool keypad_read(lv_indev_drv_t * indev_drv, lv_indev_data_t * data)
static bool keypad_read(lv_indev_drv_t *indev_drv, lv_indev_data_t *data)
{
static uint32_t last_key = 0;
@ -324,30 +326,38 @@ static bool keypad_read(lv_indev_drv_t * indev_drv, lv_indev_data_t * data)
/*Get whether the a key is pressed and save the pressed key*/
uint32_t act_key = keypad_get_key();
if(act_key != 0) {
if (act_key != 0) {
data->state = LV_INDEV_STATE_PR;
/*Translate the keys to LVGL control characters according to your key definitions*/
switch(act_key) {
case 1:
act_key = LV_KEY_LEFT;
break;
case 2:
act_key = LV_KEY_RIGHT;
break;
case 3:
act_key = LV_KEY_UP;
break;
case 4:
act_key = LV_KEY_DOWN;
break;
case 5:
act_key = LV_KEY_ENTER;
break;
default:
break;
switch (act_key) {
case 1:
act_key = LV_KEY_LEFT;
break;
case 2:
act_key = LV_KEY_RIGHT;
break;
case 3:
act_key = LV_KEY_UP;
break;
case 4:
act_key = LV_KEY_DOWN;
break;
case 5:
act_key = LV_KEY_ENTER;
break;
default:
break;
}
last_key = act_key;
} else {
data->state = LV_INDEV_STATE_REL;
}
@ -367,42 +377,36 @@ static uint32_t keypad_get_key(void)
uint8_t key;
uint16_t key_voltage;
/*Your code comes here*/
device_read(adc_key, 0, (void *)&result_val,sizeof(result_val)/sizeof(adc_channel_val_t));
device_read(adc_key, 0, (void *)&result_val, sizeof(result_val) / sizeof(adc_channel_val_t));
key_voltage = result_val.volt * 1000;
for(key=0;key<sizeof(key_value)/sizeof(key_value[0]);key++)
{
if(DIFF(key_voltage,key_value[key]) < KEY_ADC_DIFF_MAX )
{
for (key = 0; key < sizeof(key_value) / sizeof(key_value[0]); key++) {
if (DIFF(key_voltage, key_value[key]) < KEY_ADC_DIFF_MAX) {
break;
}
}
key+=1;
if( key > sizeof(key_value))
{
key += 1;
if (key > sizeof(key_value)) {
key = 0;
}
if(key == last_key)
{
if (key == last_key) {
old_key_v = key;
old_key_num = 0;
}
else if(key==old_key_v)
{
} else if (key == old_key_v) {
old_key_num++;
if(old_key_num >= KEY_NOISE_NUM_MAX)
{
if (old_key_num >= KEY_NOISE_NUM_MAX) {
last_key = key;
old_key_num = 0;
}
}
else
{
} else {
old_key_num = 0;
old_key_v = key;
}
return last_key;
}

8
bsp/bsp_common/lvgl/lv_port_indev.h
View file

@ -4,7 +4,7 @@
*
*/
/*Copy this file as "lv_port_indev.h" and set this value to "1" to enable content*/
/*Copy this file as "lv_port_indev.h" and set this value to "1" to enable content*/
#if 1
#ifndef LV_PORT_INDEV_TEMPL_H
@ -23,7 +23,7 @@ extern "C" {
* DEFINES
*********************/
#define KEY_ADC_DIFF_MAX 15
#define DIFF(x,y) (((x)>(y))?((x)-(y)):((y)-(x)))
#define DIFF(x, y) (((x) > (y)) ? ((x) - (y)) : ((y) - (x)))
#define KEY_NOISE_NUM_MAX 2
@ -37,9 +37,9 @@ extern "C" {
/**********************
* STATIC VARIABLES
**********************/
extern lv_indev_t * indev_touchpad;
extern lv_indev_t *indev_touchpad;
//extern lv_indev_t * indev_mouse;
extern lv_indev_t * indev_keypad;
extern lv_indev_t *indev_keypad;
//extern lv_indev_t * indev_encoder;
//extern lv_indev_t * indev_button;

1
bsp/bsp_common/lwip/emac_phy.c Normal file
View file

@ -0,0 +1 @@
#include "phy_8720.c"

402
bsp/bsp_common/lwip/ethernetif.c Normal file
View file

@ -0,0 +1,402 @@
/**
* @file ethernetif.h
* @brief
*
* Copyright (c) 2021 Bouffalolab team
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
*/
/* Includes ------------------------------------------------------------------*/
#include "lwip/opt.h"
#include "lwip/timeouts.h"
#include "lwip/netif.h"
#include "netif/etharp.h"
#include "ethernetif.h"
#include <string.h>
#include "hal_emac.h"
#include <FreeRTOS.h>
#include "semphr.h"
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Network interface name */
#define IFNAME0 'b'
#define IFNAME1 'l'
#define ETH_RX_BUFFER_SIZE (1536UL)
#define ETH_DMA_TRANSMIT_TIMEOUT (20U)
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/*
@Note: This interface is implemented to operate in zero-copy mode only:
- Rx buffers are allocated statically and passed directly to the LwIP stack,
they will return back to ETH DMA after been processed by the stack.
- Tx Buffers will be allocated from LwIP stack memory heap,
then passed to ETH HAL driver.
@Notes:
1.a. ETH DMA Rx descriptors must be contiguous, the default count is 4,
to customize it please redefine ETH_RX_DESC_CNT in stm32xxxx_hal_conf.h
1.b. ETH DMA Tx descriptors must be contiguous, the default count is 4,
to customize it please redefine ETH_TX_DESC_CNT in stm32xxxx_hal_conf.h
2.a. Rx Buffers number must be between ETH_RX_DESC_CNT and 2*ETH_RX_DESC_CNT
2.b. Rx Buffers must have the same size: ETH_RX_BUFFER_SIZE, this value must
passed to ETH DMA in the init field (EthHandle.Init.RxBuffLen)
2.c The RX Ruffers addresses and sizes must be properly defined to be aligned
to L1-CACHE line size (32 bytes).
*/
#if LWIP_DHCP
#define MAX_DHCP_TRIES 4
uint32_t DHCPfineTimer = 0;
uint8_t DHCP_state = DHCP_OFF;
#endif
/* Private function prototypes -----------------------------------------------*/
void pbuf_free_custom(struct pbuf *p);
void ethernetif_input(void *argument);
SemaphoreHandle_t emac_rx_sem = NULL;
static StackType_t emac_rx_stack[256];
static StaticTask_t emac_rx_handle;
static uint8_t emac_rx_buffer[ETH_RX_BUFFER_SIZE] __attribute__((aligned(16))) = { 0 };
LWIP_MEMPOOL_DECLARE(RX_POOL, 10, sizeof(struct pbuf_custom), "Zero-copy RX PBUF pool");
/* Private functions ---------------------------------------------------------*/
/*******************************************************************************
LL Driver Interface ( LwIP stack --> ETH)
*******************************************************************************/
/**
* @brief In this function, the hardware should be initialized.
* Called from ethernetif_init().
*
* @param netif the already initialized lwip network interface structure
* for this ethernetif
*/
extern void emac_init_txrx_buffer(void);
extern int emac_phy_init(emac_phy_cfg_t *cfg);
void low_level_init(struct netif *netif)
{
emac_device_t emac_cfg = {
.mac_addr[0] = 0x18,
.mac_addr[1] = 0xB9,
.mac_addr[2] = 0x05,
.mac_addr[3] = 0x12,
.mac_addr[4] = 0x34,
.mac_addr[5] = 0x56,
};
/* set MAC hardware address length */
netif->hwaddr_len = ETH_HWADDR_LEN;
/* set MAC hardware address */
netif->hwaddr[0] = emac_cfg.mac_addr[0];
netif->hwaddr[1] = emac_cfg.mac_addr[1];
netif->hwaddr[2] = emac_cfg.mac_addr[2];
netif->hwaddr[3] = emac_cfg.mac_addr[3];
netif->hwaddr[4] = emac_cfg.mac_addr[4];
netif->hwaddr[5] = emac_cfg.mac_addr[5];
/* maximum transfer unit */
netif->mtu = 1500;
/* emac init,configure ethernet peripheral (GPIOs, clocks, MAC, DMA) */
MSG("emac_init\r\n");
emac_init(&emac_cfg);
emac_phy_init(NULL);
emac_init_txrx_buffer();
/* device capabilities */
/* don't set NETIF_FLAG_ETHARP if this device is not an ethernet one */
netif->flags |= NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP;
/* Initialize the RX POOL */
LWIP_MEMPOOL_INIT(RX_POOL);
/* create a binary semaphore used for informing ethernetif of frame reception */
//vSemaphoreCreateBinary(emac_rx_sem);
emac_rx_sem = xSemaphoreCreateBinary();
/* create the task that handles the ETH_MAC */
MSG("[OS] Starting emac rx task...\r\n");
xTaskCreateStatic(ethernetif_input, (char *)"emac_rx_task", sizeof(emac_rx_stack) / 4, netif, 15, emac_rx_stack, &emac_rx_handle);
//xTaskCreateStatic(test_task, (char*)"test_task", sizeof(test_stack)/4, NULL, 16, test_stack, &test_handle);
ethernet_link_check_state(netif);
netif_set_up(netif);
netif_set_link_up(netif);
}
void emac_tx_error_callback_app()
{
MSG("EMAC tx error callback\r\n");
}
void emac_rx_error_callback_app()
{
MSG("EMAC rx error callback\r\n");
}
/**
* @brief This function should do the actual transmission of the packet. The packet is
* contained in the pbuf that is passed to the function. This pbuf
* might be chained.
*
* @param netif the lwip network interface structure for this ethernetif
* @param p the MAC packet to send (e.g. IP packet including MAC addresses and type)
* @return ERR_OK if the packet could be sent
* an err_t value if the packet couldn't be sent
*
* @note Returning ERR_MEM here if a DMA queue of your MAC is full can lead to
* strange results. You might consider waiting for space in the DMA queue
* to become available since the stack doesn't retry to send a packet
* dropped because of memory failure (except for the TCP timers).
*/
static err_t low_level_output(struct netif *netif, struct pbuf *p)
{
err_t errval = ERR_OK;
struct pbuf *q;
for (q = p; q != NULL; q = q->next) {
if (0 != emac_bd_tx_enqueue(-1, q->len, q->payload)) {
MSG("emac_bd_tx_enqueue error!\r\n");
return ERR_IF;
}
}
return errval;
}
/**
* @brief Should allocate a pbuf and transfer the bytes of the incoming
* packet from the interface into the pbuf.
*
* @param netif the lwip network interface structure for this ethernetif
* @return a pbuf filled with the received packet (including MAC header)
* NULL on memory error
*/
static struct pbuf *low_level_input(struct netif *netif)
{
uint32_t rx_len = 0;
struct pbuf *p = NULL, *q;
emac_bd_rx_dequeue(-1, &rx_len, emac_rx_buffer);
if (rx_len <= 0) {
//MSG("Recv Null Data\r\n");
return NULL;
}
//MSG("Recv full Data\r\n");
p = pbuf_alloc(PBUF_RAW, rx_len, PBUF_POOL);
if (p != NULL) {
for (q = p; q != NULL; q = q->next) {
memcpy(q->payload, emac_rx_buffer + rx_len - q->tot_len, q->len);
}
}
return p;
}
void emac_rx_done_callback_app(void)
{
BaseType_t xHigherPriorityTaskWoken;
/* Is it time for vATask() to run? */
xHigherPriorityTaskWoken = pdFALSE;
//MSG("emac_rx_done_callback_app\r\n");
//low_level_input(NULL);
xSemaphoreGiveFromISR(emac_rx_sem, &xHigherPriorityTaskWoken);
/* If xHigherPriorityTaskWoken was set to true you
we should yield. The actual macro used here is
port specific. */
portYIELD_FROM_ISR(xHigherPriorityTaskWoken);
}
/**
* @brief This function is the ethernetif_input task, it is processed when a packet
* is ready to be read from the interface. It uses the function low_level_input()
* that should handle the actual reception of bytes from the network
* interface. Then the type of the received packet is determined and
* the appropriate input function is called.
*
* @param netif the lwip network interface structure for this ethernetif
*/
void ethernetif_input(void *argument)
{
struct pbuf *p = NULL;
struct netif *netif = (struct netif *)argument;
for (;;) {
if (xSemaphoreTake(emac_rx_sem, portMAX_DELAY) == pdTRUE) {
do {
//MSG("ethernetif_input\r\n");
p = low_level_input(netif);
if (p != NULL) {
if (netif->input(p, netif) != ERR_OK) {
pbuf_free(p);
}
}
} while (p != NULL);
}
}
}
/**
* @brief Should be called at the beginning of the program to set up the
* network interface. It calls the function low_level_init() to do the
* actual setup of the hardware.
*
* This function should be passed as a parameter to netif_add().
*
* @param netif the lwip network interface structure for this ethernetif
* @return ERR_OK if the loopif is initialized
* ERR_MEM if private data couldn't be allocated
* any other err_t on error
*/
err_t ethernetif_init(struct netif *netif)
{
LWIP_ASSERT("netif != NULL", (netif != NULL));
#if LWIP_NETIF_HOSTNAME
/* Initialize interface hostname */
netif->hostname = "lwip";
#endif /* LWIP_NETIF_HOSTNAME */
netif->name[0] = IFNAME0;
netif->name[1] = IFNAME1;
/* We directly use etharp_output() here to save a function call.
* You can instead declare your own function an call etharp_output()
* from it if you have to do some checks before sending (e.g. if link
* is available...) */
netif->output = etharp_output;
netif->linkoutput = low_level_output;
/* initialize the hardware */
low_level_init(netif);
return ERR_OK;
}
/**
* @brief Custom Rx pbuf free callback
* @param pbuf: pbuf to be freed
* @retval None
*/
void pbuf_free_custom(struct pbuf *p)
{
struct pbuf_custom *custom_pbuf = (struct pbuf_custom *)p;
LWIP_MEMPOOL_FREE(RX_POOL, custom_pbuf);
}
/**
* @brief Notify the User about the network interface config status
* @param netif: the network interface
* @retval None
*/
void ethernet_link_status_updated(struct netif *netif)
{
if (netif_is_link_up(netif)) {
#if LWIP_DHCP
/* Update DHCP state machine */
DHCP_state = DHCP_START;
MSG("DHCP Start\n");
#else
uint8_t iptxt[20];
sprintf((char *)iptxt, "%s", ip4addr_ntoa(netif_ip4_addr(netif)));
MSG("Static IP address: %s\n", iptxt);
#endif
} else {
#if LWIP_DHCP
/* Update DHCP state machine */
DHCP_state = DHCP_LINK_DOWN;
#else
MSG("The network cable is not connected \n");
#endif /* LWIP_DHCP */
}
}
/**
* @brief
* @retval None
*/
void ethernet_link_check_state(struct netif *netif)
{
#if 0
ETH_MACConfigTypeDef MACConf;
uint32_t PHYLinkState;
uint32_t linkchanged = 0, speed = 0, duplex = 0;
PHYLinkState = LAN8742_GetLinkState(&LAN8742);
if(netif_is_link_up(netif) && (PHYLinkState <= LAN8742_STATUS_LINK_DOWN))
{
HAL_ETH_Stop(&EthHandle);
netif_set_down(netif);
netif_set_link_down(netif);
}
else if(!netif_is_link_up(netif) && (PHYLinkState > LAN8742_STATUS_LINK_DOWN))
{
switch(PHYLinkState)
{
case LAN8742_STATUS_100MBITS_FULLDUPLEX:
duplex = ETH_FULLDUPLEX_MODE;
speed = ETH_SPEED_100M;
linkchanged = 1;
break;
case LAN8742_STATUS_100MBITS_HALFDUPLEX:
duplex = ETH_HALFDUPLEX_MODE;
speed = ETH_SPEED_100M;
linkchanged = 1;
break;
case LAN8742_STATUS_10MBITS_FULLDUPLEX:
duplex = ETH_FULLDUPLEX_MODE;
speed = ETH_SPEED_10M;
linkchanged = 1;
break;
case LAN8742_STATUS_10MBITS_HALFDUPLEX:
duplex = ETH_HALFDUPLEX_MODE;
speed = ETH_SPEED_10M;
linkchanged = 1;
break;
default:
break;
}
if(linkchanged)
{
/* Get MAC Config MAC */
HAL_ETH_GetMACConfig(&EthHandle, &MACConf);
MACConf.DuplexMode = duplex;
MACConf.Speed = speed;
HAL_ETH_SetMACConfig(&EthHandle, &MACConf);
HAL_ETH_Start(&EthHandle);
netif_set_up(netif);
netif_set_link_up(netif);
}
}
#endif
}

40
bsp/bsp_common/lwip/ethernetif.h Normal file
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@ -0,0 +1,40 @@
/**
* @file ethernetif.h
* @brief
*
* Copyright (c) 2021 Bouffalolab team
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
*/
#ifndef __ETHERNETIF_H__
#define __ETHERNETIF_H__
#include "lwip/err.h"
#include "lwip/netif.h"
#define DHCP_OFF (uint8_t)0
#define DHCP_START (uint8_t)1
#define DHCP_WAIT_ADDRESS (uint8_t)2
#define DHCP_ADDRESS_ASSIGNED (uint8_t)3
#define DHCP_TIMEOUT (uint8_t)4
#define DHCP_LINK_DOWN (uint8_t)5
/* Exported types ------------------------------------------------------------*/
err_t ethernetif_init(struct netif *netif);
void ethernet_link_check_state(struct netif *netif);
void ethernet_link_status_updated(struct netif *netif);
#endif

318
bsp/bsp_common/lwip/phy_8720.c Normal file
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@ -0,0 +1,318 @@
#include <string.h>
#include "hal_emac.h"
/* LAN8720 PHY Address*/
#define EMAC_PHY_ADDRESS 0x00U
#define PHY_LINK_TO ((uint32_t)0x00000FFFU)
#define PHY_AUTONEGO_COMPLETED_TO ((uint32_t)0x00000FFFU)
/* Section 3: Common PHY Registers */
#define PHY_BCR ((uint16_t)0x00U) /*!< Transceiver Basic Control Register */
#define PHY_BSR ((uint16_t)0x01U) /*!< Transceiver Basic Status Register */
#define PHY_BSR_100BASETXFULL (1 << 14)
#define PHY_BSR_100BASETXHALF (1 << 13)
#define PHY_BSR_10BASETXFULL (1 << 12)
#define PHY_BSR_10BASETXHALF (1 << 11)
#define PHY_RESET ((uint16_t)0x8000U) /*!< PHY Reset */
#define PHY_LOOPBACK ((uint16_t)0x4000U) /*!< Select loop-back mode */
#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100U) /*!< Set the full-duplex mode at 100 Mb/s */
#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000U) /*!< Set the half-duplex mode at 100 Mb/s */
#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100U) /*!< Set the full-duplex mode at 10 Mb/s */
#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000U) /*!< Set the half-duplex mode at 10 Mb/s */
#define PHY_AUTONEGOTIATION ((uint16_t)0x1000U) /*!< Enable auto-negotiation function */
#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200U) /*!< Restart auto-negotiation function */
#define PHY_POWERDOWN ((uint16_t)0x0800U) /*!< Select the power down mode */
#define PHY_ISOLATE ((uint16_t)0x0400U) /*!< Isolate PHY from MII */
#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020U) /*!< Auto-Negotiation process completed */
#define PHY_LINKED_STATUS ((uint16_t)0x0004U) /*!< Valid link established */
#define PHY_JABBER_DETECTION ((uint16_t)0x0002U) /*!< Jabber condition detected */
#define PHY_PHYID1 ((uint16_t)0x02U) /*!< PHY ID 1 */
#define PHY_PHYID2 ((uint16_t)0x03U) /*!< PHY ID 2 */
#define PHY_ADVERTISE ((uint16_t)0x04U) /*!< Auto-negotiation advertisement */
#define PHY_ADVERTISE_100BASETXFULL (1 << 8)
#define PHY_ADVERTISE_100BASETXHALF (1 << 7)
#define PHY_ADVERTISE_10BASETXFULL (1 << 6)
#define PHY_ADVERTISE_10BASETXHALF (1 << 5)
#define PHY_ADVERTISE_8023 (1 << 0)
#define PHY_LPA ((uint16_t)0x05U) /*!< Auto-negotiation link partner base page ability */
#define PHY_EXPANSION ((uint16_t)0x06U) /*!< Auto-negotiation expansion */
/* Section 4: Extended PHY Registers */
#define PHY_SR ((uint16_t)0x1FU) /*!< PHY special control/ status register Offset */
#define PHY_SR_SPEED_OFFSET (2)
#define PHY_SR_SPEED_MASK (0x7 << PHY_SR_SPEED_OFFSET)
#define PHY_SR_SPEED_10BASETXHALF (0x1 << PHY_SR_SPEED_OFFSET)
#define PHY_SR_SPEED_10BASETXFULL (0x5 << PHY_SR_SPEED_OFFSET)
#define PHY_SR_SPEED_100BASETXHALF (0x2 << PHY_SR_SPEED_OFFSET)
#define PHY_SR_SPEED_100BASETXFULL (0x6 << PHY_SR_SPEED_OFFSET)
#define PHY_SR_SPEED_MODE_COMPARE(status, mode) (!!(mode == (status & PHY_SR_SPEED_MASK)))
#define PHY_SPEED_STATUS ((uint16_t)0x0004U) /*!< PHY Speed mask */
#define PHY_DUPLEX_STATUS ((uint16_t)0x0010U) /*!< PHY Duplex mask */
#define PHY_ISFR ((uint16_t)0x1DU) /*!< PHY Interrupt Source Flag register Offset */
#define PHY_ISFR_INT4 ((uint16_t)0x0010U) /*!< PHY Link down inturrupt */
int phy_8720_reset(void)
{
int timeout = 10;
uint16_t regval = PHY_RESET;
if (emac_phy_reg_write(PHY_BCR, PHY_RESET) != 0) {
return -1;
}
for (; timeout; timeout--) {
if (0 != emac_phy_reg_read(PHY_BCR, &regval)) {
return -1;
}
if (!(regval & PHY_RESET)) {
return 0;
}
bflb_platform_delay_ms(1);
}
return -1;
}
int phy_8720_auto_negotiate(emac_phy_cfg_t *cfg)
{
uint16_t regval = 0;
uint16_t advertise = 0;
uint16_t lpa = 0;
uint32_t timeout = 100; //10s,in 100ms
if (0 != emac_phy_reg_read(PHY_PHYID1, &regval)) {
return -1;
}
if (0 != emac_phy_reg_read(PHY_PHYID2, &regval)) {
return -1;
}
if (0 != emac_phy_reg_read(PHY_BCR, &regval)) {
return -1;
}
regval &= ~PHY_AUTONEGOTIATION;
regval &= ~(PHY_LOOPBACK | PHY_POWERDOWN);
regval |= PHY_ISOLATE;
if (emac_phy_reg_write(PHY_BCR, regval) != 0) {
return -1;
}
/* set advertisement mode */
advertise = PHY_ADVERTISE_100BASETXFULL | PHY_ADVERTISE_100BASETXHALF |
PHY_ADVERTISE_10BASETXFULL | PHY_ADVERTISE_10BASETXHALF |
PHY_ADVERTISE_8023;
if (emac_phy_reg_write(PHY_ADVERTISE, advertise) != 0) {
return -1;
}
bflb_platform_delay_ms(16);
if (0 != emac_phy_reg_read(PHY_BCR, &regval)) {
return -1;
}
bflb_platform_delay_ms(16);
regval |= (PHY_FULLDUPLEX_100M | PHY_AUTONEGOTIATION);
if (emac_phy_reg_write(PHY_BCR, regval) != 0) {
return -1;
}
bflb_platform_delay_ms(16);
regval |= PHY_RESTART_AUTONEGOTIATION;
regval &= ~PHY_ISOLATE;
if (emac_phy_reg_write(PHY_BCR, regval) != 0) {
return -1;
}
bflb_platform_delay_ms(2000);
while (1) {
if (0 != emac_phy_reg_read(PHY_BSR, &regval)) {
return -1;
}
if (regval & PHY_AUTONEGO_COMPLETE) {
/* complete */
break;
}
if (!(--timeout)) {
return -1;
}
bflb_platform_delay_ms(100);
}
bflb_platform_delay_ms(5000);
if (0 != emac_phy_reg_read(PHY_LPA, &lpa)) {
return -1;
}
if (((advertise & lpa) & PHY_ADVERTISE_100BASETXFULL) != 0) {
/* 100BaseTX and Full Duplex */
cfg->full_duplex = 1;
cfg->speed = 100;
} else if (((advertise & lpa) & PHY_ADVERTISE_10BASETXFULL) != 0) {
/* 10BaseT and Full Duplex */
cfg->full_duplex = 1;
cfg->speed = 10;
} else if (((advertise & lpa) & PHY_ADVERTISE_100BASETXHALF) != 0) {
/* 100BaseTX and half Duplex */
cfg->full_duplex = 0;
cfg->speed = 100;
} else if (((advertise & lpa) & PHY_ADVERTISE_10BASETXHALF) != 0) {
/* 10BaseT and half Duplex */
cfg->full_duplex = 0;
cfg->speed = 10;
}
return 0;
}
int phy_8720_link_up(emac_phy_cfg_t *cfg)
{
uint16_t phy_bsr = 0;
uint16_t phy_sr = 0;
bflb_platform_delay_ms(16);
if (0 != emac_phy_reg_read(PHY_BSR, &phy_bsr)) {
return -1;
}
bflb_platform_delay_ms(16);
if (!(PHY_LINKED_STATUS & phy_bsr)) {
return ERROR;
}
bflb_platform_delay_ms(16);
if (0 != emac_phy_reg_read(PHY_SR, &phy_sr)) {
return -1;
}
if ((phy_bsr & PHY_BSR_100BASETXFULL) && PHY_SR_SPEED_MODE_COMPARE(phy_sr, PHY_SR_SPEED_100BASETXFULL)) {
/* 100BaseTX and Full Duplex */
cfg->full_duplex = 1;
cfg->speed = 100;
} else if ((phy_bsr & PHY_BSR_10BASETXFULL) && PHY_SR_SPEED_MODE_COMPARE(phy_sr, PHY_SR_SPEED_10BASETXFULL)) {
/* 10BaseT and Full Duplex */
cfg->full_duplex = 1;
cfg->speed = 10;
} else if ((phy_bsr & PHY_BSR_100BASETXHALF) && PHY_SR_SPEED_MODE_COMPARE(phy_sr, PHY_SR_SPEED_100BASETXHALF)) {
/* 100BaseTX and half Duplex */
cfg->full_duplex = 0;
cfg->speed = 100;
} else if ((phy_bsr & PHY_BSR_10BASETXHALF) && PHY_SR_SPEED_MODE_COMPARE(phy_sr, PHY_SR_SPEED_10BASETXHALF)) {
/* 10BaseT and half Duplex */
cfg->full_duplex = 0;
cfg->speed = 10;
} else {
/* 10BaseT and half Duplex */
cfg->full_duplex = -1;
cfg->speed = -1;
return -1;
}
if (cfg->full_duplex == 1) {
MSG("PHY_FULLDUPLEX\r\n");
} else {
MSG("PHY_HALFDUPLEX\r\n");
}
if (cfg->speed == 100) {
MSG("PHY_SPEED_100M\r\n");
} else {
MSG("EMAC_SPEED_50M\r\n");
}
MSG("PHY Init done\r\n");
return 0;
}
/****************************************************************************/ /**
* @brief Initialize EMAC PHY module
*
* @param cfg: EMAC PHY configuration pointer
*
* @return SUCCESS or ERROR
*
*******************************************************************************/
int emac_phy_init(emac_phy_cfg_t *cfg)
{
uint16_t phyReg;
emac_phy_cfg_t phy_cfg = {
.auto_negotiation = 1, /*!< Speed and mode auto negotiation */
.full_duplex = 1, /*!< Duplex mode */
.speed = 100, /*!< Speed mode */
.phy_address = 0, /*!< PHY address */
};
if (cfg != NULL) {
memcpy(&phy_cfg, cfg, sizeof(emac_phy_cfg_t));
}
cfg = &phy_cfg;
emac_phy_set_address(cfg->phy_address);
if (0 != phy_8720_reset()) {
return -1;
}
if (cfg->auto_negotiation) {
/*
uint32_t cnt=0;
do{
if(emac_phy_reg_read(PHY_BSR, &phyReg) != SUCCESS){
return ERROR;
}
cnt++;
if(cnt>PHY_LINK_TO){
return ERROR;
}
}while((phyReg & PHY_LINKED_STATUS) != PHY_LINKED_STATUS);
*/
if (0 != phy_8720_auto_negotiate(cfg)) {
return -1;
}
} else {
if (emac_phy_reg_read(PHY_BCR, &phyReg) != 0) {
return -1;
}
phyReg &= (~PHY_FULLDUPLEX_100M);
if (cfg->speed == 10) {
if (cfg->full_duplex == 1) {
phyReg |= PHY_FULLDUPLEX_10M;
} else {
phyReg |= PHY_HALFDUPLEX_10M;
}
} else {
if (cfg->full_duplex == 1) {
phyReg |= PHY_FULLDUPLEX_100M;
} else {
phyReg |= PHY_HALFDUPLEX_100M;
}
}
if ((emac_phy_reg_write(PHY_BCR, phyReg)) != 0) {
return -1;
}
}
emac_phy_config_full_duplex(cfg->full_duplex);
return phy_8720_link_up(cfg);
}

187
bsp/bsp_common/platform/bflb_platform.c
View file

@ -1,91 +1,41 @@
/**
* @file bflb_platform.c
* @brief
*
* @brief
*
* Copyright (c) 2021 Bouffalolab team
*
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
*
* http://www.apache.org/licenses/LICENSE-2.0
*
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
*
*/
#include "hal_uart.h"
#include "hal_mtimer.h"
#include "drv_mmheap.h"
#include "ring_buffer.h"
#include "drv_shell.h"
extern uint32_t _HeapBase;
extern uint32_t _HeapSize;
static uint8_t uart_dbg_disable=0;
extern uint32_t __HeapBase;
extern uint32_t __HeapLimit;
#ifdef SHELL_SUPPORT
Shell shell;
char shellBuffer[512];
void uart_iqr_callback(struct device *dev, void *args, uint32_t size, uint32_t state)
{
uint8_t data;
if (state == UART_EVENT_RX_FIFO)
{
data = *(uint8_t *)args;
shellHandler(&shell, data);
}
}
void userShellWrite(char data)
{
struct device *uart = device_find("debug_log");
device_write(uart, 0, (uint8_t *)&data, 1);
}
#if SHELL_FS == 1
__WEAK__ int shellGetcwd(char *path, unsigned int len)
{
return 0;
}
#endif
void shell_init(void)
{
shell.write = userShellWrite;
#if SHELL_FS == 1
shell.getcwd = shellGetcwd;
#endif
shellInit(&shell, shellBuffer, 512);
}
#else
void uart_iqr_callback(struct device *dev, void *args, uint32_t size, uint32_t state)
{
if (state == UART_EVENT_RX_FIFO)
{
}
}
#endif
static uint8_t uart_dbg_disable = 0;
__WEAK__ void board_init(void)
{
}
__WEAK__ void bl_show_info(void)
{
}
__WEAK__ enum uart_index_type board_get_debug_uart_index(void)
@ -99,30 +49,22 @@ void bflb_platform_init(uint32_t baudrate)
board_init();
if(!uart_dbg_disable){
if (!uart_dbg_disable) {
uart_register(board_get_debug_uart_index(), "debug_log", DEVICE_OFLAG_RDWR);
struct device *uart = device_find("debug_log");
if (uart)
{
if (uart) {
device_open(uart, DEVICE_OFLAG_STREAM_TX | DEVICE_OFLAG_INT_RX);
device_set_callback(uart, uart_iqr_callback);
device_control(uart, DEVICE_CTRL_SET_INT, (void *)(UART_RX_FIFO_IT));
device_set_callback(uart, NULL);
device_control(uart, DEVICE_CTRL_CLR_INT, (void *)(UART_RX_FIFO_IT));
}
bl_show_info();
}
#ifdef SHELL_SUPPORT
shell_init();
#endif
if (!mmheap_init_with_pool(&_HeapBase, (size_t)&_HeapSize))
{
// MSG("dynamic memory init success,heap size = 0x%x \r\n", &_HeapSize);
}
else
{
if (!mmheap_init_with_pool(&__HeapBase, (size_t)&__HeapLimit - (size_t)&__HeapBase)) {
MSG("dynamic memory init success,heap size = %d Kbyte \r\n", ((size_t)&__HeapLimit - (size_t)&__HeapBase) / 1000);
} else {
MSG("dynamic memory init error\r\n");
}
@ -135,7 +77,7 @@ void bflb_platform_printf(char *fmt, ...)
char print_buf[128];
va_list ap;
if(!uart_dbg_disable){
if (!uart_dbg_disable) {
va_start(ap, fmt);
vsnprintf(print_buf, sizeof(print_buf) - 1, fmt, ap);
va_end(ap);
@ -146,7 +88,7 @@ void bflb_platform_printf(char *fmt, ...)
void bflb_platform_print_set(uint8_t disable)
{
uart_dbg_disable=disable;
uart_dbg_disable = disable;
}
uint8_t bflb_platform_print_get(void)
@ -156,57 +98,51 @@ uint8_t bflb_platform_print_get(void)
void bflb_platform_deinit(void)
{
}
void bflb_platform_dump(uint8_t *data, uint32_t len)
{
uint32_t i = 0;
if(!uart_dbg_disable){
for (i = 0; i < len; i++)
{
if (i % 16 == 0)
{
if (!uart_dbg_disable) {
for (i = 0; i < len; i++) {
if (i % 16 == 0) {
bflb_platform_printf("\r\n");
}
bflb_platform_printf("%02x ", data[i]);
}
bflb_platform_printf("\r\n");
}
}
void bflb_platform_init_time()
{
}
void bflb_platform_deinit_time()
{
}
void bflb_platform_set_alarm_time(uint64_t time,void( *interruptFun )( void ))
void bflb_platform_set_alarm_time(uint64_t time, void (*interruptFun)(void))
{
mtimer_set_alarm_time(time,interruptFun);
mtimer_set_alarm_time(time, interruptFun);
}
void bflb_platform_clear_time()
{
}
void bflb_platform_start_time()
{
}
void bflb_platform_stop_time()
{
}
uint64_t bflb_platform_get_time_ms()
uint64_t bflb_platform_get_time_ms()
{
return mtimer_get_time_ms();
}
@ -225,51 +161,78 @@ void bflb_platform_delay_us(uint32_t us)
mtimer_delay_us(us);
}
void bflb_print_device_list(void){
void bflb_print_device_list(void)
{
struct device *dev;
dlist_t *node;
uint8_t device_index=0;
uint8_t device_index = 0;
MSG("Device List Print\r\n");
dlist_for_each(node, device_get_list_header())
{
dev = dlist_entry(node, struct device, list);
MSG("Index %d\r\nDevice Name = %s \r\n",device_index,dev->name);
switch(dev->type){
MSG("Index %d\r\nDevice Name = %s \r\n", device_index, dev->name);
switch (dev->type) {
case DEVICE_CLASS_GPIO:
MSG("Device Type = %s \r\n","GPIO");break;
MSG("Device Type = %s \r\n", "GPIO");
break;
case DEVICE_CLASS_UART:
MSG("Device Type = %s \r\n","UART");break;
MSG("Device Type = %s \r\n", "UART");
break;
case DEVICE_CLASS_SPI:
MSG("Device Type = %s \r\n","SPI");break;
MSG("Device Type = %s \r\n", "SPI");
break;
case DEVICE_CLASS_I2C:
MSG("Device Type = %s \r\n","I2C");break;
MSG("Device Type = %s \r\n", "I2C");
break;
case DEVICE_CLASS_ADC:
MSG("Device Type = %s \r\n","ADC");break;
MSG("Device Type = %s \r\n", "ADC");
break;
case DEVICE_CLASS_DMA:
MSG("Device Type = %s \r\n","DMA");break;
MSG("Device Type = %s \r\n", "DMA");
break;
case DEVICE_CLASS_TIMER:
MSG("Device Type = %s \r\n","TIMER");break;
MSG("Device Type = %s \r\n", "TIMER");
break;
case DEVICE_CLASS_PWM:
MSG("Device Type = %s \r\n","PWM");break;
MSG("Device Type = %s \r\n", "PWM");
break;
case DEVICE_CLASS_SDIO:
MSG("Device Type = %s \r\n","SDIO");break;
MSG("Device Type = %s \r\n", "SDIO");
break;
case DEVICE_CLASS_USB:
MSG("Device Type = %s \r\n","USB");break;
MSG("Device Type = %s \r\n", "USB");
break;
case DEVICE_CLASS_I2S:
MSG("Device Type = %s \r\n","I2S");break;
MSG("Device Type = %s \r\n", "I2S");
break;
case DEVICE_CLASS_CAMERA:
MSG("Device Type = %s \r\n","CAMERA");break;
case DEVICE_CLASS_NONE: break;
default : break;
MSG("Device Type = %s \r\n", "CAMERA");
break;
case DEVICE_CLASS_NONE:
break;
default:
break;
}
MSG("Device Handle = 0x%x \r\n",dev);
MSG("---------------------\r\n",dev);
MSG("Device Handle = 0x%x \r\n", dev);
MSG("---------------------\r\n", dev);
device_index++;
}

84
bsp/bsp_common/platform/bflb_platform.h
View file

@ -1,42 +1,58 @@
/**
* @file bflb_platform.h
* @brief
*
* @brief
*
* Copyright (c) 2021 Bouffalolab team
*
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
*
* http://www.apache.org/licenses/LICENSE-2.0
*
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
*
*/
#ifndef _BFLB_PLATFORM_H
#define _BFLB_PLATFORM_H
#ifdef __cplusplus
extern "C" {
#endif
#include "misc.h"
//#include "mcu_sdk_version.h"
#define printf(a,...) bflb_platform_printf(a,##__VA_ARGS__)
#define MSG(a,...) bflb_platform_printf(a,##__VA_ARGS__)
#define MSG_DBG(a,...) bflb_platform_printf(a,##__VA_ARGS__)
#define MSG_ERR(a,...) bflb_platform_printf(a,##__VA_ARGS__)
#define BL_CASE_FAIL {MSG(" Case Fail\r\n");while(1){bflb_platform_delay_ms(1);}}
#define BL_CASE_SUCCESS {MSG(" Case Success\r\n");while(1){bflb_platform_delay_ms(1);}}
#define printf(a, ...) bflb_platform_printf(a, ##__VA_ARGS__)
#define MSG(a, ...) bflb_platform_printf(a, ##__VA_ARGS__)
#define MSG_DBG(a, ...) bflb_platform_printf(a, ##__VA_ARGS__)
#define MSG_ERR(a, ...) bflb_platform_printf(a, ##__VA_ARGS__)
#define BL_CASE_FAIL \
{ \
MSG(" Case Fail\r\n"); \
while (1) { \
bflb_platform_delay_ms(1); \
} \
}
#define BL_CASE_SUCCESS \
{ \
MSG(" Case Success\r\n"); \
while (1) { \
bflb_platform_delay_ms(1); \
} \
}
/* compatible with old version */
#ifndef DBG_TAG
#define DBG_TAG "DEBUG"
#define DBG_TAG "DEBUG"
#endif
/*
@ -50,28 +66,26 @@
* CYAN 36
* WHITE 37
*/
#define _DBG_COLOR(n) bflb_platform_printf("\033["#n"m")
#define _DBG_LOG_HDR(lvl_name, color_n) \
bflb_platform_printf("\033["#color_n"m["lvl_name"/"DBG_TAG"] ")
#define _DBG_LOG_X_END \
#define _DBG_COLOR(n) bflb_platform_printf("\033[" #n "m")
#define _DBG_LOG_HDR(lvl_name, color_n) \
bflb_platform_printf("\033[" #color_n "m[" lvl_name "/" DBG_TAG "] ")
#define _DBG_LOG_X_END \
bflb_platform_printf("\033[0m\n")
#define dbg_log_line(lvl, color_n, fmt, ...) \
do \
{ \
_DBG_LOG_HDR(lvl, color_n); \
bflb_platform_printf(fmt, ##__VA_ARGS__); \
_DBG_LOG_X_END; \
} \
while (0)
#define dbg_log_line(lvl, color_n, fmt, ...) \
do { \
_DBG_LOG_HDR(lvl, color_n); \
bflb_platform_printf(fmt, ##__VA_ARGS__); \
_DBG_LOG_X_END; \
} while (0)
#define LOG_D(fmt, ...) dbg_log_line("D", 0, fmt, ##__VA_ARGS__)
#define LOG_I(fmt, ...) dbg_log_line("I", 35, fmt, ##__VA_ARGS__)
#define LOG_W(fmt, ...) dbg_log_line("W", 33, fmt, ##__VA_ARGS__)
#define LOG_E(fmt, ...) dbg_log_line("E", 31, fmt, ##__VA_ARGS__)
#define LOG_RAW(...) bflb_platform_printf(__VA_ARGS__)
#define LOG_D(fmt, ...) dbg_log_line("D", 0, fmt, ##__VA_ARGS__)
#define LOG_I(fmt, ...) dbg_log_line("I", 35, fmt, ##__VA_ARGS__)
#define LOG_W(fmt, ...) dbg_log_line("W", 33, fmt, ##__VA_ARGS__)
#define LOG_E(fmt, ...) dbg_log_line("E", 31, fmt, ##__VA_ARGS__)
#define LOG_RAW(...) bflb_platform_printf(__VA_ARGS__)
#ifdef DEBUG
#ifdef DEBUG
void check_failed(uint8_t *file, uint32_t line);
#define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
#else
@ -79,7 +93,7 @@ void check_failed(uint8_t *file, uint32_t line);
#endif /* DEBUG */
void bflb_platform_init(uint32_t baudrate);
void bflb_platform_printf(char *fmt,...);
void bflb_platform_printf(char *fmt, ...);
void bflb_platform_print_set(uint8_t disable);
uint8_t bflb_platform_print_get(void);
void bflb_platform_dump(uint8_t *data, uint32_t len);
@ -91,11 +105,15 @@ uint64_t bflb_platform_get_time_ms(void);
uint64_t bflb_platform_get_time_us(void);
void bflb_platform_start_time(void);
void bflb_platform_stop_time(void);
void bflb_platform_set_alarm_time(uint64_t time,void( *interruptFun )( void ));
void bflb_platform_set_alarm_time(uint64_t time, void (*interruptFun)(void));
void bflb_platform_deinit_time(void);
void bflb_platform_delay_ms(uint32_t ms);
void bflb_platform_delay_us(uint32_t us);
void bflb_print_device_list(void);
#ifdef __cplusplus
}
#endif
#endif

46
bsp/bsp_common/psram/bsp_sf_psram.c
View file

@ -1,24 +1,24 @@
/**
* @file bsp_sf_psram.c
* @brief
*
* @brief
*
* Copyright (c) 2021 Bouffalolab team
*
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
*
* http://www.apache.org/licenses/LICENSE-2.0
*
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
*
*/
#include "bsp_sf_psram.h"
@ -73,10 +73,10 @@ SF_Ctrl_Psram_Cfg sfCtrlPsramCfg = {
/* bsp sf psram gpio init */
/**
* @brief
*
* @brief
*
* @return None
*
*
*/
void ATTR_TCM_SECTION bsp_sf_psram_gpio_init(void)
{
@ -98,45 +98,47 @@ void ATTR_TCM_SECTION bsp_sf_psram_gpio_init(void)
gpiopins[5] = BFLB_EXTPSRAM_DATA3_GPIO;
gpiopins[6] = BFLB_EXTFLASH_CS_GPIO;
for(i=0; i<sizeof(gpiopins); i++){
for (i = 0; i < sizeof(gpiopins); i++) {
cfg.gpioPin = gpiopins[i];
if(i==0 || i==1 || i==6){
if (i == 0 || i == 1 || i == 6) {
/*flash clk and cs is output*/
cfg.gpioMode = GPIO_MODE_OUTPUT;
}else{
} else {
/*data are bidir*/
cfg.gpioMode = GPIO_MODE_AF;
}
GLB_GPIO_Init(&cfg);
}
}
/* bsp sf psram init */
/**
* @brief
*
* @param sw_reset
*
* @brief
*
* @param sw_reset
*
* @return None
*
*
*/
void ATTR_TCM_SECTION bsp_sf_psram_init(uint8_t sw_reset)
{
uint8_t psramId[8] = {0};
uint8_t psramId[8] = { 0 };
bsp_sf_psram_gpio_init();
Psram_Init(&apMemory1604, &cmdsCfg, &sfCtrlPsramCfg);
if(sw_reset){
if (sw_reset) {
Psram_SoftwareReset(&apMemory1604, apMemory1604.ctrlMode);
}
Psram_ReadId(&apMemory1604, psramId);
Psram_Cache_Write_Set(&apMemory1604, SF_CTRL_QIO_MODE, ENABLE, DISABLE, DISABLE);
L1C_Cache_Enable_Set(L1C_WAY_DISABLE_NONE);
L1C_Cache_Enable_Set(L1C_WAY_DISABLE_NONE);
}
void ATTR_TCM_SECTION bsp_sf_psram_read_id(uint8_t *data)
{
Psram_ReadId(&apMemory1604, data);
}

33
bsp/bsp_common/psram/bsp_sf_psram.h
View file

@ -1,24 +1,24 @@
/**
* @file bsp_sf_psram.h
* @brief
*
* @brief
*
* Copyright (c) 2021 Bouffalolab team
*
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
*
* http://www.apache.org/licenses/LICENSE-2.0
*
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
*
*/
#ifndef __BSP_SF_PSRAM_H__
@ -26,21 +26,20 @@
#include "bl702.h"
#define BSP_PSRAM_BASE BL702_PSRAM_XIP_BASE
#define BSP_PSRAM_BASE BL702_PSRAM_XIP_BASE
#define PSRAM_SIZE 2*1024*1024
#define PSRAM_SIZE 2 * 1024 * 1024
#define BFLB_EXTFLASH_CS_GPIO GLB_GPIO_PIN_25
#define BFLB_EXTPSRAM_CLK_GPIO GLB_GPIO_PIN_27
#define BFLB_EXTPSRAM_CS_GPIO GLB_GPIO_PIN_17
#define BFLB_EXTPSRAM_DATA0_GPIO GLB_GPIO_PIN_28
#define BFLB_EXTPSRAM_DATA1_GPIO GLB_GPIO_PIN_24
#define BFLB_EXTPSRAM_DATA2_GPIO GLB_GPIO_PIN_23
#define BFLB_EXTPSRAM_DATA3_GPIO GLB_GPIO_PIN_26
#define BFLB_EXTFLASH_CS_GPIO GLB_GPIO_PIN_25
#define BFLB_EXTPSRAM_CLK_GPIO GLB_GPIO_PIN_27
#define BFLB_EXTPSRAM_CS_GPIO GLB_GPIO_PIN_17
#define BFLB_EXTPSRAM_DATA0_GPIO GLB_GPIO_PIN_28
#define BFLB_EXTPSRAM_DATA1_GPIO GLB_GPIO_PIN_24
#define BFLB_EXTPSRAM_DATA2_GPIO GLB_GPIO_PIN_23
#define BFLB_EXTPSRAM_DATA3_GPIO GLB_GPIO_PIN_26
void bsp_sf_psram_gpio_init(void);
void bsp_sf_psram_init(uint8_t sw_reset);
void bsp_sf_psram_read_id(uint8_t *data);
#endif /* __BSP_SF_PSRAM_H__ */
#endif /* __BSP_SF_PSRAM_H__ */

447
bsp/bsp_common/spi_sd/bsp_spi_sd.c
View file

@ -1,24 +1,24 @@
/**
* @file bsp_spi_sd.c
* @brief
*
* @brief
*
* Copyright (c) 2021 Bouffalolab team
*
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
*
* http://www.apache.org/licenses/LICENSE-2.0
*
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
*
*/
#include "hal_spi.h"
@ -27,85 +27,79 @@
#include "bl702_spi.h"
#include "bsp_spi_sd.h"
static struct device* spi0;
static struct device* dma_ch3;
static struct device* dma_ch4;
SD_CardInfoTypedef SD_CardInfo = {0};
static struct device *spi0;
static struct device *dma_ch3;
static struct device *dma_ch4;
SD_CardInfoTypedef SD_CardInfo = { 0 };
uint8_t SD_SPI_Init(void)
{
gpio_set_mode(SPI_PIN_CS,GPIO_OUTPUT_MODE);
gpio_write(SPI_PIN_CS,1);
gpio_set_mode(SPI_PIN_CS, GPIO_OUTPUT_MODE);
gpio_write(SPI_PIN_CS, 1);
spi0 = device_find("spi0");
if(spi0)
{
if (spi0) {
device_close(spi0);
}
else{
spi_register(SPI0_INDEX,"spi0",DEVICE_OFLAG_RDWR);
} else {
spi_register(SPI0_INDEX, "spi0", DEVICE_OFLAG_RDWR);
spi0 = device_find("spi0");
}
if(spi0)
{
device_open(spi0,DEVICE_OFLAG_STREAM_TX|DEVICE_OFLAG_STREAM_RX);
if (spi0) {
device_open(spi0, DEVICE_OFLAG_STREAM_TX | DEVICE_OFLAG_STREAM_RX);
}
dma_ch3 = device_find("dma0_ch3");
if(dma_ch3)
{
if (dma_ch3) {
device_close(dma_ch3);
}
else{
} else {
dma_register(DMA0_CH3_INDEX, "dma0_ch3", DEVICE_OFLAG_RDWR);
dma_ch3 = device_find("dma0_ch3");
}
if (dma_ch3)
{
((dma_device_t*)dma_ch3)->direction = DMA_MEMORY_TO_PERIPH;
((dma_device_t*)dma_ch3)->transfer_mode = DMA_LLI_ONCE_MODE;
((dma_device_t*)dma_ch3)->src_req = DMA_REQUEST_NONE;
((dma_device_t*)dma_ch3)->dst_req = DMA_REQUEST_SPI0_TX;
((dma_device_t*)dma_ch3)->src_width = DMA_TRANSFER_WIDTH_8BIT;
((dma_device_t*)dma_ch3)->dst_width = DMA_TRANSFER_WIDTH_8BIT;
if (dma_ch3) {
((dma_device_t *)dma_ch3)->direction = DMA_MEMORY_TO_PERIPH;
((dma_device_t *)dma_ch3)->transfer_mode = DMA_LLI_ONCE_MODE;
((dma_device_t *)dma_ch3)->src_req = DMA_REQUEST_NONE;
((dma_device_t *)dma_ch3)->dst_req = DMA_REQUEST_SPI0_TX;
((dma_device_t *)dma_ch3)->src_width = DMA_TRANSFER_WIDTH_8BIT;
((dma_device_t *)dma_ch3)->dst_width = DMA_TRANSFER_WIDTH_8BIT;
device_open(dma_ch3, 0);
}
dma_ch4 = device_find("dma0_ch4");
if(dma_ch4)
{
if (dma_ch4) {
device_close(dma_ch4);
}
else{
} else {
dma_register(DMA0_CH4_INDEX, "dma0_ch4", DEVICE_OFLAG_RDWR);
dma_ch4 = device_find("dma0_ch4");
}
if (dma_ch4)
{
((dma_device_t*)dma_ch4)->direction = DMA_PERIPH_TO_MEMORY;
((dma_device_t*)dma_ch4)->transfer_mode = DMA_LLI_ONCE_MODE;
((dma_device_t*)dma_ch4)->src_req = DMA_REQUEST_SPI0_RX;
((dma_device_t*)dma_ch4)->dst_req = DMA_REQUEST_NONE;
((dma_device_t*)dma_ch4)->src_width = DMA_TRANSFER_WIDTH_8BIT ;
((dma_device_t*)dma_ch4)->dst_width = DMA_TRANSFER_WIDTH_8BIT ;
if (dma_ch4) {
((dma_device_t *)dma_ch4)->direction = DMA_PERIPH_TO_MEMORY;
((dma_device_t *)dma_ch4)->transfer_mode = DMA_LLI_ONCE_MODE;
((dma_device_t *)dma_ch4)->src_req = DMA_REQUEST_SPI0_RX;
((dma_device_t *)dma_ch4)->dst_req = DMA_REQUEST_NONE;
((dma_device_t *)dma_ch4)->src_width = DMA_TRANSFER_WIDTH_8BIT;
((dma_device_t *)dma_ch4)->dst_width = DMA_TRANSFER_WIDTH_8BIT;
device_open(dma_ch4, 0);
}
return SUCCESS;
}
BL_Err_Type SPI_ReadWriteByte(uint8_t *txBuff, uint8_t *rxBuff, uint32_t length)
{
while (device_control(dma_ch3, DMA_CHANNEL_GET_STATUS, NULL) || device_control(dma_ch4, DMA_CHANNEL_GET_STATUS, NULL))
;
while(device_control(dma_ch3,DMA_CHANNEL_GET_STATUS,NULL)||device_control(dma_ch4,DMA_CHANNEL_GET_STATUS,NULL));
if(length<500)
{
spi_transmit_receive(spi0,txBuff,rxBuff,length,SPI_DATASIZE_8BIT);
}
else
{
if (length < 500) {
spi_transmit_receive(spi0, txBuff, rxBuff, length, SPI_DATASIZE_8BIT);
} else {
device_control(spi0, DEVICE_CTRL_TX_DMA_RESUME, NULL);
device_control(spi0, DEVICE_CTRL_RX_DMA_RESUME, NULL);
device_control(dma_ch3, DEVICE_CTRL_CLR_INT, NULL);
@ -116,7 +110,9 @@ BL_Err_Type SPI_ReadWriteByte(uint8_t *txBuff, uint8_t *rxBuff, uint32_t length)
dma_channel_start(dma_ch3);
dma_channel_start(dma_ch4);
while(device_control(dma_ch3,DMA_CHANNEL_GET_STATUS,NULL)||device_control(dma_ch4,DMA_CHANNEL_GET_STATUS,NULL));
while (device_control(dma_ch3, DMA_CHANNEL_GET_STATUS, NULL) || device_control(dma_ch4, DMA_CHANNEL_GET_STATUS, NULL))
;
device_control(spi0, DEVICE_CTRL_TX_DMA_SUSPEND, NULL);
device_control(spi0, DEVICE_CTRL_RX_DMA_SUSPEND, NULL);
}
@ -125,33 +121,36 @@ BL_Err_Type SPI_ReadWriteByte(uint8_t *txBuff, uint8_t *rxBuff, uint32_t length)
}
void SPI_CS_WriteBit(uint8_t bit)
{
gpio_write(SPI_PIN_CS,bit);
gpio_write(SPI_PIN_CS, bit);
}
/****************************************************************************
* @brief SPI_SetSpeed
*
* @brief SPI_SetSpeed
*
*
*******************************************************************************/
static void SD_SPI_SetSpeed(uint8_t mode)
{
switch (mode){
case (0):
device_control(spi0, DEVICE_CTRL_SPI_CONFIG_CLOCK,(void*)(300 * 1000));
break;
case (1):
device_control(spi0, DEVICE_CTRL_SPI_CONFIG_CLOCK,(void*)(18 * 1000 * 1000));
break;
case (2):
device_control(spi0, DEVICE_CTRL_SPI_CONFIG_CLOCK,(void*)(40 * 1000 * 1000));
break;
default:
break;
switch (mode) {
case (0):
device_control(spi0, DEVICE_CTRL_SPI_CONFIG_CLOCK, (void *)(300 * 1000));
break;
case (1):
device_control(spi0, DEVICE_CTRL_SPI_CONFIG_CLOCK, (void *)(18 * 1000 * 1000));
break;
case (2):
device_control(spi0, DEVICE_CTRL_SPI_CONFIG_CLOCK, (void *)(40 * 1000 * 1000));
break;
default:
break;
}
}
/****************************************************************************
* @brief SPI_CS_WriteBit
*
* @brief SPI_CS_WriteBit
*
*
*******************************************************************************/
// static void SPI_CS_WriteBit(uint8_t bit)
@ -169,15 +168,17 @@ static BL_Err_Type SD_GetResponse(uint8_t Response)
uint8_t rx;
uint8_t t_0xFF = 0xFF;
uint16_t Count = 0xFFFE;
do{
do {
SPI_ReadWriteByte(&t_0xFF, &rx, 1);
Count--;
} while (rx != Response && Count);
if (Count == 0)
if (Count == 0) {
return ERROR;
else
} else {
return SUCCESS;
}
}
/****************************************************************************
@ -210,7 +211,7 @@ static uint8_t SD_SendCommand(uint8_t cmd, uint32_t arg, uint8_t crc)
SPI_ReadWriteByte(&t_0xFF, &rx, 1);
do{
do {
SPI_ReadWriteByte(&t_0xFF, &rx, 1);
retry++;
} while (rx == 0xFF && retry < 20);
@ -252,7 +253,7 @@ static uint8_t SD_SendCommand_NoDeassert(uint8_t cmd, uint32_t arg, uint8_t crc)
SPI_ReadWriteByte(&t_0xFF, &rx, 1);
do{
do {
SPI_ReadWriteByte(&t_0xFF, &rx, 1);
retry++;
} while (rx == 0xFF && retry < 20);
@ -276,33 +277,29 @@ static BL_Err_Type SD_Idle_Sta(void)
SPI_CS_WriteBit(1);
for (i = 0; i < 10; i++)
for (i = 0; i < 10; i++) {
SPI_ReadWriteByte(&t_0xFF, &rx, 1);
}
do
{
do {
rx = SD_SendCommand(CMD0, 0, 0x95);
retry++;
} while (rx != MSD_IN_IDLE_STATE && retry < 100);
if (retry >= 100)
{
if (retry >= 100) {
//MSG("SD IDLE err:%d\r\n",rx);
return ERROR;
}
else
{
} else {
//MSG("SD IDLE success\r\n");
return SUCCESS;
}
}
/****************************************************************************/ /**
* @brief SD_ReceiveData
*
*
*
*
*
*******************************************************************************/
uint8_t SD_ReceiveData(uint8_t *data, uint16_t len, uint8_t release)
{
@ -311,37 +308,37 @@ uint8_t SD_ReceiveData(uint8_t *data, uint16_t len, uint8_t release)
uint16_t i;
SPI_CS_WriteBit(0);
/* get token */
if (SD_GetResponse(0xFE))
{
if (SD_GetResponse(0xFE)) {
SPI_CS_WriteBit(1);
MSG("sd receive err: no token\r\n");
return ERROR;
}
else
{
} else {
//MSG("sd get token\r\n");
}
for (i = 0; i < len; i++)
{
for (i = 0; i < len; i++) {
SPI_ReadWriteByte(&t_0xFF, data + i, 1);
}
/* two dummy CRC */
SPI_ReadWriteByte(&t_0xFF, &rx, 1);
SPI_ReadWriteByte(&t_0xFF, &rx, 1);
/* */
if (release)
if (release) {
SPI_CS_WriteBit(1);
}
return SUCCESS;
}
/****************************************************************************/ /**
* @brief SD_SendBlock
*
*
*
*
*
*******************************************************************************/
uint8_t SD_SendBlock(uint8_t *buf, uint8_t cmd)
{
@ -349,9 +346,9 @@ uint8_t SD_SendBlock(uint8_t *buf, uint8_t cmd)
uint8_t rxbuff[512];
uint8_t t_0xFF = 0xFF;
uint16_t i;
/* Waiti for free */
if (SD_GetResponse(0xFF))
{
if (SD_GetResponse(0xFF)) {
SPI_CS_WriteBit(1);
return ERROR;
}
@ -359,8 +356,7 @@ uint8_t SD_SendBlock(uint8_t *buf, uint8_t cmd)
/* send token */
SPI_ReadWriteByte(&cmd, &rx, 1);
if (cmd != 0xFD)
{
if (cmd != 0xFD) {
/* send block data */
SPI_ReadWriteByte(buf, rxbuff, 512);
/* two dummy CRC */
@ -369,25 +365,26 @@ uint8_t SD_SendBlock(uint8_t *buf, uint8_t cmd)
/* 8 clock */
SPI_ReadWriteByte(&t_0xFF, &rx, 1);
if ((rx & 0x1F) != 0x05)
{
if ((rx & 0x1F) != 0x05) {
//MSG("sd send err:%d\r\n",rx,1);
SPI_CS_WriteBit(1);
return rx;
}
i = 0;
do
{
do {
SPI_ReadWriteByte(&t_0xFF, &rx, 1);
i++;
} while (rx != 0xFF && i <= 0xFFFE);
}
return 0;
}
/****************************************************************************/ /**
* @brief SD_GetCID
*
*
*
*******************************************************************************/
// static uint8_t SD_GetCID(uint8_t *cid_data)
@ -410,7 +407,7 @@ uint8_t SD_SendBlock(uint8_t *buf, uint8_t cmd)
// /****************************************************************************
// * @brief SD_GetCSD
// *
// *
// *
// *******************************************************************************/
// static uint8_t SD_GetCSD(uint8_t *sid_data)
@ -434,7 +431,7 @@ uint8_t SD_SendBlock(uint8_t *buf, uint8_t cmd)
// /****************************************************************************/ /**
// * @brief SD_GetCapacity
// *
// *
// *
// *******************************************************************************/
// uint64_t SD_GetCapacity()
@ -493,23 +490,29 @@ uint8_t SD_SendBlock(uint8_t *buf, uint8_t cmd)
/****************************************************************************/ /**
* @brief SD_Get_CardInfo
*
*
*
*******************************************************************************/
uint8_t SD_Get_CardInfo(SD_CardInfoTypedef *pCardInfo)
{
uint8_t rx,t_0xFF;
uint8_t rx, t_0xFF;
uint32_t tmp = 0;
/* get cid */
rx = SD_SendCommand(CMD10, 0, 0xFF);
if (rx)
if (rx) {
return 1;
}
SD_ReceiveData(pCardInfo->SD_cid.CID, 16, RELEASE);
SPI_ReadWriteByte(&t_0xFF, &rx, 1);
/* get csd */
rx = SD_SendCommand(CMD9, 0, 0xFF);
if (rx)
if (rx) {
return 1;
}
SD_ReceiveData(pCardInfo->SD_csd.CSD, 16, RELEASE);
/* Byte 0 */
@ -520,14 +523,14 @@ uint8_t SD_Get_CardInfo(SD_CardInfoTypedef *pCardInfo)
/* Byte 1 */
tmp = pCardInfo->SD_csd.CSD[1];
pCardInfo->SD_csd.TAAC = (uint8_t)tmp;
/* Byte 2 */
/* Byte 2 */
tmp = pCardInfo->SD_csd.CSD[2];
pCardInfo->SD_csd.NSAC = (uint8_t)tmp;
/* Byte 3 */
tmp = pCardInfo->SD_csd.CSD[3];
pCardInfo->SD_csd.MaxBusClkFrec = (uint8_t)tmp;
/* Byte 4 */
tmp = pCardInfo->SD_csd.CSD[4] ;
tmp = pCardInfo->SD_csd.CSD[4];
pCardInfo->SD_csd.CardComdClasses = (uint16_t)(tmp << 4);
/* Byte 5 */
tmp = pCardInfo->SD_csd.CSD[5];
@ -541,52 +544,48 @@ uint8_t SD_Get_CardInfo(SD_CardInfoTypedef *pCardInfo)
pCardInfo->SD_csd.DSRImpl = (uint8_t)((tmp & 0x10) >> 4);
pCardInfo->SD_csd.Reserved2 = 0; /*!< Reserved */
if ((pCardInfo->CardType == SD_TYPE_V1) || (pCardInfo->CardType == SD_TYPE_V2))
{
if ((pCardInfo->CardType == SD_TYPE_V1) || (pCardInfo->CardType == SD_TYPE_V2)) {
pCardInfo->SD_csd.DeviceSize = (tmp & 0x03) << 10;
/* Byte 7 */
tmp = pCardInfo->SD_csd.CSD[7] ;
tmp = pCardInfo->SD_csd.CSD[7];
pCardInfo->SD_csd.DeviceSize |= (tmp) << 2;
/* Byte 8 */
tmp = pCardInfo->SD_csd.CSD[8] ;
tmp = pCardInfo->SD_csd.CSD[8];
pCardInfo->SD_csd.DeviceSize |= (tmp & 0xC0) >> 6;
pCardInfo->SD_csd.MaxRdCurrentVDDMin = (tmp & 0x38) >> 3;
pCardInfo->SD_csd.MaxRdCurrentVDDMax = (tmp & 0x07);
/* Byte 9 */
tmp = pCardInfo->SD_csd.CSD[9] ;
tmp = pCardInfo->SD_csd.CSD[9];
pCardInfo->SD_csd.MaxWrCurrentVDDMin = (tmp & 0xE0) >> 5;
pCardInfo->SD_csd.MaxWrCurrentVDDMax = (tmp & 0x1C) >> 2;
pCardInfo->SD_csd.DeviceSizeMul = (tmp & 0x03) << 1;
/* Byte 10 */
tmp = pCardInfo->SD_csd.CSD[10] ;
tmp = pCardInfo->SD_csd.CSD[10];
pCardInfo->SD_csd.DeviceSizeMul |= (tmp & 0x80) >> 7;
pCardInfo->CardCapacity = (pCardInfo->SD_csd.DeviceSize + 1);
pCardInfo->CardCapacity *= (1 << (pCardInfo->SD_csd.DeviceSizeMul + 2));
pCardInfo->CardBlockSize = 1 << (pCardInfo->SD_csd.RdBlockLen);
pCardInfo->CardCapacity *= pCardInfo->CardBlockSize;
}
else if (pCardInfo->CardType == SD_TYPE_V2HC)
{
} else if (pCardInfo->CardType == SD_TYPE_V2HC) {
/* Byte 7 */
tmp = pCardInfo->SD_csd.CSD[7] ;
tmp = pCardInfo->SD_csd.CSD[7];
pCardInfo->SD_csd.DeviceSize = (tmp & 0x3F) << 16;
/* Byte 8 */
tmp = pCardInfo->SD_csd.CSD[8] ;
tmp = pCardInfo->SD_csd.CSD[8];
pCardInfo->SD_csd.DeviceSize |= (tmp << 8);
/* Byte 9 */
tmp = pCardInfo->SD_csd.CSD[9];
pCardInfo->SD_csd.DeviceSize |= (tmp);
/* Byte 10 */
tmp = pCardInfo->SD_csd.CSD[10] ;
tmp = pCardInfo->SD_csd.CSD[10];
pCardInfo->CardCapacity = (uint64_t)((((uint64_t)pCardInfo->SD_csd.DeviceSize + 1)) * 512 * 1024);
pCardInfo->CardBlockSize = 512;
}
else
{
} else {
/* Not supported card type */
}
pCardInfo->SD_csd.EraseGrSize = (tmp & 0x40) >> 6;
pCardInfo->SD_csd.EraseGrMul = (tmp & 0x3F) << 1;
/* Byte 11 */
@ -606,7 +605,7 @@ uint8_t SD_Get_CardInfo(SD_CardInfoTypedef *pCardInfo)
pCardInfo->SD_csd.Reserved3 = 0;
pCardInfo->SD_csd.ContentProtectAppli = (tmp & 0x01);
/* Byte 14 */
tmp = pCardInfo->SD_csd.CSD[14] ;
tmp = pCardInfo->SD_csd.CSD[14];
pCardInfo->SD_csd.FileFormatGrouop = (tmp & 0x80) >> 7;
pCardInfo->SD_csd.CopyFlag = (tmp & 0x40) >> 6;
pCardInfo->SD_csd.PermWrProtect = (tmp & 0x20) >> 5;
@ -619,7 +618,7 @@ uint8_t SD_Get_CardInfo(SD_CardInfoTypedef *pCardInfo)
pCardInfo->SD_csd.Reserved4 = 1;
/* Byte 0 */
tmp = pCardInfo->SD_cid.CID[0] ;
tmp = pCardInfo->SD_cid.CID[0];
pCardInfo->SD_cid.ManufacturerID = tmp;
/* Byte 1 */
tmp = pCardInfo->SD_cid.CID[1];
@ -643,7 +642,7 @@ uint8_t SD_Get_CardInfo(SD_CardInfoTypedef *pCardInfo)
tmp = pCardInfo->SD_cid.CID[7];
pCardInfo->SD_cid.ProdName2 = tmp;
/* Byte 8 */
tmp = pCardInfo->SD_cid.CID[8] ;
tmp = pCardInfo->SD_cid.CID[8];
pCardInfo->SD_cid.ProdRev = tmp;
/* Byte 9 */
tmp = pCardInfo->SD_cid.CID[9];
@ -673,7 +672,7 @@ uint8_t SD_Get_CardInfo(SD_CardInfoTypedef *pCardInfo)
/****************************************************************************/ /**
* @brief SD_ReadSingleBlock
*
*
*
*******************************************************************************/
uint8_t SD_ReadBlock(uint32_t sector, uint8_t *buffer, uint32_t num)
@ -681,50 +680,55 @@ uint8_t SD_ReadBlock(uint32_t sector, uint8_t *buffer, uint32_t num)
uint8_t rx;
uint8_t t_0xFF;
SPI_CS_WriteBit(0);
/* sector to byte */
if (SD_CardInfo.CardType != SD_TYPE_V2HC){
if (SD_CardInfo.CardType != SD_TYPE_V2HC) {
sector = sector << 9;
}
if (num == 1){
if (num == 1) {
rx = SD_SendCommand(CMD17, sector, 0);
if (rx)
{
if (rx) {
MSG("SD CMD17 err:%02X\r\n", rx);
return rx;
}
rx = SD_ReceiveData(buffer, 512, RELEASE);
if (rx != 0)
{
if (rx != 0) {
MSG("SD sing read err:%02X\r\n", rx);
return rx;
}
}
else{
} else {
rx = SD_SendCommand(CMD18, sector, 0);
if (rx)
{
if (rx) {
MSG("SD CMD18 err:%02X\r\n", rx);
return rx;
}
while (num--)
{
while (num--) {
rx = SD_ReceiveData(buffer, 512, NO_RELEASE);
if (rx != 0)
{
if (rx != 0) {
MSG("SD read err:%02X\r\n", rx);
return rx;
}
buffer += 512;
}
rx = SD_SendCommand(CMD12, 0, 0);
SPI_CS_WriteBit(1);
SPI_ReadWriteByte(&t_0xFF, &rx, 1);
}
return SUCCESS;
}
/****************************************************************************/ /**
* @brief SD_WriteSingleBlock
*
*
*
*******************************************************************************/
uint8_t SD_WriteBlock(uint32_t sector, uint8_t *data, uint32_t num)
@ -733,55 +737,61 @@ uint8_t SD_WriteBlock(uint32_t sector, uint8_t *data, uint32_t num)
uint8_t t_0xFF;
/* sector to byte */
if (SD_CardInfo.CardType != SD_TYPE_V2HC){
if (SD_CardInfo.CardType != SD_TYPE_V2HC) {
sector = sector << 9;
}
if (SD_GetResponse(0xFF)){
if (SD_GetResponse(0xFF)) {
return 1;
}
if (num == 1){
if (num == 1) {
rx = SD_SendCommand(CMD24, sector, 1);
if (rx)
{
if (rx) {
MSG("SD CMD24 err:%d\r\n", rx);
return rx;
}
SPI_CS_WriteBit(0);
rx = SD_SendBlock(data, 0xFE);
if (rx)
{
if (rx) {
MSG("write err\r\n");
SPI_CS_WriteBit(0);
return rx;
}
}
else if (num > 1){
if (SD_CardInfo.CardType != SD_TYPE_MMC)
{
} else if (num > 1) {
if (SD_CardInfo.CardType != SD_TYPE_MMC) {
rx = SD_SendCommand(CMD55, 0, 1);
if (rx == 0)
if (rx == 0) {
rx = SD_SendCommand(ACMD23, num, 1);
if (rx != 0)
{
}
if (rx != 0) {
MSG("SD ACMD23 err:%d\r\n", rx);
return rx;
}
}
rx = SD_SendCommand(CMD25, sector, 1);
if (rx != 0)
{
if (rx != 0) {
MSG("SD ACMD25 err:%d\r\n", rx);
return rx;
}
SPI_CS_WriteBit(0);
do
{
do {
rx = SD_SendBlock(data, 0xFC);
data += 512;
} while (--num && rx == 0);
rx = SD_SendBlock(data, 0xFD);
}
SPI_CS_WriteBit(1);
SPI_ReadWriteByte(&t_0xFF, &rx, 1);
return 0;
@ -790,7 +800,7 @@ uint8_t SD_WriteBlock(uint32_t sector, uint8_t *data, uint32_t num)
* @brief SD init
*
*
*
*
*
*******************************************************************************/
uint8_t SD_Init(SD_CardInfoTypedef *pCardInfo)
@ -799,7 +809,7 @@ uint8_t SD_Init(SD_CardInfoTypedef *pCardInfo)
uint8_t t_0xFF = 0xFF;
//uint8_t txbuff[6];
uint8_t rxbuff[6];
uint16_t retry = 0,i;
uint16_t retry = 0, i;
SD_SPI_Init();
@ -807,75 +817,67 @@ uint8_t SD_Init(SD_CardInfoTypedef *pCardInfo)
/* low speed */
SD_SPI_SetSpeed(0);
if (SD_Idle_Sta())
{
if (SD_Idle_Sta()) {
MSG("SD IDLE err:%d\r\n", rx);
return ERROR;
}
else
{
} else {
MSG("SD IDLE success\r\n");
}
/* send CMD8 */
rx = SD_SendCommand_NoDeassert(CMD8, 0x1aa, 0x87);
/* sd card v1.0 */
if (rx == 0x05)
{
/* sd card v1.0 */
if (rx == 0x05) {
pCardInfo->CardType = SD_TYPE_V1;
SPI_CS_WriteBit(1);
SPI_ReadWriteByte(&t_0xFF, &rx, 1);
/* send CMD55+CMD41 sd init */
do
{
do {
rx = SD_SendCommand(CMD55, 0, 0);
if (rx != 0x01)
{
if (rx != 0x01) {
MSG("sdv1 CMD55 err:%d\r\n", rx);
return rx;
}
rx = SD_SendCommand(ACMD41, 0, 0);
retry++;
} while (rx != 0x00 && retry < 100);
/* mmc card init */
if (retry >= 100)
{
if (retry >= 100) {
retry = 0;
do
{
do {
rx = SD_SendCommand(CMD1, 0, 0);
retry++;
} while (rx != 0x00 && retry < 100);
if (retry >= 100)
{
if (retry >= 100) {
MSG("sdv2 CMD1 timeout err:%d\r\n", rx);
return ERROR;
}
else
{
} else {
pCardInfo->CardType = SD_TYPE_MMC;
}
}
/* high speed */
SD_SPI_SetSpeed(1);
SPI_ReadWriteByte(&t_0xFF, &rx, 1);
/* set sector size */
rx = SD_SendCommand(CMD16, 512, 0xff);
if (rx != 0x00)
{
if (rx != 0x00) {
MSG("sdv1 CMD16 err:%d\r\n", rx);
return rx;
}
}
/* sd card v2.0 */
else if (rx == 0x01)
{
else if (rx == 0x01) {
SPI_ReadWriteByte(&t_0xFF, rxbuff + 0, 1);
SPI_ReadWriteByte(&t_0xFF, rxbuff + 1, 1);
SPI_ReadWriteByte(&t_0xFF, rxbuff + 2, 1);
@ -884,33 +886,36 @@ uint8_t SD_Init(SD_CardInfoTypedef *pCardInfo)
SPI_CS_WriteBit(1);
/* next 8 clocks */
SPI_ReadWriteByte(&t_0xFF, &rx, 1);
/* 2.7V - 3.6V */
if (rxbuff[2] == 0x01 && rxbuff[3] == 0xAA)
{
if (rxbuff[2] == 0x01 && rxbuff[3] == 0xAA) {
retry = 0;
do
{
do {
rx = SD_SendCommand(CMD55, 0, 0);
if (rx != 0x01)
{
if (rx != 0x01) {
MSG("sdv2 CMD55 err:%d\r\n", rx);
return rx;
}
rx = SD_SendCommand(ACMD41, 0x40000000, 0);
retry++;
if (retry > 200)
{
if (retry > 200) {
MSG("sdv2 CMD41 timeout err:%d\r\n", rx);
return rx;
}
} while (rx != 0);
/* send CMD58 */
rx = SD_SendCommand_NoDeassert(CMD58, 0, 0);
if (rx != 0X00)
{
if (rx != 0X00) {
MSG("sdv2 CMD58 err:%d\r\n", rx);
return rx;
}
/* get OCR */
SPI_ReadWriteByte(&t_0xFF, rxbuff + 0, 1);
SPI_ReadWriteByte(&t_0xFF, rxbuff + 1, 1);
@ -919,44 +924,50 @@ uint8_t SD_Init(SD_CardInfoTypedef *pCardInfo)
SPI_CS_WriteBit(1);
SPI_ReadWriteByte(&t_0xFF, &rx, 1);
/* bit32 CCS: 1-SDHC 0-SD2.0 */
if (rxbuff[0] & 0x40)
{
if (rxbuff[0] & 0x40) {
pCardInfo->CardType = SD_TYPE_V2HC;
MSG("sdv2hc success\r\n");
}
else
{
} else {
pCardInfo->CardType = SD_TYPE_V2;
MSG("sdv2.0 success\r\n");
}
/* set sector size */
rx = SD_SendCommand(CMD16, 512, 0xff);
if (rx != 0x00)
if (rx != 0x00) {
MSG("sdv1 CMD16 err:%d\r\n", rx);
}
/* high speed */
SD_SPI_SetSpeed(1);
SPI_ReadWriteByte(&t_0xFF, &rx, 1);
}
}
else
{
} else {
return 1;
}
MSG("sd init success\r\n");
SD_Get_CardInfo(pCardInfo);
MSG(" sd csd:");
for (i = 0; i < 4; i++)
for (i = 0; i < 4; i++) {
MSG("%X ", pCardInfo->SD_csd.CSD[i]);
MSG("end\r\n sd cid:");
for (i = 0; i < 4; i++)
MSG("%X ", pCardInfo->SD_cid.CID[i]);
}
MSG("end\r\n sd cid:");
for (i = 0; i < 4; i++) {
MSG("%X ", pCardInfo->SD_cid.CID[i]);
}
MSG("end\r\n");
MSG("SDHC CardBlockSize:%d Byte\r\n", (pCardInfo->CardBlockSize));
MSG("SDHC CardCapacity:%lld MByte\r\n", (SD_CardInfo.CardCapacity/1024/1024));
MSG("SDHC CardCapacity:%lld MByte\r\n", (SD_CardInfo.CardCapacity / 1024 / 1024));
return 0;
}

73
bsp/bsp_common/spi_sd/bsp_spi_sd.h
View file

@ -1,24 +1,24 @@
/**
* @file bsp_spi_sd.h
* @brief
*
* @brief
*
* Copyright (c) 2021 Bouffalolab team
*
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
*
* http://www.apache.org/licenses/LICENSE-2.0
*
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
*
*/
#ifndef __SPI_SD_H__
@ -28,46 +28,46 @@
//SD传输数据结束后是否释放总线宏定义
#define NO_RELEASE 0
#define RELEASE 1
#define RELEASE 1
// SD卡类型定义
#define SD_TYPE_MMC 0
#define SD_TYPE_V1 1
#define SD_TYPE_V2 2
#define SD_TYPE_MMC 0
#define SD_TYPE_V1 1
#define SD_TYPE_V2 2
#define SD_TYPE_V2HC 4
#define CMD0 0 // Resets the SD memory card.
#define CMD1 1 // Sends host capacity support information and activates the card's initialization process.
#define CMD8 8 // Sends SD Memory Card interface condition, which includes host supply voltage information and asks the card whether card supports voltage.
#define CMD9 9 // Addressed card sends its card specific data (CSD) on the CMD line.
#define CMD10 10 // Addressed card sends its card identification (CID) on the CMD line.
#define CMD12 12 // Forces the card to stop transmission.
#define CMD16 16 // Sets the block length (in bytes for SDSC) for all following block commands (read, write, lock).
// Default block length is fixed to 512 Bytes. Not effective for SDHS and SDXC
#define CMD17 17 // Reads single block of size selected by SET_BLOCKLEN in case of SDSC, and a block of fixed 512 bytes in case of SDHC and SDXC
#define CMD18 18 // Continuously transfers data blocks from card to host until interrupted by STOP_TRANSMISSION command
#define CMD0 0 // Resets the SD memory card.
#define CMD1 1 // Sends host capacity support information and activates the card's initialization process.
#define CMD8 8 // Sends SD Memory Card interface condition, which includes host supply voltage information and asks the card whether card supports voltage.
#define CMD9 9 // Addressed card sends its card specific data (CSD) on the CMD line.
#define CMD10 10 // Addressed card sends its card identification (CID) on the CMD line.
#define CMD12 12 // Forces the card to stop transmission.
#define CMD16 16 // Sets the block length (in bytes for SDSC) for all following block commands (read, write, lock).
// Default block length is fixed to 512 Bytes. Not effective for SDHS and SDXC
#define CMD17 17 // Reads single block of size selected by SET_BLOCKLEN in case of SDSC, and a block of fixed 512 bytes in case of SDHC and SDXC
#define CMD18 18 // Continuously transfers data blocks from card to host until interrupted by STOP_TRANSMISSION command
#define ACMD23 23 // Specify block count for CMD18 and CMD25
#define CMD24 24 // Writes single block of size selected by SET_BLOCKLEN in case of SDSC, and a block of fixed 512 bytes in case of SDHC and SDXC.
#define CMD25 25 // Continuously writes blocks of data until a STOP_TRANSMISSION follows.
#define CMD24 24 // Writes single block of size selected by SET_BLOCKLEN in case of SDSC, and a block of fixed 512 bytes in case of SDHC and SDXC.
#define CMD25 25 // Continuously writes blocks of data until a STOP_TRANSMISSION follows.
#define ACMD41 41 //
#define CMD55 55 // Indicates to the card that the next command is an application specific command rather than a standard command.
#define CMD58 58 // get OCR
#define CMD59 59 // enable/disable crc
#define CMD55 55 // Indicates to the card that the next command is an application specific command rather than a standard command.
#define CMD58 58 // get OCR
#define CMD59 59 // enable/disable crc
//数据写入回应字意义
#define MSD_DATA_OK 0x05
#define MSD_DATA_CRC_ERROR 0x0B
#define MSD_DATA_OK 0x05
#define MSD_DATA_CRC_ERROR 0x0B
#define MSD_DATA_WRITE_ERROR 0x0D
#define MSD_DATA_OTHER_ERROR 0xFF
//SD卡回应标记字
#define MSD_RESPONSE_NO_ERROR 0x00 // Card state is ready
#define MSD_IN_IDLE_STATE 0x01 // Card is in identification state
#define MSD_ERASE_RESET 0x02 // Card is in standby state
#define MSD_ILLEGAL_COMMAND 0x04 // Card is in transfer state
#define MSD_COM_CRC_ERROR 0x08 // Card is sending an operation
#define MSD_RESPONSE_NO_ERROR 0x00 // Card state is ready
#define MSD_IN_IDLE_STATE 0x01 // Card is in identification state
#define MSD_ERASE_RESET 0x02 // Card is in standby state
#define MSD_ILLEGAL_COMMAND 0x04 // Card is in transfer state
#define MSD_COM_CRC_ERROR 0x08 // Card is sending an operation
#define MSD_ERASE_SEQUENCE_ERROR 0x10 // Card is receiving operation information
#define MSD_ADDRESS_ERROR 0x20 // Card is in programming state
#define MSD_PARAMETER_ERROR 0x40 // Card is disconnected
#define MSD_RESPONSE_FAILURE 0xFF // Card is in error state
#define MSD_ADDRESS_ERROR 0x20 // Card is in programming state
#define MSD_PARAMETER_ERROR 0x40 // Card is disconnected
#define MSD_RESPONSE_FAILURE 0xFF // Card is in error state
typedef struct
{
@ -128,8 +128,7 @@ typedef struct
} SD_CIDTypedef;
typedef struct SD_CardInfoTypedef
{
typedef struct SD_CardInfoTypedef {
SD_CSDTypedef SD_csd; /*!< SD card specific data register */
SD_CIDTypedef SD_cid; /*!< SD card identification number register */
uint64_t CardCapacity; /*!< Card capacity */

26
bsp/bsp_common/touch/touch.c
View file

@ -1,41 +1,37 @@
/**
* @file touch.c
* @brief
*
* @brief
*
* Copyright (c) 2021 Bouffalolab team
*
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
*
* http://www.apache.org/licenses/LICENSE-2.0
*
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
*
*/
#include"touch.h"
#include "touch.h"
void touch_init(void)
{
#if defined (TOUCH_CONTROLLER_XPT2046)
#if defined(TOUCH_CONTROLLER_XPT2046)
xpt2046_init();
#endif
}
uint8_t touch_read(int16_t * x, int16_t * y)
uint8_t touch_read(int16_t *x, int16_t *y)
{
#if defined (TOUCH_CONTROLLER_XPT2046)
return xpt2046_read( x, y);
#if defined(TOUCH_CONTROLLER_XPT2046)
return xpt2046_read(x, y);
#endif
}

20
bsp/bsp_common/touch/touch.h
View file

@ -1,24 +1,24 @@
/**
* @file touch.h
* @brief
*
* @brief
*
* Copyright (c) 2021 Bouffalolab team
*
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
*
* http://www.apache.org/licenses/LICENSE-2.0
*
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
*
*/
#ifndef _TOUCH_H_
@ -26,13 +26,11 @@
#define TOUCH_CONTROLLER_XPT2046
#ifdef TOUCH_CONTROLLER_XPT2046
#include "xpt2046.h"
#ifdef TOUCH_CONTROLLER_XPT2046
#include "xpt2046.h"
#endif
void touch_init(void);
uint8_t touch_read(int16_t * x, int16_t * y);
uint8_t touch_read(int16_t *x, int16_t *y);
#endif

174
bsp/bsp_common/touch/xpt2046.c
View file

@ -1,24 +1,24 @@
/**
* @file xip2046.c
* @brief
*
* @brief
*
* Copyright (c) 2021 Bouffalolab team
*
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
*
* http://www.apache.org/licenses/LICENSE-2.0
*
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
*
*/
#include "hal_spi.h"
@ -27,24 +27,22 @@
#include "xpt2046.h"
#include "lvgl.h"
#define CMD_Y_READ 0b10010000 // NOTE: XPT2046 data sheet says this is actually Y
#define CMD_X_READ 0b11010000 // NOTE: XPT2046 data sheet says this is actually X
#define CMD_Y_READ 0b10010000 // NOTE: XPT2046 data sheet says this is actually Y
#define CMD_X_READ 0b11010000 // NOTE: XPT2046 data sheet says this is actually X
#define CMD_Z1_READ 0b10110000
#define CMD_Z2_READ 0b11000000
struct device* touch_spi;
struct device *touch_spi;
uint16_t avg_buf_x[XPT2046_AVG_NUM];
uint16_t avg_buf_y[XPT2046_AVG_NUM];
static void xpt2046_spi_read_reg(uint8_t reg, uint8_t* data, uint8_t byte_count)
static void xpt2046_spi_read_reg(uint8_t reg, uint8_t *data, uint8_t byte_count)
{
gpio_write(TOUCH_PIN_CS,0);
spi_transmit(touch_spi, &reg, 1, 0);
gpio_write(TOUCH_PIN_CS, 0);
spi_transmit(touch_spi, &reg, 1, 0);
spi_receive(touch_spi, data, byte_count, 0);
gpio_write(TOUCH_PIN_CS,1);
gpio_write(TOUCH_PIN_CS, 1);
}
// static void xpt2046_spi_write_reg(uint8_t reg, uint8_t* data, uint8_t byte_count)
@ -72,114 +70,121 @@ static uint16_t xpt2046_cmd(uint8_t cmd)
*******************************************************************************/
void xpt2046_init(void)
{
gpio_set_mode(TOUCH_PIN_CS,GPIO_OUTPUT_MODE);
gpio_write(TOUCH_PIN_CS,1);
gpio_set_mode(TOUCH_PIN_CS, GPIO_OUTPUT_MODE);
gpio_write(TOUCH_PIN_CS, 1);
touch_spi = device_find("spi0");
if(touch_spi)
{
if (touch_spi) {
device_close(touch_spi);
}
else{
spi_register(SPI0_INDEX,"spi0",DEVICE_OFLAG_RDWR);
} else {
spi_register(SPI0_INDEX, "spi0", DEVICE_OFLAG_RDWR);
touch_spi = device_find("spi0");
}
if(touch_spi)
{
device_open(touch_spi,DEVICE_OFLAG_STREAM_TX|DEVICE_OFLAG_STREAM_RX);
}
if (touch_spi) {
device_open(touch_spi, DEVICE_OFLAG_STREAM_TX | DEVICE_OFLAG_STREAM_RX);
}
}
/******************************************************************************
* @brief xpt2046_touch_detect_t
*
* @param
* @param
*
* @return
* @return
*
*******************************************************************************/
static uint8_t xpt2048_is_touch_detected()
{
// check pressure if we are pressure or IRQ and pressure
uint16_t z1 = xpt2046_cmd(CMD_Z1_READ) ;
uint16_t z2 = xpt2046_cmd(CMD_Z2_READ) ;
uint16_t z1 = xpt2046_cmd(CMD_Z1_READ);
uint16_t z2 = xpt2046_cmd(CMD_Z2_READ);
// this is not what the confusing datasheet says but it seems to
// be enough to detect real touches on the panel
uint16_t z = z1 + 4096 - z2;
if (z > XPT2046_TOUCH_THRESHOLD)
{
if (z > XPT2046_TOUCH_THRESHOLD) {
return 1;
}
else
{
} else {
return 0;
}
}
/******************************************************************************
* @brief xpt2046_ads_get
*
* @param
* @param
*
* @return
* @return
*
*******************************************************************************/
static uint8_t xpt2046_ads_get(int16_t *x, int16_t *y)
{
for(uint8_t i=0; i<XPT2046_AVG_NUM; i++)
{
if(xpt2048_is_touch_detected()==0)
{
for (uint8_t i = 0; i < XPT2046_AVG_NUM; i++) {
if (xpt2048_is_touch_detected() == 0) {
return 0;
}
avg_buf_x[i] = xpt2046_cmd(CMD_X_READ);
avg_buf_y[i] = xpt2046_cmd(CMD_Y_READ);
}
int16_t x_min=avg_buf_x[0],x_max=avg_buf_x[0];
int16_t y_min=avg_buf_y[0],y_max=avg_buf_y[0];
int32_t x_sum=avg_buf_x[0],y_sum=avg_buf_y[0];
int16_t x_min = avg_buf_x[0], x_max = avg_buf_x[0];
int16_t y_min = avg_buf_y[0], y_max = avg_buf_y[0];
int32_t x_sum = avg_buf_x[0], y_sum = avg_buf_y[0];
for(uint8_t i=1; i<XPT2046_AVG_NUM; i++)
{
if(x_min<avg_buf_x[i]) x_min=avg_buf_x[i];
if(x_max>avg_buf_x[i]) x_max=avg_buf_x[i];
if(y_min<avg_buf_y[i]) y_min=avg_buf_y[i];
if(y_max>avg_buf_y[i]) y_max=avg_buf_y[i];
x_sum+=avg_buf_x[i];
y_sum+=avg_buf_y[i];
for (uint8_t i = 1; i < XPT2046_AVG_NUM; i++) {
if (x_min < avg_buf_x[i]) {
x_min = avg_buf_x[i];
}
if (x_max > avg_buf_x[i]) {
x_max = avg_buf_x[i];
}
if (y_min < avg_buf_y[i]) {
y_min = avg_buf_y[i];
}
if (y_max > avg_buf_y[i]) {
y_max = avg_buf_y[i];
}
x_sum += avg_buf_x[i];
y_sum += avg_buf_y[i];
}
if(x_max-x_min>40 || y_max-y_min>50)
{
if (x_max - x_min > 40 || y_max - y_min > 50) {
return 0;
}
*x = (x_sum-x_min-x_max)/(XPT2046_AVG_NUM-2);
*y = (y_sum-y_min-y_max)/(XPT2046_AVG_NUM-2);
*x = (x_sum - x_min - x_max) / (XPT2046_AVG_NUM - 2);
*y = (y_sum - y_min - y_max) / (XPT2046_AVG_NUM - 2);
return 2;
}
/******************************************************************************
* @brief xpt2046_corr
*
* @param
* @param
*
* @return
* @return
*
*******************************************************************************/
static uint8_t xpt2046_adc2xy(int16_t * x, int16_t * y )
static uint8_t xpt2046_adc2xy(int16_t *x, int16_t *y)
{
if((*x) > XPT2046_X_MIN)
if ((*x) > XPT2046_X_MIN) {
(*x) -= XPT2046_X_MIN;
else
} else {
(*x) = 0;
}
if((*y) > XPT2046_Y_MIN)
if ((*y) > XPT2046_Y_MIN) {
(*y) -= XPT2046_Y_MIN;
else
} else {
(*y) = 0;
}
(*x) = (uint32_t)((uint32_t)(*x) * 240) /
(XPT2046_X_MAX - XPT2046_X_MIN);
@ -193,50 +198,45 @@ static uint8_t xpt2046_adc2xy(int16_t * x, int16_t * y )
/******************************************************************************
* @brief xpt2046_read
*
* @param
* @param
*
* @return
* @return
*
*******************************************************************************/
uint8_t xpt2046_read(int16_t * x, int16_t * y)
uint8_t xpt2046_read(int16_t *x, int16_t *y)
{
static int16_t xt=0,yt=0;
static int16_t xt = 0, yt = 0;
static uint8_t avg_last = 0;
int16_t x1,y1;
int16_t x1, y1;
if(xpt2046_ads_get(&x1, &y1)==0)
{
if (xpt2046_ads_get(&x1, &y1) == 0) {
goto end;
}
if(xpt2046_adc2xy(&x1,&y1)==0)
{
if (xpt2046_adc2xy(&x1, &y1) == 0) {
goto end;
}
if(avg_last == 0)
{
if (avg_last == 0) {
avg_last = 1;
return 0;
}
else
{
return 0;
} else {
avg_last = 2;
xt = x1; *x = x1;
yt = y1; *y = y1;
xt = x1;
*x = x1;
yt = y1;
*y = y1;
return 1;
}
end:
if (avg_last == 2)
{
end:
if (avg_last == 2) {
avg_last = 1;
*x = xt;
*y = yt;
return 1;
}
else
{
} else {
avg_last = 0;
return 0;
}

34
bsp/bsp_common/touch/xpt2046.h
View file

@ -1,50 +1,50 @@
/**
* @file xip2046.h
* @brief
*
* @brief
*
* Copyright (c) 2021 Bouffalolab team
*
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
*
* http://www.apache.org/licenses/LICENSE-2.0
*
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
*
*/
#ifndef _XPT2046_H_
#define _XPT2046_H_
#include "bflb_platform.h"
#define TOUCH_PIN_CS GPIO_PIN_11
#define TOUCH_PIN_CS GPIO_PIN_11
//#define TOUCH_PIN_PEN GPIO_PIN_11
#define XPT2046_TOUCH_THRESHOLD 500 // Threshold for touch detection
#define XPT2046_AVG_NUM 5
#define TOUCH_ROT_NONE 0
#define TOUCH_ROT_90 1
#define TOUCH_ROT_180 2
#define TOUCH_ROT_270 3
#define TOUCH_ROT_NONE 0
#define TOUCH_ROT_90 1
#define TOUCH_ROT_180 2
#define TOUCH_ROT_270 3
#define XPT2046_X_MIN 310
#define XPT2046_Y_MIN 175
#define XPT2046_X_MAX 3850
#define XPT2046_Y_MAX 3700
#define XPT2046_X_MIN 310
#define XPT2046_Y_MIN 175
#define XPT2046_X_MAX 3850
#define XPT2046_Y_MAX 3700
extern struct device* touch_spi;
extern struct device *touch_spi;
void xpt2046_init(void);
uint8_t xpt2046_read(int16_t * x, int16_t * y);
uint8_t xpt2046_read(int16_t *x, int16_t *y);
#endif

87
bsp/bsp_common/usb/uart_interface.c
View file

@ -1,24 +1,24 @@
/**
* @file uart_interface.c
* @brief
*
* @brief
*
* Copyright (c) 2021 Bouffalolab team
*
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
*
* http://www.apache.org/licenses/LICENSE-2.0
*
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
*
*/
#include "hal_gpio.h"
@ -28,45 +28,34 @@
#define USB_OUT_RINGBUFFER_SIZE (8 * 1024)
#define UART_RX_RINGBUFFER_SIZE (8 * 1024)
#define UART_TX_DMA_SIZE (4095)
#define UART_TX_DMA_SIZE (4095)
uint8_t usb_rx_mem[USB_OUT_RINGBUFFER_SIZE] __attribute__((section(".system_ram")));
uint8_t uart_rx_mem[UART_RX_RINGBUFFER_SIZE] __attribute__((section(".system_ram")));
uint8_t src_buffer[UART_TX_DMA_SIZE] __attribute__((section(".tcm_code")));
struct device* uart1;
struct device* dma_ch2;
struct device *uart1;
struct device *dma_ch2;
Ring_Buffer_Type usb_rx_rb;
Ring_Buffer_Type uart1_rx_rb;
void uart_irq_callback(struct device *dev, void *args, uint32_t size, uint32_t state)
{
if (state == UART_EVENT_RX_FIFO)
{
if (size && size < Ring_Buffer_Get_Empty_Length(&uart1_rx_rb))
{
if (state == UART_EVENT_RX_FIFO) {
if (size && size < Ring_Buffer_Get_Empty_Length(&uart1_rx_rb)) {
Ring_Buffer_Write(&uart1_rx_rb, (uint8_t *)args, size);
}
else
{
} else {
MSG("RF\r\n");
}
}
else if (state == UART_EVENT_RTO)
{
if (size && size < Ring_Buffer_Get_Empty_Length(&uart1_rx_rb))
{
} else if (state == UART_EVENT_RTO) {
if (size && size < Ring_Buffer_Get_Empty_Length(&uart1_rx_rb)) {
Ring_Buffer_Write(&uart1_rx_rb, (uint8_t *)args, size);
}
else
{
} else {
MSG("RTO\r\n");
}
}
else if (state == UART_RX_FER_IT)
{
} else if (state == UART_RX_FER_IT) {
MSG("ov\r\n");
}
}
@ -75,8 +64,7 @@ void uart1_init(void)
uart_register(UART1_INDEX, "uart1", DEVICE_OFLAG_RDWR);
uart1 = device_find("uart1");
if (uart1)
{
if (uart1) {
device_open(uart1, DEVICE_OFLAG_DMA_TX | DEVICE_OFLAG_INT_RX); //uart0 tx dma mode
device_control(uart1, DEVICE_CTRL_SUSPEND, NULL);
device_set_callback(uart1, uart_irq_callback);
@ -85,14 +73,14 @@ void uart1_init(void)
dma_register(DMA0_CH2_INDEX, "ch2", DEVICE_OFLAG_RDWR);
dma_ch2 = device_find("ch2");
if (dma_ch2)
{
if (dma_ch2) {
device_open(dma_ch2, 0);
//device_set_callback(dma_ch2, NULL);
//device_control(dma_ch2, DEVICE_CTRL_SET_INT, NULL);
}
//device_control(uart1, DEVICE_CTRL_ATTACH_TX_DMA, dma_ch2);
//device_control(uart1, DEVICE_CTRL_ATTACH_TX_DMA, dma_ch2);
}
void uart1_config(uint32_t baudrate, uart_databits_t databits, uart_parity_t parity, uart_stopbits_t stopbits)
@ -102,20 +90,13 @@ void uart1_config(uint32_t baudrate, uart_databits_t databits, uart_parity_t par
cfg.stopbits = stopbits;
cfg.parity = parity;
if (databits == 5)
{
if (databits == 5) {
cfg.databits = UART_DATA_LEN_5;
}
else if (databits == 6)
{
} else if (databits == 6) {
cfg.databits = UART_DATA_LEN_6;
}
else if (databits == 7)
{
} else if (databits == 7) {
cfg.databits = UART_DATA_LEN_7;
}
else if (databits == 8)
{
} else if (databits == 8) {
cfg.databits = UART_DATA_LEN_8;
}
@ -175,8 +156,7 @@ void uart_ringbuffer_init(void)
Ring_Buffer_Init(&uart1_rx_rb, uart_rx_mem, UART_RX_RINGBUFFER_SIZE, ringbuffer_lock, ringbuffer_unlock);
}
static dma_control_data_t uart_dma_ctrl_cfg =
{
static dma_control_data_t uart_dma_ctrl_cfg = {
.bits.fix_cnt = 0,
.bits.dst_min_mode = 0,
.bits.dst_add_mode = 0,
@ -189,8 +169,7 @@ static dma_control_data_t uart_dma_ctrl_cfg =
.bits.I = 0,
.bits.TransferSize = 4095
};
static dma_lli_ctrl_t uart_lli_list =
{
static dma_lli_ctrl_t uart_lli_list = {
.src_addr = (uint32_t)src_buffer,
.dst_addr = DMA_ADDR_UART1_TDR,
.nextlli = 0
@ -198,21 +177,17 @@ static dma_lli_ctrl_t uart_lli_list =
void uart_send_from_ringbuffer(void)
{
if(Ring_Buffer_Get_Length(&usb_rx_rb))
{
if (!device_control(dma_ch2, DMA_CHANNEL_GET_STATUS, NULL))
{
if (Ring_Buffer_Get_Length(&usb_rx_rb)) {
if (!device_control(dma_ch2, DMA_CHANNEL_GET_STATUS, NULL)) {
uint32_t avalibleCnt = Ring_Buffer_Read(&usb_rx_rb, src_buffer, UART_TX_DMA_SIZE);
if (avalibleCnt)
{
if (avalibleCnt) {
dma_channel_stop(dma_ch2);
uart_dma_ctrl_cfg.bits.TransferSize = avalibleCnt;
memcpy(&uart_lli_list.cfg, &uart_dma_ctrl_cfg, sizeof(dma_control_data_t));
device_control(dma_ch2,DMA_CHANNEL_UPDATE,(void*)((uint32_t)&uart_lli_list));
device_control(dma_ch2, DMA_CHANNEL_UPDATE, (void *)((uint32_t)&uart_lli_list));
dma_channel_start(dma_ch2);
}
}
}
}

14
bsp/bsp_common/usb/uart_interface.h
View file

@ -1,24 +1,24 @@
/**
* @file uart_interface.h
* @brief
*
* @brief
*
* Copyright (c) 2021 Bouffalolab team
*
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
*
* http://www.apache.org/licenses/LICENSE-2.0
*
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
*
*/
#ifndef __UART_IF_H__
@ -31,7 +31,7 @@ extern Ring_Buffer_Type usb_rx_rb;
extern Ring_Buffer_Type uart1_rx_rb;
void uart1_init(void);
void uart1_config(uint32_t baudrate,uart_databits_t databits,uart_parity_t parity,uart_stopbits_t stopbits);
void uart1_config(uint32_t baudrate, uart_databits_t databits, uart_parity_t parity, uart_stopbits_t stopbits);
void uart1_set_dtr_rts(uint8_t dtr, uint8_t rts);
void uart1_dtr_init(void);
void uart1_rts_init(void);

97
bsp/bsp_common/usb/usb_dc.c
View file

@ -1,24 +1,24 @@
/**
* @file usb_dc.c
* @brief
*
* @brief
*
* Copyright (c) 2021 Bouffalolab team
*
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
*
* http://www.apache.org/licenses/LICENSE-2.0
*
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
*
*/
#include "hal_usb.h"
@ -29,78 +29,85 @@ struct device *usb;
static void usb_dc_event_callback(struct device *dev, void *args, uint32_t size, uint32_t state)
{
switch (state)
{
case USB_DC_EVENT_ERROR:
usbd_event_notify_handler(USB_EVENT_ERROR,NULL);
break;
case USB_DC_EVENT_RESET:
usbd_event_notify_handler(USB_EVENT_RESET,NULL);
break;
case USB_DC_EVENT_SOF:
usbd_event_notify_handler(USB_EVENT_SOF,NULL);
break;
case USB_DC_EVENT_SETUP_NOTIFY:
usbd_event_notify_handler(USB_EVENT_SETUP_NOTIFY,NULL);
break;
case USB_DC_EVENT_EP0_IN_NOTIFY:
usbd_event_notify_handler(USB_EVENT_EP0_IN_NOTIFY,NULL);
break;
case USB_DC_EVENT_EP0_OUT_NOTIFY:
usbd_event_notify_handler(USB_EVENT_EP0_OUT_NOTIFY,NULL);
break;
case USB_DC_EVENT_EP_IN_NOTIFY:
usbd_event_notify_handler(USB_EVENT_EP_IN_NOTIFY,args);
break;
case USB_DC_EVENT_EP_OUT_NOTIFY:
usbd_event_notify_handler(USB_EVENT_EP_OUT_NOTIFY,args);
break;
default:
break;
switch (state) {
case USB_DC_EVENT_ERROR:
usbd_event_notify_handler(USB_EVENT_ERROR, NULL);
break;
case USB_DC_EVENT_RESET:
usbd_event_notify_handler(USB_EVENT_RESET, NULL);
break;
case USB_DC_EVENT_SOF:
usbd_event_notify_handler(USB_EVENT_SOF, NULL);
break;
case USB_DC_EVENT_SETUP_NOTIFY:
usbd_event_notify_handler(USB_EVENT_SETUP_NOTIFY, NULL);
break;
case USB_DC_EVENT_EP0_IN_NOTIFY:
usbd_event_notify_handler(USB_EVENT_EP0_IN_NOTIFY, NULL);
break;
case USB_DC_EVENT_EP0_OUT_NOTIFY:
usbd_event_notify_handler(USB_EVENT_EP0_OUT_NOTIFY, NULL);
break;
case USB_DC_EVENT_EP_IN_NOTIFY:
usbd_event_notify_handler(USB_EVENT_EP_IN_NOTIFY, args);
break;
case USB_DC_EVENT_EP_OUT_NOTIFY:
usbd_event_notify_handler(USB_EVENT_EP_OUT_NOTIFY, args);
break;
default:
break;
}
}
struct device* usb_dc_init(void)
struct device *usb_dc_init(void)
{
usb_dc_register(USB_INDEX, "usb", DEVICE_OFLAG_RDWR);
usb = device_find("usb");
device_set_callback(usb,usb_dc_event_callback);
device_set_callback(usb, usb_dc_event_callback);
device_open(usb, 0);
return usb;
}
int usbd_set_address(const uint8_t addr)
{
return device_control(usb,DEVICE_CTRL_USB_DC_SET_ADDR,(void*)(uint32_t)addr);
return device_control(usb, DEVICE_CTRL_USB_DC_SET_ADDR, (void *)(uint32_t)addr);
}
int usbd_ep_open(const struct usbd_endpoint_cfg *ep_cfg)
{
return usb_dc_ep_open(usb,(const struct usb_dc_ep_cfg*)ep_cfg);
return usb_dc_ep_open(usb, (const struct usb_dc_ep_cfg *)ep_cfg);
}
int usbd_ep_close(const uint8_t ep)
{
device_control(usb,DEVICE_CTRL_USB_DC_SET_NACK,(void*)(uint32_t)ep);
device_control(usb, DEVICE_CTRL_USB_DC_SET_NACK, (void *)(uint32_t)ep);
return 0;
}
int usbd_ep_set_stall(const uint8_t ep)
{
return device_control(usb,DEVICE_CTRL_USB_DC_SET_STALL,(void*)(uint32_t)ep);
return device_control(usb, DEVICE_CTRL_USB_DC_SET_STALL, (void *)(uint32_t)ep);
}
int usbd_ep_clear_stall(const uint8_t ep)
{
return device_control(usb,DEVICE_CTRL_USB_DC_CLR_STALL,(void*)(uint32_t)ep);
return device_control(usb, DEVICE_CTRL_USB_DC_CLR_STALL, (void *)(uint32_t)ep);
}
int usbd_ep_is_stalled(const uint8_t ep, uint8_t *stalled)
{
return usb_dc_ep_is_stalled(usb,ep,stalled);
return usb_dc_ep_is_stalled(usb, ep, stalled);
}
int usbd_ep_write(const uint8_t ep, const uint8_t *data, uint32_t data_len, uint32_t *ret_bytes)
{
return usb_dc_ep_write(usb,ep,data,data_len,ret_bytes);
return usb_dc_ep_write(usb, ep, data, data_len, ret_bytes);
}
int usbd_ep_read(const uint8_t ep, uint8_t *data, uint32_t max_data_len,uint32_t *read_bytes)
int usbd_ep_read(const uint8_t ep, uint8_t *data, uint32_t max_data_len, uint32_t *read_bytes)
{
return usb_dc_ep_read(usb,ep,data,max_data_len,read_bytes);
return usb_dc_ep_read(usb, ep, data, max_data_len, read_bytes);
}

108
common/device/drv_device.c
View file

@ -1,31 +1,31 @@
/**
* @file drv_device.c
*
*
* Copyright (c) 2021 Bouffalolab team
*
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
*
* http://www.apache.org/licenses/LICENSE-2.0
*
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
*
*/
#include "drv_device.h"
#include "string.h"
#define dev_open (dev->open)
#define dev_close (dev->close)
#define dev_read (dev->read)
#define dev_write (dev->write)
#define dev_open (dev->open)
#define dev_close (dev->close)
#define dev_read (dev->read)
#define dev_write (dev->write)
#define dev_control (dev->control)
dlist_t device_head = DLIST_OBJECT_INIT(device_head);
@ -41,7 +41,7 @@ dlist_t device_head = DLIST_OBJECT_INIT(device_head);
*/
int device_register(struct device *dev, const char *name, uint16_t flag)
{
#define OBJECT_DEVICE_TYPE 0
#define OBJECT_DEVICE_TYPE 0
#define OBJECT_FLAG_DEFAULT 0
dlist_t *node;
@ -50,8 +50,8 @@ int device_register(struct device *dev, const char *name, uint16_t flag)
{
struct device *dev_obj;
dev_obj = dlist_entry(node, struct device, list);
if (dev_obj == dev)
{
if (dev_obj == dev) {
return -DEVICE_EEXIST;
}
}
@ -70,7 +70,8 @@ int device_register(struct device *dev, const char *name, uint16_t flag)
*
* @return device header
*/
dlist_t * device_get_list_header(void){
dlist_t *device_get_list_header(void)
{
return &device_head;
}
/**
@ -84,16 +85,17 @@ dlist_t * device_get_list_header(void){
*/
int device_unregister(const char *name)
{
struct device* dev = device_find(name);
if(!dev)
return -DEVICE_ENODEV;
struct device *dev = device_find(name);
if (!dev) {
return -DEVICE_ENODEV;
}
/* remove from old list */
dlist_remove(&(dev->list));
return DEVICE_EOK;
}
/**
* This function finds a device driver by specified name.
*
@ -109,8 +111,8 @@ struct device *device_find(const char *name)
dlist_for_each(node, &device_head)
{
dev = dlist_entry(node, struct device, list);
if (strncmp(dev->name, name, NAME_MAX) == 0)
{
if (strncmp(dev->name, name, NAME_MAX) == 0) {
return dev;
}
}
@ -129,19 +131,16 @@ int device_open(struct device *dev, uint16_t oflag)
{
int retval = DEVICE_EOK;
if ((dev->status == DEVICE_REGISTERED) || (dev->status == DEVICE_CLOSED))
{
if (dev_open != NULL)
{
if ((dev->status == DEVICE_REGISTERED) || (dev->status == DEVICE_CLOSED)) {
if (dev_open != NULL) {
retval = dev_open(dev, oflag);
dev->status = DEVICE_OPENED;
dev->oflag |= oflag;
}
}
else
{
} else {
retval = -DEVICE_EFAULT;
}
return retval;
}
/**
@ -155,19 +154,16 @@ int device_close(struct device *dev)
{
int retval = DEVICE_EOK;
if (dev->status == DEVICE_OPENED)
{
if (dev_close != NULL)
{
if (dev->status == DEVICE_OPENED) {
if (dev_close != NULL) {
retval = dev_close(dev);
dev->status = DEVICE_CLOSED;
dev->oflag = 0;
}
}
else
{
} else {
retval = -DEVICE_EFAULT;
}
return retval;
}
/**
@ -183,17 +179,14 @@ int device_control(struct device *dev, int cmd, void *args)
{
int retval = DEVICE_EOK;
if (dev->status >= DEVICE_REGISTERED)
{
if (dev_control != NULL)
{
if (dev->status >= DEVICE_REGISTERED) {
if (dev_control != NULL) {
retval = dev_control(dev, cmd, args);
}
}
else
{
} else {
retval = -DEVICE_EFAULT;
}
return retval;
}
/**
@ -210,17 +203,14 @@ int device_write(struct device *dev, uint32_t pos, const void *buffer, uint32_t
{
int retval = DEVICE_EOK;
if (dev->status == DEVICE_OPENED)
{
if (dev_write != NULL)
{
if (dev->status == DEVICE_OPENED) {
if (dev_write != NULL) {
retval = dev_write(dev, pos, buffer, size);
}
}
else
{
} else {
retval = -DEVICE_EFAULT;
}
return retval;
}
/**
@ -237,17 +227,14 @@ int device_read(struct device *dev, uint32_t pos, void *buffer, uint32_t size)
{
int retval = DEVICE_EOK;
if (dev->status == DEVICE_OPENED)
{
if (dev_read != NULL)
{
if (dev->status == DEVICE_OPENED) {
if (dev_read != NULL) {
retval = dev_read(dev, pos, buffer, size);
}
}
else
{
} else {
retval = -DEVICE_EFAULT;
}
return retval;
}
/**
@ -264,16 +251,13 @@ int device_set_callback(struct device *dev, void (*callback)(struct device *dev,
{
int retval = DEVICE_EOK;
if (dev->status > DEVICE_UNREGISTER)
{
if (callback != NULL)
{
if (dev->status > DEVICE_UNREGISTER) {
if (callback != NULL) {
dev->callback = callback;
}
}
else
{
} else {
retval = -DEVICE_EFAULT;
}
return retval;
}

106
common/device/drv_device.h
View file

@ -1,24 +1,24 @@
/**
* @file drv_device.h
* @brief
*
* @brief
*
* Copyright (c) 2021 Bouffalolab team
*
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
*
* http://www.apache.org/licenses/LICENSE-2.0
*
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
*
*/
#ifndef __DRV_DEVICE_H__
#define __DRV_DEVICE_H__
@ -26,62 +26,62 @@
#include "drv_list.h"
#include "bflb_platform.h"
#define NAME_MAX 10 /* max device name*/
#define NAME_MAX 20 /* max device name*/
#define DEVICE_OFLAG_RDONLY 0x1000 /* open with read only */
#define DEVICE_OFLAG_WRONLY 0x2000 /* open with write only */
#define DEVICE_OFLAG_RDWR 0x3000 /* open with read and write */
#define DEVICE_OFLAG_STREAM_TX 0x001 /* open with poll tx */
#define DEVICE_OFLAG_STREAM_RX 0x002 /* open with poll rx */
#define DEVICE_OFLAG_INT_TX 0x004 /* open with interrupt tx */
#define DEVICE_OFLAG_INT_RX 0x008 /* open with interrupt rx */
#define DEVICE_OFLAG_DMA_TX 0x010 /* open with dma tx */
#define DEVICE_OFLAG_DMA_RX 0x020 /* open with dma rx */
#define DEVICE_OFLAG_STREAM_TX 0x001 /* open with poll tx */
#define DEVICE_OFLAG_STREAM_RX 0x002 /* open with poll rx */
#define DEVICE_OFLAG_INT_TX 0x004 /* open with interrupt tx */
#define DEVICE_OFLAG_INT_RX 0x008 /* open with interrupt rx */
#define DEVICE_OFLAG_DMA_TX 0x010 /* open with dma tx */
#define DEVICE_OFLAG_DMA_RX 0x020 /* open with dma rx */
#define DEVICE_CTRL_SET_INT 0x01 /* set interrupt */
#define DEVICE_CTRL_CLR_INT 0x02 /* clear interrupt */
#define DEVICE_CTRL_GET_INT 0x03 /* get interrupt status*/
#define DEVICE_CTRL_RESUME 0x04 /* resume device */
#define DEVICE_CTRL_SUSPEND 0x05 /* suspend device */
#define DEVICE_CTRL_CONFIG 0x06 /* config device */
#define DEVICE_CTRL_GET_CONFIG 0x07 /* get device configuration */
#define DEVICE_CTRL_ATTACH_TX_DMA 0x08
#define DEVICE_CTRL_ATTACH_RX_DMA 0x09
#define DEVICE_CTRL_TX_DMA_SUSPEND 0x0a
#define DEVICE_CTRL_RX_DMA_SUSPEND 0x0b
#define DEVICE_CTRL_TX_DMA_RESUME 0x0c
#define DEVICE_CTRL_RX_DMA_RESUME 0x0d
#define DEVICE_CTRL_RESVD1 0x0E
#define DEVICE_CTRL_RESVD2 0x0F
#define DEVICE_CTRL_SET_INT 0x01 /* set interrupt */
#define DEVICE_CTRL_CLR_INT 0x02 /* clear interrupt */
#define DEVICE_CTRL_GET_INT 0x03 /* get interrupt status*/
#define DEVICE_CTRL_RESUME 0x04 /* resume device */
#define DEVICE_CTRL_SUSPEND 0x05 /* suspend device */
#define DEVICE_CTRL_CONFIG 0x06 /* config device */
#define DEVICE_CTRL_GET_CONFIG 0x07 /* get device configuration */
#define DEVICE_CTRL_ATTACH_TX_DMA 0x08
#define DEVICE_CTRL_ATTACH_RX_DMA 0x09
#define DEVICE_CTRL_TX_DMA_SUSPEND 0x0a
#define DEVICE_CTRL_RX_DMA_SUSPEND 0x0b
#define DEVICE_CTRL_TX_DMA_RESUME 0x0c
#define DEVICE_CTRL_RX_DMA_RESUME 0x0d
#define DEVICE_CTRL_RESVD1 0x0E
#define DEVICE_CTRL_RESVD2 0x0F
/*
* POSIX Error codes
*/
#define DEVICE_EOK 0
#define DEVICE_EFAULT 14 /* Bad address */
#define DEVICE_EEXIST 17 /* device exists */
#define DEVICE_ENODEV 19 /* No such device */
#define DEVICE_EINVAL 22 /* Invalid argument */
#define DEVICE_EOK 0
#define DEVICE_EFAULT 14 /* Bad address */
#define DEVICE_EEXIST 17 /* device exists */
#define DEVICE_ENODEV 19 /* No such device */
#define DEVICE_EINVAL 22 /* Invalid argument */
#define DEVICE_ENOSPACE 23 /* No more Device for Allocate */
#define __ASSERT_PRINT(fmt, ...) bflb_platform_printf(fmt, ##__VA_ARGS__)
#define __ASSERT_LOC(test) \
__ASSERT_PRINT("ASSERTION FAIL [%s] @ %s:%d\n", \
#test, \
__FILE__, __LINE__)
#define __ASSERT_LOC(test) \
__ASSERT_PRINT("ASSERTION FAIL [%s] @ %s:%d\n", \
#test, \
__FILE__, __LINE__)
#define DEVICE_ASSERT(test, fmt, ...) \
do { \
if (!(test)) { \
__ASSERT_LOC(test); \
__ASSERT_PRINT(fmt, ##__VA_ARGS__); \
} \
} while (0)
#define DEVICE_ASSERT(test, fmt, ...) \
do { \
if (!(test)) { \
__ASSERT_LOC(test); \
__ASSERT_PRINT(fmt, ##__VA_ARGS__); \
} \
} while (0)
enum device_class_type
{
enum device_class_type {
DEVICE_CLASS_NONE = 0,
DEVICE_CLASS_GPIO,
DEVICE_CLASS_UART,
@ -96,18 +96,16 @@ enum device_class_type
DEVICE_CLASS_I2S,
DEVICE_CLASS_CAMERA,
DEVICE_CLASS_SEC_HASH,
} ;
};
enum device_status_type
{
enum device_status_type {
DEVICE_UNREGISTER = 0,
DEVICE_REGISTERED,
DEVICE_OPENED,
DEVICE_CLOSED
} ;
};
struct device
{
struct device {
char name[NAME_MAX]; /*name of device */
dlist_t list; /*list node of device */
enum device_status_type status; /*status of device */
@ -132,5 +130,5 @@ int device_control(struct device *dev, int cmd, void *args);
int device_write(struct device *dev, uint32_t pos, const void *buffer, uint32_t size);
int device_read(struct device *dev, uint32_t pos, void *buffer, uint32_t size);
int device_set_callback(struct device *dev, void (*callback)(struct device *dev, void *args, uint32_t size, uint32_t event));
dlist_t * device_get_list_header(void);
dlist_t *device_get_list_header(void);
#endif

15
common/libc/inc/arm_gcc/compat_attribute.h
View file

@ -1,28 +1,27 @@
#ifndef _COMPAT_ATTRIBUTE_H_
#define _COMPAT_ATTRIBUTE_H_
#define __DEPRECATED__(x) __attribute__((deprecated(x)))
#define __PACKED__ __attribute__ ((packed))
#define __PACKED__ __attribute__((packed))
#define __PACKED_START__
#define __PACKED_END__ __PACKED__
#define __UNUSED__ __attribute__((unused))
#define __UNUSED__ __attribute__((unused))
#define __MAY_ALIAS__ __attribute__((may_alias))
#define __ALIGNED__(y) __attribute__((aligned(y)))
#define __SECTION__(y) __attribute__((section(#y)))
#define __FORCED_INLINE__ inline __attribute__((always_inline))
#define __NOINLINE__ __attribute__((noinline))
#define __NOINLINE__ __attribute__((noinline))
#define __WEAK__ __attribute__((weak))
#define __WEAK__ __attribute__((weak))
#define __INTERRUPT__ __attribute__((interrupt))
#define __USED__ __attribute__((used))
#define __NAKED__ __attribute__((naked))
#define __USED__ __attribute__((used))
#define __NAKED__ __attribute__((naked))
#define __VISIBILITY__ __attribute__((visibility("default")))
#endif /* _COMPAT_ATTRIBUTE_H_ */
#endif /* _COMPAT_ATTRIBUTE_H_ */

1
common/libc/inc/arm_gcc/compat_compiler.h
View file

@ -3,4 +3,3 @@
#ifndef _COMPAT_COMPILER_H_
#define _COMPAT_COMPILER_H_
#endif /* _COMPAT_COMPILER_H_ */

3
common/libc/inc/arm_gcc/compat_errno.h
View file

@ -3,7 +3,6 @@
#ifndef _COMPAT_ERRNO_H_
#define _COMPAT_ERRNO_H_
#include <errno.h>
#endif /* _COMPAT_ERRNO_H_ */
#endif /* _COMPAT_ERRNO_H_ */

2
common/libc/inc/arm_gcc/compat_param.h
View file

@ -3,4 +3,4 @@
#include <sys/param.h> /* need this to define BSD */
#endif /* _COMPAT_PARAM_H */
#endif /* _COMPAT_PARAM_H */

4
common/libc/inc/arm_gcc/compat_time.h
View file

@ -1,10 +1,8 @@
#ifndef _COMPAT_TIME_H_
#define _COMPAT_TIME_H_
#include <sys/time.h>
#endif /* _COMPAT_TIME_H_ */
#endif /* _COMPAT_TIME_H_ */

47
common/libc/inc/bits/ctype_base.h
View file

@ -1,29 +1,28 @@
namespace std _GLIBCXX_VISIBILITY(default)
{
_GLIBCXX_BEGIN_NAMESPACE_VERSION
_GLIBCXX_BEGIN_NAMESPACE_VERSION
/// @brief Base class for ctype.
struct ctype_base
{
// Non-standard typedefs.
typedef const int* __to_type;
/// @brief Base class for ctype.
struct ctype_base {
// Non-standard typedefs.
typedef const int *__to_type;
// NB: Offsets into ctype<char>::_M_table force a particular size
// on the mask type. Because of this, we don't use an enum.
typedef char mask;
static const mask upper = _U;
static const mask lower = _L;
static const mask alpha = _U | _L;
static const mask digit = _N;
static const mask xdigit = _X | _N;
static const mask space = _S;
static const mask print = _P | _U | _L | _N | _B;
static const mask graph = _P | _U | _L | _N;
static const mask cntrl = _C;
static const mask punct = _P;
static const mask alnum = _U | _L | _N;
};
// NB: Offsets into ctype<char>::_M_table force a particular size
// on the mask type. Because of this, we don't use an enum.
typedef char mask;
static const mask upper = _U;
static const mask lower = _L;
static const mask alpha = _U | _L;
static const mask digit = _N;
static const mask xdigit = _X | _N;
static const mask space = _S;
static const mask print = _P | _U | _L | _N | _B;
static const mask graph = _P | _U | _L | _N;
static const mask cntrl = _C;
static const mask punct = _P;
static const mask alnum = _U | _L | _N;
};
_GLIBCXX_END_NAMESPACE_VERSION
} // namespace
_GLIBCXX_END_NAMESPACE_VERSION
} // namespace )

68
common/libc/inc/ctype.h
View file

@ -10,14 +10,14 @@
#include <extern.h>
#include <libc_compiler.h>
#define _U (1 << 0)
#define _L (1 << 1)
#define _N (1 << 2)
#define _S (1 << 3)
#define _P (1 << 4)
#define _C (1 << 5)
#define _X (1 << 6)
#define _B (1 << 7)
#define _U (1 << 0)
#define _L (1 << 1)
#define _N (1 << 2)
#define _S (1 << 3)
#define _P (1 << 4)
#define _C (1 << 5)
#define _X (1 << 6)
#define _B (1 << 7)
/*
* This relies on the following definitions:
@ -28,14 +28,14 @@
* blank = '\t' || ' ' (per POSIX requirement)
*/
enum {
__ctype_upper = _U,
__ctype_lower = _L,
__ctype_digit = _N,
__ctype_xdigit = _S,
__ctype_space = _P,
__ctype_print = _C,
__ctype_punct = _X,
__ctype_cntrl = _B
__ctype_upper = _U,
__ctype_lower = _L,
__ctype_digit = _N,
__ctype_xdigit = _S,
__ctype_space = _P,
__ctype_print = _C,
__ctype_punct = _X,
__ctype_cntrl = _B
};
__extern int isalnum(int);
@ -58,69 +58,69 @@ extern const unsigned char __ctypes[];
__must_inline int __ctype_isalnum(int __c)
{
return __ctypes[__c + 1] &
(__ctype_upper | __ctype_lower | __ctype_digit);
return __ctypes[__c + 1] &
(__ctype_upper | __ctype_lower | __ctype_digit);
}
__must_inline int __ctype_isalpha(int __c)
{
return __ctypes[__c + 1] & (__ctype_upper | __ctype_lower);
return __ctypes[__c + 1] & (__ctype_upper | __ctype_lower);
}
__must_inline int __ctype_isascii(int __c)
{
return !(__c & ~0x7f);
return !(__c & ~0x7f);
}
__must_inline int __ctype_isblank(int __c)
{
return (__c == '\t') || (__c == ' ');
return (__c == '\t') || (__c == ' ');
}
__must_inline int __ctype_iscntrl(int __c)
{
return __ctypes[__c + 1] & __ctype_cntrl;
return __ctypes[__c + 1] & __ctype_cntrl;
}
__must_inline int __ctype_isdigit(int __c)
{
return ((unsigned)__c - '0') <= 9;
return ((unsigned)__c - '0') <= 9;
}
__must_inline int __ctype_isgraph(int __c)
{
return __ctypes[__c + 1] &
(__ctype_upper | __ctype_lower | __ctype_digit | __ctype_punct);
return __ctypes[__c + 1] &
(__ctype_upper | __ctype_lower | __ctype_digit | __ctype_punct);
}
__must_inline int __ctype_islower(int __c)
{
return __ctypes[__c + 1] & __ctype_lower;
return __ctypes[__c + 1] & __ctype_lower;
}
__must_inline int __ctype_isprint(int __c)
{
return __ctypes[__c + 1] & __ctype_print;
return __ctypes[__c + 1] & __ctype_print;
}
__must_inline int __ctype_ispunct(int __c)
{
return __ctypes[__c + 1] & __ctype_punct;
return __ctypes[__c + 1] & __ctype_punct;
}
__must_inline int __ctype_isspace(int __c)
{
return __ctypes[__c + 1] & __ctype_space;
return __ctypes[__c + 1] & __ctype_space;
}
__must_inline int __ctype_isupper(int __c)
{
return __ctypes[__c + 1] & __ctype_upper;
return __ctypes[__c + 1] & __ctype_upper;
}
__must_inline int __ctype_isxdigit(int __c)
{
return __ctypes[__c + 1] & __ctype_xdigit;
return __ctypes[__c + 1] & __ctype_xdigit;
}
/* Note: this is decimal, not hex, to avoid accidental promotion to unsigned */
@ -129,12 +129,12 @@ __must_inline int __ctype_isxdigit(int __c)
__must_inline int __ctype_toupper(int __c)
{
return __ctype_islower(__c) ? _toupper(__c) : __c;
return __ctype_islower(__c) ? _toupper(__c) : __c;
}
__must_inline int __ctype_tolower(int __c)
{
return __ctype_isupper(__c) ? _tolower(__c) : __c;
return __ctype_isupper(__c) ? _tolower(__c) : __c;
}
#endif /* _CTYPE_H */
#endif /* _CTYPE_H */

2
common/libc/inc/extern.h
View file

@ -13,4 +13,4 @@
#define __alias(x) __attribute__((weak, alias(x)))
#endif /* _EXTERN_H */
#endif /* _EXTERN_H */

10
common/libc/inc/fnmatch.h
View file

@ -3,12 +3,12 @@
#include <extern.h>
#define FNM_NOMATCH 1
#define FNM_NOMATCH 1
#define FNM_PATHNAME 1
#define FNM_FILE_NAME FNM_PATHNAME
#define FNM_NOESCAPE 2
#define FNM_PERIOD 4
#define FNM_PATHNAME 1
#define FNM_FILE_NAME FNM_PATHNAME
#define FNM_NOESCAPE 2
#define FNM_PERIOD 4
__extern int fnmatch(const char *, const char *, int);

312
common/libc/inc/inttypes.h
View file

@ -12,7 +12,7 @@
static __inline intmax_t imaxabs(intmax_t __n)
{
return (__n < (intmax_t) 0) ? -__n : __n;
return (__n < (intmax_t)0) ? -__n : __n;
}
__extern intmax_t strtoimax(const char *, char **, int);
@ -24,204 +24,204 @@ __extern uintmax_t strntoumax(const char *, char **, int, size_t);
#if !defined(__cplusplus) || defined(__STDC_FORMAT_MACROS)
#define PRId8 "d"
#define PRId16 "d"
#define PRId32 "d"
#define PRId64 __PRI64_RANK "d"
#define PRId8 "d"
#define PRId16 "d"
#define PRId32 "d"
#define PRId64 __PRI64_RANK "d"
#define PRIdLEAST8 "d"
#define PRIdLEAST16 "d"
#define PRIdLEAST32 "d"
#define PRIdLEAST64 __PRI64_RANK "d"
#define PRIdLEAST8 "d"
#define PRIdLEAST16 "d"
#define PRIdLEAST32 "d"
#define PRIdLEAST64 __PRI64_RANK "d"
#define PRIdFAST8 "d"
#define PRIdFAST16 __PRIFAST_RANK "d"
#define PRIdFAST32 __PRIFAST_RANK "d"
#define PRIdFAST64 __PRI64_RANK "d"
#define PRIdFAST8 "d"
#define PRIdFAST16 __PRIFAST_RANK "d"
#define PRIdFAST32 __PRIFAST_RANK "d"
#define PRIdFAST64 __PRI64_RANK "d"
#define PRIdMAX __PRI64_RANK "d"
#define PRIdPTR __PRIPTR_RANK "d"
#define PRIdMAX __PRI64_RANK "d"
#define PRIdPTR __PRIPTR_RANK "d"
#define PRIi8 "i"
#define PRIi16 "i"
#define PRIi32 "i"
#define PRIi64 __PRI64_RANK "i"
#define PRIi8 "i"
#define PRIi16 "i"
#define PRIi32 "i"
#define PRIi64 __PRI64_RANK "i"
#define PRIiLEAST8 "i"
#define PRIiLEAST16 "i"
#define PRIiLEAST32 "i"
#define PRIiLEAST64 __PRI64_RANK "i"
#define PRIiLEAST8 "i"
#define PRIiLEAST16 "i"
#define PRIiLEAST32 "i"
#define PRIiLEAST64 __PRI64_RANK "i"
#define PRIiFAST8 "i"
#define PRIiFAST16 __PRIFAST_RANK "i"
#define PRIiFAST32 __PRIFAST_RANK "i"
#define PRIiFAST64 __PRI64_RANK "i"
#define PRIiFAST8 "i"
#define PRIiFAST16 __PRIFAST_RANK "i"
#define PRIiFAST32 __PRIFAST_RANK "i"
#define PRIiFAST64 __PRI64_RANK "i"
#define PRIiMAX __PRI64_RANK "i"
#define PRIiPTR __PRIPTR_RANK "i"
#define PRIiMAX __PRI64_RANK "i"
#define PRIiPTR __PRIPTR_RANK "i"
#define PRIo8 "o"
#define PRIo16 "o"
#define PRIo32 "o"
#define PRIo64 __PRI64_RANK "o"
#define PRIo8 "o"
#define PRIo16 "o"
#define PRIo32 "o"
#define PRIo64 __PRI64_RANK "o"
#define PRIoLEAST8 "o"
#define PRIoLEAST16 "o"
#define PRIoLEAST32 "o"
#define PRIoLEAST64 __PRI64_RANK "o"
#define PRIoLEAST8 "o"
#define PRIoLEAST16 "o"
#define PRIoLEAST32 "o"
#define PRIoLEAST64 __PRI64_RANK "o"
#define PRIoFAST8 "o"
#define PRIoFAST16 __PRIFAST_RANK "o"
#define PRIoFAST32 __PRIFAST_RANK "o"
#define PRIoFAST64 __PRI64_RANK "o"
#define PRIoFAST8 "o"
#define PRIoFAST16 __PRIFAST_RANK "o"
#define PRIoFAST32 __PRIFAST_RANK "o"
#define PRIoFAST64 __PRI64_RANK "o"
#define PRIoMAX __PRI64_RANK "o"
#define PRIoPTR __PRIPTR_RANK "o"
#define PRIoMAX __PRI64_RANK "o"
#define PRIoPTR __PRIPTR_RANK "o"
#define PRIu8 "u"
#define PRIu16 "u"
#define PRIu32 "u"
#define PRIu64 __PRI64_RANK "u"
#define PRIu8 "u"
#define PRIu16 "u"
#define PRIu32 "u"
#define PRIu64 __PRI64_RANK "u"
#define PRIuLEAST8 "u"
#define PRIuLEAST16 "u"
#define PRIuLEAST32 "u"
#define PRIuLEAST64 __PRI64_RANK "u"
#define PRIuLEAST8 "u"
#define PRIuLEAST16 "u"
#define PRIuLEAST32 "u"
#define PRIuLEAST64 __PRI64_RANK "u"
#define PRIuFAST8 "u"
#define PRIuFAST16 __PRIFAST_RANK "u"
#define PRIuFAST32 __PRIFAST_RANK "u"
#define PRIuFAST64 __PRI64_RANK "u"
#define PRIuFAST8 "u"
#define PRIuFAST16 __PRIFAST_RANK "u"
#define PRIuFAST32 __PRIFAST_RANK "u"
#define PRIuFAST64 __PRI64_RANK "u"
#define PRIuMAX __PRI64_RANK "u"
#define PRIuPTR __PRIPTR_RANK "u"
#define PRIuMAX __PRI64_RANK "u"
#define PRIuPTR __PRIPTR_RANK "u"
#define PRIx8 "x"
#define PRIx16 "x"
#define PRIx32 "x"
#define PRIx64 __PRI64_RANK "x"
#define PRIx8 "x"
#define PRIx16 "x"
#define PRIx32 "x"
#define PRIx64 __PRI64_RANK "x"
#define PRIxLEAST8 "x"
#define PRIxLEAST16 "x"
#define PRIxLEAST32 "x"
#define PRIxLEAST64 __PRI64_RANK "x"
#define PRIxLEAST8 "x"
#define PRIxLEAST16 "x"
#define PRIxLEAST32 "x"
#define PRIxLEAST64 __PRI64_RANK "x"
#define PRIxFAST8 "x"
#define PRIxFAST16 __PRIFAST_RANK "x"
#define PRIxFAST32 __PRIFAST_RANK "x"
#define PRIxFAST64 __PRI64_RANK "x"
#define PRIxFAST8 "x"
#define PRIxFAST16 __PRIFAST_RANK "x"
#define PRIxFAST32 __PRIFAST_RANK "x"
#define PRIxFAST64 __PRI64_RANK "x"
#define PRIxMAX __PRI64_RANK "x"
#define PRIxPTR __PRIPTR_RANK "x"
#define PRIxMAX __PRI64_RANK "x"
#define PRIxPTR __PRIPTR_RANK "x"
#define PRIX8 "X"
#define PRIX16 "X"
#define PRIX32 "X"
#define PRIX64 __PRI64_RANK "X"
#define PRIX8 "X"
#define PRIX16 "X"
#define PRIX32 "X"
#define PRIX64 __PRI64_RANK "X"
#define PRIXLEAST8 "X"
#define PRIXLEAST16 "X"
#define PRIXLEAST32 "X"
#define PRIXLEAST64 __PRI64_RANK "X"
#define PRIXLEAST8 "X"
#define PRIXLEAST16 "X"
#define PRIXLEAST32 "X"
#define PRIXLEAST64 __PRI64_RANK "X"
#define PRIXFAST8 "X"
#define PRIXFAST16 __PRIFAST_RANK "X"
#define PRIXFAST32 __PRIFAST_RANK "X"
#define PRIXFAST64 __PRI64_RANK "X"
#define PRIXFAST8 "X"
#define PRIXFAST16 __PRIFAST_RANK "X"
#define PRIXFAST32 __PRIFAST_RANK "X"
#define PRIXFAST64 __PRI64_RANK "X"
#define PRIXMAX __PRI64_RANK "X"
#define PRIXPTR __PRIPTR_RANK "X"
#define PRIXMAX __PRI64_RANK "X"
#define PRIXPTR __PRIPTR_RANK "X"
#define SCNd8 "hhd"
#define SCNd16 "hd"
#define SCNd32 "d"
#define SCNd64 __PRI64_RANK "d"
#define SCNd8 "hhd"
#define SCNd16 "hd"
#define SCNd32 "d"
#define SCNd64 __PRI64_RANK "d"
#define SCNdLEAST8 "hhd"
#define SCNdLEAST16 "hd"
#define SCNdLEAST32 "d"
#define SCNdLEAST64 __PRI64_RANK "d"
#define SCNdLEAST8 "hhd"
#define SCNdLEAST16 "hd"
#define SCNdLEAST32 "d"
#define SCNdLEAST64 __PRI64_RANK "d"
#define SCNdFAST8 "hhd"
#define SCNdFAST16 __PRIFAST_RANK "d"
#define SCNdFAST32 __PRIFAST_RANK "d"
#define SCNdFAST64 __PRI64_RANK "d"
#define SCNdFAST8 "hhd"
#define SCNdFAST16 __PRIFAST_RANK "d"
#define SCNdFAST32 __PRIFAST_RANK "d"
#define SCNdFAST64 __PRI64_RANK "d"
#define SCNdMAX __PRI64_RANK "d"
#define SCNdPTR __PRIPTR_RANK "d"
#define SCNdMAX __PRI64_RANK "d"
#define SCNdPTR __PRIPTR_RANK "d"
#define SCNi8 "hhi"
#define SCNi16 "hi"
#define SCNi32 "i"
#define SCNi64 __PRI64_RANK "i"
#define SCNi8 "hhi"
#define SCNi16 "hi"
#define SCNi32 "i"
#define SCNi64 __PRI64_RANK "i"
#define SCNiLEAST8 "hhi"
#define SCNiLEAST16 "hi"
#define SCNiLEAST32 "i"
#define SCNiLEAST64 __PRI64_RANK "i"
#define SCNiLEAST8 "hhi"
#define SCNiLEAST16 "hi"
#define SCNiLEAST32 "i"
#define SCNiLEAST64 __PRI64_RANK "i"
#define SCNiFAST8 "hhi"
#define SCNiFAST16 __PRIFAST_RANK "i"
#define SCNiFAST32 __PRIFAST_RANK "i"
#define SCNiFAST64 __PRI64_RANK "i"
#define SCNiFAST8 "hhi"
#define SCNiFAST16 __PRIFAST_RANK "i"
#define SCNiFAST32 __PRIFAST_RANK "i"
#define SCNiFAST64 __PRI64_RANK "i"
#define SCNiMAX __PRI64_RANK "i"
#define SCNiPTR __PRIPTR_RANK "i"
#define SCNiMAX __PRI64_RANK "i"
#define SCNiPTR __PRIPTR_RANK "i"
#define SCNo8 "hho"
#define SCNo16 "ho"
#define SCNo32 "o"
#define SCNo64 __PRI64_RANK "o"
#define SCNo8 "hho"
#define SCNo16 "ho"
#define SCNo32 "o"
#define SCNo64 __PRI64_RANK "o"
#define SCNoLEAST8 "hho"
#define SCNoLEAST16 "ho"
#define SCNoLEAST32 "o"
#define SCNoLEAST64 __PRI64_RANK "o"
#define SCNoLEAST8 "hho"
#define SCNoLEAST16 "ho"
#define SCNoLEAST32 "o"
#define SCNoLEAST64 __PRI64_RANK "o"
#define SCNoFAST8 "hho"
#define SCNoFAST16 __PRIFAST_RANK "o"
#define SCNoFAST32 __PRIFAST_RANK "o"
#define SCNoFAST64 __PRI64_RANK "o"
#define SCNoFAST8 "hho"
#define SCNoFAST16 __PRIFAST_RANK "o"
#define SCNoFAST32 __PRIFAST_RANK "o"
#define SCNoFAST64 __PRI64_RANK "o"
#define SCNoMAX __PRI64_RANK "o"
#define SCNoPTR __PRIPTR_RANK "o"
#define SCNoMAX __PRI64_RANK "o"
#define SCNoPTR __PRIPTR_RANK "o"
#define SCNu8 "hhu"
#define SCNu16 "hu"
#define SCNu32 "u"
#define SCNu64 __PRI64_RANK "u"
#define SCNu8 "hhu"
#define SCNu16 "hu"
#define SCNu32 "u"
#define SCNu64 __PRI64_RANK "u"
#define SCNuLEAST8 "hhu"
#define SCNuLEAST16 "hu"
#define SCNuLEAST32 "u"
#define SCNuLEAST64 __PRI64_RANK "u"
#define SCNuLEAST8 "hhu"
#define SCNuLEAST16 "hu"
#define SCNuLEAST32 "u"
#define SCNuLEAST64 __PRI64_RANK "u"
#define SCNuFAST8 "hhu"
#define SCNuFAST16 __PRIFAST_RANK "u"
#define SCNuFAST32 __PRIFAST_RANK "u"
#define SCNuFAST64 __PRI64_RANK "u"
#define SCNuFAST8 "hhu"
#define SCNuFAST16 __PRIFAST_RANK "u"
#define SCNuFAST32 __PRIFAST_RANK "u"
#define SCNuFAST64 __PRI64_RANK "u"
#define SCNuMAX __PRI64_RANK "u"
#define SCNuPTR __PRIPTR_RANK "u"
#define SCNuMAX __PRI64_RANK "u"
#define SCNuPTR __PRIPTR_RANK "u"
#define SCNx8 "hhx"
#define SCNx16 "hx"
#define SCNx32 "x"
#define SCNx64 __PRI64_RANK "x"
#define SCNx8 "hhx"
#define SCNx16 "hx"
#define SCNx32 "x"
#define SCNx64 __PRI64_RANK "x"
#define SCNxLEAST8 "hhx"
#define SCNxLEAST16 "hx"
#define SCNxLEAST32 "x"
#define SCNxLEAST64 __PRI64_RANK "x"
#define SCNxLEAST8 "hhx"
#define SCNxLEAST16 "hx"
#define SCNxLEAST32 "x"
#define SCNxLEAST64 __PRI64_RANK "x"
#define SCNxFAST8 "hhx"
#define SCNxFAST16 __PRIFAST_RANK "x"
#define SCNxFAST32 __PRIFAST_RANK "x"
#define SCNxFAST64 __PRI64_RANK "x"
#define SCNxFAST8 "hhx"
#define SCNxFAST16 __PRIFAST_RANK "x"
#define SCNxFAST32 __PRIFAST_RANK "x"
#define SCNxFAST64 __PRI64_RANK "x"
#define SCNxMAX __PRI64_RANK "x"
#define SCNxPTR __PRIPTR_RANK "x"
#define SCNxMAX __PRI64_RANK "x"
#define SCNxPTR __PRIPTR_RANK "x"
#endif
#endif /* _INTTYPES_H */
#endif /* _INTTYPES_H */

64
common/libc/inc/libc_compiler.h
View file

@ -11,38 +11,38 @@
/* __cdecl is used when we want varadic and non-varadic functions to have
the same binary calling convention. */
#ifdef __i386__
# ifdef __GNUC__
# define __cdecl __attribute__((cdecl,regparm(0)))
# else
/* Most other C compilers have __cdecl as a keyword */
# endif
#ifdef __GNUC__
#define __cdecl __attribute__((cdecl, regparm(0)))
#else
# define __cdecl /* Meaningless on non-i386 */
/* Most other C compilers have __cdecl as a keyword */
#endif
#else
#define __cdecl /* Meaningless on non-i386 */
#endif
/* How to declare a function that *must* be inlined */
/* Use "extern inline" even in the gcc3+ case to avoid warnings in ctype.h */
#ifdef __GNUC__
# if __GNUC__ >= 3
# ifdef __GNUC_STDC_INLINE__
# define __must_inline extern __inline__ \
__attribute__((__gnu_inline__,__always_inline__))
# else
# define __must_inline extern __inline__ __attribute__((__always_inline__))
# endif
# else
# define __must_inline extern __inline__
# endif
#if __GNUC__ >= 3
#ifdef __GNUC_STDC_INLINE__
#define __must_inline extern __inline__ \
__attribute__((__gnu_inline__, __always_inline__))
#else
# define __must_inline __inline /* Just hope this works... */
# define __inline inline
#define __must_inline extern __inline__ __attribute__((__always_inline__))
#endif
#else
#define __must_inline extern __inline__
#endif
#else
#define __must_inline __inline /* Just hope this works... */
#define __inline inline
#endif
/* How to declare a function that does not return */
#ifdef __GNUC__
# define __noreturn void __attribute__((noreturn))
#define __noreturn void __attribute__((noreturn))
#else
# define __noreturn void
#define __noreturn void
#endif
/* "const" function:
@ -59,9 +59,9 @@
`void'.
*/
#ifdef __GNUC__
# define __constfunc __attribute__((const))
#define __constfunc __attribute__((const))
#else
# define __constfunc
#define __constfunc
#endif
#undef __attribute_const__
#define __attribute_const__ __constfunc
@ -76,34 +76,34 @@
`pure'.
*/
#ifdef __GNUC__
# define __purefunc __attribute__((pure))
#define __purefunc __attribute__((pure))
#else
# define __purefunc
#define __purefunc
#endif
#undef __attribute_pure__
#define __attribute_pure__ __purefunc
/* Format attribute */
#ifdef __GNUC__
# define __formatfunc(t,f,a) __attribute__((format(t,f,a)))
#define __formatfunc(t, f, a) __attribute__((format(t, f, a)))
#else
# define __formatfunc(t,f,a)
#define __formatfunc(t, f, a)
#endif
/* malloc() function (returns unaliased pointer) */
#if defined(__GNUC__) && (__GNUC__ >= 3)
# define __mallocfunc __attribute__((malloc))
#define __mallocfunc __attribute__((malloc))
#else
# define __mallocfunc
#define __mallocfunc
#endif
/* likely/unlikely */
#if defined(__GNUC__) && (__GNUC__ > 2 || (__GNUC__ == 2 && __GNUC_MINOR__ >= 95))
# define __likely(x) __builtin_expect(!!(x), 1)
# define __unlikely(x) __builtin_expect(!!(x), 0)
#define __likely(x) __builtin_expect(!!(x), 1)
#define __unlikely(x) __builtin_expect(!!(x), 0)
#else
# define __likely(x) (!!(x))
# define __unlikely(x) (!!(x))
#define __likely(x) (!!(x))
#define __unlikely(x) (!!(x))
#endif
#endif

60
common/libc/inc/limits.h
View file

@ -5,49 +5,47 @@
#ifndef _LIMITS_H
#define _LIMITS_H
#define CHAR_BIT 8
#define SHRT_BIT 16
#define INT_BIT 32
#define LONGLONG_BIT 64
#define CHAR_BIT 8
#define SHRT_BIT 16
#define INT_BIT 32
#define LONGLONG_BIT 64
#define SCHAR_MIN (-128)
#define SCHAR_MAX 127
#define UCHAR_MAX 255
#define SCHAR_MIN (-128)
#define SCHAR_MAX 127
#define UCHAR_MAX 255
#ifdef __CHAR_UNSIGNED__
# define CHAR_MIN 0
# define CHAR_MAX UCHAR_MAX
#define CHAR_MIN 0
#define CHAR_MAX UCHAR_MAX
#else
# define CHAR_MIN SCHAR_MIN
# define CHAR_MAX SCHAR_MAX
#define CHAR_MIN SCHAR_MIN
#define CHAR_MAX SCHAR_MAX
#endif
#define SHRT_MIN (-32768)
#define SHRT_MAX 32767
#define USHRT_MAX 65535
#define SHRT_MIN (-32768)
#define SHRT_MAX 32767
#define USHRT_MAX 65535
#define INT_MIN (-2147483647-1)
#define INT_MAX 2147483647
#define UINT_MAX 4294967295U
#define INT_MIN (-2147483647 - 1)
#define INT_MAX 2147483647
#define UINT_MAX 4294967295U
#if __riscv_xlen == 64
# define LONG_BIT 64
#define LONG_BIT 64
# define LONG_MIN (-9223372036854775807LL-1)
# define LONG_MAX 9223372036854775807LL
# define ULONG_MAX 18446744073709551615ULL
#define LONG_MIN (-9223372036854775807LL - 1)
#define LONG_MAX 9223372036854775807LL
#define ULONG_MAX 18446744073709551615ULL
#else
# define LONG_BIT 32
#define LONG_BIT 32
# define LONG_MIN (-2147483647L-1)
# define LONG_MAX 2147483647L
# define ULONG_MAX 4294967295UL
#define LONG_MIN (-2147483647L - 1)
#define LONG_MAX 2147483647L
#define ULONG_MAX 4294967295UL
#endif
#define LONGLONG_MIN (-9223372036854775807LL-1)
#define LONGLONG_MAX 9223372036854775807LL
#define ULONGLONG_MAX 18446744073709551615ULL
#define LONGLONG_MIN (-9223372036854775807LL - 1)
#define LONGLONG_MAX 9223372036854775807LL
#define ULONGLONG_MAX 18446744073709551615ULL
#endif /* _LIMITS_H */
#endif /* _LIMITS_H */

2
common/libc/inc/stdarg.h
View file

@ -10,5 +10,5 @@
/* Older gcc considers this an extension, so it's double underbar only */
#ifndef va_copy
#define va_copy(d,s) __va_copy(d,s)
#define va_copy(d, s) __va_copy(d, s)
#endif

8
common/libc/inc/stdbool.h
View file

@ -6,9 +6,9 @@
#define _STDBOOL_H
#ifndef __cplusplus
#define bool _Bool
#define true 1
#define false 0
#define bool _Bool
#define true 1
#define false 0
#endif
#endif /* _STDBOOL_H */
#endif /* _STDBOOL_H */

8
common/libc/inc/stddef.h
View file

@ -18,12 +18,12 @@ typedef signed int wint_t;
#undef NULL
#ifdef __cplusplus
# define NULL 0
#define NULL 0
#else
# define NULL ((void *)0)
#define NULL ((void *)0)
#endif
#undef offsetof
#define offsetof(t,m) ((size_t)&((t *)0)->m)
#define offsetof(t, m) ((size_t) & ((t *)0)->m)
#endif /* _STDDEF_H */
#endif /* _STDDEF_H */

180
common/libc/inc/stdint.h
View file

@ -5,131 +5,133 @@
#ifndef _STDINT_H
#define _STDINT_H
typedef signed char int8_t;
typedef short int int16_t;
typedef int int32_t;
typedef long long int int64_t;
typedef signed char int8_t;
typedef short int int16_t;
typedef int int32_t;
typedef long long int int64_t;
typedef unsigned char uint8_t;
typedef unsigned short int uint16_t;
typedef unsigned int uint32_t;
typedef unsigned long long int uint64_t;
typedef unsigned char uint8_t;
typedef unsigned short int uint16_t;
typedef unsigned int uint32_t;
typedef unsigned long long int uint64_t;
typedef int int_fast16_t;
typedef int int_fast32_t;
typedef int int_fast16_t;
typedef int int_fast32_t;
typedef unsigned int uint_fast16_t;
typedef unsigned int uint_fast32_t;
typedef unsigned int uint_fast16_t;
typedef unsigned int uint_fast32_t;
#if __riscv_xlen == 32
typedef int intptr_t;
typedef unsigned int uintptr_t;
typedef int intptr_t;
typedef unsigned int uintptr_t;
#define __INT64_C(c) c ## LL
#define __UINT64_C(c) c ## ULL
#undef __INT64_C
#define __INT64_C(c) c##LL
#undef __UINT64_C
#define __UINT64_C(c) c##ULL
#elif __riscv_xlen == 64
typedef long long intptr_t;
typedef unsigned long long uintptr_t;
typedef long long intptr_t;
typedef unsigned long long uintptr_t;
#else
# error "unsupported __riscv_xlen"
#error "unsupported __riscv_xlen"
#endif
#define __PRI64_RANK "ll"
#define __PRIFAST_RANK ""
#define __PRIPTR_RANK ""
typedef int8_t int_least8_t;
typedef int16_t int_least16_t;
typedef int32_t int_least32_t;
typedef int64_t int_least64_t;
typedef int8_t int_least8_t;
typedef int16_t int_least16_t;
typedef int32_t int_least32_t;
typedef int64_t int_least64_t;
typedef uint8_t uint_least8_t;
typedef uint16_t uint_least16_t;
typedef uint32_t uint_least32_t;
typedef uint64_t uint_least64_t;
typedef uint8_t uint_least8_t;
typedef uint16_t uint_least16_t;
typedef uint32_t uint_least32_t;
typedef uint64_t uint_least64_t;
typedef int8_t int_fast8_t;
typedef int64_t int_fast64_t;
typedef int8_t int_fast8_t;
typedef int64_t int_fast64_t;
typedef uint8_t uint_fast8_t;
typedef uint64_t uint_fast64_t;
typedef uint8_t uint_fast8_t;
typedef uint64_t uint_fast64_t;
typedef int64_t intmax_t;
typedef uint64_t uintmax_t;
typedef int64_t intmax_t;
typedef uint64_t uintmax_t;
#if !defined(__cplusplus) || defined(__STDC_LIMIT_MACROS)
#define INT8_MIN (-128)
#define INT16_MIN (-32768)
#define INT32_MIN (-2147483647-1)
#define INT64_MIN (__INT64_C(-9223372036854775807)-1)
#define INT8_MIN (-128)
#define INT16_MIN (-32768)
#define INT32_MIN (-2147483647 - 1)
#define INT64_MIN (__INT64_C(-9223372036854775807) - 1)
#define INT8_MAX (127)
#define INT16_MAX (32767)
#define INT32_MAX (2147483647)
#define INT64_MAX (__INT64_C(9223372036854775807))
#define INT8_MAX (127)
#define INT16_MAX (32767)
#define INT32_MAX (2147483647)
#define INT64_MAX (__INT64_C(9223372036854775807))
#define UINT8_MAX (255U)
#define UINT16_MAX (65535U)
#define UINT32_MAX (4294967295U)
#define UINT64_MAX (__UINT64_C(18446744073709551615))
#define UINT8_MAX (255U)
#define UINT16_MAX (65535U)
#define UINT32_MAX (4294967295U)
#define UINT64_MAX (__UINT64_C(18446744073709551615))
#define INT_LEAST8_MIN INT8_MIN
#define INT_LEAST16_MIN INT16_MIN
#define INT_LEAST32_MIN INT32_MIN
#define INT_LEAST64_MIN INT64_MIN
#define INT_LEAST8_MIN INT8_MIN
#define INT_LEAST16_MIN INT16_MIN
#define INT_LEAST32_MIN INT32_MIN
#define INT_LEAST64_MIN INT64_MIN
#define INT_LEAST8_MAX INT8_MAX
#define INT_LEAST16_MAX INT16_MAX
#define INT_LEAST32_MAX INT32_MAX
#define INT_LEAST64_MAX INT64_MAX
#define INT_LEAST8_MAX INT8_MAX
#define INT_LEAST16_MAX INT16_MAX
#define INT_LEAST32_MAX INT32_MAX
#define INT_LEAST64_MAX INT64_MAX
#define UINT_LEAST8_MAX UINT8_MAX
#define UINT_LEAST8_MAX UINT8_MAX
#define UINT_LEAST16_MAX UINT16_MAX
#define UINT_LEAST32_MAX UINT32_MAX
#define UINT_LEAST64_MAX UINT64_MAX
#define INT_FAST8_MIN INT8_MIN
#define INT_FAST64_MIN INT64_MIN
#define INT_FAST8_MIN INT8_MIN
#define INT_FAST64_MIN INT64_MIN
#define INT_FAST8_MAX INT8_MAX
#define INT_FAST64_MAX INT64_MAX
#define INT_FAST8_MAX INT8_MAX
#define INT_FAST64_MAX INT64_MAX
#define UINT_FAST8_MAX UINT8_MAX
#define UINT_FAST8_MAX UINT8_MAX
#define UINT_FAST64_MAX UINT64_MAX
#define INTMAX_MIN INT64_MIN
#define INTMAX_MAX INT64_MAX
#define UINTMAX_MAX UINT64_MAX
#define INTMAX_MIN INT64_MIN
#define INTMAX_MAX INT64_MAX
#define UINTMAX_MAX UINT64_MAX
#define INT_FAST16_MIN INT32_MIN
#define INT_FAST32_MIN INT32_MIN
#define INT_FAST16_MAX INT32_MAX
#define INT_FAST32_MAX INT32_MAX
#define INT_FAST16_MIN INT32_MIN
#define INT_FAST32_MIN INT32_MIN
#define INT_FAST16_MAX INT32_MAX
#define INT_FAST32_MAX INT32_MAX
#define UINT_FAST16_MAX UINT32_MAX
#define UINT_FAST32_MAX UINT32_MAX
#define INTPTR_MIN INT32_MIN
#define INTPTR_MAX INT32_MAX
#define UINTPTR_MAX UINT32_MAX
#define INTPTR_MIN INT32_MIN
#define INTPTR_MAX INT32_MAX
#define UINTPTR_MAX UINT32_MAX
#define PTRDIFF_MIN INT32_MIN
#define PTRDIFF_MAX INT32_MAX
#define PTRDIFF_MIN INT32_MIN
#define PTRDIFF_MAX INT32_MAX
#endif
#if !defined(__cplusplus) || defined(__STDC_CONSTANT_MACROS)
#define INT8_C(c) c
#define INT16_C(c) c
#define INT32_C(c) c
#define INT64_C(c) __INT64_C(c)
#define INT8_C(c) c
#define INT16_C(c) c
#define INT32_C(c) c
#define INT64_C(c) __INT64_C(c)
#define UINT8_C(c) c ## U
#define UINT16_C(c) c ## U
#define UINT32_C(c) c ## U
#define UINT64_C(c) __UINT64_C(c)
#define UINT8_C(c) c##U
#define UINT16_C(c) c##U
#define UINT32_C(c) c##U
#define UINT64_C(c) __UINT64_C(c)
#define INT_LEAST8_C(c) INT8_C(c)
#define INT_LEAST8_C(c) INT8_C(c)
#define INT_LEAST16_C(c) INT16_C(c)
#define INT_LEAST32_C(c) INT32_C(c)
#define INT_LEAST64_C(c) INT64_C(c)
@ -139,25 +141,25 @@ typedef uint64_t uintmax_t;
#define UINT_LEAST32_C(c) UINT32_C(c)
#define UINT_LEAST64_C(c) UINT64_C(c)
#define INT_FAST8_C(c) INT8_C(c)
#define INT_FAST8_C(c) INT8_C(c)
#define INT_FAST64_C(c) INT64_C(c)
#define UINT_FAST8_C(c) UINT8_C(c)
#define UINT_FAST64_C(c) UINT64_C(c)
#define INTMAX_C(c) INT64_C(c)
#define UINTMAX_C(c) UINT64_C(c)
#define INTMAX_C(c) INT64_C(c)
#define UINTMAX_C(c) UINT64_C(c)
#define INT_FAST16_C(c) INT32_C(c)
#define INT_FAST32_C(c) INT32_C(c)
#define INT_FAST16_C(c) INT32_C(c)
#define INT_FAST32_C(c) INT32_C(c)
#define UINT_FAST16_C(c) UINT32_C(c)
#define UINT_FAST32_C(c) UINT32_C(c)
#define INTPTR_C(c) INT32_C(c)
#define UINTPTR_C(c) UINT32_C(c)
#define PTRDIFF_C(c) INT32_C(c)
#define INTPTR_C(c) INT32_C(c)
#define UINTPTR_C(c) UINT32_C(c)
#define PTRDIFF_C(c) INT32_C(c)
#endif
#endif /* _STDINT_H */
#endif /* _STDINT_H */

4
common/libc/inc/stdio.h
View file

@ -11,7 +11,7 @@
/* The actual IO functions are not included. */
#if __riscv_xlen == 64
# include_next <stdio.h>
#include_next <stdio.h>
#else
__extern int sprintf(char *, const char *, ...);
__extern int vsprintf(char *, const char *, va_list);
@ -21,4 +21,4 @@ __extern int sscanf(const char *, const char *, ...);
__extern int vsscanf(const char *, const char *, va_list);
#endif /* __riscv_xlen == 64 */
#endif /* _STDIO_H */
#endif /* _STDIO_H */

14
common/libc/inc/stdlib.h
View file

@ -14,11 +14,11 @@
static __inline int abs(int __n)
{
return (__n < 0) ? -__n : __n;
return (__n < 0) ? -__n : __n;
}
#if __riscv_xlen == 64
# include_next <stdio.h>
#include_next <stdio.h>
__extern long jrand48(unsigned short *);
#else
__extern int atoi(const char *);
@ -27,12 +27,12 @@ __extern long atol(const char *);
__extern long long atoll(const char *);
static __inline long labs(long __n)
{
return (__n < 0L) ? -__n : __n;
return (__n < 0L) ? -__n : __n;
}
static __inline long long llabs(long long __n)
{
return (__n < 0LL) ? -__n : __n;
return (__n < 0LL) ? -__n : __n;
}
__extern long strtol(const char *, char **, int);
@ -40,9 +40,9 @@ __extern long long strtoll(const char *, char **, int);
__extern unsigned long strtoul(const char *, char **, int);
__extern unsigned long long strtoull(const char *, char **, int);
typedef int (*__comparefunc_t) (const void *, const void *);
typedef int (*__comparefunc_t)(const void *, const void *);
__extern void *bsearch(const void *, const void *, size_t, size_t,
__comparefunc_t);
__comparefunc_t);
__extern void qsort(void *, size_t, size_t, __comparefunc_t);
__extern long jrand48(unsigned short *);
@ -59,4 +59,4 @@ __extern long random(void);
__extern void srandom(unsigned int __s);
#endif /* __riscv_xlen == 64 */
#endif /* _STDLIB_H */
#endif /* _STDLIB_H */

4
common/libc/inc/string.h
View file

@ -13,7 +13,7 @@ __extern void memswap(void *m1, void *m2, size_t n);
__extern void *memmem(const void *haystack, size_t n, const void *needle, size_t m);
__extern char *strtok_r(char *, const char *, char **);
__extern char *strsep(char **, const char *);
# include_next <string.h>
#include_next <string.h>
#else
__extern void *memccpy(void *, const void *, int, size_t);
__extern void *memchr(const void *, int, size_t);
@ -49,4 +49,4 @@ __extern char *strtok_r(char *, const char *, char **);
char *index(const char *s, int c);
#endif /* __riscv_xlen == 64 */
#endif /* _STRING_H */
#endif /* _STRING_H */

16
common/libc/inc/sys/types.h
View file

@ -57,7 +57,7 @@ typedef unsigned long useconds_t;
* Some headers seem to require this...
*/
#ifndef BITS_PER_LONG
# define BITS_PER_LONG 32
#define BITS_PER_LONG 32
#endif
/*
@ -73,21 +73,21 @@ typedef unsigned long useconds_t;
*/
#ifndef FD_SET
#ifndef FD_SETSIZE
#define FD_SETSIZE 64
#define FD_SETSIZE 64
#endif
#define FD_SET(n, p) ((p)->fd_bits[(n)/8] |= (1 << ((n) & 7)))
#define FD_CLR(n, p) ((p)->fd_bits[(n)/8] &= ~(1 << ((n) & 7)))
#define FD_ISSET(n, p) ((p)->fd_bits[(n)/8] & (1 << ((n) & 7)))
#define FD_ZERO(p) memset((void *)(p), 0, sizeof(*(p)))
#define FD_SET(n, p) ((p)->fd_bits[(n) / 8] |= (1 << ((n)&7)))
#define FD_CLR(n, p) ((p)->fd_bits[(n) / 8] &= ~(1 << ((n)&7)))
#define FD_ISSET(n, p) ((p)->fd_bits[(n) / 8] & (1 << ((n)&7)))
#define FD_ZERO(p) memset((void *)(p), 0, sizeof(*(p)))
typedef struct fd_set {
unsigned char fd_bits[(FD_SETSIZE + 7) / 8];
unsigned char fd_bits[(FD_SETSIZE + 7) / 8];
} fd_set;
#endif /* FD_SET */
#ifndef __ICCARM__
/* wmsdk: Added from sys/times.h and machine/types.h */
#define _CLOCK_T_ unsigned long /* clock() */
#define _CLOCK_T_ unsigned long /* clock() */
#ifndef __clock_t_defined
typedef _CLOCK_T_ clock_t;
#define __clock_t_defined

135
common/libc/src/atof.c
View file

@ -16,87 +16,88 @@
static inline int digitval(int ch)
{
if (ch >= '0' && ch <= '9') {
return ch - '0';
} else if (ch >= 'A' && ch <= 'Z') {
return ch - 'A' + 10;
} else if (ch >= 'a' && ch <= 'z') {
return ch - 'a' + 10;
} else {
return -1;
}
if (ch >= '0' && ch <= '9') {
return ch - '0';
} else if (ch >= 'A' && ch <= 'Z') {
return ch - 'A' + 10;
} else if (ch >= 'a' && ch <= 'z') {
return ch - 'a' + 10;
} else {
return -1;
}
}
double strntof(const char *nptr, char **endptr, int base, size_t n)
{
int minus = 0;
double v = 0.0, m = 0.0, divisor = 1.0;
int d;
int minus = 0;
double v = 0.0, m = 0.0, divisor = 1.0;
int d;
while (n && isspace((unsigned char)*nptr)) {
nptr++;
n--;
}
while (n && isspace((unsigned char)*nptr)) {
nptr++;
n--;
}
/* Single optional + or - */
if (n) {
char c = *nptr;
if (c == '-' || c == '+') {
minus = (c == '-');
nptr++;
n--;
}
}
/* Single optional + or - */
if (n) {
char c = *nptr;
if (base == 0) {
if (n >= 2 && nptr[0] == '0' &&
(nptr[1] == 'x' || nptr[1] == 'X')) {
n -= 2;
nptr += 2;
base = 16;
} else if (n >= 1 && nptr[0] == '0') {
n--;
nptr++;
base = 8;
} else {
base = 10;
}
} else if (base == 16) {
if (n >= 2 && nptr[0] == '0' &&
(nptr[1] == 'x' || nptr[1] == 'X')) {
n -= 2;
nptr += 2;
}
}
if (c == '-' || c == '+') {
minus = (c == '-');
nptr++;
n--;
}
}
while (n && (d = digitval(*nptr)) >= 0 && d < base) {
v = v * base + d;
n--;
nptr++;
}
if (base == 0) {
if (n >= 2 && nptr[0] == '0' &&
(nptr[1] == 'x' || nptr[1] == 'X')) {
n -= 2;
nptr += 2;
base = 16;
} else if (n >= 1 && nptr[0] == '0') {
n--;
nptr++;
base = 8;
} else {
base = 10;
}
} else if (base == 16) {
if (n >= 2 && nptr[0] == '0' &&
(nptr[1] == 'x' || nptr[1] == 'X')) {
n -= 2;
nptr += 2;
}
}
if (*nptr == '.') {
n--;
nptr++;
while (n && (d = digitval(*nptr)) >= 0 && d < base) {
m = m * base + d;
n--;
nptr++;
divisor *= 10.0;
}
}
while (n && (d = digitval(*nptr)) >= 0 && d < base) {
v = v * base + d;
n--;
nptr++;
}
if (endptr)
*endptr = (char *)nptr;
if (*nptr == '.') {
n--;
nptr++;
v = v + (m / divisor);
while (n && (d = digitval(*nptr)) >= 0 && d < base) {
m = m * base + d;
n--;
nptr++;
divisor *= 10.0;
}
}
return minus ? -v : v;
if (endptr) {
*endptr = (char *)nptr;
}
v = v + (m / divisor);
return minus ? -v : v;
}
double atof(const char *nptr)
{
return strntof(nptr, NULL, 0, strlen(nptr));
return strntof(nptr, NULL, 0, strlen(nptr));
}

2
common/libc/src/atox.c
View file

@ -15,5 +15,5 @@
TYPE NAME(const char *nptr)
{
return (TYPE) strntoumax(nptr, (char **)NULL, 10, ~(size_t) 0);
return (TYPE)strntoumax(nptr, (char **)NULL, 10, ~(size_t)0);
}

32
common/libc/src/bsearch.c
View file

@ -9,23 +9,25 @@
#include <stdlib.h>
void *bsearch(const void *key, const void *base, size_t nmemb,
size_t size, int (*cmp) (const void *, const void *))
size_t size, int (*cmp)(const void *, const void *))
{
while (nmemb) {
size_t mididx = nmemb / 2;
const void *midobj = (const unsigned char *) base +
mididx * size;
int diff = cmp(key, midobj);
while (nmemb) {
size_t mididx = nmemb / 2;
const void *midobj = (const unsigned char *)base +
mididx * size;
int diff = cmp(key, midobj);
if (diff == 0)
return (void *)midobj;
if (diff == 0) {
return (void *)midobj;
}
if (diff > 0) {
base = (const unsigned char *) midobj + size;
nmemb -= mididx + 1;
} else
nmemb = mididx;
}
if (diff > 0) {
base = (const unsigned char *)midobj + size;
nmemb -= mididx + 1;
} else {
nmemb = mididx;
}
}
return NULL;
return NULL;
}

19
common/libc/src/common.c
View file

@ -5,21 +5,22 @@
//#include <stdio.h>
void __assert_func(const char *file, int line,
const char *func, const char *failedexpr)
const char *func, const char *failedexpr)
{
#if 0
printf("assertion \"%s\" failed: file \"%s\", line %d%s%s\n",
failedexpr, file, line, func ? ", function: " : "",
func ? func : "");
printf("assertion \"%s\" failed: file \"%s\", line %d%s%s\n",
failedexpr, file, line, func ? ", function: " : "",
func ? func : "");
/* Ensure that nothing runs after this */
while(1)
;
/* Ensure that nothing runs after this */
while (1)
;
#endif
}
float strtof(const char *nptr, char **endptr)
{
// printf("Float print not supported yet!\r\n");
return 0;
// printf("Float print not supported yet!\r\n");
return 0;
}

9
common/libc/src/ctypefunc.h
View file

@ -7,7 +7,8 @@
#define __CTYPE_NO_INLINE
#include <ctype.h>
#define CTYPEFUNC(X) \
int X(int c) { \
return __ctype_##X(c); \
}
#define CTYPEFUNC(X) \
int X(int c) \
{ \
return __ctype_##X(c); \
}

514
common/libc/src/ctypes.c
View file

@ -12,277 +12,277 @@
#include <ctype.h>
const unsigned char __ctypes[257] = {
0, /* EOF */
0, /* EOF */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl | __ctype_space, /* BS */
__ctype_cntrl | __ctype_space, /* TAB */
__ctype_cntrl | __ctype_space, /* LF */
__ctype_cntrl | __ctype_space, /* VT */
__ctype_cntrl | __ctype_space, /* FF */
__ctype_cntrl | __ctype_space, /* CR */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl | __ctype_space, /* BS */
__ctype_cntrl | __ctype_space, /* TAB */
__ctype_cntrl | __ctype_space, /* LF */
__ctype_cntrl | __ctype_space, /* VT */
__ctype_cntrl | __ctype_space, /* FF */
__ctype_cntrl | __ctype_space, /* CR */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_print | __ctype_space, /* space */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_space, /* space */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_digit | __ctype_xdigit, /* digit */
__ctype_print | __ctype_digit | __ctype_xdigit, /* digit */
__ctype_print | __ctype_digit | __ctype_xdigit, /* digit */
__ctype_print | __ctype_digit | __ctype_xdigit, /* digit */
__ctype_print | __ctype_digit | __ctype_xdigit, /* digit */
__ctype_print | __ctype_digit | __ctype_xdigit, /* digit */
__ctype_print | __ctype_digit | __ctype_xdigit, /* digit */
__ctype_print | __ctype_digit | __ctype_xdigit, /* digit */
__ctype_print | __ctype_digit | __ctype_xdigit, /* digit */
__ctype_print | __ctype_digit | __ctype_xdigit, /* digit */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_digit | __ctype_xdigit, /* digit */
__ctype_print | __ctype_digit | __ctype_xdigit, /* digit */
__ctype_print | __ctype_digit | __ctype_xdigit, /* digit */
__ctype_print | __ctype_digit | __ctype_xdigit, /* digit */
__ctype_print | __ctype_digit | __ctype_xdigit, /* digit */
__ctype_print | __ctype_digit | __ctype_xdigit, /* digit */
__ctype_print | __ctype_digit | __ctype_xdigit, /* digit */
__ctype_print | __ctype_digit | __ctype_xdigit, /* digit */
__ctype_print | __ctype_digit | __ctype_xdigit, /* digit */
__ctype_print | __ctype_digit | __ctype_xdigit, /* digit */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_upper | __ctype_xdigit, /* A-F */
__ctype_print | __ctype_upper | __ctype_xdigit, /* A-F */
__ctype_print | __ctype_upper | __ctype_xdigit, /* A-F */
__ctype_print | __ctype_upper | __ctype_xdigit, /* A-F */
__ctype_print | __ctype_upper | __ctype_xdigit, /* A-F */
__ctype_print | __ctype_upper | __ctype_xdigit, /* A-F */
__ctype_print | __ctype_upper, /* G-Z */
__ctype_print | __ctype_upper, /* G-Z */
__ctype_print | __ctype_upper, /* G-Z */
__ctype_print | __ctype_upper, /* G-Z */
__ctype_print | __ctype_upper, /* G-Z */
__ctype_print | __ctype_upper, /* G-Z */
__ctype_print | __ctype_upper, /* G-Z */
__ctype_print | __ctype_upper, /* G-Z */
__ctype_print | __ctype_upper, /* G-Z */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_upper | __ctype_xdigit, /* A-F */
__ctype_print | __ctype_upper | __ctype_xdigit, /* A-F */
__ctype_print | __ctype_upper | __ctype_xdigit, /* A-F */
__ctype_print | __ctype_upper | __ctype_xdigit, /* A-F */
__ctype_print | __ctype_upper | __ctype_xdigit, /* A-F */
__ctype_print | __ctype_upper | __ctype_xdigit, /* A-F */
__ctype_print | __ctype_upper, /* G-Z */
__ctype_print | __ctype_upper, /* G-Z */
__ctype_print | __ctype_upper, /* G-Z */
__ctype_print | __ctype_upper, /* G-Z */
__ctype_print | __ctype_upper, /* G-Z */
__ctype_print | __ctype_upper, /* G-Z */
__ctype_print | __ctype_upper, /* G-Z */
__ctype_print | __ctype_upper, /* G-Z */
__ctype_print | __ctype_upper, /* G-Z */
__ctype_print | __ctype_upper, /* G-Z */
__ctype_print | __ctype_upper, /* G-Z */
__ctype_print | __ctype_upper, /* G-Z */
__ctype_print | __ctype_upper, /* G-Z */
__ctype_print | __ctype_upper, /* G-Z */
__ctype_print | __ctype_upper, /* G-Z */
__ctype_print | __ctype_upper, /* G-Z */
__ctype_print | __ctype_upper, /* G-Z */
__ctype_print | __ctype_upper, /* G-Z */
__ctype_print | __ctype_upper, /* G-Z */
__ctype_print | __ctype_upper, /* G-Z */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_upper, /* G-Z */
__ctype_print | __ctype_upper, /* G-Z */
__ctype_print | __ctype_upper, /* G-Z */
__ctype_print | __ctype_upper, /* G-Z */
__ctype_print | __ctype_upper, /* G-Z */
__ctype_print | __ctype_upper, /* G-Z */
__ctype_print | __ctype_upper, /* G-Z */
__ctype_print | __ctype_upper, /* G-Z */
__ctype_print | __ctype_upper, /* G-Z */
__ctype_print | __ctype_upper, /* G-Z */
__ctype_print | __ctype_upper, /* G-Z */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_lower | __ctype_xdigit, /* a-f */
__ctype_print | __ctype_lower | __ctype_xdigit, /* a-f */
__ctype_print | __ctype_lower | __ctype_xdigit, /* a-f */
__ctype_print | __ctype_lower | __ctype_xdigit, /* a-f */
__ctype_print | __ctype_lower | __ctype_xdigit, /* a-f */
__ctype_print | __ctype_lower | __ctype_xdigit, /* a-f */
__ctype_print | __ctype_lower, /* g-z */
__ctype_print | __ctype_lower, /* g-z */
__ctype_print | __ctype_lower, /* g-z */
__ctype_print | __ctype_lower, /* g-z */
__ctype_print | __ctype_lower, /* g-z */
__ctype_print | __ctype_lower, /* g-z */
__ctype_print | __ctype_lower, /* g-z */
__ctype_print | __ctype_lower, /* g-z */
__ctype_print | __ctype_lower, /* g-z */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_lower | __ctype_xdigit, /* a-f */
__ctype_print | __ctype_lower | __ctype_xdigit, /* a-f */
__ctype_print | __ctype_lower | __ctype_xdigit, /* a-f */
__ctype_print | __ctype_lower | __ctype_xdigit, /* a-f */
__ctype_print | __ctype_lower | __ctype_xdigit, /* a-f */
__ctype_print | __ctype_lower | __ctype_xdigit, /* a-f */
__ctype_print | __ctype_lower, /* g-z */
__ctype_print | __ctype_lower, /* g-z */
__ctype_print | __ctype_lower, /* g-z */
__ctype_print | __ctype_lower, /* g-z */
__ctype_print | __ctype_lower, /* g-z */
__ctype_print | __ctype_lower, /* g-z */
__ctype_print | __ctype_lower, /* g-z */
__ctype_print | __ctype_lower, /* g-z */
__ctype_print | __ctype_lower, /* g-z */
__ctype_print | __ctype_lower, /* g-z */
__ctype_print | __ctype_lower, /* g-z */
__ctype_print | __ctype_lower, /* g-z */
__ctype_print | __ctype_lower, /* g-z */
__ctype_print | __ctype_lower, /* g-z */
__ctype_print | __ctype_lower, /* g-z */
__ctype_print | __ctype_lower, /* g-z */
__ctype_print | __ctype_lower, /* g-z */
__ctype_print | __ctype_lower, /* g-z */
__ctype_print | __ctype_lower, /* g-z */
__ctype_print | __ctype_lower, /* g-z */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_cntrl, /* control character */
__ctype_print | __ctype_lower, /* g-z */
__ctype_print | __ctype_lower, /* g-z */
__ctype_print | __ctype_lower, /* g-z */
__ctype_print | __ctype_lower, /* g-z */
__ctype_print | __ctype_lower, /* g-z */
__ctype_print | __ctype_lower, /* g-z */
__ctype_print | __ctype_lower, /* g-z */
__ctype_print | __ctype_lower, /* g-z */
__ctype_print | __ctype_lower, /* g-z */
__ctype_print | __ctype_lower, /* g-z */
__ctype_print | __ctype_lower, /* g-z */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_cntrl, /* control character */
__ctype_print | __ctype_space, /* NBSP */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_space, /* NBSP */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_upper, /* upper accented */
__ctype_print | __ctype_upper, /* upper accented */
__ctype_print | __ctype_upper, /* upper accented */
__ctype_print | __ctype_upper, /* upper accented */
__ctype_print | __ctype_upper, /* upper accented */
__ctype_print | __ctype_upper, /* upper accented */
__ctype_print | __ctype_upper, /* upper accented */
__ctype_print | __ctype_upper, /* upper accented */
__ctype_print | __ctype_upper, /* upper accented */
__ctype_print | __ctype_upper, /* upper accented */
__ctype_print | __ctype_upper, /* upper accented */
__ctype_print | __ctype_upper, /* upper accented */
__ctype_print | __ctype_upper, /* upper accented */
__ctype_print | __ctype_upper, /* upper accented */
__ctype_print | __ctype_upper, /* upper accented */
__ctype_print | __ctype_upper, /* upper accented */
__ctype_print | __ctype_upper, /* upper accented */
__ctype_print | __ctype_upper, /* upper accented */
__ctype_print | __ctype_upper, /* upper accented */
__ctype_print | __ctype_upper, /* upper accented */
__ctype_print | __ctype_upper, /* upper accented */
__ctype_print | __ctype_upper, /* upper accented */
__ctype_print | __ctype_upper, /* upper accented */
__ctype_print | __ctype_upper, /* upper accented */
__ctype_print | __ctype_upper, /* upper accented */
__ctype_print | __ctype_upper, /* upper accented */
__ctype_print | __ctype_upper, /* upper accented */
__ctype_print | __ctype_upper, /* upper accented */
__ctype_print | __ctype_upper, /* upper accented */
__ctype_print | __ctype_upper, /* upper accented */
__ctype_print | __ctype_upper, /* upper accented */
__ctype_print | __ctype_upper, /* upper accented */
__ctype_print | __ctype_upper, /* upper accented */
__ctype_print | __ctype_upper, /* upper accented */
__ctype_print | __ctype_upper, /* upper accented */
__ctype_print | __ctype_upper, /* upper accented */
__ctype_print | __ctype_upper, /* upper accented */
__ctype_print | __ctype_upper, /* upper accented */
__ctype_print | __ctype_upper, /* upper accented */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_upper, /* upper accented */
__ctype_print | __ctype_upper, /* upper accented */
__ctype_print | __ctype_upper, /* upper accented */
__ctype_print | __ctype_upper, /* upper accented */
__ctype_print | __ctype_upper, /* upper accented */
__ctype_print | __ctype_upper, /* upper accented */
__ctype_print | __ctype_upper, /* upper accented */
__ctype_print | __ctype_lower, /* lower accented */
__ctype_print | __ctype_upper, /* upper accented */
__ctype_print | __ctype_upper, /* upper accented */
__ctype_print | __ctype_upper, /* upper accented */
__ctype_print | __ctype_upper, /* upper accented */
__ctype_print | __ctype_upper, /* upper accented */
__ctype_print | __ctype_upper, /* upper accented */
__ctype_print | __ctype_upper, /* upper accented */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_upper, /* upper accented */
__ctype_print | __ctype_upper, /* upper accented */
__ctype_print | __ctype_upper, /* upper accented */
__ctype_print | __ctype_upper, /* upper accented */
__ctype_print | __ctype_upper, /* upper accented */
__ctype_print | __ctype_upper, /* upper accented */
__ctype_print | __ctype_upper, /* upper accented */
__ctype_print | __ctype_lower, /* lower accented */
__ctype_print | __ctype_lower, /* lower accented */
__ctype_print | __ctype_lower, /* lower accented */
__ctype_print | __ctype_lower, /* lower accented */
__ctype_print | __ctype_lower, /* lower accented */
__ctype_print | __ctype_lower, /* lower accented */
__ctype_print | __ctype_lower, /* lower accented */
__ctype_print | __ctype_lower, /* lower accented */
__ctype_print | __ctype_lower, /* lower accented */
__ctype_print | __ctype_lower, /* lower accented */
__ctype_print | __ctype_lower, /* lower accented */
__ctype_print | __ctype_lower, /* lower accented */
__ctype_print | __ctype_lower, /* lower accented */
__ctype_print | __ctype_lower, /* lower accented */
__ctype_print | __ctype_lower, /* lower accented */
__ctype_print | __ctype_lower, /* lower accented */
__ctype_print | __ctype_lower, /* lower accented */
__ctype_print | __ctype_lower, /* lower accented */
__ctype_print | __ctype_lower, /* lower accented */
__ctype_print | __ctype_lower, /* lower accented */
__ctype_print | __ctype_lower, /* lower accented */
__ctype_print | __ctype_lower, /* lower accented */
__ctype_print | __ctype_lower, /* lower accented */
__ctype_print | __ctype_lower, /* lower accented */
__ctype_print | __ctype_lower, /* lower accented */
__ctype_print | __ctype_lower, /* lower accented */
__ctype_print | __ctype_lower, /* lower accented */
__ctype_print | __ctype_lower, /* lower accented */
__ctype_print | __ctype_lower, /* lower accented */
__ctype_print | __ctype_lower, /* lower accented */
__ctype_print | __ctype_lower, /* lower accented */
__ctype_print | __ctype_lower, /* lower accented */
__ctype_print | __ctype_lower, /* lower accented */
__ctype_print | __ctype_lower, /* lower accented */
__ctype_print | __ctype_lower, /* lower accented */
__ctype_print | __ctype_lower, /* lower accented */
__ctype_print | __ctype_lower, /* lower accented */
__ctype_print | __ctype_lower, /* lower accented */
__ctype_print | __ctype_lower, /* lower accented */
__ctype_print | __ctype_lower, /* lower accented */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_lower, /* lower accented */
__ctype_print | __ctype_lower, /* lower accented */
__ctype_print | __ctype_lower, /* lower accented */
__ctype_print | __ctype_lower, /* lower accented */
__ctype_print | __ctype_lower, /* lower accented */
__ctype_print | __ctype_lower, /* lower accented */
__ctype_print | __ctype_lower, /* lower accented */
__ctype_print | __ctype_lower, /* lower accented */
__ctype_print | __ctype_lower, /* lower accented */
__ctype_print | __ctype_lower, /* lower accented */
__ctype_print | __ctype_lower, /* lower accented */
__ctype_print | __ctype_lower, /* lower accented */
__ctype_print | __ctype_lower, /* lower accented */
__ctype_print | __ctype_lower, /* lower accented */
__ctype_print | __ctype_lower, /* lower accented */
__ctype_print | __ctype_punct, /* punctuation */
__ctype_print | __ctype_lower, /* lower accented */
__ctype_print | __ctype_lower, /* lower accented */
__ctype_print | __ctype_lower, /* lower accented */
__ctype_print | __ctype_lower, /* lower accented */
__ctype_print | __ctype_lower, /* lower accented */
__ctype_print | __ctype_lower, /* lower accented */
__ctype_print | __ctype_lower, /* lower accented */
__ctype_print | __ctype_lower, /* lower accented */
};

135
common/libc/src/fnmatch.c
View file

@ -12,65 +12,86 @@
int fnmatch(const char *p, const char *s, int flags)
{
if (flags & FNM_PATHNAME && *s == '/')
return (*p != '/') || fnmatch(p+1, s+1, flags);
if (flags & FNM_PERIOD && *s == '.')
return (*p != '.') || fnmatch(p+1, s+1, flags);
if (flags & FNM_PATHNAME && *s == '/') {
return (*p != '/') || fnmatch(p + 1, s + 1, flags);
}
flags &= ~FNM_PERIOD; /* Only applies at beginning */
if (flags & FNM_PERIOD && *s == '.') {
return (*p != '.') || fnmatch(p + 1, s + 1, flags);
}
if (!(flags & FNM_NOESCAPE) && *p == '\\') {
p++;
return (*p != *s) || fnmatch(p+1, s+1, flags);
}
flags &= ~FNM_PERIOD; /* Only applies at beginning */
if (*s == '\0') {
while (*p == '*')
p++;
return (*p != '\0');
}
if (!(flags & FNM_NOESCAPE) && *p == '\\') {
p++;
return (*p != *s) || fnmatch(p + 1, s + 1, flags);
}
switch (*p) {
case '[':
{
int not_mark = 0;
p++;
if (*p == '!') {
not_mark = 1;
p++;
}
while ((*p != '\0') && (*p != ']')) {
int match = 0;
if (p[1] == '-') {
if ((*s >= *p) && (*s <= p[2]))
match = 1;
p += 3;
} else {
match = (*p == *s);
p++;
}
if (match ^ not_mark) {
while ((*p != '\0') && (*p != ']'))
p++;
if (*p == ']')
return fnmatch(p+1, s+1, flags);
}
}
}
break;
case '*':
if (fnmatch(p, s+1, flags))
return fnmatch(p+1, s, flags);
return 0;
case '\0':
if (*s == '\0') {
return 0;
}
break;
default:
if ((*p == *s) || (*p == '?'))
return fnmatch(p+1, s+1, flags);
break;
}
return 1;
if (*s == '\0') {
while (*p == '*') {
p++;
}
return (*p != '\0');
}
switch (*p) {
case '[': {
int not_mark = 0;
p++;
if (*p == '!') {
not_mark = 1;
p++;
}
while ((*p != '\0') && (*p != ']')) {
int match = 0;
if (p[1] == '-') {
if ((*s >= *p) && (*s <= p[2])) {
match = 1;
}
p += 3;
} else {
match = (*p == *s);
p++;
}
if (match ^ not_mark) {
while ((*p != '\0') && (*p != ']')) {
p++;
}
if (*p == ']') {
return fnmatch(p + 1, s + 1, flags);
}
}
}
} break;
case '*':
if (fnmatch(p, s + 1, flags)) {
return fnmatch(p + 1, s, flags);
}
return 0;
case '\0':
if (*s == '\0') {
return 0;
}
break;
default:
if ((*p == *s) || (*p == '?')) {
return fnmatch(p + 1, s + 1, flags);
}
break;
}
return 1;
}

20
common/libc/src/jrand48.c
View file

@ -11,18 +11,18 @@
long jrand48(unsigned short xsubi[3])
{
uint64_t x;
uint64_t x;
/* The xsubi[] array is littleendian by spec */
x = (uint64_t) (uint16_t) xsubi[0] +
((uint64_t) (uint16_t) xsubi[1] << 16) +
((uint64_t) (uint16_t) xsubi[2] << 32);
/* The xsubi[] array is littleendian by spec */
x = (uint64_t)(uint16_t)xsubi[0] +
((uint64_t)(uint16_t)xsubi[1] << 16) +
((uint64_t)(uint16_t)xsubi[2] << 32);
x = (0x5deece66dULL * x) + 0xb;
x = (0x5deece66dULL * x) + 0xb;
xsubi[0] = (unsigned short)(uint16_t) x;
xsubi[1] = (unsigned short)(uint16_t) (x >> 16);
xsubi[2] = (unsigned short)(uint16_t) (x >> 32);
xsubi[0] = (unsigned short)(uint16_t)x;
xsubi[1] = (unsigned short)(uint16_t)(x >> 16);
xsubi[2] = (unsigned short)(uint16_t)(x >> 32);
return (long)(int32_t) (x >> 16);
return (long)(int32_t)(x >> 16);
}

8
common/libc/src/lrand48.c
View file

@ -9,19 +9,19 @@
#include <stdlib.h>
#include <stdint.h>
unsigned short __rand48_seed[3]; /* Common with mrand48.c, srand48.c */
unsigned short __rand48_seed[3]; /* Common with mrand48.c, srand48.c */
long lrand48(void)
{
return (uint32_t) jrand48(__rand48_seed) >> 1;
return (uint32_t)jrand48(__rand48_seed) >> 1;
}
int rand(void)
{
return (int)lrand48();
return (int)lrand48();
}
long random(void)
{
return lrand48();
return lrand48();
}

20
common/libc/src/memccpy.c
View file

@ -13,15 +13,17 @@
void *memccpy(void *dst, const void *src, int c, size_t n)
{
char *q = (char *)dst;
const char *p = (char *)src;
char ch;
char *q = (char *)dst;
const char *p = (char *)src;
char ch;
while (n--) {
*q++ = ch = *p++;
if (ch == (char)c)
return q;
}
while (n--) {
*q++ = ch = *p++;
return NULL; /* No instance of "c" found */
if (ch == (char)c) {
return q;
}
}
return NULL; /* No instance of "c" found */
}

16
common/libc/src/memchr.c
View file

@ -11,13 +11,15 @@
void *memchr(const void *s, int c, size_t n)
{
const unsigned char *sp = (unsigned char *)s;
const unsigned char *sp = (unsigned char *)s;
while (n--) {
if (*sp == (unsigned char)c)
return (void *)sp;
sp++;
}
while (n--) {
if (*sp == (unsigned char)c) {
return (void *)sp;
}
return NULL;
sp++;
}
return NULL;
}

18
common/libc/src/memcmp.c
View file

@ -10,14 +10,16 @@
int memcmp(const void *s1, const void *s2, size_t n)
{
const unsigned char *c1 = (unsigned char *)s1, *c2 = (unsigned char *)s2;
int d = 0;
const unsigned char *c1 = (unsigned char *)s1, *c2 = (unsigned char *)s2;
int d = 0;
while (n--) {
d = (int)*c1++ - (int)*c2++;
if (d)
break;
}
while (n--) {
d = (int)*c1++ - (int)*c2++;
return d;
if (d) {
break;
}
}
return d;
}

14
common/libc/src/memcpy.c
View file

@ -7,10 +7,12 @@
void *memcpy(void *dst, const void *src, size_t n)
{
const char *p = (char *)src;
char *q = (char *)dst;
while (n--) {
*q++ = *p++;
}
return dst;
const char *p = (char *)src;
char *q = (char *)dst;
while (n--) {
*q++ = *p++;
}
return dst;
}

67
common/libc/src/memmem.c
View file

@ -17,40 +17,45 @@
void *memmem(const void *haystack, size_t n, const void *needle, size_t m)
{
const unsigned char *y = (const unsigned char *)haystack;
const unsigned char *x = (const unsigned char *)needle;
const unsigned char *y = (const unsigned char *)haystack;
const unsigned char *x = (const unsigned char *)needle;
size_t j, k, l;
size_t j, k, l;
if (m > n || !m || !n)
return NULL;
if (m > n || !m || !n) {
return NULL;
}
if (1 != m) {
if (x[0] == x[1]) {
k = 2;
l = 1;
} else {
k = 1;
l = 2;
}
if (1 != m) {
if (x[0] == x[1]) {
k = 2;
l = 1;
} else {
k = 1;
l = 2;
}
j = 0;
while (j <= n - m) {
if (x[1] != y[j + 1]) {
j += k;
} else {
if (!memcmp(x + 2, y + j + 2, m - 2)
&& x[0] == y[j])
return (void *)&y[j];
j += l;
}
}
} else
do {
if (*y == *x)
return (void *)y;
y++;
} while (--n);
j = 0;
return NULL;
while (j <= n - m) {
if (x[1] != y[j + 1]) {
j += k;
} else {
if (!memcmp(x + 2, y + j + 2, m - 2) && x[0] == y[j]) {
return (void *)&y[j];
}
j += l;
}
}
} else
do {
if (*y == *x) {
return (void *)y;
}
y++;
} while (--n);
return NULL;
}

16
common/libc/src/memrchr.c
View file

@ -11,13 +11,15 @@
void *memrchr(const void *s, int c, size_t n)
{
const unsigned char *sp = (const unsigned char *)s + n - 1;
const unsigned char *sp = (const unsigned char *)s + n - 1;
while (n--) {
if (*sp == (unsigned char)c)
return (void *)sp;
sp--;
}
while (n--) {
if (*sp == (unsigned char)c) {
return (void *)sp;
}
return NULL;
sp--;
}
return NULL;
}

15
common/libc/src/memset.c
View file

@ -7,10 +7,13 @@
void *memset(void *dst, int c, size_t n)
{
char *q = (char *)dst;
while (n--) {
*q++ = c;
__asm volatile ("":::"memory");
}
return dst;
char *q = (char *)dst;
while (n--) {
*q++ = c;
__asm volatile("" ::
: "memory");
}
return dst;
}

20
common/libc/src/memswap.c
View file

@ -13,16 +13,16 @@
void memswap(void *m1, void *m2, size_t n)
{
char *p = (char *)m1;
char *q = (char *)m2;
char tmp;
char *p = (char *)m1;
char *q = (char *)m2;
char tmp;
while (n--) {
tmp = *p;
*p = *q;
*q = tmp;
while (n--) {
tmp = *p;
*p = *q;
*q = tmp;
p++;
q++;
}
p++;
q++;
}
}

2
common/libc/src/mrand48.c
View file

@ -14,5 +14,5 @@ extern unsigned short __rand48_seed[3];
long mrand48(void)
{
return jrand48(__rand48_seed);
return jrand48(__rand48_seed);
}

2
common/libc/src/nrand48.c
View file

@ -11,5 +11,5 @@
long nrand48(unsigned short xsubi[3])
{
return (long)((uint32_t) jrand48(xsubi) >> 1);
return (long)((uint32_t)jrand48(xsubi) >> 1);
}

54
common/libc/src/qsort.c
View file

@ -17,36 +17,42 @@
static __inline size_t newgap(size_t gap)
{
gap = (gap * 10) / 13;
if (gap == 9 || gap == 10)
gap = 11;
gap = (gap * 10) / 13;
if (gap < 1)
gap = 1;
return gap;
if (gap == 9 || gap == 10) {
gap = 11;
}
if (gap < 1) {
gap = 1;
}
return gap;
}
void qsort(void *base, size_t nmemb, size_t size,
int (*compar) (const void *, const void *))
int (*compar)(const void *, const void *))
{
size_t gap = nmemb;
size_t i, j;
char *p1, *p2;
int swapped;
size_t gap = nmemb;
size_t i, j;
char *p1, *p2;
int swapped;
if (!nmemb)
return;
if (!nmemb) {
return;
}
do {
gap = newgap(gap);
swapped = 0;
do {
gap = newgap(gap);
swapped = 0;
for (i = 0, p1 = (char*)base; i < nmemb - gap; i++, p1 += size) {
j = i + gap;
if (compar(p1, p2 = (char *)base + j * size) > 0) {
memswap(p1, p2, size);
swapped = 1;
}
}
} while (gap > 1 || swapped);
for (i = 0, p1 = (char *)base; i < nmemb - gap; i++, p1 += size) {
j = i + gap;
if (compar(p1, p2 = (char *)base + j * size) > 0) {
memswap(p1, p2, size);
swapped = 1;
}
}
} while (gap > 1 || swapped);
}

8
common/libc/src/seed48.c
View file

@ -14,9 +14,9 @@ extern unsigned short __rand48_seed[3];
unsigned short *seed48(unsigned short int xsubi[3])
{
static unsigned short oldseed[3];
memcpy(oldseed, __rand48_seed, sizeof __rand48_seed);
memcpy(__rand48_seed, xsubi, sizeof __rand48_seed);
static unsigned short oldseed[3];
memcpy(oldseed, __rand48_seed, sizeof __rand48_seed);
memcpy(__rand48_seed, xsubi, sizeof __rand48_seed);
return oldseed;
return oldseed;
}

12
common/libc/src/snprintf.c
View file

@ -11,11 +11,11 @@
int snprintf(char *buffer, size_t n, const char *format, ...)
{
va_list ap;
int rv;
va_list ap;
int rv;
va_start(ap, format);
rv = vsnprintf(buffer, n, format, ap);
va_end(ap);
return rv;
va_start(ap, format);
rv = vsnprintf(buffer, n, format, ap);
va_end(ap);
return rv;
}

12
common/libc/src/sprintf.c
View file

@ -11,12 +11,12 @@
int sprintf(char *buffer, const char *format, ...)
{
va_list ap;
int rv;
va_list ap;
int rv;
va_start(ap, format);
rv = vsnprintf(buffer, (~(unsigned int) 0)>>1, format, ap);
va_end(ap);
va_start(ap, format);
rv = vsnprintf(buffer, (~(unsigned int)0) >> 1, format, ap);
va_end(ap);
return rv;
return rv;
}

10
common/libc/src/srand48.c
View file

@ -14,17 +14,17 @@ extern unsigned short __rand48_seed[3];
void srand48(long seedval)
{
__rand48_seed[0] = 0x330e;
__rand48_seed[1] = (unsigned short)seedval;
__rand48_seed[2] = (unsigned short)((uint32_t) seedval >> 16);
__rand48_seed[0] = 0x330e;
__rand48_seed[1] = (unsigned short)seedval;
__rand48_seed[2] = (unsigned short)((uint32_t)seedval >> 16);
}
void srand(unsigned int __s)
{
srand48(__s);
srand48(__s);
}
void srandom(unsigned int __s)
{
srand48(__s);
srand48(__s);
}

12
common/libc/src/sscanf.c
View file

@ -11,12 +11,12 @@
int sscanf(const char *str, const char *format, ...)
{
va_list ap;
int rv;
va_list ap;
int rv;
va_start(ap, format);
rv = vsscanf(str, format, ap);
va_end(ap);
va_start(ap, format);
rv = vsscanf(str, format, ap);
va_end(ap);
return rv;
return rv;
}

6
common/libc/src/stdlib.c
View file

@ -12,7 +12,7 @@
#ifndef BFLB_IN_BENCHMARK
void *malloc(size_t size)
{
return NULL;
return NULL;
}
void free(void *ptr)
@ -22,10 +22,10 @@ void free(void *ptr)
void *calloc(size_t nmemb, size_t size)
{
return NULL;
return NULL;
}
void *realloc(void *ptr, size_t size)
{
return NULL;
return NULL;
}

26
common/libc/src/strcasecmp.c
View file

@ -11,18 +11,20 @@
int strcasecmp(const char *s1, const char *s2)
{
const unsigned char *c1 = (const unsigned char *)s1;
const unsigned char *c2 = (const unsigned char *)s2;
unsigned char ch;
int d = 0;
const unsigned char *c1 = (const unsigned char *)s1;
const unsigned char *c2 = (const unsigned char *)s2;
unsigned char ch;
int d = 0;
while (1) {
/* toupper() expects an unsigned char (implicitly cast to int)
as input, and returns an int, which is exactly what we want. */
d = toupper(ch = *c1++) - toupper(*c2++);
if (d || !ch)
break;
}
while (1) {
/* toupper() expects an unsigned char (implicitly cast to int)
as input, and returns an int, which is exactly what we want. */
d = toupper(ch = *c1++) - toupper(*c2++);
return d;
if (d || !ch) {
break;
}
}
return d;
}

4
common/libc/src/strcat.c
View file

@ -10,6 +10,6 @@
char *strcat(char *dst, const char *src)
{
strcpy(strchr(dst, '\0'), src);
return dst;
strcpy(strchr(dst, '\0'), src);
return dst;
}

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