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[update] update lhal, soc and demos

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* Add flash driver and init in boards.
* Add timeout for all poll wait apis
* Add 808 d0 startup to bringup
* Update lhal device tables
* Update demos
This commit is contained in:
jzlv 2022-11-18 16:26:34 +08:00
parent 9f241971e3
commit d6fab307bf
232 changed files with 26802 additions and 1471 deletions
Download patch file Download diff file Expand all files Collapse all files

2
examples/peripherals/gpio/gpio_output/CMakeLists.txt → examples/peripherals/adc/adc_dma/CMakeLists.txt
View file

@ -6,4 +6,4 @@ find_package(bouffalo_sdk REQUIRED HINTS $ENV{BL_SDK_BASE})
sdk_set_main_file(main.c)
project(gpio_output)
project(adc_dma)

0
examples/peripherals/adc/adc_oneshot_1ch/Makefile → examples/peripherals/adc/adc_dma/Makefile
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158
examples/peripherals/adc/adc_dma/main.c Normal file
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@ -0,0 +1,158 @@
#include "bflb_adc.h"
#include "bflb_mtimer.h"
#include "bflb_dma.h"
#include "board.h"
struct bflb_device_s *adc;
struct bflb_device_s *dma0_ch0;
#define TEST_ADC_CHANNEL_0 1
#define TEST_ADC_CHANNEL_1 1
#define TEST_ADC_CHANNEL_2 1
#define TEST_ADC_CHANNEL_3 1
#define TEST_ADC_CHANNEL_4 1
#define TEST_ADC_CHANNEL_5 1
#define TEST_ADC_CHANNEL_6 1
#define TEST_ADC_CHANNEL_7 1
#define TEST_ADC_CHANNEL_8 1
#define TEST_ADC_CHANNEL_9 1
#define TEST_ADC_CHANNEL_10 1
#define TEST_ADC_CHANNELS (TEST_ADC_CHANNEL_0 + \
TEST_ADC_CHANNEL_1 + \
TEST_ADC_CHANNEL_2 + \
TEST_ADC_CHANNEL_3 + \
TEST_ADC_CHANNEL_4 + \
TEST_ADC_CHANNEL_5 + \
TEST_ADC_CHANNEL_6 + \
TEST_ADC_CHANNEL_7 + \
TEST_ADC_CHANNEL_8 + \
TEST_ADC_CHANNEL_9 + \
TEST_ADC_CHANNEL_10)
struct bflb_adc_channel_s chan[] = {
#if TEST_ADC_CHANNEL_0
{ .pos_chan = ADC_CHANNEL_0,
.neg_chan = ADC_CHANNEL_GND },
#endif
#if TEST_ADC_CHANNEL_1
{ .pos_chan = ADC_CHANNEL_1,
.neg_chan = ADC_CHANNEL_GND },
#endif
#if TEST_ADC_CHANNEL_2
{ .pos_chan = ADC_CHANNEL_2,
.neg_chan = ADC_CHANNEL_GND },
#endif
#if TEST_ADC_CHANNEL_3
{ .pos_chan = ADC_CHANNEL_3,
.neg_chan = ADC_CHANNEL_GND },
#endif
#if TEST_ADC_CHANNEL_4
{ .pos_chan = ADC_CHANNEL_4,
.neg_chan = ADC_CHANNEL_GND },
#endif
#if TEST_ADC_CHANNEL_5
{ .pos_chan = ADC_CHANNEL_5,
.neg_chan = ADC_CHANNEL_GND },
#endif
#if TEST_ADC_CHANNEL_6
{ .pos_chan = ADC_CHANNEL_6,
.neg_chan = ADC_CHANNEL_GND },
#endif
#if TEST_ADC_CHANNEL_7
{ .pos_chan = ADC_CHANNEL_7,
.neg_chan = ADC_CHANNEL_GND },
#endif
#if TEST_ADC_CHANNEL_8
{ .pos_chan = ADC_CHANNEL_8,
.neg_chan = ADC_CHANNEL_GND },
#endif
#if TEST_ADC_CHANNEL_9
{ .pos_chan = ADC_CHANNEL_9,
.neg_chan = ADC_CHANNEL_GND },
#endif
#if TEST_ADC_CHANNEL_10
{ .pos_chan = ADC_CHANNEL_10,
.neg_chan = ADC_CHANNEL_GND },
#endif
};
static uint8_t dma_tc_flag0 = 0;
#define TEST_COUNT 16
ATTR_NOCACHE_NOINIT_RAM_SECTION uint32_t raw_data[TEST_ADC_CHANNELS * TEST_COUNT];
void dma0_ch0_isr(void *arg)
{
dma_tc_flag0++;
printf("tc done\r\n");
}
int main(void)
{
board_init();
board_adc_gpio_init();
adc = bflb_device_get_by_name("adc");
/* adc clock = XCLK / 2 / 32 */
struct bflb_adc_config_s cfg;
cfg.clk_div = ADC_CLK_DIV_32;
cfg.scan_conv_mode = true;
cfg.continuous_conv_mode = true;
cfg.differential_mode = false;
cfg.resolution = ADC_RESOLUTION_16B;
cfg.vref = ADC_VREF_3P2V;
bflb_adc_init(adc, &cfg);
bflb_adc_channel_config(adc, chan, TEST_ADC_CHANNELS);
bflb_adc_link_rxdma(adc, true);
dma0_ch0 = bflb_device_get_by_name("dma0_ch0");
struct bflb_dma_channel_config_s config;
config.direction = DMA_PERIPH_TO_MEMORY;
config.src_req = DMA_REQUEST_ADC;
config.dst_req = DMA_REQUEST_NONE;
config.src_addr_inc = DMA_ADDR_INCREMENT_DISABLE;
config.dst_addr_inc = DMA_ADDR_INCREMENT_ENABLE;
config.src_burst_count = DMA_BURST_INCR1;
config.dst_burst_count = DMA_BURST_INCR1;
config.src_width = DMA_DATA_WIDTH_32BIT;
config.dst_width = DMA_DATA_WIDTH_32BIT;
bflb_dma_channel_init(dma0_ch0, &config);
bflb_dma_channel_irq_attach(dma0_ch0, dma0_ch0_isr, NULL);
struct bflb_dma_channel_lli_pool_s lli[1]; /* max trasnfer size 4064 * 1 */
struct bflb_dma_channel_lli_transfer_s transfers[1];
memset(raw_data, 0, sizeof(raw_data));
transfers[0].src_addr = (uint32_t)DMA_ADDR_ADC_RDR;
transfers[0].dst_addr = (uint32_t)raw_data;
transfers[0].nbytes = sizeof(raw_data);
bflb_dma_channel_lli_reload(dma0_ch0, lli, 1, transfers, 1);
bflb_dma_channel_start(dma0_ch0);
bflb_adc_start_conversion(adc);
while (dma_tc_flag0 != 1) {
bflb_mtimer_delay_ms(1);
}
bflb_adc_stop_conversion(adc);
for (size_t j = 0; j < TEST_ADC_CHANNELS * TEST_COUNT; j++) {
struct bflb_adc_result_s result;
printf("raw data:%08x\r\n", raw_data[j]);
bflb_adc_parse_result(adc, &raw_data[j], &result, 1);
printf("pos chan %d,%d mv \r\n", result.pos_chan, result.millivolt);
}
while (1) {
}
}

0
examples/peripherals/adc/adc_oneshot_1ch/proj.conf → examples/peripherals/adc/adc_dma/proj.conf
View file

2
examples/peripherals/adc/adc_oneshot_1ch/CMakeLists.txt → examples/peripherals/adc/adc_int/CMakeLists.txt
View file

@ -6,4 +6,4 @@ find_package(bouffalo_sdk REQUIRED HINTS $ENV{BL_SDK_BASE})
sdk_set_main_file(main.c)
project(adc_oneshot_1ch)
project(adc_int)

0
examples/peripherals/adc/adc_oneshot_1ch_dma/Makefile → examples/peripherals/adc/adc_int/Makefile
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137
examples/peripherals/adc/adc_int/main.c Normal file
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@ -0,0 +1,137 @@
#include "bflb_adc.h"
#include "bflb_mtimer.h"
#include "board.h"
struct bflb_device_s *adc;
#define TEST_ADC_CHANNEL_0 1
#define TEST_ADC_CHANNEL_1 1
#define TEST_ADC_CHANNEL_2 1
#define TEST_ADC_CHANNEL_3 1
#define TEST_ADC_CHANNEL_4 1
#define TEST_ADC_CHANNEL_5 1
#define TEST_ADC_CHANNEL_6 1
#define TEST_ADC_CHANNEL_7 1
#define TEST_ADC_CHANNEL_8 1
#define TEST_ADC_CHANNEL_9 1
#define TEST_ADC_CHANNEL_10 1
#define TEST_ADC_CHANNELS (TEST_ADC_CHANNEL_0 + \
TEST_ADC_CHANNEL_1 + \
TEST_ADC_CHANNEL_2 + \
TEST_ADC_CHANNEL_3 + \
TEST_ADC_CHANNEL_4 + \
TEST_ADC_CHANNEL_5 + \
TEST_ADC_CHANNEL_6 + \
TEST_ADC_CHANNEL_7 + \
TEST_ADC_CHANNEL_8 + \
TEST_ADC_CHANNEL_9 + \
TEST_ADC_CHANNEL_10)
#define TEST_COUNT 10
struct bflb_adc_channel_s chan[] = {
#if TEST_ADC_CHANNEL_0
{ .pos_chan = ADC_CHANNEL_0,
.neg_chan = ADC_CHANNEL_GND },
#endif
#if TEST_ADC_CHANNEL_1
{ .pos_chan = ADC_CHANNEL_1,
.neg_chan = ADC_CHANNEL_GND },
#endif
#if TEST_ADC_CHANNEL_2
{ .pos_chan = ADC_CHANNEL_2,
.neg_chan = ADC_CHANNEL_GND },
#endif
#if TEST_ADC_CHANNEL_3
{ .pos_chan = ADC_CHANNEL_3,
.neg_chan = ADC_CHANNEL_GND },
#endif
#if TEST_ADC_CHANNEL_4
{ .pos_chan = ADC_CHANNEL_4,
.neg_chan = ADC_CHANNEL_GND },
#endif
#if TEST_ADC_CHANNEL_5
{ .pos_chan = ADC_CHANNEL_5,
.neg_chan = ADC_CHANNEL_GND },
#endif
#if TEST_ADC_CHANNEL_6
{ .pos_chan = ADC_CHANNEL_6,
.neg_chan = ADC_CHANNEL_GND },
#endif
#if TEST_ADC_CHANNEL_7
{ .pos_chan = ADC_CHANNEL_7,
.neg_chan = ADC_CHANNEL_GND },
#endif
#if TEST_ADC_CHANNEL_8
{ .pos_chan = ADC_CHANNEL_8,
.neg_chan = ADC_CHANNEL_GND },
#endif
#if TEST_ADC_CHANNEL_9
{ .pos_chan = ADC_CHANNEL_9,
.neg_chan = ADC_CHANNEL_GND },
#endif
#if TEST_ADC_CHANNEL_10
{ .pos_chan = ADC_CHANNEL_10,
.neg_chan = ADC_CHANNEL_GND },
#endif
};
volatile uint32_t raw_data[TEST_ADC_CHANNELS];
volatile uint8_t read_count = 0;
void adc_isr(int irq, void *arg)
{
uint32_t intstatus = bflb_adc_get_intstatus(adc);
if (intstatus & ADC_INTSTS_ADC_READY) {
bflb_adc_int_clear(adc, ADC_INTCLR_ADC_READY);
uint8_t count = bflb_adc_get_count(adc);
for (size_t i = 0; i < count; i++) {
raw_data[read_count] = bflb_adc_read_raw(adc);
read_count++;
}
}
}
int main(void)
{
board_init();
board_adc_gpio_init();
adc = bflb_device_get_by_name("adc");
/* adc clock = XCLK / 2 / 32 */
struct bflb_adc_config_s cfg;
cfg.clk_div = ADC_CLK_DIV_32;
cfg.scan_conv_mode = true;
cfg.continuous_conv_mode = false;
cfg.differential_mode = false;
cfg.resolution = ADC_RESOLUTION_16B;
cfg.vref = ADC_VREF_3P2V;
bflb_adc_init(adc, &cfg);
bflb_adc_channel_config(adc, chan, TEST_ADC_CHANNELS);
bflb_adc_rxint_mask(adc, false);
bflb_irq_attach(adc->irq_num, adc_isr, NULL);
bflb_irq_enable(adc->irq_num);
for (size_t i = 0; i < TEST_COUNT; i++) {
read_count = 0;
bflb_adc_start_conversion(adc);
while (read_count < TEST_ADC_CHANNELS) {
bflb_mtimer_delay_ms(1);
}
for (size_t j = 0; j < TEST_ADC_CHANNELS; j++) {
struct bflb_adc_result_s result;
printf("raw data:%08x\r\n", raw_data[j]);
bflb_adc_parse_result(adc, (uint32_t *)&raw_data[j], &result, 1);
printf("pos chan %d,%d mv \r\n", result.pos_chan, result.millivolt);
}
bflb_adc_stop_conversion(adc);
bflb_mtimer_delay_ms(100);
}
while (1) {
}
}

0
examples/peripherals/adc/adc_oneshot_1ch_dma/proj.conf → examples/peripherals/adc/adc_int/proj.conf
View file

46
examples/peripherals/adc/adc_oneshot_1ch/main.c
View file

@ -1,46 +0,0 @@
#include "bflb_adc.h"
#include "bflb_mtimer.h"
#include "board.h"
struct bflb_device_s *adc;
int main(void)
{
board_init();
board_adc_gpio_init();
adc = bflb_device_get_by_name("adc");
struct bflb_adc_config_s cfg;
cfg.clk_div = ADC_CLK_DIV_32;
cfg.scan_conv_mode = false;
cfg.continuous_conv_mode = false;
cfg.differential_mode = false;
cfg.resolution = ADC_RESOLUTION_16B;
cfg.vref = ADC_VREF_3P2V;
struct bflb_adc_channel_s chan;
chan.pos_chan = ADC_CHANNEL_8;
chan.neg_chan = ADC_CHANNEL_GND;
bflb_adc_init(adc, &cfg);
bflb_adc_channel_config(adc, &chan, 1);
for (uint32_t i = 0; i < 10; i++) {
bflb_adc_start_conversion(adc);
while (bflb_adc_get_count(adc) == 0) {
}
struct bflb_adc_result_s result;
uint32_t raw_data = bflb_adc_read_raw(adc);
printf("raw data:%08x\r\n", raw_data);
bflb_adc_parse_result(adc, &raw_data, &result, 1);
printf("pos chan %d,%d mv \r\n", result.pos_chan, result.millivolt);
bflb_adc_stop_conversion(adc);
bflb_mtimer_delay_ms(100);
}
while (1) {
}
}

94
examples/peripherals/adc/adc_oneshot_1ch_dma/main.c
View file

@ -1,94 +0,0 @@
#include "bflb_adc.h"
#include "bflb_mtimer.h"
#include "bflb_dma.h"
#include "board.h"
struct bflb_device_s *adc;
struct bflb_device_s *dma0_ch0;
extern void board_init();
static uint8_t dma_tc_flag0 = 0;
#define ADC_CONVERT_COUNT 16
ATTR_NOCACHE_NOINIT_RAM_SECTION uint32_t raw_data[ADC_CONVERT_COUNT];
void dma0_ch0_isr(void *arg)
{
dma_tc_flag0++;
printf("tc done\r\n");
}
int main(void)
{
board_init();
board_adc_gpio_init();
adc = bflb_device_get_by_name("adc");
struct bflb_adc_config_s cfg;
cfg.clk_div = ADC_CLK_DIV_32;
cfg.scan_conv_mode = false;
cfg.continuous_conv_mode = true;
cfg.differential_mode = false;
cfg.resolution = ADC_RESOLUTION_16B;
cfg.vref = ADC_VREF_3P2V;
struct bflb_adc_channel_s chan;
chan.pos_chan = ADC_CHANNEL_0;
chan.neg_chan = ADC_CHANNEL_GND;
bflb_adc_init(adc, &cfg);
bflb_adc_channel_config(adc, &chan, 1);
bflb_adc_link_rxdma(adc, true);
struct bflb_dma_channel_config_s config;
dma0_ch0 = bflb_device_get_by_name("dma0_ch0");
config.direction = DMA_PERIPH_TO_MEMORY;
config.src_req = DMA_REQUEST_ADC;
config.dst_req = DMA_REQUEST_NONE;
config.src_addr_inc = DMA_ADDR_INCREMENT_DISABLE;
config.dst_addr_inc = DMA_ADDR_INCREMENT_ENABLE;
config.src_burst_count = DMA_BURST_INCR1;
config.dst_burst_count = DMA_BURST_INCR1;
config.src_width = DMA_DATA_WIDTH_32BIT;
config.dst_width = DMA_DATA_WIDTH_32BIT;
bflb_dma_channel_init(dma0_ch0, &config);
bflb_dma_channel_irq_attach(dma0_ch0, dma0_ch0_isr, NULL);
struct bflb_dma_channel_lli_pool_s lli[1]; /* max trasnfer size 4064 * 1 */
struct bflb_dma_channel_lli_transfer_s transfers[1];
memset(raw_data, 0, sizeof(raw_data));
transfers[0].src_addr = (uint32_t)DMA_ADDR_ADC_RDR;
transfers[0].dst_addr = (uint32_t)raw_data;
transfers[0].nbytes = 64;
bflb_dma_channel_lli_reload(dma0_ch0, lli, 1, transfers, 1);
bflb_dma_channel_start(dma0_ch0);
bflb_adc_start_conversion(adc);
while (dma_tc_flag0 != 1) {
bflb_mtimer_delay_ms(1);
}
struct bflb_adc_result_s result[ADC_CONVERT_COUNT];
bflb_adc_parse_result(adc, raw_data, result, ADC_CONVERT_COUNT);
for (uint8_t i = 0; i < ADC_CONVERT_COUNT; i++) {
printf("raw data:%08x\r\n", raw_data[i]);
printf("pos chan %d,%d mv \r\n", result[i].pos_chan, result[i].millivolt);
}
bflb_adc_stop_conversion(adc);
while (1) {
}
}

66
examples/peripherals/adc/adc_oneshot_1ch_int/main.c
View file

@ -1,66 +0,0 @@
#include "bflb_adc.h"
#include "bflb_mtimer.h"
#include "board.h"
struct bflb_device_s *adc;
static uint8_t int_flag = 0;
void adc_isr(int irq, void *arg)
{
uint32_t intstatus = bflb_adc_get_intstatus(adc);
if (intstatus&ADC_INTSTS_ADC_READY) {
struct bflb_adc_result_s result;
printf("INT fifo count = %d \n", bflb_adc_get_count(adc));
do {
uint32_t raw_data = bflb_adc_read_raw(adc);
if (raw_data) {
bflb_adc_parse_result(adc, &raw_data, &result, 1);
printf("PosId = %d NegId = %d V= %d mV \n", result.pos_chan, result.neg_chan, result.millivolt);
bflb_adc_int_clear(adc, ADC_INTCLR_ADC_READY);
int_flag++;
}
} while (bflb_adc_get_count(adc) != 0);
if (int_flag > 16) {
bflb_adc_rxint_mask(adc, true);
}
}
}
int main(void)
{
board_init();
board_adc_gpio_init();
adc = bflb_device_get_by_name("adc");
struct bflb_adc_config_s cfg;
cfg.clk_div = ADC_CLK_DIV_32;
cfg.scan_conv_mode = false;
cfg.continuous_conv_mode = false;
cfg.differential_mode = false;
cfg.resolution = ADC_RESOLUTION_16B;
cfg.vref = ADC_VREF_3P2V;
struct bflb_adc_channel_s chan;
chan.pos_chan = ADC_CHANNEL_8;
chan.neg_chan = ADC_CHANNEL_GND;
bflb_adc_init(adc, &cfg);
bflb_adc_channel_config(adc, &chan, 1);
bflb_adc_int_clear(adc, ADC_INTCLR_ADC_READY);
bflb_adc_rxint_mask(adc, false);
bflb_irq_attach(adc->irq_num, adc_isr, adc);
bflb_irq_enable(adc->irq_num);
while (int_flag < 16) {
printf("%d\r\n", int_flag);
bflb_adc_start_conversion(adc);
bflb_mtimer_delay_ms(500);
bflb_adc_stop_conversion(adc);
}
}

2
examples/peripherals/adc/adc_oneshot_1ch_dma/CMakeLists.txt → examples/peripherals/adc/adc_poll/CMakeLists.txt
View file

@ -6,4 +6,4 @@ find_package(bouffalo_sdk REQUIRED HINTS $ENV{BL_SDK_BASE})
sdk_set_main_file(main.c)
project(adc_oneshot_1ch_dma)
project(adc_poll)

0
examples/peripherals/adc/adc_oneshot_1ch_int/Makefile → examples/peripherals/adc/adc_poll/Makefile
View file

120
examples/peripherals/adc/adc_poll/main.c Normal file
View file

@ -0,0 +1,120 @@
#include "bflb_adc.h"
#include "bflb_mtimer.h"
#include "board.h"
struct bflb_device_s *adc;
#define TEST_ADC_CHANNEL_0 1
#define TEST_ADC_CHANNEL_1 1
#define TEST_ADC_CHANNEL_2 1
#define TEST_ADC_CHANNEL_3 1
#define TEST_ADC_CHANNEL_4 1
#define TEST_ADC_CHANNEL_5 1
#define TEST_ADC_CHANNEL_6 1
#define TEST_ADC_CHANNEL_7 1
#define TEST_ADC_CHANNEL_8 1
#define TEST_ADC_CHANNEL_9 1
#define TEST_ADC_CHANNEL_10 1
#define TEST_ADC_CHANNELS (TEST_ADC_CHANNEL_0 + \
TEST_ADC_CHANNEL_1 + \
TEST_ADC_CHANNEL_2 + \
TEST_ADC_CHANNEL_3 + \
TEST_ADC_CHANNEL_4 + \
TEST_ADC_CHANNEL_5 + \
TEST_ADC_CHANNEL_6 + \
TEST_ADC_CHANNEL_7 + \
TEST_ADC_CHANNEL_8 + \
TEST_ADC_CHANNEL_9 + \
TEST_ADC_CHANNEL_10)
#define TEST_COUNT 10
struct bflb_adc_channel_s chan[] = {
#if TEST_ADC_CHANNEL_0
{ .pos_chan = ADC_CHANNEL_0,
.neg_chan = ADC_CHANNEL_GND },
#endif
#if TEST_ADC_CHANNEL_1
{ .pos_chan = ADC_CHANNEL_1,
.neg_chan = ADC_CHANNEL_GND },
#endif
#if TEST_ADC_CHANNEL_2
{ .pos_chan = ADC_CHANNEL_2,
.neg_chan = ADC_CHANNEL_GND },
#endif
#if TEST_ADC_CHANNEL_3
{ .pos_chan = ADC_CHANNEL_3,
.neg_chan = ADC_CHANNEL_GND },
#endif
#if TEST_ADC_CHANNEL_4
{ .pos_chan = ADC_CHANNEL_4,
.neg_chan = ADC_CHANNEL_GND },
#endif
#if TEST_ADC_CHANNEL_5
{ .pos_chan = ADC_CHANNEL_5,
.neg_chan = ADC_CHANNEL_GND },
#endif
#if TEST_ADC_CHANNEL_6
{ .pos_chan = ADC_CHANNEL_6,
.neg_chan = ADC_CHANNEL_GND },
#endif
#if TEST_ADC_CHANNEL_7
{ .pos_chan = ADC_CHANNEL_7,
.neg_chan = ADC_CHANNEL_GND },
#endif
#if TEST_ADC_CHANNEL_8
{ .pos_chan = ADC_CHANNEL_8,
.neg_chan = ADC_CHANNEL_GND },
#endif
#if TEST_ADC_CHANNEL_9
{ .pos_chan = ADC_CHANNEL_9,
.neg_chan = ADC_CHANNEL_GND },
#endif
#if TEST_ADC_CHANNEL_10
{ .pos_chan = ADC_CHANNEL_10,
.neg_chan = ADC_CHANNEL_GND },
#endif
};
int main(void)
{
board_init();
board_adc_gpio_init();
adc = bflb_device_get_by_name("adc");
/* adc clock = XCLK / 2 / 32 */
struct bflb_adc_config_s cfg;
cfg.clk_div = ADC_CLK_DIV_32;
cfg.scan_conv_mode = true;
cfg.continuous_conv_mode = false;
cfg.differential_mode = false;
cfg.resolution = ADC_RESOLUTION_16B;
cfg.vref = ADC_VREF_3P2V;
bflb_adc_init(adc, &cfg);
bflb_adc_channel_config(adc, chan, TEST_ADC_CHANNELS);
for (uint32_t i = 0; i < TEST_COUNT; i++) {
bflb_adc_start_conversion(adc);
while (bflb_adc_get_count(adc) < TEST_ADC_CHANNELS) {
bflb_mtimer_delay_ms(1);
}
for (size_t j = 0; j < TEST_ADC_CHANNELS; j++) {
struct bflb_adc_result_s result;
uint32_t raw_data = bflb_adc_read_raw(adc);
printf("raw data:%08x\r\n", raw_data);
bflb_adc_parse_result(adc, &raw_data, &result, 1);
printf("pos chan %d,%d mv \r\n", result.pos_chan, result.millivolt);
}
bflb_adc_stop_conversion(adc);
bflb_mtimer_delay_ms(100);
}
while (1) {
}
}

0
examples/peripherals/adc/adc_oneshot_1ch_int/proj.conf → examples/peripherals/adc/adc_poll/proj.conf
View file

2
examples/peripherals/adc/adc_oneshot_multich/CMakeLists.txt → examples/peripherals/adc/adc_poll_diff_mode/CMakeLists.txt
View file

@ -6,4 +6,4 @@ find_package(bouffalo_sdk REQUIRED HINTS $ENV{BL_SDK_BASE})
sdk_set_main_file(main.c)
project(adc_oneshot_multich)
project(adc_poll_diff_mode)

0
examples/peripherals/adc/adc_oneshot_multich/Makefile → examples/peripherals/adc/adc_poll_diff_mode/Makefile
View file

39
examples/peripherals/adc/adc_oneshot_multich/main.c → examples/peripherals/adc/adc_poll_diff_mode/main.c
View file

@ -4,6 +4,17 @@
struct bflb_device_s *adc;
#define TEST_ADC_CHANNELS 2
#define TEST_COUNT 10
struct bflb_adc_channel_s chan[] = {
{ .pos_chan = ADC_CHANNEL_2,
.neg_chan = ADC_CHANNEL_GND },
{ .pos_chan = ADC_CHANNEL_GND,
.neg_chan = ADC_CHANNEL_3 },
};
int main(void)
{
board_init();
@ -11,37 +22,31 @@ int main(void)
adc = bflb_device_get_by_name("adc");
/* adc clock = XCLK / 2 / 32 */
struct bflb_adc_config_s cfg;
cfg.clk_div = ADC_CLK_DIV_32;
cfg.scan_conv_mode = true;
cfg.continuous_conv_mode = false;
cfg.differential_mode = false;
cfg.differential_mode = true;
cfg.resolution = ADC_RESOLUTION_16B;
cfg.vref = ADC_VREF_3P2V;
struct bflb_adc_channel_s chan[3];
chan[0].pos_chan = ADC_CHANNEL_8;
chan[0].neg_chan = ADC_CHANNEL_GND;
chan[1].pos_chan = ADC_CHANNEL_9;
chan[1].neg_chan = ADC_CHANNEL_GND;
chan[2].pos_chan = ADC_CHANNEL_10;
chan[2].neg_chan = ADC_CHANNEL_GND;
bflb_adc_init(adc, &cfg);
bflb_adc_channel_config(adc, chan, 3);
bflb_adc_channel_config(adc, chan, TEST_ADC_CHANNELS);
for (uint32_t i = 0; i < 10; i++) {
for (uint32_t i = 0; i < TEST_COUNT; i++) {
bflb_adc_start_conversion(adc);
while (bflb_adc_get_count(adc) < 3) {
}
struct bflb_adc_result_s result;
for (uint8_t i = 0; i < 3; i++) {
while (bflb_adc_get_count(adc) < TEST_ADC_CHANNELS) {
bflb_mtimer_delay_ms(1);
}
for (size_t j = 0; j < TEST_ADC_CHANNELS; j++) {
struct bflb_adc_result_s result;
uint32_t raw_data = bflb_adc_read_raw(adc);
printf("raw data:%08x\r\n", raw_data);
bflb_adc_parse_result(adc, &raw_data, &result, 1);
printf("pos chan %d,%d mv \r\n", result.pos_chan, result.millivolt);
printf("pos chan %d,neg chan %d,%d mv \r\n", result.pos_chan, result.neg_chan, result.millivolt);
}
bflb_adc_stop_conversion(adc);

0
examples/peripherals/adc/adc_oneshot_multich/proj.conf → examples/peripherals/adc/adc_poll_diff_mode/proj.conf
View file

7
examples/peripherals/adc/adc_tsen/main.c
View file

@ -1,4 +1,5 @@
#include "bflb_adc.h"
#include "bflb_efuse.h"
#include "bflb_mtimer.h"
#include "board.h"
@ -10,12 +11,12 @@ int main(void)
board_adc_gpio_init();
uint16_t i = 0;
float average_filter = 0.0;
uint16_t tsen_offset = 2042;
adc = bflb_device_get_by_name("adc");
/* adc clock = XCLK / 2 / 32 */
struct bflb_adc_config_s cfg;
cfg.clk_div = ADC_CLK_DIV_16;
cfg.clk_div = ADC_CLK_DIV_32;
cfg.scan_conv_mode = false;
cfg.continuous_conv_mode = false;
cfg.differential_mode = false;
@ -33,7 +34,7 @@ int main(void)
while (1) {
for (i = 0; i < 50; i++) {
average_filter += bflb_adc_tsen_get_temp(adc, tsen_offset);
average_filter += bflb_adc_tsen_get_temp(adc);
bflb_mtimer_delay_ms(10);
}

25
examples/peripherals/adc/adc_vbat/main.c
View file

@ -7,17 +7,17 @@ struct bflb_device_s *adc;
int main(void)
{
board_init();
uint16_t i = 0;
adc = bflb_device_get_by_name("adc");
/* adc clock = XCLK / 2 / 32 */
struct bflb_adc_config_s cfg;
cfg.clk_div = ADC_CLK_DIV_4;
cfg.clk_div = ADC_CLK_DIV_32;
cfg.scan_conv_mode = false;
cfg.continuous_conv_mode = false;
cfg.differential_mode = false;
cfg.resolution = ADC_RESOLUTION_16B;
cfg.vref = ADC_VREF_2P0V;
cfg.vref = ADC_VREF_3P2V;
struct bflb_adc_channel_s chan;
@ -29,19 +29,16 @@ int main(void)
bflb_adc_vbat_enable(adc);
struct bflb_adc_result_s result;
for (i = 0; i < 10; i++) {
for (uint16_t i = 0; i < 10; i++) {
bflb_adc_start_conversion(adc);
while (bflb_adc_get_count(adc) == 0) {
bflb_mtimer_delay_ms(1);
}
uint32_t raw_data = bflb_adc_read_raw(adc);
while (bflb_adc_get_count(adc) == 0)
;
do {
uint32_t raw_data = bflb_adc_read_raw(adc);
if (raw_data) {
bflb_adc_parse_result(adc, &raw_data, &result, 1);
printf("vBat = %d mV\n", (uint32_t)(result.millivolt * 2));
bflb_adc_stop_conversion(adc);
}
} while (bflb_adc_get_count(adc) != 0);
bflb_adc_parse_result(adc, &raw_data, &result, 1);
printf("vBat = %d mV\r\n", (uint32_t)(result.millivolt * 2));
bflb_adc_stop_conversion(adc);
bflb_mtimer_delay_ms(500);
}

11
examples/peripherals/cks/cks_dma/main.c
View file

@ -2,10 +2,9 @@
#include "bflb_cks.h"
#include "bflb_dma.h"
#include "bflb_mtimer.h"
#include "bl628_memorymap.h"
#include "bflb_core.h"
#define DATA_LEN 1024
#define DATA_LEN 512
static volatile uint8_t dma_tc_flag0 = 0;
struct bflb_device_s *cks;
@ -23,7 +22,7 @@ uint16_t sw_chksum(uint8_t *data, uint32_t len) {
uint32_t size = len;
if (len % 2 == 1) {
size=len-1;
size = len - 1;
sum += data[size];
}
@ -48,7 +47,7 @@ uint16_t get_cks_with_dma(uint8_t* data,uint32_t length)
struct bflb_dma_channel_lli_transfer_s transfers[1];
transfers[0].src_addr = (uint32_t)data;
transfers[0].dst_addr = (uint32_t)(CKS_BASE+0x4);
transfers[0].dst_addr = (uint32_t)(cks->reg_base + 0x4);
transfers[0].nbytes = length;
bflb_dma_channel_lli_reload(dma0_ch0, lli, 20, transfers, 1);
@ -70,10 +69,10 @@ static void test_case1(void){
uint32_t time = 0, i;
struct bflb_dma_channel_config_s config;
static uint32_t data_src1[DATA_LEN/4];
uint32_t data_src1[DATA_LEN/4];
for(i = 0;i < DATA_LEN; i++){
((uint8_t *)data_src1)[i] = i&0xff;
((uint8_t *)data_src1)[i] = i & 0xff;
}
time = (unsigned int)bflb_mtimer_get_time_us();

43
examples/peripherals/cks/cks_normal/main.c
View file

@ -22,7 +22,7 @@ static void test_case1(struct bflb_device_s *dev) {
cks = bflb_cks_compute(dev, (uint8_t *)data_src1, sizeof(data_src1));
if (cks != (data_src1_cks[0] << 8 | data_src1_cks[1])) {
printf("Error! CKS result with LE is %04x, should be %02x%02x\r\n", cks, data_src1_cks[1], data_src1_cks[0]);
printf("Error! CKS result with LE is %04x, should be %02x%02x\r\n", cks, data_src1_cks[0], data_src1_cks[1]);
} else {
printf("Pass\r\n");
}
@ -59,7 +59,11 @@ static void test_case2(struct bflb_device_s *dev) {
checksum = (checksum >> 16) + (checksum & 0xFFFF);
}
printf("CKS LE result is %04x, %04x\r\n", cks, (uint16_t)~checksum);
if (cks != (uint16_t)(~checksum << 8 | (~checksum >> 8 & 0xff))) {
printf("Error! CKS result with LE is %04x, should be %04x\r\n", cks, (uint16_t)(~checksum << 8 | (~checksum >> 8 & 0xff)));
} else {
printf("Pass\r\n");
}
bflb_cks_reset(dev);
bflb_cks_set_endian(dev, CKS_BIG_ENDIAN);
@ -75,11 +79,10 @@ static void test_case2(struct bflb_device_s *dev) {
checksum = (checksum >> 16) + (checksum & 0xFFFF);
}
printf("CKS BE result is %04x, %04x\r\n", cks, (uint16_t)~checksum);
if (cks == ((uint16_t)~checksum)) {
printf("====== Success %04X Checksum=====\r\n", cks);
if (cks != (uint16_t)~checksum) {
printf("Error! CKS result with BE is %04x, should be %04x\r\n", cks, (uint16_t)~checksum);
} else {
printf("====== Failed %04X Checksum======\r\n", cks);
printf("Pass\r\n");
}
}
@ -104,7 +107,11 @@ static void test_case3(struct bflb_device_s *dev) {
checksum = (checksum >> 16) + (checksum & 0xFFFF);
}
printf("CKS LE result is %04x, %04x\r\n", cks, (uint16_t)~checksum);
if (cks != (uint16_t)(~checksum << 8 | (~checksum >> 8 & 0xff))) {
printf("Error! CKS result with LE is %04x, should be %04x\r\n", cks, (uint16_t)(~checksum << 8 | (~checksum >> 8 & 0xff)));
} else {
printf("Pass\r\n");
}
bflb_cks_reset(dev);
bflb_cks_set_endian(dev, CKS_BIG_ENDIAN);
@ -120,11 +127,10 @@ static void test_case3(struct bflb_device_s *dev) {
checksum = (checksum >> 16) + (checksum & 0xFFFF);
}
printf("CKS BE result is %04x, %04x\r\n", cks, (uint16_t)~checksum);
if (cks == ((uint16_t)~checksum)) {
printf("====== Success %04X Checksum=====\r\n", cks);
if (cks != (uint16_t)~checksum) {
printf("Error! CKS result with BE is %04x, should be %04x\r\n", cks, (uint16_t)~checksum);
} else {
printf("====== Failed %04X Checksum======\r\n", cks);
printf("Pass\r\n");
}
}
@ -152,7 +158,11 @@ static void test_case4(struct bflb_device_s *dev) {
}
cks = bflb_cks_compute(dev, &data_segment_two, 1);
printf("CKS LE result is %04x, %04x\r\n", cks, (uint16_t)~checksum);
if (cks != (uint16_t)(~checksum << 8 | (~checksum >> 8 & 0xff))) {
printf("Error! CKS result with LE is %04x, should be %04x\r\n", cks, (uint16_t)(~checksum << 8 | (~checksum >> 8 & 0xff)));
} else {
printf("Pass\r\n");
}
bflb_cks_reset(dev);
bflb_cks_set_endian(dev, CKS_BIG_ENDIAN);
@ -170,11 +180,10 @@ static void test_case4(struct bflb_device_s *dev) {
}
cks = bflb_cks_compute(dev, &data_segment_two, 1);
printf("CKS BE result is %04x, %04x\r\n", cks, (uint16_t)~checksum);
if (cks == ((uint16_t)~checksum)) {
printf("====== Success %04X Checksum=====\r\n", cks);
if (cks != (uint16_t)~checksum) {
printf("Error! CKS result with BE is %04x, should be %04x\r\n", cks, (uint16_t)~checksum);
} else {
printf("====== Failed %04X Checksum======\r\n", cks);
printf("Pass\r\n");
}
}
@ -230,6 +239,8 @@ static void test_case5(struct bflb_device_s *dev) {
if (sw_cks != hw_cks) {
printf("Error!\r\n");
} else {
printf("Pass\r\n");
}
}

2
examples/peripherals/dma/dma_reduce_or_add/main.c
View file

@ -124,6 +124,8 @@ int main(void)
config.dst_width = DMA_DATA_WIDTH_32BIT;
bflb_dma_channel_init(dma0_ch0, &config);
bflb_dma_channel_tcint_mask(dma0_ch0, false);
transfers[0].nbytes = DMA_TRANSFER_LENGTH + 1;
bflb_dma_channel_lli_reload(dma0_ch0, lli, 20, transfers, 1);

9
examples/peripherals/flash/flash_dma/CMakeLists.txt Normal file
View file

@ -0,0 +1,9 @@
cmake_minimum_required(VERSION 3.15)
include(proj.conf)
find_package(bouffalo_sdk REQUIRED HINTS $ENV{BL_SDK_BASE})
sdk_set_main_file(main.c)
project(flash_dma)

0
examples/peripherals/gpio/gpio_output/Makefile → examples/peripherals/flash/flash_dma/Makefile
View file

147
examples/peripherals/flash/flash_dma/main.c Normal file
View file

@ -0,0 +1,147 @@
#include "bflb_flash.h"
#include "bflb_dma.h"
#include "board.h"
#define DMA_BUFFER_LENGTH 260
#define DMA_FLASH_ADDR_OFFSET 0 /* 0 or 28 */
static ATTR_NOCACHE_NOINIT_RAM_SECTION uint8_t dst_buffer[DMA_BUFFER_LENGTH];
static uint8_t src_burst[] = {
DMA_BURST_INCR1,
DMA_BURST_INCR1,
DMA_BURST_INCR1,
DMA_BURST_INCR4,
DMA_BURST_INCR4,
DMA_BURST_INCR4,
DMA_BURST_INCR8,
DMA_BURST_INCR8,
DMA_BURST_INCR8,
DMA_BURST_INCR16,
DMA_BURST_INCR16,
DMA_BURST_INCR16,
};
static uint8_t dst_burst[] = {
DMA_BURST_INCR1,
DMA_BURST_INCR1,
DMA_BURST_INCR1,
DMA_BURST_INCR4,
DMA_BURST_INCR4,
DMA_BURST_INCR4,
DMA_BURST_INCR8,
DMA_BURST_INCR8,
DMA_BURST_INCR8,
DMA_BURST_INCR16,
DMA_BURST_INCR16,
DMA_BURST_INCR16,
};
static uint8_t src_width[] = {
DMA_DATA_WIDTH_8BIT,
DMA_DATA_WIDTH_16BIT,
DMA_DATA_WIDTH_32BIT,
DMA_DATA_WIDTH_8BIT,
DMA_DATA_WIDTH_16BIT,
DMA_DATA_WIDTH_32BIT,
DMA_DATA_WIDTH_8BIT,
DMA_DATA_WIDTH_16BIT,
DMA_DATA_WIDTH_32BIT,
DMA_DATA_WIDTH_8BIT,
DMA_DATA_WIDTH_16BIT,
DMA_DATA_WIDTH_32BIT,
};
static uint8_t dst_width[] = {
DMA_DATA_WIDTH_8BIT,
DMA_DATA_WIDTH_16BIT,
DMA_DATA_WIDTH_32BIT,
DMA_DATA_WIDTH_8BIT,
DMA_DATA_WIDTH_16BIT,
DMA_DATA_WIDTH_32BIT,
DMA_DATA_WIDTH_8BIT,
DMA_DATA_WIDTH_16BIT,
DMA_DATA_WIDTH_32BIT,
DMA_DATA_WIDTH_8BIT,
DMA_DATA_WIDTH_16BIT,
DMA_DATA_WIDTH_32BIT,
};
static uint8_t dma_tc_flag0 = 0;
struct bflb_device_s *dma0_ch0;
volatile uint64_t start_time;
void dma0_ch0_isr(void *arg)
{
printf("cost time:%d us\r\n", (uint32_t)(bflb_mtimer_get_time_us() - start_time));
dma_tc_flag0++;
printf("tc done\r\n");
}
int main(void)
{
board_init();
uint8_t write_buf[DMA_BUFFER_LENGTH];
for (uint16_t i = 0; i < DMA_BUFFER_LENGTH; i++) {
write_buf[i] = (i & 0xff) + i / 256;
}
/* erase 0x00010000 4k flash */
bflb_flash_erase(0x00010000, 4096);
/* write 0x00010000 flash data */
bflb_flash_write(0x00010000, write_buf, sizeof(write_buf)); /* FLASH_XIP_BASE - 0x2000 + 0x00010000 */
dma0_ch0 = bflb_device_get_by_name("dma0_ch0");
struct bflb_dma_channel_config_s config;
for (uint8_t i = 0; i < sizeof(src_burst); i++) {
dma_tc_flag0 = 0;
memset(dst_buffer, 0, DMA_BUFFER_LENGTH);
config.direction = DMA_MEMORY_TO_MEMORY;
config.src_req = 0;
config.dst_req = 0;
config.src_addr_inc = DMA_ADDR_INCREMENT_ENABLE;
config.dst_addr_inc = DMA_ADDR_INCREMENT_ENABLE;
config.src_burst_count = src_burst[i];
config.dst_burst_count = dst_burst[i];
config.src_width = src_width[i];
config.dst_width = dst_width[i];
bflb_dma_channel_init(dma0_ch0, &config);
bflb_dma_channel_irq_attach(dma0_ch0, dma0_ch0_isr, NULL);
struct bflb_dma_channel_lli_pool_s lli[1]; /* max trasnfer size 4064 * 1 */
struct bflb_dma_channel_lli_transfer_s transfers[1];
transfers[0].src_addr = (uint32_t)(FLASH_XIP_BASE - 0x2000 + 0x00010000 + DMA_FLASH_ADDR_OFFSET);
transfers[0].dst_addr = (uint32_t)dst_buffer;
transfers[0].nbytes = DMA_BUFFER_LENGTH - DMA_FLASH_ADDR_OFFSET;
bflb_dma_channel_lli_reload(dma0_ch0, lli, 1, transfers, 1);
start_time = bflb_mtimer_get_time_us();
bflb_dma_channel_start(dma0_ch0);
while (dma_tc_flag0 != 1) {
bflb_mtimer_delay_ms(1);
}
for (uint16_t j = 0; j < (DMA_BUFFER_LENGTH - DMA_FLASH_ADDR_OFFSET); j++) {
if (dst_buffer[j] != write_buf[DMA_FLASH_ADDR_OFFSET + j]) {
printf("flash test fail at %d, expect:%d but with %d\r\n", i, write_buf[DMA_FLASH_ADDR_OFFSET + j], dst_buffer[j]);
while (1) {
}
}
}
}
printf("flash test success\r\n");
while (1) {
}
}

1
examples/peripherals/flash/flash_dma/proj.conf Normal file
View file

@ -0,0 +1 @@
#set(CONFIG_XXX 1)

9
examples/peripherals/flash/flash_iomode/CMakeLists.txt Normal file
View file

@ -0,0 +1,9 @@
cmake_minimum_required(VERSION 3.15)
include(proj.conf)
find_package(bouffalo_sdk REQUIRED HINTS $ENV{BL_SDK_BASE})
sdk_set_main_file(main.c)
project(flash_iomode)

13
examples/peripherals/flash/flash_iomode/Makefile Normal file
View file

@ -0,0 +1,13 @@
SDK_DEMO_PATH ?= .
BL_SDK_BASE ?= $(SDK_DEMO_PATH)/../../../..
export BL_SDK_BASE
CHIP ?= bl616
BOARD ?= bl616dk
CROSS_COMPILE ?= riscv64-unknown-elf-
# add custom cmake definition
#cmake_definition+=-Dxxx=sss
include $(BL_SDK_BASE)/project.build

52
examples/peripherals/flash/flash_iomode/main.c Normal file
View file

@ -0,0 +1,52 @@
#include "bflb_flash.h"
#include "board.h"
const char *iomode_string[] = { "NIO", "DO", "QO", "DIO", "QIO" };
#define FLASH_DATA_LEN 4096
uint8_t write_buf[FLASH_DATA_LEN];
uint8_t read_buf[FLASH_DATA_LEN];
uint64_t start_time;
int main(void)
{
board_init();
for (uint16_t i = 0; i < FLASH_DATA_LEN; i++) {
write_buf[i] = i & 0xff;
}
for (uint8_t iomode = FLASH_IOMODE_NIO; iomode <= FLASH_IOMODE_QIO; iomode++) {
printf("select flash iomode:%s\r\n", iomode_string[iomode]);
bflb_flash_set_iomode(i);
start_time = bflb_mtimer_get_time_ms();
/* erase 0x00010000 4k flash */
bflb_flash_erase(0x00010000, 4096);
/* write 0x00010000 flash data */
bflb_flash_write(0x00010000, write_buf, sizeof(write_buf));
memset(read_buf, 0, FLASH_DATA_LEN);
/* read 0x00010000 flash data */
bflb_flash_read(0x00010000, read_buf, sizeof(read_buf));
printf("cost time:%lld ms\r\n", (bflb_mtimer_get_time_ms() - start_time));
for (i = 0; i < FLASH_DATA_LEN; i++) {
if (read_buf[i] != (i & 0xff)) {
printf("flash test fail at %d, expect:%d but with %d\r\n", i, (i & 0xff), read_buf[i]);
while (1) {
}
}
}
}
printf("flash test success\r\n");
while (1) {
}
}

1
examples/peripherals/flash/flash_iomode/proj.conf Normal file
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@ -0,0 +1 @@
#set(CONFIG_XXX 1)

9
examples/peripherals/flash/flash_read_write/CMakeLists.txt Normal file
View file

@ -0,0 +1,9 @@
cmake_minimum_required(VERSION 3.15)
include(proj.conf)
find_package(bouffalo_sdk REQUIRED HINTS $ENV{BL_SDK_BASE})
sdk_set_main_file(main.c)
project(flash_read_write)

13
examples/peripherals/flash/flash_read_write/Makefile Normal file
View file

@ -0,0 +1,13 @@
SDK_DEMO_PATH ?= .
BL_SDK_BASE ?= $(SDK_DEMO_PATH)/../../../..
export BL_SDK_BASE
CHIP ?= bl616
BOARD ?= bl616dk
CROSS_COMPILE ?= riscv64-unknown-elf-
# add custom cmake definition
#cmake_definition+=-Dxxx=sss
include $(BL_SDK_BASE)/project.build

53
examples/peripherals/flash/flash_read_write/main.c Normal file
View file

@ -0,0 +1,53 @@
#include "bflb_flash.h"
#include "board.h"
#define FLASH_TEST_SIZE 1 * 1024 * 1024
int main(void)
{
board_init();
uint8_t write_buf[256];
uint8_t read_buf[256];
for (uint16_t i = 0; i < 256; i++) {
write_buf[i] = i;
}
for (uint32_t i = 1; i < (FLASH_TEST_SIZE / 1024); i++) {
printf("test addr:%08x\r\n", (0x00010000 + (i - 1) * 1024));
/* erase 0x00010000 4k flash */
bflb_flash_erase(0x00010000 + (i - 1) * 1024, i * 1024);
memset(read_buf, 0, 256);
/* read 0x00010000 flash data */
bflb_flash_read(0x00010000 + (i - 1) * 1024, read_buf, sizeof(read_buf));
for (uint16_t j = 0; j < 256; j++) {
if (read_buf[j] != 0xff) {
printf("flash test fail at %d, expect:%d but with %d\r\n", j, 0xff, read_buf[j]);
while (1) {
}
}
}
/* write 0x00010000 flash data */
bflb_flash_write(0x00010000 + (i - 1) * 1024, write_buf, sizeof(write_buf));
memset(read_buf, 0, 256);
/* read 0x00010000 flash data */
bflb_flash_read(0x00010000 + (i - 1) * 1024, read_buf, sizeof(read_buf));
for (uint16_t j = 0; j < 256; j++) {
if (read_buf[j] != write_buf[j]) {
printf("flash test fail at %d, expect:%d but with %d\r\n", j, write_buf[j], read_buf[j]);
while (1) {
}
}
}
}
printf("flash test success\r\n");
while (1) {
}
}

1
examples/peripherals/flash/flash_read_write/proj.conf Normal file
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@ -0,0 +1 @@
#set(CONFIG_XXX 1)

9
examples/peripherals/flash/flash_secure_read/CMakeLists.txt Normal file
View file

@ -0,0 +1,9 @@
cmake_minimum_required(VERSION 3.15)
include(proj.conf)
find_package(bouffalo_sdk REQUIRED HINTS $ENV{BL_SDK_BASE})
sdk_set_main_file(main.c)
project(flash_secure_read)

13
examples/peripherals/flash/flash_secure_read/Makefile Normal file
View file

@ -0,0 +1,13 @@
SDK_DEMO_PATH ?= .
BL_SDK_BASE ?= $(SDK_DEMO_PATH)/../../../..
export BL_SDK_BASE
CHIP ?= bl616
BOARD ?= bl616dk
CROSS_COMPILE ?= riscv64-unknown-elf-
# add custom cmake definition
#cmake_definition+=-Dxxx=sss
include $(BL_SDK_BASE)/project.build

102
examples/peripherals/flash/flash_secure_read/main.c Normal file
View file

@ -0,0 +1,102 @@
#include "bflb_flash.h"
#include "bflb_sec_aes.h"
#include "board.h"
uint8_t aes_ctr_128bit_key[16] = {
0x2b, 0x7e, 0x15, 0x16, 0x28, 0xae, 0xd2, 0xa6,
0xab, 0xf7, 0x15, 0x88, 0x09, 0xcf, 0x4f, 0x3c
};
uint8_t aes_ctr_128bit_iv[16] = {
0x00, 0x6C, 0xB6, 0xDB, 0xC0, 0x54, 0x3B, 0x59,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
};
#define AES_DATA_LEN 4096
ATTR_NOCACHE_NOINIT_RAM_SECTION uint8_t aes_ctr_pt_buffer[AES_DATA_LEN];
ATTR_NOCACHE_NOINIT_RAM_SECTION uint8_t aes_ctr_ct_buffer[AES_DATA_LEN];
ATTR_NOCACHE_NOINIT_RAM_SECTION uint8_t aes_ctr_tmp_buffer[AES_DATA_LEN];
ATTR_NOCACHE_NOINIT_RAM_SECTION uint8_t aes_ctr_tmp_buffer2[AES_DATA_LEN];
static void bflb_data_compare(const uint8_t *expected, uint8_t *input, uint32_t len)
{
int i = 0;
for (i = 0; i < len; i++) {
if (input[i] != expected[i]) {
printf("Compare fail at %d,input %02x, but expect %02x\r\n", i, input[i], expected[i]);
while (1) {
}
}
}
}
int main(void)
{
board_init();
struct bflb_device_s *aes;
for (uint32_t i = 0; i < AES_DATA_LEN; i++) {
aes_ctr_pt_buffer[i] = i & 0xff;
}
aes = bflb_device_get_by_name("aes");
bflb_group0_request_aes_access(aes);
bflb_aes_init(aes);
bflb_aes_set_mode(aes, AES_MODE_CTR);
bflb_aes_setkey(aes, aes_ctr_128bit_key, 128);
bflb_aes_encrypt(aes, aes_ctr_pt_buffer, aes_ctr_128bit_iv, aes_ctr_ct_buffer, AES_DATA_LEN);
bflb_aes_decrypt(aes, aes_ctr_ct_buffer, aes_ctr_128bit_iv, aes_ctr_tmp_buffer, AES_DATA_LEN);
bflb_data_compare(aes_ctr_pt_buffer, aes_ctr_tmp_buffer, AES_DATA_LEN);
printf("aes ctr128 encrypt & decrypt success\r\n");
bflb_flash_aes_disable();
/* erase 0x00010000 4k flash */
bflb_flash_erase(0x00010000, 4096);
memset(aes_ctr_tmp_buffer, 0, AES_DATA_LEN);
/* write 0x00010000 flash data */
bflb_flash_write(0x00010000, aes_ctr_ct_buffer, AES_DATA_LEN);
bflb_flash_read(0x00010000, aes_ctr_tmp_buffer, AES_DATA_LEN);
bflb_data_compare(aes_ctr_ct_buffer, aes_ctr_tmp_buffer, AES_DATA_LEN);
printf("flash write & read success\r\n");
struct bflb_flash_aes_config_s config;
config.region = 0;
config.region_enable = 1;
config.lock_enable = 0;
config.key = aes_ctr_128bit_key;
config.keybits = FLASH_AES_KEY_128BITS;
config.iv = aes_ctr_128bit_iv;
config.start_addr = 64 * 1024; /* 0x00010000 */
config.end_addr = 68 * 1024; /* 0x00011000 */
bflb_flash_aes_init(&config);
bflb_flash_aes_enable();
/* read 0x00010000 flash data */
bflb_data_compare(aes_ctr_pt_buffer, (uint8_t *)(FLASH_XIP_BASE - 0x2000 + 0x00010000), AES_DATA_LEN);
printf("flash decrypt with flash aes ctr128 success\r\n");
bflb_flash_read(0x00010000, aes_ctr_tmp_buffer, AES_DATA_LEN);
bflb_aes_decrypt(aes, &aes_ctr_tmp_buffer[0], aes_ctr_128bit_iv, &aes_ctr_tmp_buffer2[0], 1024);
aes_ctr_128bit_iv[15] = 0x40; /* update counter */
bflb_aes_decrypt(aes, &aes_ctr_tmp_buffer[1024], aes_ctr_128bit_iv, &aes_ctr_tmp_buffer2[1024], 1024);
aes_ctr_128bit_iv[15] = 0x80; /* update counter */
bflb_aes_decrypt(aes, &aes_ctr_tmp_buffer[1024 * 2], aes_ctr_128bit_iv, &aes_ctr_tmp_buffer2[1024 * 2], 1024);
aes_ctr_128bit_iv[15] = 0xc0; /* update counter */
bflb_aes_decrypt(aes, &aes_ctr_tmp_buffer[1024 * 3], aes_ctr_128bit_iv, &aes_ctr_tmp_buffer2[1024 * 3], 1024);
aes_ctr_128bit_iv[15] = 0x00; /* update counter */
aes_ctr_128bit_iv[14] = 0x01;
bflb_data_compare(aes_ctr_pt_buffer, aes_ctr_tmp_buffer2, AES_DATA_LEN);
printf("flash decrypt with sec eng aes ctr128 success\r\n");
printf("flash test success\r\n");
while (1) {
}
}

1
examples/peripherals/flash/flash_secure_read/proj.conf Normal file
View file

@ -0,0 +1 @@
#set(CONFIG_XXX 1)

9
examples/peripherals/gpio/gpio_input_output/CMakeLists.txt Normal file
View file

@ -0,0 +1,9 @@
cmake_minimum_required(VERSION 3.15)
include(proj.conf)
find_package(bouffalo_sdk REQUIRED HINTS $ENV{BL_SDK_BASE})
sdk_set_main_file(main.c)
project(gpio_input_output)

13
examples/peripherals/gpio/gpio_input_output/Makefile Normal file
View file

@ -0,0 +1,13 @@
SDK_DEMO_PATH ?= .
BL_SDK_BASE ?= $(SDK_DEMO_PATH)/../../../..
export BL_SDK_BASE
CHIP ?= bl616
BOARD ?= bl616dk
CROSS_COMPILE ?= riscv64-unknown-elf-
# add custom cmake definition
#cmake_definition+=-Dxxx=sss
include $(BL_SDK_BASE)/project.build

25
examples/peripherals/gpio/gpio_input_output/main.c Normal file
View file

@ -0,0 +1,25 @@
#include "bflb_gpio.h"
struct bflb_device_s *gpio;
extern void board_init(void);
int main(void)
{
board_init();
gpio = bflb_device_get_by_name("gpio");
printf("gpio output\r\n");
bflb_gpio_init(gpio, GPIO_PIN_0, GPIO_OUTPUT | GPIO_PULLUP | GPIO_SMT_EN | GPIO_DRV_0);
bflb_gpio_init(gpio, GPIO_PIN_1, GPIO_INPUT | GPIO_PULLUP | GPIO_SMT_EN | GPIO_DRV_0);
while (1) {
bflb_gpio_set(gpio, GPIO_PIN_0);
printf("GPIO_PIN_1=%x\r\n", bflb_gpio_read(gpio, GPIO_PIN_1));
bflb_mtimer_delay_ms(2000);
bflb_gpio_reset(gpio, GPIO_PIN_0);
printf("GPIO_PIN_1=%x\r\n", bflb_gpio_read(gpio, GPIO_PIN_1));
bflb_mtimer_delay_ms(2000);
}
}

0
examples/peripherals/gpio/gpio_output/proj.conf → examples/peripherals/gpio/gpio_input_output/proj.conf
View file

8
examples/peripherals/gpio/gpio_interrupt/main.c
View file

@ -8,9 +8,9 @@ extern void board_init(void);
void gpio_isr(int irq, void *arg)
{
static int i = 0;
bool intstatus = bflb_gpio_get_intstatus(gpio, GPIO_PIN_12);
bool intstatus = bflb_gpio_get_intstatus(gpio, GPIO_PIN_0);
if (intstatus) {
bflb_gpio_int_clear(gpio, GPIO_PIN_12);
bflb_gpio_int_clear(gpio, GPIO_PIN_0);
printf("%d\r\n", i++);
}
}
@ -22,8 +22,8 @@ int main(void)
gpio = bflb_device_get_by_name("gpio");
printf("gpio interrupt\r\n");
bflb_gpio_int_init(gpio, GPIO_PIN_12, GPIO_INT_TRIG_MODE_SYNC_FALLING_EDGE);
bflb_gpio_int_mask(gpio, GPIO_PIN_12, false);
bflb_gpio_int_init(gpio, GPIO_PIN_0, GPIO_INT_TRIG_MODE_SYNC_FALLING_EDGE);
bflb_gpio_int_mask(gpio, GPIO_PIN_0, false);
bflb_irq_attach(gpio->irq_num, gpio_isr, gpio);
bflb_irq_enable(gpio->irq_num);

25
examples/peripherals/gpio/gpio_output/main.c
View file

@ -1,25 +0,0 @@
#include "bflb_gpio.h"
struct bflb_device_s *gpio;
extern void board_init(void);
int main(void)
{
board_init();
gpio = bflb_device_get_by_name("gpio");
printf("gpio output\r\n");
bflb_gpio_init(gpio, GPIO_PIN_12, GPIO_OUTPUT | GPIO_PULLUP | GPIO_SMT_EN | GPIO_DRV_0);
bflb_gpio_init(gpio, GPIO_PIN_24, GPIO_INPUT | GPIO_PULLUP | GPIO_SMT_EN | GPIO_DRV_0);
while (1) {
bflb_gpio_set(gpio, GPIO_PIN_12);
printf("%x\r\n", bflb_gpio_read(gpio, GPIO_PIN_24));
bflb_mtimer_delay_ms(2000);
bflb_gpio_reset(gpio, GPIO_PIN_12);
printf("%x\r\n", bflb_gpio_read(gpio, GPIO_PIN_24));
bflb_mtimer_delay_ms(2000);
}
}

2
examples/peripherals/i2c/i2c_eeprom_interrupt/main.c
View file

@ -43,7 +43,7 @@ int main(void)
/* Set i2c interrupt */
bflb_i2c_int_mask(i2c0, I2C_INT_END | I2C_INT_NACK | I2C_INT_ARB | I2C_INT_FER, false);
bflb_irq_attach(i2c0->irq_num, i2c_isr, i2c0);
bflb_irq_attach(i2c0->irq_num, i2c_isr, NULL);
bflb_irq_enable(i2c0->irq_num);
struct bflb_i2c_msg_s msgs[2];

51
examples/peripherals/ir/ir_nec/main.c
View file

@ -1,52 +1,71 @@
#include "bflb_ir.h"
#include "board.h"
#ifdef IR_TX_NEC
struct bflb_device_s *irtx;
#endif
#ifdef IR_RX_NEC
struct bflb_device_s *irrx;
#endif
/* main */
int main(void)
{
uint32_t tx_buffer[1] = {0xE916FF00};
uint64_t rx_data;
uint8_t rx_len;
struct bflb_ir_tx_config_s tx_cfg;
struct bflb_ir_rx_config_s rx_cfg;
board_init();
printf("IR NEC case:\n\r");
board_ir_gpio_init();
#ifdef IR_TX_NEC
uint32_t tx_buffer[1] = { 0xE916FF00 };
struct bflb_ir_tx_config_s tx_cfg;
irtx = bflb_device_get_by_name("irtx");
irrx = bflb_device_get_by_name("irrx");
/* TX init */
tx_cfg.tx_mode = IR_TX_NEC;
bflb_ir_tx_init(irtx, &tx_cfg);
#endif
#ifdef IR_RX_NEC
uint64_t rx_data;
uint8_t rx_len;
struct bflb_ir_rx_config_s rx_cfg;
irrx = bflb_device_get_by_name("irrx");
/* RX init */
rx_cfg.rx_mode = IR_RX_NEC;
rx_cfg.input_inverse = true;
rx_cfg.deglitch_enable = false;
bflb_ir_rx_init(irrx, &rx_cfg);
/* Enable rx, wait for sending */
bflb_ir_rx_enable(irrx, true);
#endif
#ifdef IR_TX_NEC
/* Send */
bflb_ir_send(irtx, tx_buffer, 1);
printf("Send 0x%08lx\r\n", tx_buffer[0]);
#endif
#ifdef IR_RX_NEC
/* Receive */
rx_len = bflb_ir_receive(irrx, &rx_data);
#ifdef IR_TX_NEC
/* Check data received */
if (rx_data != tx_buffer[0]) {
printf("Data error! receive bit: %d, value: %016llx\n\r", rx_len, rx_data);
printf("Data error! receive bit: %d, value: 0x%016llx\n\r", rx_len, rx_data);
} else {
printf("Success\n\r");
}
#else
printf("Receive bit: %d, value: 0x%016llx\n\r", rx_len, rx_data);
#endif
#endif
printf("end\n\r");

51
examples/peripherals/ir/ir_rc5/main.c
View file

@ -1,52 +1,71 @@
#include "bflb_ir.h"
#include "board.h"
#ifdef IR_TX_NEC
struct bflb_device_s *irtx;
#endif
#ifdef IR_RX_NEC
struct bflb_device_s *irrx;
#endif
/* main */
int main(void)
{
uint32_t tx_buffer[1] = {0x123D};
uint64_t rx_data;
uint8_t rx_len;
struct bflb_ir_tx_config_s tx_cfg;
struct bflb_ir_rx_config_s rx_cfg;
board_init();
printf("IR RC-5 case:\n\r");
board_ir_gpio_init();
#ifdef IR_TX_NEC
uint32_t tx_buffer[1] = { 0x123D };
struct bflb_ir_tx_config_s tx_cfg;
irtx = bflb_device_get_by_name("irtx");
irrx = bflb_device_get_by_name("irrx");
/* TX init */
tx_cfg.tx_mode = IR_TX_RC5;
bflb_ir_tx_init(irtx, &tx_cfg);
#endif
#ifdef IR_RX_NEC
uint64_t rx_data;
uint8_t rx_len;
struct bflb_ir_rx_config_s rx_cfg;
irrx = bflb_device_get_by_name("irrx");
/* RX init */
rx_cfg.rx_mode = IR_RX_RC5;
rx_cfg.input_inverse = true;
rx_cfg.deglitch_enable = false;
bflb_ir_rx_init(irrx, &rx_cfg);
/* Enable rx, wait for sending */
bflb_ir_rx_enable(irrx, true);
#endif
#ifdef IR_TX_NEC
/* Send */
bflb_ir_send(irtx, tx_buffer, 1);
printf("Send 0x%08lx\r\n", tx_buffer[0]);
#endif
#ifdef IR_RX_NEC
/* Receive */
rx_len = bflb_ir_receive(irrx, &rx_data);
#ifdef IR_TX_NEC
/* Check data received */
if (rx_data != tx_buffer[0]) {
printf("Data error! receive bit: %d, value: %016llx\n\r", rx_len, rx_data);
printf("Data error! receive bit: %d, value: 0x%016llx\n\r", rx_len, rx_data);
} else {
printf("Success\n\r");
}
#else
printf("Receive bit: %d, value: 0x%016llx\n\r", rx_len, rx_data);
#endif
#endif
printf("end\n\r");

57
examples/peripherals/ir/ir_swm/main.c
View file

@ -1,54 +1,75 @@
#include "bflb_ir.h"
#include "board.h"
#ifdef IR_TX_NEC
struct bflb_device_s *irtx;
#endif
#ifdef IR_RX_NEC
struct bflb_device_s *irrx;
#endif
/* main */
int main(void)
{
uint16_t tx_buffer[21] = {1777,1777,3555,3555,1777,1777,1777,1777,1777,1777,
3555,1777,1777,1777,1777,3555,3555,1777,1777,3555,1777};
uint16_t rx_buffer[30];
uint8_t rx_len;
uint32_t i;
struct bflb_ir_tx_config_s tx_cfg;
struct bflb_ir_rx_config_s rx_cfg;
board_init();
printf("IR SWM case:\n\r");
board_ir_gpio_init();
#ifdef IR_TX_NEC
uint16_t tx_buffer[] = { 1777, 1777, 3555, 3555, 1777, 1777, 1777, 1777, 1777, 1777,
3555, 1777, 1777, 1777, 1777, 3555, 3555, 1777, 1777, 3555, 1777 };
struct bflb_ir_tx_config_s tx_cfg;
irtx = bflb_device_get_by_name("irtx");
irrx = bflb_device_get_by_name("irrx");
/* TX init */
tx_cfg.tx_mode = IR_TX_SWM;
bflb_ir_tx_init(irtx, &tx_cfg);
#endif
#ifdef IR_RX_NEC
uint16_t rx_buffer[30];
uint8_t rx_len;
struct bflb_ir_rx_config_s rx_cfg;
irrx = bflb_device_get_by_name("irrx");
/* RX init */
rx_cfg.rx_mode = IR_RX_SWM;
rx_cfg.input_inverse = true;
rx_cfg.deglitch_enable = false;
rx_cfg.end_threshold = 3999;
bflb_ir_rx_init(irrx, &rx_cfg);
/* Enable rx, wait for sending */
bflb_ir_rx_enable(irrx, true);
#endif
#ifdef IR_TX_NEC
/* Send */
bflb_ir_swm_send(irtx, tx_buffer, 21);
bflb_ir_swm_send(irtx, tx_buffer, sizeof(tx_buffer) / sizeof(tx_buffer[0]));
printf("Send bit: %d, value:\r\n", sizeof(tx_buffer) / sizeof(tx_buffer[0]));
for (i = 0; i < sizeof(tx_buffer) / sizeof(tx_buffer[0]); i++) {
printf("%d ", tx_buffer[i]);
}
printf("\r\n");
#endif
#ifdef IR_RX_NEC
/* Receive */
rx_len = bflb_ir_swm_receive(irrx, rx_buffer, 30);
/* Print data received */
printf("Receive bit: %d, value:\n\r", rx_len);
for (i = 0; i < rx_len; i ++) {
printf("Receive bit: %d, value:\r\n", rx_len);
for (i = 0; i < rx_len; i++) {
printf("%d ", rx_buffer[i]);
}
printf("\r\n");
#endif
printf("\n\rend\n\r");

9
examples/peripherals/ir/ir_tx_dma/CMakeLists.txt Normal file
View file

@ -0,0 +1,9 @@
cmake_minimum_required(VERSION 3.15)
include(proj.conf)
find_package(bouffalo_sdk REQUIRED HINTS $ENV{BL_SDK_BASE})
sdk_set_main_file(main.c)
project(ir_tx_dma)

13
examples/peripherals/ir/ir_tx_dma/Makefile Normal file
View file

@ -0,0 +1,13 @@
SDK_DEMO_PATH ?= .
BL_SDK_BASE ?= $(SDK_DEMO_PATH)/../../../..
export BL_SDK_BASE
CHIP ?= bl808
BOARD ?= bl808dk
CROSS_COMPILE ?= riscv64-unknown-elf-
# add custom cmake definition
#cmake_definition+=-Dxxx=sss
include $(BL_SDK_BASE)/project.build

103
examples/peripherals/ir/ir_tx_dma/main.c Normal file
View file

@ -0,0 +1,103 @@
#include "bflb_ir.h"
#include "bflb_dma.h"
#include "bflb_mtimer.h"
#include "board.h"
struct bflb_device_s *irtx;
struct bflb_device_s *dma0_ch0;
static ATTR_NOCACHE_RAM_SECTION uint32_t tx_buffer[128];
static volatile uint8_t dma_tc_flag0 = 0;
void dma0_ch0_isr(void *arg)
{
dma_tc_flag0++;
printf("tc done\r\n");
}
/* main */
int main(void)
{
uint32_t i;
struct bflb_dma_channel_lli_pool_s tx_llipool[1];
struct bflb_dma_channel_lli_transfer_s tx_transfers[1];
struct bflb_ir_tx_config_s tx_cfg = {
.tx_mode = IR_TX_CUSTOMIZE,
.data_bits = 0,
.tail_inverse = 0,
.tail_enable = 0,
.head_inverse = 0,
.head_enable = 0,
.logic1_inverse = 1,
.logic0_inverse = 1,
.data_enable = 1,
.swm_enable = 0,
.output_modulation = 1,
.output_inverse = 0,
.freerun_enable = 1,
.continue_enable = 1,
.fifo_width = IR_TX_FIFO_WIDTH_24BIT,
.fifo_threshold = 1,
.logic0_pulse_width_1 = 0,
.logic0_pulse_width_0 = 0,
.logic1_pulse_width_1 = 2,
.logic1_pulse_width_0 = 0,
.head_pulse_width_1 = 0,
.head_pulse_width_0 = 0,
.tail_pulse_width_1 = 0,
.tail_pulse_width_0 = 0,
.modu_width_1 = 17,
.modu_width_0 = 34,
.pulse_width_unit = 1124,
};
struct bflb_dma_channel_config_s dma_config = {
.direction = DMA_MEMORY_TO_PERIPH,
.src_req = DMA_REQUEST_NONE,
.dst_req = DMA_REQUEST_IR_TX,
.src_addr_inc = DMA_ADDR_INCREMENT_ENABLE,
.dst_addr_inc = DMA_ADDR_INCREMENT_DISABLE,
.src_burst_count = DMA_BURST_INCR1,
.dst_burst_count = DMA_BURST_INCR1,
.src_width = DMA_DATA_WIDTH_32BIT,
.dst_width = DMA_DATA_WIDTH_32BIT,
};
board_init();
printf("IR TX DMA case:\n\r");
board_ir_gpio_init();
irtx = bflb_device_get_by_name("irtx");
/* TX init */
bflb_ir_tx_init(irtx, &tx_cfg);
bflb_ir_link_txdma(irtx, true);
bflb_ir_tx_enable(irtx, true);
for (i = 0; i < 128; i++) {
tx_buffer[i] = i * 0x01010101;
}
dma0_ch0 = bflb_device_get_by_name("dma0_ch0");
bflb_dma_channel_init(dma0_ch0, &dma_config);
bflb_dma_channel_irq_attach(dma0_ch0, dma0_ch0_isr, NULL);
tx_transfers[0].src_addr = (uint32_t)tx_buffer;
tx_transfers[0].dst_addr = (uint32_t)DMA_ADDR_IR_TDR;
tx_transfers[0].nbytes = 128 * 4;
bflb_dma_channel_lli_reload(dma0_ch0, tx_llipool, 1, tx_transfers, 1);
bflb_dma_channel_start(dma0_ch0);
while (dma_tc_flag0 != 1) {
bflb_mtimer_delay_ms(1);
}
printf("Check wave\r\n");
printf("end\n\r");
while (1) {
}
}

1
examples/peripherals/ir/ir_tx_dma/proj.conf Normal file
View file

@ -0,0 +1 @@
#set(CONFIG_XXX 1)

40
examples/peripherals/mjpeg/mjpeg_no_camera/main.c
View file

@ -13,23 +13,23 @@ volatile uint32_t pic_count = 0;
volatile uint32_t pic_addr[MJPEG_MAX_FRAME_COUNT] = { 0 };
volatile uint32_t pic_len[MJPEG_MAX_FRAME_COUNT] = { 0 };
uint8_t *pic;
volatile uint32_t jpeg_len;
void mjpeg_isr(int irq, void *arg)
{
uint8_t *pic;
uint32_t jpeg_len;
uint32_t intstatus = bflb_mjpeg_get_intstatus(mjpeg);
if (intstatus & MJPEG_INTSTS_ONE_FRAME) {
bflb_mjpeg_int_clear(mjpeg, MJPEG_INTCLR_ONE_FRAME);
jpeg_len = bflb_mjpeg_get_frame_info(mjpeg, &pic);
pic_addr[pic_count] = (uint32_t)pic;
pic_len[pic_count] = jpeg_len;
pic_count++;
bflb_mjpeg_pop_one_frame(mjpeg);
bflb_mjpeg_int_clear(mjpeg, MJPEG_INTCLR_ONE_FRAME);
}
}
static uint16_t Q_Table_50_Y[64] = {
static uint16_t q_table_50_y[64] = {
16, 11, 10, 16, 24, 40, 51, 61,
12, 12, 14, 19, 26, 58, 60, 55,
14, 13, 16, 24, 40, 57, 69, 56,
@ -40,7 +40,7 @@ static uint16_t Q_Table_50_Y[64] = {
72, 92, 95, 98, 112, 100, 103, 99
};
static uint16_t Q_Table_50_UV[64] = {
static uint16_t q_table_50_uv[64] = {
17, 18, 24, 47, 99, 99, 99, 99,
18, 21, 26, 66, 99, 99, 99, 99,
24, 26, 56, 99, 99, 99, 99, 99,
@ -51,12 +51,17 @@ static uint16_t Q_Table_50_UV[64] = {
99, 99, 99, 99, 99, 99, 99, 99
};
uint8_t jpgHeadBuf[800] = { 0 };
uint32_t jpgHeadLength;
uint8_t jpg_head_buf[800] = { 0 };
uint32_t jpg_head_len;
uint8_t MJPEG_QUALITY = 50;
#define BUFFER_YUV 0xA8000000
#if defined(BL616)
#define BSP_PSRAM_BASE 0xA8000000
#elif defined(BL808)
#define BSP_PSRAM_BASE 0x50000000
#endif
#define SIZE_BUFFER (4 * 1024 * 1024)
void bflb_mjpeg_dump_hex(uint8_t *data, uint32_t len)
@ -76,8 +81,8 @@ void bflb_mjpeg_dump_hex(uint8_t *data, uint32_t len)
int main(void)
{
uint16_t tmpTableY[64] = { 0 };
uint16_t tmpTableUV[64] = { 0 };
uint16_t tmp_table_y[64] = { 0 };
uint16_t tmp_table_uv[64] = { 0 };
board_init();
@ -90,16 +95,16 @@ int main(void)
config.resolution_y = Y;
config.input_bufaddr0 = (uint32_t)test_64x64;
config.input_bufaddr1 = 0;
config.output_bufaddr = (uint32_t)BUFFER_YUV + MJPEG_MAX_FRAME_COUNT * X * Y * 2;
config.output_bufaddr = (uint32_t)BSP_PSRAM_BASE + MJPEG_MAX_FRAME_COUNT * X * Y * 2;
config.output_bufsize = SIZE_BUFFER - MJPEG_MAX_FRAME_COUNT * X * Y * 2;
bflb_mjpeg_init(mjpeg, &config);
bflb_mjpeg_calculate_quantize_table(MJPEG_QUALITY, Q_Table_50_Y, tmpTableY);
bflb_mjpeg_calculate_quantize_table(MJPEG_QUALITY, Q_Table_50_UV, tmpTableUV);
bflb_mjpeg_fill_quantize_table(mjpeg, tmpTableY, tmpTableUV);
jpgHeadLength = JpegHeadCreate(YUV_MODE_422, MJPEG_QUALITY, X, Y, jpgHeadBuf);
bflb_mjpeg_fill_jpeg_header_tail(mjpeg, jpgHeadBuf, jpgHeadLength);
bflb_mjpeg_calculate_quantize_table(MJPEG_QUALITY, q_table_50_y, tmp_table_y);
bflb_mjpeg_calculate_quantize_table(MJPEG_QUALITY, q_table_50_uv, tmp_table_uv);
bflb_mjpeg_fill_quantize_table(mjpeg, tmp_table_y, tmp_table_uv);
jpg_head_len = JpegHeadCreate(YUV_MODE_422, MJPEG_QUALITY, X, Y, jpg_head_buf);
bflb_mjpeg_fill_jpeg_header_tail(mjpeg, jpg_head_buf, jpg_head_len);
bflb_mjpeg_tcint_mask(mjpeg, false);
bflb_irq_attach(mjpeg->irq_num, mjpeg_isr, NULL);
@ -108,6 +113,7 @@ int main(void)
bflb_mjpeg_sw_run(mjpeg, MJPEG_MAX_FRAME_COUNT);
while (pic_count < MJPEG_MAX_FRAME_COUNT) {
printf("pic count:%d\r\n",pic_count);
bflb_mtimer_delay_ms(200);
}

0
examples/peripherals/mjpeg/mjpeg_no_camera/test_64x64_64x64.YUYV → examples/peripherals/mjpeg/mjpeg_no_camera/test_64x64.YUYV
View file

3
examples/peripherals/mtimer/main.c
View file

@ -1,4 +1,5 @@
#include "bflb_mtimer.h"
#include "board.h"
void systick_isr()
{
@ -7,8 +8,6 @@ void systick_isr()
printf("tick:%d\r\n", tick);
}
extern void board_init(void);
int main(void)
{
board_init();

9
examples/peripherals/psram/CMakeLists.txt Normal file
View file

@ -0,0 +1,9 @@
cmake_minimum_required(VERSION 3.15)
include(proj.conf)
find_package(bouffalo_sdk REQUIRED HINTS $ENV{BL_SDK_BASE})
sdk_set_main_file(main.c)
project(psram)

13
examples/peripherals/psram/Makefile Normal file
View file

@ -0,0 +1,13 @@
SDK_DEMO_PATH ?= .
BL_SDK_BASE ?= $(SDK_DEMO_PATH)/../../..
export BL_SDK_BASE
CHIP ?= bl616
BOARD ?= bl616dk
CROSS_COMPILE ?= riscv64-unknown-elf-
# add custom cmake definition
#cmake_definition+=-Dxxx=sss
include $(BL_SDK_BASE)/project.build

93
examples/peripherals/psram/main.c Normal file
View file

@ -0,0 +1,93 @@
#include "bflb_mtimer.h"
#include "board.h"
#if defined(BL702)
#define BSP_PSRAM_BASE 0x26000000
#elif defined(BL616)
#define BSP_PSRAM_BASE 0xA8000000
#elif defined(BL808)
#define BSP_PSRAM_BASE 0x50000000
#endif
void test32(void)
{
uint32_t i, val;
printf("============= check uint32_t ==============\r\n");
for (i = 0; i < 256; i += 4) {
*((volatile uint32_t *)(BSP_PSRAM_BASE + i)) = i / 4;
}
for (i = 0; i < 256; i += 4) {
val = *((volatile uint32_t *)(BSP_PSRAM_BASE + i));
printf("addr = 0x%08X, val = 0x%08X\r\n", (BSP_PSRAM_BASE + i), *((volatile uint32_t *)(BSP_PSRAM_BASE + i)));
if (i / 4 != val) {
printf("psram check fail\r\n");
while (1) {
}
}
}
}
void test16(void)
{
uint32_t i, val;
printf("============= check uint16_t ==============\r\n");
for (i = 0; i < 256; i += 2) {
*((volatile uint16_t *)(BSP_PSRAM_BASE + i)) = i / 2;
}
for (i = 0; i < 256; i += 2) {
val = *((volatile uint16_t *)(BSP_PSRAM_BASE + i));
printf("addr = 0x%08X, val = 0x%08X\r\n", (BSP_PSRAM_BASE + i), *((volatile uint16_t *)(BSP_PSRAM_BASE + i)));
if (i / 2 != val) {
printf("psram check fail\r\n");
while (1) {
}
}
}
}
void test8(void)
{
uint32_t i;
uint8_t val;
printf("============= check uint8_t ==============\r\n");
for (i = 0; i < 256; i++) {
*((volatile uint8_t *)(BSP_PSRAM_BASE + i)) = i;
}
for (i = 0; i < 256; i++) {
val = *((volatile uint8_t *)(BSP_PSRAM_BASE + i));
printf("addr = 0x%08X, val = 0x%08X\r\n", (BSP_PSRAM_BASE + i), *((volatile uint8_t *)(BSP_PSRAM_BASE + i)));
if ((uint8_t)i != val) {
printf("psram check fail\r\n");
while (1) {
}
}
}
}
int main(void)
{
board_init();
printf(" psram read write test \r\n");
test8();
test16();
test32();
printf(" test success\r\n");
while (1) {
}
}

1
examples/peripherals/psram/proj.conf Normal file
View file

@ -0,0 +1 @@
set(CONFIG_PSRAM 1)

2
examples/peripherals/pwm_v1/pwm_all_channels/main.c
View file

@ -9,7 +9,7 @@ int main(void)
board_init();
board_pwm_gpio_init();
pwm = bflb_device_get_by_name("pwm0");
pwm = bflb_device_get_by_name("pwm_v1");
/* period = .XCLK / .clk_div / .period = 32MHz / 32 / 1000 = 1KHz */
struct bflb_pwm_v1_channel_config_s cfg = {

2
examples/peripherals/pwm_v1/pwm_basic/main.c
View file

@ -9,7 +9,7 @@ int main(void)
board_init();
board_pwm_gpio_init();
pwm = bflb_device_get_by_name("pwm0");
pwm = bflb_device_get_by_name("pwm_v1");
/* period = .XCLK / .clk_div / .period = 32MHz / 32 / 1000 = 1KHz */
struct bflb_pwm_v1_channel_config_s cfg = {

14
examples/peripherals/pwm_v1/pwm_int/main.c
View file

@ -11,29 +11,29 @@ void pwm_isr(int irq, void *arg)
uint32_t intstatus = bflb_pwm_v1_get_intstatus(pwm);
if (intstatus & PWM_INTSTS_REPT_CH0) {
bflb_pwm_v1_int_clear(pwm, PWM_INTCLR_REPT_CH0);
static int times = 0;
printf("CH0 interrupt, %d times\r\n", ++times);
bflb_pwm_v1_int_clear(pwm, PWM_INTCLR_REPT_CH0);
}
if (intstatus & PWM_INTSTS_REPT_CH1) {
bflb_pwm_v1_int_clear(pwm, PWM_INTCLR_REPT_CH1);
static int times = 0;
printf("CH1 interrupt, %d times\r\n", ++times);
bflb_pwm_v1_int_clear(pwm, PWM_INTCLR_REPT_CH1);
}
if (intstatus & PWM_INTSTS_REPT_CH2) {
bflb_pwm_v1_int_clear(pwm, PWM_INTCLR_REPT_CH2);
static int times = 0;
printf("CH2 interrupt, %d times\r\n", ++times);
bflb_pwm_v1_int_clear(pwm, PWM_INTCLR_REPT_CH2);
}
if (intstatus & PWM_INTSTS_REPT_CH3) {
bflb_pwm_v1_int_clear(pwm, PWM_INTCLR_REPT_CH3);
static int times = 0;
printf("CH3 interrupt, %d times\r\n", ++times);
bflb_pwm_v1_int_clear(pwm, PWM_INTCLR_REPT_CH3);
}
if (intstatus & PWM_INTSTS_REPT_CH4) {
bflb_pwm_v1_int_clear(pwm, PWM_INTCLR_REPT_CH4);
static int times = 0;
printf("CH4 interrupt, %d times\r\n", ++times);
bflb_pwm_v1_int_clear(pwm, PWM_INTCLR_REPT_CH4);
}
}
@ -42,7 +42,7 @@ int main(void)
board_init();
board_pwm_gpio_init();
pwm = bflb_device_get_by_name("pwm0");
pwm = bflb_device_get_by_name("pwm_v1");
/* period = .XCLK / .clk_div / .period = 32MHz / 32 / 1000 = 1KHz */
struct bflb_pwm_v1_channel_config_s cfg = {
@ -56,7 +56,7 @@ int main(void)
bflb_pwm_v1_channel_set_threshold(pwm, i, 100, 500 + i * 100); /* duty = ((500 + i *100)-100)/1000 */
bflb_pwm_v1_int_enable(pwm, i, true);
bflb_irq_attach(pwm->irq_num, pwm_isr, pwm);
bflb_irq_attach(pwm->irq_num, pwm_isr, NULL);
bflb_irq_enable(pwm->irq_num);
bflb_pwm_v1_feature_control(pwm, i, PWM_CMD_SET_REPT_COUNT, REPT_CNT);
bflb_pwm_v1_start(pwm, i);

36
examples/peripherals/pwm_v2/pwm_all_channels/main.c
View file

@ -2,14 +2,14 @@
#include "bflb_pwm_v2.h"
#include "board.h"
struct bflb_device_s *pwm0;
struct bflb_device_s *pwm;
int main(void)
{
board_init();
board_pwm0_gpio_init();
board_pwm_gpio_init();
pwm0 = bflb_device_get_by_name("pwm0");
pwm = bflb_device_get_by_name("pwm_v2_0");
/* period = .PBCLK / .clk_div / .period = 80MHz / 80 / 1000 = 1KHz */
struct bflb_pwm_v2_config_s cfg = {
@ -18,23 +18,23 @@ int main(void)
.period = 1000,
};
bflb_pwm_v2_init(pwm0, &cfg);
bflb_pwm_v2_channel_set_threshold(pwm0, PWM_CH0, 100, 500); /* duty = (500-100)/1000 = 40% */
bflb_pwm_v2_channel_set_threshold(pwm0, PWM_CH1, 200, 400); /* duty = (400-200)/1000 = 20% */
bflb_pwm_v2_channel_set_threshold(pwm0, PWM_CH2, 100, 999); /* duty = (999-100)/1000 = 89.9% */
bflb_pwm_v2_channel_set_threshold(pwm0, PWM_CH3, 0, 500); /* duty = (500-0)/1000 = 50% */
bflb_pwm_v2_channel_positive_start(pwm0, PWM_CH0);
bflb_pwm_v2_channel_negative_start(pwm0, PWM_CH0);
bflb_pwm_v2_channel_positive_start(pwm0, PWM_CH1);
bflb_pwm_v2_channel_negative_start(pwm0, PWM_CH1);
bflb_pwm_v2_channel_positive_start(pwm0, PWM_CH2);
bflb_pwm_v2_channel_negative_start(pwm0, PWM_CH2);
bflb_pwm_v2_channel_positive_start(pwm0, PWM_CH3);
bflb_pwm_v2_channel_negative_start(pwm0, PWM_CH3);
bflb_pwm_v2_start(pwm0);
bflb_pwm_v2_init(pwm, &cfg);
bflb_pwm_v2_channel_set_threshold(pwm, PWM_CH0, 100, 500); /* duty = (500-100)/1000 = 40% */
bflb_pwm_v2_channel_set_threshold(pwm, PWM_CH1, 200, 400); /* duty = (400-200)/1000 = 20% */
bflb_pwm_v2_channel_set_threshold(pwm, PWM_CH2, 100, 999); /* duty = (999-100)/1000 = 89.9% */
bflb_pwm_v2_channel_set_threshold(pwm, PWM_CH3, 0, 500); /* duty = (500-0)/1000 = 50% */
bflb_pwm_v2_channel_positive_start(pwm, PWM_CH0);
bflb_pwm_v2_channel_negative_start(pwm, PWM_CH0);
bflb_pwm_v2_channel_positive_start(pwm, PWM_CH1);
bflb_pwm_v2_channel_negative_start(pwm, PWM_CH1);
bflb_pwm_v2_channel_positive_start(pwm, PWM_CH2);
bflb_pwm_v2_channel_negative_start(pwm, PWM_CH2);
bflb_pwm_v2_channel_positive_start(pwm, PWM_CH3);
bflb_pwm_v2_channel_negative_start(pwm, PWM_CH3);
bflb_pwm_v2_start(pwm);
while (1) {
printf("pwm0 all_channel running\r\n");
printf("pwm all_channel running\r\n");
bflb_mtimer_delay_ms(2000);
}
}

16
examples/peripherals/pwm_v2/pwm_basic/main.c
View file

@ -2,14 +2,14 @@
#include "bflb_pwm_v2.h"
#include "board.h"
struct bflb_device_s *pwm0;
struct bflb_device_s *pwm;
int main(void)
{
board_init();
board_pwm0_gpio_init();
board_pwm_gpio_init();
pwm0 = bflb_device_get_by_name("pwm0");
pwm = bflb_device_get_by_name("pwm_v2_0");
/* period = .XCLK / .clk_div / .period = 40MHz / 40 / 1000 = 1KHz */
struct bflb_pwm_v2_config_s cfg = {
@ -18,13 +18,13 @@ int main(void)
.period = 1000,
};
bflb_pwm_v2_init(pwm0, &cfg);
bflb_pwm_v2_channel_set_threshold(pwm0, PWM_CH0, 100, 500); /* duty = (500-100)/1000 = 40% */
bflb_pwm_v2_channel_positive_start(pwm0, PWM_CH0);
bflb_pwm_v2_start(pwm0);
bflb_pwm_v2_init(pwm, &cfg);
bflb_pwm_v2_channel_set_threshold(pwm, PWM_CH0, 100, 500); /* duty = (500-100)/1000 = 40% */
bflb_pwm_v2_channel_positive_start(pwm, PWM_CH0);
bflb_pwm_v2_start(pwm);
while (1) {
printf("pwm0 basic running\r\n");
printf("pwm basic running\r\n");
bflb_mtimer_delay_ms(2000);
}
}

62
examples/peripherals/pwm_v2/pwm_config_channel/main.c
View file

@ -2,7 +2,7 @@
#include "bflb_pwm_v2.h"
#include "board.h"
struct bflb_device_s *pwm0;
struct bflb_device_s *pwm;
/* period = .32K_CLK / .clk_div / .period = 32768Hz / 32 / 1000 = 1.024Hz */
struct bflb_pwm_v2_config_s cfg = {
@ -51,41 +51,41 @@ struct bflb_pwm_v2_channel_config_s ch_cfg[PWM_V2_CH_MAX] = { {
int main(void)
{
board_init();
board_pwm0_gpio_init();
board_pwm_gpio_init();
pwm0 = bflb_device_get_by_name("pwm0");
pwm = bflb_device_get_by_name("pwm_v2_0");
bflb_pwm_v2_init(pwm0, &cfg);
bflb_pwm_v2_channel_set_threshold(pwm0, PWM_CH0, 0, 500); /* duty = (500-0)/1000 = 50% */
bflb_pwm_v2_channel_set_threshold(pwm0, PWM_CH1, 200, 400); /* duty = (400-200)/1000 = 20% */
bflb_pwm_v2_channel_set_threshold(pwm0, PWM_CH2, 99, 999); /* duty = (999-99)/1000 = 90% */
bflb_pwm_v2_channel_set_threshold(pwm0, PWM_CH3, 300, 900); /* duty = (900-300)/1000 = 60% */
bflb_pwm_v2_channel_init(pwm0, PWM_CH0, &ch_cfg[0]);
bflb_pwm_v2_channel_init(pwm0, PWM_CH1, &ch_cfg[1]);
bflb_pwm_v2_channel_init(pwm0, PWM_CH2, &ch_cfg[2]);
bflb_pwm_v2_channel_init(pwm0, PWM_CH3, &ch_cfg[3]);
printf("pwm0 config_channel running\r\n");
bflb_pwm_v2_channel_positive_start(pwm0, PWM_CH0);
bflb_pwm_v2_channel_negative_start(pwm0, PWM_CH0);
bflb_pwm_v2_channel_positive_start(pwm0, PWM_CH1);
bflb_pwm_v2_channel_negative_start(pwm0, PWM_CH1);
bflb_pwm_v2_channel_positive_start(pwm0, PWM_CH2);
bflb_pwm_v2_channel_negative_start(pwm0, PWM_CH2);
bflb_pwm_v2_channel_positive_start(pwm0, PWM_CH3);
bflb_pwm_v2_channel_negative_start(pwm0, PWM_CH3);
bflb_pwm_v2_start(pwm0);
bflb_pwm_v2_init(pwm, &cfg);
bflb_pwm_v2_channel_set_threshold(pwm, PWM_CH0, 0, 500); /* duty = (500-0)/1000 = 50% */
bflb_pwm_v2_channel_set_threshold(pwm, PWM_CH1, 200, 400); /* duty = (400-200)/1000 = 20% */
bflb_pwm_v2_channel_set_threshold(pwm, PWM_CH2, 99, 999); /* duty = (999-99)/1000 = 90% */
bflb_pwm_v2_channel_set_threshold(pwm, PWM_CH3, 300, 900); /* duty = (900-300)/1000 = 60% */
bflb_pwm_v2_channel_init(pwm, PWM_CH0, &ch_cfg[0]);
bflb_pwm_v2_channel_init(pwm, PWM_CH1, &ch_cfg[1]);
bflb_pwm_v2_channel_init(pwm, PWM_CH2, &ch_cfg[2]);
bflb_pwm_v2_channel_init(pwm, PWM_CH3, &ch_cfg[3]);
printf("pwm config_channel running\r\n");
bflb_pwm_v2_channel_positive_start(pwm, PWM_CH0);
bflb_pwm_v2_channel_negative_start(pwm, PWM_CH0);
bflb_pwm_v2_channel_positive_start(pwm, PWM_CH1);
bflb_pwm_v2_channel_negative_start(pwm, PWM_CH1);
bflb_pwm_v2_channel_positive_start(pwm, PWM_CH2);
bflb_pwm_v2_channel_negative_start(pwm, PWM_CH2);
bflb_pwm_v2_channel_positive_start(pwm, PWM_CH3);
bflb_pwm_v2_channel_negative_start(pwm, PWM_CH3);
bflb_pwm_v2_start(pwm);
bflb_mtimer_delay_ms(10 * 1000);
bflb_pwm_v2_channel_positive_stop(pwm0, PWM_CH0);
bflb_pwm_v2_channel_negative_stop(pwm0, PWM_CH0);
bflb_pwm_v2_channel_positive_stop(pwm0, PWM_CH1);
bflb_pwm_v2_channel_negative_stop(pwm0, PWM_CH1);
bflb_pwm_v2_channel_positive_stop(pwm0, PWM_CH2);
bflb_pwm_v2_channel_negative_stop(pwm0, PWM_CH2);
bflb_pwm_v2_channel_positive_stop(pwm0, PWM_CH3);
bflb_pwm_v2_channel_negative_stop(pwm0, PWM_CH3);
bflb_pwm_v2_channel_positive_stop(pwm, PWM_CH0);
bflb_pwm_v2_channel_negative_stop(pwm, PWM_CH0);
bflb_pwm_v2_channel_positive_stop(pwm, PWM_CH1);
bflb_pwm_v2_channel_negative_stop(pwm, PWM_CH1);
bflb_pwm_v2_channel_positive_stop(pwm, PWM_CH2);
bflb_pwm_v2_channel_negative_stop(pwm, PWM_CH2);
bflb_pwm_v2_channel_positive_stop(pwm, PWM_CH3);
bflb_pwm_v2_channel_negative_stop(pwm, PWM_CH3);
while (1) {
printf("pwm0 config_channel stop, please check wave\r\n");
printf("pwm config_channel stop, please check wave\r\n");
bflb_mtimer_delay_ms(2000);
}
}

38
examples/peripherals/pwm_v2/pwm_deadtime/main.c
View file

@ -2,7 +2,7 @@
#include "bflb_pwm_v2.h"
#include "board.h"
struct bflb_device_s *pwm0;
struct bflb_device_s *pwm;
uint8_t deadtime[PWM_V2_CH_MAX] = {
0x00 + 0, /* 0, bit[7:5]=0xx: dt = [7:0]*1, range(0~127), step(1) */
@ -14,9 +14,9 @@ uint8_t deadtime[PWM_V2_CH_MAX] = {
int main(void)
{
board_init();
board_pwm0_gpio_init();
board_pwm_gpio_init();
pwm0 = bflb_device_get_by_name("pwm0");
pwm = bflb_device_get_by_name("pwm_v2_0");
/* period = .PBCLK / .clk_div / .period = 80MHz / 40 / 2000 = 1KHz */
struct bflb_pwm_v2_config_s cfg = {
@ -35,31 +35,31 @@ int main(void)
.dead_time = 0,
};
bflb_pwm_v2_init(pwm0, &cfg);
bflb_pwm_v2_init(pwm, &cfg);
/* positive raise@(0+0) fall@1000, negative fall@0 raise@(1000+0) */
bflb_pwm_v2_channel_set_threshold(pwm0, PWM_CH0, 0, 1000);
bflb_pwm_v2_channel_set_threshold(pwm, PWM_CH0, 0, 1000);
/* positive raise@(0+200) fall@1000, negative fall@0 raise@(1000+200) */
bflb_pwm_v2_channel_set_threshold(pwm0, PWM_CH1, 0, 1000);
bflb_pwm_v2_channel_set_threshold(pwm, PWM_CH1, 0, 1000);
/* positive raise@(0+400) fall@1000, negative fall@0 raise@(1000+400) */
bflb_pwm_v2_channel_set_threshold(pwm0, PWM_CH2, 0, 1000);
bflb_pwm_v2_channel_set_threshold(pwm, PWM_CH2, 0, 1000);
/* positive raise@(0+800) fall@1000, negative fall@0 raise@(1000+800) */
bflb_pwm_v2_channel_set_threshold(pwm0, PWM_CH3, 0, 1000);
bflb_pwm_v2_channel_set_threshold(pwm, PWM_CH3, 0, 1000);
for (uint8_t ch = PWM_CH0; ch < PWM_V2_CH_MAX; ch++) {
ch_cfg.dead_time = deadtime[ch];
bflb_pwm_v2_channel_init(pwm0, ch, &ch_cfg);
bflb_pwm_v2_channel_init(pwm, ch, &ch_cfg);
}
bflb_pwm_v2_channel_positive_start(pwm0, PWM_CH0);
bflb_pwm_v2_channel_negative_start(pwm0, PWM_CH0);
bflb_pwm_v2_channel_positive_start(pwm0, PWM_CH1);
bflb_pwm_v2_channel_negative_start(pwm0, PWM_CH1);
bflb_pwm_v2_channel_positive_start(pwm0, PWM_CH2);
bflb_pwm_v2_channel_negative_start(pwm0, PWM_CH2);
bflb_pwm_v2_channel_positive_start(pwm0, PWM_CH3);
bflb_pwm_v2_channel_negative_start(pwm0, PWM_CH3);
bflb_pwm_v2_start(pwm0);
bflb_pwm_v2_channel_positive_start(pwm, PWM_CH0);
bflb_pwm_v2_channel_negative_start(pwm, PWM_CH0);
bflb_pwm_v2_channel_positive_start(pwm, PWM_CH1);
bflb_pwm_v2_channel_negative_start(pwm, PWM_CH1);
bflb_pwm_v2_channel_positive_start(pwm, PWM_CH2);
bflb_pwm_v2_channel_negative_start(pwm, PWM_CH2);
bflb_pwm_v2_channel_positive_start(pwm, PWM_CH3);
bflb_pwm_v2_channel_negative_start(pwm, PWM_CH3);
bflb_pwm_v2_start(pwm);
while (1) {
printf("pwm0 deadtime running\r\n");
printf("pwm deadtime running\r\n");
bflb_mtimer_delay_ms(2000);
}
}

54
examples/peripherals/pwm_v2/pwm_int/main.c
View file

@ -4,76 +4,76 @@
#define REPT_CNT 3
struct bflb_device_s *pwm0;
struct bflb_device_s *pwm;
void pwm_isr(int irq, void *arg)
{
uint32_t intstatus = bflb_pwm_v2_get_intstatus(pwm0);
uint32_t intstatus = bflb_pwm_v2_get_intstatus(pwm);
if (intstatus & PWM_INTSTS_CH0_L) {
bflb_pwm_v2_int_clear(pwm, PWM_INTCLR_CH0_L);
static int times = 0;
printf("CH0_L interrupt, %d times\r\n", ++times);
bflb_pwm_v2_int_clear(pwm0, PWM_INTCLR_CH0_L);
}
if (intstatus & PWM_INTSTS_CH0_H) {
bflb_pwm_v2_int_clear(pwm, PWM_INTSTS_CH0_H);
static int times = 0;
printf("CH0_H interrupt, %d times\r\n", ++times);
bflb_pwm_v2_int_clear(pwm0, PWM_INTSTS_CH0_H);
}
if (intstatus & PWM_INTSTS_CH1_L) {
bflb_pwm_v2_int_clear(pwm, PWM_INTCLR_CH1_L);
static int times = 0;
printf("CH1_L interrupt, %d times\r\n", ++times);
bflb_pwm_v2_int_clear(pwm0, PWM_INTCLR_CH1_L);
}
if (intstatus & PWM_INTSTS_CH1_H) {
bflb_pwm_v2_int_clear(pwm, PWM_INTCLR_CH1_H);
static int times = 0;
printf("CH1_H interrupt, %d times\r\n", ++times);
bflb_pwm_v2_int_clear(pwm0, PWM_INTCLR_CH1_H);
}
if (intstatus & PWM_INTSTS_CH2_L) {
bflb_pwm_v2_int_clear(pwm, PWM_INTCLR_CH2_L);
static int times = 0;
printf("CH2_L interrupt, %d times\r\n", ++times);
bflb_pwm_v2_int_clear(pwm0, PWM_INTCLR_CH2_L);
}
if (intstatus & PWM_INTSTS_CH2_H) {
bflb_pwm_v2_int_clear(pwm, PWM_INTCLR_CH2_H);
static int times = 0;
printf("CH2_H interrupt, %d times\r\n", ++times);
bflb_pwm_v2_int_clear(pwm0, PWM_INTCLR_CH2_H);
}
if (intstatus & PWM_INTSTS_CH3_L) {
bflb_pwm_v2_int_clear(pwm, PWM_INTCLR_CH3_L);
static int times = 0;
printf("CH3_L interrupt, %d times\r\n", ++times);
bflb_pwm_v2_int_clear(pwm0, PWM_INTCLR_CH3_L);
}
if (intstatus & PWM_INTSTS_CH3_H) {
bflb_pwm_v2_int_clear(pwm, PWM_INTCLR_CH3_H);
static int times = 0;
printf("CH3_H interrupt, %d times\r\n", ++times);
bflb_pwm_v2_int_clear(pwm0, PWM_INTCLR_CH3_H);
}
if (intstatus & PWM_INTSTS_PERIOD) {
bflb_pwm_v2_int_clear(pwm, PWM_INTSTS_PERIOD);
static int times = 0;
printf("period interrupt, %d times\r\n", ++times);
bflb_pwm_v2_int_clear(pwm0, PWM_INTSTS_PERIOD);
}
if (intstatus & PWM_INTSTS_BRAKE) {
bflb_pwm_v2_int_clear(pwm, PWM_INTSTS_BRAKE);
static int times = 0;
printf("brake interrupt, %d times\r\n", ++times);
bflb_pwm_v2_int_clear(pwm0, PWM_INTSTS_BRAKE);
}
if (intstatus & PWM_INTSTS_REPT) {
bflb_pwm_v2_int_clear(pwm, PWM_INTSTS_REPT);
static int times = 0;
printf("rept interrupt, %d times\r\n", ++times);
bflb_pwm_v2_stop(pwm0);
bflb_pwm_v2_int_clear(pwm0, PWM_INTSTS_REPT);
bflb_pwm_v2_stop(pwm);
}
}
int main(void)
{
board_init();
board_pwm0_gpio_init();
board_pwm_gpio_init();
pwm0 = bflb_device_get_by_name("pwm0");
pwm = bflb_device_get_by_name("pwm_v2_0");
/* period = .PBCLK / .clk_div / .period = 80MHz / 80 / 1000 = 1kHz */
struct bflb_pwm_v2_config_s cfg = {
@ -82,12 +82,12 @@ int main(void)
.period = 1000,
};
bflb_pwm_v2_init(pwm0, &cfg);
bflb_pwm_v2_channel_set_threshold(pwm0, PWM_CH0, 100, 700);
bflb_pwm_v2_channel_set_threshold(pwm0, PWM_CH1, 200, 300);
bflb_pwm_v2_channel_set_threshold(pwm0, PWM_CH2, 600, 800);
bflb_pwm_v2_channel_set_threshold(pwm0, PWM_CH3, 500, 900);
bflb_pwm_v2_int_enable(pwm0, PWM_INTEN_CH0_L | \
bflb_pwm_v2_init(pwm, &cfg);
bflb_pwm_v2_channel_set_threshold(pwm, PWM_CH0, 100, 700);
bflb_pwm_v2_channel_set_threshold(pwm, PWM_CH1, 200, 300);
bflb_pwm_v2_channel_set_threshold(pwm, PWM_CH2, 600, 800);
bflb_pwm_v2_channel_set_threshold(pwm, PWM_CH3, 500, 900);
bflb_pwm_v2_int_enable(pwm, PWM_INTEN_CH0_L | \
PWM_INTEN_CH0_H | \
PWM_INTEN_CH1_L | \
PWM_INTEN_CH1_H | \
@ -98,11 +98,11 @@ int main(void)
PWM_INTEN_PERIOD | \
PWM_INTEN_BRAKE | \
PWM_INTEN_REPT, true);
bflb_irq_attach(pwm0->irq_num, pwm_isr, pwm0);
bflb_irq_enable(pwm0->irq_num);
bflb_pwm_v2_feature_control(pwm0, PWM_CMD_SET_REPT_COUNT, REPT_CNT);
bflb_pwm_v2_feature_control(pwm0, PWM_CMD_SET_STOP_ON_REPT, true);
bflb_pwm_v2_start(pwm0);
bflb_irq_attach(pwm->irq_num, pwm_isr, NULL);
bflb_irq_enable(pwm->irq_num);
bflb_pwm_v2_feature_control(pwm, PWM_CMD_SET_REPT_COUNT, REPT_CNT);
bflb_pwm_v2_feature_control(pwm, PWM_CMD_SET_STOP_ON_REPT, true);
bflb_pwm_v2_start(pwm);
while (1) {
bflb_mtimer_delay_ms(2000);

3
examples/peripherals/spi/spi_dma/main.c
View file

@ -47,10 +47,11 @@ int main(void)
struct bflb_dma_channel_lli_transfer_s rx_transfers[1];
struct bflb_spi_config_s spi_cfg = {
.freq = 20 * 1000 * 1000,
#if (SPI_CASE_SELECT == SPI_MASTER_CASE)
.freq = 1 * 1000 * 1000,
.role = SPI_ROLE_MASTER,
#else
.freq = 32 * 1000 * 1000,
.role = SPI_ROLE_SLAVE,
#endif
.mode = SPI_MODE3,

9
examples/peripherals/spi/spi_int/CMakeLists.txt Normal file
View file

@ -0,0 +1,9 @@
cmake_minimum_required(VERSION 3.15)
include(proj.conf)
find_package(bouffalo_sdk REQUIRED HINTS $ENV{BL_SDK_BASE})
sdk_set_main_file(main.c)
project(spi_int)

13
examples/peripherals/spi/spi_int/Makefile Normal file
View file

@ -0,0 +1,13 @@
SDK_DEMO_PATH ?= .
BL_SDK_BASE ?= $(SDK_DEMO_PATH)/../../../..
export BL_SDK_BASE
CHIP ?= bl616
BOARD ?= bl616dk
CROSS_COMPILE ?= riscv64-unknown-elf-
# add custom cmake definition
#cmake_definition+=-Dxxx=sss
include $(BL_SDK_BASE)/project.build

244
examples/peripherals/spi/spi_int/main.c Normal file
View file

@ -0,0 +1,244 @@
#include "bflb_mtimer.h"
#include "bflb_spi.h"
#include "board.h"
#define SPI_MASTER_CASE 0
#define SPI_SLAVE_CASE 1
#define SPI_CASE_SELECT SPI_MASTER_CASE
#define BUFF_LEN (8 * 1024)
uint32_t tx_buff[BUFF_LEN / 4];
uint32_t rx_buff[BUFF_LEN / 4];
struct bflb_device_s *spi0;
/* poll test func */
int bflb_spi_poll_test(uint32_t data_width)
{
uint32_t data_mask;
uint32_t *p_tx = (uint32_t *)tx_buff;
uint32_t *p_rx = (uint32_t *)rx_buff;
switch (data_width) {
case SPI_DATA_WIDTH_8BIT:
data_mask = 0x000000FF;
break;
case SPI_DATA_WIDTH_16BIT:
data_mask = 0x0000FFFF;
break;
case SPI_DATA_WIDTH_24BIT:
data_mask = 0x00FFFFFF;
break;
case SPI_DATA_WIDTH_32BIT:
data_mask = 0xFFFFFFFF;
break;
default:
printf("data_width err\r\n");
return -1;
break;
}
/* data init */
for (uint16_t i = 0; i < BUFF_LEN / 4; i++) {
p_tx[i] = i;
p_rx[i] = 0;
}
/* set data width */
bflb_spi_feature_control(spi0, SPI_CMD_SET_DATA_WIDTH, data_width);
/* send data */
for (uint16_t i = 0; i < BUFF_LEN / 4; i++) {
p_rx[i] = bflb_spi_poll_send(spi0, p_tx[i]);
}
/* check data */
for (uint16_t i = 0; i < BUFF_LEN / 4; i++) {
if (p_rx[i] != (p_tx[i] & data_mask)) {
printf("data error, data[%d]:tx 0x%08lX, rx 0x%08lX\r\n", i, p_tx[i], p_rx[i]);
return -1;
}
}
printf("data check success\r\n");
return 0;
}
/* poll_exchange test func */
int bflb_spi_poll_exchange_test(uint32_t data_width)
{
void *p_tx = (uint32_t *)tx_buff;
void *p_rx = (uint32_t *)rx_buff;
/* data init */
switch (data_width) {
case SPI_DATA_WIDTH_8BIT:
for (uint16_t i = 0; i < BUFF_LEN; i++) {
((uint8_t *)p_tx)[i] = i;
((uint8_t *)p_rx)[i] = 0;
}
break;
case SPI_DATA_WIDTH_16BIT:
for (uint16_t i = 0; i < BUFF_LEN / 2; i++) {
((uint16_t *)p_tx)[i] = i << 0;
((uint16_t *)p_rx)[i] = 0;
}
break;
case SPI_DATA_WIDTH_24BIT:
for (uint16_t i = 0; i < BUFF_LEN / 4; i++) {
((uint32_t *)p_tx)[i] = ((i << 0) | i) & 0x00FFFFFF;
((uint32_t *)p_rx)[i] = 0;
}
break;
case SPI_DATA_WIDTH_32BIT:
for (uint16_t i = 0; i < BUFF_LEN / 4; i++) {
((uint32_t *)p_tx)[i] = (i << 0) | i;
((uint32_t *)p_rx)[i] = 0;
}
break;
default:
return -1;
break;
}
/* set data width */
bflb_spi_feature_control(spi0, SPI_CMD_SET_DATA_WIDTH, data_width);
/* send data */
printf("spi poll exchange width %ld, len %d\r\n", data_width, BUFF_LEN);
bflb_spi_poll_exchange(spi0, p_tx, p_rx, BUFF_LEN);
/* check data */
for (uint16_t i = 0; i < BUFF_LEN / 4; i++) {
if (((uint32_t *)p_rx)[i] != ((uint32_t *)p_tx)[i]) {
printf("data error, data[%d]:tx 0x%08lX, rx 0x%08lX\r\n", i, ((uint32_t *)p_tx)[i], ((uint32_t *)p_rx)[i]);
return -1;
}
}
printf("data check success\r\n");
return 0;
}
volatile uint32_t spi_tc_done_count = 0;
void spi_isr(int irq, void *arg)
{
uint32_t intstatus = bflb_spi_get_intstatus(spi0);
if (intstatus & SPI_INTSTS_TC) {
bflb_spi_int_clear(spi0, SPI_INTCLR_TC);
//printf("tc done\r\n");
spi_tc_done_count++;
}
}
int main(void)
{
board_init();
board_spi0_gpio_init();
struct bflb_spi_config_s spi_cfg = {
.freq = 20 * 1000 * 1000,
#if (SPI_CASE_SELECT == SPI_MASTER_CASE)
.role = SPI_ROLE_MASTER,
#else
.role = SPI_ROLE_SLAVE,
#endif
.mode = SPI_MODE3,
.data_width = SPI_DATA_WIDTH_8BIT,
.bit_order = SPI_BIT_MSB,
.byte_order = SPI_BYTE_LSB,
.tx_fifo_threshold = 0,
.rx_fifo_threshold = 0,
};
spi0 = bflb_device_get_by_name("spi0");
bflb_spi_init(spi0, &spi_cfg);
bflb_spi_tcint_mask(spi0, false);
bflb_irq_attach(spi0->irq_num, spi_isr, NULL);
bflb_irq_enable(spi0->irq_num);
bflb_spi_feature_control(spi0, SPI_CMD_SET_CS_INTERVAL, 0);
printf("\r\n************** spi poll send 8-bit test **************\r\n");
if (bflb_spi_poll_test(SPI_DATA_WIDTH_8BIT) < 0) {
printf("poll send 8-bit test error!!!\r\n");
} else {
printf("poll send 8-bit test success!\r\n");
}
printf("\r\n************** spi poll send 16-bit test **************\r\n");
if (bflb_spi_poll_test(SPI_DATA_WIDTH_16BIT) < 0) {
printf("poll send 16-bit test error!!!\r\n");
} else {
printf("poll send 16-bit test success!\r\n");
}
printf("\r\n************** spi poll send 24-bit test **************\r\n");
if (bflb_spi_poll_test(SPI_DATA_WIDTH_24BIT) < 0) {
printf("poll send 24-bit test error!!!\r\n");
} else {
printf("poll send 24-bit test success!\r\n");
}
printf("\r\n************** spi poll send 32-bit test **************\r\n");
if (bflb_spi_poll_test(SPI_DATA_WIDTH_32BIT) < 0) {
printf("poll send 32-bit test error!!!\r\n");
} else {
printf("poll send 32-bit test success!\r\n");
}
bflb_mtimer_delay_ms(10);
printf("\r\n************** spi poll exchange 8-bit test **************\r\n");
if (bflb_spi_poll_exchange_test(SPI_DATA_WIDTH_8BIT) < 0) {
printf("poll exchange 8-bit test error!!!\r\n");
} else {
printf("poll exchange 8-bit test success!\r\n");
}
printf("\r\n************** spi poll exchange 16-bit test **************\r\n");
if (bflb_spi_poll_exchange_test(SPI_DATA_WIDTH_16BIT) < 0) {
printf("poll exchange 16-bit test error!!!\r\n");
} else {
printf("poll exchange 16-bit test success!\r\n");
}
printf("\r\n************** spi poll exchange 24-bit test **************\r\n");
if (bflb_spi_poll_exchange_test(SPI_DATA_WIDTH_24BIT) < 0) {
printf("poll exchange 24-bit test error!!!\r\n");
} else {
printf("poll exchange 24-bit test success!\r\n");
}
printf("\r\n************** spi poll exchange 32-bit test **************\r\n");
if (bflb_spi_poll_exchange_test(SPI_DATA_WIDTH_32BIT) < 0) {
printf("poll exchange 32-bit test error!!!\r\n");
} else {
printf("poll exchange 32-bit test success!\r\n");
}
bflb_mtimer_delay_ms(10);
printf("\r\n************** spi poll exchange only send 32-bit test **************\r\n");
bflb_spi_poll_exchange(spi0, tx_buff, NULL, BUFF_LEN);
printf("poll exchange 32-bit only send test end!\r\n");
printf("\r\n************** spi poll exchange only receive 32-bit test **************\r\n");
bflb_spi_poll_exchange(spi0, NULL, rx_buff, BUFF_LEN);
printf("poll exchange 32-bit only receive test end!\r\n");
printf("\r\n************** spi poll exchange spare time clock 32-bit test **************\r\n");
bflb_spi_poll_exchange(spi0, NULL, NULL, BUFF_LEN);
printf("poll exchange 32-bit spare time clock test end!\r\n");
printf("\r\nspi test end\r\n");
printf("spi tc done count:%d\r\n", spi_tc_done_count);
while (1) {
}
}

1
examples/peripherals/spi/spi_int/proj.conf Normal file
View file

@ -0,0 +1 @@
#set(CONFIG_XXX 1)

46
examples/peripherals/spi/spi_poll/main.c
View file

@ -52,6 +52,9 @@ int bflb_spi_poll_test(uint32_t data_width)
/* send data */
for (uint16_t i = 0; i < BUFF_LEN / 4; i++) {
p_rx[i] = bflb_spi_poll_send(spi0, p_tx[i]);
#if (SPI_CASE_SELECT == SPI_MASTER_CASE)
bflb_mtimer_delay_us(10); /* delay for slave device prepare ok */
#endif
}
/* check data */
@ -129,10 +132,11 @@ int main(void)
board_spi0_gpio_init();
struct bflb_spi_config_s spi_cfg = {
.freq = 20 * 1000 * 1000,
#if (SPI_CASE_SELECT == SPI_MASTER_CASE)
.freq = 1 * 1000 * 1000,
.role = SPI_ROLE_MASTER,
#else
.freq = 32 * 1000 * 1000,
.role = SPI_ROLE_SLAVE,
#endif
.mode = SPI_MODE3,
@ -154,21 +158,27 @@ int main(void)
} else {
printf("poll send 8-bit test success!\r\n");
}
#if (SPI_CASE_SELECT == SPI_MASTER_CASE)
bflb_mtimer_delay_ms(1000); /* delay for slave device prepare ok */
#endif
printf("\r\n************** spi poll send 16-bit test **************\r\n");
if (bflb_spi_poll_test(SPI_DATA_WIDTH_16BIT) < 0) {
printf("poll send 16-bit test error!!!\r\n");
} else {
printf("poll send 16-bit test success!\r\n");
}
#if (SPI_CASE_SELECT == SPI_MASTER_CASE)
bflb_mtimer_delay_ms(1000); /* delay for slave device prepare ok */
#endif
printf("\r\n************** spi poll send 24-bit test **************\r\n");
if (bflb_spi_poll_test(SPI_DATA_WIDTH_24BIT) < 0) {
printf("poll send 24-bit test error!!!\r\n");
} else {
printf("poll send 24-bit test success!\r\n");
}
#if (SPI_CASE_SELECT == SPI_MASTER_CASE)
bflb_mtimer_delay_ms(1000); /* delay for slave device prepare ok */
#endif
printf("\r\n************** spi poll send 32-bit test **************\r\n");
if (bflb_spi_poll_test(SPI_DATA_WIDTH_32BIT) < 0) {
printf("poll send 32-bit test error!!!\r\n");
@ -176,7 +186,9 @@ int main(void)
printf("poll send 32-bit test success!\r\n");
}
bflb_mtimer_delay_ms(10);
#if (SPI_CASE_SELECT == SPI_MASTER_CASE)
bflb_mtimer_delay_ms(1000); /* delay for slave device prepare ok */
#endif
printf("\r\n************** spi poll exchange 8-bit test **************\r\n");
@ -185,21 +197,27 @@ int main(void)
} else {
printf("poll exchange 8-bit test success!\r\n");
}
#if (SPI_CASE_SELECT == SPI_MASTER_CASE)
bflb_mtimer_delay_ms(1000); /* delay for slave device prepare ok */
#endif
printf("\r\n************** spi poll exchange 16-bit test **************\r\n");
if (bflb_spi_poll_exchange_test(SPI_DATA_WIDTH_16BIT) < 0) {
printf("poll exchange 16-bit test error!!!\r\n");
} else {
printf("poll exchange 16-bit test success!\r\n");
}
#if (SPI_CASE_SELECT == SPI_MASTER_CASE)
bflb_mtimer_delay_ms(1000); /* delay for slave device prepare ok */
#endif
printf("\r\n************** spi poll exchange 24-bit test **************\r\n");
if (bflb_spi_poll_exchange_test(SPI_DATA_WIDTH_24BIT) < 0) {
printf("poll exchange 24-bit test error!!!\r\n");
} else {
printf("poll exchange 24-bit test success!\r\n");
}
#if (SPI_CASE_SELECT == SPI_MASTER_CASE)
bflb_mtimer_delay_ms(1000); /* delay for slave device prepare ok */
#endif
printf("\r\n************** spi poll exchange 32-bit test **************\r\n");
if (bflb_spi_poll_exchange_test(SPI_DATA_WIDTH_32BIT) < 0) {
printf("poll exchange 32-bit test error!!!\r\n");
@ -207,16 +225,22 @@ int main(void)
printf("poll exchange 32-bit test success!\r\n");
}
bflb_mtimer_delay_ms(10);
#if (SPI_CASE_SELECT == SPI_MASTER_CASE)
bflb_mtimer_delay_ms(1000); /* delay for slave device prepare ok */
#endif
printf("\r\n************** spi poll exchange only send 32-bit test **************\r\n");
bflb_spi_poll_exchange(spi0, tx_buff, NULL, BUFF_LEN);
printf("poll exchange 32-bit only send test end!\r\n");
#if (SPI_CASE_SELECT == SPI_MASTER_CASE)
bflb_mtimer_delay_ms(1000); /* delay for slave device prepare ok */
#endif
printf("\r\n************** spi poll exchange only receive 32-bit test **************\r\n");
bflb_spi_poll_exchange(spi0, NULL, rx_buff, BUFF_LEN);
printf("poll exchange 32-bit only receive test end!\r\n");
#if (SPI_CASE_SELECT == SPI_MASTER_CASE)
bflb_mtimer_delay_ms(1000); /* delay for slave device prepare ok */
#endif
printf("\r\n************** spi poll exchange spare time clock 32-bit test **************\r\n");
bflb_spi_poll_exchange(spi0, NULL, NULL, BUFF_LEN);
printf("poll exchange 32-bit spare time clock test end!\r\n");

9
examples/peripherals/timer/timer_clksource_check/CMakeLists.txt Normal file
View file

@ -0,0 +1,9 @@
cmake_minimum_required(VERSION 3.15)
include(proj.conf)
find_package(bouffalo_sdk REQUIRED HINTS $ENV{BL_SDK_BASE})
sdk_set_main_file(main.c)
project(timer_clksource_check)

13
examples/peripherals/timer/timer_clksource_check/Makefile Normal file
View file

@ -0,0 +1,13 @@
SDK_DEMO_PATH ?= .
BL_SDK_BASE ?= $(SDK_DEMO_PATH)/../../../..
export BL_SDK_BASE
CHIP ?= bl616
BOARD ?= bl616dk
CROSS_COMPILE ?= riscv64-unknown-elf-
# add custom cmake definition
#cmake_definition+=-Dxxx=sss
include $(BL_SDK_BASE)/project.build

80
examples/peripherals/timer/timer_clksource_check/main.c Normal file
View file

@ -0,0 +1,80 @@
#include "bflb_mtimer.h"
#include "bflb_timer.h"
#include "board.h"
#if !defined(BL702L)
uint8_t timer_clk_src_type[] = {
TIMER_CLKSRC_BCLK,
TIMER_CLKSRC_32K,
TIMER_CLKSRC_1K,
TIMER_CLKSRC_XTAL,
};
#else
uint8_t timer_clk_src_type[] = {
TIMER_CLKSRC_32K,
TIMER_CLKSRC_1K,
TIMER_CLKSRC_XTAL,
};
#endif
int main(void)
{
uint32_t i = 0;
uint32_t j = 0;
uint32_t cnt = 0;
board_init();
printf("Timer clksource check\n");
struct bflb_device_s *timer0;
timer0 = bflb_device_get_by_name("timer0");
/* timer clk = clock_source/(div + 1)*/
struct bflb_timer_config_s cfg;
cfg.counter_mode = TIMER_COUNTER_MODE_PROLOAD;
cfg.clock_source = TIMER_CLKSRC_NO;
cfg.clock_div = 9;
cfg.trigger_comp_id = TIMER_COMP_ID_0;
cfg.comp0_val = 0xFFFFFFFF;
cfg.comp1_val = 0xFFFFFFFF;
cfg.comp2_val = 0xFFFFFFFF;
cfg.preload_val = 0;
for (i = 0; i < sizeof(timer_clk_src_type) / sizeof(timer_clk_src_type[0]); i++) {
cnt = 0;
if (timer_clk_src_type[i] == TIMER_CLKSRC_XTAL) {
printf("Timer Src Clk is XTAL\r\n");
} else if (timer_clk_src_type[i] == TIMER_CLKSRC_32K) {
printf("Timer Src Clk is 32K\r\n");
} else if (timer_clk_src_type[i] == TIMER_CLKSRC_1K) {
printf("Timer Src Clk is 1K\r\n");
}
#if !defined(BL702L)
else if (timer_clk_src_type[i] == TIMER_CLKSRC_BCLK) {
printf("Timer Src Clk is BCLK\r\n");
}
#endif
else {
printf("Other clock, not test.\r\n");
continue;
}
cfg.clock_source = timer_clk_src_type[i];
bflb_timer_init(timer0, &cfg);
for (j = 0; j < 10; j++) {
bflb_timer_start(timer0);
bflb_mtimer_delay_ms(1000);
cnt = bflb_timer_get_countervalue(timer0);
bflb_timer_stop(timer0);
bflb_mtimer_delay_ms(10);
printf("delay 1000ms, Test %lu times, cnt: %lu\r\n", j, cnt);
}
bflb_timer_deinit(timer0);
}
printf("case success.\r\n");
while (1) {
bflb_mtimer_delay_ms(1500);
}
}

1
examples/peripherals/timer/timer_clksource_check/proj.conf Normal file
View file

@ -0,0 +1 @@
#set(CONFIG_XXX 1)

16
examples/peripherals/timer/timer_int/main.c
View file

@ -10,18 +10,18 @@ void timer0_isr(int irq, void *arg)
{
bool status = bflb_timer_get_compint_status(timer0, TIMER_COMP_ID_0);
if (status) {
printf("timer0 comp0 trigger\r\n");
bflb_timer_compint_clear(timer0, TIMER_COMP_ID_0);
printf("timer0 comp0 trigger\r\n");
}
status = bflb_timer_get_compint_status(timer0, TIMER_COMP_ID_1);
if (status) {
printf("timer0 comp1 trigger\r\n");
bflb_timer_compint_clear(timer0, TIMER_COMP_ID_1);
printf("timer0 comp1 trigger\r\n");
}
status = bflb_timer_get_compint_status(timer0, TIMER_COMP_ID_2);
if (status) {
printf("timer0 comp2 trigger\r\n");
bflb_timer_compint_clear(timer0, TIMER_COMP_ID_2);
printf("timer0 comp2 trigger\r\n");
}
}
@ -29,18 +29,18 @@ void timer1_isr(int irq, void *arg)
{
bool status = bflb_timer_get_compint_status(timer1, TIMER_COMP_ID_0);
if (status) {
printf("timer1 comp0 trigger\r\n");
bflb_timer_compint_clear(timer1, TIMER_COMP_ID_0);
printf("timer1 comp0 trigger\r\n");
}
status = bflb_timer_get_compint_status(timer1, TIMER_COMP_ID_1);
if (status) {
printf("timer1 comp1 trigger\r\n");
bflb_timer_compint_clear(timer1, TIMER_COMP_ID_1);
printf("timer1 comp1 trigger\r\n");
}
status = bflb_timer_get_compint_status(timer1, TIMER_COMP_ID_2);
if (status) {
printf("timer1 comp2 trigger\r\n");
bflb_timer_compint_clear(timer1, TIMER_COMP_ID_2);
printf("timer1 comp2 trigger\r\n");
}
}
@ -77,8 +77,8 @@ int main(void)
bflb_timer_init(timer0, &cfg0);
bflb_timer_init(timer1, &cfg1);
bflb_irq_attach(timer0->irq_num, timer0_isr, timer0);
bflb_irq_attach(timer1->irq_num, timer1_isr, timer1);
bflb_irq_attach(timer0->irq_num, timer0_isr, NULL);
bflb_irq_attach(timer1->irq_num, timer1_isr, NULL);
bflb_irq_enable(timer0->irq_num);
bflb_irq_enable(timer1->irq_num);

32
examples/peripherals/uart/uart_auto_baudrate/main.c
View file

@ -1,37 +1,37 @@
#include "bflb_mtimer.h"
#include "bflb_uart.h"
#include "bflb_clock.h"
#include "board.h"
#include "bl616_hbn.h"
struct bflb_device_s *uart1;
struct bflb_device_s *uartx;
void uart_isr(int irq, void *arg)
{
uint32_t intstatus = bflb_uart_get_intstatus(uart1);
uint32_t intstatus = bflb_uart_get_intstatus(uartx);
int ret;
uint32_t baudrate;
if (intstatus & UART_INTSTS_RX_AD5) {
ret = bflb_uart_feature_control(uart1, UART_CMD_GET_AUTO_BAUD, UART_AUTO_BAUD_0X55);
baudrate = 40000000 / (ret + 1);
bflb_uart_int_clear(uartx, UART_INTCLR_RX_AD5);
ret = bflb_uart_feature_control(uartx, UART_CMD_GET_AUTO_BAUD, UART_AUTO_BAUD_0X55);
baudrate = bflb_clk_get_peripheral_clock(BFLB_DEVICE_TYPE_UART, uartx->idx) / (ret + 1);
printf("Detected baudrate by 0x55 is %d\r\n", baudrate);
}
bflb_uart_int_clear(uart1, UART_INTCLR_RX_AD5);
if (intstatus & UART_INTSTS_RX_ADS) {
ret = bflb_uart_feature_control(uart1, UART_CMD_GET_AUTO_BAUD, UART_AUTO_BAUD_START);
baudrate = 40000000 / (ret + 1);
bflb_uart_int_clear(uartx, UART_INTCLR_RX_ADS);
ret = bflb_uart_feature_control(uartx, UART_CMD_GET_AUTO_BAUD, UART_AUTO_BAUD_START);
baudrate = bflb_clk_get_peripheral_clock(BFLB_DEVICE_TYPE_UART, uartx->idx) / (ret + 1);
printf("Detected baudrate by startbit is %d\r\n", baudrate);
}
bflb_uart_int_clear(uart1, UART_INTCLR_RX_ADS);
}
int main(void)
{
board_init();
board_uart1_gpio_init();
board_uartx_gpio_init();
uart1 = bflb_device_get_by_name("uart1");
uartx = bflb_device_get_by_name(DEFAULT_TEST_UART);
struct bflb_uart_config_s cfg;
@ -42,13 +42,13 @@ int main(void)
cfg.flow_ctrl = 0;
cfg.tx_fifo_threshold = 7;
cfg.rx_fifo_threshold = 7;
bflb_uart_init(uart1, &cfg);
bflb_uart_init(uartx, &cfg);
bflb_uart_feature_control(uart1, UART_CMD_SET_AUTO_BAUD, 1);
bflb_uart_feature_control(uart1, UART_CMD_SET_ABR_ALLOWABLE_ERROR, 3);
bflb_uart_feature_control(uartx, UART_CMD_SET_AUTO_BAUD, 1);
bflb_uart_feature_control(uartx, UART_CMD_SET_ABR_ALLOWABLE_ERROR, 3);
bflb_irq_attach(uart1->irq_num, uart_isr, uart1);
bflb_irq_enable(uart1->irq_num);
bflb_irq_attach(uartx->irq_num, uart_isr, NULL);
bflb_irq_enable(uartx->irq_num);
while (1) {
}

32
examples/peripherals/uart/uart_cts_rts/main.c
View file

@ -2,34 +2,34 @@
#include "bflb_uart.h"
#include "board.h"
struct bflb_device_s *uart1;
struct bflb_device_s *uartx;
void uart_isr(int irq, void *arg)
{
uint32_t intstatus = bflb_uart_get_intstatus(uart1);
uint32_t intstatus = bflb_uart_get_intstatus(uartx);
if (intstatus & UART_INTSTS_RX_FIFO) {
while (bflb_uart_rxavailable(uart1)) {
while (bflb_uart_rxavailable(uartx)) {
printf("enter rx fifo interrupt");
printf("0x%02x\r\n", bflb_uart_getchar(uart1));
printf("0x%02x\r\n", bflb_uart_getchar(uartx));
}
bflb_uart_feature_control(uart1, UART_CMD_SET_RTS_VALUE, 1);
bflb_uart_feature_control(uartx, UART_CMD_SET_RTS_VALUE, 1);
}
if (intstatus & UART_INTSTS_RTO) {
while (bflb_uart_rxavailable(uart1)) {
bflb_uart_int_clear(uartx, UART_INTCLR_RTO);
while (bflb_uart_rxavailable(uartx)) {
printf("enter rto interrupt");
printf("0x%02x\r\n", bflb_uart_getchar(uart1));
printf("0x%02x\r\n", bflb_uart_getchar(uartx));
}
bflb_uart_int_clear(uart1, UART_INTCLR_RTO);
}
}
int main(void)
{
board_init();
board_uart1_gpio_init();
board_uartx_gpio_init();
uart1 = bflb_device_get_by_name("uart1");
uartx = bflb_device_get_by_name(DEFAULT_TEST_UART);
struct bflb_uart_config_s cfg;
@ -40,14 +40,14 @@ int main(void)
cfg.flow_ctrl = 0;
cfg.tx_fifo_threshold = 7;
cfg.rx_fifo_threshold = 7;
bflb_uart_init(uart1, &cfg);
bflb_uart_init(uartx, &cfg);
bflb_uart_rxint_mask(uart1, false);
bflb_irq_attach(uart1->irq_num, uart_isr, uart1);
bflb_irq_enable(uart1->irq_num);
bflb_uart_rxint_mask(uartx, false);
bflb_irq_attach(uartx->irq_num, uart_isr, NULL);
bflb_irq_enable(uartx->irq_num);
bflb_uart_feature_control(uart1, UART_CMD_SET_SW_RTS_CONTROL, true);
bflb_uart_feature_control(uart1, UART_CMD_SET_RTS_VALUE, 0);
bflb_uart_feature_control(uartx, UART_CMD_SET_SW_RTS_CONTROL, true);
bflb_uart_feature_control(uartx, UART_CMD_SET_RTS_VALUE, 0);
while (1) {
bflb_mtimer_delay_ms(2000);
}

24
examples/peripherals/uart/uart_dma/main.c
View file

@ -4,7 +4,7 @@
#include "bflb_l1c.h"
#include "board.h"
struct bflb_device_s *uart1;
struct bflb_device_s *uartx;
struct bflb_device_s *dma0_ch0;
struct bflb_device_s *dma0_ch1;
@ -45,10 +45,10 @@ void sram_init()
int main(void)
{
board_init();
board_uart1_gpio_init();
board_uartx_gpio_init();
sram_init();
uart1 = bflb_device_get_by_name("uart1");
uartx = bflb_device_get_by_name(DEFAULT_TEST_UART);
struct bflb_uart_config_s cfg;
@ -59,9 +59,9 @@ int main(void)
cfg.flow_ctrl = 0;
cfg.tx_fifo_threshold = 7;
cfg.rx_fifo_threshold = 0;
bflb_uart_init(uart1, &cfg);
bflb_uart_link_txdma(uart1, true);
bflb_uart_link_rxdma(uart1, true);
bflb_uart_init(uartx, &cfg);
bflb_uart_link_txdma(uartx, true);
bflb_uart_link_rxdma(uartx, true);
dma0_ch0 = bflb_device_get_by_name("dma0_ch0");
dma0_ch1 = bflb_device_get_by_name("dma0_ch1");
@ -70,7 +70,7 @@ int main(void)
config.direction = DMA_MEMORY_TO_PERIPH;
config.src_req = DMA_REQUEST_NONE;
config.dst_req = DMA_REQUEST_UART1_TX;
config.dst_req = DEFAULT_TEST_UART_DMA_TX_REQUEST;
config.src_addr_inc = DMA_ADDR_INCREMENT_ENABLE;
config.dst_addr_inc = DMA_ADDR_INCREMENT_DISABLE;
config.src_burst_count = DMA_BURST_INCR1;
@ -82,7 +82,7 @@ int main(void)
struct bflb_dma_channel_config_s rxconfig;
rxconfig.direction = DMA_PERIPH_TO_MEMORY;
rxconfig.src_req = DMA_REQUEST_UART1_RX;
rxconfig.src_req = DEFAULT_TEST_UART_DMA_RX_REQUEST;
rxconfig.dst_req = DMA_REQUEST_NONE;
rxconfig.src_addr_inc = DMA_ADDR_INCREMENT_DISABLE;
rxconfig.dst_addr_inc = DMA_ADDR_INCREMENT_ENABLE;
@ -99,20 +99,20 @@ int main(void)
struct bflb_dma_channel_lli_transfer_s tx_transfers[3];
tx_transfers[0].src_addr = (uint32_t)src_buffer;
tx_transfers[0].dst_addr = (uint32_t)DMA_ADDR_UART1_TDR;
tx_transfers[0].dst_addr = (uint32_t)DEFAULT_TEST_UART_DMA_TDR;
tx_transfers[0].nbytes = 4100;
tx_transfers[1].src_addr = (uint32_t)src2_buffer;
tx_transfers[1].dst_addr = (uint32_t)DMA_ADDR_UART1_TDR;
tx_transfers[1].dst_addr = (uint32_t)DEFAULT_TEST_UART_DMA_TDR;
tx_transfers[1].nbytes = 4100;
tx_transfers[2].src_addr = (uint32_t)src3_buffer;
tx_transfers[2].dst_addr = (uint32_t)DMA_ADDR_UART1_TDR;
tx_transfers[2].dst_addr = (uint32_t)DEFAULT_TEST_UART_DMA_TDR;
tx_transfers[2].nbytes = 4100;
struct bflb_dma_channel_lli_pool_s rx_llipool[20];
struct bflb_dma_channel_lli_transfer_s rx_transfers[1];
rx_transfers[0].src_addr = (uint32_t)DMA_ADDR_UART1_RDR;
rx_transfers[0].src_addr = (uint32_t)DEFAULT_TEST_UART_DMA_RDR;
rx_transfers[0].dst_addr = (uint32_t)receive_buffer;
rx_transfers[0].nbytes = 50;

22
examples/peripherals/uart/uart_error_interrupt/main.c
View file

@ -2,27 +2,27 @@
#include "bflb_uart.h"
#include "board.h"
struct bflb_device_s *uart1;
struct bflb_device_s *uartx;
static uint8_t pce_int_flag = 0;
void uart_isr(int irq, void *arg)
{
uint32_t intstatus = bflb_uart_get_intstatus(uart1);
uint32_t intstatus = bflb_uart_get_intstatus(uartx);
if (intstatus & UART_INTSTS_PCE) {
bflb_uart_int_clear(uartx, UART_INTCLR_PCE);
pce_int_flag++;
printf("Enter Parity int\r\n");
}
bflb_uart_int_clear(uart1, UART_INTCLR_PCE);
}
int main(void)
{
board_init();
board_uart1_gpio_init();
board_uartx_gpio_init();
uart1 = bflb_device_get_by_name("uart1");
uartx = bflb_device_get_by_name(DEFAULT_TEST_UART);
struct bflb_uart_config_s cfg;
@ -33,17 +33,17 @@ int main(void)
cfg.flow_ctrl = 0;
cfg.tx_fifo_threshold = 7;
cfg.rx_fifo_threshold = 7;
bflb_uart_init(uart1, &cfg);
bflb_uart_init(uartx, &cfg);
bflb_uart_errint_mask(uart1, false);
bflb_irq_attach(uart1->irq_num, uart_isr, uart1);
bflb_irq_enable(uart1->irq_num);
bflb_uart_errint_mask(uartx, false);
bflb_irq_attach(uartx->irq_num, uart_isr, NULL);
bflb_irq_enable(uartx->irq_num);
int ch;
while (1) {
ch = bflb_uart_getchar(uart1);
ch = bflb_uart_getchar(uartx);
if (ch != -1) {
bflb_uart_putchar(uart1, ch);
bflb_uart_putchar(uartx, ch);
}
if(pce_int_flag){
pce_int_flag = 0;

22
examples/peripherals/uart/uart_feature_control/main.c
View file

@ -2,14 +2,14 @@
#include "bflb_uart.h"
#include "board.h"
struct bflb_device_s *uart1;
struct bflb_device_s *uartx;
int main(void)
{
board_init();
board_uart1_gpio_init();
board_uartx_gpio_init();
uart1 = bflb_device_get_by_name("uart1");
uartx = bflb_device_get_by_name(DEFAULT_TEST_UART);
struct bflb_uart_config_s cfg;
@ -20,18 +20,18 @@ int main(void)
cfg.flow_ctrl = 0;
cfg.tx_fifo_threshold = 7;
cfg.rx_fifo_threshold = 7;
bflb_uart_init(uart1, &cfg);
bflb_uart_feature_control(uart1, UART_CMD_SET_BAUD_RATE, 2000000);
bflb_uart_feature_control(uart1, UART_CMD_SET_DATA_BITS, UART_DATA_BITS_8);
bflb_uart_feature_control(uart1, UART_CMD_SET_STOP_BITS, UART_STOP_BITS_1);
bflb_uart_feature_control(uart1, UART_CMD_SET_PARITY_BITS, UART_PARITY_EVEN);
bflb_uart_init(uartx, &cfg);
bflb_uart_feature_control(uartx, UART_CMD_SET_BAUD_RATE, 2000000);
bflb_uart_feature_control(uartx, UART_CMD_SET_DATA_BITS, UART_DATA_BITS_8);
bflb_uart_feature_control(uartx, UART_CMD_SET_STOP_BITS, UART_STOP_BITS_1);
bflb_uart_feature_control(uartx, UART_CMD_SET_PARITY_BITS, UART_PARITY_EVEN);
int ch;
while (1) {
ch = bflb_uart_getchar(uart1);
ch = bflb_uart_getchar(uartx);
if (ch != -1) {
bflb_uart_putchar(uart1, ch);
bflb_uart_putchar(uartx, ch);
}
}
}

32
examples/peripherals/uart/uart_fifo_interrupt/main.c
View file

@ -2,33 +2,33 @@
#include "bflb_uart.h"
#include "board.h"
struct bflb_device_s *uart1;
struct bflb_device_s *uartx;
static uint8_t uart_txbuf[128] = {0};
void uart_isr(int irq, void *arg)
{
uint32_t intstatus = bflb_uart_get_intstatus(uart1);
uint32_t intstatus = bflb_uart_get_intstatus(uartx);
if (intstatus & UART_INTSTS_RX_FIFO) {
while (bflb_uart_rxavailable(uart1)) {
while (bflb_uart_rxavailable(uartx)) {
printf("enter rx fifo interrupt");
printf("0x%02x\r\n", bflb_uart_getchar(uart1));
printf("0x%02x\r\n", bflb_uart_getchar(uartx));
}
}
if (intstatus & UART_INTSTS_RTO) {
while (bflb_uart_rxavailable(uart1)) {
bflb_uart_int_clear(uartx, UART_INTCLR_RTO);
while (bflb_uart_rxavailable(uartx)) {
printf("enter rto interrupt");
printf("0x%02x\r\n", bflb_uart_getchar(uart1));
printf("0x%02x\r\n", bflb_uart_getchar(uartx));
}
bflb_uart_int_clear(uart1, UART_INTCLR_RTO);
}
if (intstatus & UART_INTSTS_TX_FIFO) {
for (uint8_t i = 0; i < 27; i++)
{
bflb_uart_putchar(uart1,uart_txbuf[i]);
bflb_uart_putchar(uartx,uart_txbuf[i]);
}
bflb_uart_txint_mask(uart1, true);
bflb_uart_txint_mask(uartx, true);
printf("tx interrupt end");
}
}
@ -36,9 +36,9 @@ void uart_isr(int irq, void *arg)
int main(void)
{
board_init();
board_uart1_gpio_init();
board_uartx_gpio_init();
uart1 = bflb_device_get_by_name("uart1");
uartx = bflb_device_get_by_name("uart3");
for(uint8_t i=0; i < 128; i++)
{
@ -54,12 +54,12 @@ int main(void)
cfg.flow_ctrl = 0;
cfg.tx_fifo_threshold = 7;
cfg.rx_fifo_threshold = 7;
bflb_uart_init(uart1, &cfg);
//bflb_uart_init(uartx, &cfg);
bflb_uart_txint_mask(uart1, false);
bflb_uart_rxint_mask(uart1, false);
bflb_irq_attach(uart1->irq_num, uart_isr, uart1);
bflb_irq_enable(uart1->irq_num);
bflb_uart_txint_mask(uartx, false);
bflb_uart_rxint_mask(uartx, false);
bflb_irq_attach(uartx->irq_num, uart_isr, NULL);
bflb_irq_enable(uartx->irq_num);
while (1) {
bflb_mtimer_delay_ms(2000);

9
examples/peripherals/uart/uart_ir/CMakeLists.txt Normal file
View file

@ -0,0 +1,9 @@
cmake_minimum_required(VERSION 3.15)
include(proj.conf)
find_package(bouffalo_sdk REQUIRED HINTS $ENV{BL_SDK_BASE})
sdk_set_main_file(main.c)
project(uart_ir)

13
examples/peripherals/uart/uart_ir/Makefile Normal file
View file

@ -0,0 +1,13 @@
SDK_DEMO_PATH ?= .
BL_SDK_BASE ?= $(SDK_DEMO_PATH)/../../../..
export BL_SDK_BASE
CHIP ?= bl616
BOARD ?= bl616dk
CROSS_COMPILE ?= riscv64-unknown-elf-
# add custom cmake definition
#cmake_definition+=-Dxxx=sss
include $(BL_SDK_BASE)/project.build

57
examples/peripherals/uart/uart_ir/main.c Normal file
View file

@ -0,0 +1,57 @@
#include "bflb_mtimer.h"
#include "bflb_uart.h"
#include "board.h"
struct bflb_device_s *uartx;
static uint8_t uart_txbuf[128] = { 0 };
static uint8_t uart_rxbuf[128] = { 0 };
int main(void)
{
board_init();
board_uartx_gpio_init();
uartx = bflb_device_get_by_name("uartx");
for (uint8_t i = 0; i < 128; i++) {
uart_txbuf[i] = i;
uart_rxbuf[i] = 0;
}
struct bflb_uart_config_s cfg;
cfg.baudrate = 115200;
cfg.data_bits = UART_DATA_BITS_8;
cfg.stop_bits = UART_STOP_BITS_1;
cfg.parity = UART_PARITY_NONE;
cfg.flow_ctrl = 0;
cfg.tx_fifo_threshold = 7;
cfg.rx_fifo_threshold = 1;
bflb_uart_init(uartx, &cfg);
struct bflb_uart_ir_config_s ircfg;
ircfg.tx_en = 1;
ircfg.rx_en = 1;
ircfg.tx_inverse = 0;
ircfg.rx_inverse = 1;
ircfg.tx_pluse_start = 112;
ircfg.tx_pluse_stop = 159;
ircfg.rx_pluse_start = 111;
bflb_uart_feature_control(uartx, UART_CMD_IR_CONFIG, (size_t)&ircfg);
for (uint8_t i = 0; i < 128; i++) {
bflb_uart_putchar(uartx, uart_txbuf[i]);
while (bflb_uart_feature_control(uartx, UART_CMD_GET_RX_FIFO_CNT, 1) == 0) {
}
uart_rxbuf[i] = bflb_uart_getchar(uartx);
}
printf("All data arrived\r\n");
for (uint8_t j = 0; j < 128; j++) {
if (uart_txbuf[j] != uart_rxbuf[j]) {
printf("check fail, %d tx: %02x, rx: %02x\r\n", j, uart_txbuf[j], uart_rxbuf[j]);
}
}
}

1
examples/peripherals/uart/uart_ir/proj.conf Normal file
View file

@ -0,0 +1 @@
#set(CONFIG_XXX 1)

28
examples/peripherals/uart/uart_lin/main.c
View file

@ -2,28 +2,28 @@
#include "bflb_uart.h"
#include "board.h"
struct bflb_device_s *uart1;
struct bflb_device_s *uartx;
static uint8_t uart_txbuf[128] = { 0 };
static uint8_t lse_int_flag = 0;
void uart_isr(int irq, void *arg)
{
uint32_t intstatus = bflb_uart_get_intstatus(uart1);
uint32_t intstatus = bflb_uart_get_intstatus(uartx);
if (intstatus & UART_INTSTS_RX_LSE) {
bflb_uart_int_clear(uartx, UART_INTCLR_RX_LSE);
lse_int_flag++;
printf("enter rx lse interrupt");
}
bflb_uart_int_clear(uart1, UART_INTCLR_RX_LSE);
}
int main(void)
{
board_init();
board_uart1_gpio_init();
board_uartx_gpio_init();
uart1 = bflb_device_get_by_name("uart1");
uartx = bflb_device_get_by_name(DEFAULT_TEST_UART);
struct bflb_uart_config_s cfg;
@ -36,18 +36,18 @@ int main(void)
cfg.rx_fifo_threshold = 7;
bflb_uart_errint_mask(uart1, false);
bflb_irq_attach(uart1->irq_num, uart_isr, uart1);
bflb_irq_enable(uart1->irq_num);
bflb_uart_errint_mask(uartx, false);
bflb_irq_attach(uartx->irq_num, uart_isr, NULL);
bflb_irq_enable(uartx->irq_num);
bflb_uart_feature_control(uart1, UART_CMD_SET_BREAK_VALUE, 4);
bflb_uart_feature_control(uart1, UART_CMD_SET_TX_LIN_VALUE, 1);
bflb_uart_feature_control(uart1, UART_CMD_SET_RX_LIN_VALUE, 1);
bflb_uart_feature_control(uartx, UART_CMD_SET_BREAK_VALUE, 4);
bflb_uart_feature_control(uartx, UART_CMD_SET_TX_LIN_VALUE, 1);
bflb_uart_feature_control(uartx, UART_CMD_SET_RX_LIN_VALUE, 1);
bflb_uart_init(uart1, &cfg);
bflb_uart_init(uartx, &cfg);
bflb_uart_putchar(uart1, 0xff);
bflb_uart_putchar(uart1, 0x1);
bflb_uart_putchar(uartx, 0xff);
bflb_uart_putchar(uartx, 0x1);
while (1) {
if (lse_int_flag) {

12
examples/peripherals/uart/uart_poll/main.c
View file

@ -2,14 +2,14 @@
#include "bflb_uart.h"
#include "board.h"
struct bflb_device_s *uart1;
struct bflb_device_s *uartx;
int main(void)
{
board_init();
board_uart1_gpio_init();
board_uartx_gpio_init();
uart1 = bflb_device_get_by_name("uart1");
uartx = bflb_device_get_by_name(DEFAULT_TEST_UART);
struct bflb_uart_config_s cfg;
@ -20,13 +20,13 @@ int main(void)
cfg.flow_ctrl = 0;
cfg.tx_fifo_threshold = 7;
cfg.rx_fifo_threshold = 7;
bflb_uart_init(uart1, &cfg);
bflb_uart_init(uartx, &cfg);
int ch;
while (1) {
ch = bflb_uart_getchar(uart1);
ch = bflb_uart_getchar(uartx);
if (ch != -1) {
bflb_uart_putchar(uart1, ch);
bflb_uart_putchar(uartx, ch);
}
}
}

32
examples/peripherals/uart/uart_rs485/main.c
View file

@ -2,38 +2,38 @@
#include "bflb_uart.h"
#include "board.h"
struct bflb_device_s *uart1;
struct bflb_device_s *uartx;
static uint8_t uart_txbuf[128] = { 0 };
void uart_isr(int irq, void *arg)
{
uint32_t intstatus = bflb_uart_get_intstatus(uart1);
uint32_t intstatus = bflb_uart_get_intstatus(uartx);
if (intstatus & UART_INTSTS_RX_FIFO) {
while (bflb_uart_rxavailable(uart1)) {
while (bflb_uart_rxavailable(uartx)) {
printf("enter rx fifo interrupt");
printf("0x%02x\r\n", bflb_uart_getchar(uart1));
printf("0x%02x\r\n", bflb_uart_getchar(uartx));
}
}
if (intstatus & UART_INTSTS_RTO) {
while (bflb_uart_rxavailable(uart1)) {
bflb_uart_int_clear(uartx, UART_INTCLR_RTO);
while (bflb_uart_rxavailable(uartx)) {
printf("enter rto interrupt");
printf("0x%02x\r\n", bflb_uart_getchar(uart1));
printf("0x%02x\r\n", bflb_uart_getchar(uartx));
}
bflb_uart_int_clear(uart1, UART_INTCLR_RTO);
}
}
int main(void)
{
board_init();
board_uart1_gpio_init();
board_uartx_gpio_init();
for (uint8_t i = 0; i < 128; i++) {
uart_txbuf[i] = i;
}
uart1 = bflb_device_get_by_name("uart1");
uartx = bflb_device_get_by_name(DEFAULT_TEST_UART);
struct bflb_uart_config_s cfg;
@ -44,18 +44,18 @@ int main(void)
cfg.flow_ctrl = 0;
cfg.tx_fifo_threshold = 7;
cfg.rx_fifo_threshold = 7;
bflb_uart_init(uart1, &cfg);
bflb_uart_init(uartx, &cfg);
bflb_uart_feature_control(uart1, UART_CMD_SET_TX_RS485_EN, 1);
bflb_uart_feature_control(uart1, UART_CMD_SET_TX_RS485_POLARITY, 1);
bflb_uart_feature_control(uartx, UART_CMD_SET_TX_RS485_EN, 1);
bflb_uart_feature_control(uartx, UART_CMD_SET_TX_RS485_POLARITY, 1);
for (uint8_t i = 0; i < 128; i++) {
bflb_uart_putchar(uart1, uart_txbuf[i]);
bflb_uart_putchar(uartx, uart_txbuf[i]);
}
bflb_uart_rxint_mask(uart1, false);
bflb_irq_attach(uart1->irq_num, uart_isr, uart1);
bflb_irq_enable(uart1->irq_num);
bflb_uart_rxint_mask(uartx, false);
bflb_irq_attach(uartx->irq_num, uart_isr, NULL);
bflb_irq_enable(uartx->irq_num);
while (1) {
bflb_mtimer_delay_ms(2000);

2
examples/peripherals/adc/adc_oneshot_1ch_int/CMakeLists.txt → examples/peripherals/wdg/wdg_clksource_check/CMakeLists.txt
View file

@ -6,4 +6,4 @@ find_package(bouffalo_sdk REQUIRED HINTS $ENV{BL_SDK_BASE})
sdk_set_main_file(main.c)
project(adc_oneshot_1ch_int)
project(wdg_clksource_check)

13
examples/peripherals/wdg/wdg_clksource_check/Makefile Normal file
View file

@ -0,0 +1,13 @@
SDK_DEMO_PATH ?= .
BL_SDK_BASE ?= $(SDK_DEMO_PATH)/../../../..
export BL_SDK_BASE
CHIP ?= bl616
BOARD ?= bl616dk
CROSS_COMPILE ?= riscv64-unknown-elf-
# add custom cmake definition
#cmake_definition+=-Dxxx=sss
include $(BL_SDK_BASE)/project.build

80
examples/peripherals/wdg/wdg_clksource_check/main.c Normal file
View file

@ -0,0 +1,80 @@
#include "bflb_mtimer.h"
#include "bflb_wdg.h"
#include "board.h"
#if !defined(BL702L)
uint8_t wdg_clk_src_type[] = {
WDG_CLKSRC_BCLK,
WDG_CLKSRC_32K,
WDG_CLKSRC_1K,
WDG_CLKSRC_XTAL,
};
#else
uint8_t wdg_clk_src_type[] = {
WDG_CLKSRC_32K,
WDG_CLKSRC_1K,
WDG_CLKSRC_XTAL,
};
#endif
int main(void)
{
uint32_t i = 0;
uint32_t j = 0;
uint32_t cnt = 0;
board_init();
printf("Timer clksource check\n");
struct bflb_device_s *wdt;
wdt = bflb_device_get_by_name("watchdog");
/* watchdog clk = clock_source/(div + 1)*/
struct bflb_wdg_config_s cfg;
cfg.clock_source = WDG_CLKSRC_32K;
cfg.clock_div = 0;
cfg.comp_val = 0xffff;
cfg.mode = WDG_MODE_INTERRUPT;
for (i = 0; i < sizeof(wdg_clk_src_type) / sizeof(wdg_clk_src_type[0]); i++) {
cnt = 0;
if (wdg_clk_src_type[i] == WDG_CLKSRC_XTAL) {
printf("Watchdog Src Clk is XTAL\r\n");
cfg.clock_div = 199;
} else if (wdg_clk_src_type[i] == WDG_CLKSRC_32K) {
printf("Watchdog Src Clk is 32K\r\n");
cfg.clock_div = 1;
} else if (wdg_clk_src_type[i] == WDG_CLKSRC_1K) {
printf("Watchdog Src Clk is 1K\r\n");
cfg.clock_div = 1;
}
#if !defined(BL702L)
else if (wdg_clk_src_type[i] == WDG_CLKSRC_BCLK) {
printf("Watchdog Src Clk is BCLK\r\n");
cfg.clock_div = 199;
}
#endif
else {
printf("Other clock, not test.\r\n");
continue;
}
cfg.clock_source = wdg_clk_src_type[i];
bflb_wdg_init(wdt, &cfg);
for (j = 0; j < 10; j++) {
bflb_wdg_reset_countervalue(wdt);
bflb_wdg_start(wdt);
bflb_mtimer_delay_ms(200);
cnt = bflb_wdg_get_countervalue(wdt);
bflb_wdg_stop(wdt);
bflb_mtimer_delay_ms(10);
printf("Delay 200ms, div = %lu, test %lu times, cnt: %lu\r\n", cfg.clock_div + 1, j, cnt);
}
}
printf("case success.\r\n");
while (1) {
bflb_mtimer_delay_ms(1500);
}
}

1
examples/peripherals/wdg/wdg_clksource_check/proj.conf Normal file
View file

@ -0,0 +1 @@
#set(CONFIG_XXX 1)

2
examples/peripherals/wdg/wdg_int/main.c
View file

@ -7,8 +7,8 @@ static volatile uint8_t wdg_int_arrived = 0;
void wdg_isr(int irq, void *arg)
{
wdg_int_arrived = 1;
bflb_wdg_compint_clear(wdg);
wdg_int_arrived = 1;
}
int main(void)