[update] update lhal, soc and demos

* Add flash driver and init in boards.
* Add timeout for all poll wait apis
* Add 808 d0 startup to bringup
* Update lhal device tables
* Update demos

examples/peripherals/flash/flash_dma/CMakeLists.txt

@@ -0,0 +1,9 @@
+cmake_minimum_required(VERSION 3.15)
+
+include(proj.conf)
+
+find_package(bouffalo_sdk REQUIRED HINTS $ENV{BL_SDK_BASE})
+
+sdk_set_main_file(main.c)
+
+project(flash_dma)

examples/peripherals/flash/flash_dma/Makefile

@@ -0,0 +1,13 @@
+SDK_DEMO_PATH ?= .
+BL_SDK_BASE ?= $(SDK_DEMO_PATH)/../../../..
+
+export BL_SDK_BASE
+
+CHIP ?= bl616
+BOARD ?= bl616dk
+CROSS_COMPILE ?= riscv64-unknown-elf-
+
+# add custom cmake definition
+#cmake_definition+=-Dxxx=sss
+
+include $(BL_SDK_BASE)/project.build

examples/peripherals/flash/flash_dma/main.c

@@ -0,0 +1,147 @@
+#include "bflb_flash.h"
+#include "bflb_dma.h"
+#include "board.h"
+
+#define DMA_BUFFER_LENGTH     260
+#define DMA_FLASH_ADDR_OFFSET 0  /* 0 or 28 */
+
+static ATTR_NOCACHE_NOINIT_RAM_SECTION uint8_t dst_buffer[DMA_BUFFER_LENGTH];
+
+static uint8_t src_burst[] = {
+    DMA_BURST_INCR1,
+    DMA_BURST_INCR1,
+    DMA_BURST_INCR1,
+    DMA_BURST_INCR4,
+    DMA_BURST_INCR4,
+    DMA_BURST_INCR4,
+    DMA_BURST_INCR8,
+    DMA_BURST_INCR8,
+    DMA_BURST_INCR8,
+    DMA_BURST_INCR16,
+    DMA_BURST_INCR16,
+    DMA_BURST_INCR16,
+};
+
+static uint8_t dst_burst[] = {
+    DMA_BURST_INCR1,
+    DMA_BURST_INCR1,
+    DMA_BURST_INCR1,
+    DMA_BURST_INCR4,
+    DMA_BURST_INCR4,
+    DMA_BURST_INCR4,
+    DMA_BURST_INCR8,
+    DMA_BURST_INCR8,
+    DMA_BURST_INCR8,
+    DMA_BURST_INCR16,
+    DMA_BURST_INCR16,
+    DMA_BURST_INCR16,
+};
+
+static uint8_t src_width[] = {
+    DMA_DATA_WIDTH_8BIT,
+    DMA_DATA_WIDTH_16BIT,
+    DMA_DATA_WIDTH_32BIT,
+    DMA_DATA_WIDTH_8BIT,
+    DMA_DATA_WIDTH_16BIT,
+    DMA_DATA_WIDTH_32BIT,
+    DMA_DATA_WIDTH_8BIT,
+    DMA_DATA_WIDTH_16BIT,
+    DMA_DATA_WIDTH_32BIT,
+    DMA_DATA_WIDTH_8BIT,
+    DMA_DATA_WIDTH_16BIT,
+    DMA_DATA_WIDTH_32BIT,
+};
+
+static uint8_t dst_width[] = {
+    DMA_DATA_WIDTH_8BIT,
+    DMA_DATA_WIDTH_16BIT,
+    DMA_DATA_WIDTH_32BIT,
+    DMA_DATA_WIDTH_8BIT,
+    DMA_DATA_WIDTH_16BIT,
+    DMA_DATA_WIDTH_32BIT,
+    DMA_DATA_WIDTH_8BIT,
+    DMA_DATA_WIDTH_16BIT,
+    DMA_DATA_WIDTH_32BIT,
+    DMA_DATA_WIDTH_8BIT,
+    DMA_DATA_WIDTH_16BIT,
+    DMA_DATA_WIDTH_32BIT,
+};
+
+static uint8_t dma_tc_flag0 = 0;
+
+struct bflb_device_s *dma0_ch0;
+
+volatile uint64_t start_time;
+
+void dma0_ch0_isr(void *arg)
+{
+    printf("cost time:%d us\r\n", (uint32_t)(bflb_mtimer_get_time_us() - start_time));
+    dma_tc_flag0++;
+    printf("tc done\r\n");
+}
+
+int main(void)
+{
+    board_init();
+
+    uint8_t write_buf[DMA_BUFFER_LENGTH];
+
+    for (uint16_t i = 0; i < DMA_BUFFER_LENGTH; i++) {
+        write_buf[i] = (i & 0xff) + i / 256;
+    }
+
+    /* erase 0x00010000 4k flash */
+    bflb_flash_erase(0x00010000, 4096);
+
+    /* write 0x00010000 flash data */
+    bflb_flash_write(0x00010000, write_buf, sizeof(write_buf)); /* FLASH_XIP_BASE - 0x2000 + 0x00010000 */
+
+    dma0_ch0 = bflb_device_get_by_name("dma0_ch0");
+
+    struct bflb_dma_channel_config_s config;
+
+    for (uint8_t i = 0; i < sizeof(src_burst); i++) {
+        dma_tc_flag0 = 0;
+        memset(dst_buffer, 0, DMA_BUFFER_LENGTH);
+
+        config.direction = DMA_MEMORY_TO_MEMORY;
+        config.src_req = 0;
+        config.dst_req = 0;
+        config.src_addr_inc = DMA_ADDR_INCREMENT_ENABLE;
+        config.dst_addr_inc = DMA_ADDR_INCREMENT_ENABLE;
+        config.src_burst_count = src_burst[i];
+        config.dst_burst_count = dst_burst[i];
+        config.src_width = src_width[i];
+        config.dst_width = dst_width[i];
+        bflb_dma_channel_init(dma0_ch0, &config);
+
+        bflb_dma_channel_irq_attach(dma0_ch0, dma0_ch0_isr, NULL);
+
+        struct bflb_dma_channel_lli_pool_s lli[1]; /* max trasnfer size 4064 * 1 */
+        struct bflb_dma_channel_lli_transfer_s transfers[1];
+
+        transfers[0].src_addr = (uint32_t)(FLASH_XIP_BASE - 0x2000 + 0x00010000 + DMA_FLASH_ADDR_OFFSET);
+        transfers[0].dst_addr = (uint32_t)dst_buffer;
+        transfers[0].nbytes = DMA_BUFFER_LENGTH - DMA_FLASH_ADDR_OFFSET;
+
+        bflb_dma_channel_lli_reload(dma0_ch0, lli, 1, transfers, 1);
+
+        start_time = bflb_mtimer_get_time_us();
+        bflb_dma_channel_start(dma0_ch0);
+        while (dma_tc_flag0 != 1) {
+            bflb_mtimer_delay_ms(1);
+        }
+
+        for (uint16_t j = 0; j < (DMA_BUFFER_LENGTH - DMA_FLASH_ADDR_OFFSET); j++) {
+            if (dst_buffer[j] != write_buf[DMA_FLASH_ADDR_OFFSET + j]) {
+                printf("flash test fail at %d, expect:%d but with %d\r\n", i, write_buf[DMA_FLASH_ADDR_OFFSET + j], dst_buffer[j]);
+                while (1) {
+                }
+            }
+        }
+    }
+
+    printf("flash test success\r\n");
+    while (1) {
+    }
+}

examples/peripherals/flash/flash_dma/proj.conf

@@ -0,0 +1 @@
+#set(CONFIG_XXX 1)