[update] update lhal, soc and demos

* Add flash driver and init in boards.
* Add timeout for all poll wait apis
* Add 808 d0 startup to bringup
* Update lhal device tables
* Update demos
This commit is contained in:
jzlv 2022-11-18 16:26:34 +08:00
parent 9f241971e3
commit d6fab307bf
232 changed files with 26802 additions and 1471 deletions

View file

@ -1,37 +1,37 @@
#include "bflb_mtimer.h"
#include "bflb_uart.h"
#include "bflb_clock.h"
#include "board.h"
#include "bl616_hbn.h"
struct bflb_device_s *uart1;
struct bflb_device_s *uartx;
void uart_isr(int irq, void *arg)
{
uint32_t intstatus = bflb_uart_get_intstatus(uart1);
uint32_t intstatus = bflb_uart_get_intstatus(uartx);
int ret;
uint32_t baudrate;
if (intstatus & UART_INTSTS_RX_AD5) {
ret = bflb_uart_feature_control(uart1, UART_CMD_GET_AUTO_BAUD, UART_AUTO_BAUD_0X55);
baudrate = 40000000 / (ret + 1);
bflb_uart_int_clear(uartx, UART_INTCLR_RX_AD5);
ret = bflb_uart_feature_control(uartx, UART_CMD_GET_AUTO_BAUD, UART_AUTO_BAUD_0X55);
baudrate = bflb_clk_get_peripheral_clock(BFLB_DEVICE_TYPE_UART, uartx->idx) / (ret + 1);
printf("Detected baudrate by 0x55 is %d\r\n", baudrate);
}
bflb_uart_int_clear(uart1, UART_INTCLR_RX_AD5);
if (intstatus & UART_INTSTS_RX_ADS) {
ret = bflb_uart_feature_control(uart1, UART_CMD_GET_AUTO_BAUD, UART_AUTO_BAUD_START);
baudrate = 40000000 / (ret + 1);
bflb_uart_int_clear(uartx, UART_INTCLR_RX_ADS);
ret = bflb_uart_feature_control(uartx, UART_CMD_GET_AUTO_BAUD, UART_AUTO_BAUD_START);
baudrate = bflb_clk_get_peripheral_clock(BFLB_DEVICE_TYPE_UART, uartx->idx) / (ret + 1);
printf("Detected baudrate by startbit is %d\r\n", baudrate);
}
bflb_uart_int_clear(uart1, UART_INTCLR_RX_ADS);
}
int main(void)
{
board_init();
board_uart1_gpio_init();
board_uartx_gpio_init();
uart1 = bflb_device_get_by_name("uart1");
uartx = bflb_device_get_by_name(DEFAULT_TEST_UART);
struct bflb_uart_config_s cfg;
@ -42,13 +42,13 @@ int main(void)
cfg.flow_ctrl = 0;
cfg.tx_fifo_threshold = 7;
cfg.rx_fifo_threshold = 7;
bflb_uart_init(uart1, &cfg);
bflb_uart_init(uartx, &cfg);
bflb_uart_feature_control(uart1, UART_CMD_SET_AUTO_BAUD, 1);
bflb_uart_feature_control(uart1, UART_CMD_SET_ABR_ALLOWABLE_ERROR, 3);
bflb_uart_feature_control(uartx, UART_CMD_SET_AUTO_BAUD, 1);
bflb_uart_feature_control(uartx, UART_CMD_SET_ABR_ALLOWABLE_ERROR, 3);
bflb_irq_attach(uart1->irq_num, uart_isr, uart1);
bflb_irq_enable(uart1->irq_num);
bflb_irq_attach(uartx->irq_num, uart_isr, NULL);
bflb_irq_enable(uartx->irq_num);
while (1) {
}

View file

@ -2,34 +2,34 @@
#include "bflb_uart.h"
#include "board.h"
struct bflb_device_s *uart1;
struct bflb_device_s *uartx;
void uart_isr(int irq, void *arg)
{
uint32_t intstatus = bflb_uart_get_intstatus(uart1);
uint32_t intstatus = bflb_uart_get_intstatus(uartx);
if (intstatus & UART_INTSTS_RX_FIFO) {
while (bflb_uart_rxavailable(uart1)) {
while (bflb_uart_rxavailable(uartx)) {
printf("enter rx fifo interrupt");
printf("0x%02x\r\n", bflb_uart_getchar(uart1));
printf("0x%02x\r\n", bflb_uart_getchar(uartx));
}
bflb_uart_feature_control(uart1, UART_CMD_SET_RTS_VALUE, 1);
bflb_uart_feature_control(uartx, UART_CMD_SET_RTS_VALUE, 1);
}
if (intstatus & UART_INTSTS_RTO) {
while (bflb_uart_rxavailable(uart1)) {
bflb_uart_int_clear(uartx, UART_INTCLR_RTO);
while (bflb_uart_rxavailable(uartx)) {
printf("enter rto interrupt");
printf("0x%02x\r\n", bflb_uart_getchar(uart1));
printf("0x%02x\r\n", bflb_uart_getchar(uartx));
}
bflb_uart_int_clear(uart1, UART_INTCLR_RTO);
}
}
int main(void)
{
board_init();
board_uart1_gpio_init();
board_uartx_gpio_init();
uart1 = bflb_device_get_by_name("uart1");
uartx = bflb_device_get_by_name(DEFAULT_TEST_UART);
struct bflb_uart_config_s cfg;
@ -40,14 +40,14 @@ int main(void)
cfg.flow_ctrl = 0;
cfg.tx_fifo_threshold = 7;
cfg.rx_fifo_threshold = 7;
bflb_uart_init(uart1, &cfg);
bflb_uart_init(uartx, &cfg);
bflb_uart_rxint_mask(uart1, false);
bflb_irq_attach(uart1->irq_num, uart_isr, uart1);
bflb_irq_enable(uart1->irq_num);
bflb_uart_rxint_mask(uartx, false);
bflb_irq_attach(uartx->irq_num, uart_isr, NULL);
bflb_irq_enable(uartx->irq_num);
bflb_uart_feature_control(uart1, UART_CMD_SET_SW_RTS_CONTROL, true);
bflb_uart_feature_control(uart1, UART_CMD_SET_RTS_VALUE, 0);
bflb_uart_feature_control(uartx, UART_CMD_SET_SW_RTS_CONTROL, true);
bflb_uart_feature_control(uartx, UART_CMD_SET_RTS_VALUE, 0);
while (1) {
bflb_mtimer_delay_ms(2000);
}

View file

@ -4,7 +4,7 @@
#include "bflb_l1c.h"
#include "board.h"
struct bflb_device_s *uart1;
struct bflb_device_s *uartx;
struct bflb_device_s *dma0_ch0;
struct bflb_device_s *dma0_ch1;
@ -45,10 +45,10 @@ void sram_init()
int main(void)
{
board_init();
board_uart1_gpio_init();
board_uartx_gpio_init();
sram_init();
uart1 = bflb_device_get_by_name("uart1");
uartx = bflb_device_get_by_name(DEFAULT_TEST_UART);
struct bflb_uart_config_s cfg;
@ -59,9 +59,9 @@ int main(void)
cfg.flow_ctrl = 0;
cfg.tx_fifo_threshold = 7;
cfg.rx_fifo_threshold = 0;
bflb_uart_init(uart1, &cfg);
bflb_uart_link_txdma(uart1, true);
bflb_uart_link_rxdma(uart1, true);
bflb_uart_init(uartx, &cfg);
bflb_uart_link_txdma(uartx, true);
bflb_uart_link_rxdma(uartx, true);
dma0_ch0 = bflb_device_get_by_name("dma0_ch0");
dma0_ch1 = bflb_device_get_by_name("dma0_ch1");
@ -70,7 +70,7 @@ int main(void)
config.direction = DMA_MEMORY_TO_PERIPH;
config.src_req = DMA_REQUEST_NONE;
config.dst_req = DMA_REQUEST_UART1_TX;
config.dst_req = DEFAULT_TEST_UART_DMA_TX_REQUEST;
config.src_addr_inc = DMA_ADDR_INCREMENT_ENABLE;
config.dst_addr_inc = DMA_ADDR_INCREMENT_DISABLE;
config.src_burst_count = DMA_BURST_INCR1;
@ -82,7 +82,7 @@ int main(void)
struct bflb_dma_channel_config_s rxconfig;
rxconfig.direction = DMA_PERIPH_TO_MEMORY;
rxconfig.src_req = DMA_REQUEST_UART1_RX;
rxconfig.src_req = DEFAULT_TEST_UART_DMA_RX_REQUEST;
rxconfig.dst_req = DMA_REQUEST_NONE;
rxconfig.src_addr_inc = DMA_ADDR_INCREMENT_DISABLE;
rxconfig.dst_addr_inc = DMA_ADDR_INCREMENT_ENABLE;
@ -99,20 +99,20 @@ int main(void)
struct bflb_dma_channel_lli_transfer_s tx_transfers[3];
tx_transfers[0].src_addr = (uint32_t)src_buffer;
tx_transfers[0].dst_addr = (uint32_t)DMA_ADDR_UART1_TDR;
tx_transfers[0].dst_addr = (uint32_t)DEFAULT_TEST_UART_DMA_TDR;
tx_transfers[0].nbytes = 4100;
tx_transfers[1].src_addr = (uint32_t)src2_buffer;
tx_transfers[1].dst_addr = (uint32_t)DMA_ADDR_UART1_TDR;
tx_transfers[1].dst_addr = (uint32_t)DEFAULT_TEST_UART_DMA_TDR;
tx_transfers[1].nbytes = 4100;
tx_transfers[2].src_addr = (uint32_t)src3_buffer;
tx_transfers[2].dst_addr = (uint32_t)DMA_ADDR_UART1_TDR;
tx_transfers[2].dst_addr = (uint32_t)DEFAULT_TEST_UART_DMA_TDR;
tx_transfers[2].nbytes = 4100;
struct bflb_dma_channel_lli_pool_s rx_llipool[20];
struct bflb_dma_channel_lli_transfer_s rx_transfers[1];
rx_transfers[0].src_addr = (uint32_t)DMA_ADDR_UART1_RDR;
rx_transfers[0].src_addr = (uint32_t)DEFAULT_TEST_UART_DMA_RDR;
rx_transfers[0].dst_addr = (uint32_t)receive_buffer;
rx_transfers[0].nbytes = 50;

View file

@ -2,27 +2,27 @@
#include "bflb_uart.h"
#include "board.h"
struct bflb_device_s *uart1;
struct bflb_device_s *uartx;
static uint8_t pce_int_flag = 0;
void uart_isr(int irq, void *arg)
{
uint32_t intstatus = bflb_uart_get_intstatus(uart1);
uint32_t intstatus = bflb_uart_get_intstatus(uartx);
if (intstatus & UART_INTSTS_PCE) {
bflb_uart_int_clear(uartx, UART_INTCLR_PCE);
pce_int_flag++;
printf("Enter Parity int\r\n");
}
bflb_uart_int_clear(uart1, UART_INTCLR_PCE);
}
int main(void)
{
board_init();
board_uart1_gpio_init();
board_uartx_gpio_init();
uart1 = bflb_device_get_by_name("uart1");
uartx = bflb_device_get_by_name(DEFAULT_TEST_UART);
struct bflb_uart_config_s cfg;
@ -33,17 +33,17 @@ int main(void)
cfg.flow_ctrl = 0;
cfg.tx_fifo_threshold = 7;
cfg.rx_fifo_threshold = 7;
bflb_uart_init(uart1, &cfg);
bflb_uart_init(uartx, &cfg);
bflb_uart_errint_mask(uart1, false);
bflb_irq_attach(uart1->irq_num, uart_isr, uart1);
bflb_irq_enable(uart1->irq_num);
bflb_uart_errint_mask(uartx, false);
bflb_irq_attach(uartx->irq_num, uart_isr, NULL);
bflb_irq_enable(uartx->irq_num);
int ch;
while (1) {
ch = bflb_uart_getchar(uart1);
ch = bflb_uart_getchar(uartx);
if (ch != -1) {
bflb_uart_putchar(uart1, ch);
bflb_uart_putchar(uartx, ch);
}
if(pce_int_flag){
pce_int_flag = 0;

View file

@ -2,14 +2,14 @@
#include "bflb_uart.h"
#include "board.h"
struct bflb_device_s *uart1;
struct bflb_device_s *uartx;
int main(void)
{
board_init();
board_uart1_gpio_init();
board_uartx_gpio_init();
uart1 = bflb_device_get_by_name("uart1");
uartx = bflb_device_get_by_name(DEFAULT_TEST_UART);
struct bflb_uart_config_s cfg;
@ -20,18 +20,18 @@ int main(void)
cfg.flow_ctrl = 0;
cfg.tx_fifo_threshold = 7;
cfg.rx_fifo_threshold = 7;
bflb_uart_init(uart1, &cfg);
bflb_uart_feature_control(uart1, UART_CMD_SET_BAUD_RATE, 2000000);
bflb_uart_feature_control(uart1, UART_CMD_SET_DATA_BITS, UART_DATA_BITS_8);
bflb_uart_feature_control(uart1, UART_CMD_SET_STOP_BITS, UART_STOP_BITS_1);
bflb_uart_feature_control(uart1, UART_CMD_SET_PARITY_BITS, UART_PARITY_EVEN);
bflb_uart_init(uartx, &cfg);
bflb_uart_feature_control(uartx, UART_CMD_SET_BAUD_RATE, 2000000);
bflb_uart_feature_control(uartx, UART_CMD_SET_DATA_BITS, UART_DATA_BITS_8);
bflb_uart_feature_control(uartx, UART_CMD_SET_STOP_BITS, UART_STOP_BITS_1);
bflb_uart_feature_control(uartx, UART_CMD_SET_PARITY_BITS, UART_PARITY_EVEN);
int ch;
while (1) {
ch = bflb_uart_getchar(uart1);
ch = bflb_uart_getchar(uartx);
if (ch != -1) {
bflb_uart_putchar(uart1, ch);
bflb_uart_putchar(uartx, ch);
}
}
}

View file

@ -2,33 +2,33 @@
#include "bflb_uart.h"
#include "board.h"
struct bflb_device_s *uart1;
struct bflb_device_s *uartx;
static uint8_t uart_txbuf[128] = {0};
void uart_isr(int irq, void *arg)
{
uint32_t intstatus = bflb_uart_get_intstatus(uart1);
uint32_t intstatus = bflb_uart_get_intstatus(uartx);
if (intstatus & UART_INTSTS_RX_FIFO) {
while (bflb_uart_rxavailable(uart1)) {
while (bflb_uart_rxavailable(uartx)) {
printf("enter rx fifo interrupt");
printf("0x%02x\r\n", bflb_uart_getchar(uart1));
printf("0x%02x\r\n", bflb_uart_getchar(uartx));
}
}
if (intstatus & UART_INTSTS_RTO) {
while (bflb_uart_rxavailable(uart1)) {
bflb_uart_int_clear(uartx, UART_INTCLR_RTO);
while (bflb_uart_rxavailable(uartx)) {
printf("enter rto interrupt");
printf("0x%02x\r\n", bflb_uart_getchar(uart1));
printf("0x%02x\r\n", bflb_uart_getchar(uartx));
}
bflb_uart_int_clear(uart1, UART_INTCLR_RTO);
}
if (intstatus & UART_INTSTS_TX_FIFO) {
for (uint8_t i = 0; i < 27; i++)
{
bflb_uart_putchar(uart1,uart_txbuf[i]);
bflb_uart_putchar(uartx,uart_txbuf[i]);
}
bflb_uart_txint_mask(uart1, true);
bflb_uart_txint_mask(uartx, true);
printf("tx interrupt end");
}
}
@ -36,9 +36,9 @@ void uart_isr(int irq, void *arg)
int main(void)
{
board_init();
board_uart1_gpio_init();
board_uartx_gpio_init();
uart1 = bflb_device_get_by_name("uart1");
uartx = bflb_device_get_by_name("uart3");
for(uint8_t i=0; i < 128; i++)
{
@ -54,12 +54,12 @@ int main(void)
cfg.flow_ctrl = 0;
cfg.tx_fifo_threshold = 7;
cfg.rx_fifo_threshold = 7;
bflb_uart_init(uart1, &cfg);
//bflb_uart_init(uartx, &cfg);
bflb_uart_txint_mask(uart1, false);
bflb_uart_rxint_mask(uart1, false);
bflb_irq_attach(uart1->irq_num, uart_isr, uart1);
bflb_irq_enable(uart1->irq_num);
bflb_uart_txint_mask(uartx, false);
bflb_uart_rxint_mask(uartx, false);
bflb_irq_attach(uartx->irq_num, uart_isr, NULL);
bflb_irq_enable(uartx->irq_num);
while (1) {
bflb_mtimer_delay_ms(2000);

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@ -0,0 +1,9 @@
cmake_minimum_required(VERSION 3.15)
include(proj.conf)
find_package(bouffalo_sdk REQUIRED HINTS $ENV{BL_SDK_BASE})
sdk_set_main_file(main.c)
project(uart_ir)

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@ -0,0 +1,13 @@
SDK_DEMO_PATH ?= .
BL_SDK_BASE ?= $(SDK_DEMO_PATH)/../../../..
export BL_SDK_BASE
CHIP ?= bl616
BOARD ?= bl616dk
CROSS_COMPILE ?= riscv64-unknown-elf-
# add custom cmake definition
#cmake_definition+=-Dxxx=sss
include $(BL_SDK_BASE)/project.build

View file

@ -0,0 +1,57 @@
#include "bflb_mtimer.h"
#include "bflb_uart.h"
#include "board.h"
struct bflb_device_s *uartx;
static uint8_t uart_txbuf[128] = { 0 };
static uint8_t uart_rxbuf[128] = { 0 };
int main(void)
{
board_init();
board_uartx_gpio_init();
uartx = bflb_device_get_by_name("uartx");
for (uint8_t i = 0; i < 128; i++) {
uart_txbuf[i] = i;
uart_rxbuf[i] = 0;
}
struct bflb_uart_config_s cfg;
cfg.baudrate = 115200;
cfg.data_bits = UART_DATA_BITS_8;
cfg.stop_bits = UART_STOP_BITS_1;
cfg.parity = UART_PARITY_NONE;
cfg.flow_ctrl = 0;
cfg.tx_fifo_threshold = 7;
cfg.rx_fifo_threshold = 1;
bflb_uart_init(uartx, &cfg);
struct bflb_uart_ir_config_s ircfg;
ircfg.tx_en = 1;
ircfg.rx_en = 1;
ircfg.tx_inverse = 0;
ircfg.rx_inverse = 1;
ircfg.tx_pluse_start = 112;
ircfg.tx_pluse_stop = 159;
ircfg.rx_pluse_start = 111;
bflb_uart_feature_control(uartx, UART_CMD_IR_CONFIG, (size_t)&ircfg);
for (uint8_t i = 0; i < 128; i++) {
bflb_uart_putchar(uartx, uart_txbuf[i]);
while (bflb_uart_feature_control(uartx, UART_CMD_GET_RX_FIFO_CNT, 1) == 0) {
}
uart_rxbuf[i] = bflb_uart_getchar(uartx);
}
printf("All data arrived\r\n");
for (uint8_t j = 0; j < 128; j++) {
if (uart_txbuf[j] != uart_rxbuf[j]) {
printf("check fail, %d tx: %02x, rx: %02x\r\n", j, uart_txbuf[j], uart_rxbuf[j]);
}
}
}

View file

@ -0,0 +1 @@
#set(CONFIG_XXX 1)

View file

@ -2,28 +2,28 @@
#include "bflb_uart.h"
#include "board.h"
struct bflb_device_s *uart1;
struct bflb_device_s *uartx;
static uint8_t uart_txbuf[128] = { 0 };
static uint8_t lse_int_flag = 0;
void uart_isr(int irq, void *arg)
{
uint32_t intstatus = bflb_uart_get_intstatus(uart1);
uint32_t intstatus = bflb_uart_get_intstatus(uartx);
if (intstatus & UART_INTSTS_RX_LSE) {
bflb_uart_int_clear(uartx, UART_INTCLR_RX_LSE);
lse_int_flag++;
printf("enter rx lse interrupt");
}
bflb_uart_int_clear(uart1, UART_INTCLR_RX_LSE);
}
int main(void)
{
board_init();
board_uart1_gpio_init();
board_uartx_gpio_init();
uart1 = bflb_device_get_by_name("uart1");
uartx = bflb_device_get_by_name(DEFAULT_TEST_UART);
struct bflb_uart_config_s cfg;
@ -36,18 +36,18 @@ int main(void)
cfg.rx_fifo_threshold = 7;
bflb_uart_errint_mask(uart1, false);
bflb_irq_attach(uart1->irq_num, uart_isr, uart1);
bflb_irq_enable(uart1->irq_num);
bflb_uart_errint_mask(uartx, false);
bflb_irq_attach(uartx->irq_num, uart_isr, NULL);
bflb_irq_enable(uartx->irq_num);
bflb_uart_feature_control(uart1, UART_CMD_SET_BREAK_VALUE, 4);
bflb_uart_feature_control(uart1, UART_CMD_SET_TX_LIN_VALUE, 1);
bflb_uart_feature_control(uart1, UART_CMD_SET_RX_LIN_VALUE, 1);
bflb_uart_feature_control(uartx, UART_CMD_SET_BREAK_VALUE, 4);
bflb_uart_feature_control(uartx, UART_CMD_SET_TX_LIN_VALUE, 1);
bflb_uart_feature_control(uartx, UART_CMD_SET_RX_LIN_VALUE, 1);
bflb_uart_init(uart1, &cfg);
bflb_uart_init(uartx, &cfg);
bflb_uart_putchar(uart1, 0xff);
bflb_uart_putchar(uart1, 0x1);
bflb_uart_putchar(uartx, 0xff);
bflb_uart_putchar(uartx, 0x1);
while (1) {
if (lse_int_flag) {

View file

@ -2,14 +2,14 @@
#include "bflb_uart.h"
#include "board.h"
struct bflb_device_s *uart1;
struct bflb_device_s *uartx;
int main(void)
{
board_init();
board_uart1_gpio_init();
board_uartx_gpio_init();
uart1 = bflb_device_get_by_name("uart1");
uartx = bflb_device_get_by_name(DEFAULT_TEST_UART);
struct bflb_uart_config_s cfg;
@ -20,13 +20,13 @@ int main(void)
cfg.flow_ctrl = 0;
cfg.tx_fifo_threshold = 7;
cfg.rx_fifo_threshold = 7;
bflb_uart_init(uart1, &cfg);
bflb_uart_init(uartx, &cfg);
int ch;
while (1) {
ch = bflb_uart_getchar(uart1);
ch = bflb_uart_getchar(uartx);
if (ch != -1) {
bflb_uart_putchar(uart1, ch);
bflb_uart_putchar(uartx, ch);
}
}
}

View file

@ -2,38 +2,38 @@
#include "bflb_uart.h"
#include "board.h"
struct bflb_device_s *uart1;
struct bflb_device_s *uartx;
static uint8_t uart_txbuf[128] = { 0 };
void uart_isr(int irq, void *arg)
{
uint32_t intstatus = bflb_uart_get_intstatus(uart1);
uint32_t intstatus = bflb_uart_get_intstatus(uartx);
if (intstatus & UART_INTSTS_RX_FIFO) {
while (bflb_uart_rxavailable(uart1)) {
while (bflb_uart_rxavailable(uartx)) {
printf("enter rx fifo interrupt");
printf("0x%02x\r\n", bflb_uart_getchar(uart1));
printf("0x%02x\r\n", bflb_uart_getchar(uartx));
}
}
if (intstatus & UART_INTSTS_RTO) {
while (bflb_uart_rxavailable(uart1)) {
bflb_uart_int_clear(uartx, UART_INTCLR_RTO);
while (bflb_uart_rxavailable(uartx)) {
printf("enter rto interrupt");
printf("0x%02x\r\n", bflb_uart_getchar(uart1));
printf("0x%02x\r\n", bflb_uart_getchar(uartx));
}
bflb_uart_int_clear(uart1, UART_INTCLR_RTO);
}
}
int main(void)
{
board_init();
board_uart1_gpio_init();
board_uartx_gpio_init();
for (uint8_t i = 0; i < 128; i++) {
uart_txbuf[i] = i;
}
uart1 = bflb_device_get_by_name("uart1");
uartx = bflb_device_get_by_name(DEFAULT_TEST_UART);
struct bflb_uart_config_s cfg;
@ -44,18 +44,18 @@ int main(void)
cfg.flow_ctrl = 0;
cfg.tx_fifo_threshold = 7;
cfg.rx_fifo_threshold = 7;
bflb_uart_init(uart1, &cfg);
bflb_uart_init(uartx, &cfg);
bflb_uart_feature_control(uart1, UART_CMD_SET_TX_RS485_EN, 1);
bflb_uart_feature_control(uart1, UART_CMD_SET_TX_RS485_POLARITY, 1);
bflb_uart_feature_control(uartx, UART_CMD_SET_TX_RS485_EN, 1);
bflb_uart_feature_control(uartx, UART_CMD_SET_TX_RS485_POLARITY, 1);
for (uint8_t i = 0; i < 128; i++) {
bflb_uart_putchar(uart1, uart_txbuf[i]);
bflb_uart_putchar(uartx, uart_txbuf[i]);
}
bflb_uart_rxint_mask(uart1, false);
bflb_irq_attach(uart1->irq_num, uart_isr, uart1);
bflb_irq_enable(uart1->irq_num);
bflb_uart_rxint_mask(uartx, false);
bflb_irq_attach(uartx->irq_num, uart_isr, NULL);
bflb_irq_enable(uartx->irq_num);
while (1) {
bflb_mtimer_delay_ms(2000);