GitHub-Mirror/bl_mcu_sdk
2
0
Fork 0
mirror of https://github.com/Fishwaldo/bl_mcu_sdk.git synced 2025-07-09 06:18:52 +00:00
Code Issues Projects Releases Packages Wiki Activity Actions

[refactor][cam] refactor camera driver,add standard interfaces for camera

Browse source
This commit is contained in:
jzlv 2021-10-25 15:14:04 +08:00
parent 9792e36ab4
commit e27aedace2
20 changed files with 404 additions and 259 deletions
Download patch file Download diff file Expand all files Collapse all files

2
bsp/board/bl702/bl702_boot2/clock_config.h
View file

@ -77,7 +77,7 @@
#define BSP_DAC_CLOCK_SOURCE ROOT_CLOCK_SOURCE_AUPLL_24000000_HZ
#define BSP_DAC_CLOCK_DIV 1
#endif
#if defined(BSP_USING_CAM)
#if defined(BSP_USING_CAM0)
#define BSP_CAM_CLOCK_SOURCE ROOT_CLOCK_SOURCE_PLL_96M
#define BSP_CAM_CLOCK_DIV 3
#endif

2
bsp/board/bl702/bl702_iot/clock_config.h
View file

@ -72,7 +72,7 @@
#define BSP_DAC_CLOCK_SOURCE ROOT_CLOCK_SOURCE_AUPLL_24000000_HZ
#define BSP_DAC_CLOCK_DIV 1
#endif
#if defined(BSP_USING_CAM)
#if defined(BSP_USING_CAM0)
#define BSP_CAM_CLOCK_SOURCE ROOT_CLOCK_SOURCE_PLL_96M
#define BSP_CAM_CLOCK_DIV 3
#endif

2
bsp/board/bl702/bl706_avb/clock_config.h
View file

@ -76,7 +76,7 @@
#define BSP_DAC_CLOCK_SOURCE ROOT_CLOCK_SOURCE_AUPLL_24000000_HZ
#define BSP_DAC_CLOCK_DIV 1
#endif
#if defined(BSP_USING_CAM)
#if defined(BSP_USING_CAM0)
#define BSP_CAM_CLOCK_SOURCE ROOT_CLOCK_SOURCE_PLL_96M
#define BSP_CAM_CLOCK_DIV 3
#endif

24
bsp/board/bl702/bl706_avb/peripheral_config.h
View file

@ -44,7 +44,7 @@
#define BSP_USING_QDEC1
#define BSP_USING_QDEC2
#define BSP_USING_USB
#define BSP_USING_CAM
#define BSP_USING_CAM0
/* ----------------------*/
/* PERIPHERAL With DMA LIST */
@ -125,6 +125,8 @@
.clk_phase = SPI_PHASE_1EDGE, \
.datasize = SPI_DATASIZE_8BIT, \
.fifo_threshold = 4, \
.pin_swap_enable = 1, \
.delitch_cnt = 0, \
}
#endif
#endif
@ -462,4 +464,24 @@
#endif
#endif
#if defined(BSP_USING_CAM0)
#ifndef CAM0_CONFIG
#define CAM0_CONFIG \
{ \
.id = 0, \
.software_mode = CAM_AUTO_MODE, \
.frame_mode = CAM_FRAME_INTERLEAVE_MODE, \
.yuv_format = CAM_YUV_FORMAT_YUV422, \
.hsp = CAM_HSPOLARITY_LOW, \
.vsp = CAM_VSPOLARITY_LOW, \
.cam_write_ram_addr = 0, \
.cam_write_ram_size = 0, \
.cam_frame_size = 0, \
.cam_write_ram_addr1 = 0, \
.cam_write_ram_size1 = 0, \
.cam_frame_size1 = 0, \
}
#endif
#endif
#endif

2
bsp/board/bl702/bl706_iot/clock_config.h
View file

@ -72,7 +72,7 @@
#define BSP_DAC_CLOCK_SOURCE ROOT_CLOCK_SOURCE_AUPLL_24000000_HZ
#define BSP_DAC_CLOCK_DIV 1
#endif
#if defined(BSP_USING_CAM)
#if defined(BSP_USING_CAM0)
#define BSP_CAM_CLOCK_SOURCE ROOT_CLOCK_SOURCE_PLL_96M
#define BSP_CAM_CLOCK_DIV 3
#endif

2
bsp/board/bl702/bl706_iot/peripheral_config.h
View file

@ -125,6 +125,8 @@
.clk_phase = SPI_PHASE_1EDGE, \
.datasize = SPI_DATASIZE_8BIT, \
.fifo_threshold = 1, \
.pin_swap_enable = 1, \
.delitch_cnt = 0, \
}
#endif
#endif

2
bsp/board/bl702/bl706_lp/clock_config.h
View file

@ -60,7 +60,7 @@
#define BSP_DAC_CLOCK_SOURCE ROOT_CLOCK_SOURCE_AUPLL_24000000_HZ
#define BSP_DAC_CLOCK_DIV 1
#endif
#if defined(BSP_USING_CAM)
#if defined(BSP_USING_CAM0)
#define BSP_CAM_CLOCK_SOURCE ROOT_CLOCK_SOURCE_PLL_96M
#define BSP_CAM_CLOCK_DIV 3
#endif

41
bsp/bsp_common/image_sensor/bsp_image_sensor.c
View file

@ -679,24 +679,37 @@ uint8_t image_sensor_init(BL_Fun_Type mjpeg_en, cam_device_t *cam_cfg, mjpeg_dev
return 1;
}
cam_stop();
mjpeg_stop();
if (mjpeg_en) {
#if (CAM_MODE == CAM_USING_INT_MODE)
cam_init(cam_cfg, DEVICE_OFLAG_INT);
#elif (CAM_MODE == CAM_USING_POLL_MODE)
cam_init(cam_cfg, DEVICE_OFLAG_POLL);
#endif
mjpeg_init(mjpeg_cfg);
} else {
#if (CAM_MODE == CAM_USING_INT_MODE)
cam_init(cam_cfg, DEVICE_OFLAG_INT);
#elif (CAM_MODE == CAM_USING_POLL_MODE)
cam_init(cam_cfg, DEVICE_OFLAG_POLL);
#endif
cam_register(CAM0_INDEX, "camera0");
struct device *cam0 = device_find("camera0");
if(!cam0)
{
MSG("cam do not find\r\n");
return 1;
}
if (mjpeg_en) {
mjpeg_init(mjpeg_cfg);
}
CAM_DEV(cam0)->hsp = CAM_HSPOLARITY_HIGH;
CAM_DEV(cam0)->vsp = CAM_VSPOLARITY_HIGH;
CAM_DEV(cam0)->software_mode = cam_cfg->software_mode;
CAM_DEV(cam0)->frame_mode = cam_cfg->frame_mode;
CAM_DEV(cam0)->yuv_format = cam_cfg->yuv_format;
CAM_DEV(cam0)->cam_write_ram_addr = cam_cfg->cam_write_ram_addr;
CAM_DEV(cam0)->cam_write_ram_size = cam_cfg->cam_write_ram_size;
CAM_DEV(cam0)->cam_frame_size = cam_cfg->cam_frame_size;
CAM_DEV(cam0)->cam_write_ram_addr1 = cam_cfg->cam_write_ram_addr1;
CAM_DEV(cam0)->cam_write_ram_size1 = cam_cfg->cam_write_ram_size1;
CAM_DEV(cam0)->cam_frame_size1 = cam_cfg->cam_frame_size1;
#if (CAM_MODE == CAM_USING_INT_MODE)
device_open(cam0, DEVICE_OFLAG_INT_RX);
#elif (CAM_MODE == CAM_USING_POLL_MODE)
device_open(cam0, DEVICE_OFLAG_STREAM_RX);
#endif
return SUCCESS;
}