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https://github.com/Fishwaldo/bl_mcu_sdk.git
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189 lines
6.1 KiB
C
189 lines
6.1 KiB
C
#ifndef __BFLB_PEC_IP_H__
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#define __BFLB_PEC_IP_H__
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#include "bflb_core.h"
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#define PEC0 0
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#define PEC_MAX 1
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#define PEC_SM0 0
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#define PEC_SM1 1
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#define PEC_SM2 2
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#define PEC_SM3 3
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#define PEC_SM_MAX 4
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#define PEC_FLAG_0 (1 << 0)
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#define PEC_FLAG_1 (1 << 1)
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#define PEC_FLAG_2 (1 << 2)
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#define PEC_FLAG_3 (1 << 3)
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#define PEC_FLAG_4 (1 << 4)
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#define PEC_FLAG_5 (1 << 5)
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#define PEC_FLAG_6 (1 << 6)
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#define PEC_FLAG_7 (1 << 7)
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#define PEC_IP_NULL 0
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#define PEC_IP_PWM 1
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#define PEC_IP_UART_TX 2
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#define PEC_IP_UART_RX 3
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#define PEC_IP_SPI 4
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#define PEC_IP_I2C 5
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#define PEC_IP_WS2812 6
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#define PEC_IP_JTAG 7
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#define PEC_IP_DPI 8
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#define PEC_IP_LA 9
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#define PEC_IP_SEG 10
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#define PEC_IP_DBI_B 11
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#define PEC_IP_4xI2S 12
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#define PEC_ERR_OK 0
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#define PEC_ERR_NOT_SUPPORT 1
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#define PEC_ERR_PIN_CONFLICT 2
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#define PEC_ERR_SM_LACK 3
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#define PEC_ERR_CODE_SPACE_LACK 4
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#define PEC_ERR_FLAG_LACK 5
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extern uint32_t bflb_pec_get_tx_fifo_addr(uint8_t pec_id, uint8_t sm_id);
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extern uint32_t bflb_pec_get_rx_fifo_addr(uint8_t pec_id, uint8_t sm_id);
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extern void bflb_pec_dma_tx_enable(uint8_t pec_id, uint8_t sm_id, uint8_t enable);
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extern void bflb_pec_dma_rx_enable(uint8_t pec_id, uint8_t sm_id, uint8_t enable);
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struct bflb_pec_pwm_s {
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uint32_t high_cnt; /*!< high level count */
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uint32_t low_cnt; /*!< low level count */
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uint16_t div; /*!< divisor */
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uint8_t pin; /*!< PWM output assert pin index */
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uint8_t pec;
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uint8_t sm;
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uint8_t addr;
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};
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int bflb_pec_pwm_init(struct bflb_pec_pwm_s *pwm);
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void bflb_pec_pwm_start(struct bflb_pec_pwm_s *pwm);
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void bflb_pec_pwm_stop(struct bflb_pec_pwm_s *pwm);
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struct bflb_pec_jtag_s {
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uint8_t pin_tck;
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uint8_t pin_tms;
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uint8_t pin_tdo;
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uint8_t pin_tdi;
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uint8_t pec;
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uint8_t sm;
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uint8_t addr;
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};
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int bflb_pec_jtag_init(struct bflb_pec_jtag_s *jtag);
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void bflb_pec_jtag_set_tck(struct bflb_pec_jtag_s *jtag, uint8_t value);
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void bflb_pec_jtag_set_tms(struct bflb_pec_jtag_s *jtag, uint8_t value);
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void bflb_pec_jtag_set_tdi(struct bflb_pec_jtag_s *jtag, uint8_t value);
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int bflb_pec_jtag_get_tdo(struct bflb_pec_jtag_s *jtag);
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void bflb_pec_jtag_set_path(struct bflb_pec_jtag_s *jtag, uint32_t path, uint32_t bits);
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void bflb_pec_jtag_select_ir(struct bflb_pec_jtag_s *jtag);
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void bflb_pec_jtag_exit_ir(struct bflb_pec_jtag_s *jtag);
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void bflb_pec_jtag_select_dr(struct bflb_pec_jtag_s *jtag);
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void bflb_pec_jtag_exit_dr(struct bflb_pec_jtag_s *jtag);
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void bflb_pec_jtag_scan_ir(struct bflb_pec_jtag_s *jtag, uint8_t ir_bits, uint8_t *ir_out, uint8_t *ir_in);
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void bflb_pec_jtag_scan_dr(struct bflb_pec_jtag_s *jtag, uint8_t dr_bits, uint8_t *dr_out, uint8_t *dr_in);
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void bflb_pec_jtag_scan(struct bflb_pec_jtag_s *jtag, uint8_t ir_bits, uint8_t *ir_out, uint8_t *ir_in, uint8_t dr_bits, uint8_t *dr_out, uint8_t *dr_in);
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void bflb_pec_jtag_write_ir(struct bflb_pec_jtag_s *jtag, uint8_t ir_bits, uint8_t *ir_out);
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void bflb_pec_jtag_write_dr(struct bflb_pec_jtag_s *jtag, uint8_t dr_bits, uint8_t *dr_out);
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void bflb_pec_jtag_read_dr(struct bflb_pec_jtag_s *jtag, uint8_t dr_bits, uint8_t *dr_in);
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/* pixel format */
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#define PEC_DBI_B_PIXEL_FORMAT_NRGB8888 1 /* 32-bit */
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#define PEC_DBI_B_PIXEL_FORMAT_NBGR8888 2 /* 32-bit */
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#define PEC_DBI_B_PIXEL_FORMAT_RGB888 3 /* 24-bit */
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#define PEC_DBI_B_PIXEL_FORMAT_BGR888 4 /* 24-bit */
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#define PEC_DBI_B_PIXEL_FORMAT_RGB565 5 /* 16-bit */
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#define PEC_DBI_B_PIXEL_FORMAT_BGR565 6 /* 16-bit */
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/* transmit mode */
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#define PEC_DBI_TRANSMIT_MODE_CMD 0
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#define PEC_DBI_TRANSMIT_MODE_PIXEL 1
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struct bflb_pec_dbi_b_s {
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uint32_t clk_src;
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uint32_t clk;
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uint8_t pixel_format;
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uint8_t pin_dc;
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uint8_t pin_wr;
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uint8_t pin_data;
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uint8_t pec;
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uint8_t sm;
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uint8_t addr;
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uint8_t fifo_threshold;
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};
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int bflb_pec_dbi_b_init(struct bflb_pec_dbi_b_s *dbi_b);
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uint32_t bflb_pec_dbi_b_build_head(struct bflb_pec_dbi_b_s *dbi_b, uint8_t transmit_mode, uint8_t cmd, size_t data_num);
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uint32_t bflb_pec_dbi_b_get_fifo_address(struct bflb_pec_dbi_b_s *dbi_b);
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int bflb_pec_dbi_b_get_fifo_cnt(struct bflb_pec_dbi_b_s *dbi_b);
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int bflb_pec_dbi_b_dma_enable(struct bflb_pec_dbi_b_s *dbi_b, bool en);
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/* Signal polarity selection */
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#define V_SYNC_SINGLE_POL 0
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#define H_SYNC_SINGLE_POL 0
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#define DE_SINGLE_POL 1
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struct bflb_pec_dpi_s {
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uint16_t width;
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uint16_t height;
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uint16_t hsw;
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uint16_t hbp;
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uint16_t hfp;
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uint16_t vsw;
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uint16_t vbp;
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uint16_t vfp;
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bool data_latch_mode;
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bool de_sig_enable;
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bool de_sig_polarity;
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bool v_sync_sig_polarity;
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bool h_sync_sig_polarity;
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uint32_t *invalid_row_para;
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uint16_t frame_rate;
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uint16_t data_format;
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uint8_t pin_clk;
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uint8_t pin_hs;
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uint8_t pin_data;
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uint8_t pec;
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uint8_t sm;
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};
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int bflb_pec_dpi_init(struct bflb_pec_dpi_s *dpi);
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#define PEC_I2S_SAMPLE_RATE_24KHZ 1
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#define PEC_I2S_SAMPLE_RATE_48KHZ 2
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#define PEC_I2S_SAMPLE_RATE_96KHZ 3
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#define PEC_I2S_DATA_FORMAT_BIT24IN32R 0
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#define PEC_I2S_DATA_FORMAT_BIT16 1
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#define PEC_I2S_DATA_FORMAT_BIT32 2
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struct bflb_pec_i2sx4_s {
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uint8_t sample_rate;
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uint8_t data_format;
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uint8_t pin_bck;
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uint8_t pin_ws;
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uint8_t pin_d0;
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uint8_t pin_d1;
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uint8_t pin_d2;
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uint8_t pin_d3;
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uint8_t pec;
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// uint8_t sm;
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// uint8_t addr;
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uint8_t flag;
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};
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int bflb_pec_i2sx4_init(struct bflb_pec_i2sx4_s *i2s);
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void bflb_pec_i2sx4_enable(struct bflb_pec_i2sx4_s *i2s);
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void bflb_pec_i2sx4_disable(struct bflb_pec_i2sx4_s *i2s);
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void bflb_pec_i2sx4_rx_start(struct bflb_pec_i2sx4_s *i2s);
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void bflb_pec_i2sx4_rx_stop(struct bflb_pec_i2sx4_s *i2s);
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uint8_t bflb_pec_i2sx4_get_data(struct bflb_pec_i2sx4_s *i2s, uint8_t ch, uint32_t *data);
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#endif /* __BFLB_PEC_IP_H__ */
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