mirror of
https://github.com/Fishwaldo/bl_mcu_sdk.git
synced 2025-07-19 11:18:44 +00:00
d6fab307bf
* Add flash driver and init in boards. * Add timeout for all poll wait apis * Add 808 d0 startup to bringup * Update lhal device tables * Update demos
158 lines
4.3 KiB
C
158 lines
4.3 KiB
C
#include "bflb_adc.h"
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#include "bflb_mtimer.h"
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#include "bflb_dma.h"
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#include "board.h"
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struct bflb_device_s *adc;
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struct bflb_device_s *dma0_ch0;
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#define TEST_ADC_CHANNEL_0 1
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#define TEST_ADC_CHANNEL_1 1
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#define TEST_ADC_CHANNEL_2 1
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#define TEST_ADC_CHANNEL_3 1
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#define TEST_ADC_CHANNEL_4 1
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#define TEST_ADC_CHANNEL_5 1
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#define TEST_ADC_CHANNEL_6 1
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#define TEST_ADC_CHANNEL_7 1
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#define TEST_ADC_CHANNEL_8 1
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#define TEST_ADC_CHANNEL_9 1
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#define TEST_ADC_CHANNEL_10 1
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#define TEST_ADC_CHANNELS (TEST_ADC_CHANNEL_0 + \
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TEST_ADC_CHANNEL_1 + \
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TEST_ADC_CHANNEL_2 + \
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TEST_ADC_CHANNEL_3 + \
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TEST_ADC_CHANNEL_4 + \
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TEST_ADC_CHANNEL_5 + \
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TEST_ADC_CHANNEL_6 + \
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TEST_ADC_CHANNEL_7 + \
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TEST_ADC_CHANNEL_8 + \
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TEST_ADC_CHANNEL_9 + \
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TEST_ADC_CHANNEL_10)
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struct bflb_adc_channel_s chan[] = {
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#if TEST_ADC_CHANNEL_0
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{ .pos_chan = ADC_CHANNEL_0,
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.neg_chan = ADC_CHANNEL_GND },
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#endif
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#if TEST_ADC_CHANNEL_1
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{ .pos_chan = ADC_CHANNEL_1,
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.neg_chan = ADC_CHANNEL_GND },
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#endif
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#if TEST_ADC_CHANNEL_2
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{ .pos_chan = ADC_CHANNEL_2,
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.neg_chan = ADC_CHANNEL_GND },
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#endif
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#if TEST_ADC_CHANNEL_3
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{ .pos_chan = ADC_CHANNEL_3,
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.neg_chan = ADC_CHANNEL_GND },
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#endif
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#if TEST_ADC_CHANNEL_4
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{ .pos_chan = ADC_CHANNEL_4,
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.neg_chan = ADC_CHANNEL_GND },
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#endif
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#if TEST_ADC_CHANNEL_5
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{ .pos_chan = ADC_CHANNEL_5,
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.neg_chan = ADC_CHANNEL_GND },
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#endif
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#if TEST_ADC_CHANNEL_6
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{ .pos_chan = ADC_CHANNEL_6,
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.neg_chan = ADC_CHANNEL_GND },
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#endif
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#if TEST_ADC_CHANNEL_7
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{ .pos_chan = ADC_CHANNEL_7,
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.neg_chan = ADC_CHANNEL_GND },
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#endif
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#if TEST_ADC_CHANNEL_8
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{ .pos_chan = ADC_CHANNEL_8,
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.neg_chan = ADC_CHANNEL_GND },
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#endif
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#if TEST_ADC_CHANNEL_9
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{ .pos_chan = ADC_CHANNEL_9,
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.neg_chan = ADC_CHANNEL_GND },
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#endif
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#if TEST_ADC_CHANNEL_10
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{ .pos_chan = ADC_CHANNEL_10,
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.neg_chan = ADC_CHANNEL_GND },
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#endif
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};
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static uint8_t dma_tc_flag0 = 0;
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#define TEST_COUNT 16
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ATTR_NOCACHE_NOINIT_RAM_SECTION uint32_t raw_data[TEST_ADC_CHANNELS * TEST_COUNT];
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void dma0_ch0_isr(void *arg)
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{
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dma_tc_flag0++;
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printf("tc done\r\n");
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}
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int main(void)
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{
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board_init();
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board_adc_gpio_init();
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adc = bflb_device_get_by_name("adc");
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/* adc clock = XCLK / 2 / 32 */
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struct bflb_adc_config_s cfg;
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cfg.clk_div = ADC_CLK_DIV_32;
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cfg.scan_conv_mode = true;
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cfg.continuous_conv_mode = true;
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cfg.differential_mode = false;
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cfg.resolution = ADC_RESOLUTION_16B;
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cfg.vref = ADC_VREF_3P2V;
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bflb_adc_init(adc, &cfg);
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bflb_adc_channel_config(adc, chan, TEST_ADC_CHANNELS);
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bflb_adc_link_rxdma(adc, true);
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dma0_ch0 = bflb_device_get_by_name("dma0_ch0");
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struct bflb_dma_channel_config_s config;
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config.direction = DMA_PERIPH_TO_MEMORY;
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config.src_req = DMA_REQUEST_ADC;
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config.dst_req = DMA_REQUEST_NONE;
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config.src_addr_inc = DMA_ADDR_INCREMENT_DISABLE;
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config.dst_addr_inc = DMA_ADDR_INCREMENT_ENABLE;
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config.src_burst_count = DMA_BURST_INCR1;
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config.dst_burst_count = DMA_BURST_INCR1;
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config.src_width = DMA_DATA_WIDTH_32BIT;
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config.dst_width = DMA_DATA_WIDTH_32BIT;
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bflb_dma_channel_init(dma0_ch0, &config);
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bflb_dma_channel_irq_attach(dma0_ch0, dma0_ch0_isr, NULL);
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struct bflb_dma_channel_lli_pool_s lli[1]; /* max trasnfer size 4064 * 1 */
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struct bflb_dma_channel_lli_transfer_s transfers[1];
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memset(raw_data, 0, sizeof(raw_data));
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transfers[0].src_addr = (uint32_t)DMA_ADDR_ADC_RDR;
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transfers[0].dst_addr = (uint32_t)raw_data;
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transfers[0].nbytes = sizeof(raw_data);
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bflb_dma_channel_lli_reload(dma0_ch0, lli, 1, transfers, 1);
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bflb_dma_channel_start(dma0_ch0);
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bflb_adc_start_conversion(adc);
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while (dma_tc_flag0 != 1) {
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bflb_mtimer_delay_ms(1);
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}
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bflb_adc_stop_conversion(adc);
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for (size_t j = 0; j < TEST_ADC_CHANNELS * TEST_COUNT; j++) {
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struct bflb_adc_result_s result;
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printf("raw data:%08x\r\n", raw_data[j]);
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bflb_adc_parse_result(adc, &raw_data[j], &result, 1);
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printf("pos chan %d,%d mv \r\n", result.pos_chan, result.millivolt);
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}
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while (1) {
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}
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}
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