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https://github.com/Fishwaldo/bl_mcu_sdk.git
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191 lines
6.7 KiB
C
191 lines
6.7 KiB
C
#ifndef _BFLB_IR_H
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#define _BFLB_IR_H
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#include "bflb_core.h"
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#if !defined(BL616)
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/** @defgroup IR TX mode definition
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* @{
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*/
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#define IR_TX_NEC 0
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#define IR_TX_RC5 1
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#define IR_TX_SWM 2
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#define IR_TX_CUSTOMIZE 3
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/**
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* @}
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*/
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/** @defgroup IR TX FIFO valid width definition
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* @{
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*/
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#if !defined(BL602) && !defined(BL702)
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#define IR_TX_FIFO_WIDTH_8BIT 0
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#define IR_TX_FIFO_WIDTH_16BIT 1
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#define IR_TX_FIFO_WIDTH_24BIT 2
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#endif
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#define IR_TX_FIFO_WIDTH_32BIT 3
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/**
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* @}
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*/
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/** @defgroup IR TX interrupt type definition
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* @{
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*/
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#define IR_TX_INT_END (1 << 0)
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#if !defined(BL602) && !defined(BL702)
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#define IR_TX_INT_FIFO (1 << 1)
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#define IR_TX_INT_FER (1 << 2)
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#endif
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/**
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* @}
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*/
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#endif
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#if !defined(BL702L)
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/** @defgroup IR RX mode definition
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* @{
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*/
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#define IR_RX_NEC 0
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#define IR_RX_RC5 1
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#define IR_RX_SWM 2
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/**
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* @}
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*/
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/** @defgroup IR RX interrupt type definition
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* @{
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*/
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#define IR_RX_INT_END (1 << 0)
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#if !defined(BL602) && !defined(BL702)
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#define IR_RX_INT_FIFO (1 << 1)
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#define IR_RX_INT_FER (1 << 2)
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#endif
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/**
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* @}
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*/
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#endif
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#if !defined(BL616)
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/**
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* @brief IR TX configuration structure
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*
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* @param tx_mode TX mode select,NEC protocol/RC-5 protocol/software mode/customize
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* @param data_bits Bit count of data phase (don't care if tx freerun mode is enabled)
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* @param tail_inverse Enable or disable signal of tail pulse inverse (don't care if SWM is enabled)
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* @param tail_enable Enable or disable signal of tail pulse (don't care if SWM is enabled)
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* @param head_inverse Enable or disable signal of head pulse inverse (don't care if SWM is enabled)
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* @param head_enable Enable or disable signal of head pulse (don't care if SWM is enabled)
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* @param logic1_inverse Enable or disable signal of logic 1 pulse inverse (don't care if SWM is enabled)
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* @param logic0_inverse Enable or disable signal of logic 0 pulse inverse (don't care if SWM is enabled)
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* @param data_enable Enable or disable signal of data pulse (don't care if SWM is enabled)
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* @param swm_enable Enable or disable software mode(SWM)
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* @param output_modulation Enable or disable signal of output modulation
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* @param output_inverse Enable or disable signal of output inverse,0:output stays at low during idle state,1:stay at high
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* @param freerun_enable Enable or disable tx freerun mode (don't care if SWM is enabled)
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* @param continue_enable Disable:idle time between frames = (tailPulseWidth_0+tailPulseWidth_1)*pulseWidthUnit,Enable:no idle time between frames
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* @param fifo_width IR frame size(also the valid width for each fifo entry)
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* @param fifo_threshold TX FIFO threshold
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* @param logic0_pulse_width_1 Pulse width of logic 0 pulse phase 1 (don't care if SWM is enabled)
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* @param logic0_pulse_width_0 Pulse width of logic 0 pulse phase 0 (don't care if SWM is enabled)
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* @param logic1_pulse_width_1 Pulse width of logic 1 pulse phase 1 (don't care if SWM is enabled)
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* @param logic1_pulse_width_0 Pulse width of logic 1 pulse phase 0 (don't care if SWM is enabled)
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* @param head_pulse_width_1 Pulse width of head pulse phase 1 (don't care if SWM is enabled)
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* @param head_pulse_width_0 Pulse width of head pulse phase 0 (don't care if SWM is enabled)
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* @param tail_pulse_width_1 Pulse width of tail pulse phase 1 (don't care if SWM is enabled)
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* @param tail_pulse_width_0 Pulse width of tail pulse phase 0 (don't care if SWM is enabled)
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* @param modu_width_1 Modulation phase 1 width
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* @param modu_width_0 Modulation phase 0 width
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* @param pulse_width_unit Pulse width unit
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*/
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struct bflb_ir_tx_config_s {
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uint8_t tx_mode;
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uint8_t data_bits;
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uint8_t tail_inverse;
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uint8_t tail_enable;
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uint8_t head_inverse;
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uint8_t head_enable;
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uint8_t logic1_inverse;
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uint8_t logic0_inverse;
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uint8_t data_enable;
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uint8_t swm_enable;
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uint8_t output_modulation;
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uint8_t output_inverse;
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uint8_t freerun_enable;
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uint8_t continue_enable;
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uint8_t fifo_width;
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uint8_t fifo_threshold;
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uint8_t logic0_pulse_width_1;
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uint8_t logic0_pulse_width_0;
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uint8_t logic1_pulse_width_1;
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uint8_t logic1_pulse_width_0;
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uint8_t head_pulse_width_1;
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uint8_t head_pulse_width_0;
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uint8_t tail_pulse_width_1;
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uint8_t tail_pulse_width_0;
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uint8_t modu_width_1;
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uint8_t modu_width_0;
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uint16_t pulse_width_unit;
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};
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#endif
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#if !defined(BL702L)
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/**
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* @brief IR RX configuration structure
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*
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* @param rx_mode RX mode select,NEC protocol/RC-5 protocol/software mode
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* @param input_inverse Enable or disable signal of input inverse
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* @param deglitch_enable Enable or disable signal of rx input de-glitch function
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* @param deglitch_cnt De-glitch function cycle count
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* @param data_threshold Pulse width threshold for logic 0/1 detection (don't care if SWM is enabled)
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* @param end_threshold Pulse width threshold to trigger end condition
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* @param fifo_threshold RX FIFO threshold
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*/
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struct bflb_ir_rx_config_s {
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uint8_t rx_mode;
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uint8_t input_inverse;
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uint8_t deglitch_enable;
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uint8_t deglitch_cnt;
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uint16_t data_threshold;
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uint16_t end_threshold;
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uint16_t fifo_threshold;
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};
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#endif
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#ifdef __cplusplus
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extern "C" {
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#endif
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#if !defined(BL616)
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void bflb_ir_tx_init(struct bflb_device_s *dev, const struct bflb_ir_tx_config_s *config);
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void bflb_ir_send(struct bflb_device_s *dev, uint32_t *data, uint32_t length);
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void bflb_ir_swm_send(struct bflb_device_s *dev, uint16_t *data, uint8_t length);
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void bflb_ir_tx_enable(struct bflb_device_s *dev, bool enable);
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void bflb_ir_txint_mask(struct bflb_device_s *dev, uint8_t int_type, bool mask);
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void bflb_ir_txint_clear(struct bflb_device_s *dev);
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uint32_t bflb_ir_txint_status(struct bflb_device_s *dev);
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#if !defined(BL602) && !defined(BL702)
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void bflb_ir_link_txdma(struct bflb_device_s *dev, bool enable);
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uint8_t bflb_ir_txfifo_cnt(struct bflb_device_s *dev);
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void bflb_ir_txfifo_clear(struct bflb_device_s *dev);
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#endif
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#endif
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#if !defined(BL702L)
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void bflb_ir_rx_init(struct bflb_device_s *dev, const struct bflb_ir_rx_config_s *config);
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uint8_t bflb_ir_receive(struct bflb_device_s *dev, uint64_t *data);
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uint8_t bflb_ir_swm_receive(struct bflb_device_s *dev, uint16_t *data, uint8_t length);
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void bflb_ir_rx_enable(struct bflb_device_s *dev, bool enable);
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void bflb_ir_rxint_mask(struct bflb_device_s *dev, uint8_t int_type, bool mask);
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void bflb_ir_rxint_clear(struct bflb_device_s *dev);
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uint32_t bflb_ir_rxint_status(struct bflb_device_s *dev);
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uint8_t bflb_ir_rxfifo_cnt(struct bflb_device_s *dev);
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void bflb_ir_rxfifo_clear(struct bflb_device_s *dev);
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#endif
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void bflb_ir_feature_control();
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#ifdef __cplusplus
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}
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#endif
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#endif
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