dts rockchip 1.8 GHz support

also adjustments to thermal to match rockchip linux and Tinker
This commit is contained in:
Tonymac32 2017-05-11 00:25:20 -04:00 committed by GitHub
parent 691d9de5ba
commit 0009a36e85

View file

@ -0,0 +1,174 @@
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 8ef0393..6f37782 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -97,6 +97,8 @@
operating-points-v2 = <&cpu0_opp_table>;
#cooling-cells = <2>; /* min followed by max */
clocks = <&cru ARMCLK>;
+ nvmem-cells = <&package_info>;
+ nvmem-cell-names = "package_info";
};
cpu1: cpu@501 {
device_type = "cpu";
@@ -126,61 +128,87 @@
opp-shared;
opp@126000000 {
+ opp-supported-hw = <0x3>;
opp-hz = /bits/ 64 <126000000>;
opp-microvolt = <900000>;
clock-latency-ns = <40000>;
};
opp@216000000 {
+ opp-supported-hw = <0x3>;
opp-hz = /bits/ 64 <216000000>;
opp-microvolt = <900000>;
clock-latency-ns = <40000>;
};
opp@408000000 {
+ opp-supported-hw = <0x3>;
opp-hz = /bits/ 64 <408000000>;
opp-microvolt = <900000>;
clock-latency-ns = <40000>;
};
opp@600000000 {
+ opp-supported-hw = <0x3>;
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <900000>;
clock-latency-ns = <40000>;
};
opp@696000000 {
+ opp-supported-hw = <0x3>;
opp-hz = /bits/ 64 <696000000>;
opp-microvolt = <950000>;
clock-latency-ns = <40000>;
};
opp@816000000 {
+ opp-supported-hw = <0x3>;
opp-hz = /bits/ 64 <816000000>;
opp-microvolt = <1000000>;
clock-latency-ns = <40000>;
opp-suspend;
};
opp@1008000000 {
+ opp-supported-hw = <0x3>;
opp-hz = /bits/ 64 <1008000000>;
opp-microvolt = <1050000>;
clock-latency-ns = <40000>;
};
- opp@1200000000 {
+ opp@1200000000 {
+ opp-supported-hw = <0x3>;
opp-hz = /bits/ 64 <1200000000>;
opp-microvolt = <1100000>;
clock-latency-ns = <40000>;
};
opp@1416000000 {
+ opp-supported-hw = <0x3>;
opp-hz = /bits/ 64 <1416000000>;
opp-microvolt = <1200000>;
clock-latency-ns = <40000>;
};
opp@1512000000 {
+ opp-supported-hw = <0x3>;
opp-hz = /bits/ 64 <1512000000>;
opp-microvolt = <1300000>;
clock-latency-ns = <40000>;
};
+
opp@1608000000 {
+ opp-supported-hw = <0x3>;
opp-hz = /bits/ 64 <1608000000>;
opp-microvolt = <1350000>;
clock-latency-ns = <40000>;
};
+
+ opp@1704000000 {
+ opp-supported-hw = <0x3>;
+ opp-hz = /bits/ 64 <1704000000>;
+ opp-microvolt = <1350000>;
+ clock-latency-ns = <40000>;
+ };
+
+ opp@1800000000 {
+ opp-supported-hw = <0x3>;
+ opp-hz = /bits/ 64 <1800000000>;
+ opp-microvolt = <1350000>;
+ clock-latency-ns = <40000>;
+ };
};
amba {
@@ -1212,6 +1240,18 @@
#cooling-cells = <2>; /* min followed by max */
power-domains = <&power RK3288_PD_GPU>;
status = "disabled";
+ cpu-limit-freq = <1416000>;
+ gpu-limit-freq = <600000>;
+
+ gpu_power_model: power_model {
+ compatible = "arm,mali-simple-power-model";
+ voltage = <950>;
+ frequency = <500>;
+ static-power = <300>;
+ dynamic-power = <396>;
+ ts = <32000 4700 (-80) 2>;
+ thermal-zone = "gpu_thermal";
+ };
};
noc: syscon@ffac0000 {
@@ -1328,6 +1368,11 @@
cpu_leakage: cpu_leakage@17 {
reg = <0x17 0x1>;
};
+
+ package_info: package-info {
+ reg = <0x05 0x1>;
+ };
+
};
usbphy: phy {
diff --git a/arch/arm/boot/dts/rk3288-thermal.dtsi b/arch/arm/boot/dts/rk3288-thermal.dtsi
index 8995909..58f8732 100644
--- a/arch/arm/boot/dts/rk3288-thermal.dtsi
+++ b/arch/arm/boot/dts/rk3288-thermal.dtsi
@@ -52,11 +52,11 @@ reserve_thermal: reserve_thermal {
};
cpu_thermal: cpu_thermal {
- polling-delay-passive = <1000>; /* milliseconds */
- polling-delay = <5000>; /* milliseconds */
-
+ polling-delay-passive = <200>; /* milliseconds */
+ polling-delay = <1000>; /* milliseconds */
+ sustainable-power = <1200>;
thermal-sensors = <&tsadc 1>;
-
+
trips {
cpu_alert0: cpu_alert0 {
temperature = <70000>; /* millicelsius */
@@ -102,7 +102,7 @@ gpu_thermal: gpu_thermal {
map0 {
trip = <&gpu_alert0>;
cooling-device =
- <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 6f37782..6a876ed 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -96,6 +96,7 @@
resets = <&cru SRST_CORE0>;
operating-points-v2 = <&cpu0_opp_table>;
#cooling-cells = <2>; /* min followed by max */
+
clocks = <&cru ARMCLK>;
nvmem-cells = <&package_info>;
nvmem-cell-names = "package_info";