From 03ae848dd124f97ba46a5a461243bc82d5204d0c Mon Sep 17 00:00:00 2001
From: Martin Ayotte <martinayotte@yahoo.ca>
Date: Thu, 6 Feb 2020 12:32:21 -0500
Subject: [PATCH] add i2c2/i2c3 to R40

---
 .../sunxi-dev/add-i2c2-i2c3-to-r40.patch      | 39 +++++++++++++
 .../sunxi-dev/general-sunxi-overlays.patch    | 56 ++++++++++++++++++-
 2 files changed, 94 insertions(+), 1 deletion(-)
 create mode 100644 patch/kernel/sunxi-dev/add-i2c2-i2c3-to-r40.patch

diff --git a/patch/kernel/sunxi-dev/add-i2c2-i2c3-to-r40.patch b/patch/kernel/sunxi-dev/add-i2c2-i2c3-to-r40.patch
new file mode 100644
index 000000000..edd0ddf83
--- /dev/null
+++ b/patch/kernel/sunxi-dev/add-i2c2-i2c3-to-r40.patch
@@ -0,0 +1,39 @@
+diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi
+index 421dfbb..dc61f3a 100644
+--- a/arch/arm/boot/dts/sun8i-r40.dtsi
++++ b/arch/arm/boot/dts/sun8i-r40.dtsi
+@@ -373,6 +399,16 @@
+ 				function = "i2c0";
+ 			};
+ 
++			i2c2_pins: i2c2-pins {
++				pins = "PB20", "PB21";
++				function = "i2c2";
++			};
++
++			i2c3_pins: i2c3-pins {
++				pins = "PI0", "PI1";
++				function = "i2c3";
++			};
++
+ 			mmc0_pins: mmc0-pins {
+ 				pins = "PF0", "PF1", "PF2",
+ 				       "PF3", "PF4", "PF5";
+@@ -539,6 +649,8 @@
+ 			interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+ 			clocks = <&ccu CLK_BUS_I2C2>;
+ 			resets = <&ccu RST_BUS_I2C2>;
++			pinctrl-0 = <&i2c2_pins>;
++			pinctrl-names = "default";
+ 			status = "disabled";
+ 			#address-cells = <1>;
+ 			#size-cells = <0>;
+@@ -550,6 +662,8 @@
+ 			interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
+ 			clocks = <&ccu CLK_BUS_I2C3>;
+ 			resets = <&ccu RST_BUS_I2C3>;
++			pinctrl-0 = <&i2c3_pins>;
++			pinctrl-names = "default";
+ 			status = "disabled";
+ 			#address-cells = <1>;
+ 			#size-cells = <0>;
diff --git a/patch/kernel/sunxi-dev/general-sunxi-overlays.patch b/patch/kernel/sunxi-dev/general-sunxi-overlays.patch
index 39a387d92..0e35faab1 100644
--- a/patch/kernel/sunxi-dev/general-sunxi-overlays.patch
+++ b/patch/kernel/sunxi-dev/general-sunxi-overlays.patch
@@ -13,7 +13,7 @@ new file mode 100644
 index 0000000..39d6a27
 --- /dev/null
 +++ b/arch/arm/boot/dts/overlay/Makefile
-@@ -0,0 +1,95 @@
+@@ -0,0 +1,97 @@
 +# SPDX-License-Identifier: GPL-2.0
 +dtbo-$(CONFIG_MACH_SUN4I) += \
 +	sun4i-a10-analog-codec.dtbo \
@@ -93,6 +93,8 @@ index 0000000..39d6a27
 +	sun8i-h3-usbhost2.dtbo \
 +	sun8i-h3-usbhost3.dtbo \
 +	sun8i-h3-w1-gpio.dtbo \
++	sun8i-r40-i2c2.dtbo \
++	sun8i-r40-i2c3.dtbo \
 +	sun8i-r40-spi-spidev0.dtbo \
 +	sun8i-r40-spi-spidev1.dtbo \
 +	sun8i-r40-uart2.dtbo \
@@ -4526,6 +4528,58 @@ index 0000000..f4ccb7f
 +		};
 +	};
 +};
+diff --git a/arch/arm/boot/dts/overlay/sun8i-r40-i2c2.dts b/arch/arm/boot/dts/overlay/sun8i-r40-i2c2.dts
+new file mode 100644
+index 0000000..a1e3284
+--- /dev/null
++++ b/arch/arm/boot/dts/overlay/sun8i-r40-i2c2.dts
+@@ -0,0 +1,20 @@
++/dts-v1/;
++/plugin/;
++
++/ {
++	compatible = "allwinner,sun8i-h3";
++
++	fragment@0 {
++		target-path = "/aliases";
++		__overlay__ {
++			i2c2 = "/soc/i2c@1c2b400";
++		};
++	};
++
++	fragment@1 {
++		target = <&i2c2>;
++		__overlay__ {
++			status = "okay";
++		};
++	};
++};
+diff --git a/arch/arm/boot/dts/overlay/sun8i-r40-i2c3.dts b/arch/arm/boot/dts/overlay/sun8i-r40-i2c3.dts
+new file mode 100644
+index 0000000..a1e3284
+--- /dev/null
++++ b/arch/arm/boot/dts/overlay/sun8i-r40-i2c3.dts
+@@ -0,0 +1,20 @@
++/dts-v1/;
++/plugin/;
++
++/ {
++	compatible = "allwinner,sun8i-h3";
++
++	fragment@0 {
++		target-path = "/aliases";
++		__overlay__ {
++			i2c3 = "/soc/i2c@1c2b800";
++		};
++	};
++
++	fragment@1 {
++		target = <&i2c3>;
++		__overlay__ {
++			status = "okay";
++		};
++	};
++};
 diff --git a/arch/arm/boot/dts/overlay/sun8i-r40-spi-spidev0.dts b/arch/arm/boot/dts/overlay/sun8i-r40-spi-spidev0.dts
 new file mode 100644
 index 0000000..734a9a8