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Temporally disabling nonworking MALI patch on Rockchip DEV
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parent
95797a752f
commit
08fbf5334d
10 changed files with 6 additions and 45 deletions
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@ -25,14 +25,15 @@ diff --git a/drivers/gpu/arm/midgard/mali_kbase.h b/drivers/gpu/arm/midgard/mali
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index 56b364e5..9dd547f2 100644
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--- a/drivers/gpu/arm/midgard/mali_kbase.h
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+++ b/drivers/gpu/arm/midgard/mali_kbase.h
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@@ -36,6 +36,7 @@
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@@ -35,6 +35,8 @@
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#include <linux/mutex.h>
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#include <linux/rwsem.h>
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#include <linux/sched.h>
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#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 11, 0))
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+#include <linux/sched/task_stack.h>
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#include <linux/sched/mm.h>
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#endif
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+#include <linux/sched/mm.h>
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#include <linux/slab.h>
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#include <linux/spinlock.h>
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#include <linux/vmalloc.h>
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--
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2.11.0
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@ -1,40 +0,0 @@
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From 3fe37d29b53e3d06c8f4314cfc113bfa679f67eb Mon Sep 17 00:00:00 2001
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From: Myy Miouyouyou <myy@miouyouyou.fr>
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Date: Thu, 19 Oct 2017 21:48:05 +0200
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Subject: [PATCH 15/28] ARM: DTSI: rk3288.dtsi: Add the RGA node
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Imported from @wzyy2 patches.
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Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
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---
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arch/arm/boot/dts/rk3288.dtsi | 14 ++++++++++++++
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1 file changed, 14 insertions(+)
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diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
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index 10ecebb4..455446f6 100644
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--- a/arch/arm/boot/dts/rk3288.dtsi
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+++ b/arch/arm/boot/dts/rk3288.dtsi
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@@ -1159,6 +1159,20 @@
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};
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};
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+ rga: rga@ff920000 {
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+ compatible = "rockchip,rk3288-rga";
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+ reg = <0x0 0xff920000 0x0 0x180>;
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+ interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
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+ interrupt-names = "rga";
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+ clocks = <&cru ACLK_RGA>, <&cru HCLK_RGA>, <&cru SCLK_RGA>;
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+ clock-names = "aclk", "hclk", "sclk";
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+ power-domains = <&power RK3288_PD_VIO>;
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+ resets = <&cru SRST_RGA_CORE>, <&cru SRST_RGA_AXI>, <&cru SRST_RGA_AHB>;
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+
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+ reset-names = "core", "axi", "ahb";
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+ status = "disabled";
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+ };
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+
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vpu_mmu: iommu@ff9a0800 {
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compatible = "rockchip,iommu";
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reg = <0x0 0xff9a0800 0x0 0x100>;
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--
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2.11.0
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@ -8,6 +8,6 @@ index bd83c53..af7cfe3
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-#define DEFAULT_DMA_COHERENT_POOL_SIZE SZ_256K
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+#define DEFAULT_DMA_COHERENT_POOL_SIZE SZ_2M
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static struct gen_pool *atomic_pool;
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static struct gen_pool *atomic_pool __ro_after_init;
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static size_t atomic_pool_size = DEFAULT_DMA_COHERENT_POOL_SIZE;
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