Temporally disabling nonworking MALI patch on Rockchip DEV

This commit is contained in:
Igor Pecovnik 2017-12-02 20:17:56 +01:00
parent 95797a752f
commit 08fbf5334d
10 changed files with 6 additions and 45 deletions

View file

@ -25,14 +25,15 @@ diff --git a/drivers/gpu/arm/midgard/mali_kbase.h b/drivers/gpu/arm/midgard/mali
index 56b364e5..9dd547f2 100644
--- a/drivers/gpu/arm/midgard/mali_kbase.h
+++ b/drivers/gpu/arm/midgard/mali_kbase.h
@@ -36,6 +36,7 @@
@@ -35,6 +35,8 @@
#include <linux/mutex.h>
#include <linux/rwsem.h>
#include <linux/sched.h>
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 11, 0))
+#include <linux/sched/task_stack.h>
#include <linux/sched/mm.h>
#endif
+#include <linux/sched/mm.h>
#include <linux/slab.h>
#include <linux/spinlock.h>
#include <linux/vmalloc.h>
--
2.11.0

View file

@ -1,40 +0,0 @@
From 3fe37d29b53e3d06c8f4314cfc113bfa679f67eb Mon Sep 17 00:00:00 2001
From: Myy Miouyouyou <myy@miouyouyou.fr>
Date: Thu, 19 Oct 2017 21:48:05 +0200
Subject: [PATCH 15/28] ARM: DTSI: rk3288.dtsi: Add the RGA node
Imported from @wzyy2 patches.
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288.dtsi | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 10ecebb4..455446f6 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -1159,6 +1159,20 @@
};
};
+ rga: rga@ff920000 {
+ compatible = "rockchip,rk3288-rga";
+ reg = <0x0 0xff920000 0x0 0x180>;
+ interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "rga";
+ clocks = <&cru ACLK_RGA>, <&cru HCLK_RGA>, <&cru SCLK_RGA>;
+ clock-names = "aclk", "hclk", "sclk";
+ power-domains = <&power RK3288_PD_VIO>;
+ resets = <&cru SRST_RGA_CORE>, <&cru SRST_RGA_AXI>, <&cru SRST_RGA_AHB>;
+
+ reset-names = "core", "axi", "ahb";
+ status = "disabled";
+ };
+
vpu_mmu: iommu@ff9a0800 {
compatible = "rockchip,iommu";
reg = <0x0 0xff9a0800 0x0 0x100>;
--
2.11.0

View file

@ -8,6 +8,6 @@ index bd83c53..af7cfe3
-#define DEFAULT_DMA_COHERENT_POOL_SIZE SZ_256K
+#define DEFAULT_DMA_COHERENT_POOL_SIZE SZ_2M
static struct gen_pool *atomic_pool;
static struct gen_pool *atomic_pool __ro_after_init;
static size_t atomic_pool_size = DEFAULT_DMA_COHERENT_POOL_SIZE;