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Merge branch 'master' into clearfog-dev-5.4

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This commit is contained in:
count-doku 2020-01-02 13:15:39 +01:00
commit 0b4493714c
226 changed files with 1201480 additions and 627015 deletions
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2
config/boards/pcduino3nano.eos
View file

@ -2,4 +2,4 @@
BOARD_NAME="pcDuino3 Nano"
BOARDFAMILY="sun7i"
BOOTCONFIG="Linksprite_pcDuino3_Nano_defconfig"
KERNEL_TARGET="current,dev"
KERNEL_TARGET="legacy,current,dev"

6
config/boards/pinebook-pro.wip Normal file
View file

@ -0,0 +1,6 @@
# RK3399 hexa core 2G/4GB SoC Laptop eMMC USB3 WiFi
BOARD_NAME="Pinebook Pro"
BOARDFAMILY="rockchip64"
BOOTCONFIG="pinebook_pro-rk3399_defconfig"
KERNEL_TARGET="legacy,current,dev"
FULL_DESKTOP="yes"

124
config/kernel/linux-meson-current.config
View file

@ -1,6 +1,6 @@
#
# Automatically generated file; DO NOT EDIT.
# Linux/arm 5.3.6 Kernel Configuration
# Linux/arm 5.4.7 Kernel Configuration
#
#
@ -11,6 +11,7 @@ CONFIG_GCC_VERSION=80300
CONFIG_CLANG_VERSION=0
CONFIG_CC_CAN_LINK=y
CONFIG_CC_HAS_ASM_GOTO=y
CONFIG_CC_HAS_ASM_INLINE=y
CONFIG_CC_HAS_WARN_MAYBE_UNINITIALIZED=y
CONFIG_IRQ_WORK=y
CONFIG_BUILDTIME_EXTABLE_SORT=y
@ -261,19 +262,13 @@ CONFIG_ARCH_MULTIPLATFORM=y
# CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_EP93XX is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_IOP13XX is not set
# CONFIG_ARCH_IOP32X is not set
# CONFIG_ARCH_IOP33X is not set
# CONFIG_ARCH_IXP4XX is not set
# CONFIG_ARCH_DOVE is not set
# CONFIG_ARCH_KS8695 is not set
# CONFIG_ARCH_W90X900 is not set
# CONFIG_ARCH_LPC32XX is not set
# CONFIG_ARCH_PXA is not set
# CONFIG_ARCH_RPC is not set
# CONFIG_ARCH_SA1100 is not set
# CONFIG_ARCH_S3C24XX is not set
# CONFIG_ARCH_DAVINCI is not set
# CONFIG_ARCH_OMAP1 is not set
#
@ -292,6 +287,7 @@ CONFIG_ARCH_VIRT=y
# CONFIG_ARCH_ACTIONS is not set
# CONFIG_ARCH_ALPINE is not set
# CONFIG_ARCH_ARTPEC is not set
# CONFIG_ARCH_ASPEED is not set
# CONFIG_ARCH_AT91 is not set
# CONFIG_ARCH_BCM is not set
# CONFIG_ARCH_BERLIN is not set
@ -576,6 +572,7 @@ CONFIG_DT_IDLE_STATES=y
# ARM CPU Idle Drivers
#
CONFIG_ARM_CPUIDLE=y
# CONFIG_ARM_PSCI_CPUIDLE is not set
# CONFIG_ARM_HIGHBANK_CPUIDLE is not set
# end of ARM CPU Idle Drivers
@ -724,6 +721,7 @@ CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
CONFIG_HAVE_ARCH_MMAP_RND_BITS=y
CONFIG_HAVE_EXIT_THREAD=y
CONFIG_ARCH_MMAP_RND_BITS=8
CONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT=y
CONFIG_CLONE_BACKWARDS=y
CONFIG_OLD_SIGSUSPEND3=y
CONFIG_OLD_SIGACTION=y
@ -760,6 +758,8 @@ CONFIG_MODULE_UNLOAD=y
# CONFIG_MODULE_SRCVERSION_ALL is not set
# CONFIG_MODULE_SIG is not set
# CONFIG_MODULE_COMPRESS is not set
# CONFIG_MODULE_ALLOW_MISSING_NAMESPACE_IMPORTS is not set
# CONFIG_UNUSED_SYMBOLS is not set
# CONFIG_TRIM_UNUSED_KSYMS is not set
CONFIG_MODULES_TREE_LOOKUP=y
CONFIG_BLOCK=y
@ -773,6 +773,7 @@ CONFIG_BLK_DEV_THROTTLING=y
CONFIG_BLK_CMDLINE_PARSER=y
# CONFIG_BLK_WBT is not set
# CONFIG_BLK_CGROUP_IOLATENCY is not set
# CONFIG_BLK_CGROUP_IOCOST is not set
CONFIG_BLK_DEBUG_FS=y
# CONFIG_BLK_SED_OPAL is not set
@ -1322,9 +1323,7 @@ CONFIG_NET_DSA_TAG_GSWIP=m
CONFIG_NET_DSA_TAG_DSA=m
CONFIG_NET_DSA_TAG_EDSA=m
CONFIG_NET_DSA_TAG_MTK=m
CONFIG_NET_DSA_TAG_KSZ_COMMON=m
CONFIG_NET_DSA_TAG_KSZ=m
CONFIG_NET_DSA_TAG_KSZ9477=m
CONFIG_NET_DSA_TAG_QCA=m
CONFIG_NET_DSA_TAG_LAN9303=m
CONFIG_NET_DSA_TAG_SJA1105=m
@ -1377,6 +1376,7 @@ CONFIG_CAN=y
CONFIG_CAN_RAW=y
CONFIG_CAN_BCM=y
CONFIG_CAN_GW=y
# CONFIG_CAN_J1939 is not set
#
# CAN Device Drivers
@ -1388,6 +1388,7 @@ CONFIG_CAN_DEV=y
CONFIG_CAN_CALC_BITTIMING=y
CONFIG_CAN_FLEXCAN=m
# CONFIG_CAN_GRCAN is not set
# CONFIG_CAN_KVASER_PCIEFD is not set
# CONFIG_CAN_TI_HECC is not set
# CONFIG_CAN_C_CAN is not set
# CONFIG_CAN_CC770 is not set
@ -1560,6 +1561,7 @@ CONFIG_PCI_DRA7XX_EP=y
# CONFIG_PCIE_DW_PLAT_HOST is not set
# CONFIG_PCIE_DW_PLAT_EP is not set
# CONFIG_PCI_LAYERSCAPE is not set
# CONFIG_PCI_LAYERSCAPE_EP is not set
# CONFIG_PCI_MESON is not set
# end of DesignWare PCI Core Support
# end of PCI controller drivers
@ -1625,6 +1627,7 @@ CONFIG_GENERIC_ARCH_TOPOLOGY=y
#
CONFIG_ARM_CCI=y
CONFIG_BRCMSTB_GISB_ARB=y
# CONFIG_MOXTET is not set
CONFIG_OMAP_INTERCONNECT=y
CONFIG_OMAP_OCP2SCP=y
CONFIG_SIMPLE_PM_BUS=y
@ -1636,13 +1639,13 @@ CONFIG_CONNECTOR=m
# CONFIG_GNSS is not set
CONFIG_MTD=y
# CONFIG_MTD_TESTS is not set
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_OF_PARTS=y
# CONFIG_MTD_AR7_PARTS is not set
#
# Partition parsers
#
# CONFIG_MTD_AR7_PARTS is not set
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_OF_PARTS=y
# CONFIG_MTD_AFS_PARTS is not set
# CONFIG_MTD_REDBOOT_PARTS is not set
# end of Partition parsers
@ -1690,7 +1693,6 @@ CONFIG_MTD_CFI_I2=y
#
# CONFIG_MTD_PMC551 is not set
# CONFIG_MTD_DATAFLASH is not set
CONFIG_MTD_M25P80=y
# CONFIG_MTD_MCHP23K256 is not set
# CONFIG_MTD_SST25L is not set
# CONFIG_MTD_BCM47XXSFLASH is not set
@ -1723,6 +1725,7 @@ CONFIG_MTD_NAND_OMAP_BCH=y
CONFIG_MTD_NAND_OMAP_BCH_BUILD=m
# CONFIG_MTD_NAND_CAFE is not set
CONFIG_MTD_NAND_BRCMNAND=m
# CONFIG_MTD_NAND_MXIC is not set
# CONFIG_MTD_NAND_MESON is not set
# CONFIG_MTD_NAND_GPIO is not set
# CONFIG_MTD_NAND_PLATFORM is not set
@ -1781,6 +1784,7 @@ CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_LOOP_MIN_COUNT=8
# CONFIG_BLK_DEV_CRYPTOLOOP is not set
CONFIG_BLK_DEV_DRBD=m
# CONFIG_DRBD_FAULT_INJECTION is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_SX8 is not set
CONFIG_BLK_DEV_RAM=y
@ -1809,7 +1813,6 @@ CONFIG_AD525X_DPOT_I2C=y
# CONFIG_AD525X_DPOT_SPI is not set
# CONFIG_DUMMY_IRQ is not set
# CONFIG_PHANTOM is not set
# CONFIG_SGI_IOC4 is not set
# CONFIG_TIFM_CORE is not set
CONFIG_ICS932S401=y
# CONFIG_ENCLOSURE_SERVICES is not set
@ -2111,6 +2114,7 @@ CONFIG_DM_CACHE=m
CONFIG_DM_CACHE_SMQ=m
# CONFIG_DM_WRITECACHE is not set
CONFIG_DM_ERA=m
# CONFIG_DM_CLONE is not set
CONFIG_DM_MIRROR=m
CONFIG_DM_LOG_USERSPACE=m
CONFIG_DM_RAID=m
@ -2123,6 +2127,7 @@ CONFIG_DM_DUST=m
# CONFIG_DM_UEVENT is not set
# CONFIG_DM_FLAKEY is not set
CONFIG_DM_VERITY=m
# CONFIG_DM_VERITY_VERIFY_ROOTHASH_SIG is not set
# CONFIG_DM_VERITY_FEC is not set
CONFIG_DM_SWITCH=m
CONFIG_DM_LOG_WRITES=m
@ -2182,6 +2187,7 @@ CONFIG_NET_DSA_BCM_SF2=m
# CONFIG_NET_DSA_MT7530 is not set
# CONFIG_NET_DSA_MV88E6060 is not set
# CONFIG_NET_DSA_MICROCHIP_KSZ9477 is not set
# CONFIG_NET_DSA_MICROCHIP_KSZ8795 is not set
# CONFIG_NET_DSA_MV88E6XXX is not set
CONFIG_NET_DSA_SJA1105=m
# CONFIG_NET_DSA_SJA1105_PTP is not set
@ -2334,10 +2340,10 @@ CONFIG_NET_VENDOR_OKI=y
CONFIG_NET_VENDOR_PACKET_ENGINES=y
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
CONFIG_NET_VENDOR_PENSANDO=y
CONFIG_NET_VENDOR_QLOGIC=y
# CONFIG_QLA3XXX is not set
# CONFIG_QLCNIC is not set
# CONFIG_QLGE is not set
# CONFIG_NETXEN_NIC is not set
# CONFIG_QED is not set
CONFIG_NET_VENDOR_QUALCOMM=y
@ -2426,6 +2432,7 @@ CONFIG_SWPHY=y
# MII PHY device drivers
#
# CONFIG_SFP is not set
# CONFIG_ADIN_PHY is not set
# CONFIG_AMD_PHY is not set
# CONFIG_AQUANTIA_PHY is not set
CONFIG_AX88796B_PHY=m
@ -2628,6 +2635,7 @@ CONFIG_WLAN_VENDOR_TI=y
# CONFIG_WLCORE is not set
CONFIG_RTL8822BU=m
CONFIG_RTL8188EU=m
# CONFIG_RTL8821CU is not set
CONFIG_RTL8812AU=m
CONFIG_WLAN_VENDOR_ZYDAS=y
# CONFIG_USB_ZD1201 is not set
@ -2841,7 +2849,6 @@ CONFIG_INPUT_ADXL34X_I2C=m
CONFIG_INPUT_ADXL34X_SPI=m
# CONFIG_INPUT_IMS_PCU is not set
# CONFIG_INPUT_CMA3000 is not set
# CONFIG_INPUT_SOC_BUTTON_ARRAY is not set
# CONFIG_INPUT_DRV260X_HAPTICS is not set
# CONFIG_INPUT_DRV2665_HAPTICS is not set
# CONFIG_INPUT_DRV2667_HAPTICS is not set
@ -2906,12 +2913,12 @@ CONFIG_SERIAL_8250_EXTENDED=y
CONFIG_SERIAL_8250_SHARE_IRQ=y
# CONFIG_SERIAL_8250_DETECT_IRQ is not set
# CONFIG_SERIAL_8250_RSA is not set
CONFIG_SERIAL_8250_DWLIB=y
CONFIG_SERIAL_8250_FSL=y
CONFIG_SERIAL_8250_DW=y
CONFIG_SERIAL_8250_EM=y
# CONFIG_SERIAL_8250_RT288X is not set
# CONFIG_SERIAL_8250_OMAP is not set
# CONFIG_SERIAL_8250_MOXA is not set
CONFIG_SERIAL_OF_PLATFORM=y
#
@ -2945,6 +2952,7 @@ CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y
# CONFIG_SERIAL_RP2 is not set
CONFIG_SERIAL_FSL_LPUART=y
CONFIG_SERIAL_FSL_LPUART_CONSOLE=y
# CONFIG_SERIAL_FSL_LINFLEXUART is not set
CONFIG_SERIAL_CONEXANT_DIGICOLOR=y
CONFIG_SERIAL_CONEXANT_DIGICOLOR_CONSOLE=y
CONFIG_SERIAL_ST_ASC=y
@ -2972,6 +2980,8 @@ CONFIG_DEVPORT=y
# CONFIG_XILLYBUS is not set
# end of Character devices
# CONFIG_RANDOM_TRUST_BOOTLOADER is not set
#
# I2C support
#
@ -3325,6 +3335,7 @@ CONFIG_HWMON=y
# CONFIG_SENSORS_ADT7462 is not set
# CONFIG_SENSORS_ADT7470 is not set
# CONFIG_SENSORS_ADT7475 is not set
# CONFIG_SENSORS_AS370 is not set
# CONFIG_SENSORS_ASC7621 is not set
# CONFIG_SENSORS_ASPEED is not set
# CONFIG_SENSORS_ATXP1 is not set
@ -3415,7 +3426,6 @@ CONFIG_SENSORS_PWM_FAN=m
# CONFIG_SENSORS_STTS751 is not set
# CONFIG_SENSORS_SMM665 is not set
# CONFIG_SENSORS_ADC128D818 is not set
# CONFIG_SENSORS_ADS1015 is not set
# CONFIG_SENSORS_ADS7828 is not set
# CONFIG_SENSORS_ADS7871 is not set
# CONFIG_SENSORS_AMC6821 is not set
@ -3545,8 +3555,7 @@ CONFIG_MFD_BCM590XX=y
# CONFIG_MFD_BD9571MWV is not set
CONFIG_MFD_AXP20X=y
CONFIG_MFD_AXP20X_I2C=y
CONFIG_MFD_CROS_EC=m
# CONFIG_MFD_CROS_EC_CHARDEV is not set
CONFIG_MFD_CROS_EC_DEV=m
# CONFIG_MFD_MADERA is not set
# CONFIG_MFD_ASIC3 is not set
# CONFIG_PMIC_DA903X is not set
@ -3716,6 +3725,7 @@ CONFIG_REGULATOR_S5M8767=y
CONFIG_REGULATOR_SLG51000=m
CONFIG_REGULATOR_TI_ABB=y
CONFIG_REGULATOR_SY8106A=m
# CONFIG_REGULATOR_SY8824X is not set
CONFIG_REGULATOR_TPS51632=y
CONFIG_REGULATOR_TPS62360=y
# CONFIG_REGULATOR_TPS65023 is not set
@ -3749,6 +3759,7 @@ CONFIG_MEDIA_CONTROLLER=y
CONFIG_VIDEO_DEV=m
CONFIG_VIDEO_V4L2_SUBDEV_API=y
CONFIG_VIDEO_V4L2=m
CONFIG_VIDEO_V4L2_I2C=y
# CONFIG_VIDEO_ADV_DEBUG is not set
# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
CONFIG_V4L2_MEM2MEM_DEV=m
@ -3962,6 +3973,7 @@ CONFIG_VIDEO_ADV7604=m
# CONFIG_VIDEO_OV5647 is not set
# CONFIG_VIDEO_OV6650 is not set
# CONFIG_VIDEO_OV5670 is not set
# CONFIG_VIDEO_OV5675 is not set
# CONFIG_VIDEO_OV5695 is not set
# CONFIG_VIDEO_OV7251 is not set
# CONFIG_VIDEO_OV772X is not set
@ -4060,6 +4072,7 @@ CONFIG_VGA_ARB=y
CONFIG_VGA_ARB_MAX_GPUS=16
# CONFIG_IMX_IPUV3_CORE is not set
CONFIG_DRM=y
CONFIG_DRM_MIPI_DBI=m
CONFIG_DRM_MIPI_DSI=y
# CONFIG_DRM_DP_AUX_CHARDEV is not set
# CONFIG_DRM_DEBUG_MM is not set
@ -4134,12 +4147,16 @@ CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D=m
# CONFIG_DRM_PANEL_JDI_LT070ME05000 is not set
# CONFIG_DRM_PANEL_KINGDISPLAY_KD097D04 is not set
CONFIG_DRM_PANEL_SAMSUNG_LD9040=m
# CONFIG_DRM_PANEL_LG_LB035Q02 is not set
# CONFIG_DRM_PANEL_LG_LG4573 is not set
# CONFIG_DRM_PANEL_NEC_NL8048HL11 is not set
# CONFIG_DRM_PANEL_NOVATEK_NT39016 is not set
CONFIG_DRM_PANEL_OLIMEX_LCD_OLINUXINO=m
# CONFIG_DRM_PANEL_ORISETECH_OTM8009A is not set
# CONFIG_DRM_PANEL_OSD_OSD101T2587_53TS is not set
# CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 is not set
# CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN is not set
# CONFIG_DRM_PANEL_RAYDIUM_RM67191 is not set
# CONFIG_DRM_PANEL_RAYDIUM_RM68200 is not set
CONFIG_DRM_PANEL_ROCKTECH_JH057N00900=m
CONFIG_DRM_PANEL_RONBO_RB070D30=m
@ -4150,9 +4167,13 @@ CONFIG_DRM_PANEL_SAMSUNG_S6D16D0=m
CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0=m
# CONFIG_DRM_PANEL_SEIKO_43WVF1G is not set
# CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 is not set
# CONFIG_DRM_PANEL_SHARP_LS037V7DW01 is not set
# CONFIG_DRM_PANEL_SHARP_LS043T1LE01 is not set
CONFIG_DRM_PANEL_SITRONIX_ST7701=m
# CONFIG_DRM_PANEL_SITRONIX_ST7789V is not set
# CONFIG_DRM_PANEL_SONY_ACX565AKM is not set
# CONFIG_DRM_PANEL_TPO_TD028TTEC1 is not set
# CONFIG_DRM_PANEL_TPO_TD043MTEA1 is not set
CONFIG_DRM_PANEL_TPO_TPG110=m
CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA=m
# end of Display Panels
@ -4192,12 +4213,10 @@ CONFIG_DRM_DW_HDMI=y
CONFIG_DRM_ETNAVIV=m
CONFIG_DRM_ETNAVIV_THERMAL=y
# CONFIG_DRM_ARCPGU is not set
# CONFIG_DRM_HISI_HIBMC is not set
# CONFIG_DRM_MXSFB is not set
CONFIG_DRM_MESON=y
CONFIG_DRM_MESON_DW_HDMI=y
CONFIG_DRM_TINYDRM=y
CONFIG_TINYDRM_MIPI_DBI=m
# CONFIG_DRM_GM12U320 is not set
CONFIG_TINYDRM_HX8357D=m
# CONFIG_TINYDRM_ILI9225 is not set
CONFIG_TINYDRM_ILI9341=m
@ -4616,6 +4635,7 @@ CONFIG_SND_SOC_TS3A227E=m
# CONFIG_SND_SOC_TSCS42XX is not set
# CONFIG_SND_SOC_TSCS454 is not set
CONFIG_SND_SOC_TWL4030=m
# CONFIG_SND_SOC_UDA1334 is not set
# CONFIG_SND_SOC_WM8510 is not set
# CONFIG_SND_SOC_WM8523 is not set
# CONFIG_SND_SOC_WM8524 is not set
@ -4683,6 +4703,7 @@ CONFIG_HID_COUGAR=m
CONFIG_HID_MACALLY=m
# CONFIG_HID_PRODIKEYS is not set
# CONFIG_HID_CMEDIA is not set
# CONFIG_HID_CREATIVE_SB0540 is not set
# CONFIG_HID_CYPRESS is not set
# CONFIG_HID_DRAGONRISE is not set
# CONFIG_HID_EMS_FF is not set
@ -4771,6 +4792,9 @@ CONFIG_USB_HID=y
CONFIG_USB_OHCI_LITTLE_ENDIAN=y
CONFIG_USB_SUPPORT=y
CONFIG_USB_COMMON=y
# CONFIG_USB_LED_TRIG is not set
CONFIG_USB_ULPI_BUS=y
# CONFIG_USB_CONN_GPIO is not set
CONFIG_USB_ARCH_HAS_HCD=y
CONFIG_USB=y
CONFIG_USB_PCI=y
@ -4788,7 +4812,6 @@ CONFIG_USB_OTG=y
# CONFIG_USB_LEDS_TRIGGER_USBPORT is not set
CONFIG_USB_AUTOSUSPEND_DELAY=2
# CONFIG_USB_MON is not set
# CONFIG_USB_WUSB_CBAF is not set
#
# USB Host Controller Drivers
@ -4857,6 +4880,7 @@ CONFIG_USB_UAS=m
# CONFIG_USB_MDC800 is not set
# CONFIG_USB_MICROTEK is not set
# CONFIG_USBIP_CORE is not set
# CONFIG_USB_CDNS3 is not set
CONFIG_USB_MUSB_HDRC=m
# CONFIG_USB_MUSB_HOST is not set
# CONFIG_USB_MUSB_GADGET is not set
@ -4926,7 +4950,6 @@ CONFIG_USB_ISP1760_DUAL_ROLE=y
# CONFIG_USB_EMI26 is not set
# CONFIG_USB_ADUTUX is not set
# CONFIG_USB_SEVSEG is not set
# CONFIG_USB_RIO500 is not set
# CONFIG_USB_LEGOTOWER is not set
# CONFIG_USB_LCD is not set
# CONFIG_USB_CYPRESS_CY7C63 is not set
@ -5060,9 +5083,6 @@ CONFIG_USB_ETH_RNDIS=y
# CONFIG_USB_G_WEBCAM is not set
# CONFIG_TYPEC is not set
CONFIG_USB_ROLE_SWITCH=y
# CONFIG_USB_LED_TRIG is not set
CONFIG_USB_ULPI_BUS=y
# CONFIG_UWB is not set
CONFIG_MMC=y
CONFIG_PWRSEQ_EMMC=y
# CONFIG_PWRSEQ_SD8787 is not set
@ -5082,6 +5102,7 @@ CONFIG_MMC_SDHCI_IO_ACCESSORS=y
# CONFIG_MMC_SDHCI_PCI is not set
CONFIG_MMC_SDHCI_PLTFM=y
# CONFIG_MMC_SDHCI_OF_ARASAN is not set
# CONFIG_MMC_SDHCI_OF_ASPEED is not set
# CONFIG_MMC_SDHCI_OF_AT91 is not set
CONFIG_MMC_SDHCI_OF_DWCMSHC=m
# CONFIG_MMC_SDHCI_CADENCE is not set
@ -5230,6 +5251,7 @@ CONFIG_RTC_DRV_MAX8907=y
CONFIG_RTC_DRV_MAX8998=m
CONFIG_RTC_DRV_MAX8997=m
CONFIG_RTC_DRV_MAX77686=y
CONFIG_RTC_DRV_MESON_VRTC=m
CONFIG_RTC_DRV_RK808=m
CONFIG_RTC_DRV_RS5C372=m
# CONFIG_RTC_DRV_ISL1208 is not set
@ -5367,6 +5389,7 @@ CONFIG_TI_DMA_CROSSBAR=y
CONFIG_SYNC_FILE=y
# CONFIG_SW_SYNC is not set
# CONFIG_UDMABUF is not set
# CONFIG_DMABUF_SELFTESTS is not set
# end of DMABUF options
# CONFIG_AUXDISPLAY is not set
@ -5386,6 +5409,7 @@ CONFIG_VIRTIO_MMIO=y
#
# end of Microsoft Hyper-V guest support
# CONFIG_GREYBUS is not set
CONFIG_STAGING=y
# CONFIG_PRISM2_USB is not set
# CONFIG_COMEDI is not set
@ -5481,7 +5505,6 @@ CONFIG_STAGING_BOARD=y
# CONFIG_WILC1000_SPI is not set
# CONFIG_MOST is not set
# CONFIG_KS7010 is not set
# CONFIG_GREYBUS is not set
# CONFIG_PI433 is not set
#
@ -5490,17 +5513,27 @@ CONFIG_STAGING_BOARD=y
# end of Gasket devices
# CONFIG_XIL_AXIS_FIFO is not set
# CONFIG_EROFS_FS is not set
CONFIG_FIELDBUS_DEV=m
CONFIG_HMS_ANYBUSS_BUS=m
CONFIG_ARCX_ANYBUS_CONTROLLER=m
CONFIG_HMS_PROFINET=m
# CONFIG_USB_WUSB_CBAF is not set
# CONFIG_UWB is not set
# CONFIG_EXFAT_FS is not set
# CONFIG_QLGE is not set
# CONFIG_GOLDFISH is not set
CONFIG_MFD_CROS_EC=m
CONFIG_CHROME_PLATFORMS=y
CONFIG_CROS_EC=m
# CONFIG_CROS_EC_I2C is not set
CONFIG_CROS_EC_RPMSG=m
# CONFIG_CROS_EC_SPI is not set
CONFIG_CROS_EC_PROTO=y
CONFIG_CROS_EC_CHARDEV=m
CONFIG_CROS_EC_LIGHTBAR=m
CONFIG_CROS_EC_VBC=m
CONFIG_CROS_EC_DEBUGFS=m
CONFIG_CROS_EC_SYSFS=m
CONFIG_CROS_USBPD_LOGGER=m
# CONFIG_MELLANOX_PLATFORM is not set
CONFIG_CLKDEV_LOOKUP=y
@ -5529,7 +5562,6 @@ CONFIG_CLK_QORIQ=y
# CONFIG_COMMON_CLK_VC5 is not set
# CONFIG_COMMON_CLK_BD718XX is not set
# CONFIG_COMMON_CLK_FIXED_MMIO is not set
CONFIG_COMMON_CLK_MESON_INPUT=m
CONFIG_COMMON_CLK_MESON_REGMAP=y
CONFIG_COMMON_CLK_MESON_MPLL=y
CONFIG_COMMON_CLK_MESON_PHASE=m
@ -5581,8 +5613,7 @@ CONFIG_IOMMU_SUPPORT=y
#
# Remoteproc drivers
#
CONFIG_REMOTEPROC=m
# CONFIG_WKUP_M3_RPROC is not set
# CONFIG_REMOTEPROC is not set
# end of Remoteproc drivers
#
@ -5607,6 +5638,7 @@ CONFIG_MESON_CANVAS=y
CONFIG_MESON_CLK_MEASURE=y
CONFIG_MESON_GX_SOCINFO=y
CONFIG_MESON_GX_PM_DOMAINS=y
CONFIG_MESON_EE_PM_DOMAINS=y
CONFIG_MESON_MX_SOCINFO=y
# end of Amlogic SoC drivers
@ -5713,7 +5745,6 @@ CONFIG_ADXL372_I2C=m
# CONFIG_DMARD06 is not set
# CONFIG_DMARD09 is not set
# CONFIG_DMARD10 is not set
# CONFIG_IIO_CROS_EC_ACCEL_LEGACY is not set
# CONFIG_IIO_ST_ACCEL_3AXIS is not set
# CONFIG_KXSD9 is not set
# CONFIG_KXCJK1013 is not set
@ -5948,6 +5979,7 @@ CONFIG_MPU3050_I2C=y
# Inertial measurement units
#
# CONFIG_ADIS16400 is not set
# CONFIG_ADIS16460 is not set
# CONFIG_ADIS16480 is not set
# CONFIG_BMI160_I2C is not set
# CONFIG_BMI160_SPI is not set
@ -5981,6 +6013,7 @@ CONFIG_SENSORS_ISL29028=y
# CONFIG_LV0104CS is not set
# CONFIG_MAX44000 is not set
# CONFIG_MAX44009 is not set
# CONFIG_NOA1305 is not set
# CONFIG_OPT3001 is not set
# CONFIG_PA12203001 is not set
CONFIG_SI1133=m
@ -6044,6 +6077,7 @@ CONFIG_IIO_HRTIMER_TRIGGER=y
#
# CONFIG_AD5272 is not set
# CONFIG_DS1803 is not set
# CONFIG_MAX5432 is not set
# CONFIG_MAX5481 is not set
# CONFIG_MAX5487 is not set
# CONFIG_MCP4018 is not set
@ -6212,7 +6246,7 @@ CONFIG_RAS=y
CONFIG_DAX=y
CONFIG_NVMEM=y
CONFIG_NVMEM_SYSFS=y
# CONFIG_MESON_MX_EFUSE is not set
CONFIG_MESON_MX_EFUSE=y
#
# HW tracing support
@ -6275,6 +6309,7 @@ CONFIG_EXPORTFS_BLOCK_OPS=y
CONFIG_FILE_LOCKING=y
CONFIG_MANDATORY_FILE_LOCKING=y
CONFIG_FS_ENCRYPTION=y
# CONFIG_FS_VERITY is not set
CONFIG_FSNOTIFY=y
CONFIG_DNOTIFY=y
CONFIG_INOTIFY_USER=y
@ -6286,6 +6321,7 @@ CONFIG_AUTOFS4_FS=y
CONFIG_AUTOFS_FS=y
CONFIG_FUSE_FS=m
CONFIG_CUSE=m
# CONFIG_VIRTIO_FS is not set
CONFIG_OVERLAY_FS=y
# CONFIG_OVERLAY_FS_REDIRECT_DIR is not set
CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW=y
@ -6395,6 +6431,7 @@ CONFIG_PSTORE_PMSG=y
CONFIG_PSTORE_RAM=y
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
# CONFIG_EROFS_FS is not set
CONFIG_AUFS_FS=m
CONFIG_AUFS_BRANCH_MAX_127=y
# CONFIG_AUFS_BRANCH_MAX_511 is not set
@ -6438,7 +6475,6 @@ CONFIG_NFSD_PNFS=y
CONFIG_NFSD_BLOCKLAYOUT=y
CONFIG_NFSD_SCSILAYOUT=y
CONFIG_NFSD_FLEXFILELAYOUT=y
CONFIG_NFSD_FAULT_INJECTION=y
CONFIG_GRACE_PERIOD=y
CONFIG_LOCKD=y
CONFIG_LOCKD_V4=y
@ -6451,7 +6487,6 @@ CONFIG_RPCSEC_GSS_KRB5=m
# CONFIG_SUNRPC_DISABLE_INSECURE_ENCTYPES is not set
# CONFIG_SUNRPC_DEBUG is not set
CONFIG_CEPH_FS=m
CONFIG_CEPH_FSCACHE=y
CONFIG_CEPH_FS_POSIX_ACL=y
CONFIG_CIFS=m
CONFIG_CIFS_STATS2=y
@ -6611,10 +6646,6 @@ CONFIG_CRYPTO_CCM=m
CONFIG_CRYPTO_GCM=m
# CONFIG_CRYPTO_CHACHA20POLY1305 is not set
# CONFIG_CRYPTO_AEGIS128 is not set
# CONFIG_CRYPTO_AEGIS128L is not set
# CONFIG_CRYPTO_AEGIS256 is not set
# CONFIG_CRYPTO_MORUS640 is not set
# CONFIG_CRYPTO_MORUS1280 is not set
CONFIG_CRYPTO_SEQIV=y
CONFIG_CRYPTO_ECHAINIV=y
@ -6633,6 +6664,7 @@ CONFIG_CRYPTO_XTS=y
# CONFIG_CRYPTO_KEYWRAP is not set
CONFIG_CRYPTO_NHPOLY1305=m
CONFIG_CRYPTO_ADIANTUM=m
CONFIG_CRYPTO_ESSIV=m
#
# Hash modes
@ -6659,8 +6691,9 @@ CONFIG_CRYPTO_MD5=y
# CONFIG_CRYPTO_RMD256 is not set
# CONFIG_CRYPTO_RMD320 is not set
CONFIG_CRYPTO_SHA1=y
CONFIG_CRYPTO_LIB_SHA256=y
CONFIG_CRYPTO_SHA256=y
CONFIG_CRYPTO_SHA512=m
CONFIG_CRYPTO_SHA512=y
# CONFIG_CRYPTO_SHA3 is not set
# CONFIG_CRYPTO_SM3 is not set
CONFIG_CRYPTO_STREEBOG=m
@ -6670,6 +6703,7 @@ CONFIG_CRYPTO_STREEBOG=m
#
# Ciphers
#
CONFIG_CRYPTO_LIB_AES=y
CONFIG_CRYPTO_AES=y
# CONFIG_CRYPTO_AES_TI is not set
# CONFIG_CRYPTO_ANUBIS is not set
@ -6679,6 +6713,7 @@ CONFIG_CRYPTO_ARC4=m
# CONFIG_CRYPTO_CAMELLIA is not set
# CONFIG_CRYPTO_CAST5 is not set
# CONFIG_CRYPTO_CAST6 is not set
CONFIG_CRYPTO_LIB_DES=y
CONFIG_CRYPTO_DES=y
# CONFIG_CRYPTO_FCRYPT is not set
# CONFIG_CRYPTO_KHAZAD is not set
@ -6723,6 +6758,7 @@ CONFIG_CRYPTO_HW=y
# CONFIG_CRYPTO_DEV_ATMEL_ECC is not set
# CONFIG_CRYPTO_DEV_ATMEL_SHA204A is not set
CONFIG_CRYPTO_DEV_VIRTIO=m
# CONFIG_CRYPTO_DEV_SAFEXCEL is not set
# CONFIG_CRYPTO_DEV_CCREE is not set
CONFIG_ASYMMETRIC_KEY_TYPE=y
CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y
@ -6835,6 +6871,7 @@ CONFIG_DQL=y
CONFIG_GLOB=y
# CONFIG_GLOB_SELFTEST is not set
CONFIG_NLATTR=y
CONFIG_LRU_CACHE=m
CONFIG_CLZ_TAB=y
# CONFIG_IRQ_POLL is not set
CONFIG_MPILIB=y
@ -6876,10 +6913,9 @@ CONFIG_ENABLE_MUST_CHECK=y
CONFIG_FRAME_WARN=1024
# CONFIG_STRIP_ASM_SYMS is not set
# CONFIG_READABLE_ASM is not set
# CONFIG_UNUSED_SYMBOLS is not set
CONFIG_DEBUG_FS=y
# CONFIG_HEADERS_INSTALL is not set
# CONFIG_OPTIMIZE_INLINING is not set
CONFIG_OPTIMIZE_INLINING=y
# CONFIG_DEBUG_SECTION_MISMATCH is not set
CONFIG_SECTION_MISMATCH_WARN_ONLY=y
# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set

3
config/kernel/linux-meson64-legacy.config
View file

@ -2529,7 +2529,8 @@ CONFIG_WLAN_VENDOR_TI=y
# CONFIG_WL18XX is not set
# CONFIG_WLCORE is not set
CONFIG_RTL8822BU=m
CONFIG_RTL8188EUS=m
CONFIG_RTL8188EU=m
CONFIG_RTL8821CU=m
CONFIG_RTL8812AU=m
CONFIG_WLAN_VENDOR_ZYDAS=y
CONFIG_USB_ZD1201=m

268
config/kernel/linux-mvebu-current.config
View file

@ -1,13 +1,13 @@
#
# Automatically generated file; DO NOT EDIT.
# Linux/arm 4.19.63 Kernel Configuration
# Linux/arm 4.19.92 Kernel Configuration
#
#
# Compiler: arm-linux-gnueabihf-gcc (Linaro GCC 7.4-2019.02) 7.4.1 20181213 [linaro-7.4-2019.02 revision 56ec6f6b99cc167ff0c2f8e1a2eed33b1edc85d4]
# Compiler: arm-linux-gnueabihf-gcc (GNU Toolchain for the A-profile Architecture 8.3-2019.03 (arm-rel-8.36)) 8.3.0
#
CONFIG_CC_IS_GCC=y
CONFIG_GCC_VERSION=70401
CONFIG_GCC_VERSION=80300
CONFIG_CLANG_VERSION=0
CONFIG_CC_HAS_ASM_GOTO=y
CONFIG_IRQ_WORK=y
@ -395,11 +395,23 @@ CONFIG_PCI=y
CONFIG_PCI_DOMAINS=y
CONFIG_PCI_DOMAINS_GENERIC=y
CONFIG_PCI_SYSCALL=y
# CONFIG_PCIEPORTBUS is not set
CONFIG_PCIEPORTBUS=y
CONFIG_PCIEAER=y
# CONFIG_PCIEAER_INJECT is not set
# CONFIG_PCIE_ECRC is not set
CONFIG_PCIEASPM=y
# CONFIG_PCIEASPM_DEBUG is not set
# CONFIG_PCIEASPM_DEFAULT is not set
# CONFIG_PCIEASPM_POWERSAVE is not set
# CONFIG_PCIEASPM_POWER_SUPERSAVE is not set
CONFIG_PCIEASPM_PERFORMANCE=y
CONFIG_PCIE_PME=y
# CONFIG_PCIE_DPC is not set
# CONFIG_PCIE_PTM is not set
CONFIG_PCI_MSI=y
CONFIG_PCI_MSI_IRQ_DOMAIN=y
CONFIG_PCI_QUIRKS=y
# CONFIG_PCI_DEBUG is not set
CONFIG_PCI_DEBUG=y
# CONFIG_PCI_STUB is not set
# CONFIG_PCI_IOV is not set
# CONFIG_PCI_PRI is not set
@ -816,6 +828,8 @@ CONFIG_XFRM_IPCOMP=m
CONFIG_NET_KEY=y
# CONFIG_NET_KEY_MIGRATE is not set
CONFIG_INET=y
CONFIG_WIREGUARD=m
# CONFIG_WIREGUARD_DEBUG is not set
CONFIG_IP_MULTICAST=y
CONFIG_IP_ADVANCED_ROUTER=y
CONFIG_IP_FIB_TRIE_STATS=y
@ -981,8 +995,8 @@ CONFIG_NF_NAT_REDIRECT=y
CONFIG_NETFILTER_SYNPROXY=m
CONFIG_NF_TABLES=m
CONFIG_NF_TABLES_SET=m
# CONFIG_NF_TABLES_INET is not set
# CONFIG_NF_TABLES_NETDEV is not set
CONFIG_NF_TABLES_INET=y
CONFIG_NF_TABLES_NETDEV=y
CONFIG_NFT_NUMGEN=m
CONFIG_NFT_CT=m
CONFIG_NFT_FLOW_OFFLOAD=m
@ -998,11 +1012,18 @@ CONFIG_NFT_OBJREF=m
CONFIG_NFT_QUEUE=m
CONFIG_NFT_QUOTA=m
CONFIG_NFT_REJECT=m
CONFIG_NFT_REJECT_INET=m
CONFIG_NFT_COMPAT=m
CONFIG_NFT_HASH=m
CONFIG_NFT_FIB=m
CONFIG_NFT_FIB_INET=m
CONFIG_NFT_SOCKET=m
CONFIG_NFT_OSF=m
CONFIG_NFT_TPROXY=m
CONFIG_NF_DUP_NETDEV=m
CONFIG_NFT_DUP_NETDEV=m
CONFIG_NFT_FWD_NETDEV=m
CONFIG_NFT_FIB_NETDEV=m
CONFIG_NF_FLOW_TABLE_INET=m
CONFIG_NF_FLOW_TABLE=m
CONFIG_NETFILTER_XTABLES=m
@ -1166,8 +1187,12 @@ CONFIG_IP_VS_PE_SIP=m
CONFIG_NF_DEFRAG_IPV4=m
CONFIG_NF_SOCKET_IPV4=y
CONFIG_NF_TPROXY_IPV4=m
# CONFIG_NF_TABLES_IPV4 is not set
# CONFIG_NF_TABLES_ARP is not set
CONFIG_NF_TABLES_IPV4=y
CONFIG_NFT_CHAIN_ROUTE_IPV4=m
CONFIG_NFT_REJECT_IPV4=m
CONFIG_NFT_DUP_IPV4=m
CONFIG_NFT_FIB_IPV4=m
CONFIG_NF_TABLES_ARP=y
CONFIG_NF_FLOW_TABLE_IPV4=m
CONFIG_NF_DUP_IPV4=m
CONFIG_NF_LOG_ARP=m
@ -1175,6 +1200,9 @@ CONFIG_NF_LOG_IPV4=m
CONFIG_NF_REJECT_IPV4=m
CONFIG_NF_NAT_IPV4=m
CONFIG_NF_NAT_MASQUERADE_IPV4=y
CONFIG_NFT_CHAIN_NAT_IPV4=m
CONFIG_NFT_MASQ_IPV4=m
CONFIG_NFT_REDIR_IPV4=m
CONFIG_NF_NAT_SNMP_BASIC=m
CONFIG_NF_NAT_PROTO_GRE=m
CONFIG_NF_NAT_PPTP=m
@ -1206,7 +1234,14 @@ CONFIG_IP_NF_ARP_MANGLE=m
#
CONFIG_NF_SOCKET_IPV6=m
CONFIG_NF_TPROXY_IPV6=m
# CONFIG_NF_TABLES_IPV6 is not set
CONFIG_NF_TABLES_IPV6=y
CONFIG_NFT_CHAIN_ROUTE_IPV6=m
CONFIG_NFT_CHAIN_NAT_IPV6=m
CONFIG_NFT_MASQ_IPV6=m
CONFIG_NFT_REDIR_IPV6=m
CONFIG_NFT_REJECT_IPV6=m
CONFIG_NFT_DUP_IPV6=m
CONFIG_NFT_FIB_IPV6=m
CONFIG_NF_FLOW_TABLE_IPV6=m
CONFIG_NF_DUP_IPV6=m
CONFIG_NF_REJECT_IPV6=m
@ -1235,7 +1270,9 @@ CONFIG_IP6_NF_NAT=m
CONFIG_IP6_NF_TARGET_MASQUERADE=m
CONFIG_IP6_NF_TARGET_NPT=m
CONFIG_NF_DEFRAG_IPV6=m
# CONFIG_NF_TABLES_BRIDGE is not set
CONFIG_NF_TABLES_BRIDGE=y
CONFIG_NFT_BRIDGE_REJECT=m
CONFIG_NF_LOG_BRIDGE=m
CONFIG_BRIDGE_NF_EBTABLES=m
CONFIG_BRIDGE_EBT_BROUTE=m
CONFIG_BRIDGE_EBT_T_FILTER=m
@ -1707,7 +1744,7 @@ CONFIG_MTD_M25P80=y
# Disk-On-Chip Device Drivers
#
# CONFIG_MTD_DOCG3 is not set
CONFIG_MTD_NAND_CORE=m
CONFIG_MTD_NAND_CORE=y
# CONFIG_MTD_ONENAND is not set
# CONFIG_MTD_NAND is not set
CONFIG_MTD_SPI_NAND=y
@ -2556,6 +2593,7 @@ CONFIG_RTL8XXXU_UNTESTED=y
# CONFIG_WLAN_VENDOR_TI is not set
CONFIG_RTL8822BU=m
CONFIG_RTL8188EU=m
CONFIG_RTL8821CU=m
CONFIG_RTL8812AU=m
# CONFIG_WLAN_VENDOR_ZYDAS is not set
CONFIG_WLAN_VENDOR_QUANTENNA=y
@ -2774,7 +2812,21 @@ CONFIG_I2C=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_COMPAT=y
CONFIG_I2C_CHARDEV=y
# CONFIG_I2C_MUX is not set
CONFIG_I2C_MUX=m
#
# Multiplexer I2C Chip support
#
# CONFIG_I2C_ARB_GPIO_CHALLENGE is not set
# CONFIG_I2C_MUX_GPIO is not set
# CONFIG_I2C_MUX_GPMUX is not set
# CONFIG_I2C_MUX_LTC4306 is not set
# CONFIG_I2C_MUX_PCA9541 is not set
# CONFIG_I2C_MUX_PCA954x is not set
# CONFIG_I2C_MUX_PINCTRL is not set
# CONFIG_I2C_MUX_REG is not set
# CONFIG_I2C_DEMUX_PINCTRL is not set
# CONFIG_I2C_MUX_MLXCPLD is not set
CONFIG_I2C_HELPER_AUTO=y
#
@ -3128,6 +3180,7 @@ CONFIG_THERMAL_GOV_STEP_WISE=y
# CONFIG_THERMAL_GOV_POWER_ALLOCATOR is not set
# CONFIG_CPU_THERMAL is not set
# CONFIG_CLOCK_THERMAL is not set
# CONFIG_DEVFREQ_THERMAL is not set
# CONFIG_THERMAL_EMULATION is not set
# CONFIG_QORIQ_THERMAL is not set
# CONFIG_DOVE_THERMAL is not set
@ -3354,7 +3407,188 @@ CONFIG_REGULATOR_SY8106A=m
# CONFIG_REGULATOR_TPS6524X is not set
CONFIG_REGULATOR_VCTRL=y
# CONFIG_RC_CORE is not set
# CONFIG_MEDIA_SUPPORT is not set
CONFIG_MEDIA_SUPPORT=m
#
# Multimedia core support
#
# CONFIG_MEDIA_CAMERA_SUPPORT is not set
# CONFIG_MEDIA_ANALOG_TV_SUPPORT is not set
CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y
# CONFIG_MEDIA_RADIO_SUPPORT is not set
# CONFIG_MEDIA_SDR_SUPPORT is not set
CONFIG_MEDIA_CEC_SUPPORT=y
# CONFIG_MEDIA_CONTROLLER is not set
# CONFIG_VIDEO_ADV_DEBUG is not set
# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
CONFIG_DVB_CORE=m
CONFIG_DVB_NET=y
CONFIG_DVB_MAX_ADAPTERS=16
# CONFIG_DVB_DYNAMIC_MINORS is not set
# CONFIG_DVB_DEMUX_SECTION_LOSS_LOG is not set
# CONFIG_DVB_ULE_DEBUG is not set
#
# Media drivers
#
CONFIG_MEDIA_USB_SUPPORT=y
#
# Analog/digital TV USB devices
#
#
# Digital TV USB devices
#
CONFIG_DVB_USB_V2=m
CONFIG_DVB_USB_AF9015=m
CONFIG_DVB_USB_AF9035=m
CONFIG_DVB_USB_ANYSEE=m
CONFIG_DVB_USB_AU6610=m
CONFIG_DVB_USB_AZ6007=m
CONFIG_DVB_USB_CE6230=m
CONFIG_DVB_USB_EC168=m
CONFIG_DVB_USB_GL861=m
CONFIG_DVB_USB_MXL111SF=m
CONFIG_DVB_USB_RTL28XXU=m
CONFIG_DVB_USB_DVBSKY=m
CONFIG_DVB_USB_ZD1301=m
# CONFIG_DVB_TTUSB_BUDGET is not set
# CONFIG_DVB_TTUSB_DEC is not set
# CONFIG_SMS_USB_DRV is not set
# CONFIG_DVB_B2C2_FLEXCOP_USB is not set
# CONFIG_DVB_AS102 is not set
#
# Webcam, TV (analog/digital) USB devices
#
#
# USB HDMI CEC adapters
#
# CONFIG_USB_PULSE8_CEC is not set
# CONFIG_USB_RAINSHADOW_CEC is not set
# CONFIG_MEDIA_PCI_SUPPORT is not set
# CONFIG_DVB_PLATFORM_DRIVERS is not set
# CONFIG_CEC_PLATFORM_DRIVERS is not set
#
# Supported MMC/SDIO adapters
#
# CONFIG_SMS_SDIO_DRV is not set
CONFIG_VIDEO_TVEEPROM=m
CONFIG_CYPRESS_FIRMWARE=m
#
# Media ancillary drivers (tuners, sensors, i2c, spi, frontends)
#
CONFIG_MEDIA_SUBDRV_AUTOSELECT=y
CONFIG_MEDIA_ATTACH=y
#
# Media SPI Adapters
#
# CONFIG_CXD2880_SPI_DRV is not set
CONFIG_MEDIA_TUNER=m
CONFIG_MEDIA_TUNER_SIMPLE=m
CONFIG_MEDIA_TUNER_TDA8290=m
CONFIG_MEDIA_TUNER_TDA827X=m
CONFIG_MEDIA_TUNER_TDA18271=m
CONFIG_MEDIA_TUNER_TDA9887=m
CONFIG_MEDIA_TUNER_MT20XX=m
CONFIG_MEDIA_TUNER_MT2060=m
CONFIG_MEDIA_TUNER_MT2063=m
CONFIG_MEDIA_TUNER_QT1010=m
CONFIG_MEDIA_TUNER_XC2028=m
CONFIG_MEDIA_TUNER_XC5000=m
CONFIG_MEDIA_TUNER_XC4000=m
CONFIG_MEDIA_TUNER_MXL5005S=m
CONFIG_MEDIA_TUNER_MXL5007T=m
CONFIG_MEDIA_TUNER_MC44S803=m
CONFIG_MEDIA_TUNER_TDA18218=m
CONFIG_MEDIA_TUNER_FC0011=m
CONFIG_MEDIA_TUNER_FC0012=m
CONFIG_MEDIA_TUNER_FC0013=m
CONFIG_MEDIA_TUNER_TDA18212=m
CONFIG_MEDIA_TUNER_E4000=m
CONFIG_MEDIA_TUNER_FC2580=m
CONFIG_MEDIA_TUNER_TUA9001=m
CONFIG_MEDIA_TUNER_SI2157=m
CONFIG_MEDIA_TUNER_IT913X=m
CONFIG_MEDIA_TUNER_R820T=m
#
# Multistandard (satellite) frontends
#
CONFIG_DVB_M88DS3103=m
#
# Multistandard (cable + terrestrial) frontends
#
CONFIG_DVB_DRXK=m
CONFIG_DVB_MN88472=m
CONFIG_DVB_MN88473=m
#
# DVB-S (satellite) frontends
#
CONFIG_DVB_STV6110=m
CONFIG_DVB_STV0900=m
CONFIG_DVB_CX24116=m
CONFIG_DVB_TS2020=m
#
# DVB-T (terrestrial) frontends
#
CONFIG_DVB_MT352=m
CONFIG_DVB_ZL10353=m
CONFIG_DVB_AF9013=m
CONFIG_DVB_EC100=m
CONFIG_DVB_CXD2820R=m
CONFIG_DVB_RTL2830=m
CONFIG_DVB_RTL2832=m
CONFIG_DVB_SI2168=m
CONFIG_DVB_ZD1301_DEMOD=m
#
# DVB-C (cable) frontends
#
CONFIG_DVB_TDA10023=m
#
# ATSC (North American/Korean Terrestrial/Cable DTV) frontends
#
CONFIG_DVB_LGDT3305=m
CONFIG_DVB_LG2160=m
#
# ISDB-T (terrestrial) frontends
#
#
# ISDB-S (satellite) & ISDB-T (terrestrial) frontends
#
CONFIG_DVB_TC90522=m
#
# Digital terrestrial only tuners/PLL
#
CONFIG_DVB_PLL=m
#
# SEC control devices for DVB-S
#
CONFIG_DVB_ISL6423=m
CONFIG_DVB_AF9033=m
#
# Common Interface (EN50221) controller drivers
#
CONFIG_DVB_SP2=m
#
# Tools to develop new frontends
#
#
# Graphics support
@ -3690,7 +3924,6 @@ CONFIG_USB_SERIAL_OPTION=m
# CONFIG_USB_EMI26 is not set
# CONFIG_USB_ADUTUX is not set
# CONFIG_USB_SEVSEG is not set
# CONFIG_USB_RIO500 is not set
# CONFIG_USB_LEGOTOWER is not set
# CONFIG_USB_LCD is not set
# CONFIG_USB_CYPRESS_CY7C63 is not set
@ -3782,7 +4015,7 @@ CONFIG_MMC_CQHCI=m
# CONFIG_MMC_TOSHIBA_PCI is not set
# CONFIG_MMC_MTK is not set
# CONFIG_MMC_SDHCI_XENON is not set
CONFIG_MMC_SDHCI_OMAP=m
# CONFIG_MMC_SDHCI_OMAP is not set
# CONFIG_MEMSTICK is not set
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
@ -3855,6 +4088,7 @@ CONFIG_LEDS_TRIGGER_NETDEV=m
# CONFIG_INFINIBAND is not set
CONFIG_EDAC_ATOMIC_SCRUB=y
CONFIG_EDAC_SUPPORT=y
# CONFIG_EDAC is not set
CONFIG_RTC_LIB=y
CONFIG_RTC_CLASS=y
# CONFIG_RTC_HCTOSYS is not set
@ -4167,7 +4401,6 @@ CONFIG_CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK=y
CONFIG_RPMSG=m
CONFIG_RPMSG_CHAR=m
CONFIG_RPMSG_VIRTIO=m
# CONFIG_SOUNDWIRE is not set
#
# SOC (System On Chip) specific Drivers
@ -4423,6 +4656,7 @@ CONFIG_IIO=m
# CONFIG_BMI160_I2C is not set
# CONFIG_BMI160_SPI is not set
# CONFIG_KMX61 is not set
# CONFIG_INV_MPU6050_I2C is not set
# CONFIG_INV_MPU6050_SPI is not set
# CONFIG_IIO_ST_LSM6DSX is not set

365
config/kernel/linux-mvebu-dev.config
View file

@ -1005,7 +1005,7 @@ CONFIG_NFT_COMPAT=m
CONFIG_NFT_HASH=m
CONFIG_NFT_FIB=m
CONFIG_NFT_FIB_INET=m
# CONFIG_NFT_XFRM is not set
CONFIG_NFT_XFRM=m
CONFIG_NFT_SOCKET=m
CONFIG_NFT_OSF=m
CONFIG_NFT_TPROXY=m
@ -1626,11 +1626,24 @@ CONFIG_PCI=y
CONFIG_PCI_DOMAINS=y
CONFIG_PCI_DOMAINS_GENERIC=y
CONFIG_PCI_SYSCALL=y
# CONFIG_PCIEPORTBUS is not set
CONFIG_PCIEPORTBUS=y
CONFIG_PCIEAER=y
# CONFIG_PCIEAER_INJECT is not set
# CONFIG_PCIE_ECRC is not set
CONFIG_PCIEASPM=y
# CONFIG_PCIEASPM_DEBUG is not set
# CONFIG_PCIEASPM_DEFAULT is not set
# CONFIG_PCIEASPM_POWERSAVE is not set
# CONFIG_PCIEASPM_POWER_SUPERSAVE is not set
CONFIG_PCIEASPM_PERFORMANCE=y
CONFIG_PCIE_PME=y
# CONFIG_PCIE_DPC is not set
# CONFIG_PCIE_PTM is not set
CONFIG_PCIE_BW=y
CONFIG_PCI_MSI=y
CONFIG_PCI_MSI_IRQ_DOMAIN=y
CONFIG_PCI_QUIRKS=y
# CONFIG_PCI_DEBUG is not set
CONFIG_PCI_DEBUG=y
# CONFIG_PCI_STUB is not set
CONFIG_PCI_BRIDGE_EMUL=y
# CONFIG_PCI_IOV is not set
@ -1679,6 +1692,7 @@ CONFIG_PCI_MVEBU=y
# CONFIG_PCCARD is not set
CONFIG_RAPIDIO=m
# CONFIG_RAPIDIO_TSI721 is not set
CONFIG_RAPIDIO_DISC_TIMEOUT=30
# CONFIG_RAPIDIO_ENABLE_RX_TX_PORTS is not set
# CONFIG_RAPIDIO_DMA_ENGINE is not set
@ -1844,7 +1858,7 @@ CONFIG_MTD_NAND_CAFE=m
CONFIG_MTD_NAND_ORION=m
CONFIG_MTD_NAND_MARVELL=m
CONFIG_MTD_NAND_BRCMNAND=m
CONFIG_MTD_NAND_MXIC=m
# CONFIG_MTD_NAND_MXIC is not set
CONFIG_MTD_NAND_GPIO=m
CONFIG_MTD_NAND_PLATFORM=m
@ -2212,7 +2226,9 @@ CONFIG_MD_RAID10=m
CONFIG_MD_RAID456=m
# CONFIG_MD_MULTIPATH is not set
# CONFIG_MD_FAULTY is not set
# CONFIG_BCACHE is not set
CONFIG_BCACHE=m
# CONFIG_BCACHE_DEBUG is not set
# CONFIG_BCACHE_CLOSURES_DEBUG is not set
CONFIG_BLK_DEV_DM_BUILTIN=y
CONFIG_BLK_DEV_DM=y
# CONFIG_DM_DEBUG is not set
@ -2523,10 +2539,10 @@ CONFIG_USB_USBNET=m
CONFIG_USB_NET_AX8817X=m
CONFIG_USB_NET_AX88179_178A=m
CONFIG_USB_NET_CDCETHER=m
# CONFIG_USB_NET_CDC_EEM is not set
CONFIG_USB_NET_CDC_EEM=m
CONFIG_USB_NET_CDC_NCM=m
# CONFIG_USB_NET_HUAWEI_CDC_NCM is not set
# CONFIG_USB_NET_CDC_MBIM is not set
CONFIG_USB_NET_HUAWEI_CDC_NCM=m
CONFIG_USB_NET_CDC_MBIM=m
# CONFIG_USB_NET_DM9601 is not set
# CONFIG_USB_NET_SR9700 is not set
# CONFIG_USB_NET_SR9800 is not set
@ -2548,11 +2564,11 @@ CONFIG_USB_ARMLINUX=y
CONFIG_USB_NET_ZAURUS=m
# CONFIG_USB_NET_CX82310_ETH is not set
# CONFIG_USB_NET_KALMIA is not set
# CONFIG_USB_NET_QMI_WWAN is not set
# CONFIG_USB_HSO is not set
CONFIG_USB_NET_QMI_WWAN=m
CONFIG_USB_HSO=m
# CONFIG_USB_NET_INT51X1 is not set
# CONFIG_USB_IPHETH is not set
# CONFIG_USB_SIERRA_NET is not set
CONFIG_USB_SIERRA_NET=m
# CONFIG_USB_VL600 is not set
# CONFIG_USB_NET_CH9200 is not set
CONFIG_USB_NET_AQC111=m
@ -2576,7 +2592,7 @@ CONFIG_ATH9K_PCI=y
CONFIG_ATH9K_RFKILL=y
CONFIG_ATH9K_CHANNEL_CONTEXT=y
CONFIG_ATH9K_PCOEM=y
CONFIG_ATH9K_PCI_NO_EEPROM=m
# CONFIG_ATH9K_PCI_NO_EEPROM is not set
CONFIG_ATH9K_HTC=m
# CONFIG_ATH9K_HTC_DEBUGFS is not set
CONFIG_ATH9K_HWRNG=y
@ -2990,7 +3006,23 @@ CONFIG_I2C=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_COMPAT=y
CONFIG_I2C_CHARDEV=y
# CONFIG_I2C_MUX is not set
CONFIG_I2C_MUX=y
#
# Multiplexer I2C Chip support
#
# CONFIG_I2C_ARB_GPIO_CHALLENGE is not set
# CONFIG_I2C_MUX_GPIO is not set
# CONFIG_I2C_MUX_GPMUX is not set
# CONFIG_I2C_MUX_LTC4306 is not set
# CONFIG_I2C_MUX_PCA9541 is not set
# CONFIG_I2C_MUX_PCA954x is not set
# CONFIG_I2C_MUX_PINCTRL is not set
# CONFIG_I2C_MUX_REG is not set
# CONFIG_I2C_DEMUX_PINCTRL is not set
# CONFIG_I2C_MUX_MLXCPLD is not set
# end of Multiplexer I2C Chip support
CONFIG_I2C_HELPER_AUTO=y
#
@ -3367,8 +3399,8 @@ CONFIG_THERMAL_GOV_STEP_WISE=y
# CONFIG_THERMAL_GOV_BANG_BANG is not set
# CONFIG_THERMAL_GOV_USER_SPACE is not set
# CONFIG_THERMAL_GOV_POWER_ALLOCATOR is not set
# CONFIG_CPU_THERMAL is not set
# CONFIG_CLOCK_THERMAL is not set
CONFIG_CPU_THERMAL=y
CONFIG_CLOCK_THERMAL=y
# CONFIG_THERMAL_EMULATION is not set
CONFIG_THERMAL_MMIO=m
# CONFIG_QORIQ_THERMAL is not set
@ -3601,7 +3633,286 @@ CONFIG_REGULATOR_STPMIC1=m
# CONFIG_REGULATOR_TPS6524X is not set
CONFIG_REGULATOR_VCTRL=y
# CONFIG_RC_CORE is not set
# CONFIG_MEDIA_SUPPORT is not set
CONFIG_MEDIA_SUPPORT=m
#
# Multimedia core support
#
# CONFIG_MEDIA_CAMERA_SUPPORT is not set
# CONFIG_MEDIA_ANALOG_TV_SUPPORT is not set
CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y
CONFIG_MEDIA_RADIO_SUPPORT=y
# CONFIG_MEDIA_SDR_SUPPORT is not set
CONFIG_MEDIA_CEC_SUPPORT=y
# CONFIG_MEDIA_CONTROLLER is not set
CONFIG_VIDEO_DEV=m
CONFIG_VIDEO_V4L2=m
CONFIG_VIDEO_V4L2_I2C=y
# CONFIG_VIDEO_ADV_DEBUG is not set
# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
CONFIG_DVB_CORE=m
# CONFIG_DVB_MMAP is not set
CONFIG_DVB_NET=y
CONFIG_DVB_MAX_ADAPTERS=16
# CONFIG_DVB_DYNAMIC_MINORS is not set
# CONFIG_DVB_DEMUX_SECTION_LOSS_LOG is not set
# CONFIG_DVB_ULE_DEBUG is not set
#
# Media drivers
#
CONFIG_MEDIA_USB_SUPPORT=y
#
# Analog/digital TV USB devices
#
# CONFIG_VIDEO_AU0828 is not set
# CONFIG_VIDEO_CX231XX is not set
#
# Digital TV USB devices
#
CONFIG_DVB_USB_V2=m
CONFIG_DVB_USB_AF9015=m
CONFIG_DVB_USB_AF9035=m
CONFIG_DVB_USB_ANYSEE=m
CONFIG_DVB_USB_AU6610=m
CONFIG_DVB_USB_AZ6007=m
CONFIG_DVB_USB_CE6230=m
CONFIG_DVB_USB_EC168=m
CONFIG_DVB_USB_GL861=m
CONFIG_DVB_USB_MXL111SF=m
CONFIG_DVB_USB_RTL28XXU=m
CONFIG_DVB_USB_DVBSKY=m
CONFIG_DVB_USB_ZD1301=m
# CONFIG_DVB_TTUSB_BUDGET is not set
# CONFIG_DVB_TTUSB_DEC is not set
# CONFIG_SMS_USB_DRV is not set
# CONFIG_DVB_B2C2_FLEXCOP_USB is not set
# CONFIG_DVB_AS102 is not set
#
# Webcam, TV (analog/digital) USB devices
#
# CONFIG_VIDEO_EM28XX is not set
#
# USB HDMI CEC adapters
#
# CONFIG_USB_PULSE8_CEC is not set
# CONFIG_USB_RAINSHADOW_CEC is not set
# CONFIG_MEDIA_PCI_SUPPORT is not set
# CONFIG_DVB_PLATFORM_DRIVERS is not set
# CONFIG_CEC_PLATFORM_DRIVERS is not set
#
# Supported MMC/SDIO adapters
#
# CONFIG_SMS_SDIO_DRV is not set
CONFIG_RADIO_ADAPTERS=y
# CONFIG_RADIO_SI470X is not set
# CONFIG_RADIO_SI4713 is not set
# CONFIG_USB_MR800 is not set
# CONFIG_USB_DSBR is not set
# CONFIG_RADIO_MAXIRADIO is not set
# CONFIG_RADIO_SHARK is not set
# CONFIG_RADIO_SHARK2 is not set
# CONFIG_USB_KEENE is not set
# CONFIG_USB_RAREMONO is not set
# CONFIG_USB_MA901 is not set
# CONFIG_RADIO_TEA5764 is not set
# CONFIG_RADIO_SAA7706H is not set
# CONFIG_RADIO_TEF6862 is not set
# CONFIG_RADIO_WL1273 is not set
#
# Texas Instruments WL128x FM driver (ST based)
#
# end of Texas Instruments WL128x FM driver (ST based)
CONFIG_VIDEO_TVEEPROM=m
CONFIG_CYPRESS_FIRMWARE=m
#
# Media ancillary drivers (tuners, sensors, i2c, spi, frontends)
#
CONFIG_MEDIA_SUBDRV_AUTOSELECT=y
CONFIG_MEDIA_HIDE_ANCILLARY_SUBDRV=y
CONFIG_MEDIA_ATTACH=y
#
# I2C drivers hidden by 'Autoselect ancillary drivers'
#
#
# Audio decoders, processors and mixers
#
#
# RDS decoders
#
#
# Video decoders
#
#
# Video and audio decoders
#
#
# Video encoders
#
#
# Camera sensor devices
#
#
# Lens drivers
#
#
# Flash devices
#
#
# Video improvement chips
#
#
# Audio/Video compression chips
#
#
# SDR tuner chips
#
#
# Miscellaneous helper chips
#
#
# SPI drivers hidden by 'Autoselect ancillary drivers'
#
#
# Media SPI Adapters
#
# CONFIG_CXD2880_SPI_DRV is not set
# end of Media SPI Adapters
CONFIG_MEDIA_TUNER=m
#
# Tuner drivers hidden by 'Autoselect ancillary drivers'
#
CONFIG_MEDIA_TUNER_SIMPLE=m
CONFIG_MEDIA_TUNER_TDA8290=m
CONFIG_MEDIA_TUNER_TDA827X=m
CONFIG_MEDIA_TUNER_TDA18271=m
CONFIG_MEDIA_TUNER_TDA9887=m
CONFIG_MEDIA_TUNER_TEA5761=m
CONFIG_MEDIA_TUNER_TEA5767=m
CONFIG_MEDIA_TUNER_MT20XX=m
CONFIG_MEDIA_TUNER_MT2060=m
CONFIG_MEDIA_TUNER_MT2063=m
CONFIG_MEDIA_TUNER_QT1010=m
CONFIG_MEDIA_TUNER_XC2028=m
CONFIG_MEDIA_TUNER_XC5000=m
CONFIG_MEDIA_TUNER_XC4000=m
CONFIG_MEDIA_TUNER_MXL5005S=m
CONFIG_MEDIA_TUNER_MXL5007T=m
CONFIG_MEDIA_TUNER_MC44S803=m
CONFIG_MEDIA_TUNER_TDA18218=m
CONFIG_MEDIA_TUNER_FC0011=m
CONFIG_MEDIA_TUNER_FC0012=m
CONFIG_MEDIA_TUNER_FC0013=m
CONFIG_MEDIA_TUNER_TDA18212=m
CONFIG_MEDIA_TUNER_E4000=m
CONFIG_MEDIA_TUNER_FC2580=m
CONFIG_MEDIA_TUNER_TUA9001=m
CONFIG_MEDIA_TUNER_SI2157=m
CONFIG_MEDIA_TUNER_IT913X=m
CONFIG_MEDIA_TUNER_R820T=m
#
# DVB Frontend drivers hidden by 'Autoselect ancillary drivers'
#
#
# Multistandard (satellite) frontends
#
CONFIG_DVB_M88DS3103=m
#
# Multistandard (cable + terrestrial) frontends
#
CONFIG_DVB_DRXK=m
CONFIG_DVB_MN88472=m
CONFIG_DVB_MN88473=m
#
# DVB-S (satellite) frontends
#
CONFIG_DVB_STV6110=m
CONFIG_DVB_STV0900=m
CONFIG_DVB_CX24116=m
CONFIG_DVB_TS2020=m
#
# DVB-T (terrestrial) frontends
#
CONFIG_DVB_MT352=m
CONFIG_DVB_ZL10353=m
CONFIG_DVB_AF9013=m
CONFIG_DVB_EC100=m
CONFIG_DVB_CXD2820R=m
CONFIG_DVB_CXD2841ER=m
CONFIG_DVB_RTL2830=m
CONFIG_DVB_RTL2832=m
CONFIG_DVB_SI2168=m
CONFIG_DVB_ZD1301_DEMOD=m
#
# DVB-C (cable) frontends
#
CONFIG_DVB_TDA10023=m
#
# ATSC (North American/Korean Terrestrial/Cable DTV) frontends
#
CONFIG_DVB_LGDT3305=m
CONFIG_DVB_LG2160=m
#
# ISDB-T (terrestrial) frontends
#
#
# ISDB-S (satellite) & ISDB-T (terrestrial) frontends
#
CONFIG_DVB_TC90522=m
#
# Digital terrestrial only tuners/PLL
#
CONFIG_DVB_PLL=m
#
# SEC control devices for DVB-S
#
CONFIG_DVB_ISL6423=m
CONFIG_DVB_AF9033=m
#
# Common Interface (EN50221) controller drivers
#
CONFIG_DVB_SP2=m
#
# Tools to develop new frontends
#
#
# Graphics support
@ -4153,9 +4464,11 @@ CONFIG_LEDS_TRIGGER_AUDIO=m
# CONFIG_INFINIBAND is not set
CONFIG_EDAC_ATOMIC_SCRUB=y
CONFIG_EDAC_SUPPORT=y
# CONFIG_EDAC is not set
CONFIG_RTC_LIB=y
CONFIG_RTC_CLASS=y
# CONFIG_RTC_HCTOSYS is not set
CONFIG_RTC_HCTOSYS=y
CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
CONFIG_RTC_SYSTOHC=y
CONFIG_RTC_SYSTOHC_DEVICE="rtc0"
# CONFIG_RTC_DEBUG is not set
@ -4164,7 +4477,7 @@ CONFIG_RTC_NVMEM=y
#
# RTC interfaces
#
# CONFIG_RTC_INTF_SYSFS is not set
CONFIG_RTC_INTF_SYSFS=y
# CONFIG_RTC_INTF_PROC is not set
CONFIG_RTC_INTF_DEV=y
# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
@ -4290,7 +4603,7 @@ CONFIG_DW_EDMA_PCIE=m
#
# DMA Clients
#
# CONFIG_ASYNC_TX_DMA is not set
CONFIG_ASYNC_TX_DMA=y
# CONFIG_DMATEST is not set
CONFIG_DMA_ENGINE_RAID=y
@ -4426,7 +4739,14 @@ CONFIG_ARCX_ANYBUS_CONTROLLER=m
CONFIG_HMS_PROFINET=m
# CONFIG_USB_WUSB_CBAF is not set
# CONFIG_UWB is not set
# CONFIG_EXFAT_FS is not set
CONFIG_EXFAT_FS=m
CONFIG_EXFAT_DONT_MOUNT_VFAT=y
CONFIG_EXFAT_DISCARD=y
# CONFIG_EXFAT_DELAYED_SYNC is not set
# CONFIG_EXFAT_KERNEL_DEBUG is not set
# CONFIG_EXFAT_DEBUG_MSG is not set
CONFIG_EXFAT_DEFAULT_CODEPAGE=437
CONFIG_EXFAT_DEFAULT_IOCHARSET="utf8"
# CONFIG_QLGE is not set
# CONFIG_GOLDFISH is not set
# CONFIG_MFD_CROS_EC is not set
@ -4803,6 +5123,7 @@ CONFIG_XILINX_XADC=m
# CONFIG_BMI160_I2C is not set
# CONFIG_BMI160_SPI is not set
# CONFIG_KMX61 is not set
# CONFIG_INV_MPU6050_I2C is not set
# CONFIG_INV_MPU6050_SPI is not set
# CONFIG_IIO_ST_LSM6DSX is not set
# end of Inertial measurement units
@ -5024,7 +5345,7 @@ CONFIG_ARM_CCI_PMU=m
CONFIG_ARM_PMU=y
# end of Performance monitor support
# CONFIG_RAS is not set
CONFIG_RAS=y
#
# Android
@ -5637,7 +5958,7 @@ CONFIG_CRC32_SLICEBY8=y
# CONFIG_CRC32_SLICEBY4 is not set
# CONFIG_CRC32_SARWATE is not set
# CONFIG_CRC32_BIT is not set
# CONFIG_CRC64 is not set
CONFIG_CRC64=m
CONFIG_CRC4=y
CONFIG_CRC7=m
CONFIG_LIBCRC32C=y

72
config/kernel/linux-mvebu64-current.config
View file

@ -1,13 +1,13 @@
#
# Automatically generated file; DO NOT EDIT.
# Linux/arm64 4.19.53 Kernel Configuration
# Linux/arm64 4.19.91 Kernel Configuration
#
#
# Compiler: aarch64-linux-gnu-gcc (Linaro GCC 7.4-2019.02) 7.4.1 20181213 [linaro-7.4-2019.02 revision 56ec6f6b99cc167ff0c2f8e1a2eed33b1edc85d4]
# Compiler: aarch64-linux-gnu-gcc (GNU Toolchain for the A-profile Architecture 8.3-2019.03 (arm-rel-8.36)) 8.3.0
#
CONFIG_CC_IS_GCC=y
CONFIG_GCC_VERSION=70401
CONFIG_GCC_VERSION=80300
CONFIG_CLANG_VERSION=0
CONFIG_CC_HAS_ASM_GOTO=y
CONFIG_IRQ_WORK=y
@ -541,6 +541,7 @@ CONFIG_ARM_SCPI_POWER_DOMAIN=m
# CONFIG_FIRMWARE_MEMMAP is not set
CONFIG_DMIID=y
# CONFIG_DMI_SYSFS is not set
CONFIG_ISCSI_IBFT=m
# CONFIG_FW_CFG_SYSFS is not set
CONFIG_HAVE_ARM_SMCCC=y
# CONFIG_GOOGLE_FIRMWARE is not set
@ -1766,6 +1767,7 @@ CONFIG_DEV_COREDUMP=y
# CONFIG_TEST_ASYNC_DRIVER_PROBE is not set
CONFIG_SYS_HYPERVISOR=y
CONFIG_GENERIC_CPU_AUTOPROBE=y
CONFIG_GENERIC_CPU_VULNERABILITIES=y
CONFIG_REGMAP=y
CONFIG_REGMAP_I2C=y
CONFIG_REGMAP_SPI=y
@ -1926,6 +1928,7 @@ CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_LOOP_MIN_COUNT=8
CONFIG_BLK_DEV_CRYPTOLOOP=y
CONFIG_BLK_DEV_DRBD=m
# CONFIG_DRBD_FAULT_INJECTION is not set
CONFIG_BLK_DEV_NBD=m
# CONFIG_BLK_DEV_SKD is not set
# CONFIG_BLK_DEV_SX8 is not set
@ -2346,6 +2349,7 @@ CONFIG_NET_VENDOR_ALTEON=y
# CONFIG_ACENIC is not set
# CONFIG_ALTERA_TSE is not set
CONFIG_NET_VENDOR_AMAZON=y
CONFIG_ENA_ETHERNET=m
CONFIG_NET_VENDOR_AMD=y
# CONFIG_AMD8111_ETH is not set
# CONFIG_PCNET32 is not set
@ -2560,7 +2564,7 @@ CONFIG_SWPHY=y
# CONFIG_SFP is not set
# CONFIG_AMD_PHY is not set
# CONFIG_AQUANTIA_PHY is not set
CONFIG_ASIX_PHY=m
CONFIG_AX88796B_PHY=m
# CONFIG_AT803X_PHY is not set
CONFIG_BCM7XXX_PHY=m
# CONFIG_BCM87XX_PHY is not set
@ -2889,7 +2893,7 @@ CONFIG_WLCORE_SDIO=m
CONFIG_WILINK_PLATFORM_DATA=y
CONFIG_RTL8822BU=m
CONFIG_RTL8188EU=m
CONFIG_RTL8821AU=m
CONFIG_RTL8821CU=m
CONFIG_RTL8812AU=m
CONFIG_WLAN_VENDOR_ZYDAS=y
CONFIG_USB_ZD1201=m
@ -3672,7 +3676,6 @@ CONFIG_MFD_SYSCON=y
# CONFIG_MFD_TPS65086 is not set
# CONFIG_MFD_TPS65090 is not set
# CONFIG_MFD_TPS65217 is not set
# CONFIG_MFD_TPS68470 is not set
# CONFIG_MFD_TI_LP873X is not set
CONFIG_MFD_TI_LP87565=m
# CONFIG_MFD_TPS65218 is not set
@ -3907,10 +3910,10 @@ CONFIG_VGA_ARB_MAX_GPUS=16
#
# Frame buffer Devices
#
CONFIG_FB=y
# CONFIG_FIRMWARE_EDID is not set
CONFIG_FB_CMDLINE=y
CONFIG_FB_NOTIFY=y
CONFIG_FB=y
# CONFIG_FIRMWARE_EDID is not set
CONFIG_FB_CFB_FILLRECT=y
CONFIG_FB_CFB_COPYAREA=y
CONFIG_FB_CFB_IMAGEBLIT=y
@ -4224,9 +4227,58 @@ CONFIG_USB_ISP1760_DUAL_ROLE=y
CONFIG_USB_SERIAL=m
CONFIG_USB_SERIAL_GENERIC=y
CONFIG_USB_SERIAL_SIMPLE=m
CONFIG_USB_SERIAL_AIRCABLE=m
CONFIG_USB_SERIAL_ARK3116=m
CONFIG_USB_SERIAL_BELKIN=m
CONFIG_USB_SERIAL_CH341=m
CONFIG_USB_SERIAL_WHITEHEAT=m
CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m
CONFIG_USB_SERIAL_CP210X=m
CONFIG_USB_SERIAL_CYPRESS_M8=m
CONFIG_USB_SERIAL_EMPEG=m
CONFIG_USB_SERIAL_FTDI_SIO=m
CONFIG_USB_SERIAL_VISOR=m
CONFIG_USB_SERIAL_IPAQ=m
CONFIG_USB_SERIAL_IR=m
CONFIG_USB_SERIAL_EDGEPORT=m
CONFIG_USB_SERIAL_EDGEPORT_TI=m
CONFIG_USB_SERIAL_F81232=m
CONFIG_USB_SERIAL_F8153X=m
CONFIG_USB_SERIAL_GARMIN=m
CONFIG_USB_SERIAL_IPW=m
CONFIG_USB_SERIAL_IUU=m
CONFIG_USB_SERIAL_KEYSPAN_PDA=m
CONFIG_USB_SERIAL_KEYSPAN=m
CONFIG_USB_SERIAL_KLSI=m
CONFIG_USB_SERIAL_KOBIL_SCT=m
CONFIG_USB_SERIAL_MCT_U232=m
CONFIG_USB_SERIAL_METRO=m
CONFIG_USB_SERIAL_MOS7720=m
CONFIG_USB_SERIAL_MOS7840=m
CONFIG_USB_SERIAL_MXUPORT=m
CONFIG_USB_SERIAL_NAVMAN=m
CONFIG_USB_SERIAL_PL2303=m
CONFIG_USB_SERIAL_OTI6858=m
CONFIG_USB_SERIAL_QCAUX=m
CONFIG_USB_SERIAL_QUALCOMM=m
CONFIG_USB_SERIAL_SPCP8X5=m
CONFIG_USB_SERIAL_SAFE=m
# CONFIG_USB_SERIAL_SAFE_PADDED is not set
CONFIG_USB_SERIAL_SIERRAWIRELESS=m
CONFIG_USB_SERIAL_SYMBOL=m
CONFIG_USB_SERIAL_TI=m
CONFIG_USB_SERIAL_CYBERJACK=m
CONFIG_USB_SERIAL_XIRCOM=m
CONFIG_USB_SERIAL_WWAN=m
CONFIG_USB_SERIAL_OPTION=m
CONFIG_USB_SERIAL_OMNINET=m
CONFIG_USB_SERIAL_OPTICON=m
CONFIG_USB_SERIAL_XSENS_MT=m
CONFIG_USB_SERIAL_WISHBONE=m
CONFIG_USB_SERIAL_SSU100=m
CONFIG_USB_SERIAL_QT2=m
CONFIG_USB_SERIAL_UPD78F0730=m
CONFIG_USB_SERIAL_DEBUG=m
#
# USB Miscellaneous drivers
@ -4235,7 +4287,6 @@ CONFIG_USB_SERIAL_FTDI_SIO=m
# CONFIG_USB_EMI26 is not set
# CONFIG_USB_ADUTUX is not set
# CONFIG_USB_SEVSEG is not set
# CONFIG_USB_RIO500 is not set
# CONFIG_USB_LEGOTOWER is not set
# CONFIG_USB_LCD is not set
# CONFIG_USB_CYPRESS_CY7C63 is not set
@ -4251,7 +4302,7 @@ CONFIG_USB_SERIAL_FTDI_SIO=m
# CONFIG_USB_EHSET_TEST_FIXTURE is not set
# CONFIG_USB_ISIGHTFW is not set
# CONFIG_USB_YUREX is not set
# CONFIG_USB_EZUSB_FX2 is not set
CONFIG_USB_EZUSB_FX2=m
# CONFIG_USB_HUB_USB251XB is not set
# CONFIG_USB_HSIC_USB3503 is not set
# CONFIG_USB_HSIC_USB4604 is not set
@ -5470,6 +5521,7 @@ CONFIG_DQL=y
CONFIG_GLOB=y
# CONFIG_GLOB_SELFTEST is not set
CONFIG_NLATTR=y
CONFIG_LRU_CACHE=m
CONFIG_CLZ_TAB=y
CONFIG_CORDIC=m
# CONFIG_DDR is not set

1
config/kernel/linux-mvebu64-legacy.config
View file

@ -2620,6 +2620,7 @@ CONFIG_WLCORE_SDIO=m
CONFIG_WILINK_PLATFORM_DATA=y
CONFIG_RTL8822BU=m
CONFIG_RTL8188EU=m
CONFIG_RTL8821CU=m
CONFIG_RTL8812AU=m
CONFIG_WLAN_VENDOR_ZYDAS=y
CONFIG_USB_ZD1201=m

2
config/kernel/linux-rk3399-legacy.config
View file

@ -2388,6 +2388,7 @@ CONFIG_AP6XXX=y
# CONFIG_WL_TI is not set
CONFIG_RTL8822BU=m
CONFIG_RTL8188EU=m
CONFIG_RTL8821CU=m
CONFIG_RTL8812AU=m
# CONFIG_ZD1211RW is not set
CONFIG_MWIFIEX=y
@ -4971,7 +4972,6 @@ CONFIG_USB_CONFIGFS_F_UAC2=y
CONFIG_USB_CONFIGFS_F_MIDI=y
CONFIG_USB_CONFIGFS_F_HID=y
CONFIG_USB_CONFIGFS_F_UVC=y
# CONFIG_USB_CONFIGFS_F_UVC_ROCKCHIP is not set
CONFIG_USB_CONFIGFS_F_PRINTER=y
# CONFIG_USB_ZERO is not set
CONFIG_USB_AUDIO=m

12
config/kernel/linux-rockchip64-current.config
View file

@ -1791,6 +1791,7 @@ CONFIG_OF_RESERVED_MEM=y
CONFIG_OF_RESOLVE=y
CONFIG_OF_OVERLAY=y
CONFIG_OF_NUMA=y
CONFIG_OF_CONFIGFS=y
# CONFIG_PARPORT is not set
CONFIG_BLK_DEV=y
# CONFIG_BLK_DEV_NULL_BLK is not set
@ -1945,8 +1946,9 @@ CONFIG_SCSI_DMA=y
#
CONFIG_BLK_DEV_SD=y
# CONFIG_CHR_DEV_ST is not set
# CONFIG_BLK_DEV_SR is not set
# CONFIG_CHR_DEV_SG is not set
CONFIG_BLK_DEV_SR=m
CONFIG_BLK_DEV_SR_VENDOR=y
CONFIG_CHR_DEV_SG=m
# CONFIG_CHR_DEV_SCH is not set
# CONFIG_SCSI_CONSTANTS is not set
# CONFIG_SCSI_LOGGING is not set
@ -6686,8 +6688,10 @@ CONFIG_FSCACHE=m
#
# CD-ROM/DVD Filesystems
#
# CONFIG_ISO9660_FS is not set
# CONFIG_UDF_FS is not set
CONFIG_ISO9660_FS=m
CONFIG_JOLIET=y
CONFIG_ZISOFS=y
CONFIG_UDF_FS=m
# end of CD-ROM/DVD Filesystems
#

11
config/kernel/linux-rockchip64-dev.config
View file

@ -1934,8 +1934,9 @@ CONFIG_SCSI_DMA=y
#
CONFIG_BLK_DEV_SD=y
# CONFIG_CHR_DEV_ST is not set
# CONFIG_BLK_DEV_SR is not set
# CONFIG_CHR_DEV_SG is not set
CONFIG_BLK_DEV_SR=m
CONFIG_BLK_DEV_SR_VENDOR=y
CONFIG_CHR_DEV_SG=m
# CONFIG_CHR_DEV_SCH is not set
# CONFIG_SCSI_CONSTANTS is not set
# CONFIG_SCSI_LOGGING is not set
@ -6633,8 +6634,10 @@ CONFIG_FSCACHE=m
#
# CD-ROM/DVD Filesystems
#
# CONFIG_ISO9660_FS is not set
# CONFIG_UDF_FS is not set
CONFIG_ISO9660_FS=m
CONFIG_JOLIET=y
CONFIG_ZISOFS=y
CONFIG_UDF_FS=m
# end of CD-ROM/DVD Filesystems
#

5
config/kernel/linux-rockchip64-legacy.config
View file

@ -1,6 +1,6 @@
#
# Automatically generated file; DO NOT EDIT.
# Linux/arm64 4.4.192 Kernel Configuration
# Linux/arm64 4.4.198 Kernel Configuration
#
CONFIG_ARM64=y
CONFIG_64BIT=y
@ -2257,6 +2257,7 @@ CONFIG_MVL88W8977=m
# CONFIG_SSV6051 is not set
# CONFIG_WL_TI is not set
CONFIG_RTL8822BU=m
CONFIG_RTL8821CU=m
CONFIG_RTL8812AU=m
CONFIG_ZD1211RW=m
# CONFIG_ZD1211RW_DEBUG is not set
@ -4646,7 +4647,6 @@ CONFIG_USB_EMI62=m
CONFIG_USB_EMI26=m
CONFIG_USB_ADUTUX=m
CONFIG_USB_SEVSEG=m
# CONFIG_USB_RIO500 is not set
# CONFIG_USB_LEGOTOWER is not set
CONFIG_USB_LCD=m
CONFIG_USB_LED=m
@ -5306,6 +5306,7 @@ CONFIG_IIO=y
CONFIG_IIO_BUFFER=y
# CONFIG_IIO_BUFFER_CB is not set
CONFIG_IIO_KFIFO_BUF=y
CONFIG_IIO_TRIGGERED_BUFFER=m
CONFIG_IIO_TRIGGER=y
CONFIG_IIO_CONSUMERS_PER_TRIGGER=2

2
config/kernel/linux-rockpis-legacy.config
View file

@ -1666,7 +1666,7 @@ CONFIG_RTL8723DS=m
# CONFIG_SSV6051 is not set
# CONFIG_WL_TI is not set
CONFIG_RTL8822BU=m
CONFIG_RTL8188EUS=m
CONFIG_RTL8821CU=m
CONFIG_RTL8812AU=m
# CONFIG_ZD1211RW is not set
# CONFIG_MWIFIEX is not set

8
config/kernel/linux-s5p6818-legacy.config
View file

@ -1,6 +1,6 @@
#
# Automatically generated file; DO NOT EDIT.
# Linux/arm64 4.14.149 Kernel Configuration
# Linux/arm64 4.14.160 Kernel Configuration
#
CONFIG_ARM64=y
CONFIG_64BIT=y
@ -1489,6 +1489,7 @@ CONFIG_DEV_COREDUMP=y
# CONFIG_SYS_HYPERVISOR is not set
# CONFIG_GENERIC_CPU_DEVICES is not set
CONFIG_GENERIC_CPU_AUTOPROBE=y
CONFIG_GENERIC_CPU_VULNERABILITIES=y
CONFIG_REGMAP=y
CONFIG_REGMAP_I2C=y
CONFIG_REGMAP_SPI=y
@ -1544,6 +1545,7 @@ CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_LOOP_MIN_COUNT=8
CONFIG_BLK_DEV_CRYPTOLOOP=m
CONFIG_BLK_DEV_DRBD=m
# CONFIG_DRBD_FAULT_INJECTION is not set
# CONFIG_BLK_DEV_NBD is not set
CONFIG_BLK_DEV_RAM=m
CONFIG_BLK_DEV_RAM_COUNT=8
@ -1982,6 +1984,7 @@ CONFIG_RTL8XXXU_UNTESTED=y
# CONFIG_WLAN_VENDOR_TI is not set
CONFIG_RTL8822BU=m
CONFIG_RTL8188EU=m
CONFIG_RTL8821CU=m
CONFIG_RTL8812AU=m
# CONFIG_WLAN_VENDOR_ZYDAS is not set
CONFIG_WLAN_VENDOR_QUANTENNA=y
@ -3769,7 +3772,6 @@ CONFIG_USB_SERIAL_UPD78F0730=m
# CONFIG_USB_EMI26 is not set
# CONFIG_USB_ADUTUX is not set
# CONFIG_USB_SEVSEG is not set
# CONFIG_USB_RIO500 is not set
# CONFIG_USB_LEGOTOWER is not set
# CONFIG_USB_LCD is not set
# CONFIG_USB_CYPRESS_CY7C63 is not set
@ -5600,6 +5602,7 @@ CONFIG_RADIX_TREE_MULTIORDER=y
CONFIG_ASSOCIATIVE_ARRAY=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_DMA=y
CONFIG_SGL_ALLOC=y
# CONFIG_DMA_NOOP_OPS is not set
# CONFIG_DMA_VIRT_OPS is not set
CONFIG_CPU_RMAP=y
@ -5607,6 +5610,7 @@ CONFIG_DQL=y
CONFIG_GLOB=y
# CONFIG_GLOB_SELFTEST is not set
CONFIG_NLATTR=y
CONFIG_LRU_CACHE=m
CONFIG_CLZ_TAB=y
CONFIG_CORDIC=m
# CONFIG_DDR is not set

7
config/kernel/linux-sunxi-legacy.config
View file

@ -1,6 +1,6 @@
#
# Automatically generated file; DO NOT EDIT.
# Linux/arm 4.19.88 Kernel Configuration
# Linux/arm 4.19.91 Kernel Configuration
#
#
@ -2429,13 +2429,14 @@ CONFIG_WLAN_VENDOR_TI=y
# CONFIG_WL18XX is not set
# CONFIG_WLCORE is not set
CONFIG_RTL8822BU=m
CONFIG_RTL8188EUS=m
CONFIG_RTL8812AU=m
CONFIG_RTL8188EU=m
CONFIG_RTL8821CU=m
CONFIG_WLAN_VENDOR_XRADIO=m
CONFIG_XRADIO_NON_POWER_OF_TWO_BLOCKSIZES=y
# CONFIG_XRADIO_5GHZ_SUPPORT is not set
# CONFIG_XRADIO_WAPI_SUPPORT is not set
CONFIG_XRADIO_USE_EXTENSIONS=y
CONFIG_RTL8812AU=m
CONFIG_WLAN_VENDOR_ZYDAS=y
# CONFIG_USB_ZD1201 is not set
# CONFIG_ZD1211RW is not set

2
config/kernel/linux-sunxi64-current.config
View file

@ -1,6 +1,6 @@
#
# Automatically generated file; DO NOT EDIT.
# Linux/arm64 5.4.6 Kernel Configuration
# Linux/arm64 5.4.7 Kernel Configuration
#
#

3
config/sources/families/include/rockchip64_common.inc
View file

@ -22,7 +22,7 @@ if [[ $BOOTCONFIG == *3328* ]]; then
ATF_TARGET_MAP='PLAT=rk322xh DEBUG=1 bl31;;trust.bin'
CPUMAX="1390000"
elif [[ $BOARD == rockpro64 ]] || [[ $BOARD == rockpi-4* ]]; then
elif [[ $BOARD == rockpro64 ]] || [[ $BOARD == rockpi-4* ]] || [[ $BOARD == pinebook-pro ]]; then
UBOOT_TARGET_MAP="BL31=$SRC/cache/sources/rkbin-tools/rk33/rk3399_bl31_v1.17.elf u-boot-dtb.bin spl/u-boot-spl.bin u-boot.itb;;spl/u-boot-spl.bin u-boot.itb"
@ -113,6 +113,7 @@ family_tweaks()
[[ $BOARD == nanopim4v2 ]] && echo "fdtfile=rockchip/rk3399-nanopi-m4v2.dtb" >> $SDCARD/boot/armbianEnv.txt
[[ $BOARD == nanopineo4 ]] && echo "fdtfile=rockchip/rk3399-nanopi-neo4.dtb" >> $SDCARD/boot/armbianEnv.txt
[[ $BOARD == orangepi-rk3399 ]] && echo "fdtfile=rockchip/rk3399-orangepi.dtb" >> $SDCARD/boot/armbianEnv.txt
[[ $BOARD == pinebook-pro ]] && echo "fdtfile=rockchip/rk3399-pinebook-pro.dtb" >> $SDCARD/boot/armbianEnv.txt
[[ $BOARD == roc-rk3399-pc ]] && echo "fdtfile=rockchip/rk3399-roc-pc.dtb" >> $SDCARD/boot/armbianEnv.txt
[[ $BOARD == rockpi-4* ]] && echo "fdtfile=rockchip/rk3399-rock-pi-4.dtb" >> $SDCARD/boot/armbianEnv.txt

2
config/sources/families/include/sunxi64_common.inc
View file

@ -25,7 +25,7 @@ case $BRANCH in
dev)
KERNELSOURCE="https://github.com/megous/linux"
KERNELBRANCH="branch:orange-pi-5.4"
KERNELBRANCH="branch:orange-pi-5.5"
KERNELPATCHDIR='sunxi-'$BRANCH
;;

2
config/sources/families/include/sunxi_common.inc
View file

@ -27,7 +27,7 @@ case $BRANCH in
dev)
KERNELSOURCE="https://github.com/megous/linux"
KERNELBRANCH="branch:orange-pi-5.4"
KERNELBRANCH="branch:orange-pi-5.5"
KERNELPATCHDIR='sunxi-'$BRANCH
;;

2
config/sources/families/rockchip64.conf
View file

@ -21,7 +21,7 @@ esac
uboot_custom_postprocess()
{
# bootloader image
if [[ $BOARD == rockpro64 ]] || [[ $BOARD == rockpi-4* ]]; then
if [[ $BOARD == rockpro64 ]] || [[ $BOARD == rockpi-4* ]] || [[ $BOARD == pinebook-pro ]]; then
# 3399
tools/mkimage -n rk3399 -T rksd -d $SRC/cache/sources/rkbin-tools/rk33/rk3399_ddr_933MHz_v1.13.bin rksd_loader.img
cat spl/u-boot-spl.bin >> rksd_loader.img

76
config/targets.conf
View file

@ -11,7 +11,6 @@ bananapi current bionic cli stable yes
bananapi current stretch cli stable yes
bananapi current bullseye cli stable yes
bananapi current buster minimal stable yes
bananapi dev buster minimal beta yes
# Bananapi M2+ H3
@ -19,7 +18,6 @@ bananapim2plus current buster desktop stable yes
bananapim2plus current bionic cli stable yes
bananapim2plus current stretch cli stable no
bananapim2plus current bullseye cli stable yes
bananapim2plus dev buster minimal beta yes
# Bananapi M2U R40
@ -38,7 +36,6 @@ bananapim64 current bionic minimal stable yes
bananapim64 current buster minimal stable yes
bananapim64 current stretch cli stable yes
bananapim64 current bullseye cli stable yes
bananapim64 dev buster minimal beta yes
# Bananapi R2
@ -53,7 +50,6 @@ bananapipro current bionic cli stable yes
bananapipro current stretch cli stable yes
bananapipro current bullseye cli stable yes
bananapipro current buster minimal stable yes
bananapipro dev buster minimal beta yes
# Clearfog Base
clearfogbase legacy buster cli stable yes
@ -82,7 +78,6 @@ cubietruck current buster desktop stable yes
cubietruck current buster cli stable yes
cubietruck current bionic cli stable yes
cubietruck current stretch cli stable yes
cubietruck dev buster minimal beta yes
# Cubox-i
cubox-i current buster cli stable yes
@ -137,7 +132,6 @@ lime2 current buster desktop stable yes
lime2 current buster cli stable yes
lime2 current bionic cli stable yes
lime2 current stretch cli stable yes
lime2 dev buster minimal beta yes
# lime-a64
@ -145,7 +139,6 @@ lime-a64 current bionic minimal stable yes
lime-a64 current buster minimal stable yes
lime-a64 current bionic cli stable yes
lime-a64 current buster cli stable yes
lime-a64 dev buster minimal beta yes
# MACCHIATObin Double Shot
@ -165,6 +158,7 @@ nanopct3 legacy buster minimal stable yes
nanopct3 legacy buster cli stable yes
nanopct3 legacy bionic desktop stable yes
nanopct3 legacy bionic minimal stable yes
nanopct3 legacy bullseye cli stable yes
# nanopct3plus
@ -172,6 +166,7 @@ nanopct3plus legacy buster cli stable yes
nanopct3plus legacy buster minimal stable yes
nanopct3plus legacy bionic desktop stable yes
nanopct3plus legacy bionic minimal stable yes
nanopct3plus legacy bullseye cli stable yes
# nanopct4
@ -187,36 +182,36 @@ nanopct4 current bionic cli stable yes
nanopi-r1 current buster cli stable yes
nanopi-r1 current stretch cli stable yes
nanopi-r1 current bionic cli stable yes
nanopi-r1 dev buster minimal beta yes
nanopi-r1 current bullseye minimal stable yes
# nanopiair
nanopiair current buster cli stable yes
nanopiair current stretch cli stable yes
nanopiair current bionic cli stable yes
nanopiair current eoan cli stable yes
nanopiair dev buster minimal beta yes
nanopiair current bullseye cli stable yes
# nanopiduo
nanopiduo current buster cli stable yes
nanopiduo current stretch cli stable yes
nanopiduo current bionic cli stable yes
nanopiduo dev buster minimal beta yes
nanopiduo current bullseye minimal stable yes
# nanopiduo2
nanopiduo2 current buster cli stable yes
nanopiduo2 current stretch cli stable yes
nanopiduo2 current bionic cli stable yes
nanopiduo2 current eoan cli stable yes
nanopiduo2 dev buster minimal beta yes
nanopiduo2 current bullseye cli stable yes
# nanopifire3
nanopifire3 legacy buster cli stable yes
nanopifire3 legacy buster minimal stable yes
nanopifire3 legacy buster desktop stable yes
nanopifire3 legacy bionic cli stable yes
nanopifire3 legacy bullseye cli stable yes
# nanopik1plus
@ -224,7 +219,6 @@ nanopik1plus current buster desktop stable yes
nanopik1plus current buster cli stable yes
nanopik1plus current bionic cli stable yes
nanopik1plus current stretch cli stable yes
nanopik1plus dev buster minimal beta yes
# nanopik2-905
@ -232,7 +226,6 @@ nanopik2-s905 current buster cli stable yes
nanopik2-s905 current buster minimal stable yes
nanopik2-s905 current stretch cli stable yes
nanopik2-s905 current bionic desktop stable yes
nanopik2-s905 dev buster minimal beta yes
# nanopim1
@ -240,7 +233,6 @@ nanopim1 current buster desktop stable yes
nanopim1 current buster cli stable yes
nanopim1 current bionic cli stable yes
nanopim1 current stretch cli stable yes
nanopim1 dev buster minimal beta yes
# zeropi
zeropi current buster minimal stable yes
@ -252,6 +244,7 @@ zeropi current bullseye cli stable yes
nanopim3 legacy buster cli stable yes
nanopim3 legacy buster minimal stable yes
nanopim3 legacy bionic desktop stable yes
nanopim3 legacy bullseye cli stable yes
# nanopim4
@ -276,24 +269,21 @@ nanopim4v2 current bionic cli stable yes
nanopineo current buster cli stable yes
nanopineo current stretch cli stable yes
nanopineo current bionic cli stable yes
nanopineo current eoan cli stable yes
nanopineo dev buster minimal beta yes
nanopineo current bullseye cli stable yes
# nanopineocore2
nanopineo2 current buster cli stable yes
nanopineo2 current stretch cli stable yes
nanopineo2 current bionic cli stable yes
nanopineo2 dev buster minimal beta yes
nanopineo2 current buster minimal stable yes
# nanopineo2black
nanopineo2black current buster cli stable yes
nanopineo2black current stretch cli stable yes
nanopineo2black current stretch minimal stable yes
nanopineo2black current bionic cli stable yes
nanopineo2black current eoan cli stable yes
nanopineo2black dev buster minimal beta yes
nanopineo2black current bullseye cli stable yes
# nanopineo4
@ -308,13 +298,13 @@ nanopineo4 current bionic cli stable yes
nanopineocore2 current buster cli stable yes
nanopineocore2 current stretch cli stable yes
nanopineocore2 current bionic cli stable yes
nanopineocore2 dev buster minimal beta yes
nanopineocore2 current bullseye minimal stable yes
# nanopineoplus2
nanopineoplus2 current buster cli stable yes
nanopineoplus2 current stretch cli stable yes
nanopineoplus2 dev buster minimal beta yes
nanopineoplus2 current bullseye minimal stable yes
# Odroid C1
@ -354,7 +344,6 @@ orangepi2 current buster desktop stable yes
orangepi2 current buster cli stable yes
orangepi2 current bionic cli stable yes
orangepi2 current stretch cli stable yes
orangepi2 dev buster minimal beta yes
# orangepi 3
@ -375,8 +364,8 @@ orangepi-r1 current bionic minimal stable yes
orangepi-rk3399 legacy buster cli stable yes
orangepi-rk3399 legacy bullseye cli stable yes
orangepi-rk3399 legacy bionic desktop stable yes
orangepi-rk3399 legacy buster desktop stable yes
orangepi-rk3399 dev buster minimal beta yes
orangepi-rk3399 current buster desktop stable yes
orangepi-rk3399 current bionic minimal stable yes
# Firefly rk3399
@ -392,7 +381,6 @@ orangepilite current buster desktop stable yes
orangepilite current buster cli stable yes
orangepilite current bionic cli stable yes
orangepilite current stretch cli stable yes
orangepilite dev buster minimal beta yes
# orangepilite2
@ -405,6 +393,7 @@ orangepilite2 current buster minimal stable yes
orangepioneplus current buster cli stable yes
orangepioneplus current stretch cli stable yes
orangepioneplus current bionic desktop stable yes
orangepioneplus current bionic cli stable yes
orangepioneplus current buster minimal stable yes
@ -414,7 +403,6 @@ orangepione current buster desktop stable yes
orangepione current buster cli stable yes
orangepione current bionic cli stable yes
orangepione current stretch cli stable yes
orangepione dev buster minimal beta yes
# orangepipc
@ -422,7 +410,6 @@ orangepipc current buster desktop stable yes
orangepipc current buster cli stable yes
orangepipc current bionic cli stable yes
orangepipc current stretch cli stable yes
orangepipc dev buster minimal beta yes
# orangepipc2
@ -430,7 +417,6 @@ orangepipc2 current buster desktop stable yes
orangepipc2 current buster cli stable yes
orangepipc2 current bionic cli stable yes
orangepipc2 current stretch cli stable yes
orangepipc2 dev buster minimal beta yes
# orangepipcplus
@ -438,7 +424,6 @@ orangepipcplus current buster desktop stable yes
orangepipcplus current buster cli stable yes
orangepipcplus current bionic cli stable yes
orangepipcplus current stretch cli stable yes
orangepipcplus dev buster minimal beta yes
# orangepiplus
@ -446,7 +431,6 @@ orangepiplus current buster desktop stable yes
orangepiplus current buster cli stable yes
orangepiplus current bionic cli stable yes
orangepiplus current stretch cli stable yes
orangepiplus dev buster minimal beta yes
# orangepiplus2e
@ -454,14 +438,12 @@ orangepiplus2e current buster desktop stable yes
orangepiplus2e current buster cli stable yes
orangepiplus2e current bionic cli stable yes
orangepiplus2e current stretch cli stable yes
orangepiplus2e dev buster minimal beta yes
# Orangepi Prime
orangepiprime current buster cli stable yes
orangepiprime current stretch cli stable yes
orangepiprime current buster desktop stable yes
orangepiprime dev buster minimal beta yes
# Orangepi Win
@ -469,7 +451,6 @@ orangepiwin current buster cli stable yes
orangepiwin current buster desktop stable yes
orangepiwin current stretch cli stable yes
orangepiwin current bionic cli stable yes
orangepiwin dev buster minimal beta yes
# orangepizero
@ -477,7 +458,6 @@ orangepizero current buster cli stable yes
orangepizero current stretch cli stable yes
orangepizero current bionic cli stable yes
orangepizero current bullseye cli stable yes
orangepizero dev buster minimal beta yes
# orangepizeroplus
@ -485,21 +465,18 @@ orangepizeroplus current buster cli stable yes
orangepizeroplus current stretch cli stable yes
orangepizeroplus current bullseye cli stable yes
orangepizeroplus current bionic cli stable yes
orangepizeroplus dev buster minimal beta yes
# orangepizeroplus2-h3
orangepizeroplus2-h3 current buster cli stable yes
orangepizeroplus2-h3 current stretch cli stable yes
orangepizeroplus2-h3 current bullseye cli stable yes
orangepizeroplus2-h3 dev buster minimal beta yes
# orangepizeroplus2-h5
orangepizeroplus2-h5 current buster cli stable yes
orangepizeroplus2-h5 current stretch cli stable yes
orangepizeroplus2-h5 current bullseye cli stable yes
orangepizeroplus2-h5 dev buster minimal beta yes
# LinkSprite pcDuino3
@ -513,20 +490,17 @@ pine64 current buster cli stable yes
pine64 current buster desktop stable yes
pine64 current bionic cli stable yes
pine64 current stretch cli stable yes
pine64 dev buster minimal beta yes
# Pine64so
pine64so current buster cli stable yes
pine64so current stretch cli stable yes
pine64so current bionic cli stable yes
pine64so dev buster minimal beta yes
# Pinebook A64
pinebook-a64 current bionic desktop stable yes
pinebook-a64 current buster desktop stable yes
pinebook-a64 dev buster desktop beta yes
# Pine H64
@ -546,7 +520,6 @@ renegade legacy buster cli stable yes
renegade current buster cli stable yes
renegade legacy bionic desktop stable yes
renegade current bionic desktop stable yes
renegade dev buster minimal beta yes
# Rock64
@ -554,7 +527,6 @@ rock64 legacy buster cli stable yes
rock64 current buster cli stable yes
rock64 legacy bionic desktop stable yes
rock64 current bionic desktop stable yes
rock64 dev buster minimal beta yes
# Rockpi 4b
@ -562,7 +534,6 @@ rockpi-4b legacy buster cli stable yes
rockpi-4b current buster cli stable yes
rockpi-4b legacy bionic desktop stable yes
rockpi-4b current buster desktop stable yes
rockpi-4b dev buster minimal beta yes
# Rockpi 4a
@ -570,13 +541,12 @@ rockpi-4a legacy buster cli stable yes
rockpi-4a current buster cli stable yes
rockpi-4a legacy bionic desktop stable yes
rockpi-4a current buster desktop stable yes
rockpi-4a dev buster minimal beta yes
# Rockpi S
rockpi-s legacy buster cli stable yes
rockpi-s legacy buster minimal stable yes
rockpi-s legacy bullseye minimal beta yes
rockpi-s legacy bionic minimal stable yes
rockpi-s legacy bullseye minimal stable yes
# Rock64pro
@ -589,12 +559,12 @@ rockpro64 current bionic cli stable yes
teres-a64 current bionic desktop stable yes
teres-a64 current buster desktop stable yes
teres-a64 dev bullseye desktop beta yes
# Tinkerboard
tinkerboard legacy buster cli stable yes
tinkerboard legacy bionic desktop stable yes
#tinkerboard legacy buster cli stable yes
#tinkerboard legacy bionic desktop stable yes
#tinkerboard legacy bionic cli stable yes
tinkerboard current bionic desktop stable yes
tinkerboard current buster minimal stable yes
tinkerboard current bullseye cli stable yes
@ -605,7 +575,6 @@ tritium-h3 current buster desktop stable yes
tritium-h3 current buster cli stable yes
tritium-h3 current bionic desktop stable yes
tritium-h3 current bionic cli stable yes
tritium-h3 dev buster minimal beta yes
# tritium-h5
@ -613,7 +582,6 @@ tritium-h5 current buster desktop stable yes
tritium-h5 current buster cli stable yes
tritium-h5 current bionic desktop stable yes
tritium-h5 current bionic cli stable yes
tritium-h5 dev buster minimal beta yes
# xt-q8l-v10

10
lib/build-all-ng.sh
View file

@ -104,13 +104,9 @@ pack_upload ()
if [[ -n "${SEND_TO_SERVER}" ]]; then
ssh "${SEND_TO_SERVER}" "mkdir -p ${SEND_TO_LOCATION}${BOARD}/{archive,nightly}" &
display_alert "Uploading" "Please wait!" "info"
nice -n 19 bash -c "while ! rsync -arP $DESTIMG/. -e 'ssh -p 22' ${SEND_TO_SERVER}:${SEND_TO_LOCATION}${BOARD}/${subdir}; \
do sleep 5; done; rm -r $DESTIMG" &
nice -n 19 bash -c "rsync -arP --info=progress2,stats1 --ignore-existing --remove-source-files --prune-empty-dirs $DESTIMG/ -e 'ssh -p 22' ${SEND_TO_SERVER}:${SEND_TO_LOCATION}${BOARD}/${subdir}" &
else
mv $DESTIMG/* $DEST/images
mv $DESTIMG/*.* $DEST/images/
fi
}
@ -213,7 +209,7 @@ function build_all()
# unset also board related variables
unset BOARDFAMILY DESKTOP_AUTOLOGIN DEFAULT_CONSOLE FULL_DESKTOP MODULES_CURRENT MODULES_LEGACY MODULES_DEV \
BOOTCONFIG MODULES_BLACKLIST_LEGACY MODULES_BLACKLIST_CURRENT MODULES_BLACKLIST_DEV DEFAULT_OVERLAYS SERIALCON \
BUILD_MINIMAL
BUILD_MINIMAL RELEASE
read -r BOARD BRANCH RELEASE BUILD_TARGET BUILD_STABILITY BUILD_IMAGE <<< "${line}"

14
lib/compilation.sh
View file

@ -273,15 +273,6 @@ compile_kernel()
fi
cd "$kerneldir"
# this is a patch that Ubuntu Trusty compiler works
# TODO: Check if still required
if [[ $(patch --dry-run -t -p1 < $SRC/patch/misc/compiler.patch | grep Reversed) != "" ]]; then
display_alert "Patching kernel for compiler support"
patch --batch --silent -t -p1 < $SRC/patch/misc/compiler.patch >> $DEST/debug/output.log 2>&1
fi
advanced_patch "kernel" "$KERNELPATCHDIR" "$BOARD" "" "$BRANCH" "$LINUXFAMILY-$BRANCH"
if ! grep -qoE '^-rc[[:digit:]]+' <(grep "^EXTRAVERSION" Makefile | head -1 | awk '{print $(NF)}'); then
sed -i 's/EXTRAVERSION = .*/EXTRAVERSION = /' Makefile
fi
@ -293,6 +284,8 @@ compile_kernel()
# build 3rd party drivers
compilation_prepare
advanced_patch "kernel" "$KERNELPATCHDIR" "$BOARD" "" "$BRANCH" "$LINUXFAMILY-$BRANCH"
# create linux-source package - with already patched sources
local sources_pkg_dir=$SRC/.tmp/${CHOSEN_KSRC}_${REVISION}_all
rm -rf ${sources_pkg_dir}
@ -306,6 +299,9 @@ compile_kernel()
cp COPYING $sources_pkg_dir/usr/share/doc/linux-source-${version}-${LINUXFAMILY}/LICENSE
fi
# re-read kernel version after patching
local version=$(grab_version "$kerneldir")
# create patch for manual source changes in debug mode
[[ $CREATE_PATCHES == yes ]] && userpatch_create "kernel"

2
lib/distributions.sh
View file

@ -31,8 +31,6 @@ install_common()
fi
fi
# define ARCH within global environment variables
[[ -f $SDCARD/etc/environment ]] && echo -e "ARCH=${ARCH//hf}" >> "${SDCARD}"/etc/environment
# add dummy fstab entry to make mkinitramfs happy
echo "/dev/mmcblk0p1 / $ROOTFS_TYPE defaults 0 1" >> "${SDCARD}"/etc/fstab

2
lib/makeboarddeb.sh
View file

@ -49,7 +49,7 @@ create_board_package()
Installed-Size: 1
Section: kernel
Priority: optional
Depends: bash, linux-base, u-boot-tools, initramfs-tools, python-apt, lsb-release
Depends: bash, linux-base, u-boot-tools, initramfs-tools, lsb-release
Provides: armbian-bsp
Conflicts: armbian-bsp
Suggests: armbian-config

7
packages/bsp/common/usr/bin/armbianmonitor
View file

@ -147,8 +147,11 @@ ParseOptions() {
;;
u)
# Upload /var/log/armbian-hardware-monitor.log with additional support info
fping ix.io 2>/dev/null | grep -q alive || \
(echo -e "\nNetwork/firewall problem detected. Not able to upload debug info.\nPlease fix this or use \"-U\" instead and upload ${BOLD}whole output${NC} manually\n" >&2 ; exit 1)
fping ix.io 2>/dev/null | grep -q alive
if [ $? != 0 ]; then
echo -e "\nNetwork/firewall problem detected. Not able to upload debug info.\nPlease fix this or use \"-U\" instead and upload ${BOLD}whole output${NC} manually\n" >&2
exit 1
fi
which curl >/dev/null 2>&1 || apt-get -f -qq -y install curl
echo -e "System diagnosis information will now be uploaded to \c"
# we obfuscate IPv4 addresses somehow but not too much, MAC addresses have to remain

1
packages/bsp/common/usr/lib/armbian/armbian-truncate-logs
View file

@ -20,7 +20,6 @@ if [ $logusage -ge $treshold ]; then
# write to SD
/usr/lib/armbian/armbian-ramlog write >/dev/null 2>&1
# rotate logs on "disk"
chown root.root -R /var/log.hdd
/usr/sbin/logrotate --force /etc/logrotate.conf
# truncate
/usr/bin/find /var/log -name '*.log' -or -name '*.xz' -or -name 'lastlog' -or -name 'messages' -or -name 'debug' -or -name 'syslog' | xargs truncate --size 0

21
patch/atf/atf-rockchip64/board_pinebook-pro/add-trust-ini.patch Normal file
View file

@ -0,0 +1,21 @@
diff --git a/trust.ini b/trust.ini
new file mode 100644
index 0000000..4af021a
--- /dev/null
+++ b/trust.ini
@@ -0,0 +1,15 @@
+[VERSION]
+MAJOR=1
+MINOR=0
+[BL30_OPTION]
+SEC=0
+[BL31_OPTION]
+SEC=1
+PATH=./build/rk3399/debug/bl31/bl31.elf
+ADDR=0x10000
+[BL32_OPTION]
+SEC=0
+[BL33_OPTION]
+SEC=0
+[OUTPUT]
+PATH=trust.bin

624714
patch/kernel/odroidxu4-legacy/0000-remove-stock-8188eu-8812au.patch
View file

File diff suppressed because it is too large Load diff

84
patch/kernel/rockchip64-current/add-board-nanopi-m4v2.patch Normal file
View file

@ -0,0 +1,84 @@
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index 948195b49..48dccb95e 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -22,6 +22,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-khadas-edge-captain.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-khadas-edge-v.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopc-t4.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-m4.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-m4v2.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-neo4.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-orangepi.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-pinebook-pro.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-nanopi-m4v2.dts b/arch/arm64/boot/dts/rockchip/rk3399-nanopi-m4v2.dts
new file mode 100644
index 000000000..60358ab8c
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3399-nanopi-m4v2.dts
@@ -0,0 +1,66 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * FriendlyElec NanoPi M4V2 board device tree source
+ *
+ * Copyright (c) 2018 FriendlyElec Computer Tech. Co., Ltd.
+ * (http://www.friendlyarm.com)
+ *
+ * Copyright (c) 2018 Collabora Ltd.
+ * Copyright (c) 2019 Arm Ltd.
+ */
+
+/dts-v1/;
+#include "rk3399-nanopi4.dtsi"
+
+/ {
+ model = "FriendlyElec NanoPi M4 Ver2.0";
+ compatible = "friendlyarm,nanopi-m4", "rockchip,rk3399";
+
+ vdd_5v: vdd-5v {
+ compatible = "regulator-fixed";
+ regulator-name = "vdd_5v";
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ vcc5v0_core: vcc5v0-core {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_core";
+ regulator-always-on;
+ regulator-boot-on;
+ vin-supply = <&vdd_5v>;
+ };
+
+ vcc5v0_usb1: vcc5v0-usb1 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_usb1";
+ regulator-always-on;
+ regulator-boot-on;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vcc5v0_usb2: vcc5v0-usb2 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_usb2";
+ regulator-always-on;
+ regulator-boot-on;
+ vin-supply = <&vcc5v0_sys>;
+ };
+};
+
+&vcc3v3_sys {
+ vin-supply = <&vcc5v0_core>;
+};
+
+&u2phy0_host {
+ phy-supply = <&vcc5v0_usb1>;
+};
+
+&u2phy1_host {
+ phy-supply = <&vcc5v0_usb2>;
+};
+
+&vbus_typec {
+ regulator-always-on;
+ vin-supply = <&vdd_5v>;
+};

15
patch/kernel/rockchip64-current/board-nanopi-m4v2-dts-ethernet-tweak.patch Normal file
View file

@ -0,0 +1,15 @@
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-nanopi-m4v2.dts b/arch/arm64/boot/dts/rockchip/rk3399-nanopi-m4v2.dts
index 60358ab8c..057045ca3 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-nanopi-m4v2.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-nanopi-m4v2.dts
@@ -48,6 +48,10 @@
};
};
+&gmac {
+ rx_delay = <0x16>;
+};
+
&vcc3v3_sys {
vin-supply = <&vcc5v0_core>;
};

20
patch/kernel/rockchip64-current/board-nanopi-m4v2-dts.patch
View file

@ -1,20 +0,0 @@
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index 948195b49..48dccb95e 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -22,6 +22,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-khadas-edge-captain.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-khadas-edge-v.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopc-t4.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-m4.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-m4v2.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-neo4.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-orangepi.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-pinebook-pro.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-nanopi-m4v2.dts b/arch/arm64/boot/dts/rockchip/rk3399-nanopi-m4v2.dts
new file mode 120000
index 000000000..5c27e6fc3
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3399-nanopi-m4v2.dts
@@ -0,0 +1 @@
+rk3399-nanopi-m4.dts
\ No newline at end of file

12
patch/kernel/rockchip64-current/board-rockpi4-dts-upper-port-host.patch Normal file
View file

@ -0,0 +1,12 @@
--- a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts 2019-12-28 20:11:18.831388678 +0200
+++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts 2019-12-28 20:11:33.335365912 +0200
@@ -735,7 +735,7 @@
&usbdrd_dwc3_0 {
status = "okay";
- dr_mode = "otg";
+ dr_mode = "host";
};
&usbdrd3_1 {

430
patch/kernel/rockchip64-current/general-add-overlay-configfs.patch Normal file
View file

@ -0,0 +1,430 @@
Below patch is a squash of following 4 commits borrowed from ayufan's
https://github.com/ayufan-rock64/linux-mainline-kernel repo:
From cc22206776d61948f6984a4f03d8013eb4f92984 Mon Sep 17 00:00:00 2001
From: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Date: Wed, 3 Dec 2014 13:23:28 +0200
Subject: [PATCH] OF: DT-Overlay configfs interface
This is a port of Pantelis Antoniou's v3 port that makes use of the
new upstreamed configfs support for binary attributes.
Original commit message:
Add a runtime interface to using configfs for generic device tree overlay
usage. With it its possible to use device tree overlays without having
to use a per-platform overlay manager.
Please see Documentation/devicetree/configfs-overlays.txt for more info.
Changes since v2:
- Removed ifdef CONFIG_OF_OVERLAY (since for now it's required)
- Created a documentation entry
- Slight rewording in Kconfig
Changes since v1:
- of_resolve() -> of_resolve_phandles().
Originally-signed-off-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Signed-off-by: Phil Elwell <phil@raspberrypi.org>
DT configfs: Fix build errors on other platforms
Signed-off-by: Phil Elwell <phil@raspberrypi.org>
DT configfs: fix build error
There is an error when compiling rpi-4.6.y branch:
CC drivers/of/configfs.o
drivers/of/configfs.c:291:21: error: initialization from incompatible pointer type [-Werror=incompatible-pointer-types]
.default_groups = of_cfs_def_groups,
^
drivers/of/configfs.c:291:21: note: (near initialization for 'of_cfs_subsys.su_group.default_groups.next')
The .default_groups is linked list since commit
1ae1602de028acaa42a0f6ff18d19756f8e825c6.
This commit uses configfs_add_default_group to fix this problem.
Change-Id: Id4903c9725ebc355aadd067bbc32047db622ce61
Signed-off-by: Slawomir Stepien <sst@poczta.fm>
From 7cfb967c52d374ddcb0fc9194f38d1d5f9d8cdd8 Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Sun, 3 Dec 2017 21:43:03 +0000
Subject: [PATCH] configfs: New of_overlay API
From 8637321fabb045fe8617360ef1b058978b0d8457 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Mon, 4 Dec 2017 14:07:40 +0000
Subject: [PATCH] SQUASH: config_fs: of_overlay_apply takes a pointer
Signed-off-by: Phil Elwell <phil@raspberrypi.org>
From 274dfabb947ca32116a429c582c74aaee6ff1b5b Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Kamil=20Trzci=C5=84ski?= <ayufan@ayufan.eu>
Date: Mon, 14 May 2018 11:28:09 +0200
Subject: [PATCH] ayufan: fix overlayfs to compile on 4.17 kernel
Change-Id: I421887697d2ba6e52aba9100100b7664760e2001
diff --git a/Documentation/devicetree/configfs-overlays.txt b/Documentation/devicetree/configfs-overlays.txt
new file mode 100644
index 0000000000000..5fa43e0643072
--- /dev/null
+++ b/Documentation/devicetree/configfs-overlays.txt
@@ -0,0 +1,31 @@
+Howto use the configfs overlay interface.
+
+A device-tree configfs entry is created in /config/device-tree/overlays
+and and it is manipulated using standard file system I/O.
+Note that this is a debug level interface, for use by developers and
+not necessarily something accessed by normal users due to the
+security implications of having direct access to the kernel's device tree.
+
+* To create an overlay you mkdir the directory:
+
+ # mkdir /config/device-tree/overlays/foo
+
+* Either you echo the overlay firmware file to the path property file.
+
+ # echo foo.dtbo >/config/device-tree/overlays/foo/path
+
+* Or you cat the contents of the overlay to the dtbo file
+
+ # cat foo.dtbo >/config/device-tree/overlays/foo/dtbo
+
+The overlay file will be applied, and devices will be created/destroyed
+as required.
+
+To remove it simply rmdir the directory.
+
+ # rmdir /config/device-tree/overlays/foo
+
+The rationalle of the dual interface (firmware & direct copy) is that each is
+better suited to different use patterns. The firmware interface is what's
+intended to be used by hardware managers in the kernel, while the copy interface
+make sense for developers (since it avoids problems with namespaces).
diff --git a/drivers/of/Kconfig b/drivers/of/Kconfig
index 37c2ccbefecdc..d3fc81a40c0e7 100644
--- a/drivers/of/Kconfig
+++ b/drivers/of/Kconfig
@@ -103,4 +103,11 @@ config OF_OVERLAY
config OF_NUMA
bool
+config OF_CONFIGFS
+ bool "Device Tree Overlay ConfigFS interface"
+ select CONFIGFS_FS
+ select OF_OVERLAY
+ help
+ Enable a simple user-space driven DT overlay interface.
+
endif # OF
diff --git a/drivers/of/Makefile b/drivers/of/Makefile
index 663a4af0cccd5..b00a95adf5199 100644
--- a/drivers/of/Makefile
+++ b/drivers/of/Makefile
@@ -1,6 +1,7 @@
# SPDX-License-Identifier: GPL-2.0
obj-y = base.o device.o platform.o property.o
obj-$(CONFIG_OF_KOBJ) += kobj.o
+obj-$(CONFIG_OF_CONFIGFS) += configfs.o
obj-$(CONFIG_OF_DYNAMIC) += dynamic.o
obj-$(CONFIG_OF_FLATTREE) += fdt.o
obj-$(CONFIG_OF_EARLY_FLATTREE) += fdt_address.o
diff --git a/drivers/of/configfs.c b/drivers/of/configfs.c
new file mode 100644
index 000000000..5dd509e8f
--- /dev/null
+++ b/drivers/of/configfs.c
@@ -0,0 +1,290 @@
+/*
+ * Configfs entries for device-tree
+ *
+ * Copyright (C) 2013 - Pantelis Antoniou <panto@antoniou-consulting.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include <linux/ctype.h>
+#include <linux/cpu.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_fdt.h>
+#include <linux/spinlock.h>
+#include <linux/slab.h>
+#include <linux/proc_fs.h>
+#include <linux/configfs.h>
+#include <linux/types.h>
+#include <linux/stat.h>
+#include <linux/limits.h>
+#include <linux/file.h>
+#include <linux/vmalloc.h>
+#include <linux/firmware.h>
+#include <linux/sizes.h>
+
+#include "of_private.h"
+
+struct cfs_overlay_item {
+ struct config_item item;
+
+ char path[PATH_MAX];
+
+ const struct firmware *fw;
+ struct device_node *overlay;
+ int ov_id;
+
+ void *dtbo;
+ int dtbo_size;
+};
+
+static int create_overlay(struct cfs_overlay_item *overlay, void *blob, u32 blob_size)
+{
+ int err;
+
+ err = of_overlay_fdt_apply(blob, blob_size, &overlay->ov_id);
+ if (err < 0) {
+ pr_err("%s: Failed to create overlay (err=%d)\n",
+ __func__, err);
+ goto out_err;
+ }
+
+out_err:
+ return err;
+}
+
+static inline struct cfs_overlay_item *to_cfs_overlay_item(
+ struct config_item *item)
+{
+ return item ? container_of(item, struct cfs_overlay_item, item) : NULL;
+}
+
+static ssize_t cfs_overlay_item_path_show(struct config_item *item,
+ char *page)
+{
+ struct cfs_overlay_item *overlay = to_cfs_overlay_item(item);
+ return sprintf(page, "%s\n", overlay->path);
+}
+
+static ssize_t cfs_overlay_item_path_store(struct config_item *item,
+ const char *page, size_t count)
+{
+ struct cfs_overlay_item *overlay = to_cfs_overlay_item(item);
+ const char *p = page;
+ char *s;
+ int err;
+
+ /* if it's set do not allow changes */
+ if (overlay->path[0] != '\0' || overlay->dtbo_size > 0)
+ return -EPERM;
+
+ /* copy to path buffer (and make sure it's always zero terminated */
+ count = snprintf(overlay->path, sizeof(overlay->path) - 1, "%s", p);
+ overlay->path[sizeof(overlay->path) - 1] = '\0';
+
+ /* strip trailing newlines */
+ s = overlay->path + strlen(overlay->path);
+ while (s > overlay->path && *--s == '\n')
+ *s = '\0';
+
+ pr_debug("%s: path is '%s'\n", __func__, overlay->path);
+
+ err = request_firmware(&overlay->fw, overlay->path, NULL);
+ if (err != 0)
+ goto out_err;
+
+ err = create_overlay(overlay, (void *)overlay->fw->data, overlay->fw->size);
+ if (err != 0)
+ goto out_err;
+
+ return count;
+
+out_err:
+
+ release_firmware(overlay->fw);
+ overlay->fw = NULL;
+
+ overlay->path[0] = '\0';
+ return err;
+}
+
+static ssize_t cfs_overlay_item_status_show(struct config_item *item,
+ char *page)
+{
+ struct cfs_overlay_item *overlay = to_cfs_overlay_item(item);
+
+ return sprintf(page, "%s\n",
+ overlay->ov_id >= 0 ? "applied" : "unapplied");
+}
+
+CONFIGFS_ATTR(cfs_overlay_item_, path);
+CONFIGFS_ATTR_RO(cfs_overlay_item_, status);
+
+static struct configfs_attribute *cfs_overlay_attrs[] = {
+ &cfs_overlay_item_attr_path,
+ &cfs_overlay_item_attr_status,
+ NULL,
+};
+
+ssize_t cfs_overlay_item_dtbo_read(struct config_item *item,
+ void *buf, size_t max_count)
+{
+ struct cfs_overlay_item *overlay = to_cfs_overlay_item(item);
+
+ pr_debug("%s: buf=%p max_count=%zu\n", __func__,
+ buf, max_count);
+
+ if (overlay->dtbo == NULL)
+ return 0;
+
+ /* copy if buffer provided */
+ if (buf != NULL) {
+ /* the buffer must be large enough */
+ if (overlay->dtbo_size > max_count)
+ return -ENOSPC;
+
+ memcpy(buf, overlay->dtbo, overlay->dtbo_size);
+ }
+
+ return overlay->dtbo_size;
+}
+
+ssize_t cfs_overlay_item_dtbo_write(struct config_item *item,
+ const void *buf, size_t count)
+{
+ struct cfs_overlay_item *overlay = to_cfs_overlay_item(item);
+ int err;
+
+ /* if it's set do not allow changes */
+ if (overlay->path[0] != '\0' || overlay->dtbo_size > 0)
+ return -EPERM;
+
+ /* copy the contents */
+ overlay->dtbo = kmemdup(buf, count, GFP_KERNEL);
+ if (overlay->dtbo == NULL)
+ return -ENOMEM;
+
+ overlay->dtbo_size = count;
+
+ err = create_overlay(overlay, overlay->dtbo, overlay->dtbo_size);
+ if (err != 0)
+ goto out_err;
+
+ return count;
+
+out_err:
+ kfree(overlay->dtbo);
+ overlay->dtbo = NULL;
+ overlay->dtbo_size = 0;
+
+ return err;
+}
+
+CONFIGFS_BIN_ATTR(cfs_overlay_item_, dtbo, NULL, SZ_1M);
+
+static struct configfs_bin_attribute *cfs_overlay_bin_attrs[] = {
+ &cfs_overlay_item_attr_dtbo,
+ NULL,
+};
+
+static void cfs_overlay_release(struct config_item *item)
+{
+ struct cfs_overlay_item *overlay = to_cfs_overlay_item(item);
+
+ if (overlay->ov_id >= 0)
+ of_overlay_remove(&overlay->ov_id);
+ if (overlay->fw)
+ release_firmware(overlay->fw);
+ /* kfree with NULL is safe */
+ kfree(overlay->dtbo);
+ kfree(overlay);
+}
+
+static struct configfs_item_operations cfs_overlay_item_ops = {
+ .release = cfs_overlay_release,
+};
+
+static struct config_item_type cfs_overlay_type = {
+ .ct_item_ops = &cfs_overlay_item_ops,
+ .ct_attrs = cfs_overlay_attrs,
+ .ct_bin_attrs = cfs_overlay_bin_attrs,
+ .ct_owner = THIS_MODULE,
+};
+
+static struct config_item *cfs_overlay_group_make_item(
+ struct config_group *group, const char *name)
+{
+ struct cfs_overlay_item *overlay;
+
+ overlay = kzalloc(sizeof(*overlay), GFP_KERNEL);
+ if (!overlay)
+ return ERR_PTR(-ENOMEM);
+ overlay->ov_id = -1;
+
+ config_item_init_type_name(&overlay->item, name, &cfs_overlay_type);
+ return &overlay->item;
+}
+
+static void cfs_overlay_group_drop_item(struct config_group *group,
+ struct config_item *item)
+{
+ struct cfs_overlay_item *overlay = to_cfs_overlay_item(item);
+
+ config_item_put(&overlay->item);
+}
+
+static struct configfs_group_operations overlays_ops = {
+ .make_item = cfs_overlay_group_make_item,
+ .drop_item = cfs_overlay_group_drop_item,
+};
+
+static struct config_item_type overlays_type = {
+ .ct_group_ops = &overlays_ops,
+ .ct_owner = THIS_MODULE,
+};
+
+static struct configfs_group_operations of_cfs_ops = {
+ /* empty - we don't allow anything to be created */
+};
+
+static struct config_item_type of_cfs_type = {
+ .ct_group_ops = &of_cfs_ops,
+ .ct_owner = THIS_MODULE,
+};
+
+struct config_group of_cfs_overlay_group;
+
+static struct configfs_subsystem of_cfs_subsys = {
+ .su_group = {
+ .cg_item = {
+ .ci_namebuf = "device-tree",
+ .ci_type = &of_cfs_type,
+ },
+ },
+ .su_mutex = __MUTEX_INITIALIZER(of_cfs_subsys.su_mutex),
+};
+
+static int __init of_cfs_init(void)
+{
+ int ret;
+
+ pr_info("%s\n", __func__);
+
+ config_group_init(&of_cfs_subsys.su_group);
+ config_group_init_type_name(&of_cfs_overlay_group, "overlays",
+ &overlays_type);
+ configfs_add_default_group(&of_cfs_overlay_group,
+ &of_cfs_subsys.su_group);
+
+ ret = configfs_register_subsystem(&of_cfs_subsys);
+ if (ret != 0) {
+ pr_err("%s: failed to register subsys\n", __func__);
+ goto out;
+ }
+ pr_info("%s: OK\n", __func__);
+out:
+ return ret;
+}
+late_initcall(of_cfs_init);

84
patch/kernel/rockchip64-dev/add-board-nanopi-m4v2.patch Normal file
View file

@ -0,0 +1,84 @@
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index 948195b49..48dccb95e 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -22,6 +22,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-khadas-edge-captain.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-khadas-edge-v.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopc-t4.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-m4.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-m4v2.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-neo4.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-orangepi.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-pinebook-pro.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-nanopi-m4v2.dts b/arch/arm64/boot/dts/rockchip/rk3399-nanopi-m4v2.dts
new file mode 100644
index 000000000..60358ab8c
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3399-nanopi-m4v2.dts
@@ -0,0 +1,66 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * FriendlyElec NanoPi M4V2 board device tree source
+ *
+ * Copyright (c) 2018 FriendlyElec Computer Tech. Co., Ltd.
+ * (http://www.friendlyarm.com)
+ *
+ * Copyright (c) 2018 Collabora Ltd.
+ * Copyright (c) 2019 Arm Ltd.
+ */
+
+/dts-v1/;
+#include "rk3399-nanopi4.dtsi"
+
+/ {
+ model = "FriendlyElec NanoPi M4 Ver2.0";
+ compatible = "friendlyarm,nanopi-m4", "rockchip,rk3399";
+
+ vdd_5v: vdd-5v {
+ compatible = "regulator-fixed";
+ regulator-name = "vdd_5v";
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ vcc5v0_core: vcc5v0-core {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_core";
+ regulator-always-on;
+ regulator-boot-on;
+ vin-supply = <&vdd_5v>;
+ };
+
+ vcc5v0_usb1: vcc5v0-usb1 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_usb1";
+ regulator-always-on;
+ regulator-boot-on;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vcc5v0_usb2: vcc5v0-usb2 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_usb2";
+ regulator-always-on;
+ regulator-boot-on;
+ vin-supply = <&vcc5v0_sys>;
+ };
+};
+
+&vcc3v3_sys {
+ vin-supply = <&vcc5v0_core>;
+};
+
+&u2phy0_host {
+ phy-supply = <&vcc5v0_usb1>;
+};
+
+&u2phy1_host {
+ phy-supply = <&vcc5v0_usb2>;
+};
+
+&vbus_typec {
+ regulator-always-on;
+ vin-supply = <&vdd_5v>;
+};

15
patch/kernel/rockchip64-dev/board-nanopi-m4v2-dts-ethernet-tweak.patch Normal file
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@ -0,0 +1,15 @@
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-nanopi-m4v2.dts b/arch/arm64/boot/dts/rockchip/rk3399-nanopi-m4v2.dts
index 60358ab8c..057045ca3 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-nanopi-m4v2.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-nanopi-m4v2.dts
@@ -48,6 +48,10 @@
};
};
+&gmac {
+ rx_delay = <0x16>;
+};
+
&vcc3v3_sys {
vin-supply = <&vcc5v0_core>;
};

20
patch/kernel/rockchip64-dev/board-nanopi-m4v2-dts.patch
View file

@ -1,20 +0,0 @@
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index 948195b49..48dccb95e 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -22,6 +22,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-khadas-edge-captain.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-khadas-edge-v.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopc-t4.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-m4.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-m4v2.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-neo4.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-orangepi.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-pinebook-pro.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-nanopi-m4v2.dts b/arch/arm64/boot/dts/rockchip/rk3399-nanopi-m4v2.dts
new file mode 120000
index 000000000..5c27e6fc3
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3399-nanopi-m4v2.dts
@@ -0,0 +1 @@
+rk3399-nanopi-m4.dts
\ No newline at end of file

12
patch/kernel/rockchip64-dev/board-rockpi4-dts-upper-port-host.patch Normal file
View file

@ -0,0 +1,12 @@
--- a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts 2019-12-28 20:11:18.831388678 +0200
+++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts 2019-12-28 20:11:33.335365912 +0200
@@ -735,7 +735,7 @@
&usbdrd_dwc3_0 {
status = "okay";
- dr_mode = "otg";
+ dr_mode = "host";
};
&usbdrd3_1 {

21
patch/kernel/rockchip64-dev/board-rockpro64-remove-duplicate-spi-nor.patch Normal file
View file

@ -0,0 +1,21 @@
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts b/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts
index f04cd5c..ed3ebdf 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts
@@ -757,16 +757,6 @@
status = "okay";
};
-&spi1 {
- status = "okay";
-
- flash@0 {
- compatible = "jedec,spi-nor";
- reg = <0>;
- spi-max-frequency = <10000000>;
- };
-};
-
&tcphy0 {
status = "okay";
};

2010
patch/kernel/s5p6818-legacy/nexcell-support-v2.patch → patch/kernel/s5p6818-legacy/nexcell-support-v3.patch
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File diff suppressed because it is too large Load diff

13562
patch/kernel/sunxi-current/patch-5.4.6-7.patch Normal file
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File diff suppressed because it is too large Load diff

1
patch/kernel/sunxi-dev
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@ -1 +0,0 @@
sunxi-current

229
patch/kernel/sunxi-dev/0000-axp-adjustements.patch.disabled Normal file
View file

@ -0,0 +1,229 @@
diff --git a/drivers/leds/Kconfig b/drivers/leds/Kconfig
index 44097a3e0..a0cbdbb2c 100644
--- a/drivers/leds/Kconfig
+++ b/drivers/leds/Kconfig
@@ -756,6 +756,14 @@ config LEDS_NIC78BX
To compile this driver as a module, choose M here: the module
will be called leds-nic78bx.
+config LEDS_AXP20X
+ tristate "LED support for AXP20X-like PMICs (AXP813, ...)"
+ depends on LEDS_CLASS && MFD_AXP20X
+ help
+ This option enables support for on-chip LED drivers on
+ AXP20X-like PMICs.
+
+
comment "LED Triggers"
source "drivers/leds/trigger/Kconfig"
diff --git a/drivers/leds/Makefile b/drivers/leds/Makefile
index 420b5d2cf..a8149fb6e 100644
--- a/drivers/leds/Makefile
+++ b/drivers/leds/Makefile
@@ -78,6 +78,7 @@ obj-$(CONFIG_LEDS_MT6323) += leds-mt6323.o
obj-$(CONFIG_LEDS_LM3692X) += leds-lm3692x.o
obj-$(CONFIG_LEDS_SC27XX_BLTC) += leds-sc27xx-bltc.o
obj-$(CONFIG_LEDS_LM3601X) += leds-lm3601x.o
+obj-$(CONFIG_LEDS_AXP20X) += leds-axp20x.o
# LED SPI Drivers
obj-$(CONFIG_LEDS_CR0014114) += leds-cr0014114.o
diff --git a/drivers/leds/leds-axp20x.c b/drivers/leds/leds-axp20x.c
new file mode 100644
index 000000000..de33c1d83
--- /dev/null
+++ b/drivers/leds/leds-axp20x.c
@@ -0,0 +1,138 @@
+/*
+ * LED Driver for X-Powers AXP813 PMIC.
+ *
+ * Copyright(c) 2017 Ondrej Jirman <megous@megous.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/platform_device.h>
+#include <linux/leds.h>
+#include <linux/slab.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/mfd/axp20x.h>
+
+#define AXP813_CHGLED_CTRL_MASK BIT(3)
+#define AXP813_CHGLED_CTRL_CHARGER BIT(3)
+#define AXP813_CHGLED_CTRL_USER 0
+
+#define AXP813_CHGLED_USER_STATE_MASK GENMASK(5, 4)
+#define AXP813_CHGLED_USER_STATE_OFFSET 4
+#define AXP813_CHGLED_USER_STATE_OFF 0
+#define AXP813_CHGLED_USER_STATE_BLINK_SLOW 1
+#define AXP813_CHGLED_USER_STATE_BLINK_FAST 2
+#define AXP813_CHGLED_USER_STATE_ON 3
+
+struct axp20x_led {
+ struct led_classdev cdev;
+ struct regmap *regmap;
+};
+
+static int axp20x_led_set(struct led_classdev *led_cdev,
+ enum led_brightness value)
+{
+ struct axp20x_led *led =
+ container_of(led_cdev, struct axp20x_led, cdev);
+ unsigned int val;
+
+ val = value == LED_OFF ? AXP813_CHGLED_USER_STATE_OFF :
+ AXP813_CHGLED_USER_STATE_ON;
+
+ return regmap_update_bits(led->regmap, AXP20X_OFF_CTRL,
+ AXP813_CHGLED_USER_STATE_MASK,
+ val << AXP813_CHGLED_USER_STATE_OFFSET);
+
+}
+
+static int axp20x_led_probe(struct platform_device *pdev)
+{
+ struct axp20x_dev *axp20x;
+ struct axp20x_led *led;
+ int ret;
+
+ if (!of_device_is_available(pdev->dev.of_node))
+ return -ENODEV;
+
+ axp20x = dev_get_drvdata(pdev->dev.parent);
+ if (!axp20x)
+ return -EINVAL;
+
+ led = devm_kzalloc(&pdev->dev,
+ sizeof(struct axp20x_led),
+ GFP_KERNEL);
+ if (!led)
+ return -ENOMEM;
+
+ led->regmap = axp20x->regmap;
+
+ led->cdev.name = "chgled";
+ led->cdev.brightness_set_blocking = axp20x_led_set;
+ led->cdev.brightness = LED_OFF;
+ led->cdev.max_brightness = 1;
+
+ ret = led_classdev_register(pdev->dev.parent, &led->cdev);
+ if (ret) {
+ dev_err(&pdev->dev, "Failed to register led %s\n",
+ led->cdev.name);
+ return ret;
+ }
+
+ ret = regmap_update_bits(led->regmap, AXP20X_OFF_CTRL,
+ AXP813_CHGLED_CTRL_MASK,
+ AXP813_CHGLED_CTRL_USER);
+ if (ret) {
+ dev_err(&pdev->dev, "Failed to enable user cnotrol\n");
+ }
+
+ ret = axp20x_led_set(&led->cdev, led->cdev.brightness);
+ if (ret) {
+ dev_err(&pdev->dev, "Failed to init led %s\n",
+ led->cdev.name);
+ }
+
+ platform_set_drvdata(pdev, led);
+ return 0;
+}
+
+static int axp20x_led_remove(struct platform_device *pdev)
+{
+ struct axp20x_led *led = platform_get_drvdata(pdev);
+
+ axp20x_led_set(&led->cdev, LED_OFF);
+
+ regmap_update_bits(led->regmap, AXP20X_OFF_CTRL,
+ AXP813_CHGLED_CTRL_MASK,
+ AXP813_CHGLED_CTRL_CHARGER);
+
+ led_classdev_unregister(&led->cdev);
+
+ return 0;
+}
+
+static const struct of_device_id axp20x_leds_of_match[] = {
+ { .compatible = "x-powers,axp813-leds", },
+ { },
+};
+MODULE_DEVICE_TABLE(of, axp20x_leds_of_match);
+
+static struct platform_driver axp20x_led_driver = {
+ .driver = {
+ .name = "axp20x-leds",
+ .of_match_table = axp20x_leds_of_match,
+ },
+ .probe = axp20x_led_probe,
+ .remove = axp20x_led_remove,
+};
+
+module_platform_driver(axp20x_led_driver);
+
+MODULE_AUTHOR("Ondrej Jirman <megous@megous.com>");
+MODULE_DESCRIPTION("LED driver for AXP813 PMIC");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:leds-axp20x");
diff --git a/drivers/mfd/axp20x.c b/drivers/mfd/axp20x.c
index 0be511dd9..a9bdf3cdd 100644
--- a/drivers/mfd/axp20x.c
+++ b/drivers/mfd/axp20x.c
@@ -24,6 +24,7 @@
#include <linux/pm_runtime.h>
#include <linux/regmap.h>
#include <linux/regulator/consumer.h>
+#include <linux/regulator/userspace-consumer.h>
#include <linux/mfd/axp20x.h>
#include <linux/mfd/core.h>
#include <linux/of_device.h>
@@ -130,6 +131,7 @@ static const struct regmap_range axp288_volatile_ranges[] = {
regmap_reg_range(AXP288_BC_GLOBAL, AXP288_BC_GLOBAL),
regmap_reg_range(AXP288_BC_DET_STAT, AXP288_BC_DET_STAT),
regmap_reg_range(AXP20X_CHRG_BAK_CTRL, AXP20X_CHRG_BAK_CTRL),
+ regmap_reg_range(AXP22X_CHRG_CTRL3, AXP22X_CHRG_CTRL3),
regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IPSOUT_V_HIGH_L),
regmap_reg_range(AXP20X_TIMER_CTRL, AXP20X_TIMER_CTRL),
regmap_reg_range(AXP22X_GPIO_STATE, AXP22X_GPIO_STATE),
@@ -762,6 +764,16 @@ static const struct mfd_cell axp809_cells[] = {
},
};
+static struct regulator_bulk_data vcc_vb = {
+ .supply = "vcc-vb",
+};
+
+static struct regulator_userspace_consumer_data vcc_vb_data = {
+ .name = "vcc-vb",
+ .num_supplies = 1,
+ .supplies = &vcc_vb,
+};
+
static const struct mfd_cell axp813_cells[] = {
{
.name = "axp221-pek",
@@ -778,6 +790,16 @@ static const struct mfd_cell axp813_cells[] = {
}, {
.name = "axp20x-battery-power-supply",
.of_compatible = "x-powers,axp813-battery-power-supply",
+ }, {
+ .name = "axp20x-usb-power-supply",
+ .of_compatible = "x-powers,axp813-usb-power-supply",
+ }, {
+ .name = "axp20x-leds",
+ .of_compatible = "x-powers,axp813-leds",
+ }, {
+ .name = "reg-userspace-consumer",
+ .platform_data = &vcc_vb_data,
+ .pdata_size = sizeof(vcc_vb_data),
},
};

346
patch/kernel/sunxi-dev/0000-sound-soc-ac100-codec-Initial-implementation.patch.disabled Normal file
View file

@ -0,0 +1,346 @@
From 6eb4890e1b83490864f18d3926182069e54a4dfb Mon Sep 17 00:00:00 2001
From: Ondrej Jirman <megous@megous.com>
Date: Sun, 12 Nov 2017 23:09:14 +0100
Subject: [PATCH] sound: soc: ac100-codec: Initial implementation
This driver provides AC100 codec controls.
Note: This does not yet provide anything, it's just a skeleton
for a future driver.
Signed-off-by: Ondrej Jirman <megous@megous.com>
---
sound/soc/sunxi/Kconfig | 11 ++
sound/soc/sunxi/Makefile | 1 +
sound/soc/sunxi/ac100-codec.c | 291 ++++++++++++++++++++++++++++++++++
3 files changed, 303 insertions(+)
create mode 100644 sound/soc/sunxi/ac100-codec.c
diff --git a/sound/soc/sunxi/Kconfig b/sound/soc/sunxi/Kconfig
index 22408bc2d6ec6..e276cc94a8c5e 100644
--- a/sound/soc/sunxi/Kconfig
+++ b/sound/soc/sunxi/Kconfig
@@ -20,6 +20,17 @@ config SND_SUN8I_CODEC
Say Y or M if you want to add sun8i digital audio codec support.
+config SND_AC100_CODEC
+ tristate "Allwinner (X-Powers) AC100 audio codec"
+ depends on OF
+ depends on MACH_SUN8I || COMPILE_TEST
+ select REGMAP_MMIO
+ help
+ This option enables the audio codec support for Allwinner (X-Powers)
+ AC100 chip.
+
+ Say Y or M if you want to add AC100 audio codec support.
+
config SND_SUN8I_CODEC_ANALOG
tristate "Allwinner sun8i Codec Analog Controls Support"
depends on MACH_SUN8I || (ARM64 && ARCH_SUNXI) || COMPILE_TEST
diff --git a/sound/soc/sunxi/Makefile b/sound/soc/sunxi/Makefile
index 4a9ef67386caf..83461fdbfaa2a 100644
--- a/sound/soc/sunxi/Makefile
+++ b/sound/soc/sunxi/Makefile
@@ -4,3 +4,4 @@ obj-$(CONFIG_SND_SUN4I_I2S) += sun4i-i2s.o
obj-$(CONFIG_SND_SUN4I_SPDIF) += sun4i-spdif.o
obj-$(CONFIG_SND_SUN8I_CODEC_ANALOG) += sun8i-codec-analog.o
obj-$(CONFIG_SND_SUN8I_CODEC) += sun8i-codec.o
+obj-$(CONFIG_SND_AC100_CODEC) += ac100-codec.o
diff --git a/sound/soc/sunxi/ac100-codec.c b/sound/soc/sunxi/ac100-codec.c
new file mode 100644
index 0000000000000..d5438815be754
--- /dev/null
+++ b/sound/soc/sunxi/ac100-codec.c
@@ -0,0 +1,291 @@
+/*
+ * This driver supports the controls for X-Powers (Allwinner)
+ * AC100 audio codec. This codec is co-packaged with AXP81x PMICs.
+ *
+ * (C) Copyright 2017 Ondrej Jirman <megous@megous.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/module.h>
+#include <linux/delay.h>
+#include <linux/clk.h>
+#include <linux/io.h>
+#include <linux/pm_runtime.h>
+#include <linux/regmap.h>
+#include <linux/mfd/ac100.h>
+
+#include <sound/pcm_params.h>
+#include <sound/soc.h>
+#include <sound/soc-dapm.h>
+
+/*
+ * Reasearch
+ * ---------
+ *
+ * Features:
+ * 2 A/D
+ * 2 D/A
+ * 2 I2S/PCM #1 and #2
+ * 1 PCM mono #3 muxable with I2S #2
+ * 3 mic inputs (mic #2 and #3 exclusively muxable at input)
+ * 1 line in (directly or through amp)
+ * 1 aux input
+ * all input signals mixable directly into output (bypass AD/DA)
+ *
+ * outputs:
+ * HPOUTL - headphone left
+ * HPOUTR - headphone right
+ * LINEOUT - line out differential
+ * EAROUT - earpeiece differential
+ * SPKOUT1 - SPOL left speaker differnetial
+ * SPKOUT2 - SPOR right speaker differnetial
+ *
+ * Power up:
+ * LDOIN - 1.5-3.3V external power
+ * AVCC - analog power 3V
+ * CPVDD - 1.8V
+ * VDD-IO1 - power for I2S #1 and #2 1.8/3V
+ * VDD-IO2 - power for I2S #3 1.8/3V
+ * VCC-RTC - power for RTC 1.8/3V
+ *
+ * Clocks: page 28
+ * SYSCLK must be 24576000 Hz (48kHz) or 22579200 Hz (44.1kHz)
+ * - Source I2S1CLK/MCLK1
+ * - If SRC# module is used SYSCLK must be generated by PLL
+ *
+ * A/D:
+ * ADC_APC_CTRL B15 B11 enable/disable A/D to save power
+ * ADC_APC_CTRL B14-12 B10-8 volume control for A/D
+ * ADC_DIG_CTRL B15 enable/disable digital A/D to save power
+ * ADDA_FS_I2S1 ADDA_FS_I2S2 - select sample rate
+ *
+ * D/A:
+ * OMIXER_DACA_CTRL B15-14 enable/disable D/A channels
+ * DAC_DIG_CTRL B15 enable/disable digital D/A
+ *
+ * Mixer:
+ * - 2 channels DAC Output mixers
+ * - inputs:
+ * - LINEINL/R
+ * - AXIL/R
+ * - MIC1P/N,MIC2P/N
+ * - Stereo DAC output
+ * - 2 channels ADC Record mixers
+ * - inputs:
+ * - LINEINL/R
+ * - AXIL/R
+ * - MIC1P/N,MIC2P/N
+ * - Stereo DAC output
+ * - Digital mixers
+ * - avaliable on:
+ * - before stereo DAC - DAC_MXR_SRC
+ * - I2S1 output - I2S1_MXR_SRC
+ * - I2S2 output - I2S2_MXR_SRC
+ * - Analogue inputs
+ * - LINEINL/R - 1 ch. mono
+ * - can be mixed into ADC record mixer or DAC output mixer
+ * - -9dB to 12dB in 1.5dB step by LINEIN_DIFF_PREG
+ * - AXIL/R - 2 ch. stereo
+ * - can be mixed into ADC record mixer or DAC output mixer
+ * - programmable volume level adj. and mute
+ * - -9dB to 12dB in 1.5dB steps by AXI_PREG
+ * - MIC1P/N - has preamp
+ * - MIC2P/N - has preamp
+ * - MIC3P/N - has preamp muxed with MIC2 (sel by ADC_SRCBST_CTRL B7)
+ * - can be mixed into ADC record mixer or DAC output mixer
+ * - preamps enable at ADC_SRCBST_CTRL B15 and B11
+ * - preamp gain at MIC1BOOST MIC2BOOST
+ * - Analogue outputs:
+ * - HPOUTL/R, HPOUTFB - 2ch. headphones
+ * - sources output mixer or directly from DAC
+ * - sel HPOUT_CTRL B15 B14
+ * - mute HPOUT_CTRL B13 B12
+ * - power amp
+ * - powerdown/up HPOUT_CTRL B11
+ * - volume HP_VOL[5:0] - 64dB range in 1dB step from 0dB to -62dB
+ * - mute by using 0 for HP_VOL[5:0]
+ * - DC offset cancellation (POP noise) HP_DCRM_EN
+ * - This bit must be set 0xf before headphone PA enabled, and this bit
+ * must be set 0x0 before headphone PA disabled.
+ * - zero cross to prevent noise/clicsk on volume change ZCROSS_EN
+ * - SPOLP/N, SPORP/N 2 ch. speakers (mono/stereo)
+ * - source for SPOLP
+ * - left output mixer or (left+right) output mixer
+ * - source for SPORP
+ * - right output mixer or (left+right) output mixer
+ * - volume 43.5dB rang in 1.5dB step from -43.5dB to 0dB
+ * - amp enable SPKOUT_CTRL B11 B7
+ * - EAROUTP/N - 1 ch earpeice
+ * - source left DAC, right DAC, left output mixer or right output mixer
+ * - volume ERPOUT_CTRL[4:0] 43.5dB range in 1.5dB step from -43.5dB to 0dB
+ * - power amp enable ERPOUT_CTRL B5
+ * - LINEOUTP/N - 1ch line out
+ * - source MIC1 preamp, MIC2 preamp, left output mix or right output mix
+ * - volume 10.5dB range in 1.5dB step from -4.5dB to 6dB
+ * - out buffer power up/down LOUT_CTRL B4
+ *
+ * Jack insert detection:
+ * - HBIAS current detection
+ * - 5bit ADC sample rate 16/32/64/128Hz
+ * - HMIC_STATUS[12:8] - ADC value
+ * - 2 thresholds TH1 for plug connection, TH2 for key press
+ * - can periodically trigger interrupts during key press (HBIAS above TH2)
+ *
+ * Interrupts:
+ * - FALLING_EDGE
+ * - for:
+ * - KEYDOWN
+ * - KEYUP
+ * - PLUG_IN
+ * - PLUG_OUT
+ * - HMIC_DATA
+ *
+ * High Pass Filter:
+ * - remove DC offset, can be disabled
+ *
+ * AGC:
+ * - automatic gain control before ADC input channels
+ * - params:
+ * - attack, decay time - 32/fs to 2^15*32/fs
+ * - target gain - –1dB to –30dB relative to a full-scale signal
+ * - noise threshold - –30dB to –90dB of full-scale (mute if input below this level)
+ * - max gain 0dB to 40dB in steps of 0.5dB
+ * - hysteresis - for noise detection in terms of signal level
+ * - debounce time - hysteresis for noise det in terms of time
+ * - also provides some output flags:
+ * - noise threshold reached
+ * - current gain
+ * - agc saturated (gain could get higher for the given input, but limited by
+ * params)
+ * - adc saturated - clipping at ADC input stage
+ *
+ * DRC:
+ * - dynamic range control for digital playback path
+ * - energy filter
+ * - compressor
+ * - smooth filter
+ * - can be disabled
+ */
+
+#define AC100_HMIC_DATA_MASK GENMASK(12, 8)
+#define AC100_HMIC_DATA_OFF 8
+#define AC100_HMIC_PULLOUT_PENDING BIT(4)
+#define AC100_HMIC_PLUGIN_PENDING BIT(3)
+#define AC100_HMIC_KEYUP_PENDING BIT(2)
+#define AC100_HMIC_KEYDOWN_PENDING BIT(1)
+#define AC100_HMIC_DATA_PENDING BIT(0)
+
+struct ac100_codec {
+ struct device *dev;
+ struct regmap *regmap;
+ int irq;
+};
+
+static irqreturn_t ac100_codec_irq(int irq, void *data)
+{
+ struct ac100_codec *codec = data;
+ unsigned int val = 0;
+ int ret;
+
+ /* read status */
+ ret = regmap_read(codec->regmap, AC100_HMIC_STATUS, &val);
+ if (ret)
+ return IRQ_HANDLED;
+
+ if (val & AC100_HMIC_PULLOUT_PENDING) {
+ dev_info(codec->dev, "IRQ: Pull out");
+ }
+
+ if (val & AC100_HMIC_PLUGIN_PENDING) {
+ dev_info(codec->dev, "IRQ: Plug in");
+ }
+
+ if (val & AC100_HMIC_KEYUP_PENDING) {
+ dev_info(codec->dev, "IRQ: Key up");
+ }
+
+ if (val & AC100_HMIC_KEYDOWN_PENDING) {
+ dev_info(codec->dev, "IRQ: Key down");
+ }
+
+ if (val & AC100_HMIC_DATA_PENDING) {
+ dev_info(codec->dev, "IRQ: Data");
+ }
+
+ /* clear status */
+ ret = regmap_write(codec->regmap, AC100_HMIC_STATUS, 0);
+ if (ret)
+ return IRQ_HANDLED;
+
+ return IRQ_HANDLED;
+}
+
+static int ac100_codec_probe(struct platform_device *pdev)
+{
+ struct ac100_dev *ac100 = dev_get_drvdata(pdev->dev.parent);
+ struct ac100_codec *codec;
+ int ret;
+
+ codec = devm_kzalloc(&pdev->dev, sizeof(*codec), GFP_KERNEL);
+ if (!codec)
+ return -ENOMEM;
+
+ platform_set_drvdata(pdev, codec);
+ codec->dev = &pdev->dev;
+ codec->regmap = ac100->regmap;
+
+ codec->irq = platform_get_irq(pdev, 0);
+ if (codec->irq < 0) {
+ dev_err(&pdev->dev, "No IRQ resource\n");
+ return codec->irq;
+ }
+
+ ret = devm_request_threaded_irq(&pdev->dev, codec->irq, NULL,
+ ac100_codec_irq,
+ IRQF_SHARED | IRQF_ONESHOT,
+ dev_name(&pdev->dev), codec);
+ if (ret) {
+ dev_err(&pdev->dev, "Could not request IRQ\n");
+ return ret;
+ }
+
+ return ret;
+}
+
+static int ac100_codec_remove(struct platform_device *pdev)
+{
+ struct snd_soc_card *card = platform_get_drvdata(pdev);
+ struct ac100_codec *codec = snd_soc_card_get_drvdata(card);
+
+ return 0;
+}
+
+static const struct of_device_id ac100_codec_of_match[] = {
+ { .compatible = "x-powers,ac100-codec" },
+ {}
+};
+MODULE_DEVICE_TABLE(of, ac100_codec_of_match);
+
+static struct platform_driver ac100_codec_driver = {
+ .driver = {
+ .name = "ac100-codec",
+ .of_match_table = ac100_codec_of_match,
+ },
+ .probe = ac100_codec_probe,
+ .remove = ac100_codec_remove,
+};
+module_platform_driver(ac100_codec_driver);
+
+MODULE_DESCRIPTION("X-Powers AC100 codec driver");
+MODULE_AUTHOR("Ondrej Jirman <megous@megous.com>");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:ac100-codec");

52
patch/kernel/sunxi-dev/0001-arm64-allwinner-a64-enable-Wi-Fi-for-Pine64.patch Normal file
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@ -0,0 +1,52 @@
From a5b709a81ad9a5e2e6e4be6a696711ad7f35ad57 Mon Sep 17 00:00:00 2001
From: Icenowy Zheng <icenowy@aosc.io>
Date: Thu, 9 Feb 2017 00:18:56 +0800
Subject: [PATCH 001/146] arm64: allwinner: a64: enable Wi-Fi for Pine64
The Wi-Fi modules of Pine64 is powered via DLDO4 and ELDO1 (the latter
one provides I/O voltage).
Add device node for it.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
---
.../boot/dts/allwinner/sun50i-a64-pine64.dts | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
index 1b9b92e541d2..d06b5b88f60e 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
@@ -62,6 +62,11 @@
chosen {
stdout-path = "serial0:115200n8";
};
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
+ };
};
&ehci0 {
@@ -109,6 +114,17 @@
status = "okay";
};
+&mmc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc1_pins>;
+ vmmc-supply = <&reg_dldo4>;
+ vqmmc-supply = <&reg_eldo1>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ non-removable;
+ bus-width = <4>;
+ status = "okay";
+};
+
&ohci0 {
status = "okay";
};
--
2.17.1

33
patch/kernel/sunxi-dev/0001-arm64-pine64-plus-add-PHY-regulator-delay.patch Normal file
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@ -0,0 +1,33 @@
From bb0516f4d03ffe9bcc06f840e477ea665af94e9d Mon Sep 17 00:00:00 2001
From: Jernej Skrabec <jernej.skrabec@siol.net>
Date: Sun, 25 Aug 2019 14:40:10 +0200
Subject: [PATCH] arm64: dts: allwinner: a64: pine64-plus: Add PHY regulator
delay
Depending on kernel and bootloader configuration, it's possible that
Realtek ethernet PHY isn't powered on properly. It needs some time
before it can be used.
Fix that by adding 100ms ramp delay to regulator responsible for
powering PHY.
Fixes: 94dcfdc77fc5 ("arm64: allwinner: pine64-plus: Enable dwmac-sun8i")
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
---
arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
index 24f1aac366d6..9612a34c1762 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
@@ -63,3 +63,7 @@
reg = <1>;
};
};
+
+&reg_dc1sw {
+ regulator-enable-ramp-delay = <100000>;
+};
--
2.23.0

13055
patch/kernel/sunxi-dev/0001-general-armbian-boot-logo.patch Normal file
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File diff suppressed because it is too large Load diff

30
patch/kernel/sunxi-dev/0001-pinctrl-sunxi-Disable-strict-mode-for-A64-pinctrl-dr.patch Normal file
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@ -0,0 +1,30 @@
From 4aa7894de903660f5c8d5155f2590d00022ca95e Mon Sep 17 00:00:00 2001
From: WaterByWind <WaterByWind@users.noreply.github.com>
Date: Sun, 14 Apr 2019 16:16:09 -0400
Subject: [PATCH] pinctrl: sunxi: Disable strict mode for A64 pinctrl driver
With kernel 4.15.y (and later):
* Strict mode was enabled by default via commit 1396007286b1e2fd5dd10ae6a5ccaaaed51ab762 which can/will cause breakage with existing implementations.
* The ability to configure strict mode was added via commit aae842a3ff3385f27f1df8a9ee1494a416ec032d to allow older drivers to maintain existing behavior and avoid breakage.
* Commit cd70387f892205bcd7b8093b0837269b0739cbe0 had then explicitly disabled strict mode for most other existing SoCs but did not include A64.
This change is to update the A64 pinctrl driver similar to the other pre-existing SoC pinctrl drivers.
---
drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c b/drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c
index 7b83d3755a0e..bea52c5a9afa 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c
@@ -578,6 +578,7 @@ static const struct sunxi_pinctrl_desc a64_pinctrl_data = {
.pins = a64_pins,
.npins = ARRAY_SIZE(a64_pins),
.irq_banks = 3,
+ .disable_strict_mode = true,
};
static int a64_pinctrl_probe(struct platform_device *pdev)
--
2.20.1 (Apple Git-117)

72
patch/kernel/sunxi-dev/0002-arm64-allwinner-a64-add-Mali-device-node.patch-DISABLED Normal file
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@ -0,0 +1,72 @@
From fa666ec858630bad5d3bf2952c96460302065102 Mon Sep 17 00:00:00 2001
From: Icenowy Zheng <icenowy@aosc.io>
Date: Sat, 6 May 2017 19:29:44 +0800
Subject: [PATCH 002/146] arm64: allwinner: a64: add Mali device node
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 41 +++++++++++++++++++
1 file changed, 41 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index d3daf90a8715..0f69f3593975 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -157,6 +157,20 @@
compatible = "linux,spdif-dit";
};
+ reserved-memory {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ cma: linux,cma {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x4000000>;
+ alignment = <0x2000>;
+ linux,cma-default;
+ };
+ };
+
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13
@@ -664,6 +678,33 @@
};
};
+ mali: gpu@1c40000 {
+ compatible = "allwinner,sun50i-a64-mali",
+ "allwinner,sun7i-a20-mali", "arm,mali-400";
+ reg = <0x01c40000 0x10000>;
+ interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "gp",
+ "gpmmu",
+ "pp0",
+ "ppmmu0",
+ "pp1",
+ "ppmmu1",
+ "pmu";
+ clocks = <&ccu CLK_BUS_GPU>, <&ccu CLK_GPU>;
+ clock-names = "bus", "core";
+ resets = <&ccu RST_BUS_GPU>;
+ memory-region = <&cma>;
+
+ assigned-clocks = <&ccu CLK_GPU>;
+ assigned-clock-rates = <384000000>;
+ };
+
gic: interrupt-controller@1c81000 {
compatible = "arm,gic-400";
reg = <0x01c81000 0x1000>,
--
2.17.1

35
patch/kernel/sunxi-dev/0003-net-stmmac-dwmac-sun8i-support-RGMII-modes-with-PHY-.patch Normal file
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@ -0,0 +1,35 @@
From 98800eeb2244387e821f4af8d21ccf2deaf18da0 Mon Sep 17 00:00:00 2001
From: Icenowy Zheng <icenowy@aosc.io>
Date: Mon, 21 Aug 2017 23:02:32 +0800
Subject: [PATCH 003/146] net: stmmac: dwmac-sun8i: support RGMII modes with
PHY internal delay
Some boards uses a PHY with internal delay with an Allwinner SoC.
Support these PHY modes in the driver.
As the driver has no configuration registers for these modes, just treat
them as ordinary RGMII.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
---
drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
index f9a61f90cfbc..3c18f4a9dd6c 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
@@ -933,6 +933,9 @@ static int sun8i_dwmac_set_syscon(struct stmmac_priv *priv)
/* default */
break;
case PHY_INTERFACE_MODE_RGMII:
+ case PHY_INTERFACE_MODE_RGMII_ID:
+ case PHY_INTERFACE_MODE_RGMII_RXID:
+ case PHY_INTERFACE_MODE_RGMII_TXID:
reg |= SYSCON_EPIT | SYSCON_ETCS_INT_GMII;
break;
case PHY_INTERFACE_MODE_RMII:
--
2.17.1

35
patch/kernel/sunxi-dev/0004-arm64-allwinner-a64-disable-the-RTL8211E-internal-RX.patch Normal file
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@ -0,0 +1,35 @@
From e89cb84d23d2537cd1b256afdd0fe880648ee1a9 Mon Sep 17 00:00:00 2001
From: Icenowy Zheng <icenowy@aosc.io>
Date: Mon, 21 Aug 2017 23:08:08 +0800
Subject: [PATCH 004/146] arm64: allwinner: a64: disable the RTL8211E internal
RX delay on Pine64+
Some Pine64+ boards have a broken RTL8211E PHY, which cannot work
reliably in 1000Base-T mode with default configuration.
A solution is passed to Pine64, which is said to be disabling the
internal RX delay of the PHY.
Enable the hack by set the PHY mode to RGMII-TXID.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
---
arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
index 24f1aac366d6..ed715426fffc 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
@@ -52,7 +52,7 @@
&emac {
pinctrl-names = "default";
pinctrl-0 = <&rgmii_pins>;
- phy-mode = "rgmii";
+ phy-mode = "rgmii-txid";
phy-handle = <&ext_rgmii_phy>;
status = "okay";
};
--
2.17.1

50
patch/kernel/sunxi-dev/0005-drm-gem-cma-Export-with-handle-allocator.patch Normal file
View file

@ -0,0 +1,50 @@
From ea69ff188dd5d9ac7162f05a22bf299b83a7536e Mon Sep 17 00:00:00 2001
From: Maxime Ripard <maxime.ripard@free-electrons.com>
Date: Mon, 7 Dec 2015 09:33:28 +0100
Subject: [PATCH 005/146] drm: gem: cma: Export with handle allocator
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
drivers/gpu/drm/drm_gem_cma_helper.c | 3 ++-
include/drm/drm_gem_cma_helper.h | 4 ++++
2 files changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/drm_gem_cma_helper.c b/drivers/gpu/drm/drm_gem_cma_helper.c
index 80a5115c3846..077c61f065d9 100644
--- a/drivers/gpu/drm/drm_gem_cma_helper.c
+++ b/drivers/gpu/drm/drm_gem_cma_helper.c
@@ -142,7 +142,7 @@ EXPORT_SYMBOL_GPL(drm_gem_cma_create);
* A struct drm_gem_cma_object * on success or an ERR_PTR()-encoded negative
* error code on failure.
*/
-static struct drm_gem_cma_object *
+struct drm_gem_cma_object *
drm_gem_cma_create_with_handle(struct drm_file *file_priv,
struct drm_device *drm, size_t size,
uint32_t *handle)
@@ -169,6 +169,7 @@ drm_gem_cma_create_with_handle(struct drm_file *file_priv,
return cma_obj;
}
+EXPORT_SYMBOL_GPL(drm_gem_cma_create_with_handle);
/**
* drm_gem_cma_free_object - free resources associated with a CMA GEM object
diff --git a/include/drm/drm_gem_cma_helper.h b/include/drm/drm_gem_cma_helper.h
index 19777145cf8e..79f397c91517 100644
--- a/include/drm/drm_gem_cma_helper.h
+++ b/include/drm/drm_gem_cma_helper.h
@@ -79,6 +79,10 @@ int drm_gem_cma_mmap(struct file *filp, struct vm_area_struct *vma);
/* allocate physical memory */
struct drm_gem_cma_object *drm_gem_cma_create(struct drm_device *drm,
size_t size);
+struct drm_gem_cma_object *
+drm_gem_cma_create_with_handle(struct drm_file *file_priv,
+ struct drm_device *drm, size_t size,
+ uint32_t *handle);
extern const struct vm_operations_struct drm_gem_cma_vm_ops;
--
2.17.1

102
patch/kernel/sunxi-dev/0006-drm-sun4i-Add-GEM-allocator.patch Normal file
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@ -0,0 +1,102 @@
From b143de6aef8be007256082e0f89606b7f5e3c757 Mon Sep 17 00:00:00 2001
From: Maxime Ripard <maxime.ripard@free-electrons.com>
Date: Mon, 7 Dec 2015 09:47:34 +0100
Subject: [PATCH 006/146] drm/sun4i: Add GEM allocator
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
drivers/gpu/drm/sun4i/sun4i_drv.c | 27 +++++++++++++++++++++++++++
include/uapi/drm/sun4i_drm.h | 29 +++++++++++++++++++++++++++++
2 files changed, 56 insertions(+)
create mode 100644 include/uapi/drm/sun4i_drm.h
diff --git a/drivers/gpu/drm/sun4i/sun4i_drv.c b/drivers/gpu/drm/sun4i/sun4i_drv.c
index 8b0cd08034e0..9f5de14fb2fe 100644
--- a/drivers/gpu/drm/sun4i/sun4i_drv.c
+++ b/drivers/gpu/drm/sun4i/sun4i_drv.c
@@ -22,6 +22,8 @@
#include <drm/drm_fb_helper.h>
#include <drm/drm_of.h>
+#include <uapi/drm/sun4i_drm.h>
+
#include "sun4i_drv.h"
#include "sun4i_frontend.h"
#include "sun4i_framebuffer.h"
@@ -30,6 +32,27 @@
DEFINE_DRM_GEM_CMA_FOPS(sun4i_drv_fops);
+static int sun4i_gem_create_ioctl(struct drm_device *drm, void *data,
+ struct drm_file *file_priv)
+{
+ struct drm_sun4i_gem_create *args = data;
+ struct drm_gem_cma_object *cma_obj;
+ size_t size;
+
+ /* The Mali requires a 64 bytes alignment */
+ size = ALIGN(args->size, 64);
+
+ cma_obj = drm_gem_cma_create_with_handle(file_priv, drm, size,
+ &args->handle);
+
+ return PTR_ERR_OR_ZERO(cma_obj);
+}
+
+static const struct drm_ioctl_desc sun4i_drv_ioctls[] = {
+ DRM_IOCTL_DEF_DRV(SUN4I_GEM_CREATE, sun4i_gem_create_ioctl,
+ DRM_UNLOCKED | DRM_AUTH),
+};
+
static struct drm_driver sun4i_drv_driver = {
.driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME | DRIVER_ATOMIC,
@@ -42,6 +65,10 @@ static struct drm_driver sun4i_drv_driver = {
.major = 1,
.minor = 0,
+ /* Custom ioctls */
+ .ioctls = sun4i_drv_ioctls,
+ .num_ioctls = ARRAY_SIZE(sun4i_drv_ioctls),
+
/* GEM Operations */
.dumb_create = drm_gem_cma_dumb_create,
.gem_free_object_unlocked = drm_gem_cma_free_object,
diff --git a/include/uapi/drm/sun4i_drm.h b/include/uapi/drm/sun4i_drm.h
new file mode 100644
index 000000000000..67b9dd4ee594
--- /dev/null
+++ b/include/uapi/drm/sun4i_drm.h
@@ -0,0 +1,29 @@
+/*
+ * Copyright (C) 2015 Free Electrons
+ * Copyright (C) 2015 NextThing Co
+ *
+ * Maxime Ripard <maxime.ripard@free-electrons.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+
+#ifndef _UAPI_SUN4I_DRM_H_
+#define _UAPI_SUN4I_DRM_H_
+
+#include <drm/drm.h>
+
+struct drm_sun4i_gem_create {
+ __u64 size;
+ __u32 flags;
+ __u32 handle;
+};
+
+#define DRM_SUN4I_GEM_CREATE 0x00
+
+#define DRM_IOCTL_SUN4I_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_SUN4I_GEM_CREATE, \
+ struct drm_sun4i_gem_create)
+
+#endif
--
2.17.1

96
patch/kernel/sunxi-dev/0007-Add-sopine-HDMI-sound-and-WiFi-support.patch Normal file
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@ -0,0 +1,96 @@
From 87020e638ad511e0ebe9c72208d2f0192c905812 Mon Sep 17 00:00:00 2001
From: Vasily Khoruzhick <anarsoul@gmail.com>
Date: Sun, 3 Dec 2017 11:43:08 -0800
Subject: [PATCH 007/146] Add sopine HDMI sound and WiFi support
---
.../allwinner/sun50i-a64-sopine-baseboard.dts | 18 ++++++++++++
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 29 +++++++++++++++++++
2 files changed, 47 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
index c21f2331add6..8161895dde52 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
@@ -86,6 +86,10 @@
status = "okay";
};
+&i2s2 {
+ status = "okay";
+};
+
&mdio {
ext_rgmii_phy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
@@ -93,6 +97,16 @@
};
};
+&mmc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc1_pins>;
+ vmmc-supply = <&reg_dldo4>;
+ vqmmc-supply = <&reg_eldo1>;
+ non-removable;
+ bus-width = <4>;
+ status = "okay";
+};
+
&mmc2 {
pinctrl-names = "default";
pinctrl-0 = <&mmc2_pins>;
@@ -138,6 +152,10 @@
vcc-hdmi-supply = <&reg_dldo1>;
};
+&sound_hdmi {
+ status = "okay";
+};
+
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 0f69f3593975..0b44018361cb 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -727,6 +727,35 @@
status = "disabled";
};
+ i2s2: i2s@1c22800 {
+ #sound-dai-cells = <0>;
+ compatible = "allwinner,sun8i-h3-i2s";
+ reg = <0x01c22800 0x400>;
+ interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_I2S2>, <&ccu CLK_I2S2>;
+ clock-names = "apb", "mod";
+ dmas = <&dma 27>;
+ resets = <&ccu RST_BUS_I2S2>;
+ dma-names = "tx";
+ status = "disabled";
+ };
+
+ sound_hdmi: sound_hdmi {
+ compatible = "simple-audio-card";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,name = "allwinner,hdmi";
+ simple-audio-card,mclk-fs = <256>;
+ status = "disabled";
+
+ simple-audio-card,codec {
+ sound-dai = <&hdmi>;
+ };
+
+ simple-audio-card,cpu {
+ sound-dai = <&i2s2>;
+ };
+ };
+
rtc: rtc@1f00000 {
compatible = "allwinner,sun6i-a31-rtc";
reg = <0x01f00000 0x54>;
--
2.17.1

39
patch/kernel/sunxi-dev/0008-arm64-dts-sun50i-a64-pine64-add-HDMI-audio-nodes.patch Normal file
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@ -0,0 +1,39 @@
From 887b96d878bb0e261bc19062dc73d193c75bc56a Mon Sep 17 00:00:00 2001
From: Vasily Khoruzhick <anarsoul@gmail.com>
Date: Tue, 26 Dec 2017 15:53:53 -0800
Subject: [PATCH 008/146] arm64: dts: sun50i-a64-pine64: add HDMI audio nodes
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
---
arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
index d06b5b88f60e..8c5dd99cc9ac 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
@@ -97,6 +97,10 @@
bias-pull-up;
};
+&i2s2 {
+ status = "okay";
+};
+
&mdio {
ext_rmii_phy1: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
@@ -254,6 +258,10 @@
status = "disabled";
};
+&sound_hdmi {
+ status = "okay";
+};
+
/* On Exp and Euler connectors */
&uart0 {
pinctrl-names = "default";
--
2.17.1

176
patch/kernel/sunxi-dev/0010-general-h6-add-dma-i2c-ir-spi-uart.patch Normal file
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@ -0,0 +1,176 @@
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
index dc785da9c..141fd186b 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
@@ -113,6 +113,12 @@
clock-latency-ns = <244144>; /* 8 32k periods */
};
+ opp@1640000000 {
+ opp-hz = /bits/ 64 <1640000000>;
+ opp-microvolt = <1160000 1160000 1160000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
opp@1800000000 {
opp-hz = /bits/ 64 <1800000000>;
opp-microvolt = <1160000 1160000 1160000>;
@@ -374,6 +381,17 @@
#dma-cells = <1>;
};
+ gic: interrupt-controller@3021000 {
+ compatible = "arm,gic-400";
+ reg = <0x03021000 0x1000>,
+ <0x03022000 0x2000>,
+ <0x03024000 0x2000>,
+ <0x03026000 0x2000>;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ };
+
sid: efuse@3006000 {
compatible = "allwinner,sun50i-h6-sid";
reg = <0x03006000 0x400>;
@@ -279,6 +305,7 @@
interrupt-controller;
#interrupt-cells = <3>;
+ /omit-if-no-ref/
ext_rgmii_pins: rgmii-pins {
pins = "PD0", "PD1", "PD2", "PD3", "PD4",
"PD5", "PD7", "PD8", "PD9", "PD10",
@@ -309,6 +354,7 @@
bias-pull-up;
};
+ /omit-if-no-ref/
mmc2_pins: mmc2-pins {
pins = "PC1", "PC4", "PC5", "PC6",
"PC7", "PC8", "PC9", "PC10",
@@ -318,6 +364,16 @@
bias-pull-up;
};
+ spi0_pins: spi0-pins {
+ pins = "PC2", "PC3", "PC0", "PC5";
+ function = "spi0";
+ };
+
+ spi1_pins: spi1-pins {
+ pins = "PH5", "PH6", "PH4", "PH3";
+ function = "spi1";
+ };
+
uart0_ph_pins: uart0-ph-pins {
pins = "PH0", "PH1";
function = "uart0";
@@ -511,17 +540,26 @@
pins = "PG8", "PG9";
function = "uart1";
};
- };
- gic: interrupt-controller@3021000 {
- compatible = "arm,gic-400";
- reg = <0x03021000 0x1000>,
- <0x03022000 0x2000>,
- <0x03024000 0x2000>,
- <0x03026000 0x2000>;
- interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
- interrupt-controller;
- #interrupt-cells = <3>;
+ uart2_pins: uart2-pins {
+ pins = "PD19", "PD20";
+ function = "uart2";
+ };
+
+ uart2_rts_cts_pins: uart2-rts-cts-pins {
+ pins = "PD21", "PD22";
+ function = "uart2";
+ };
+
+ uart3_pins: uart3-pins {
+ pins = "PD23", "PD24";
+ function = "uart3";
+ };
+
+ uart3_rts_cts_pins: uart3-rts-cts-pins {
+ pins = "PD25", "PD26";
+ function = "uart3";
+ };
};
mmc0: mmc@4020000 {
@@ -391,6 +495,38 @@
#size-cells = <0>;
};
+ spi0: spi@5010000 {
+ compatible = "allwinner,sun8i-h3-spi";
+ reg = <0x05010000 0x1000>;
+ interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
+ clock-names = "ahb", "mod";
+ dmas = <&dma 22>, <&dma 22>;
+ dma-names = "rx", "tx";
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi0_pins>;
+ resets = <&ccu RST_BUS_SPI0>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ spi1: spi@5011000 {
+ compatible = "allwinner,sun8i-h3-spi";
+ reg = <0x05011000 0x1000>;
+ interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>;
+ clock-names = "ahb", "mod";
+ dmas = <&dma 23>, <&dma 23>;
+ dma-names = "rx", "tx";
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi1_pins>;
+ resets = <&ccu RST_BUS_SPI1>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
uart0: serial@5000000 {
compatible = "snps,dw-apb-uart";
reg = <0x05000000 0x400>;
@@ -963,6 +1033,19 @@
};
};
+ r_uart: serial@7080000 {
+ compatible = "snps,dw-apb-uart";
+ reg = <0x07080000 0x400>;
+ interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clocks = <&r_ccu CLK_R_APB2_UART>;
+ resets = <&r_ccu RST_R_APB2_UART>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&r_uart_pins>;
+ status = "disabled";
+ };
+
rtc: rtc@7000000 {
compatible = "allwinner,sun50i-h6-rtc";
reg = <0x07000000 0x400>;
@@ -1021,6 +1104,11 @@
pins = "PL9";
function = "s_cir_rx";
};
+
+ r_uart_pins: r-uart-pins {
+ pins = "PL2", "PL3";
+ function = "s_uart";
+ };
};
r_ir: ir@7040000 {

56
patch/kernel/sunxi-dev/0011-iio-adc-sun4i-gpadc-iio-rename-A33-specified-registe.patch Normal file
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@ -0,0 +1,56 @@
From ef6a8862ab9440c5d6a73da32be83edc46e2fe94 Mon Sep 17 00:00:00 2001
From: Icenowy Zheng <icenowy@aosc.io>
Date: Thu, 14 Sep 2017 22:52:47 +0800
Subject: [PATCH 011/146] iio: adc: sun4i-gpadc-iio: rename A33-specified
registers to contain A33
As the H3 SoC, which is also in sun8i line, has totally different
register map for the thermal sensor (a cut down version of GPADC), we
should rename A23/A33-specified registers to contain A33, in order to
prevent obfuscation with H3 registers. Currently these registers are
only prefixed "SUN8I", not "SUN8I_A33".
Add "_A33" after "SUN8I" on the register names.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
---
drivers/iio/adc/sun4i-gpadc-iio.c | 2 +-
include/linux/mfd/sun4i-gpadc.h | 6 +++---
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/iio/adc/sun4i-gpadc-iio.c b/drivers/iio/adc/sun4i-gpadc-iio.c
index 04d7147e0110..03804ff9c006 100644
--- a/drivers/iio/adc/sun4i-gpadc-iio.c
+++ b/drivers/iio/adc/sun4i-gpadc-iio.c
@@ -88,7 +88,7 @@ static const struct gpadc_data sun6i_gpadc_data = {
static const struct gpadc_data sun8i_a33_gpadc_data = {
.temp_offset = -1662,
.temp_scale = 162,
- .tp_mode_en = SUN8I_GPADC_CTRL1_CHOP_TEMP_EN,
+ .tp_mode_en = SUN8I_A33_GPADC_CTRL1_CHOP_TEMP_EN,
};
struct sun4i_gpadc_iio {
diff --git a/include/linux/mfd/sun4i-gpadc.h b/include/linux/mfd/sun4i-gpadc.h
index 139872c2e0fe..78d31984a222 100644
--- a/include/linux/mfd/sun4i-gpadc.h
+++ b/include/linux/mfd/sun4i-gpadc.h
@@ -38,9 +38,9 @@
#define SUN6I_GPADC_CTRL1_ADC_CHAN_SELECT(x) (GENMASK(3, 0) & BIT(x))
#define SUN6I_GPADC_CTRL1_ADC_CHAN_MASK GENMASK(3, 0)
-/* TP_CTRL1 bits for sun8i SoCs */
-#define SUN8I_GPADC_CTRL1_CHOP_TEMP_EN BIT(8)
-#define SUN8I_GPADC_CTRL1_GPADC_CALI_EN BIT(7)
+/* TP_CTRL1 bits for A33 */
+#define SUN8I_A33_GPADC_CTRL1_CHOP_TEMP_EN BIT(8)
+#define SUN8I_A33_GPADC_CTRL1_GPADC_CALI_EN BIT(7)
#define SUN4I_GPADC_CTRL2 0x08
--
2.17.1

237
patch/kernel/sunxi-dev/0012-iio-adc-sun4i-gpadc-iio-rework-sampling-start-end-co.patch Normal file
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@ -0,0 +1,237 @@
From 3de3b1512ed5905e9522a4966d238f571825ee70 Mon Sep 17 00:00:00 2001
From: Philipp Rossak <embed3d@gmail.com>
Date: Sat, 20 Jan 2018 14:03:10 +0100
Subject: [PATCH 012/146] iio: adc: sun4i-gpadc-iio: rework: sampling start/end
code readout reg
For adding newer sensor some basic rework of the code is necessary.
This commit reworks the code and allows the sampling start/end code and
the position of value readout register to be altered. Later the start/end
functions will be used to configure the ths and start/stop the
sampling.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Philipp Rossak <embed3d@gmail.com>
---
drivers/iio/adc/sun4i-gpadc-iio.c | 87 ++++++++++++++++++++++++++++---
include/linux/mfd/sun4i-gpadc.h | 19 +++++--
2 files changed, 94 insertions(+), 12 deletions(-)
diff --git a/drivers/iio/adc/sun4i-gpadc-iio.c b/drivers/iio/adc/sun4i-gpadc-iio.c
index 03804ff9c006..363936b37c5a 100644
--- a/drivers/iio/adc/sun4i-gpadc-iio.c
+++ b/drivers/iio/adc/sun4i-gpadc-iio.c
@@ -49,6 +49,18 @@ static unsigned int sun6i_gpadc_chan_select(unsigned int chan)
return SUN6I_GPADC_CTRL1_ADC_CHAN_SELECT(chan);
}
+struct sun4i_gpadc_iio;
+
+/*
+ * Prototypes for these functions, which enable these functions to be
+ * referenced in gpadc_data structures.
+ */
+static int sun4i_gpadc_sample_start(struct sun4i_gpadc_iio *info);
+static int sun4i_gpadc_sample_end(struct sun4i_gpadc_iio *info);
+
+static int sunxi_ths_sample_start(struct sun4i_gpadc_iio *info);
+static int sunxi_ths_sample_end(struct sun4i_gpadc_iio *info);
+
struct gpadc_data {
int temp_offset;
int temp_scale;
@@ -56,6 +68,13 @@ struct gpadc_data {
unsigned int tp_adc_select;
unsigned int (*adc_chan_select)(unsigned int chan);
unsigned int adc_chan_mask;
+ unsigned int temp_data;
+ int (*sample_start)(struct sun4i_gpadc_iio *info);
+ int (*sample_end)(struct sun4i_gpadc_iio *info);
+ u32 ctrl0_map;
+ u32 ctrl2_map;
+ u32 sensor_en_map;
+ u32 filter_map;
};
static const struct gpadc_data sun4i_gpadc_data = {
@@ -65,6 +84,9 @@ static const struct gpadc_data sun4i_gpadc_data = {
.tp_adc_select = SUN4I_GPADC_CTRL1_TP_ADC_SELECT,
.adc_chan_select = &sun4i_gpadc_chan_select,
.adc_chan_mask = SUN4I_GPADC_CTRL1_ADC_CHAN_MASK,
+ .temp_data = SUN4I_GPADC_TEMP_DATA,
+ .sample_start = sun4i_gpadc_sample_start,
+ .sample_end = sun4i_gpadc_sample_end,
};
static const struct gpadc_data sun5i_gpadc_data = {
@@ -74,6 +96,9 @@ static const struct gpadc_data sun5i_gpadc_data = {
.tp_adc_select = SUN4I_GPADC_CTRL1_TP_ADC_SELECT,
.adc_chan_select = &sun4i_gpadc_chan_select,
.adc_chan_mask = SUN4I_GPADC_CTRL1_ADC_CHAN_MASK,
+ .temp_data = SUN4I_GPADC_TEMP_DATA,
+ .sample_start = sun4i_gpadc_sample_start,
+ .sample_end = sun4i_gpadc_sample_end,
};
static const struct gpadc_data sun6i_gpadc_data = {
@@ -83,12 +108,18 @@ static const struct gpadc_data sun6i_gpadc_data = {
.tp_adc_select = SUN6I_GPADC_CTRL1_TP_ADC_SELECT,
.adc_chan_select = &sun6i_gpadc_chan_select,
.adc_chan_mask = SUN6I_GPADC_CTRL1_ADC_CHAN_MASK,
+ .temp_data = SUN4I_GPADC_TEMP_DATA,
+ .sample_start = sun4i_gpadc_sample_start,
+ .sample_end = sun4i_gpadc_sample_end,
};
static const struct gpadc_data sun8i_a33_gpadc_data = {
.temp_offset = -1662,
.temp_scale = 162,
.tp_mode_en = SUN8I_A33_GPADC_CTRL1_CHOP_TEMP_EN,
+ .temp_data = SUN4I_GPADC_TEMP_DATA,
+ .sample_start = sun4i_gpadc_sample_start,
+ .sample_end = sun4i_gpadc_sample_end,
};
struct sun4i_gpadc_iio {
@@ -277,7 +308,7 @@ static int sun4i_gpadc_temp_read(struct iio_dev *indio_dev, int *val)
if (info->no_irq) {
pm_runtime_get_sync(indio_dev->dev.parent);
- regmap_read(info->regmap, SUN4I_GPADC_TEMP_DATA, val);
+ regmap_read(info->regmap, info->data->temp_data, val);
pm_runtime_mark_last_busy(indio_dev->dev.parent);
pm_runtime_put_autosuspend(indio_dev->dev.parent);
@@ -382,10 +413,8 @@ static irqreturn_t sun4i_gpadc_fifo_data_irq_handler(int irq, void *dev_id)
return IRQ_HANDLED;
}
-static int sun4i_gpadc_runtime_suspend(struct device *dev)
+static int sun4i_gpadc_sample_end(struct sun4i_gpadc_iio *info)
{
- struct sun4i_gpadc_iio *info = iio_priv(dev_get_drvdata(dev));
-
/* Disable the ADC on IP */
regmap_write(info->regmap, SUN4I_GPADC_CTRL1, 0);
/* Disable temperature sensor on IP */
@@ -394,19 +423,32 @@ static int sun4i_gpadc_runtime_suspend(struct device *dev)
return 0;
}
-static int sun4i_gpadc_runtime_resume(struct device *dev)
+static int sunxi_ths_sample_end(struct sun4i_gpadc_iio *info)
+{
+ /* Disable temperature sensor */
+ regmap_write(info->regmap, SUNXI_THS_CTRL2, 0x0);
+
+ return 0;
+}
+
+static int sun4i_gpadc_runtime_suspend(struct device *dev)
{
struct sun4i_gpadc_iio *info = iio_priv(dev_get_drvdata(dev));
+ return info->data->sample_end(info);
+}
+
+static int sun4i_gpadc_sample_start(struct sun4i_gpadc_iio *info)
+{
/* clkin = 6MHz */
regmap_write(info->regmap, SUN4I_GPADC_CTRL0,
SUN4I_GPADC_CTRL0_ADC_CLK_DIVIDER(2) |
SUN4I_GPADC_CTRL0_FS_DIV(7) |
- SUN4I_GPADC_CTRL0_T_ACQ(63));
+ SUNXI_THS_ACQ0(63));
regmap_write(info->regmap, SUN4I_GPADC_CTRL1, info->data->tp_mode_en);
regmap_write(info->regmap, SUN4I_GPADC_CTRL3,
- SUN4I_GPADC_CTRL3_FILTER_EN |
- SUN4I_GPADC_CTRL3_FILTER_TYPE(1));
+ SUNXI_THS_FILTER_EN |
+ SUNXI_THS_FILTER_TYPE(1));
/* period = SUN4I_GPADC_TPR_TEMP_PERIOD * 256 * 16 / clkin; ~0.6s */
regmap_write(info->regmap, SUN4I_GPADC_TPR,
SUN4I_GPADC_TPR_TEMP_ENABLE |
@@ -415,6 +457,35 @@ static int sun4i_gpadc_runtime_resume(struct device *dev)
return 0;
}
+static int sunxi_ths_sample_start(struct sun4i_gpadc_iio *info)
+{
+ u32 value;
+
+ if (info->data->ctrl0_map)
+ regmap_write(info->regmap, SUNXI_THS_CTRL0,
+ info->data->ctrl0_map);
+
+ regmap_write(info->regmap, SUNXI_THS_CTRL2,
+ info->data->ctrl2_map);
+
+ regmap_write(info->regmap, SUNXI_THS_FILTER,
+ info->data->filter_map);
+
+ regmap_read(info->regmap, SUNXI_THS_CTRL2, &value);
+
+ regmap_write(info->regmap, SUNXI_THS_CTRL2,
+ info->data->sensor_en_map | value);
+
+ return 0;
+}
+
+static int sun4i_gpadc_runtime_resume(struct device *dev)
+{
+ struct sun4i_gpadc_iio *info = iio_priv(dev_get_drvdata(dev));
+
+ return info->data->sample_start(info);
+}
+
static int sun4i_gpadc_get_temp(void *data, int *temp)
{
struct sun4i_gpadc_iio *info = data;
diff --git a/include/linux/mfd/sun4i-gpadc.h b/include/linux/mfd/sun4i-gpadc.h
index 78d31984a222..39e096c3ddac 100644
--- a/include/linux/mfd/sun4i-gpadc.h
+++ b/include/linux/mfd/sun4i-gpadc.h
@@ -17,7 +17,6 @@
#define SUN4I_GPADC_CTRL0_ADC_CLK_SELECT BIT(22)
#define SUN4I_GPADC_CTRL0_ADC_CLK_DIVIDER(x) ((GENMASK(1, 0) & (x)) << 20)
#define SUN4I_GPADC_CTRL0_FS_DIV(x) ((GENMASK(3, 0) & (x)) << 16)
-#define SUN4I_GPADC_CTRL0_T_ACQ(x) (GENMASK(15, 0) & (x))
#define SUN4I_GPADC_CTRL1 0x04
@@ -51,9 +50,6 @@
#define SUN4I_GPADC_CTRL3 0x0c
-#define SUN4I_GPADC_CTRL3_FILTER_EN BIT(2)
-#define SUN4I_GPADC_CTRL3_FILTER_TYPE(x) (GENMASK(1, 0) & (x))
-
#define SUN4I_GPADC_TPR 0x18
#define SUN4I_GPADC_TPR_TEMP_ENABLE BIT(16)
@@ -90,6 +86,21 @@
/* 10s delay before suspending the IP */
#define SUN4I_GPADC_AUTOSUSPEND_DELAY 10000
+/* SUNXI_THS COMMON REGISTERS + DEFINES */
+#define SUNXI_THS_CTRL0 0x00
+#define SUNXI_THS_CTRL2 0x40
+#define SUNXI_THS_FILTER 0x70
+
+#define SUNXI_THS_FILTER_EN BIT(2)
+#define SUNXI_THS_FILTER_TYPE(x) (GENMASK(1, 0) & (x))
+#define SUNXI_THS_ACQ0(x) (GENMASK(15, 0) & (x))
+#define SUNXI_THS_ACQ1(x) (GENMASK(31, 16) & ((x) << 16))
+
+#define SUNXI_THS_TEMP_SENSE_EN0 BIT(0)
+#define SUNXI_THS_TEMP_SENSE_EN1 BIT(1)
+#define SUNXI_THS_TEMP_SENSE_EN2 BIT(2)
+#define SUNXI_THS_TEMP_SENSE_EN3 BIT(3)
+
struct sun4i_gpadc_dev {
struct device *dev;
struct regmap *regmap;
--
2.17.1

168
patch/kernel/sunxi-dev/0013-iio-adc-sun4i-gpadc-iio-rework-support-clocks-and-re.patch Normal file
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@ -0,0 +1,168 @@
From c2d19fecbff6a21b3ab351c7843ae27de0d10b5b Mon Sep 17 00:00:00 2001
From: Philipp Rossak <embed3d@gmail.com>
Date: Sun, 21 Jan 2018 22:23:00 +0100
Subject: [PATCH 013/146] iio: adc: sun4i-gpadc-iio: rework: support clocks and
reset
For adding newer sensor some basic rework of the code is necessary.
The SoCs after H3 has newer thermal sensor ADCs, which have two clock
inputs (bus clock and sampling clock) and a reset. The registers are
also re-arranged.
This commit reworks the code, adds the process of the clocks and
resets.
Signed-off-by: Philipp Rossak <embed3d@gmail.com>
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
---
drivers/iio/adc/sun4i-gpadc-iio.c | 80 +++++++++++++++++++++++++++++++
1 file changed, 80 insertions(+)
diff --git a/drivers/iio/adc/sun4i-gpadc-iio.c b/drivers/iio/adc/sun4i-gpadc-iio.c
index 363936b37c5a..1a80744bd472 100644
--- a/drivers/iio/adc/sun4i-gpadc-iio.c
+++ b/drivers/iio/adc/sun4i-gpadc-iio.c
@@ -22,6 +22,7 @@
* shutdown for not being used.
*/
+#include <linux/clk.h>
#include <linux/completion.h>
#include <linux/interrupt.h>
#include <linux/io.h>
@@ -31,6 +32,7 @@
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
#include <linux/regmap.h>
+#include <linux/reset.h>
#include <linux/thermal.h>
#include <linux/delay.h>
@@ -75,6 +77,9 @@ struct gpadc_data {
u32 ctrl2_map;
u32 sensor_en_map;
u32 filter_map;
+ bool has_bus_clk;
+ bool has_bus_rst;
+ bool has_mod_clk;
};
static const struct gpadc_data sun4i_gpadc_data = {
@@ -134,6 +139,9 @@ struct sun4i_gpadc_iio {
atomic_t ignore_temp_data_irq;
const struct gpadc_data *data;
bool no_irq;
+ struct clk *bus_clk;
+ struct clk *mod_clk;
+ struct reset_control *reset;
/* prevents concurrent reads of temperature and ADC */
struct mutex mutex;
struct thermal_zone_device *tzd;
@@ -435,6 +443,12 @@ static int sun4i_gpadc_runtime_suspend(struct device *dev)
{
struct sun4i_gpadc_iio *info = iio_priv(dev_get_drvdata(dev));
+ if (info->data->has_mod_clk)
+ clk_disable(info->mod_clk);
+
+ if (info->data->has_bus_clk)
+ clk_disable(info->bus_clk);
+
return info->data->sample_end(info);
}
@@ -483,6 +497,12 @@ static int sun4i_gpadc_runtime_resume(struct device *dev)
{
struct sun4i_gpadc_iio *info = iio_priv(dev_get_drvdata(dev));
+ if (info->data->has_mod_clk)
+ clk_enable(info->mod_clk);
+
+ if (info->data->has_bus_clk)
+ clk_enable(info->bus_clk);
+
return info->data->sample_start(info);
}
@@ -597,10 +617,61 @@ static int sun4i_gpadc_probe_dt(struct platform_device *pdev,
return ret;
}
+ if (info->data->has_bus_rst) {
+ info->reset = devm_reset_control_get(&pdev->dev, NULL);
+ if (IS_ERR(info->reset)) {
+ ret = PTR_ERR(info->reset);
+ return ret;
+ }
+
+ ret = reset_control_deassert(info->reset);
+ if (ret)
+ return ret;
+ }
+
+ if (info->data->has_bus_clk) {
+ info->bus_clk = devm_clk_get(&pdev->dev, "bus");
+ if (IS_ERR(info->bus_clk)) {
+ ret = PTR_ERR(info->bus_clk);
+ goto assert_reset;
+ }
+
+ ret = clk_prepare_enable(info->bus_clk);
+ if (ret)
+ goto assert_reset;
+ }
+
+ if (info->data->has_mod_clk) {
+ info->mod_clk = devm_clk_get(&pdev->dev, "mod");
+ if (IS_ERR(info->mod_clk)) {
+ ret = PTR_ERR(info->mod_clk);
+ goto disable_bus_clk;
+ }
+
+ /* Running at 6MHz */
+ ret = clk_set_rate(info->mod_clk, 4000000);
+ if (ret)
+ goto disable_bus_clk;
+
+ ret = clk_prepare_enable(info->mod_clk);
+ if (ret)
+ goto disable_bus_clk;
+ }
+
if (IS_ENABLED(CONFIG_THERMAL_OF))
info->sensor_device = &pdev->dev;
return 0;
+
+disable_bus_clk:
+ if (info->data->has_bus_clk)
+ clk_disable_unprepare(info->bus_clk);
+
+assert_reset:
+ if (info->data->has_bus_rst)
+ reset_control_assert(info->reset);
+
+ return ret;
}
static int sun4i_gpadc_probe_mfd(struct platform_device *pdev,
@@ -766,6 +837,15 @@ static int sun4i_gpadc_remove(struct platform_device *pdev)
if (!info->no_irq)
iio_map_array_unregister(indio_dev);
+ if (info->data->has_mod_clk)
+ clk_disable_unprepare(info->mod_clk);
+
+ if (info->data->has_bus_clk)
+ clk_disable_unprepare(info->bus_clk);
+
+ if (info->data->has_bus_rst)
+ reset_control_assert(info->reset);
+
return 0;
}
--
2.17.1

186
patch/kernel/sunxi-dev/0014-iio-adc-sun4i-gpadc-iio-rework-support-multible-sens.patch Normal file
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@ -0,0 +1,186 @@
From e684b6faf4b5509f852867cac4830a0274f89211 Mon Sep 17 00:00:00 2001
From: Philipp Rossak <embed3d@gmail.com>
Date: Sun, 21 Jan 2018 22:26:50 +0100
Subject: [PATCH 014/146] iio: adc: sun4i-gpadc-iio: rework: support multible
sensors
For adding newer sensor some basic rework of the code is necessary.
This patch reworks the driver to be able to handle more than one
thermal sensor. Newer SoC like the A80 have 4 thermal sensors.
Because of this the maximal sensor count value was set to 4.
The sensor_id value is set during sensor registration and is for each
registered sensor indiviual. This makes it able to differntiate the
sensors when the value is read from the register.
Signed-off-by: Philipp Rossak <embed3d@gmail.com>
---
drivers/iio/adc/sun4i-gpadc-iio.c | 36 ++++++++++++++++++++-----------
include/linux/mfd/sun4i-gpadc.h | 6 ++++++
2 files changed, 29 insertions(+), 13 deletions(-)
diff --git a/drivers/iio/adc/sun4i-gpadc-iio.c b/drivers/iio/adc/sun4i-gpadc-iio.c
index 1a80744bd472..bff06f2798e8 100644
--- a/drivers/iio/adc/sun4i-gpadc-iio.c
+++ b/drivers/iio/adc/sun4i-gpadc-iio.c
@@ -70,7 +70,7 @@ struct gpadc_data {
unsigned int tp_adc_select;
unsigned int (*adc_chan_select)(unsigned int chan);
unsigned int adc_chan_mask;
- unsigned int temp_data;
+ unsigned int temp_data[MAX_SENSOR_COUNT];
int (*sample_start)(struct sun4i_gpadc_iio *info);
int (*sample_end)(struct sun4i_gpadc_iio *info);
u32 ctrl0_map;
@@ -80,6 +80,7 @@ struct gpadc_data {
bool has_bus_clk;
bool has_bus_rst;
bool has_mod_clk;
+ int sensor_count;
};
static const struct gpadc_data sun4i_gpadc_data = {
@@ -89,9 +90,10 @@ static const struct gpadc_data sun4i_gpadc_data = {
.tp_adc_select = SUN4I_GPADC_CTRL1_TP_ADC_SELECT,
.adc_chan_select = &sun4i_gpadc_chan_select,
.adc_chan_mask = SUN4I_GPADC_CTRL1_ADC_CHAN_MASK,
- .temp_data = SUN4I_GPADC_TEMP_DATA,
+ .temp_data = {SUN4I_GPADC_TEMP_DATA, 0, 0, 0},
.sample_start = sun4i_gpadc_sample_start,
.sample_end = sun4i_gpadc_sample_end,
+ .sensor_count = 1,
};
static const struct gpadc_data sun5i_gpadc_data = {
@@ -101,9 +103,10 @@ static const struct gpadc_data sun5i_gpadc_data = {
.tp_adc_select = SUN4I_GPADC_CTRL1_TP_ADC_SELECT,
.adc_chan_select = &sun4i_gpadc_chan_select,
.adc_chan_mask = SUN4I_GPADC_CTRL1_ADC_CHAN_MASK,
- .temp_data = SUN4I_GPADC_TEMP_DATA,
+ .temp_data = {SUN4I_GPADC_TEMP_DATA, 0, 0, 0},
.sample_start = sun4i_gpadc_sample_start,
.sample_end = sun4i_gpadc_sample_end,
+ .sensor_count = 1,
};
static const struct gpadc_data sun6i_gpadc_data = {
@@ -113,18 +116,20 @@ static const struct gpadc_data sun6i_gpadc_data = {
.tp_adc_select = SUN6I_GPADC_CTRL1_TP_ADC_SELECT,
.adc_chan_select = &sun6i_gpadc_chan_select,
.adc_chan_mask = SUN6I_GPADC_CTRL1_ADC_CHAN_MASK,
- .temp_data = SUN4I_GPADC_TEMP_DATA,
+ .temp_data = {SUN4I_GPADC_TEMP_DATA, 0, 0, 0},
.sample_start = sun4i_gpadc_sample_start,
.sample_end = sun4i_gpadc_sample_end,
+ .sensor_count = 1,
};
static const struct gpadc_data sun8i_a33_gpadc_data = {
.temp_offset = -1662,
.temp_scale = 162,
.tp_mode_en = SUN8I_A33_GPADC_CTRL1_CHOP_TEMP_EN,
- .temp_data = SUN4I_GPADC_TEMP_DATA,
+ .temp_data = {SUN4I_GPADC_TEMP_DATA, 0, 0, 0},
.sample_start = sun4i_gpadc_sample_start,
.sample_end = sun4i_gpadc_sample_end,
+ .sensor_count = 1,
};
struct sun4i_gpadc_iio {
@@ -142,6 +147,7 @@ struct sun4i_gpadc_iio {
struct clk *bus_clk;
struct clk *mod_clk;
struct reset_control *reset;
+ int sensor_id;
/* prevents concurrent reads of temperature and ADC */
struct mutex mutex;
struct thermal_zone_device *tzd;
@@ -309,14 +315,15 @@ static int sun4i_gpadc_adc_read(struct iio_dev *indio_dev, int channel,
return sun4i_gpadc_read(indio_dev, channel, val, info->fifo_data_irq);
}
-static int sun4i_gpadc_temp_read(struct iio_dev *indio_dev, int *val)
+static int sun4i_gpadc_temp_read(struct iio_dev *indio_dev, int *val,
+ int sensor)
{
struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
if (info->no_irq) {
pm_runtime_get_sync(indio_dev->dev.parent);
- regmap_read(info->regmap, info->data->temp_data, val);
+ regmap_read(info->regmap, info->data->temp_data[sensor], val);
pm_runtime_mark_last_busy(indio_dev->dev.parent);
pm_runtime_put_autosuspend(indio_dev->dev.parent);
@@ -363,7 +370,7 @@ static int sun4i_gpadc_read_raw(struct iio_dev *indio_dev,
ret = sun4i_gpadc_adc_read(indio_dev, chan->channel,
val);
else
- ret = sun4i_gpadc_temp_read(indio_dev, val);
+ ret = sun4i_gpadc_temp_read(indio_dev, val, 0);
if (ret)
return ret;
@@ -511,7 +518,7 @@ static int sun4i_gpadc_get_temp(void *data, int *temp)
struct sun4i_gpadc_iio *info = data;
int val, scale, offset;
- if (sun4i_gpadc_temp_read(info->indio_dev, &val))
+ if (sun4i_gpadc_temp_read(info->indio_dev, &val, info->sensor_id))
return -ETIMEDOUT;
sun4i_gpadc_temp_scale(info->indio_dev, &scale);
@@ -755,7 +762,7 @@ static int sun4i_gpadc_probe(struct platform_device *pdev)
{
struct sun4i_gpadc_iio *info;
struct iio_dev *indio_dev;
- int ret;
+ int ret, i;
indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*info));
if (!indio_dev)
@@ -788,9 +795,12 @@ static int sun4i_gpadc_probe(struct platform_device *pdev)
pm_runtime_enable(&pdev->dev);
if (IS_ENABLED(CONFIG_THERMAL_OF)) {
- info->tzd = thermal_zone_of_sensor_register(info->sensor_device,
- 0, info,
- &sun4i_ts_tz_ops);
+ for (i = 0; i < info->data->sensor_count; i++) {
+ info->sensor_id = i;
+ info->tzd = thermal_zone_of_sensor_register(
+ info->sensor_device,
+ i, info, &sun4i_ts_tz_ops);
+ }
/*
* Do not fail driver probing when failing to register in
* thermal because no thermal DT node is found.
diff --git a/include/linux/mfd/sun4i-gpadc.h b/include/linux/mfd/sun4i-gpadc.h
index 39e096c3ddac..40b4dd9d2405 100644
--- a/include/linux/mfd/sun4i-gpadc.h
+++ b/include/linux/mfd/sun4i-gpadc.h
@@ -90,6 +90,10 @@
#define SUNXI_THS_CTRL0 0x00
#define SUNXI_THS_CTRL2 0x40
#define SUNXI_THS_FILTER 0x70
+#define SUNXI_THS_TDATA0 0x80
+#define SUNXI_THS_TDATA1 0x84
+#define SUNXI_THS_TDATA2 0x88
+#define SUNXI_THS_TDATA3 0x8c
#define SUNXI_THS_FILTER_EN BIT(2)
#define SUNXI_THS_FILTER_TYPE(x) (GENMASK(1, 0) & (x))
@@ -101,6 +105,8 @@
#define SUNXI_THS_TEMP_SENSE_EN2 BIT(2)
#define SUNXI_THS_TEMP_SENSE_EN3 BIT(3)
+#define MAX_SENSOR_COUNT 4
+
struct sun4i_gpadc_dev {
struct device *dev;
struct regmap *regmap;
--
2.17.1

166
patch/kernel/sunxi-dev/0015-iio-adc-sun4i-gpadc-iio-rework-support-nvmem-calibra.patch Normal file
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@ -0,0 +1,166 @@
From 9bb64076c49cf41aaa252ce7b5aa24b93c322bd5 Mon Sep 17 00:00:00 2001
From: Philipp Rossak <embed3d@gmail.com>
Date: Sun, 21 Jan 2018 22:29:55 +0100
Subject: [PATCH 015/146] iio: adc: sun4i-gpadc-iio: rework: support nvmem
calibration data
This patch reworks the driver to support nvmem calibration cells.
The driver checks if the nvmem calibration is supported and reads out
the nvmem. At the beginning of the startup process the calibration data
is written to the related registers.
Signed-off-by: Philipp Rossak <embed3d@gmail.com>
---
drivers/iio/adc/sun4i-gpadc-iio.c | 52 +++++++++++++++++++++++++++++++
include/linux/mfd/sun4i-gpadc.h | 2 ++
2 files changed, 54 insertions(+)
diff --git a/drivers/iio/adc/sun4i-gpadc-iio.c b/drivers/iio/adc/sun4i-gpadc-iio.c
index bff06f2798e8..7b12666cdd9e 100644
--- a/drivers/iio/adc/sun4i-gpadc-iio.c
+++ b/drivers/iio/adc/sun4i-gpadc-iio.c
@@ -27,6 +27,7 @@
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/module.h>
+#include <linux/nvmem-consumer.h>
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/platform_device.h>
@@ -81,6 +82,7 @@ struct gpadc_data {
bool has_bus_rst;
bool has_mod_clk;
int sensor_count;
+ bool supports_nvmem;
};
static const struct gpadc_data sun4i_gpadc_data = {
@@ -94,6 +96,7 @@ static const struct gpadc_data sun4i_gpadc_data = {
.sample_start = sun4i_gpadc_sample_start,
.sample_end = sun4i_gpadc_sample_end,
.sensor_count = 1,
+ .supports_nvmem = false,
};
static const struct gpadc_data sun5i_gpadc_data = {
@@ -107,6 +110,7 @@ static const struct gpadc_data sun5i_gpadc_data = {
.sample_start = sun4i_gpadc_sample_start,
.sample_end = sun4i_gpadc_sample_end,
.sensor_count = 1,
+ .supports_nvmem = false,
};
static const struct gpadc_data sun6i_gpadc_data = {
@@ -120,6 +124,7 @@ static const struct gpadc_data sun6i_gpadc_data = {
.sample_start = sun4i_gpadc_sample_start,
.sample_end = sun4i_gpadc_sample_end,
.sensor_count = 1,
+ .supports_nvmem = false,
};
static const struct gpadc_data sun8i_a33_gpadc_data = {
@@ -130,6 +135,7 @@ static const struct gpadc_data sun8i_a33_gpadc_data = {
.sample_start = sun4i_gpadc_sample_start,
.sample_end = sun4i_gpadc_sample_end,
.sensor_count = 1,
+ .supports_nvmem = false,
};
struct sun4i_gpadc_iio {
@@ -148,6 +154,8 @@ struct sun4i_gpadc_iio {
struct clk *mod_clk;
struct reset_control *reset;
int sensor_id;
+ u32 calibration_data[2];
+ bool has_calibration_data[2];
/* prevents concurrent reads of temperature and ADC */
struct mutex mutex;
struct thermal_zone_device *tzd;
@@ -459,6 +467,17 @@ static int sun4i_gpadc_runtime_suspend(struct device *dev)
return info->data->sample_end(info);
}
+static void sunxi_calibrate(struct sun4i_gpadc_iio *info)
+{
+ if (info->has_calibration_data[0])
+ regmap_write(info->regmap, SUNXI_THS_CDATA_0_1,
+ info->calibration_data[0]);
+
+ if (info->has_calibration_data[1])
+ regmap_write(info->regmap, SUNXI_THS_CDATA_2_3,
+ info->calibration_data[1]);
+}
+
static int sun4i_gpadc_sample_start(struct sun4i_gpadc_iio *info)
{
/* clkin = 6MHz */
@@ -481,6 +500,7 @@ static int sun4i_gpadc_sample_start(struct sun4i_gpadc_iio *info)
static int sunxi_ths_sample_start(struct sun4i_gpadc_iio *info)
{
u32 value;
+ sunxi_calibrate(info);
if (info->data->ctrl0_map)
regmap_write(info->regmap, SUNXI_THS_CTRL0,
@@ -602,6 +622,9 @@ static int sun4i_gpadc_probe_dt(struct platform_device *pdev,
struct resource *mem;
void __iomem *base;
int ret;
+ struct nvmem_cell *cell;
+ ssize_t cell_size;
+ u64 *cell_data;
info->data = of_device_get_match_data(&pdev->dev);
if (!info->data)
@@ -616,6 +639,35 @@ static int sun4i_gpadc_probe_dt(struct platform_device *pdev,
if (IS_ERR(base))
return PTR_ERR(base);
+ info->has_calibration_data[0] = false;
+ info->has_calibration_data[1] = false;
+
+ if (!info->data->supports_nvmem)
+ goto no_nvmem;
+
+ cell = devm_nvmem_cell_get(&pdev->dev, "calibration");
+ if (IS_ERR(cell)) {
+ if (PTR_ERR(cell) == -EPROBE_DEFER)
+ return PTR_ERR(cell);
+ } else {
+ cell_data = (u64 *)nvmem_cell_read(cell, &cell_size);
+ devm_nvmem_cell_put(&pdev->dev, cell);
+ if (cell_size <= 4) {
+ info->has_calibration_data[0] = true;
+ info->calibration_data[0] = be32_to_cpu(cell_data[0] &
+ GENMASK(31, 0));
+ } else if (cell_size <= 8) {
+ info->has_calibration_data[0] = true;
+ info->calibration_data[0] = be32_to_cpu(cell_data[0] &
+ GENMASK(31, 0));
+ info->has_calibration_data[1] = true;
+ info->calibration_data[1] = be32_to_cpu(
+ (cell_data[0] >> 32) & GENMASK(31, 0));
+ }
+ }
+
+no_nvmem:
+
info->regmap = devm_regmap_init_mmio(&pdev->dev, base,
&sun4i_gpadc_regmap_config);
if (IS_ERR(info->regmap)) {
diff --git a/include/linux/mfd/sun4i-gpadc.h b/include/linux/mfd/sun4i-gpadc.h
index 40b4dd9d2405..c251002431bd 100644
--- a/include/linux/mfd/sun4i-gpadc.h
+++ b/include/linux/mfd/sun4i-gpadc.h
@@ -90,6 +90,8 @@
#define SUNXI_THS_CTRL0 0x00
#define SUNXI_THS_CTRL2 0x40
#define SUNXI_THS_FILTER 0x70
+#define SUNXI_THS_CDATA_0_1 0x74
+#define SUNXI_THS_CDATA_2_3 0x78
#define SUNXI_THS_TDATA0 0x80
#define SUNXI_THS_TDATA1 0x84
#define SUNXI_THS_TDATA2 0x88
--
2.17.1

253
patch/kernel/sunxi-dev/0016-iio-adc-sun4i-gpadc-iio-rework-add-interrupt-support.patch Normal file
View file

@ -0,0 +1,253 @@
From 153c005037601e2ba02f7fb36d8864194d8c98c8 Mon Sep 17 00:00:00 2001
From: Philipp Rossak <embed3d@gmail.com>
Date: Sun, 21 Jan 2018 11:20:55 +0100
Subject: [PATCH 016/146] iio: adc: sun4i-gpadc-iio: rework: add interrupt
support
This patch rewors the driver to support interrupts for the thermal part
of the sensor.
This is only available for the newer sensor (currently H3 and A83T).
The interrupt will be trigerd on data available and triggers the update
for the thermal sensors. All newer sensors have different amount of
sensors and different interrupts for each device the reset of the
interrupts need to be done different
For the newer sensors is the autosuspend disabled.
Signed-off-by: Philipp Rossak <embed3d@gmail.com>
---
drivers/iio/adc/sun4i-gpadc-iio.c | 68 ++++++++++++++++++++++++++++---
include/linux/mfd/sun4i-gpadc.h | 33 +++++++++++++++
2 files changed, 95 insertions(+), 6 deletions(-)
diff --git a/drivers/iio/adc/sun4i-gpadc-iio.c b/drivers/iio/adc/sun4i-gpadc-iio.c
index 7b12666cdd9e..77e07f042730 100644
--- a/drivers/iio/adc/sun4i-gpadc-iio.c
+++ b/drivers/iio/adc/sun4i-gpadc-iio.c
@@ -78,11 +78,14 @@ struct gpadc_data {
u32 ctrl2_map;
u32 sensor_en_map;
u32 filter_map;
+ u32 irq_clear_map;
+ u32 irq_control_map;
bool has_bus_clk;
bool has_bus_rst;
bool has_mod_clk;
int sensor_count;
bool supports_nvmem;
+ bool support_irq;
};
static const struct gpadc_data sun4i_gpadc_data = {
@@ -97,6 +100,7 @@ static const struct gpadc_data sun4i_gpadc_data = {
.sample_end = sun4i_gpadc_sample_end,
.sensor_count = 1,
.supports_nvmem = false,
+ .support_irq = false,
};
static const struct gpadc_data sun5i_gpadc_data = {
@@ -111,6 +115,7 @@ static const struct gpadc_data sun5i_gpadc_data = {
.sample_end = sun4i_gpadc_sample_end,
.sensor_count = 1,
.supports_nvmem = false,
+ .support_irq = false,
};
static const struct gpadc_data sun6i_gpadc_data = {
@@ -125,6 +130,7 @@ static const struct gpadc_data sun6i_gpadc_data = {
.sample_end = sun4i_gpadc_sample_end,
.sensor_count = 1,
.supports_nvmem = false,
+ .support_irq = false,
};
static const struct gpadc_data sun8i_a33_gpadc_data = {
@@ -136,6 +142,7 @@ static const struct gpadc_data sun8i_a33_gpadc_data = {
.sample_end = sun4i_gpadc_sample_end,
.sensor_count = 1,
.supports_nvmem = false,
+ .support_irq = false,
};
struct sun4i_gpadc_iio {
@@ -339,6 +346,11 @@ static int sun4i_gpadc_temp_read(struct iio_dev *indio_dev, int *val,
return 0;
}
+ if (info->data->support_irq) {
+ regmap_read(info->regmap, info->data->temp_data[sensor], val);
+ return 0;
+ }
+
return sun4i_gpadc_read(indio_dev, 0, val, info->temp_data_irq);
}
@@ -436,6 +448,17 @@ static irqreturn_t sun4i_gpadc_fifo_data_irq_handler(int irq, void *dev_id)
return IRQ_HANDLED;
}
+static irqreturn_t sunxi_irq_thread(int irq, void *data)
+{
+ struct sun4i_gpadc_iio *info = data;
+
+ regmap_write(info->regmap, SUNXI_THS_STAT, info->data->irq_clear_map);
+
+ thermal_zone_device_update(info->tzd, THERMAL_EVENT_TEMP_SAMPLE);
+
+ return IRQ_HANDLED;
+}
+
static int sun4i_gpadc_sample_end(struct sun4i_gpadc_iio *info)
{
/* Disable the ADC on IP */
@@ -448,6 +471,8 @@ static int sun4i_gpadc_sample_end(struct sun4i_gpadc_iio *info)
static int sunxi_ths_sample_end(struct sun4i_gpadc_iio *info)
{
+ /* Disable ths interrupt*/
+ regmap_write(info->regmap, SUNXI_THS_INTC, 0x0);
/* Disable temperature sensor */
regmap_write(info->regmap, SUNXI_THS_CTRL2, 0x0);
@@ -509,9 +534,15 @@ static int sunxi_ths_sample_start(struct sun4i_gpadc_iio *info)
regmap_write(info->regmap, SUNXI_THS_CTRL2,
info->data->ctrl2_map);
+ regmap_write(info->regmap, SUNXI_THS_STAT,
+ info->data->irq_clear_map);
+
regmap_write(info->regmap, SUNXI_THS_FILTER,
info->data->filter_map);
+ regmap_write(info->regmap, SUNXI_THS_INTC,
+ info->data->irq_control_map);
+
regmap_read(info->regmap, SUNXI_THS_CTRL2, &value);
regmap_write(info->regmap, SUNXI_THS_CTRL2,
@@ -625,12 +656,29 @@ static int sun4i_gpadc_probe_dt(struct platform_device *pdev,
struct nvmem_cell *cell;
ssize_t cell_size;
u64 *cell_data;
+ int irq;
info->data = of_device_get_match_data(&pdev->dev);
if (!info->data)
return -ENODEV;
- info->no_irq = true;
+ if (info->data->support_irq) {
+ /* only the new versions of ths support right now irqs */
+ irq = platform_get_irq(pdev, 0);
+ if (irq < 0) {
+ dev_err(&pdev->dev, "failed to get IRQ: %d\n", irq);
+ return irq;
+ }
+
+ ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
+ sunxi_irq_thread, IRQF_ONESHOT,
+ dev_name(&pdev->dev), info);
+ if (ret)
+ return ret;
+
+ } else
+ info->no_irq = true;
+
indio_dev->num_channels = ARRAY_SIZE(sun8i_a33_gpadc_channels);
indio_dev->channels = sun8i_a33_gpadc_channels;
@@ -840,11 +888,13 @@ static int sun4i_gpadc_probe(struct platform_device *pdev)
if (ret)
return ret;
- pm_runtime_set_autosuspend_delay(&pdev->dev,
- SUN4I_GPADC_AUTOSUSPEND_DELAY);
- pm_runtime_use_autosuspend(&pdev->dev);
- pm_runtime_set_suspended(&pdev->dev);
- pm_runtime_enable(&pdev->dev);
+ if (!info->data->support_irq) {
+ pm_runtime_set_autosuspend_delay(&pdev->dev,
+ SUN4I_GPADC_AUTOSUSPEND_DELAY);
+ pm_runtime_use_autosuspend(&pdev->dev);
+ pm_runtime_set_suspended(&pdev->dev);
+ pm_runtime_enable(&pdev->dev);
+ }
if (IS_ENABLED(CONFIG_THERMAL_OF)) {
for (i = 0; i < info->data->sensor_count; i++) {
@@ -865,6 +915,9 @@ static int sun4i_gpadc_probe(struct platform_device *pdev)
}
}
+ if (info->data->support_irq)
+ info->data->sample_start(info);
+
ret = devm_iio_device_register(&pdev->dev, indio_dev);
if (ret < 0) {
dev_err(&pdev->dev, "could not register the device\n");
@@ -894,6 +947,9 @@ static int sun4i_gpadc_remove(struct platform_device *pdev)
if (!IS_ENABLED(CONFIG_THERMAL_OF))
return 0;
+ if (info->data->support_irq)
+ info->data->sample_end(info);
+
thermal_zone_of_sensor_unregister(info->sensor_device, info->tzd);
if (!info->no_irq)
diff --git a/include/linux/mfd/sun4i-gpadc.h b/include/linux/mfd/sun4i-gpadc.h
index c251002431bd..ab34a96a7ff3 100644
--- a/include/linux/mfd/sun4i-gpadc.h
+++ b/include/linux/mfd/sun4i-gpadc.h
@@ -89,6 +89,8 @@
/* SUNXI_THS COMMON REGISTERS + DEFINES */
#define SUNXI_THS_CTRL0 0x00
#define SUNXI_THS_CTRL2 0x40
+#define SUNXI_THS_INTC 0x44
+#define SUNXI_THS_STAT 0x48
#define SUNXI_THS_FILTER 0x70
#define SUNXI_THS_CDATA_0_1 0x74
#define SUNXI_THS_CDATA_2_3 0x78
@@ -107,6 +109,37 @@
#define SUNXI_THS_TEMP_SENSE_EN2 BIT(2)
#define SUNXI_THS_TEMP_SENSE_EN3 BIT(3)
+#define SUNXI_THS_TEMP_PERIOD(x) (GENMASK(31, 12) & ((x) << 12))
+
+#define SUNXI_THS_INTS_ALARM_OFF_2 BIT(14)
+#define SUNXI_THS_INTS_ALARM_OFF_1 BIT(13)
+#define SUNXI_THS_INTS_ALARM_OFF_0 BIT(12)
+#define SUNXI_THS_INTS_TDATA_IRQ_3 BIT(11)
+#define SUNXI_THS_INTS_TDATA_IRQ_2 BIT(10)
+#define SUNXI_THS_INTS_TDATA_IRQ_1 BIT(9)
+#define SUNXI_THS_INTS_TDATA_IRQ_0 BIT(8)
+#define SUNXI_THS_INTS_SHUT_INT_3 BIT(7)
+#define SUNXI_THS_INTS_SHUT_INT_2 BIT(6)
+#define SUNXI_THS_INTS_SHUT_INT_1 BIT(5)
+#define SUNXI_THS_INTS_SHUT_INT_0 BIT(4)
+#define SUNXI_THS_INTS_ALARM_INT_3 BIT(3)
+#define SUNXI_THS_INTS_ALARM_INT_2 BIT(2)
+#define SUNXI_THS_INTS_ALARM_INT_1 BIT(1)
+#define SUNXI_THS_INTS_ALARM_INT_0 BIT(0)
+
+#define SUNXI_THS_INTC_TDATA_IRQ_EN3 BIT(11)
+#define SUNXI_THS_INTC_TDATA_IRQ_EN2 BIT(10)
+#define SUNXI_THS_INTC_TDATA_IRQ_EN1 BIT(9)
+#define SUNXI_THS_INTC_TDATA_IRQ_EN0 BIT(8)
+#define SUNXI_THS_INTC_SHUT_INT_EN3 BIT(7)
+#define SUNXI_THS_INTC_SHUT_INT_EN2 BIT(6)
+#define SUNXI_THS_INTC_SHUT_INT_EN1 BIT(5)
+#define SUNXI_THS_INTC_SHUT_INT_EN0 BIT(4)
+#define SUNXI_THS_INTC_ALARM_INT_EN3 BIT(3)
+#define SUNXI_THS_INTC_ALARM_INT_EN2 BIT(2)
+#define SUNXI_THS_INTC_ALARM_INT_EN1 BIT(1)
+#define SUNXI_THS_INTC_ALARM_INT_EN0 BIT(0)
+
#define MAX_SENSOR_COUNT 4
struct sun4i_gpadc_dev {
--
2.17.1

67
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@ -0,0 +1,67 @@
From 1968a84bd7cfdf60b29a154e682c4239bdfe6cb7 Mon Sep 17 00:00:00 2001
From: Philipp Rossak <embed3d@gmail.com>
Date: Sun, 21 Jan 2018 23:14:09 +0100
Subject: [PATCH 017/146] iio: adc: sun4i-gpadc-iio: add support for H3 thermal
sensor
This patch adds support for the H3 ths sensor.
The H3 supports interrupts. The interrupt is configured to update the
the sensor values every second. The calibration data is writen at the
begin of the init process.
Signed-off-by: Philipp Rossak <embed3d@gmail.com>
---
drivers/iio/adc/sun4i-gpadc-iio.c | 29 +++++++++++++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/drivers/iio/adc/sun4i-gpadc-iio.c b/drivers/iio/adc/sun4i-gpadc-iio.c
index 77e07f042730..f2e0ec65c53e 100644
--- a/drivers/iio/adc/sun4i-gpadc-iio.c
+++ b/drivers/iio/adc/sun4i-gpadc-iio.c
@@ -145,6 +145,31 @@ static const struct gpadc_data sun8i_a33_gpadc_data = {
.support_irq = false,
};
+static const struct gpadc_data sun8i_h3_ths_data = {
+ .temp_offset = -1791,
+ .temp_scale = -121,
+ .temp_data = {SUNXI_THS_TDATA0, 0, 0, 0},
+ .sample_start = sunxi_ths_sample_start,
+ .sample_end = sunxi_ths_sample_end,
+ .has_bus_clk = true,
+ .has_bus_rst = true,
+ .has_mod_clk = true,
+ .sensor_count = 1,
+ .supports_nvmem = true,
+ .support_irq = true,
+ .ctrl0_map = SUNXI_THS_ACQ0(0xff),
+ .ctrl2_map = SUNXI_THS_ACQ1(0x3f),
+ .sensor_en_map = SUNXI_THS_TEMP_SENSE_EN0,
+ .filter_map = SUNXI_THS_FILTER_EN |
+ SUNXI_THS_FILTER_TYPE(0x2),
+ .irq_clear_map = SUNXI_THS_INTS_ALARM_INT_0 |
+ SUNXI_THS_INTS_SHUT_INT_0 |
+ SUNXI_THS_INTS_TDATA_IRQ_0 |
+ SUNXI_THS_INTS_ALARM_OFF_0,
+ .irq_control_map = SUNXI_THS_INTC_TDATA_IRQ_EN0 |
+ SUNXI_THS_TEMP_PERIOD(0x7),
+};
+
struct sun4i_gpadc_iio {
struct iio_dev *indio_dev;
struct completion completion;
@@ -643,6 +668,10 @@ static const struct of_device_id sun4i_gpadc_of_id[] = {
.compatible = "allwinner,sun8i-a33-ths",
.data = &sun8i_a33_gpadc_data,
},
+ {
+ .compatible = "allwinner,sun8i-h3-ths",
+ .data = &sun8i_h3_ths_data,
+ },
{ /* sentinel */ }
};
--
2.17.1

75
patch/kernel/sunxi-dev/0018-iio-adc-sun4i-gpadc-iio-add-support-for-A83T-thermal.patch Normal file
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@ -0,0 +1,75 @@
From 20484f59a26747db157563c9ba13767c21b48efb Mon Sep 17 00:00:00 2001
From: Philipp Rossak <embed3d@gmail.com>
Date: Sun, 21 Jan 2018 18:50:11 +0100
Subject: [PATCH 018/146] iio: adc: sun4i-gpadc-iio: add support for A83T
thermal sensor
This patch adds support for the A83T ths sensor.
The A83T does not support interrupts. This seems to be broken.
The calibration data is writen at the begin of the init process.
Signed-off-by: Philipp Rossak <embed3d@gmail.com>
---
drivers/iio/adc/sun4i-gpadc-iio.c | 38 +++++++++++++++++++++++++++++++
1 file changed, 38 insertions(+)
diff --git a/drivers/iio/adc/sun4i-gpadc-iio.c b/drivers/iio/adc/sun4i-gpadc-iio.c
index f2e0ec65c53e..b8693afcdbea 100644
--- a/drivers/iio/adc/sun4i-gpadc-iio.c
+++ b/drivers/iio/adc/sun4i-gpadc-iio.c
@@ -170,6 +170,40 @@ static const struct gpadc_data sun8i_h3_ths_data = {
SUNXI_THS_TEMP_PERIOD(0x7),
};
+static const struct gpadc_data sun8i_a83t_ths_data = {
+ .temp_offset = -2724,
+ .temp_scale = -70,
+ .temp_data = {SUNXI_THS_TDATA0,
+ SUNXI_THS_TDATA1,
+ SUNXI_THS_TDATA2,
+ 0},
+ .sample_start = sunxi_ths_sample_start,
+ .sample_end = sunxi_ths_sample_end,
+ .sensor_count = 3,
+ .supports_nvmem = false,
+ .support_irq = true,
+ .ctrl0_map = SUNXI_THS_ACQ0(0x1f3),
+ .ctrl2_map = SUNXI_THS_ACQ1(0x1f3),
+ .sensor_en_map = SUNXI_THS_TEMP_SENSE_EN0 |
+ SUNXI_THS_TEMP_SENSE_EN1 |
+ SUNXI_THS_TEMP_SENSE_EN2,
+ .filter_map = SUNXI_THS_FILTER_EN |
+ SUNXI_THS_FILTER_TYPE(0x2),
+ .irq_clear_map = SUNXI_THS_INTS_ALARM_INT_0 |
+ SUNXI_THS_INTS_ALARM_INT_1 |
+ SUNXI_THS_INTS_ALARM_INT_2 |
+ SUNXI_THS_INTS_SHUT_INT_0 |
+ SUNXI_THS_INTS_SHUT_INT_1 |
+ SUNXI_THS_INTS_SHUT_INT_2 |
+ SUNXI_THS_INTS_TDATA_IRQ_0 |
+ SUNXI_THS_INTS_TDATA_IRQ_1 |
+ SUNXI_THS_INTS_TDATA_IRQ_2,
+ .irq_control_map = SUNXI_THS_INTC_TDATA_IRQ_EN0 |
+ SUNXI_THS_INTC_TDATA_IRQ_EN1 |
+ SUNXI_THS_INTC_TDATA_IRQ_EN2 |
+ SUNXI_THS_TEMP_PERIOD(0x257),
+};
+
struct sun4i_gpadc_iio {
struct iio_dev *indio_dev;
struct completion completion;
@@ -672,6 +706,10 @@ static const struct of_device_id sun4i_gpadc_of_id[] = {
.compatible = "allwinner,sun8i-h3-ths",
.data = &sun8i_h3_ths_data,
},
+ {
+ .compatible = "allwinner,sun8i-a83t-ths",
+ .data = &sun8i_a83t_ths_data,
+ },
{ /* sentinel */ }
};
--
2.17.1

30
patch/kernel/sunxi-dev/0020-arm-dts-sun8i-h3-add-support-for-the-thermal-sensor-.patch Normal file
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@ -0,0 +1,30 @@
From e475b475fbab608b805a57c8cc083e7b3da77954 Mon Sep 17 00:00:00 2001
From: Philipp Rossak <embed3d@gmail.com>
Date: Fri, 26 Jan 2018 01:07:15 +0100
Subject: [PATCH 020/146] arm: dts: sun8i: h3: add support for the thermal
sensor in H3
This patch adds the missing compatible and the thermal sensor cells.
The H3 has one sensor.
Signed-off-by: Philipp Rossak <embed3d@gmail.com>
---
arch/arm/boot/dts/sun8i-h3.dtsi | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index f0096074a467..5907b54b6e1d 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -216,3 +216,8 @@
&pio {
compatible = "allwinner,sun8i-h3-pinctrl";
};
+
+&ths {
+ compatible = "allwinner,sun8i-h3-ths";
+ #thermal-sensor-cells = <0>;
+};
--
2.17.1

36
patch/kernel/sunxi-dev/0021-arm-dts-sun8i-h3-add-thermal-zone-to-H3.patch Normal file
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@ -0,0 +1,36 @@
From 16346f511d19e20e12041076f402606b87de0b56 Mon Sep 17 00:00:00 2001
From: Philipp Rossak <embed3d@gmail.com>
Date: Fri, 26 Jan 2018 01:10:12 +0100
Subject: [PATCH 021/146] arm: dts: sun8i: h3: add thermal zone to H3
This patch adds the thermal zones to the H3. We have only one sensor and
that is placed in the cpu.
Signed-off-by: Philipp Rossak <embed3d@gmail.com>
---
arch/arm/boot/dts/sun8i-h3.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 5907b54b6e1d..d2c85be8a2d0 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -111,6 +111,15 @@
};
};
+ thermal-zones {
+ cpu-thermal {
+ /* milliseconds */
+ polling-delay-passive = <250>;
+ polling-delay = <1000>;
+ thermal-sensors = <&ths 0>;
+ };
+ };
+
timer {
compatible = "arm,armv7-timer";
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
--
2.17.1

34
patch/kernel/sunxi-dev/0022-arm-dts-sun8i-h3-enable-H3-sid-controller.patch.disabled Normal file
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@ -0,0 +1,34 @@
From 328b1316b4a89f2bf9e451f3cfa41d591962c44e Mon Sep 17 00:00:00 2001
From: Philipp Rossak <embed3d@gmail.com>
Date: Tue, 23 Jan 2018 10:57:37 +0100
Subject: [PATCH 022/146] arm: dts: sun8i: h3: enable H3 sid controller
This patch enables the the sid controller in the H3. It can be used
for thermal calibration data.
Signed-off-by: Philipp Rossak <embed3d@gmail.com>
---
arch/arm/boot/dts/sun8i-h3.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index d2c85be8a2d0..791a9406c671 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -111,6 +111,13 @@
};
};
+ soc {
+ sid: eeprom@1c14000 {
+ compatible = "allwinner,sun8i-h3-sid";
+ reg = <0x01c14000 0x400>;
+ };
+ };
+
thermal-zones {
cpu-thermal {
/* milliseconds */
--
2.17.1

38
patch/kernel/sunxi-dev/0023-arm-dts-sun8i-a83t-add-support-for-the-thermal-senso.patch.disabled Normal file
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@ -0,0 +1,38 @@
From 4d9df1fab6b1601612b7b4380f83d3c4560c671e Mon Sep 17 00:00:00 2001
From: Philipp Rossak <embed3d@gmail.com>
Date: Fri, 26 Jan 2018 01:15:17 +0100
Subject: [PATCH 023/146] arm: dts: sun8i: a83t: add support for the thermal
sensor in A83T
As we have gained the support for the thermal sensor in A83T,
we can now add its device nodes to the device tree.
The A83T seems to have a broken IRQ 31, thus we use here IRQ 41.
Signed-off-by: Philipp Rossak <embed3d@gmail.com>
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index 00a02b037320..6bdfcc7a1ac3 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -757,6 +757,14 @@
clocks = <&osc24M>;
};
+ ths: thermal-sensor@1f04000 {
+ compatible = "allwinner,sun8i-a83t-ths";
+ reg = <0x01f04000 0x100>;
+ interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
+ #thermal-sensor-cells = <1>;
+ #io-channel-cells = <0>;
+ };
+
watchdog@1c20ca0 {
compatible = "allwinner,sun6i-a31-wdt";
reg = <0x01c20ca0 0x20>;
--
2.17.1

46
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@ -0,0 +1,46 @@
From 5bcffafbbcc98a66101d02d37ba6beca3f52068e Mon Sep 17 00:00:00 2001
From: Philipp Rossak <embed3d@gmail.com>
Date: Fri, 26 Jan 2018 01:17:14 +0100
Subject: [PATCH 024/146] arm: dts: sun8i: a83t: add thermal zone to A83T
This patch adds the thermal zones to the A83T. Sensor 0 is located in the
cpu cluster 0. Sensor 1 is located in cluster 1 and Sensor 3 is located
in the gpu.
Signed-off-by: Philipp Rossak <embed3d@gmail.com>
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index 6bdfcc7a1ac3..ec22157419b6 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -1033,4 +1033,24 @@
#size-cells = <0>;
};
};
+
+ thermal-zones {
+ cpu0_thermal: cpu0-thermal {
+ polling-delay-passive = <1000>;
+ polling-delay = <5000>;
+ thermal-sensors = <&ths 0>;
+ };
+
+ cpu1_thermal: cpu1-thermal {
+ polling-delay-passive = <1000>;
+ polling-delay = <5000>;
+ thermal-sensors = <&ths 1>;
+ };
+
+ gpu_thermal: gpu-thermal {
+ polling-delay-passive = <1000>;
+ polling-delay = <5000>;
+ thermal-sensors = <&ths 2>;
+ };
+ };
};
--
2.17.1

26
patch/kernel/sunxi-dev/0026-iio-adc-Kconfig-enable-A80-A64-and-H5-for-THS.patch Normal file
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@ -0,0 +1,26 @@
From f79548364ea767853c5a95f1db2407219f06572a Mon Sep 17 00:00:00 2001
From: Philipp Rossak <embed3d@gmail.com>
Date: Wed, 24 Jan 2018 22:35:13 +0100
Subject: [PATCH 026/146] iio: adc: Kconfig: enable A80, A64 and H5 for THS
Signed-off-by: Philipp Rossak <embed3d@gmail.com>
---
drivers/iio/adc/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig
index 4a754921fb6f..c77aec60a364 100644
--- a/drivers/iio/adc/Kconfig
+++ b/drivers/iio/adc/Kconfig
@@ -723,7 +723,7 @@ config STX104
config SUN4I_GPADC
tristate "Support for the Allwinner SoCs GPADC"
depends on IIO
- depends on MFD_SUN4I_GPADC || MACH_SUN8I
+ depends on MFD_SUN4I_GPADC || MACH_SUN8I || MACH_SUN50I || MACH_SUN9I
depends on THERMAL || !THERMAL_OF
select REGMAP_IRQ
help
--
2.17.1

79
patch/kernel/sunxi-dev/0027-iio-adc-sun4i-gpadc-iio-add-support-for-H5-thermal-s.patch Normal file
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@ -0,0 +1,79 @@
From 46f1130b5286457e519c296a4b683747deb983cb Mon Sep 17 00:00:00 2001
From: Philipp Rossak <embed3d@gmail.com>
Date: Wed, 24 Jan 2018 16:58:30 +0100
Subject: [PATCH 027/146] iio: adc: sun4i-gpadc-iio: add support for H5 thermal
sensor
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
This patch adds support for the H5 ths sensor.
The H5 supports interrupts. The interrupt is configured to update
the sensor values every second. The sensor is except the scale/offset
values and an additional sensor for the gpu the same. A temperatur higer
than 70°C needs an other formula. Since the operating temperatures maximum
is 70°C this case was neglegted.
Signed-off-by: Philipp Rossak <embed3d@gmail.com>
---
drivers/iio/adc/sun4i-gpadc-iio.c | 36 +++++++++++++++++++++++++++++++
1 file changed, 36 insertions(+)
diff --git a/drivers/iio/adc/sun4i-gpadc-iio.c b/drivers/iio/adc/sun4i-gpadc-iio.c
index b8693afcdbea..40529a197335 100644
--- a/drivers/iio/adc/sun4i-gpadc-iio.c
+++ b/drivers/iio/adc/sun4i-gpadc-iio.c
@@ -204,6 +204,38 @@ static const struct gpadc_data sun8i_a83t_ths_data = {
SUNXI_THS_TEMP_PERIOD(0x257),
};
+static const struct gpadc_data sun50i_h5_ths_data = {
+ .temp_offset = -1872,
+ .temp_scale = -119,
+ .temp_data = {SUNXI_THS_TDATA0,
+ SUNXI_THS_TDATA1, 0, 0},
+ .sample_start = sunxi_ths_sample_start,
+ .sample_end = sunxi_ths_sample_end,
+ .has_bus_clk = true,
+ .has_bus_rst = true,
+ .has_mod_clk = true,
+ .sensor_count = 2,
+ .supports_nvmem = false,
+ .support_irq = true,
+ .ctrl0_map = SUNXI_THS_ACQ0(0x1f3),
+ .ctrl2_map = SUNXI_THS_ACQ1(0x1f3),
+ .sensor_en_map = SUNXI_THS_TEMP_SENSE_EN0 |
+ SUNXI_THS_TEMP_SENSE_EN1,
+ .filter_map = SUNXI_THS_FILTER_EN |
+ SUNXI_THS_FILTER_TYPE(0x2),
+ .irq_clear_map = SUNXI_THS_INTS_ALARM_INT_0 |
+ SUNXI_THS_INTS_ALARM_INT_1 |
+ SUNXI_THS_INTS_SHUT_INT_0 |
+ SUNXI_THS_INTS_SHUT_INT_1 |
+ SUNXI_THS_INTS_TDATA_IRQ_0 |
+ SUNXI_THS_INTS_TDATA_IRQ_1 |
+ SUNXI_THS_INTS_ALARM_OFF_0 |
+ SUNXI_THS_INTS_ALARM_OFF_1,
+ .irq_control_map = SUNXI_THS_INTC_TDATA_IRQ_EN0 |
+ SUNXI_THS_INTC_TDATA_IRQ_EN1 |
+ SUNXI_THS_TEMP_PERIOD(0x3a),
+};
+
struct sun4i_gpadc_iio {
struct iio_dev *indio_dev;
struct completion completion;
@@ -710,6 +742,10 @@ static const struct of_device_id sun4i_gpadc_of_id[] = {
.compatible = "allwinner,sun8i-a83t-ths",
.data = &sun8i_a83t_ths_data,
},
+ {
+ .compatible = "allwinner,sun50i-h5-ths",
+ .data = &sun50i_h5_ths_data,
+ },
{ /* sentinel */ }
};
--
2.17.1

86
patch/kernel/sunxi-dev/0028-iio-adc-sun4i-gpadc-iio-add-support-for-A80-thermal-.patch Normal file
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@ -0,0 +1,86 @@
From 413a3bde03c061d4b5affe25ad75f4dfe6e3282b Mon Sep 17 00:00:00 2001
From: Philipp Rossak <embed3d@gmail.com>
Date: Wed, 24 Jan 2018 17:28:02 +0100
Subject: [PATCH 028/146] iio: adc: sun4i-gpadc-iio: add support for A80
thermal sensor
This patch adds support for the A80 ths sensor.
The A80 has 4 sensors and supports interrupts. The interrupt is configured to update
the sensor values every second. The A80 shares some registers with the
integrated GPADC. ACQ0 must be set in the GPADC register with the offset
0x00. In fact the GPADC and the THS use the same register base and also
the same clocks and resets.
Signed-off-by: Philipp Rossak <embed3d@gmail.com>
---
drivers/iio/adc/sun4i-gpadc-iio.c | 46 +++++++++++++++++++++++++++++++
1 file changed, 46 insertions(+)
diff --git a/drivers/iio/adc/sun4i-gpadc-iio.c b/drivers/iio/adc/sun4i-gpadc-iio.c
index 40529a197335..7ab175f0bd40 100644
--- a/drivers/iio/adc/sun4i-gpadc-iio.c
+++ b/drivers/iio/adc/sun4i-gpadc-iio.c
@@ -236,6 +236,48 @@ static const struct gpadc_data sun50i_h5_ths_data = {
SUNXI_THS_TEMP_PERIOD(0x3a),
};
+static const struct gpadc_data sun9i_a80_ths_data = {
+ .temp_offset = -2794,
+ .temp_scale = -67,
+ .temp_data = {SUNXI_THS_TDATA0,
+ SUNXI_THS_TDATA1,
+ SUNXI_THS_TDATA2,
+ SUNXI_THS_TDATA3},
+ .sample_start = sunxi_ths_sample_start,
+ .sample_end = sunxi_ths_sample_end,
+ .has_bus_clk = true,
+ .has_bus_rst = true,
+ .has_mod_clk = true,
+ .sensor_count = 4,
+ .supports_nvmem = false,
+ .support_irq = true,
+ .ctrl0_map = SUNXI_THS_ACQ0(0x1f3),
+ .ctrl2_map = SUNXI_THS_TEMP_SENSE_EN0 |
+ SUNXI_THS_TEMP_SENSE_EN1 |
+ SUNXI_THS_TEMP_SENSE_EN2 |
+ SUNXI_THS_TEMP_SENSE_EN3 |
+ SUNXI_THS_ACQ1(0x1f3),
+ .filter_map = SUNXI_THS_FILTER_EN |
+ SUNXI_THS_FILTER_TYPE(0x2),
+ .irq_clear_map = SUNXI_THS_INTS_ALARM_INT_0 |
+ SUNXI_THS_INTS_ALARM_INT_1 |
+ SUNXI_THS_INTS_ALARM_INT_2 |
+ SUNXI_THS_INTS_ALARM_INT_3 |
+ SUNXI_THS_INTS_SHUT_INT_0 |
+ SUNXI_THS_INTS_SHUT_INT_1 |
+ SUNXI_THS_INTS_SHUT_INT_2 |
+ SUNXI_THS_INTS_SHUT_INT_3 |
+ SUNXI_THS_INTS_TDATA_IRQ_0 |
+ SUNXI_THS_INTS_TDATA_IRQ_1 |
+ SUNXI_THS_INTS_TDATA_IRQ_2 |
+ SUNXI_THS_INTS_TDATA_IRQ_3,
+ .irq_control_map = SUNXI_THS_INTC_TDATA_IRQ_EN0 |
+ SUNXI_THS_INTC_TDATA_IRQ_EN1 |
+ SUNXI_THS_INTC_TDATA_IRQ_EN2 |
+ SUNXI_THS_INTC_TDATA_IRQ_EN3 |
+ SUNXI_THS_TEMP_PERIOD(0x3a),
+};
+
struct sun4i_gpadc_iio {
struct iio_dev *indio_dev;
struct completion completion;
@@ -746,6 +788,10 @@ static const struct of_device_id sun4i_gpadc_of_id[] = {
.compatible = "allwinner,sun50i-h5-ths",
.data = &sun50i_h5_ths_data,
},
+ {
+ .compatible = "allwinner,sun9i-a80-ths",
+ .data = &sun9i_a80_ths_data,
+ },
{ /* sentinel */ }
};
--
2.17.1

87
patch/kernel/sunxi-dev/0029-iio-adc-sun4i-gpadc-iio-add-support-for-A64-thermal-.patch Normal file
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@ -0,0 +1,87 @@
From 5a1eb96e482c276f8bc81c18696748ecb20b3656 Mon Sep 17 00:00:00 2001
From: Philipp Rossak <embed3d@gmail.com>
Date: Wed, 24 Jan 2018 17:41:45 +0100
Subject: [PATCH 029/146] iio: adc: sun4i-gpadc-iio: add support for A64
thermal sensor
This patch adds support for the A64 ths sensor.
The A64 supports interrupts. The interrupt is configured to update
the sensor values every second.
Signed-off-by: Philipp Rossak <embed3d@gmail.com>
---
drivers/iio/adc/sun4i-gpadc-iio.c | 50 +++++++++++++++++++++++++++++++
1 file changed, 50 insertions(+)
diff --git a/drivers/iio/adc/sun4i-gpadc-iio.c b/drivers/iio/adc/sun4i-gpadc-iio.c
index 7ab175f0bd40..fdfa01bad325 100644
--- a/drivers/iio/adc/sun4i-gpadc-iio.c
+++ b/drivers/iio/adc/sun4i-gpadc-iio.c
@@ -278,6 +278,52 @@ static const struct gpadc_data sun9i_a80_ths_data = {
SUNXI_THS_TEMP_PERIOD(0x3a),
};
+static const struct gpadc_data sun50i_a64_ths_data = {
+ .temp_offset = -2170,
+ .temp_scale = -117,
+ .temp_data = {SUNXI_THS_TDATA0,
+ SUNXI_THS_TDATA1,
+ SUNXI_THS_TDATA2,
+ 0},
+ .sample_start = sunxi_ths_sample_start,
+ .sample_end = sunxi_ths_sample_end,
+ .has_bus_clk = true,
+ .has_bus_rst = true,
+ .has_mod_clk = true,
+ .sensor_count = 3,
+ .supports_nvmem = false,
+ .support_irq = true,
+
+ /* The final sample period is calculated as follows:
+ * (THERMAL_PER + 1) * 4096 / 24MHz * 2^(FILTER_TYPE + 1)
+ *
+ * This results to about 1Hz with these settings.
+ */
+ .ctrl0_map = SUNXI_THS_ACQ0(0xff),
+ .ctrl2_map = SUNXI_THS_TEMP_SENSE_EN0 |
+ SUNXI_THS_TEMP_SENSE_EN1 |
+ SUNXI_THS_TEMP_SENSE_EN2 |
+ SUNXI_THS_ACQ1(0x3f),
+ .filter_map = SUNXI_THS_FILTER_EN |
+ SUNXI_THS_FILTER_TYPE(0x1),
+ .irq_clear_map = SUNXI_THS_INTS_ALARM_INT_0 |
+ SUNXI_THS_INTS_ALARM_INT_1 |
+ SUNXI_THS_INTS_ALARM_INT_2 |
+ SUNXI_THS_INTS_SHUT_INT_0 |
+ SUNXI_THS_INTS_SHUT_INT_1 |
+ SUNXI_THS_INTS_SHUT_INT_2 |
+ SUNXI_THS_INTS_TDATA_IRQ_0 |
+ SUNXI_THS_INTS_TDATA_IRQ_1 |
+ SUNXI_THS_INTS_TDATA_IRQ_2 |
+ SUNXI_THS_INTS_ALARM_OFF_0 |
+ SUNXI_THS_INTS_ALARM_OFF_1 |
+ SUNXI_THS_INTS_ALARM_OFF_2,
+ .irq_control_map = SUNXI_THS_INTC_TDATA_IRQ_EN0 |
+ SUNXI_THS_INTC_TDATA_IRQ_EN1 |
+ SUNXI_THS_INTC_TDATA_IRQ_EN2 |
+ SUNXI_THS_TEMP_PERIOD(0x7),
+};
+
struct sun4i_gpadc_iio {
struct iio_dev *indio_dev;
struct completion completion;
@@ -792,6 +838,10 @@ static const struct of_device_id sun4i_gpadc_of_id[] = {
.compatible = "allwinner,sun9i-a80-ths",
.data = &sun9i_a80_ths_data,
},
+ {
+ .compatible = "allwinner,sun50i-a64-ths",
+ .data = &sun50i_a64_ths_data,
+ },
{ /* sentinel */ }
};
--
2.17.1

30
patch/kernel/sunxi-dev/0030-arm64-dts-allwinner-h5-add-support-for-the-thermal-s.patch Normal file
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@ -0,0 +1,30 @@
From e6e2d489bd4776f62a962ad8f511d862a1864f80 Mon Sep 17 00:00:00 2001
From: Philipp Rossak <embed3d@gmail.com>
Date: Fri, 26 Jan 2018 01:40:38 +0100
Subject: [PATCH 030/146] arm64: dts: allwinner: h5: add support for the
thermal sensor in H5
This patch adds the missing compatible and the thermal sensor cells.
The H5 has two sensors.
Signed-off-by: Philipp Rossak <embed3d@gmail.com>
---
arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
index 62d646baac3c..ee12490203b8 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
@@ -129,3 +129,8 @@
<GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
compatible = "allwinner,sun50i-h5-pinctrl";
};
+
+&ths {
+ compatible = "allwinner,sun50i-h5-ths";
+ #thermal-sensor-cells = <1>;
+};
--
2.17.1

43
patch/kernel/sunxi-dev/0031-arm64-dts-allwinner-h5-add-termal-zone-to-H5.patch Normal file
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@ -0,0 +1,43 @@
From b3ec6c1e145347ad88b14fcab39080c5af9410ef Mon Sep 17 00:00:00 2001
From: Philipp Rossak <embed3d@gmail.com>
Date: Fri, 26 Jan 2018 01:42:16 +0100
Subject: [PATCH 031/146] arm64: dts: allwinner: h5: add termal zone to H5
This patch adds the termal zones to the H5. Sensor 0 is located in the
cpu. Sensor 1 is located in the gpu.
Signed-off-by: Philipp Rossak <embed3d@gmail.com>
---
arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
index ee12490203b8..849c3d8a50bb 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
@@ -81,6 +81,22 @@
method = "smc";
};
+ thermal-zones {
+ cpu-thermal {
+ /* milliseconds */
+ polling-delay-passive = <250>;
+ polling-delay = <1000>;
+ thermal-sensors = <&ths 0>;
+ };
+
+ gpu-thermal {
+ /* milliseconds */
+ polling-delay-passive = <250>;
+ polling-delay = <1000>;
+ thermal-sensors = <&ths 1>;
+ };
+ };
+
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13
--
2.17.1

42
patch/kernel/sunxi-dev/0032-arm-dts-sun9i-a80-add-support-for-the-thermal-sensor.patch Normal file
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@ -0,0 +1,42 @@
From 4990f2559d012df5c225df7cda3c29d60d3263b7 Mon Sep 17 00:00:00 2001
From: Philipp Rossak <embed3d@gmail.com>
Date: Sat, 27 Jan 2018 21:30:16 +0100
Subject: [PATCH 032/146] arm: dts: sun9i: a80: add support for the thermal
sensor in A80
As we have gained the support for the thermal sensor in A80,
we can now add its device nodes to the device tree.
The clocks and the resets are shared between the GPADC and the THS
sensor.
Signed-off-by: Philipp Rossak <embed3d@gmail.com>
---
arch/arm/boot/dts/sun9i-a80.dtsi | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi
index 25591d6883ef..9411831d04aa 100644
--- a/arch/arm/boot/dts/sun9i-a80.dtsi
+++ b/arch/arm/boot/dts/sun9i-a80.dtsi
@@ -913,6 +913,17 @@
#reset-cells = <1>;
};
+ ths: thermal-sensor@6004C00 {
+ compatible = "allwinner,sun9i-a80-ths";
+ reg = <0x06004C00 0x100>;
+ interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_GPADC>, <&ccu CLK_GPADC>;
+ clock-names = "bus", "mod";
+ resets = <&ccu RST_BUS_GPADC>;
+ #thermal-sensor-cells = <1>;
+ #io-channel-cells = <0>;
+ };
+
timer@6000c00 {
compatible = "allwinner,sun4i-a10-timer";
reg = <0x06000c00 0xa0>;
--
2.17.1

54
patch/kernel/sunxi-dev/0033-arm-dts-sun9i-a80-add-thermal-zone-to-A80.patch Normal file
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@ -0,0 +1,54 @@
From 559d5cc47ffd71a47da77424e251a8d21250cabb Mon Sep 17 00:00:00 2001
From: Philipp Rossak <embed3d@gmail.com>
Date: Sat, 27 Jan 2018 21:39:09 +0100
Subject: [PATCH 033/146] arm: dts: sun9i: a80: add thermal zone to A80
This patch adds the thermal zones to the A80.
Sensor 0 is located besides the big CPU, sensor 1 is located besides the
DRAM, sensor 2 is located besides the GPU and sensor 3 is located besides
the small CPU.
Signed-off-by: Philipp Rossak <embed3d@gmail.com>
---
arch/arm/boot/dts/sun9i-a80.dtsi | 26 ++++++++++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi
index 9411831d04aa..6c52b33dad84 100644
--- a/arch/arm/boot/dts/sun9i-a80.dtsi
+++ b/arch/arm/boot/dts/sun9i-a80.dtsi
@@ -1221,4 +1221,30 @@
#size-cells = <0>;
};
};
+
+ thermal-zones {
+ cpu0_thermal: cpu0-thermal {
+ polling-delay-passive = <1000>;
+ polling-delay = <5000>;
+ thermal-sensors = <&ths 0>;
+ };
+
+ dram_thermal: dram-thermal {
+ polling-delay-passive = <1000>;
+ polling-delay = <5000>;
+ thermal-sensors = <&ths 1>;
+ };
+
+ gpu_thermal: gpu-thermal {
+ polling-delay-passive = <1000>;
+ polling-delay = <5000>;
+ thermal-sensors = <&ths 2>;
+ };
+
+ cpu2_thermal: cpu2-thermal {
+ polling-delay-passive = <1000>;
+ polling-delay = <5000>;
+ thermal-sensors = <&ths 3>;
+ };
+ };
};
--
2.17.1

62
patch/kernel/sunxi-dev/0034-dts-a64-ths.patch Normal file
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@ -0,0 +1,62 @@
From ff4436bd3de240a1d0796d4c6f8bd676ff0925e1 Mon Sep 17 00:00:00 2001
From: Vasily Khoruzhick <anarsoul@gmail.com>
Date: Mon, 23 Apr 2018 23:24:41 -0700
Subject: [PATCH 034/146] dts: a64 ths
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 32 +++++++++++++++++++
1 file changed, 32 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 0b44018361cb..0eb482eb58b7 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -171,6 +171,27 @@
};
};
+ thermal-zones {
+ cpu_thermal: cpu0-thermal {
+ /* milliseconds */
+ polling-delay-passive = <250>;
+ polling-delay = <1000>;
+ thermal-sensors = <&ths 0>;
+ };
+ gpu0_thermal: gpu0-thermal {
+ /* milliseconds */
+ polling-delay-passive = <250>;
+ polling-delay = <1000>;
+ thermal-sensors = <&ths 1>;
+ };
+ gpu1_thermal: gpu1-thermal {
+ /* milliseconds */
+ polling-delay-passive = <250>;
+ polling-delay = <1000>;
+ thermal-sensors = <&ths 2>;
+ };
+ };
+
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13
@@ -536,6 +557,17 @@
status = "disabled";
};
+ ths: thermal-sensor@1c25000 {
+ compatible = "allwinner,sun50i-a64-ths";
+ reg = <0x01c25000 0x100>;
+ interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_THS>, <&ccu CLK_THS>;
+ clock-names = "bus", "mod";
+ resets = <&ccu RST_BUS_THS>;
+ #io-channel-cells = <0>;
+ #thermal-sensor-cells = <1>;
+ };
+
uart0: serial@1c28000 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28000 0x400>;
--
2.17.1

73
patch/kernel/sunxi-dev/0035-clk-sunxi-ng-add-mux-and-pll-notifiers-for-A64-CPU-c.patch Normal file
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@ -0,0 +1,73 @@
From 5afd98f6db25b34a96bfc7544681dbf40896c1fd Mon Sep 17 00:00:00 2001
From: Icenowy Zheng <icenowy@aosc.io>
Date: Sat, 23 Sep 2017 08:15:29 +0800
Subject: [PATCH 035/146] clk: sunxi-ng: add mux and pll notifiers for A64 CPU
clock
The A64 PLL_CPU clock has the same instability if some factor changed
without the PLL gated like other SoCs with sun6i-style CCU, e.g. A33,
H3.
Add the mux and pll notifiers for A64 CPU clock to workaround the
problem.
Fixes: c6a0637460c2 ("clk: sunxi-ng: Add A64 clocks")
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
---
drivers/clk/sunxi-ng/ccu-sun50i-a64.c | 28 ++++++++++++++++++++++++++-
1 file changed, 27 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c
index ee9c12cf3f08..1fe3c3fbc9bc 100644
--- a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c
+++ b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c
@@ -896,11 +896,26 @@ static const struct sunxi_ccu_desc sun50i_a64_ccu_desc = {
.num_resets = ARRAY_SIZE(sun50i_a64_ccu_resets),
};
+static struct ccu_pll_nb sun50i_a64_pll_cpu_nb = {
+ .common = &pll_cpux_clk.common,
+ /* copy from pll_cpux_clk */
+ .enable = BIT(31),
+ .lock = BIT(28),
+};
+
+static struct ccu_mux_nb sun50i_a64_cpu_nb = {
+ .common = &cpux_clk.common,
+ .cm = &cpux_clk.mux,
+ .delay_us = 1, /* > 8 clock cycles at 24 MHz */
+ .bypass_index = 1, /* index of 24 MHz oscillator */
+};
+
static int sun50i_a64_ccu_probe(struct platform_device *pdev)
{
struct resource *res;
void __iomem *reg;
u32 val;
+ int ret;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
reg = devm_ioremap_resource(&pdev->dev, res);
@@ -914,7 +929,18 @@ static int sun50i_a64_ccu_probe(struct platform_device *pdev)
writel(0x515, reg + SUN50I_A64_PLL_MIPI_REG);
- return sunxi_ccu_probe(pdev->dev.of_node, reg, &sun50i_a64_ccu_desc);
+ ret = sunxi_ccu_probe(pdev->dev.of_node, reg, &sun50i_a64_ccu_desc);
+ if (ret)
+ return ret;
+
+ /* Gate then ungate PLL CPU after any rate changes */
+ ccu_pll_notifier_register(&sun50i_a64_pll_cpu_nb);
+
+ /* Reparent CPU during PLL CPU rate changes */
+ ccu_mux_notifier_register(pll_cpux_clk.common.hw.clk,
+ &sun50i_a64_cpu_nb);
+
+ return 0;
}
static const struct of_device_id sun50i_a64_ccu_ids[] = {
--
2.17.1

31
patch/kernel/sunxi-dev/0036-sun4i-gpadc-iio-ignore-zero-samples-to-avoid-force-p.patch Normal file
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@ -0,0 +1,31 @@
From a6b5eb09bddbd0c331f41fefa2fd2f71a2cf9455 Mon Sep 17 00:00:00 2001
From: Vasily Khoruzhick <anarsoul@gmail.com>
Date: Tue, 24 Apr 2018 22:21:10 -0700
Subject: [PATCH 036/146] sun4i-gpadc-iio: ignore zero samples to avoid force
poweroff when reading first sample
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
---
drivers/iio/adc/sun4i-gpadc-iio.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/iio/adc/sun4i-gpadc-iio.c b/drivers/iio/adc/sun4i-gpadc-iio.c
index fdfa01bad325..68256e73a4d2 100644
--- a/drivers/iio/adc/sun4i-gpadc-iio.c
+++ b/drivers/iio/adc/sun4i-gpadc-iio.c
@@ -751,6 +751,12 @@ static int sun4i_gpadc_get_temp(void *data, int *temp)
if (sun4i_gpadc_temp_read(info->indio_dev, &val, info->sensor_id))
return -ETIMEDOUT;
+ /* Ignore first sample which is always zero. 0 is either too
+ * cold or too hot, so we can safely ignore it
+ */
+ if (val == 0)
+ return -ETIMEDOUT;
+
sun4i_gpadc_temp_scale(info->indio_dev, &scale);
sun4i_gpadc_temp_offset(info->indio_dev, &offset);
--
2.17.1

260
patch/kernel/sunxi-dev/0037-a64-dvfs-wip.patch Normal file
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@ -0,0 +1,260 @@
From b07dd371b1a1203a013f91da750259f7a2467fce Mon Sep 17 00:00:00 2001
From: Vasily Khoruzhick <anarsoul@gmail.com>
Date: Tue, 24 Apr 2018 22:21:27 -0700
Subject: [PATCH 037/146] a64 dvfs wip
Changed: Igor
---
.../boot/dts/allwinner/sun50i-a64-pine64.dts | 4 +
.../dts/allwinner/sun50i-a64-pinebook.dts | 4 +
.../allwinner/sun50i-a64-sopine-baseboard.dts | 4 +
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 111 ++++++++++++++++--
drivers/clk/sunxi-ng/ccu-sun50i-a64.h | 1 -
include/dt-bindings/clock/sun50i-a64-ccu.h | 1 +
6 files changed, 112 insertions(+), 13 deletions(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
index 8c5dd99cc9ac..cdf5169f2a1a 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
@@ -69,6 +69,10 @@
};
};
+&cpu0 {
+ cpu-supply = <&reg_dcdc2>;
+};
+
&ehci0 {
status = "okay";
};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
index 897e60cbe38d..b3698a8bb1d3 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
@@ -66,6 +66,10 @@
};
};
+&cpu0 {
+ cpu-supply = <&reg_dcdc2>;
+};
+
&ehci0 {
phys = <&usbphy 0>;
phy-names = "usb";
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
index 8161895dde52..dc728b3b5556 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
@@ -69,6 +69,10 @@
};
};
+&cpu0 {
+ cpu-supply = <&reg_dcdc2>;
+};
+
&ehci0 {
status = "okay";
};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 0eb482eb58b7..62b880f68d6a 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -49,6 +49,7 @@
#include <dt-bindings/reset/sun50i-a64-ccu.h>
#include <dt-bindings/reset/sun8i-de2.h>
#include <dt-bindings/reset/sun8i-r-ccu.h>
+#include <dt-bindings/thermal/thermal.h>
/ {
interrupt-parent = <&gic>;
@@ -79,6 +80,52 @@
};
};
+ cpu0_opp_table: opp_table0 {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp-120000000 {
+ opp-hz = /bits/ 64 <120000000>;
+ opp-microvolt = <1040000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+ opp-648000000 {
+ opp-hz = /bits/ 64 <648000000>;
+ opp-microvolt = <1040000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+ opp-816000000 {
+ opp-hz = /bits/ 64 <816000000>;
+ opp-microvolt = <1100000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+ opp-912000000 {
+ opp-hz = /bits/ 64 <912000000>;
+ opp-microvolt = <1120000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+ opp-960000000 {
+ opp-hz = /bits/ 64 <960000000>;
+ opp-microvolt = <1160000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+ opp-1008000000 {
+ opp-hz = /bits/ 64 <1008000000>;
+ opp-microvolt = <1200000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+ opp-1056000000 {
+ opp-hz = /bits/ 64 <1056000000>;
+ opp-microvolt = <1240000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+ opp-1104000000 {
+ opp-hz = /bits/ 64 <1104000000>;
+ opp-microvolt = <1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
@@ -88,7 +135,11 @@
device_type = "cpu";
reg = <0>;
enable-method = "psci";
+ clocks = <&ccu CLK_CPUX>;
+ clock-names = "cpu";
+ operating-points-v2 = <&cpu0_opp_table>;
+ #cooling-cells = <2>;
next-level-cache = <&L2>;
};
cpu1: cpu@1 {
@@ -95,7 +146,8 @@
device_type = "cpu";
reg = <1>;
enable-method = "psci";
+ operating-points-v2 = <&cpu0_opp_table>;
next-level-cache = <&L2>;
};
cpu2: cpu@2 {
@@ -102,7 +154,8 @@
device_type = "cpu";
reg = <2>;
enable-method = "psci";
+ operating-points-v2 = <&cpu0_opp_table>;
next-level-cache = <&L2>;
};
cpu3: cpu@3 {
@@ -109,7 +162,8 @@
device_type = "cpu";
reg = <3>;
enable-method = "psci";
+ operating-points-v2 = <&cpu0_opp_table>;
next-level-cache = <&L2>;
};
};
@@ -173,22 +227,55 @@
thermal-zones {
cpu_thermal: cpu0-thermal {
- /* milliseconds */
- polling-delay-passive = <250>;
- polling-delay = <1000>;
- thermal-sensors = <&ths 0>;
+ /* milliseconds */
+ polling-delay-passive = <250>;
+ polling-delay = <1000>;
+ thermal-sensors = <&ths 0>;
+
+ cooling-maps {
+ map0 {
+ trip = <&cpu_alert0>;
+ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ map1 {
+ trip = <&cpu_alert1>;
+ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
+ trips {
+ cpu_alert0: cpu_alert0 {
+ /* milliCelsius */
+ temperature = <75000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu_alert1: cpu_alert1 {
+ /* milliCelsius */
+ temperature = <90000>;
+ hysteresis = <2000>;
+ type = "hot";
+ };
+
+ cpu_crit: cpu_crit {
+ /* milliCelsius */
+ temperature = <110000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
};
gpu0_thermal: gpu0-thermal {
- /* milliseconds */
- polling-delay-passive = <250>;
- polling-delay = <1000>;
- thermal-sensors = <&ths 1>;
+ /* milliseconds */
+ polling-delay-passive = <250>;
+ polling-delay = <1000>;
+ thermal-sensors = <&ths 1>;
};
gpu1_thermal: gpu1-thermal {
- /* milliseconds */
- polling-delay-passive = <250>;
- polling-delay = <1000>;
- thermal-sensors = <&ths 2>;
+ /* milliseconds */
+ polling-delay-passive = <250>;
+ polling-delay = <1000>;
+ thermal-sensors = <&ths 2>;
};
};
diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-a64.h b/drivers/clk/sunxi-ng/ccu-sun50i-a64.h
index 061b6fbb4f95..91f79512cee4 100644
--- a/drivers/clk/sunxi-ng/ccu-sun50i-a64.h
+++ b/drivers/clk/sunxi-ng/ccu-sun50i-a64.h
@@ -43,7 +43,6 @@
#define CLK_PLL_HSIC 18
#define CLK_PLL_DE 19
#define CLK_PLL_DDR1 20
-#define CLK_CPUX 21
#define CLK_AXI 22
#define CLK_APB 23
#define CLK_AHB1 24
diff --git a/include/dt-bindings/clock/sun50i-a64-ccu.h b/include/dt-bindings/clock/sun50i-a64-ccu.h
index d66432c6e675..d7f42dd22663 100644
--- a/include/dt-bindings/clock/sun50i-a64-ccu.h
+++ b/include/dt-bindings/clock/sun50i-a64-ccu.h
@@ -45,6 +45,7 @@
#define CLK_PLL_PERIPH0 11
+#define CLK_CPUX 21
#define CLK_BUS_MIPI_DSI 28
#define CLK_BUS_CE 29
#define CLK_BUS_DMA 30
--
2.17.1

64
patch/kernel/sunxi-dev/0038-ARM-dts-add-gpu-node-to-exynos4.patch Normal file
View file

@ -0,0 +1,64 @@
From eca91d4d36d78c3176480742532b247fd3d72fe0 Mon Sep 17 00:00:00 2001
From: Simon Shields <simon@lineageos.org>
Date: Sat, 13 Jan 2018 14:17:26 +1100
Subject: [PATCH 038/146] ARM: dts: add gpu node to exynos4
v2 (Qiang Yu):
add vender string to exynos4 mali gpu
Based off a similar commit for the Samsung Mali driver by
Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
Signed-off-by: Simon Shields <simon@lineageos.org>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
---
arch/arm/boot/dts/exynos4.dtsi | 33 +++++++++++++++++++++++++++++++++
1 file changed, 33 insertions(+)
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index 6085e92ac2d7..362461657136 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -730,6 +730,39 @@
status = "disabled";
};
+ gpu: gpu@13000000 {
+ compatible = "samsung,exynos4-mali", "arm,mali-400";
+ reg = <0x13000000 0x30000>;
+ power-domains = <&pd_g3d>;
+
+ /*
+ * Propagate VPLL output clock to SCLK_G3D and
+ * ensure that the DIV_G3D divider is 1.
+ */
+ assigned-clocks = <&clock CLK_MOUT_G3D1>, <&clock CLK_MOUT_G3D>,
+ <&clock CLK_FOUT_VPLL>, <&clock CLK_SCLK_G3D>;
+ assigned-clock-parents = <&clock CLK_SCLK_VPLL>,
+ <&clock CLK_MOUT_G3D1>;
+ assigned-clock-rates = <0>, <0>, <160000000>, <160000000>;
+
+ clocks = <&clock CLK_SCLK_G3D>, <&clock CLK_G3D>;
+ clock-names = "bus", "core";
+
+ interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "ppmmu0", "ppmmu1", "ppmmu2", "ppmmu3",
+ "gpmmu", "pp0", "pp1", "pp2", "pp3", "gp";
+ status = "disabled";
+ };
+
tmu: tmu@100c0000 {
interrupt-parent = <&combiner>;
reg = <0x100C0000 0x100>;
--
2.17.1

33
patch/kernel/sunxi-dev/0072-drm-fourcc-add-ARM-tiled-format-modifier.patch Normal file
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@ -0,0 +1,33 @@
From c578aadd5ccfe5c64f628ef3aa8c7ff88600e421 Mon Sep 17 00:00:00 2001
From: Qiang Yu <yuq825@gmail.com>
Date: Tue, 19 Jun 2018 13:51:17 +0800
Subject: [PATCH 072/146] drm/fourcc: add ARM tiled format modifier
Signed-off-by: Qiang Yu <yuq825@gmail.com>
---
include/uapi/drm/drm_fourcc.h | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
index 721ab7e54d96..097d9faca608 100644
--- a/include/uapi/drm/drm_fourcc.h
+++ b/include/uapi/drm/drm_fourcc.h
@@ -581,6 +581,15 @@ extern "C" {
*/
#define AFBC_FORMAT_MOD_SC (1ULL << 9)
+/*
+ * ARM tiled format
+ *
+ * This is used by ARM Mali Utgard/Midgard GPU. It divides buffer into
+ * 16x16 pixel blocks. Blocks are stored linearly in order, but pixels
+ * in the block are reordered.
+ */
+#define DRM_FORMAT_MOD_ARM_TILED fourcc_mod_code(ARM, 1)
+
#if defined(__cplusplus)
}
#endif
--
2.17.1

58
patch/kernel/sunxi-dev/0074-a64-ccu-enable-LDOs-for-pll-mipi-and-add-min-max-rat.patch Normal file
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@ -0,0 +1,58 @@
From 9c4d2eb582078788a3f115fef91824d9213e237d Mon Sep 17 00:00:00 2001
From: Vasily Khoruzhick <anarsoul@gmail.com>
Date: Tue, 24 Jul 2018 10:17:55 -0700
Subject: [PATCH 074/146] a64: ccu: enable LDOs for pll-mipi and add min/max
rate for it
---
drivers/clk/sunxi-ng/ccu-sun50i-a64.c | 2 ++
drivers/clk/sunxi-ng/ccu_nkm.c | 5 +++++
drivers/clk/sunxi-ng/ccu_nkm.h | 3 +++
3 files changed, 10 insertions(+)
diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c
index 1fe3c3fbc9bc..7c645f2c017a 100644
--- a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c
+++ b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c
@@ -163,6 +163,8 @@ static struct ccu_nkm pll_mipi_clk = {
.n = _SUNXI_CCU_MULT(8, 4),
.k = _SUNXI_CCU_MULT_MIN(4, 2, 2),
.m = _SUNXI_CCU_DIV(0, 4),
+ .min_rate = 300000000,
+ .max_rate = 1400000000,
.common = {
.reg = 0x040,
.hw.init = CLK_HW_INIT("pll-mipi", "pll-video0",
diff --git a/drivers/clk/sunxi-ng/ccu_nkm.c b/drivers/clk/sunxi-ng/ccu_nkm.c
index 841840e35e61..01e6df4c1232 100644
--- a/drivers/clk/sunxi-ng/ccu_nkm.c
+++ b/drivers/clk/sunxi-ng/ccu_nkm.c
@@ -122,6 +122,11 @@ static unsigned long ccu_nkm_round_rate(struct ccu_mux_internal *mux,
_nkm.min_m = 1;
_nkm.max_m = nkm->m.max ?: 1 << nkm->m.width;
+ if (rate < nkm->min_rate)
+ rate = nkm->min_rate;
+ if (nkm->max_rate && (rate > nkm->max_rate))
+ rate = nkm->max_rate;
+
if (nkm->common.features & CCU_FEATURE_FIXED_POSTDIV)
rate *= nkm->fixed_post_div;
diff --git a/drivers/clk/sunxi-ng/ccu_nkm.h b/drivers/clk/sunxi-ng/ccu_nkm.h
index cc6efb70a102..6e01836ef122 100644
--- a/drivers/clk/sunxi-ng/ccu_nkm.h
+++ b/drivers/clk/sunxi-ng/ccu_nkm.h
@@ -36,6 +36,9 @@ struct ccu_nkm {
unsigned int fixed_post_div;
+ unsigned int min_rate;
+ unsigned int max_rate;
+
struct ccu_common common;
};
--
2.17.1

25
patch/kernel/sunxi-dev/0075-sopine-baseboard-enable-HS200-for-eMMC.patch Normal file
View file

@ -0,0 +1,25 @@
From 1d3ae34846fcee5e4d4ec54476c85992d03d204e Mon Sep 17 00:00:00 2001
From: Vasily Khoruzhick <anarsoul@gmail.com>
Date: Mon, 10 Sep 2018 16:09:30 -0700
Subject: [PATCH 075/146] sopine: baseboard: enable HS200 for eMMC
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
---
arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
index dc728b3b5556..abad307b414a 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
@@ -119,6 +119,7 @@
bus-width = <8>;
non-removable;
cap-mmc-hw-reset;
+ mmc-hs200-1_8v;
status = "okay";
};
--
2.17.1

58
patch/kernel/sunxi-dev/0079-drm-bridge-Add-audio-workaround-for-dw_hdmi-v1.32a.patch.disabled Normal file
View file

@ -0,0 +1,58 @@
From 87c27a1c822a43d8f6d7bc2bb889be2d3d80a100 Mon Sep 17 00:00:00 2001
From: Jernej Skrabec <jernej.skrabec@siol.net>
Date: Sun, 3 Sep 2017 11:32:34 +0200
Subject: [PATCH 079/146] drm: bridge: Add audio workaround for dw_hdmi v1.32a
Allwinner SoCs with dw hdmi v1.32a seems to have an issue with manual
setting CTS value. BSP driver sets it to auto mode and that works
here too.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
---
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 30 +++++++++++++++--------
1 file changed, 20 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
index 5971976284bf..4b08840749bd 100644
--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
@@ -424,16 +424,26 @@ static struct i2c_adapter *dw_hdmi_i2c_adapter(struct dw_hdmi *hdmi)
static void hdmi_set_cts_n(struct dw_hdmi *hdmi, unsigned int cts,
unsigned int n)
{
- /* Must be set/cleared first */
- hdmi_modb(hdmi, 0, HDMI_AUD_CTS3_CTS_MANUAL, HDMI_AUD_CTS3);
-
- /* nshift factor = 0 */
- hdmi_modb(hdmi, 0, HDMI_AUD_CTS3_N_SHIFT_MASK, HDMI_AUD_CTS3);
-
- hdmi_writeb(hdmi, ((cts >> 16) & HDMI_AUD_CTS3_AUDCTS19_16_MASK) |
- HDMI_AUD_CTS3_CTS_MANUAL, HDMI_AUD_CTS3);
- hdmi_writeb(hdmi, (cts >> 8) & 0xff, HDMI_AUD_CTS2);
- hdmi_writeb(hdmi, cts & 0xff, HDMI_AUD_CTS1);
+ /*
+ * Manual CTS setting doesn't work correctly on Allwinner SoCs with
+ * dw hdmi v1.32a.
+ */
+ if (hdmi->version != 0x132a) {
+ /* Must be set/cleared first */
+ hdmi_modb(hdmi, 0, HDMI_AUD_CTS3_CTS_MANUAL, HDMI_AUD_CTS3);
+
+ /* nshift factor = 0 */
+ hdmi_modb(hdmi, 0, HDMI_AUD_CTS3_N_SHIFT_MASK, HDMI_AUD_CTS3);
+
+ hdmi_writeb(hdmi,
+ ((cts >> 16) & HDMI_AUD_CTS3_AUDCTS19_16_MASK) |
+ HDMI_AUD_CTS3_CTS_MANUAL, HDMI_AUD_CTS3);
+ hdmi_writeb(hdmi, (cts >> 8) & 0xff, HDMI_AUD_CTS2);
+ hdmi_writeb(hdmi, cts & 0xff, HDMI_AUD_CTS1);
+ } else {
+ /* set automatic CTS calculation */
+ hdmi_writeb(hdmi, 0x00, HDMI_AUD_CTS3);
+ }
hdmi_writeb(hdmi, (n >> 16) & 0x0f, HDMI_AUD_N3);
hdmi_writeb(hdmi, (n >> 8) & 0xff, HDMI_AUD_N2);
--
2.17.1

26
patch/kernel/sunxi-dev/0080-rtl8723bs-disable-error-message-about-failure-to-all.patch Normal file
View file

@ -0,0 +1,26 @@
From 02d04263581ac956a4822b02ee7ccd15aa5600af Mon Sep 17 00:00:00 2001
From: Vasily Khoruzhick <anarsoul@gmail.com>
Date: Mon, 10 Sep 2018 20:32:51 -0700
Subject: [PATCH 080/146] rtl8723bs: disable error message about failure to
alloc recvbuf
---
drivers/staging/rtl8723bs/hal/sdio_ops.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/staging/rtl8723bs/hal/sdio_ops.c b/drivers/staging/rtl8723bs/hal/sdio_ops.c
index d6b93e1f78d8..ecc4d1db9bbe 100644
--- a/drivers/staging/rtl8723bs/hal/sdio_ops.c
+++ b/drivers/staging/rtl8723bs/hal/sdio_ops.c
@@ -947,7 +947,7 @@ static struct recv_buf *sd_recv_rxfifo(struct adapter *adapter, u32 size)
recv_priv = &adapter->recvpriv;
recvbuf = rtw_dequeue_recvbuf(&recv_priv->free_recv_buf_queue);
if (!recvbuf) {
- DBG_871X_LEVEL(_drv_err_, "%s: alloc recvbuf FAIL!\n", __func__);
+ //DBG_871X_LEVEL(_drv_err_, "%s: alloc recvbuf FAIL!\n", __func__);
return NULL;
}
--
2.17.1

78
patch/kernel/sunxi-dev/0101-arm64-dts-allwinner-a64-Enable-HDMI-output-on-A64-bo.patch Normal file
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@ -0,0 +1,78 @@
From e7623ac862573d231eea2ec77d393adbf2db3392 Mon Sep 17 00:00:00 2001
From: Jagan Teki <jagan@amarulasolutions.com>
Date: Tue, 4 Sep 2018 12:40:53 +0800
Subject: [PATCH 101/146] arm64: dts: allwinner: a64: Enable HDMI output on A64
boards w/ HDMI
Enable all necessary device tree nodes and add connector node to device
trees for all supported A64 boards with HDMI.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
[Icenowy: squash all board patches altogether and change supply name]
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> # BPI-M64, OPI-Win,
Tested-by: Vasily Khoruzhick <anarsoul@gmail.com>
---
.../dts/allwinner/sun50i-a64-bananapi-m64.dts | 26 ++++++++++++++++++
.../dts/allwinner/sun50i-a64-nanopi-a64.dts | 27 +++++++++++++++++++
.../dts/allwinner/sun50i-a64-olinuxino.dts | 26 ++++++++++++++++++
.../dts/allwinner/sun50i-a64-orangepi-win.dts | 27 +++++++++++++++++++
.../boot/dts/allwinner/sun50i-a64-pine64.dts | 27 +++++++++++++++++++
.../dts/allwinner/sun50i-a64-pinebook.dts | 26 ++++++++++++++++++
.../allwinner/sun50i-a64-sopine-baseboard.dts | 26 ++++++++++++++++++
7 files changed, 185 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
index b3698a8bb1d3..52cbb3052588 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
@@ -53,6 +53,17 @@
};
};
+ hdmi-connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
reg_vcc3v3: vcc3v3 {
compatible = "regulator-fixed";
regulator-name = "vcc3v3";
@@ -70,6 +81,10 @@
cpu-supply = <&reg_dcdc2>;
};
+&de {
+ status = "okay";
+};
+
&ehci0 {
phys = <&usbphy 0>;
phy-names = "usb";
@@ -80,6 +95,17 @@
status = "okay";
};
+&hdmi {
+ hvcc-supply = <&reg_dldo1>;
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
&mmc0 {
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins>;
--
2.17.1

43
patch/kernel/sunxi-dev/0103-dt-bindings-power-supply-axp20x-add-AXP803-power-bin.patch Normal file
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@ -0,0 +1,43 @@
From 5b0f15a9da1cb6110bc2eded53bf18626626179c Mon Sep 17 00:00:00 2001
From: Oskari Lemmela <oskari@lemmela.net>
Date: Tue, 23 Oct 2018 21:53:21 +0300
Subject: [PATCH 103/146] dt-bindings: power: supply: axp20x: add AXP803 power
bindings
The AXP803 power supplies are compatible with AXP813, but
add specific compatibles for them.
Signed-off-by: Oskari Lemmela <oskari@lemmela.net>
Reviewed-by: Rob Herring <robh@kernel.org>
---
.../devicetree/bindings/power/supply/axp20x_ac_power.txt | 1 +
.../devicetree/bindings/power/supply/axp20x_battery.txt | 1 +
2 files changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/power/supply/axp20x_ac_power.txt b/Documentation/devicetree/bindings/power/supply/axp20x_ac_power.txt
index 7a1fb532abe5..acdeb4b8f4cc 100644
--- a/Documentation/devicetree/bindings/power/supply/axp20x_ac_power.txt
+++ b/Documentation/devicetree/bindings/power/supply/axp20x_ac_power.txt
@@ -4,6 +4,7 @@ Required Properties:
- compatible: One of:
"x-powers,axp202-ac-power-supply"
"x-powers,axp221-ac-power-supply"
+ "x-powers,axp803-ac-power-supply"
"x-powers,axp813-ac-power-supply"
This node is a subnode of the axp20x PMIC.
diff --git a/Documentation/devicetree/bindings/power/supply/axp20x_battery.txt b/Documentation/devicetree/bindings/power/supply/axp20x_battery.txt
index 41916f69902c..780ebd7e3b84 100644
--- a/Documentation/devicetree/bindings/power/supply/axp20x_battery.txt
+++ b/Documentation/devicetree/bindings/power/supply/axp20x_battery.txt
@@ -4,6 +4,7 @@ Required Properties:
- compatible, one of:
"x-powers,axp209-battery-power-supply"
"x-powers,axp221-battery-power-supply"
+ "x-powers,axp803-battery-power-supply"
"x-powers,axp813-battery-power-supply"
This node is a subnode of its respective PMIC DT node.
--
2.17.1

38
patch/kernel/sunxi-dev/0104-dt-bindings-gpio-gpio-axp209-add-AXP803-GPIO-binding.patch Normal file
View file

@ -0,0 +1,38 @@
From 80694d54812c5fc49dd738e17a9cf5a91f343cae Mon Sep 17 00:00:00 2001
From: Oskari Lemmela <oskari@lemmela.net>
Date: Tue, 23 Oct 2018 21:53:22 +0300
Subject: [PATCH 104/146] dt-bindings: gpio: gpio-axp209: add AXP803 GPIO
bindings
The AXP803 GPIO is compatible with AXP813 GPIO, but add
specific compatible for it.
Signed-off-by: Oskari Lemmela <oskari@lemmela.net>
Reviewed-by: Rob Herring <robh@kernel.org>
---
Documentation/devicetree/bindings/gpio/gpio-axp209.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/gpio/gpio-axp209.txt b/Documentation/devicetree/bindings/gpio/gpio-axp209.txt
index fc42b2caa06d..5337a21d7bcf 100644
--- a/Documentation/devicetree/bindings/gpio/gpio-axp209.txt
+++ b/Documentation/devicetree/bindings/gpio/gpio-axp209.txt
@@ -11,6 +11,7 @@ This driver employs the per-pin muxing pattern.
Required properties:
- compatible: Should be one of:
- "x-powers,axp209-gpio"
+ - "x-powers,axp803-gpio"
- "x-powers,axp813-gpio"
- #gpio-cells: Should be two. The first cell is the pin number and the
second is the GPIO flags.
@@ -67,6 +68,7 @@ GPIO0 | gpio_in, gpio_out, ldo, adc
GPIO1 | gpio_in, gpio_out, ldo, adc
GPIO2 | gpio_in, gpio_out
+axp803
axp813
------
GPIO | Functions
--
2.17.1

37
patch/kernel/sunxi-dev/0105-dt-bindings-iio-adc-add-AXP803-ADC-bindings.patch Normal file
View file

@ -0,0 +1,37 @@
From fd2f21f1e63f52476bbbb0ce17fb6288a623f2ae Mon Sep 17 00:00:00 2001
From: Oskari Lemmela <oskari@lemmela.net>
Date: Tue, 23 Oct 2018 21:53:23 +0300
Subject: [PATCH 105/146] dt-bindings: iio: adc: add AXP803 ADC bindings
The AXP803 ADC is compatible with AXP813 ADC, but add
specific compatible for it.
Signed-off-by: Oskari Lemmela <oskari@lemmela.net>
Reviewed-by: Rob Herring <robh@kernel.org>
---
Documentation/devicetree/bindings/iio/adc/axp20x_adc.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/iio/adc/axp20x_adc.txt b/Documentation/devicetree/bindings/iio/adc/axp20x_adc.txt
index 7a6313913923..1dbd5e480acd 100644
--- a/Documentation/devicetree/bindings/iio/adc/axp20x_adc.txt
+++ b/Documentation/devicetree/bindings/iio/adc/axp20x_adc.txt
@@ -4,6 +4,7 @@ Required properties:
- compatible: should be one of:
- "x-powers,axp209-adc",
- "x-powers,axp221-adc",
+ - "x-powers,axp803-adc",
- "x-powers,axp813-adc",
- #io-channel-cells: should be 1,
@@ -39,6 +40,7 @@ AXP22x
2 | batt_chrg_i
3 | batt_dischrg_i
+AXP803
AXP813
------
0 | pmic_temp
--
2.17.1

39
patch/kernel/sunxi-dev/0108-arm64-dts-allwinner-a64-sopine-baseboard-enable-powe.patch Normal file
View file

@ -0,0 +1,39 @@
From f16f4cbdb0deb70c03731fbccb4f52eb4d1d096a Mon Sep 17 00:00:00 2001
From: Oskari Lemmela <oskari@lemmela.net>
Date: Tue, 23 Oct 2018 21:53:26 +0300
Subject: [PATCH 108/146] arm64: dts: allwinner: a64: sopine-baseboard: enable
power supplies
AXP803 ACIN pins are routed from SOM to the DC jack on the baseboard.
AXP803 charger pins BATSENSE, LOADSENSE, N_BATDRV, LX_CHG, VIN_CHG
and IPSOUT are connected via PMOS driver to SOM VBAT pins. VBAT and
AXP803 TS pins are routed to the baseboard 3-pin battery connector.
Signed-off-by: Oskari Lemmela <oskari@lemmela.net>
Reviewed-by: Quentin Schulz <quentin.schulz@bootlin.com>
---
.../boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
index 8e9191f489a6..df7aa8c5f751 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
@@ -80,6 +80,14 @@
};
};
+&ac_power_supply {
+ status = "okay";
+};
+
+&battery_power_supply {
+ status = "okay";
+};
+
&cpu0 {
cpu-supply = <&reg_dcdc2>;
};
--
2.17.1

99
patch/kernel/sunxi-dev/0120-arm64-dts-allwinner-a64-add-nodes-necessary-for-anal.patch-DISABLED Normal file
View file

@ -0,0 +1,99 @@
From 8cbc3090d64e850f1dc5a93e929deaed10d841f8 Mon Sep 17 00:00:00 2001
From: Vasily Khoruzhick <anarsoul@gmail.com>
Date: Sun, 3 Dec 2017 11:35:48 -0800
Subject: [PATCH 120/146] arm64: dts: allwinner: a64: add nodes necessary for
analog sound support
Add nodes for i2s, digital and analog parts of audiocodec on A64
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 58 +++++++++++++++++++
1 file changed, 58 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 132da408aa52..cb7d4a96e789 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -200,6 +200,34 @@
method = "smc";
};
+ sound: sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,name = "sun50i-a64-audio";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,frame-master = <&cpudai>;
+ simple-audio-card,bitclock-master = <&cpudai>;
+ simple-audio-card,mclk-fs = <512>;
+ simple-audio-card,aux-devs = <&codec_analog>;
+ simple-audio-card,routing =
+ "Left DAC", "AIF1 Slot 0 Left",
+ "Right DAC", "AIF1 Slot 0 Right",
+ "AIF1 Slot 0 Left ADC", "Left ADC",
+ "AIF1 Slot 0 Right ADC", "Right ADC",
+ "Left ADC", "ADC",
+ "Right ADC", "ADC",
+ "MIC1", "Mic",
+ "MIC2", "Headset Mic";
+ status = "disabled";
+
+ cpudai: simple-audio-card,cpu {
+ sound-dai = <&dai>;
+ };
+
+ link_codec: simple-audio-card,codec {
+ sound-dai = <&codec>;
+ };
+ };
+
sound_spdif {
compatible = "simple-audio-card";
simple-audio-card,name = "On-board SPDIF";
@@ -767,6 +795,30 @@
status = "disabled";
};
+ dai: dai@1c22c00 {
+ #sound-dai-cells = <0>;
+ compatible = "allwinner,sun50i-a64-codec-i2s";
+ reg = <0x01c22c00 0x200>;
+ interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>;
+ clock-names = "apb", "mod";
+ resets = <&ccu RST_BUS_CODEC>;
+ reset-names = "rst";
+ dmas = <&dma 15>, <&dma 15>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
+ codec: codec@1c22e00 {
+ #sound-dai-cells = <0>;
+ compatible = "allwinner,sun8i-a33-codec";
+ reg = <0x01c22e00 0x600>;
+ interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>;
+ clock-names = "bus", "mod";
+ status = "disabled";
+ };
+
ths: thermal-sensor@1c25000 {
compatible = "allwinner,sun50i-a64-ths";
reg = <0x01c25000 0x100>;
@@ -1071,6 +1123,12 @@
#reset-cells = <1>;
};
+ codec_analog: codec-analog@1f015c0 {
+ compatible = "allwinner,sun50i-a64-codec-analog";
+ reg = <0x01f015c0 0x4>;
+ status = "disabled";
+ };
+
r_i2c: i2c@1f02400 {
compatible = "allwinner,sun50i-a64-i2c",
"allwinner,sun6i-a31-i2c";
--
2.17.1

58
patch/kernel/sunxi-dev/0123-drm-sun4i-tcon-enable-dithering-on-tcon0-is-there-s-.patch.disabled Normal file
View file

@ -0,0 +1,58 @@
From 4690963a2d219abac912ebe2f0b22529c028db06 Mon Sep 17 00:00:00 2001
From: Vasily Khoruzhick <anarsoul@gmail.com>
Date: Sun, 28 Oct 2018 15:32:38 -0700
Subject: [PATCH 123/146] drm/sun4i: tcon: enable dithering on tcon0 is there's
bridge connected
RGB on A64 is 6bpc, so if bridge is connected we need to enable dithering
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
---
drivers/gpu/drm/sun4i/sun4i_tcon.c | 14 ++++++++------
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c
index 1b28fd9c2908..891ba4dbbf10 100644
--- a/drivers/gpu/drm/sun4i/sun4i_tcon.c
+++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c
@@ -283,10 +283,6 @@ static void sun4i_tcon0_mode_set_dithering(struct sun4i_tcon *tcon,
u32 bus_format = 0;
u32 val = 0;
- /* XXX Would this ever happen? */
- if (!connector)
- return;
-
/*
* FIXME: Undocumented bits
*
@@ -304,11 +300,15 @@ static void sun4i_tcon0_mode_set_dithering(struct sun4i_tcon *tcon,
regmap_write(tcon->regs, SUN4I_TCON0_FRM_TBL2_REG, 0x57575555);
regmap_write(tcon->regs, SUN4I_TCON0_FRM_TBL3_REG, 0x7f7f7777);
+ /* Do dithering if there's bridge connected */
+ if (!connector)
+ val |= SUN4I_TCON0_FRM_CTL_EN;
+
/* Do dithering if panel only supports 6 bits per color */
- if (connector->display_info.bpc == 6)
+ if (connector && connector->display_info.bpc == 6)
val |= SUN4I_TCON0_FRM_CTL_EN;
- if (connector->display_info.num_bus_formats == 1)
+ if (connector && connector->display_info.num_bus_formats == 1)
bus_format = connector->display_info.bus_formats[0];
/* Check the connection format */
@@ -492,6 +492,8 @@ static void sun4i_tcon0_mode_set_rgb(struct sun4i_tcon *tcon,
/* Set dithering if needed */
if (tcon->panel)
sun4i_tcon0_mode_set_dithering(tcon, tcon->panel->connector);
+ else
+ sun4i_tcon0_mode_set_dithering(tcon, NULL);
/* Adjust clock delay */
clk_delay = sun4i_tcon_get_clk_delay(mode, 0);
--
2.17.1

76
patch/kernel/sunxi-dev/0126-drm-bridge-move-ANA78xx-driver-to-analogix-subdirect.patch Normal file
View file

@ -0,0 +1,76 @@
From c66953710d4c7205c380bf9c5a7e296bef3d4948 Mon Sep 17 00:00:00 2001
From: Icenowy Zheng <icenowy@aosc.io>
Date: Thu, 18 Oct 2018 15:33:19 +0800
Subject: [PATCH 126/146] drm/bridge: move ANA78xx driver to analogix
subdirectory
As ANA78xx chips are designed and produced by Analogix Semiconductor,
Inc, move their driver codes into analogix subdirectory.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
drivers/gpu/drm/bridge/Kconfig | 10 ----------
drivers/gpu/drm/bridge/Makefile | 4 ++--
drivers/gpu/drm/bridge/analogix/Kconfig | 10 ++++++++++
drivers/gpu/drm/bridge/analogix/Makefile | 1 +
.../gpu/drm/bridge/{ => analogix}/analogix-anx78xx.c | 0
.../gpu/drm/bridge/{ => analogix}/analogix-anx78xx.h | 0
6 files changed, 13 insertions(+), 12 deletions(-)
rename drivers/gpu/drm/bridge/{ => analogix}/analogix-anx78xx.c (100%)
rename drivers/gpu/drm/bridge/{ => analogix}/analogix-anx78xx.h (100%)
diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile
index 4934fcf..729a806 100644
--- a/drivers/gpu/drm/bridge/Makefile
+++ b/drivers/gpu/drm/bridge/Makefile
@@ -1,5 +1,4 @@
# SPDX-License-Identifier: GPL-2.0
-obj-$(CONFIG_DRM_ANALOGIX_ANX78XX) += analogix-anx78xx.o
obj-$(CONFIG_DRM_CDNS_DSI) += cdns-dsi.o
obj-$(CONFIG_DRM_DUMB_VGA_DAC) += dumb-vga-dac.o
obj-$(CONFIG_DRM_LVDS_ENCODER) += lvds-encoder.o
@@ -16,4 +15,6 @@ obj-$(CONFIG_DRM_ANALOGIX_DP) += analogix/
obj-$(CONFIG_DRM_I2C_ADV7511) += adv7511/
obj-$(CONFIG_DRM_TI_SN65DSI86) += ti-sn65dsi86.o
obj-$(CONFIG_DRM_TI_TFP410) += ti-tfp410.o
+
+obj-y += analogix/
obj-y += synopsys/
diff --git a/drivers/gpu/drm/bridge/analogix/Kconfig b/drivers/gpu/drm/bridge/analogix/Kconfig
index 80f286fa3a69..27b37aa2ea77 100644
--- a/drivers/gpu/drm/bridge/analogix/Kconfig
+++ b/drivers/gpu/drm/bridge/analogix/Kconfig
@@ -1,3 +1,13 @@
config DRM_ANALOGIX_DP
tristate
depends on DRM
+
+config DRM_ANALOGIX_ANX78XX
+ tristate "Analogix ANX78XX bridge"
+ select DRM_KMS_HELPER
+ select REGMAP_I2C
+ ---help---
+ ANX78XX is an ultra-low Full-HD SlimPort transmitter
+ designed for portable devices. The ANX78XX transforms
+ the HDMI output of an application processor to MyDP
+ or DisplayPort.
diff --git a/drivers/gpu/drm/bridge/analogix/Makefile b/drivers/gpu/drm/bridge/analogix/Makefile
index cd4010ba6890..eb41be845055 100644
--- a/drivers/gpu/drm/bridge/analogix/Makefile
+++ b/drivers/gpu/drm/bridge/analogix/Makefile
@@ -1,2 +1,3 @@
analogix_dp-objs := analogix_dp_core.o analogix_dp_reg.o
obj-$(CONFIG_DRM_ANALOGIX_DP) += analogix_dp.o
+obj-$(CONFIG_DRM_ANALOGIX_ANX78XX) += analogix-anx78xx.o
diff --git a/drivers/gpu/drm/bridge/analogix-anx78xx.c b/drivers/gpu/drm/bridge/analogix/analogix-anx78xx.c
similarity index 100%
rename from drivers/gpu/drm/bridge/analogix-anx78xx.c
rename to drivers/gpu/drm/bridge/analogix/analogix-anx78xx.c
diff --git a/drivers/gpu/drm/bridge/analogix-anx78xx.h b/drivers/gpu/drm/bridge/analogix/analogix-anx78xx.h
similarity index 100%
rename from drivers/gpu/drm/bridge/analogix-anx78xx.h
rename to drivers/gpu/drm/bridge/analogix/analogix-anx78xx.h
--
2.17.1

1005
patch/kernel/sunxi-dev/0127-drm-bridge-split-some-definitions-of-ANX78xx-to-dedi.patch Normal file
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File diff suppressed because it is too large Load diff

403
patch/kernel/sunxi-dev/0128-drm-bridge-extract-some-Analogix-I2C-DP-common-code.patch-disabled Normal file
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@ -0,0 +1,403 @@
From d1f75332d44f26e734985493c134a727c79cb1f1 Mon Sep 17 00:00:00 2001
From: Icenowy Zheng <icenowy@aosc.io>
Date: Thu, 18 Oct 2018 15:33:21 +0800
Subject: [PATCH 128/146] drm/bridge: extract some Analogix I2C DP common code
Some code can be shared within different DP bridges by Analogix.
Extract them to a new module.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
---
drivers/gpu/drm/bridge/analogix/Kconfig | 4 +
drivers/gpu/drm/bridge/analogix/Makefile | 2 +
.../drm/bridge/analogix/analogix-anx78xx.c | 146 +--------------
.../drm/bridge/analogix/analogix-i2c-dptx.c | 169 ++++++++++++++++++
.../drm/bridge/analogix/analogix-i2c-dptx.h | 2 +
5 files changed, 178 insertions(+), 145 deletions(-)
create mode 100644 drivers/gpu/drm/bridge/analogix/analogix-i2c-dptx.c
diff --git a/drivers/gpu/drm/bridge/analogix/Kconfig b/drivers/gpu/drm/bridge/analogix/Kconfig
index 27b37aa2ea77..eb893b465dd8 100644
--- a/drivers/gpu/drm/bridge/analogix/Kconfig
+++ b/drivers/gpu/drm/bridge/analogix/Kconfig
@@ -2,8 +2,12 @@ config DRM_ANALOGIX_DP
tristate
depends on DRM
+config DRM_ANALOGIX_DP_I2C
+ tristate
+
config DRM_ANALOGIX_ANX78XX
tristate "Analogix ANX78XX bridge"
+ select DRM_ANALOGIX_DP_I2C
select DRM_KMS_HELPER
select REGMAP_I2C
---help---
diff --git a/drivers/gpu/drm/bridge/analogix/Makefile b/drivers/gpu/drm/bridge/analogix/Makefile
index eb41be845055..c37e2ded8ce3 100644
--- a/drivers/gpu/drm/bridge/analogix/Makefile
+++ b/drivers/gpu/drm/bridge/analogix/Makefile
@@ -1,3 +1,5 @@
analogix_dp-objs := analogix_dp_core.o analogix_dp_reg.o
+analogix_dp_i2c-objs := analogix-i2c-dptx.o
obj-$(CONFIG_DRM_ANALOGIX_DP) += analogix_dp.o
+obj-$(CONFIG_DRM_ANALOGIX_DP_I2C) += analogix_dp_i2c.o
obj-$(CONFIG_DRM_ANALOGIX_ANX78XX) += analogix-anx78xx.o
diff --git a/drivers/gpu/drm/bridge/analogix/analogix-anx78xx.c b/drivers/gpu/drm/bridge/analogix/analogix-anx78xx.c
index f8433c93f463..bf8291d0ddd0 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix-anx78xx.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix-anx78xx.c
@@ -45,8 +45,6 @@
#define I2C_IDX_RX_P1 4
#define XTAL_CLK 270 /* 27M */
-#define AUX_CH_BUFFER_SIZE 16
-#define AUX_WAIT_TIMEOUT_MS 15
static const u8 anx78xx_i2c_addresses[] = {
[I2C_IDX_TX_P0] = TX_P0,
@@ -109,153 +107,11 @@ static int anx78xx_clear_bits(struct regmap *map, u8 reg, u8 mask)
return regmap_update_bits(map, reg, mask, 0);
}
-static bool anx78xx_aux_op_finished(struct anx78xx *anx78xx)
-{
- unsigned int value;
- int err;
-
- err = regmap_read(anx78xx->map[I2C_IDX_TX_P0], SP_DP_AUX_CH_CTRL2_REG,
- &value);
- if (err < 0)
- return false;
-
- return (value & SP_AUX_EN) == 0;
-}
-
-static int anx78xx_aux_wait(struct anx78xx *anx78xx)
-{
- unsigned long timeout;
- unsigned int status;
- int err;
-
- timeout = jiffies + msecs_to_jiffies(AUX_WAIT_TIMEOUT_MS) + 1;
-
- while (!anx78xx_aux_op_finished(anx78xx)) {
- if (time_after(jiffies, timeout)) {
- if (!anx78xx_aux_op_finished(anx78xx)) {
- DRM_ERROR("Timed out waiting AUX to finish\n");
- return -ETIMEDOUT;
- }
-
- break;
- }
-
- usleep_range(1000, 2000);
- }
-
- /* Read the AUX channel access status */
- err = regmap_read(anx78xx->map[I2C_IDX_TX_P0], SP_AUX_CH_STATUS_REG,
- &status);
- if (err < 0) {
- DRM_ERROR("Failed to read from AUX channel: %d\n", err);
- return err;
- }
-
- if (status & SP_AUX_STATUS) {
- DRM_ERROR("Failed to wait for AUX channel (status: %02x)\n",
- status);
- return -ETIMEDOUT;
- }
-
- return 0;
-}
-
-static int anx78xx_aux_address(struct anx78xx *anx78xx, unsigned int addr)
-{
- int err;
-
- err = regmap_write(anx78xx->map[I2C_IDX_TX_P0], SP_AUX_ADDR_7_0_REG,
- addr & 0xff);
- if (err)
- return err;
-
- err = regmap_write(anx78xx->map[I2C_IDX_TX_P0], SP_AUX_ADDR_15_8_REG,
- (addr & 0xff00) >> 8);
- if (err)
- return err;
-
- /*
- * DP AUX CH Address Register #2, only update bits[3:0]
- * [7:4] RESERVED
- * [3:0] AUX_ADDR[19:16], Register control AUX CH address.
- */
- err = regmap_update_bits(anx78xx->map[I2C_IDX_TX_P0],
- SP_AUX_ADDR_19_16_REG,
- SP_AUX_ADDR_19_16_MASK,
- (addr & 0xf0000) >> 16);
-
- if (err)
- return err;
-
- return 0;
-}
-
static ssize_t anx78xx_aux_transfer(struct drm_dp_aux *aux,
struct drm_dp_aux_msg *msg)
{
struct anx78xx *anx78xx = container_of(aux, struct anx78xx, aux);
- u8 ctrl1 = msg->request;
- u8 ctrl2 = SP_AUX_EN;
- u8 *buffer = msg->buffer;
- int err;
-
- /* The DP AUX transmit and receive buffer has 16 bytes. */
- if (WARN_ON(msg->size > AUX_CH_BUFFER_SIZE))
- return -E2BIG;
-
- /* Zero-sized messages specify address-only transactions. */
- if (msg->size < 1)
- ctrl2 |= SP_ADDR_ONLY;
- else /* For non-zero-sized set the length field. */
- ctrl1 |= (msg->size - 1) << SP_AUX_LENGTH_SHIFT;
-
- if ((msg->request & DP_AUX_I2C_READ) == 0) {
- /* When WRITE | MOT write values to data buffer */
- err = regmap_bulk_write(anx78xx->map[I2C_IDX_TX_P0],
- SP_DP_BUF_DATA0_REG, buffer,
- msg->size);
- if (err)
- return err;
- }
-
- /* Write address and request */
- err = anx78xx_aux_address(anx78xx, msg->address);
- if (err)
- return err;
-
- err = regmap_write(anx78xx->map[I2C_IDX_TX_P0], SP_DP_AUX_CH_CTRL1_REG,
- ctrl1);
- if (err)
- return err;
-
- /* Start transaction */
- err = regmap_update_bits(anx78xx->map[I2C_IDX_TX_P0],
- SP_DP_AUX_CH_CTRL2_REG, SP_ADDR_ONLY |
- SP_AUX_EN, ctrl2);
- if (err)
- return err;
-
- err = anx78xx_aux_wait(anx78xx);
- if (err)
- return err;
-
- msg->reply = DP_AUX_I2C_REPLY_ACK;
-
- if ((msg->size > 0) && (msg->request & DP_AUX_I2C_READ)) {
- /* Read values from data buffer */
- err = regmap_bulk_read(anx78xx->map[I2C_IDX_TX_P0],
- SP_DP_BUF_DATA0_REG, buffer,
- msg->size);
- if (err)
- return err;
- }
-
- err = anx78xx_clear_bits(anx78xx->map[I2C_IDX_TX_P0],
- SP_DP_AUX_CH_CTRL2_REG, SP_ADDR_ONLY);
- if (err)
- return err;
-
- return msg->size;
+ return anx_aux_transfer(anx78xx->map[I2C_IDX_TX_P0], msg);
}
static int anx78xx_set_hpd(struct anx78xx *anx78xx)
diff --git a/drivers/gpu/drm/bridge/analogix/analogix-i2c-dptx.c b/drivers/gpu/drm/bridge/analogix/analogix-i2c-dptx.c
new file mode 100644
index 000000000000..9cb30962032e
--- /dev/null
+++ b/drivers/gpu/drm/bridge/analogix/analogix-i2c-dptx.c
@@ -0,0 +1,169 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright(c) 2017 Icenowy Zheng <icenowy@aosc.io>
+ *
+ * Based on analogix-anx78xx.c, which is:
+ * Copyright(c) 2016, Analogix Semiconductor. All rights reserved.
+ */
+
+#include <linux/module.h>
+#include <linux/regmap.h>
+
+#include <drm/drm.h>
+#include <drm/drm_drv.h>
+#include <drm/drm_dp_helper.h>
+
+#include "analogix-i2c-dptx.h"
+
+#define AUX_WAIT_TIMEOUT_MS 15
+#define AUX_CH_BUFFER_SIZE 16
+
+static int anx_clear_bits(struct regmap *map, u8 reg, u8 mask)
+{
+ return regmap_update_bits(map, reg, mask, 0);
+}
+
+static bool anx_aux_op_finished(struct regmap *map_dptx)
+{
+ unsigned int value;
+ int err;
+
+ err = regmap_read(map_dptx, SP_DP_AUX_CH_CTRL2_REG, &value);
+ if (err < 0)
+ return false;
+
+ return (value & SP_AUX_EN) == 0;
+}
+
+static int anx_aux_wait(struct regmap *map_dptx)
+{
+ unsigned long timeout;
+ unsigned int status;
+ int err;
+
+ timeout = jiffies + msecs_to_jiffies(AUX_WAIT_TIMEOUT_MS) + 1;
+
+ while (!anx_aux_op_finished(map_dptx)) {
+ if (time_after(jiffies, timeout)) {
+ if (!anx_aux_op_finished(map_dptx)) {
+ DRM_ERROR("Timed out waiting AUX to finish\n");
+ return -ETIMEDOUT;
+ }
+
+ break;
+ }
+
+ usleep_range(1000, 2000);
+ }
+
+ /* Read the AUX channel access status */
+ err = regmap_read(map_dptx, SP_AUX_CH_STATUS_REG, &status);
+ if (err < 0) {
+ DRM_ERROR("Failed to read from AUX channel: %d\n", err);
+ return err;
+ }
+
+ if (status & SP_AUX_STATUS) {
+ DRM_ERROR("Failed to wait for AUX channel (status: %02x)\n",
+ status);
+ return -ETIMEDOUT;
+ }
+
+ return 0;
+}
+
+static int anx_aux_address(struct regmap *map_dptx, unsigned int addr)
+{
+ int err;
+
+ err = regmap_write(map_dptx, SP_AUX_ADDR_7_0_REG, addr & 0xff);
+ if (err)
+ return err;
+
+ err = regmap_write(map_dptx, SP_AUX_ADDR_15_8_REG,
+ (addr & 0xff00) >> 8);
+ if (err)
+ return err;
+
+ /*
+ * DP AUX CH Address Register #2, only update bits[3:0]
+ * [7:4] RESERVED
+ * [3:0] AUX_ADDR[19:16], Register control AUX CH address.
+ */
+ err = regmap_update_bits(map_dptx, SP_AUX_ADDR_19_16_REG,
+ SP_AUX_ADDR_19_16_MASK,
+ (addr & 0xf0000) >> 16);
+
+ if (err)
+ return err;
+
+ return 0;
+}
+
+ssize_t anx_aux_transfer(struct regmap *map_dptx, struct drm_dp_aux_msg *msg)
+{
+ u8 ctrl1 = msg->request;
+ u8 ctrl2 = SP_AUX_EN;
+ u8 *buffer = msg->buffer;
+ int err;
+
+ /* The DP AUX transmit and receive buffer has 16 bytes. */
+ if (WARN_ON(msg->size > AUX_CH_BUFFER_SIZE))
+ return -E2BIG;
+
+ /* Zero-sized messages specify address-only transactions. */
+ if (msg->size < 1)
+ ctrl2 |= SP_ADDR_ONLY;
+ else /* For non-zero-sized set the length field. */
+ ctrl1 |= (msg->size - 1) << SP_AUX_LENGTH_SHIFT;
+
+ if ((msg->request & DP_AUX_I2C_READ) == 0) {
+ /* When WRITE | MOT write values to data buffer */
+ err = regmap_bulk_write(map_dptx,
+ SP_DP_BUF_DATA0_REG, buffer,
+ msg->size);
+ if (err)
+ return err;
+ }
+
+ /* Write address and request */
+ err = anx_aux_address(map_dptx, msg->address);
+ if (err)
+ return err;
+
+ err = regmap_write(map_dptx, SP_DP_AUX_CH_CTRL1_REG, ctrl1);
+ if (err)
+ return err;
+
+ /* Start transaction */
+ err = regmap_update_bits(map_dptx, SP_DP_AUX_CH_CTRL2_REG,
+ SP_ADDR_ONLY | SP_AUX_EN, ctrl2);
+ if (err)
+ return err;
+
+ err = anx_aux_wait(map_dptx);
+ if (err)
+ return err;
+
+ msg->reply = DP_AUX_I2C_REPLY_ACK;
+
+ if ((msg->size > 0) && (msg->request & DP_AUX_I2C_READ)) {
+ /* Read values from data buffer */
+ err = regmap_bulk_read(map_dptx,
+ SP_DP_BUF_DATA0_REG, buffer,
+ msg->size);
+ if (err)
+ return err;
+ }
+
+ err = anx_clear_bits(map_dptx, SP_DP_AUX_CH_CTRL2_REG, SP_ADDR_ONLY);
+ if (err)
+ return err;
+
+ return msg->size;
+}
+EXPORT_SYMBOL(anx_aux_transfer);
+
+MODULE_DESCRIPTION("Analogix DisplayPort Transmitter common code");
+MODULE_AUTHOR("Icenowy Zheng <icenowy@aosc.io>");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/gpu/drm/bridge/analogix/analogix-i2c-dptx.h b/drivers/gpu/drm/bridge/analogix/analogix-i2c-dptx.h
index bc0831b127bf..c2ca854613a0 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix-i2c-dptx.h
+++ b/drivers/gpu/drm/bridge/analogix/analogix-i2c-dptx.h
@@ -245,4 +245,6 @@
/* DP AUX Buffer Data Registers */
#define SP_DP_BUF_DATA0_REG 0xf0
+ssize_t anx_aux_transfer(struct regmap *map_dptx, struct drm_dp_aux_msg *msg);
+
#endif
--
2.17.1

64
patch/kernel/sunxi-dev/0129-dt-bindings-Add-ANX6345-DP-eDP-transmitter-binding.patch Normal file
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@ -0,0 +1,64 @@
From db3c5b3983ab2395794ea3ebd5c73ab7b39d2caa Mon Sep 17 00:00:00 2001
From: Icenowy Zheng <icenowy@aosc.io>
Date: Thu, 18 Oct 2018 15:33:22 +0800
Subject: [PATCH 129/146] dt-bindings: Add ANX6345 DP/eDP transmitter binding
The ANX6345 is an ultra-low power DisplayPort/eDP transmitter designed
for portable devices.
Add a binding document for it.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
---
.../bindings/display/bridge/anx6345.txt | 39 +++++++++++++++++++
1 file changed, 39 insertions(+)
create mode 100644 Documentation/devicetree/bindings/display/bridge/anx6345.txt
diff --git a/Documentation/devicetree/bindings/display/bridge/anx6345.txt b/Documentation/devicetree/bindings/display/bridge/anx6345.txt
new file mode 100644
index 000000000000..0689d4eb5f65
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/bridge/anx6345.txt
@@ -0,0 +1,39 @@
+Analogix ANX6345 eDP Transmitter
+--------------------------------
+
+The ANX6345 is an ultra-low power Full-HD eDP transmitter designed for
+portable devices.
+
+Required properties:
+
+ - compatible : "analogix,anx6345"
+ - reg : I2C address of the device
+ - reset-gpios : Which GPIO to use for reset
+
+Optional properties:
+
+ - dvdd12-supply : Regulator for 1.2V digital core power.
+ - dvdd25-supply : Regulator for 2.5V digital core power.
+ - panel-supply : Regulator for the power of the panel.
+ - edid : verbatim EDID data block describing attached
+ panel, only used when the panel has no EDID info.
+ - Video port for RGB input, using the DT bindings defined in [1].
+
+[1]: Documentation/devicetree/bindings/media/video-interfaces.txt
+
+Example:
+
+anx6345: anx6345@38 {
+ compatible = "analogix,anx6345";
+ reg = <0x38>;
+ reset-gpios = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* PD24 */
+ panel-supply = <&reg_dc1sw>;
+ dvdd25-supply = <&reg_dldo2>;
+ dvdd12-supply = <&reg_fldo1>;
+
+ port {
+ anx6345_in: endpoint {
+ remote-endpoint = <&tcon0_out_anx6345>;
+ };
+ };
+};
--
2.17.1

982
patch/kernel/sunxi-dev/0130-drm-bridge-Add-Analogix-anx6345-support.patch-disabled Normal file
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@ -0,0 +1,982 @@
From 2da065ab8aa3f562a02dfd3df4ad971d1229b136 Mon Sep 17 00:00:00 2001
From: Icenowy Zheng <icenowy@aosc.io>
Date: Thu, 18 Oct 2018 15:33:23 +0800
Subject: [PATCH 130/146] drm/bridge: Add Analogix anx6345 support
The ANX6345 is an ultra-low power DisplayPower/eDP transmitter designed
for portable devices. This driver adds initial support for RGB to eDP
mode, without HPD and interrupts, but with possibility to inject EDID.
This is a configuration usually seen in eDP applications.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
---
drivers/gpu/drm/bridge/analogix/Kconfig | 11 +
drivers/gpu/drm/bridge/analogix/Makefile | 1 +
.../drm/bridge/analogix/analogix-anx6345.c | 862 ++++++++++++++++++
.../drm/bridge/analogix/analogix-i2c-dptx.c | 2 +-
.../drm/bridge/analogix/analogix-i2c-dptx.h | 8 +
.../bridge/analogix/analogix-i2c-txcommon.h | 3 +
6 files changed, 886 insertions(+), 1 deletion(-)
create mode 100644 drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
diff --git a/drivers/gpu/drm/bridge/analogix/Kconfig b/drivers/gpu/drm/bridge/analogix/Kconfig
index eb893b465dd8..784ddca83b47 100644
--- a/drivers/gpu/drm/bridge/analogix/Kconfig
+++ b/drivers/gpu/drm/bridge/analogix/Kconfig
@@ -15,3 +15,14 @@ config DRM_ANALOGIX_ANX78XX
designed for portable devices. The ANX78XX transforms
the HDMI output of an application processor to MyDP
or DisplayPort.
+
+config DRM_ANALOGIX_ANX6345
+ tristate "Analogix ANX6345 bridge"
+ select DRM_ANALOGIX_DP_I2C
+ select DRM_KMS_HELPER
+ select REGMAP_I2C
+ help
+ ANX6345 is an ultra-low Full-HD DisplayPort/eDP
+ transmitter designed for portable devices. The
+ ANX6345 transforms the LVTTL RGB output of an
+ application processor to eDP or DisplayPort.
diff --git a/drivers/gpu/drm/bridge/analogix/Makefile b/drivers/gpu/drm/bridge/analogix/Makefile
index c37e2ded8ce3..3af9feab6e17 100644
--- a/drivers/gpu/drm/bridge/analogix/Makefile
+++ b/drivers/gpu/drm/bridge/analogix/Makefile
@@ -3,3 +3,4 @@ analogix_dp_i2c-objs := analogix-i2c-dptx.o
obj-$(CONFIG_DRM_ANALOGIX_DP) += analogix_dp.o
obj-$(CONFIG_DRM_ANALOGIX_DP_I2C) += analogix_dp_i2c.o
obj-$(CONFIG_DRM_ANALOGIX_ANX78XX) += analogix-anx78xx.o
+obj-$(CONFIG_DRM_ANALOGIX_ANX6345) += analogix-anx6345.o
diff --git a/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c b/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
new file mode 100644
index 000000000000..81676407aa6d
--- /dev/null
+++ b/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
@@ -0,0 +1,863 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright(c) Icenowy Zheng <icenowy@aosc.io>
+ * Based on analogix-anx6345.c, which is:
+ * Copyright(c) 2016, Analogix Semiconductor.
+ */
+#include <linux/delay.h>
+#include <linux/err.h>
+#include <linux/interrupt.h>
+#include <linux/i2c.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of_gpio.h>
+#include <linux/of_platform.h>
+#include <linux/regmap.h>
+#include <linux/types.h>
+#include <linux/gpio/consumer.h>
+#include <linux/regulator/consumer.h>
+
+#include <drm/drm_drv.h>
+#include <drm/drm_atomic_helper.h>
+#include <drm/drm_crtc.h>
+#include <drm/drm_crtc_helper.h>
+#include <drm/drm_probe_helper.h>
+#include <drm/drm_dp_helper.h>
+#include <drm/drm_edid.h>
+
+#include "analogix-i2c-dptx.h"
+#include "analogix-i2c-txcommon.h"
+
+#define I2C_NUM_ADDRESSES 2
+#define I2C_IDX_DPTX 0
+#define I2C_IDX_TXCOM 1
+
+#define XTAL_CLK 270 /* 27M */
+
+#define POLL_DELAY 50000 /* us */
+#define POLL_TIMEOUT 5000000 /* us */
+
+static const u8 anx6345_i2c_addresses[] = {
+ [I2C_IDX_DPTX] = ANALOGIX_I2C_DPTX,
+ [I2C_IDX_TXCOM] = ANALOGIX_I2C_TXCOMMON,
+};
+
+struct anx6345_platform_data {
+ struct regulator *dvdd12;
+ struct regulator *dvdd25;
+ struct regulator *vcc_panel;
+ struct gpio_desc *gpiod_reset;
+};
+
+struct anx6345 {
+ struct drm_dp_aux aux;
+ struct drm_bridge bridge;
+ struct i2c_client *client;
+ struct edid *edid;
+ struct drm_connector connector;
+ struct drm_dp_link link;
+ struct anx6345_platform_data pdata;
+ struct mutex lock;
+
+ /*
+ * I2C Slave addresses of ANX6345 are mapped as DPTX and SYS
+ */
+ struct i2c_client *i2c_clients[I2C_NUM_ADDRESSES];
+ struct regmap *map[I2C_NUM_ADDRESSES];
+
+ u16 chipid;
+ u8 dpcd[DP_RECEIVER_CAP_SIZE];
+
+ bool powered;
+};
+
+static inline struct anx6345 *connector_to_anx6345(struct drm_connector *c)
+{
+ return container_of(c, struct anx6345, connector);
+}
+
+static inline struct anx6345 *bridge_to_anx6345(struct drm_bridge *bridge)
+{
+ return container_of(bridge, struct anx6345, bridge);
+}
+
+static int anx6345_set_bits(struct regmap *map, u8 reg, u8 mask)
+{
+ return regmap_update_bits(map, reg, mask, mask);
+}
+
+static int anx6345_clear_bits(struct regmap *map, u8 reg, u8 mask)
+{
+ return regmap_update_bits(map, reg, mask, 0);
+}
+
+static ssize_t anx6345_aux_transfer(struct drm_dp_aux *aux,
+ struct drm_dp_aux_msg *msg)
+{
+ struct anx6345 *anx6345 = container_of(aux, struct anx6345, aux);
+
+ return anx_aux_transfer(anx6345->map[I2C_IDX_DPTX], msg);
+}
+
+static int anx6345_dp_link_training(struct anx6345 *anx6345)
+{
+ unsigned int value;
+ u8 dp_bw;
+ int err;
+
+ err = anx6345_clear_bits(anx6345->map[I2C_IDX_TXCOM],
+ SP_POWERDOWN_CTRL_REG,
+ SP_TOTAL_PD);
+ if (err)
+ return err;
+
+ err = drm_dp_dpcd_readb(&anx6345->aux, DP_MAX_LINK_RATE, &dp_bw);
+ if (err < 0)
+ return err;
+
+ switch (dp_bw) {
+ case DP_LINK_BW_1_62:
+ case DP_LINK_BW_2_7:
+ break;
+
+ default:
+ DRM_DEBUG_KMS("DP bandwidth (%#02x) not supported\n", dp_bw);
+ return -EINVAL;
+ }
+
+ err = anx6345_set_bits(anx6345->map[I2C_IDX_TXCOM], SP_VID_CTRL1_REG,
+ SP_VIDEO_MUTE);
+ if (err)
+ return err;
+
+ err = anx6345_clear_bits(anx6345->map[I2C_IDX_TXCOM],
+ SP_VID_CTRL1_REG, SP_VIDEO_EN);
+ if (err)
+ return err;
+
+ /* Get DPCD info */
+ err = drm_dp_dpcd_read(&anx6345->aux, DP_DPCD_REV,
+ &anx6345->dpcd, DP_RECEIVER_CAP_SIZE);
+ if (err < 0) {
+ DRM_ERROR("Failed to read DPCD: %d\n", err);
+ return err;
+ }
+
+ /* Clear channel x SERDES power down */
+ err = anx6345_clear_bits(anx6345->map[I2C_IDX_DPTX],
+ SP_DP_ANALOG_POWER_DOWN_REG, SP_CH0_PD);
+ if (err)
+ return err;
+
+ /* Check link capabilities */
+ err = drm_dp_link_probe(&anx6345->aux, &anx6345->link);
+ if (err < 0) {
+ DRM_ERROR("Failed to probe link capabilities: %d\n", err);
+ return err;
+ }
+
+ /* Power up the sink */
+ err = drm_dp_link_power_up(&anx6345->aux, &anx6345->link);
+ if (err < 0) {
+ DRM_ERROR("Failed to power up DisplayPort link: %d\n", err);
+ return err;
+ }
+
+ /* Possibly enable downspread on the sink */
+ err = regmap_write(anx6345->map[I2C_IDX_DPTX],
+ SP_DP_DOWNSPREAD_CTRL1_REG, 0);
+ if (err)
+ return err;
+
+ if (anx6345->dpcd[DP_MAX_DOWNSPREAD] & DP_MAX_DOWNSPREAD_0_5) {
+ DRM_DEBUG("Enable downspread on the sink\n");
+ /* 4000PPM */
+ err = regmap_write(anx6345->map[I2C_IDX_DPTX],
+ SP_DP_DOWNSPREAD_CTRL1_REG, 8);
+ if (err)
+ return err;
+
+ err = drm_dp_dpcd_writeb(&anx6345->aux, DP_DOWNSPREAD_CTRL,
+ DP_SPREAD_AMP_0_5);
+ if (err < 0)
+ return err;
+ } else {
+ err = drm_dp_dpcd_writeb(&anx6345->aux, DP_DOWNSPREAD_CTRL, 0);
+ if (err < 0)
+ return err;
+ }
+
+ /* Set the lane count and the link rate on the sink */
+ if (drm_dp_enhanced_frame_cap(anx6345->dpcd))
+ err = anx6345_set_bits(anx6345->map[I2C_IDX_DPTX],
+ SP_DP_SYSTEM_CTRL_BASE + 4,
+ SP_ENHANCED_MODE);
+ else
+ err = anx6345_clear_bits(anx6345->map[I2C_IDX_DPTX],
+ SP_DP_SYSTEM_CTRL_BASE + 4,
+ SP_ENHANCED_MODE);
+ if (err)
+ return err;
+
+ value = drm_dp_link_rate_to_bw_code(anx6345->link.rate);
+ err = regmap_write(anx6345->map[I2C_IDX_DPTX],
+ SP_DP_MAIN_LINK_BW_SET_REG, value);
+ if (err)
+ return err;
+
+ err = regmap_write(anx6345->map[I2C_IDX_DPTX],
+ SP_DP_LANE_COUNT_SET_REG, anx6345->link.num_lanes);
+ if (err)
+ return err;
+
+ err = drm_dp_link_configure(&anx6345->aux, &anx6345->link);
+ if (err < 0) {
+ DRM_ERROR("Failed to configure DisplayPort link: %d\n", err);
+ return err;
+ }
+
+ /* Start training on the source */
+ err = regmap_write(anx6345->map[I2C_IDX_DPTX], SP_DP_LT_CTRL_REG,
+ SP_LT_EN);
+ if (err)
+ return err;
+
+ err = regmap_read_poll_timeout(anx6345->map[I2C_IDX_DPTX],
+ SP_DP_LT_CTRL_REG,
+ value, !(value & SP_DP_LT_INPROGRESS),
+ POLL_DELAY, POLL_TIMEOUT);
+ if (err)
+ return err;
+
+ return 0;
+}
+
+static int anx6345_tx_initialization(struct anx6345 *anx6345)
+{
+ int err, i;
+
+ /* FIXME: hardcode color depth now */
+ err = regmap_write(anx6345->map[I2C_IDX_TXCOM], SP_VID_CTRL2_REG,
+ SP_IN_BPC_6BIT << SP_IN_BPC_SHIFT);
+ if (err)
+ return err;
+
+ err = regmap_write(anx6345->map[I2C_IDX_DPTX], SP_DP_PLL_CTRL_REG, 0);
+ if (err)
+ return err;
+
+ err = regmap_write(anx6345->map[I2C_IDX_TXCOM],
+ SP_ANALOG_DEBUG1_REG, 0);
+ if (err)
+ return err;
+
+ err = regmap_write(anx6345->map[I2C_IDX_DPTX],
+ SP_DP_LINK_DEBUG_CTRL_REG,
+ SP_NEW_PRBS7 | SP_M_VID_DEBUG);
+ if (err)
+ return err;
+
+ err = regmap_write(anx6345->map[I2C_IDX_DPTX],
+ SP_DP_ANALOG_POWER_DOWN_REG, 0);
+ if (err)
+ return err;
+
+ /* Force HPD */
+ err = anx6345_set_bits(anx6345->map[I2C_IDX_DPTX],
+ SP_DP_SYSTEM_CTRL_BASE + 3,
+ SP_HPD_FORCE | SP_HPD_CTRL);
+ if (err)
+ return err;
+
+ for (i = 0; i < 4; i++) {
+ /* 4 lanes */
+ err = regmap_write(anx6345->map[I2C_IDX_DPTX],
+ SP_DP_LANE0_LT_CTRL_REG + i, 0);
+ if (err)
+ return err;
+ }
+
+ /* Reset AUX */
+ err = anx6345_set_bits(anx6345->map[I2C_IDX_TXCOM],
+ SP_RESET_CTRL2_REG, SP_AUX_RST);
+ if (err)
+ return err;
+
+ err = anx6345_clear_bits(anx6345->map[I2C_IDX_TXCOM],
+ SP_RESET_CTRL2_REG, SP_AUX_RST);
+ if (err)
+ return err;
+
+ err = anx6345_dp_link_training(anx6345);
+ if (err)
+ return err;
+
+ return 0;
+}
+
+static void anx6345_poweron(struct anx6345 *anx6345)
+{
+ struct anx6345_platform_data *pdata = &anx6345->pdata;
+ int err;
+
+ if (WARN_ON(anx6345->powered))
+ return;
+
+ if (pdata->dvdd12) {
+ err = regulator_enable(pdata->dvdd12);
+ if (err) {
+ DRM_ERROR("Failed to enable DVDD12 regulator: %d\n",
+ err);
+ return;
+ }
+
+ usleep_range(1000, 2000);
+ }
+
+ if (pdata->dvdd25) {
+ err = regulator_enable(pdata->dvdd25);
+ if (err) {
+ DRM_ERROR("Failed to enable DVDD25 regulator: %d\n",
+ err);
+ return;
+ }
+
+ usleep_range(5000, 10000);
+ }
+
+ if (pdata->vcc_panel) {
+ err = regulator_enable(pdata->vcc_panel);
+ if (err) {
+ DRM_ERROR("Failed to enable panel regulator: %d\n",
+ err);
+ return;
+ }
+ }
+
+ gpiod_set_value_cansleep(pdata->gpiod_reset, 0);
+ usleep_range(1000, 2000);
+
+ gpiod_set_value_cansleep(pdata->gpiod_reset, 1);
+
+ /* Power on registers module */
+ anx6345_set_bits(anx6345->map[I2C_IDX_TXCOM], SP_POWERDOWN_CTRL_REG,
+ SP_HDCP_PD | SP_AUDIO_PD | SP_VIDEO_PD | SP_LINK_PD);
+ anx6345_clear_bits(anx6345->map[I2C_IDX_TXCOM], SP_POWERDOWN_CTRL_REG,
+ SP_REGISTER_PD | SP_TOTAL_PD);
+
+ anx6345->powered = true;
+}
+
+static void anx6345_poweroff(struct anx6345 *anx6345)
+{
+ struct anx6345_platform_data *pdata = &anx6345->pdata;
+ int err;
+
+ if (WARN_ON(!anx6345->powered))
+ return;
+
+ gpiod_set_value_cansleep(pdata->gpiod_reset, 1);
+ usleep_range(1000, 2000);
+
+ if (pdata->vcc_panel) {
+ err = regulator_disable(pdata->vcc_panel);
+ if (err) {
+ DRM_ERROR("Failed to disable panel regulator: %d\n",
+ err);
+ return;
+ }
+ }
+
+ if (pdata->dvdd25) {
+ err = regulator_disable(pdata->dvdd25);
+ if (err) {
+ DRM_ERROR("Failed to disable DVDD25 regulator: %d\n",
+ err);
+ return;
+ }
+
+ usleep_range(5000, 10000);
+ }
+
+ if (pdata->dvdd12) {
+ err = regulator_disable(pdata->dvdd12);
+ if (err) {
+ DRM_ERROR("Failed to disable DVDD12 regulator: %d\n",
+ err);
+ return;
+ }
+
+ usleep_range(1000, 2000);
+ }
+
+ anx6345->powered = false;
+}
+
+static int anx6345_start(struct anx6345 *anx6345)
+{
+ int err;
+
+ if (!anx6345->powered)
+ anx6345_poweron(anx6345);
+
+ /* Power on needed modules */
+ err = anx6345_clear_bits(anx6345->map[I2C_IDX_TXCOM],
+ SP_POWERDOWN_CTRL_REG,
+ SP_VIDEO_PD | SP_LINK_PD);
+
+ err = anx6345_tx_initialization(anx6345);
+ if (err) {
+ DRM_ERROR("Failed transmitter initialization: %d\n", err);
+ goto err_poweroff;
+ }
+
+ /*
+ * This delay seems to help keep the hardware in a good state. Without
+ * it, there are times where it fails silently.
+ */
+ usleep_range(10000, 15000);
+
+ return 0;
+
+err_poweroff:
+ DRM_ERROR("Failed DisplayPort transmitter initialization: %d\n", err);
+ anx6345_poweroff(anx6345);
+
+ return err;
+}
+
+static int anx6345_init_pdata(struct anx6345 *anx6345)
+{
+ struct anx6345_platform_data *pdata = &anx6345->pdata;
+ struct device *dev = &anx6345->client->dev;
+
+ /* 1.2V digital core power regulator */
+ pdata->dvdd12 = devm_regulator_get(dev, "dvdd12");
+ if (IS_ERR(pdata->dvdd12)) {
+ DRM_ERROR("DVDD12 regulator not found\n");
+ return PTR_ERR(pdata->dvdd12);
+ }
+
+ /* 2.5V digital core power regulator */
+ pdata->dvdd25 = devm_regulator_get(dev, "dvdd25");
+ if (IS_ERR(pdata->dvdd25)) {
+ DRM_ERROR("DVDD25 regulator not found\n");
+ return PTR_ERR(pdata->dvdd25);
+ }
+
+ /* panel power regulator */
+ pdata->vcc_panel = devm_regulator_get(dev, "panel");
+ if (IS_ERR(pdata->vcc_panel)) {
+ DRM_ERROR("panel regulator not found\n");
+ return PTR_ERR(pdata->vcc_panel);
+ }
+
+ /* GPIO for chip reset */
+ pdata->gpiod_reset = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);
+
+ return PTR_ERR_OR_ZERO(pdata->gpiod_reset);
+}
+
+static int anx6345_config_dp_output(struct anx6345 *anx6345)
+{
+ int err;
+
+ err = anx6345_clear_bits(anx6345->map[I2C_IDX_TXCOM], SP_VID_CTRL1_REG,
+ SP_VIDEO_MUTE);
+ if (err)
+ return err;
+
+ /* Enable DP output */
+ err = anx6345_set_bits(anx6345->map[I2C_IDX_TXCOM], SP_VID_CTRL1_REG,
+ SP_VIDEO_EN);
+ if (err)
+ return err;
+
+ /* Force stream valid */
+ err = anx6345_set_bits(anx6345->map[I2C_IDX_DPTX],
+ SP_DP_SYSTEM_CTRL_BASE + 3,
+ SP_STRM_FORCE | SP_STRM_CTRL);
+ if (err)
+ return err;
+
+ return 0;
+}
+
+static int anx6345_get_downstream_info(struct anx6345 *anx6345)
+{
+ u8 value;
+ int err;
+
+ err = drm_dp_dpcd_readb(&anx6345->aux, DP_SINK_COUNT, &value);
+ if (err < 0) {
+ DRM_ERROR("Get sink count failed %d\n", err);
+ return err;
+ }
+
+ if (!DP_GET_SINK_COUNT(value)) {
+ DRM_ERROR("Downstream disconnected\n");
+ return -EIO;
+ }
+
+ return 0;
+}
+
+static int anx6345_probe_edid_from_of(struct anx6345 *anx6345)
+{
+ const u8 *edidp;
+ int len;
+
+ if (!anx6345->bridge.of_node)
+ return -ENODEV;
+
+ edidp = of_get_property(anx6345->bridge.of_node, "edid", &len);
+ if (!edidp || len != EDID_LENGTH)
+ return -EINVAL;
+
+ anx6345->edid = devm_kmemdup(&anx6345->client->dev, edidp,
+ len, GFP_KERNEL);
+
+ if (!anx6345->edid)
+ return -ENOMEM;
+
+ return 0;
+}
+
+static int anx6345_get_modes(struct drm_connector *connector)
+{
+ struct anx6345 *anx6345 = connector_to_anx6345(connector);
+ int err, num_modes = 0;
+
+ if (WARN_ON(!anx6345->powered))
+ return 0;
+
+ if (anx6345->edid)
+ return drm_add_edid_modes(connector, anx6345->edid);
+
+ mutex_lock(&anx6345->lock);
+
+ err = anx6345_get_downstream_info(anx6345);
+ if (err) {
+ DRM_ERROR("Failed to get downstream info: %d\n", err);
+ goto unlock;
+ }
+
+ anx6345->edid = drm_get_edid(connector, &anx6345->aux.ddc);
+ if (!anx6345->edid)
+ DRM_ERROR("Failed to read EDID from panel\n");
+
+ if (!anx6345->edid) {
+ err = anx6345_probe_edid_from_of(anx6345);
+ if (err) {
+ DRM_ERROR("Failed to probe EDID from device tree\n");
+ goto unlock;
+ }
+ }
+
+ err = drm_connector_update_edid_property(connector,
+ anx6345->edid);
+ if (err) {
+ DRM_ERROR("Failed to update EDID property: %d\n", err);
+ goto unlock;
+ }
+
+ num_modes = drm_add_edid_modes(connector, anx6345->edid);
+
+unlock:
+ mutex_unlock(&anx6345->lock);
+
+ return num_modes;
+}
+
+static const struct drm_connector_helper_funcs anx6345_connector_helper_funcs = {
+ .get_modes = anx6345_get_modes,
+};
+
+static enum drm_connector_status anx6345_detect(struct drm_connector *connector,
+ bool force)
+{
+ return connector_status_connected;
+}
+
+static const struct drm_connector_funcs anx6345_connector_funcs = {
+ .fill_modes = drm_helper_probe_single_connector_modes,
+ .detect = anx6345_detect,
+ .destroy = drm_connector_cleanup,
+ .reset = drm_atomic_helper_connector_reset,
+ .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
+ .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
+};
+
+static int anx6345_bridge_attach(struct drm_bridge *bridge)
+{
+ struct anx6345 *anx6345 = bridge_to_anx6345(bridge);
+ int err;
+
+ if (!bridge->encoder) {
+ DRM_ERROR("Parent encoder object not found");
+ return -ENODEV;
+ }
+
+ /* Register aux channel */
+ anx6345->aux.name = "DP-AUX";
+ anx6345->aux.dev = &anx6345->client->dev;
+ anx6345->aux.transfer = anx6345_aux_transfer;
+
+ err = drm_dp_aux_register(&anx6345->aux);
+ if (err < 0) {
+ DRM_ERROR("Failed to register aux channel: %d\n", err);
+ return err;
+ }
+
+ err = drm_connector_init(bridge->dev, &anx6345->connector,
+ &anx6345_connector_funcs,
+ DRM_MODE_CONNECTOR_eDP);
+ if (err) {
+ DRM_ERROR("Failed to initialize connector: %d\n", err);
+ return err;
+ }
+
+ drm_connector_helper_add(&anx6345->connector,
+ &anx6345_connector_helper_funcs);
+
+ err = drm_connector_register(&anx6345->connector);
+ if (err) {
+ DRM_ERROR("Failed to register connector: %d\n", err);
+ return err;
+ }
+
+ anx6345->connector.polled = DRM_CONNECTOR_POLL_HPD;
+
+ err = drm_connector_attach_encoder(&anx6345->connector,
+ bridge->encoder);
+ if (err) {
+ DRM_ERROR("Failed to link up connector to encoder: %d\n", err);
+ return err;
+ }
+
+ return 0;
+}
+
+static bool anx6345_bridge_mode_fixup(struct drm_bridge *bridge,
+ const struct drm_display_mode *mode,
+ struct drm_display_mode *adjusted_mode)
+{
+ if (mode->flags & DRM_MODE_FLAG_INTERLACE)
+ return false;
+
+ /* Max 1200p at 5.4 Ghz, one lane */
+ if (mode->clock > 154000)
+ return false;
+
+ return true;
+}
+
+static void anx6345_bridge_disable(struct drm_bridge *bridge)
+{
+ struct anx6345 *anx6345 = bridge_to_anx6345(bridge);
+
+ /* Power off all modules except configuration registers access */
+ anx6345_set_bits(anx6345->map[I2C_IDX_TXCOM], SP_POWERDOWN_CTRL_REG,
+ SP_HDCP_PD | SP_AUDIO_PD | SP_VIDEO_PD | SP_LINK_PD);
+}
+
+static void anx6345_bridge_mode_set(struct drm_bridge *bridge,
+ const struct drm_display_mode *mode,
+ const struct drm_display_mode *adjusted_mode)
+{
+ struct anx6345 *anx6345 = bridge_to_anx6345(bridge);
+
+ if (WARN_ON(!anx6345->powered))
+ return;
+}
+
+static void anx6345_bridge_enable(struct drm_bridge *bridge)
+{
+ struct anx6345 *anx6345 = bridge_to_anx6345(bridge);
+ int err;
+
+ err = anx6345_start(anx6345);
+ if (err) {
+ DRM_ERROR("Failed to initialize: %d\n", err);
+ return;
+ }
+
+ err = anx6345_config_dp_output(anx6345);
+ if (err)
+ DRM_ERROR("Failed to enable DP output: %d\n", err);
+}
+
+static const struct drm_bridge_funcs anx6345_bridge_funcs = {
+ .attach = anx6345_bridge_attach,
+ .mode_fixup = anx6345_bridge_mode_fixup,
+ .disable = anx6345_bridge_disable,
+ .mode_set = anx6345_bridge_mode_set,
+ .enable = anx6345_bridge_enable,
+};
+
+static void unregister_i2c_dummy_clients(struct anx6345 *anx6345)
+{
+ unsigned int i;
+
+ for (i = 1; i < ARRAY_SIZE(anx6345->i2c_clients); i++)
+ if (anx6345->i2c_clients[i] &&
+ anx6345->i2c_clients[i]->addr != anx6345->client->addr)
+ i2c_unregister_device(anx6345->i2c_clients[i]);
+}
+
+static const struct regmap_config anx6345_regmap_config = {
+ .reg_bits = 8,
+ .val_bits = 8,
+ .max_register = 0xff,
+};
+
+static const u16 anx6345_chipid_list[] = {
+ 0x6345,
+};
+
+static int anx6345_i2c_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ struct anx6345 *anx6345;
+ struct anx6345_platform_data *pdata;
+ unsigned int i, idl, idh, version;
+ bool found = false;
+ int err;
+
+ anx6345 = devm_kzalloc(&client->dev, sizeof(*anx6345), GFP_KERNEL);
+ if (!anx6345)
+ return -ENOMEM;
+
+ pdata = &anx6345->pdata;
+
+ mutex_init(&anx6345->lock);
+
+#if IS_ENABLED(CONFIG_OF)
+ anx6345->bridge.of_node = client->dev.of_node;
+#endif
+
+ anx6345->client = client;
+ i2c_set_clientdata(client, anx6345);
+
+ err = anx6345_init_pdata(anx6345);
+ if (err) {
+ DRM_ERROR("Failed to initialize pdata: %d\n", err);
+ return err;
+ }
+
+ /* Map slave addresses of ANX6345 */
+ for (i = 0; i < I2C_NUM_ADDRESSES; i++) {
+ if (anx6345_i2c_addresses[i] >> 1 != client->addr)
+ anx6345->i2c_clients[i] = i2c_new_dummy(client->adapter,
+ anx6345_i2c_addresses[i] >> 1);
+ else
+ anx6345->i2c_clients[i] = client;
+
+ if (!anx6345->i2c_clients[i]) {
+ err = -ENOMEM;
+ DRM_ERROR("Failed to reserve I2C bus %02x\n",
+ anx6345_i2c_addresses[i]);
+ goto err_unregister_i2c;
+ }
+
+ anx6345->map[i] = devm_regmap_init_i2c(anx6345->i2c_clients[i],
+ &anx6345_regmap_config);
+ if (IS_ERR(anx6345->map[i])) {
+ err = PTR_ERR(anx6345->map[i]);
+ DRM_ERROR("Failed regmap initialization %02x\n",
+ anx6345_i2c_addresses[i]);
+ goto err_unregister_i2c;
+ }
+ }
+
+ /* Look for supported chip ID */
+ anx6345_poweron(anx6345);
+
+ err = regmap_read(anx6345->map[I2C_IDX_TXCOM], SP_DEVICE_IDL_REG,
+ &idl);
+ if (err)
+ goto err_poweroff;
+
+ err = regmap_read(anx6345->map[I2C_IDX_TXCOM], SP_DEVICE_IDH_REG,
+ &idh);
+ if (err)
+ goto err_poweroff;
+
+ anx6345->chipid = (u8)idl | ((u8)idh << 8);
+
+ err = regmap_read(anx6345->map[I2C_IDX_TXCOM], SP_DEVICE_VERSION_REG,
+ &version);
+ if (err)
+ goto err_poweroff;
+
+ for (i = 0; i < ARRAY_SIZE(anx6345_chipid_list); i++) {
+ if (anx6345->chipid == anx6345_chipid_list[i]) {
+ DRM_INFO("Found ANX%x (ver. %d) eDP Transmitter\n",
+ anx6345->chipid, version);
+ found = true;
+ break;
+ }
+ }
+
+ if (!found) {
+ DRM_ERROR("ANX%x (ver. %d) not supported by this driver\n",
+ anx6345->chipid, version);
+ err = -ENODEV;
+ goto err_poweroff;
+ }
+
+ anx6345->bridge.funcs = &anx6345_bridge_funcs;
+
+ drm_bridge_add(&anx6345->bridge);
+
+ return 0;
+
+err_poweroff:
+ anx6345_poweroff(anx6345);
+
+err_unregister_i2c:
+ unregister_i2c_dummy_clients(anx6345);
+ return err;
+}
+
+static int anx6345_i2c_remove(struct i2c_client *client)
+{
+ struct anx6345 *anx6345 = i2c_get_clientdata(client);
+
+ drm_bridge_remove(&anx6345->bridge);
+
+ unregister_i2c_dummy_clients(anx6345);
+
+ kfree(anx6345->edid);
+
+ return 0;
+}
+
+static const struct i2c_device_id anx6345_id[] = {
+ { "anx6345", 0 },
+ { /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(i2c, anx6345_id);
+
+#if IS_ENABLED(CONFIG_OF)
+static const struct of_device_id anx6345_match_table[] = {
+ { .compatible = "analogix,anx6345", },
+ { /* sentinel */ },
+};
+MODULE_DEVICE_TABLE(of, anx6345_match_table);
+#endif
+
+static struct i2c_driver anx6345_driver = {
+ .driver = {
+ .name = "anx6345",
+ .of_match_table = of_match_ptr(anx6345_match_table),
+ },
+ .probe = anx6345_i2c_probe,
+ .remove = anx6345_i2c_remove,
+ .id_table = anx6345_id,
+};
+module_i2c_driver(anx6345_driver);
+
+MODULE_DESCRIPTION("ANX6345 eDP Transmitter driver");
+MODULE_AUTHOR("Icenowy Zheng <icenowy@aosc.io>");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/gpu/drm/bridge/analogix/analogix-i2c-dptx.c b/drivers/gpu/drm/bridge/analogix/analogix-i2c-dptx.c
index 9cb30962032e..53b0e73d6a24 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix-i2c-dptx.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix-i2c-dptx.c
@@ -117,7 +117,7 @@ ssize_t anx_aux_transfer(struct regmap *map_dptx, struct drm_dp_aux_msg *msg)
else /* For non-zero-sized set the length field. */
ctrl1 |= (msg->size - 1) << SP_AUX_LENGTH_SHIFT;
- if ((msg->request & DP_AUX_I2C_READ) == 0) {
+ if ((msg->size > 0) && ((msg->request & DP_AUX_I2C_READ) == 0)) {
/* When WRITE | MOT write values to data buffer */
err = regmap_bulk_write(map_dptx,
SP_DP_BUF_DATA0_REG, buffer,
diff --git a/drivers/gpu/drm/bridge/analogix/analogix-i2c-dptx.h b/drivers/gpu/drm/bridge/analogix/analogix-i2c-dptx.h
index c2ca854613a0..b29a0b3bc23c 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix-i2c-dptx.h
+++ b/drivers/gpu/drm/bridge/analogix/analogix-i2c-dptx.h
@@ -75,7 +75,11 @@
#define SP_CHA_STA BIT(2)
/* Bits for DP System Control Register 3 */
#define SP_HPD_STATUS BIT(6)
+#define SP_HPD_FORCE BIT(5)
+#define SP_HPD_CTRL BIT(4)
#define SP_STRM_VALID BIT(2)
+#define SP_STRM_FORCE BIT(1)
+#define SP_STRM_CTRL BIT(0)
/* Bits for DP System Control Register 4 */
#define SP_ENHANCED_MODE BIT(3)
@@ -120,6 +124,9 @@
#define SP_LINK_BW_SET_MASK 0x1f
#define SP_INITIAL_SLIM_M_AUD_SEL BIT(5)
+/* DP Lane Count Setting Register */
+#define SP_DP_LANE_COUNT_SET_REG 0xa1
+
/* DP Training Pattern Set Register */
#define SP_DP_TRAINING_PATTERN_SET_REG 0xa2
@@ -133,6 +140,7 @@
/* DP Link Training Control Register */
#define SP_DP_LT_CTRL_REG 0xa8
+#define SP_DP_LT_INPROGRESS 0x80
#define SP_LT_ERROR_TYPE_MASK 0x70
# define SP_LT_NO_ERROR 0x00
# define SP_LT_AUX_WRITE_ERROR 0x01
diff --git a/drivers/gpu/drm/bridge/analogix/analogix-i2c-txcommon.h b/drivers/gpu/drm/bridge/analogix/analogix-i2c-txcommon.h
index 7d683573e970..480c98a225b1 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix-i2c-txcommon.h
+++ b/drivers/gpu/drm/bridge/analogix/analogix-i2c-txcommon.h
@@ -183,6 +183,9 @@
#define SP_VBIT BIT(1)
#define SP_AUDIO_LAYOUT BIT(0)
+/* Analog Debug Register 1 */
+#define SP_ANALOG_DEBUG1_REG 0xdc
+
/* Analog Debug Register 2 */
#define SP_ANALOG_DEBUG2_REG 0xdd
#define SP_FORCE_SW_OFF_BYPASS 0x20
--
2.17.1

84
patch/kernel/sunxi-dev/0132-arm64-allwinner-a64-enable-ANX6345-bridge-on-Pineboo.patch Normal file
View file

@ -0,0 +1,84 @@
From 82fe5562e8d5cb289e97ff8d259b21889e72b03b Mon Sep 17 00:00:00 2001
From: Icenowy Zheng <icenowy@aosc.io>
Date: Thu, 18 Oct 2018 15:33:25 +0800
Subject: [PATCH 132/146] arm64: allwinner: a64: enable ANX6345 bridge on
Pinebook
Pinebook has an ANX6345 bridge connected to the RGB666 LCD output, and
the I2C controlling signals are connected to R_I2C bus.
Enable it in the device tree, and add a usable EDID from the panel's
datasheet (at least 14" Pinebook used a panel without EDID).
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
---
.../dts/allwinner/sun50i-a64-pinebook.dts | 39 +++++++++++++++++++
1 file changed, 39 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
index b55ac4e1df37..8c9bd4dfbbba 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
@@ -123,6 +123,10 @@
};
};
+&mixer0 {
+ status = "okay";
+};
+
&mmc0 {
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins>;
@@ -175,6 +179,27 @@
status = "okay";
};
+&r_i2c {
+ pinctrl-names = "default";
+ pinctrl-0 = <&r_i2c_pins_a>;
+ status = "okay";
+
+ anx6345: anx6345@38 {
+ compatible = "analogix,anx6345";
+ reg = <0x38>;
+ reset-gpios = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* PD24 */
+ panel-supply = <&reg_dc1sw>;
+ dvdd25-supply = <&reg_dldo2>;
+ dvdd12-supply = <&reg_fldo1>;
+
+ port {
+ anx6345_in: endpoint {
+ remote-endpoint = <&tcon0_out_anx6345>;
+ };
+ };
+ };
+};
+
&r_rsb {
status = "okay";
@@ -348,6 +373,20 @@
"MIC2", "Internal Microphone Right";
};
+&tcon0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&lcd_rgb666_pins>;
+
+ status = "okay";
+};
+
+&tcon0_out {
+ tcon0_out_anx6345: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&anx6345_in>;
+ };
+};
+
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
--
2.17.1

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