Bump meson64 DEV to 5.11.y (#2695)

config/kernel/linux-meson64-dev.config

@@ -1,6 +1,6 @@
 #
 # Automatically generated file; DO NOT EDIT.
-# Linux/arm64 5.10.18 Kernel Configuration
+# Linux/arm64 5.11.4 Kernel Configuration
 #
 CONFIG_CC_VERSION_TEXT="aarch64-linux-gnu-gcc (GNU Toolchain for the A-profile Architecture 8.3-2019.03 (arm-rel-8.36)) 8.3.0"
 CONFIG_CC_IS_GCC=y
@@ -225,6 +225,7 @@ CONFIG_BPF_JIT_DEFAULT_ON=y
 # CONFIG_BPF_PRELOAD is not set
 # CONFIG_USERFAULTFD is not set
 CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y
+CONFIG_KCMP=y
 CONFIG_RSEQ=y
 # CONFIG_DEBUG_RSEQ is not set
 # CONFIG_EMBEDDED is not set
@@ -292,6 +293,7 @@ CONFIG_ARCH_PROC_KCORE_TEXT=y
 # CONFIG_ARCH_SUNXI is not set
 # CONFIG_ARCH_ALPINE is not set
 # CONFIG_ARCH_BCM2835 is not set
+# CONFIG_ARCH_BCM4908 is not set
 # CONFIG_ARCH_BCM_IPROC is not set
 # CONFIG_ARCH_BERLIN is not set
 # CONFIG_ARCH_BITMAIN is not set
@@ -395,11 +397,9 @@ CONFIG_HZ_250=y
 # CONFIG_HZ_1000 is not set
 CONFIG_HZ=250
 CONFIG_SCHED_HRTICK=y
-CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
 CONFIG_ARCH_SPARSEMEM_ENABLE=y
 CONFIG_ARCH_SPARSEMEM_DEFAULT=y
 CONFIG_ARCH_SELECT_MEMORY_MODEL=y
-CONFIG_HAVE_ARCH_PFN_VALID=y
 CONFIG_HW_PERF_EVENTS=y
 CONFIG_SYS_SUPPORTS_HUGETLBFS=y
 CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y
@@ -429,6 +429,7 @@ CONFIG_SETEND_EMULATION=y
 #
 CONFIG_ARM64_HW_AFDBM=y
 CONFIG_ARM64_PAN=y
+CONFIG_AS_HAS_LDAPR=y
 CONFIG_ARM64_LSE_ATOMICS=y
 CONFIG_ARM64_USE_LSE_ATOMICS=y
 CONFIG_ARM64_VHE=y
@@ -437,7 +438,6 @@ CONFIG_ARM64_VHE=y
 #
 # ARMv8.2 architectural features
 #
-CONFIG_ARM64_UAO=y
 # CONFIG_ARM64_PMEM is not set
 CONFIG_ARM64_RAS_EXTN=y
 CONFIG_ARM64_CNP=y
@@ -462,6 +462,7 @@ CONFIG_ARM64_TLB_RANGE=y
 #
 # ARMv8.5 architectural features
 #
+CONFIG_AS_HAS_ARMV8_5=y
 CONFIG_ARM64_BTI=y
 CONFIG_ARM64_E0PD=y
 CONFIG_ARCH_RANDOM=y
@@ -608,6 +609,7 @@ CONFIG_UEFI_CPER_ARM=y
 CONFIG_EFI_EARLYCON=y
 CONFIG_EFI_CUSTOM_SSDT_OVERLAYS=y
 CONFIG_MESON_SM=y
+CONFIG_MESON_GX_PM=y
 CONFIG_ARM_PSCI_FW=y
 # CONFIG_ARM_PSCI_CHECKER is not set
 CONFIG_HAVE_ARM_SMCCC=y
@@ -679,7 +681,6 @@ CONFIG_HAVE_KVM_ARCH_TLB_FLUSH_ALL=y
 CONFIG_KVM_GENERIC_DIRTYLOG_READ_PROTECT=y
 CONFIG_HAVE_KVM_IRQ_BYPASS=y
 CONFIG_HAVE_KVM_VCPU_RUN_PID_CHANGE=y
-CONFIG_KVM_ARM_PMU=y
 CONFIG_ARM64_CRYPTO=y
 CONFIG_CRYPTO_SHA256_ARM64=y
 # CONFIG_CRYPTO_SHA512_ARM64 is not set
@@ -706,7 +707,6 @@ CONFIG_CRYPTO_AES_ARM64_BS=y
 #
 CONFIG_CRASH_CORE=y
 CONFIG_KEXEC_CORE=y
-CONFIG_SET_FS=y
 # CONFIG_KPROBES is not set
 CONFIG_JUMP_LABEL=y
 # CONFIG_STATIC_KEYS_SELFTEST is not set
@@ -744,6 +744,7 @@ CONFIG_HAVE_ARCH_SECCOMP=y
 CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
 CONFIG_SECCOMP=y
 CONFIG_SECCOMP_FILTER=y
+# CONFIG_SECCOMP_CACHE_DEBUG is not set
 CONFIG_HAVE_ARCH_STACKLEAK=y
 CONFIG_HAVE_STACKPROTECTOR=y
 CONFIG_STACKPROTECTOR=y
@@ -751,6 +752,7 @@ CONFIG_STACKPROTECTOR_STRONG=y
 CONFIG_HAVE_CONTEXT_TRACKING=y
 CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
 CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
+CONFIG_HAVE_MOVE_PUD=y
 CONFIG_HAVE_MOVE_PMD=y
 CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y
 CONFIG_HAVE_ARCH_HUGE_VMAP=y
@@ -778,6 +780,8 @@ CONFIG_ARCH_USE_MEMREMAP_PROT=y
 # CONFIG_LOCK_EVENT_COUNTS is not set
 CONFIG_ARCH_HAS_RELR=y
 CONFIG_ARCH_WANT_LD_ORPHAN_WARN=y
+CONFIG_HAVE_ARCH_PFN_VALID=y
+CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
 
 #
 # GCOV-based kernel profiling
@@ -787,6 +791,10 @@ CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y
 # end of GCOV-based kernel profiling
 
 CONFIG_HAVE_GCC_PLUGINS=y
+CONFIG_GCC_PLUGINS=y
+# CONFIG_GCC_PLUGIN_CYC_COMPLEXITY is not set
+# CONFIG_GCC_PLUGIN_LATENT_ENTROPY is not set
+# CONFIG_GCC_PLUGIN_RANDSTRUCT is not set
 # end of General architecture-dependent options
 
 CONFIG_RT_MUTEXES=y
@@ -947,7 +955,7 @@ CONFIG_GENERIC_EARLY_IOREMAP=y
 CONFIG_ARCH_HAS_PTE_DEVMAP=y
 CONFIG_FRAME_VECTOR=y
 # CONFIG_PERCPU_STATS is not set
-# CONFIG_GUP_BENCHMARK is not set
+# CONFIG_GUP_TEST is not set
 # CONFIG_READ_ONLY_THP_FOR_FS is not set
 CONFIG_ARCH_HAS_PTE_SPECIAL=y
 # end of Memory Management options
@@ -1169,6 +1177,7 @@ CONFIG_NF_DUP_NETDEV=m
 CONFIG_NFT_DUP_NETDEV=m
 CONFIG_NFT_FWD_NETDEV=m
 CONFIG_NFT_FIB_NETDEV=m
+CONFIG_NFT_REJECT_NETDEV=m
 CONFIG_NF_FLOW_TABLE_INET=m
 CONFIG_NF_FLOW_TABLE=m
 CONFIG_NETFILTER_XTABLES=m
@@ -1494,6 +1503,7 @@ CONFIG_BRIDGE=m
 CONFIG_BRIDGE_IGMP_SNOOPING=y
 CONFIG_BRIDGE_VLAN_FILTERING=y
 # CONFIG_BRIDGE_MRP is not set
+# CONFIG_BRIDGE_CFM is not set
 CONFIG_HAVE_NET_DSA=y
 CONFIG_NET_DSA=m
 CONFIG_NET_DSA_TAG_8021Q=m
@@ -1501,7 +1511,9 @@ CONFIG_NET_DSA_TAG_AR9331=m
 CONFIG_NET_DSA_TAG_BRCM_COMMON=m
 CONFIG_NET_DSA_TAG_BRCM=m
 CONFIG_NET_DSA_TAG_BRCM_PREPEND=m
+CONFIG_NET_DSA_TAG_HELLCREEK=m
 CONFIG_NET_DSA_TAG_GSWIP=m
+CONFIG_NET_DSA_TAG_DSA_COMMON=m
 CONFIG_NET_DSA_TAG_DSA=m
 CONFIG_NET_DSA_TAG_EDSA=m
 CONFIG_NET_DSA_TAG_MTK=m
@@ -1656,9 +1668,7 @@ CONFIG_BATMAN_ADV_BLA=y
 CONFIG_BATMAN_ADV_DAT=y
 CONFIG_BATMAN_ADV_NC=y
 CONFIG_BATMAN_ADV_MCAST=y
-# CONFIG_BATMAN_ADV_DEBUGFS is not set
 CONFIG_BATMAN_ADV_DEBUG=y
-CONFIG_BATMAN_ADV_SYSFS=y
 CONFIG_OPENVSWITCH=m
 CONFIG_OPENVSWITCH_GRE=m
 CONFIG_OPENVSWITCH_VXLAN=m
@@ -1749,6 +1759,7 @@ CONFIG_CAN_CC770_ISA=m
 CONFIG_CAN_CC770_PLATFORM=m
 # CONFIG_CAN_IFI_CANFD is not set
 CONFIG_CAN_M_CAN=m
+CONFIG_CAN_M_CAN_PCI=m
 CONFIG_CAN_M_CAN_PLATFORM=m
 CONFIG_CAN_M_CAN_TCAN4X5X=m
 CONFIG_CAN_PEAK_PCIEFD=m
@@ -1886,8 +1897,6 @@ CONFIG_MAC80211_LEDS=y
 # CONFIG_MAC80211_MESSAGE_TRACING is not set
 # CONFIG_MAC80211_DEBUG_MENU is not set
 CONFIG_MAC80211_STA_HASH_MAX_SIZE=0
-CONFIG_WIMAX=m
-CONFIG_WIMAX_DEBUG_LEVEL=8
 CONFIG_RFKILL=m
 CONFIG_RFKILL_LEDS=y
 CONFIG_RFKILL_INPUT=y
@@ -1938,6 +1947,7 @@ CONFIG_NFC_NXP_NCI=m
 CONFIG_NFC_NXP_NCI_I2C=m
 CONFIG_NFC_S3FWRN5=m
 CONFIG_NFC_S3FWRN5_I2C=m
+CONFIG_NFC_S3FWRN82_UART=m
 CONFIG_NFC_ST95HF=m
 # end of Near Field Communication (NFC) devices
 
@@ -2108,6 +2118,7 @@ CONFIG_SIMPLE_PM_BUS=y
 CONFIG_VEXPRESS_CONFIG=y
 CONFIG_MHI_BUS=m
 # CONFIG_MHI_BUS_DEBUG is not set
+CONFIG_MHI_BUS_PCI_GENERIC=m
 # end of Bus devices
 
 CONFIG_CONNECTOR=m
@@ -2200,12 +2211,9 @@ CONFIG_MTD_PCI=m
 #
 # NAND
 #
-CONFIG_MTD_NAND_CORE=m
+CONFIG_MTD_NAND_CORE=y
 # CONFIG_MTD_ONENAND is not set
-CONFIG_MTD_NAND_ECC_SW_HAMMING=m
-# CONFIG_MTD_NAND_ECC_SW_HAMMING_SMC is not set
 CONFIG_MTD_RAW_NAND=m
-# CONFIG_MTD_NAND_ECC_SW_BCH is not set
 
 #
 # Raw/parallel NAND flash controllers
@@ -2221,6 +2229,8 @@ CONFIG_MTD_NAND_GPIO=m
 CONFIG_MTD_NAND_PLATFORM=m
 CONFIG_MTD_NAND_CADENCE=m
 # CONFIG_MTD_NAND_ARASAN is not set
+CONFIG_MTD_NAND_INTEL_LGM=m
+CONFIG_MTD_NAND_ROCKCHIP=m
 
 #
 # Misc
@@ -2238,6 +2248,9 @@ CONFIG_MTD_SPI_NAND=m
 # ECC engine support
 #
 CONFIG_MTD_NAND_ECC=y
+CONFIG_MTD_NAND_ECC_SW_HAMMING=y
+# CONFIG_MTD_NAND_ECC_SW_HAMMING_SMC is not set
+# CONFIG_MTD_NAND_ECC_SW_BCH is not set
 # end of ECC engine support
 # end of NAND
 
@@ -2249,6 +2262,9 @@ CONFIG_MTD_NAND_ECC=y
 
 CONFIG_MTD_SPI_NOR=y
 CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y
+# CONFIG_MTD_SPI_NOR_SWP_DISABLE is not set
+CONFIG_MTD_SPI_NOR_SWP_DISABLE_ON_VOLATILE=y
+# CONFIG_MTD_SPI_NOR_SWP_KEEP is not set
 # CONFIG_MTD_UBI is not set
 CONFIG_MTD_HYPERBUS=m
 CONFIG_HBMC_AM654=m
@@ -2279,6 +2295,13 @@ CONFIG_BLK_DEV=y
 CONFIG_CDROM=m
 # CONFIG_BLK_DEV_PCIESSD_MTIP32XX is not set
 CONFIG_ZRAM=m
+CONFIG_ZRAM_DEF_COMP_LZORLE=y
+# CONFIG_ZRAM_DEF_COMP_ZSTD is not set
+# CONFIG_ZRAM_DEF_COMP_LZ4 is not set
+# CONFIG_ZRAM_DEF_COMP_LZO is not set
+# CONFIG_ZRAM_DEF_COMP_LZ4HC is not set
+# CONFIG_ZRAM_DEF_COMP_842 is not set
+CONFIG_ZRAM_DEF_COMP="lzo-rle"
 CONFIG_ZRAM_WRITEBACK=y
 # CONFIG_ZRAM_MEMORY_TRACKING is not set
 CONFIG_BLK_DEV_UMEM=m
@@ -2613,6 +2636,7 @@ CONFIG_DM_MULTIPATH=m
 CONFIG_DM_MULTIPATH_QL=m
 CONFIG_DM_MULTIPATH_ST=m
 # CONFIG_DM_MULTIPATH_HST is not set
+CONFIG_DM_MULTIPATH_IOA=m
 CONFIG_DM_DELAY=m
 CONFIG_DM_DUST=m
 CONFIG_DM_UEVENT=y
@@ -2677,6 +2701,7 @@ CONFIG_VETH=m
 CONFIG_VIRTIO_NET=y
 CONFIG_NLMON=m
 CONFIG_NET_VRF=m
+CONFIG_MHI_NET=m
 # CONFIG_ARCNET is not set
 CONFIG_ATM_DRIVERS=y
 CONFIG_ATM_DUMMY=m
@@ -2713,6 +2738,7 @@ CONFIG_B53_SRAB_DRIVER=m
 CONFIG_B53_SERDES=m
 CONFIG_NET_DSA_BCM_SF2=m
 CONFIG_NET_DSA_LOOP=m
+CONFIG_NET_DSA_HIRSCHMANN_HELLCREEK=m
 CONFIG_NET_DSA_LANTIQ_GSWIP=m
 CONFIG_NET_DSA_MT7530=m
 CONFIG_NET_DSA_MV88E6060=m
@@ -3124,8 +3150,8 @@ CONFIG_USB_SIERRA_NET=m
 CONFIG_USB_VL600=m
 CONFIG_USB_NET_CH9200=m
 CONFIG_USB_NET_AQC111=m
+# CONFIG_USB_RTL8153_ECM is not set
 CONFIG_WLAN=y
-CONFIG_WIRELESS_WDS=y
 # CONFIG_WLAN_VENDOR_ADMTEK is not set
 CONFIG_ATH_COMMON=m
 CONFIG_WLAN_VENDOR_ATH=y
@@ -3370,15 +3396,6 @@ CONFIG_QTNFMAC_PCIE=m
 CONFIG_MAC80211_HWSIM=m
 CONFIG_USB_NET_RNDIS_WLAN=m
 CONFIG_VIRT_WIFI=m
-
-#
-# WiMAX Wireless Broadband devices
-#
-CONFIG_WIMAX_I2400M=m
-CONFIG_WIMAX_I2400M_USB=m
-CONFIG_WIMAX_I2400M_DEBUG_LEVEL=8
-# end of WiMAX Wireless Broadband devices
-
 # CONFIG_WAN is not set
 CONFIG_IEEE802154_DRIVERS=m
 CONFIG_IEEE802154_FAKELB=m
@@ -3408,7 +3425,6 @@ CONFIG_NET_FAILOVER=y
 CONFIG_INPUT=y
 CONFIG_INPUT_LEDS=y
 CONFIG_INPUT_FF_MEMLESS=y
-CONFIG_INPUT_POLLDEV=m
 # CONFIG_INPUT_SPARSEKMAP is not set
 CONFIG_INPUT_MATRIXKMAP=y
 
@@ -3657,6 +3673,7 @@ CONFIG_INPUT_PCF50633_PMU=m
 # CONFIG_INPUT_PWM_VIBRA is not set
 # CONFIG_INPUT_RK805_PWRKEY is not set
 # CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set
+CONFIG_INPUT_DA7280_HAPTICS=m
 CONFIG_INPUT_DA9052_ONKEY=m
 CONFIG_INPUT_DA9055_ONKEY=m
 CONFIG_INPUT_DA9063_ONKEY=m
@@ -3767,6 +3784,7 @@ CONFIG_SERIAL_SC16IS7XX_CORE=m
 CONFIG_SERIAL_SC16IS7XX=m
 CONFIG_SERIAL_SC16IS7XX_I2C=y
 CONFIG_SERIAL_SC16IS7XX_SPI=y
+CONFIG_SERIAL_BCM63XX=m
 CONFIG_SERIAL_ALTERA_JTAGUART=m
 CONFIG_SERIAL_ALTERA_UART=m
 CONFIG_SERIAL_ALTERA_UART_MAXPORTS=4
@@ -3782,6 +3800,8 @@ CONFIG_SERIAL_FSL_LPUART=m
 CONFIG_SERIAL_FSL_LINFLEXUART=m
 CONFIG_SERIAL_CONEXANT_DIGICOLOR=m
 CONFIG_SERIAL_SPRD=m
+CONFIG_SERIAL_LITEUART=m
+CONFIG_SERIAL_LITEUART_MAX_PORTS=1
 # end of Serial drivers
 
 CONFIG_SERIAL_MCTRL_GPIO=y
@@ -3791,7 +3811,6 @@ CONFIG_CYCLADES=m
 # CONFIG_CYZ_INTR is not set
 CONFIG_MOXA_INTELLIO=m
 CONFIG_MOXA_SMARTIO=m
-CONFIG_SYNCLINKMP=m
 CONFIG_SYNCLINK_GT=m
 CONFIG_ISI=m
 CONFIG_N_HDLC=m
@@ -3824,7 +3843,6 @@ CONFIG_HW_RANDOM=y
 CONFIG_HW_RANDOM_TIMERIOMEM=m
 CONFIG_HW_RANDOM_BA431=m
 CONFIG_HW_RANDOM_VIRTIO=m
-CONFIG_HW_RANDOM_HISI_V2=m
 CONFIG_HW_RANDOM_MESON=m
 CONFIG_HW_RANDOM_CAVIUM=m
 CONFIG_HW_RANDOM_OPTEE=m
@@ -3970,6 +3988,7 @@ CONFIG_I2C_SLAVE_TESTUNIT=m
 CONFIG_I3C=m
 CONFIG_CDNS_I3C_MASTER=m
 CONFIG_DW_I3C_MASTER=m
+CONFIG_MIPI_I3C_HCI=m
 CONFIG_SPI=y
 # CONFIG_SPI_DEBUG is not set
 CONFIG_SPI_MASTER=y
@@ -4057,6 +4076,7 @@ CONFIG_DP83640_PHY=m
 CONFIG_PTP_1588_CLOCK_INES=m
 CONFIG_PTP_1588_CLOCK_IDT82P33=m
 CONFIG_PTP_1588_CLOCK_IDTCM=m
+CONFIG_PTP_1588_CLOCK_OCP=m
 # end of PTP clock support
 
 CONFIG_PINCTRL=y
@@ -4081,6 +4101,7 @@ CONFIG_PINCTRL_MAX77620=y
 CONFIG_PINCTRL_PALMAS=m
 # CONFIG_PINCTRL_RK805 is not set
 # CONFIG_PINCTRL_OCELOT is not set
+# CONFIG_PINCTRL_MICROCHIP_SGPIO is not set
 
 #
 # Renesas pinctrl drivers
@@ -4125,6 +4146,7 @@ CONFIG_GPIO_EXAR=m
 # CONFIG_GPIO_FTGPIO010 is not set
 CONFIG_GPIO_GENERIC_PLATFORM=y
 # CONFIG_GPIO_GRGPIO is not set
+CONFIG_GPIO_HISI=m
 CONFIG_GPIO_HLWD=m
 CONFIG_GPIO_LOGICVC=m
 CONFIG_GPIO_MB86S7X=m
@@ -4211,8 +4233,13 @@ CONFIG_GPIO_XRA1403=m
 CONFIG_GPIO_VIPERBOARD=m
 # end of USB GPIO expanders
 
+#
+# Virtual GPIO drivers
+#
 CONFIG_GPIO_AGGREGATOR=m
 CONFIG_GPIO_MOCKUP=m
+# end of Virtual GPIO drivers
+
 CONFIG_W1=m
 CONFIG_W1_CON=y
 
@@ -4259,6 +4286,7 @@ CONFIG_POWER_RESET_BRCMSTB=y
 # CONFIG_POWER_RESET_GPIO_RESTART is not set
 # CONFIG_POWER_RESET_LTC2952 is not set
 # CONFIG_POWER_RESET_MT6323 is not set
+# CONFIG_POWER_RESET_REGULATOR is not set
 CONFIG_POWER_RESET_RESTART=y
 CONFIG_POWER_RESET_VEXPRESS=y
 CONFIG_POWER_RESET_XGENE=y
@@ -4369,6 +4397,7 @@ CONFIG_SENSORS_ARM_SCPI=m
 CONFIG_SENSORS_ASPEED=m
 CONFIG_SENSORS_ATXP1=m
 CONFIG_SENSORS_CORSAIR_CPRO=m
+CONFIG_SENSORS_CORSAIR_PSU=m
 CONFIG_SENSORS_DRIVETEMP=m
 CONFIG_SENSORS_DS620=m
 CONFIG_SENSORS_DS1621=m
@@ -4399,6 +4428,7 @@ CONFIG_SENSORS_LTC2947=m
 CONFIG_SENSORS_LTC2947_I2C=m
 CONFIG_SENSORS_LTC2947_SPI=m
 CONFIG_SENSORS_LTC2990=m
+CONFIG_SENSORS_LTC2992=m
 CONFIG_SENSORS_LTC4151=m
 CONFIG_SENSORS_LTC4215=m
 CONFIG_SENSORS_LTC4222=m
@@ -4406,6 +4436,7 @@ CONFIG_SENSORS_LTC4245=m
 CONFIG_SENSORS_LTC4260=m
 CONFIG_SENSORS_LTC4261=m
 CONFIG_SENSORS_MAX1111=m
+CONFIG_SENSORS_MAX127=m
 CONFIG_SENSORS_MAX16065=m
 CONFIG_SENSORS_MAX1619=m
 CONFIG_SENSORS_MAX1668=m
@@ -4473,7 +4504,9 @@ CONFIG_SENSORS_MAX31785=m
 CONFIG_SENSORS_MAX34440=m
 CONFIG_SENSORS_MAX8688=m
 CONFIG_SENSORS_MP2975=m
+CONFIG_SENSORS_PM6764TR=m
 CONFIG_SENSORS_PXE1610=m
+CONFIG_SENSORS_Q54SJ108A2=m
 CONFIG_SENSORS_TPS40422=m
 CONFIG_SENSORS_TPS53679=m
 CONFIG_SENSORS_UCD9000=m
@@ -4481,6 +4514,7 @@ CONFIG_SENSORS_UCD9200=m
 CONFIG_SENSORS_XDPE122=m
 CONFIG_SENSORS_ZL6100=m
 CONFIG_SENSORS_PWM_FAN=m
+CONFIG_SENSORS_SBTSI=m
 CONFIG_SENSORS_SHT15=m
 CONFIG_SENSORS_SHT21=m
 CONFIG_SENSORS_SHT3x=m
@@ -4691,6 +4725,7 @@ CONFIG_HTC_PASIC3=m
 CONFIG_HTC_I2CPLD=y
 CONFIG_LPC_ICH=m
 CONFIG_LPC_SCH=m
+CONFIG_MFD_INTEL_PMT=m
 CONFIG_MFD_IQS62X=m
 CONFIG_MFD_JANZ_CMODIO=m
 CONFIG_MFD_KEMPLD=m
@@ -4802,6 +4837,7 @@ CONFIG_REGULATOR_AAT2870=m
 CONFIG_REGULATOR_AB3100=m
 CONFIG_REGULATOR_ARIZONA_LDO1=m
 CONFIG_REGULATOR_ARIZONA_MICSUPP=m
+CONFIG_REGULATOR_ARM_SCMI=m
 CONFIG_REGULATOR_AS3711=m
 CONFIG_REGULATOR_AS3722=m
 CONFIG_REGULATOR_AXP20X=m
@@ -4815,6 +4851,7 @@ CONFIG_REGULATOR_DA9052=m
 CONFIG_REGULATOR_DA9055=m
 CONFIG_REGULATOR_DA9062=m
 CONFIG_REGULATOR_DA9063=m
+CONFIG_REGULATOR_DA9121=m
 CONFIG_REGULATOR_DA9210=m
 CONFIG_REGULATOR_DA9211=m
 CONFIG_REGULATOR_FAN53555=y
@@ -4866,6 +4903,7 @@ CONFIG_REGULATOR_MT6360=m
 CONFIG_REGULATOR_PCA9450=m
 # CONFIG_REGULATOR_PCAP is not set
 # CONFIG_REGULATOR_PCF50633 is not set
+CONFIG_REGULATOR_PF8X00=m
 CONFIG_REGULATOR_PFUZE100=y
 # CONFIG_REGULATOR_PV88060 is not set
 # CONFIG_REGULATOR_PV88080 is not set
@@ -5318,12 +5356,14 @@ CONFIG_VIDEO_CADENCE_CSI2RX=m
 CONFIG_VIDEO_CADENCE_CSI2TX=m
 CONFIG_VIDEO_ASPEED=m
 CONFIG_VIDEO_MUX=m
+CONFIG_VIDEO_ROCKCHIP_ISP1=m
 CONFIG_VIDEO_XILINX=m
 CONFIG_VIDEO_XILINX_CSI2RXSS=m
 CONFIG_VIDEO_XILINX_TPG=m
 CONFIG_VIDEO_XILINX_VTC=m
 CONFIG_V4L_MEM2MEM_DRIVERS=y
 CONFIG_VIDEO_MEM2MEM_DEINTERLACE=m
+CONFIG_VIDEO_MESON_GE2D=m
 CONFIG_VIDEO_ROCKCHIP_RGA=m
 CONFIG_DVB_PLATFORM_DRIVERS=y
 CONFIG_SDR_PLATFORM_DRIVERS=y
@@ -5463,7 +5503,7 @@ CONFIG_VIDEO_ST_MIPID02=m
 # Camera sensor devices
 #
 CONFIG_VIDEO_APTINA_PLL=m
-CONFIG_VIDEO_SMIAPP_PLL=m
+CONFIG_VIDEO_CCS_PLL=m
 CONFIG_VIDEO_HI556=m
 CONFIG_VIDEO_IMX214=m
 CONFIG_VIDEO_IMX219=m
@@ -5472,6 +5512,7 @@ CONFIG_VIDEO_IMX274=m
 CONFIG_VIDEO_IMX290=m
 CONFIG_VIDEO_IMX319=m
 CONFIG_VIDEO_IMX355=m
+CONFIG_VIDEO_OV02A10=m
 CONFIG_VIDEO_OV2640=m
 CONFIG_VIDEO_OV2659=m
 CONFIG_VIDEO_OV2680=m
@@ -5492,6 +5533,7 @@ CONFIG_VIDEO_OV7740=m
 CONFIG_VIDEO_OV8856=m
 CONFIG_VIDEO_OV9640=m
 CONFIG_VIDEO_OV9650=m
+CONFIG_VIDEO_OV9734=m
 CONFIG_VIDEO_OV13858=m
 CONFIG_VIDEO_VS6624=m
 CONFIG_VIDEO_MT9M001=m
@@ -5512,7 +5554,7 @@ CONFIG_VIDEO_S5K6AA=m
 CONFIG_VIDEO_S5K6A3=m
 CONFIG_VIDEO_S5K4ECGX=m
 CONFIG_VIDEO_S5K5BAF=m
-CONFIG_VIDEO_SMIAPP=m
+CONFIG_VIDEO_CCS=m
 CONFIG_VIDEO_ET8EK8=m
 CONFIG_VIDEO_S5C73M3=m
 # end of Camera sensor devices
@@ -5781,7 +5823,6 @@ CONFIG_DRM_FBDEV_OVERALLOC=100
 # CONFIG_DRM_LOAD_EDID_FIRMWARE is not set
 CONFIG_DRM_DP_CEC=y
 CONFIG_DRM_TTM=m
-CONFIG_DRM_TTM_DMA_PAGE_POOL=y
 CONFIG_DRM_VRAM_HELPER=m
 CONFIG_DRM_TTM_HELPER=m
 CONFIG_DRM_GEM_CMA_HELPER=y
@@ -5826,6 +5867,7 @@ CONFIG_DRM_PANEL=y
 #
 # Display Panels
 #
+CONFIG_DRM_PANEL_ABT_Y030XX067A=m
 CONFIG_DRM_PANEL_ARM_VERSATILE=m
 # CONFIG_DRM_PANEL_ASUS_Z00T_TM5P5_NT35596 is not set
 CONFIG_DRM_PANEL_BOE_HIMAX8279D=m
@@ -5847,6 +5889,7 @@ CONFIG_DRM_PANEL_LG_LB035Q02=m
 # CONFIG_DRM_PANEL_LG_LG4573 is not set
 CONFIG_DRM_PANEL_NEC_NL8048HL11=m
 CONFIG_DRM_PANEL_NOVATEK_NT35510=m
+CONFIG_DRM_PANEL_NOVATEK_NT36672A=m
 CONFIG_DRM_PANEL_NOVATEK_NT39016=m
 CONFIG_DRM_PANEL_MANTIX_MLAF057WE51=m
 CONFIG_DRM_PANEL_OLIMEX_LCD_OLINUXINO=m
@@ -5863,6 +5906,7 @@ CONFIG_DRM_PANEL_SAMSUNG_S6E63J0X03=m
 # CONFIG_DRM_PANEL_SAMSUNG_S6E63M0 is not set
 CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS452EF01=m
 # CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set
+CONFIG_DRM_PANEL_SAMSUNG_SOFEF00=m
 CONFIG_DRM_PANEL_SEIKO_43WVF1G=m
 CONFIG_DRM_PANEL_SHARP_LQ101R1SX01=m
 CONFIG_DRM_PANEL_SHARP_LS037V7DW01=m
@@ -5872,6 +5916,7 @@ CONFIG_DRM_PANEL_SITRONIX_ST7703=m
 # CONFIG_DRM_PANEL_SITRONIX_ST7789V is not set
 CONFIG_DRM_PANEL_SONY_ACX424AKP=m
 CONFIG_DRM_PANEL_SONY_ACX565AKM=m
+CONFIG_DRM_PANEL_TDO_TL070WSH30=m
 CONFIG_DRM_PANEL_TPO_TD028TTEC1=m
 CONFIG_DRM_PANEL_TPO_TD043MTEA1=m
 CONFIG_DRM_PANEL_TPO_TPG110=m
@@ -5890,6 +5935,7 @@ CONFIG_DRM_CDNS_DSI=m
 # CONFIG_DRM_CHRONTEL_CH7033 is not set
 CONFIG_DRM_DISPLAY_CONNECTOR=m
 CONFIG_DRM_LONTIUM_LT9611=m
+CONFIG_DRM_LONTIUM_LT9611UXC=m
 CONFIG_DRM_LVDS_CODEC=m
 # CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW is not set
 CONFIG_DRM_NWL_MIPI_DSI=m
@@ -5912,6 +5958,7 @@ CONFIG_DRM_TI_TPD12S015=m
 CONFIG_DRM_ANALOGIX_ANX6345=m
 CONFIG_DRM_ANALOGIX_ANX78XX=m
 CONFIG_DRM_ANALOGIX_DP=m
+CONFIG_DRM_ANALOGIX_ANX7625=m
 # CONFIG_DRM_I2C_ADV7511 is not set
 CONFIG_DRM_CDNS_MHDP8546=m
 CONFIG_DRM_DW_HDMI=m
@@ -6215,6 +6262,9 @@ CONFIG_SND_USB_VARIAX=m
 CONFIG_SND_SOC=m
 CONFIG_SND_SOC_AC97_BUS=y
 CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y
+CONFIG_SND_SOC_ADI=m
+CONFIG_SND_SOC_ADI_AXI_I2S=m
+CONFIG_SND_SOC_ADI_AXI_SPDIF=m
 # CONFIG_SND_SOC_AMD_ACP is not set
 # CONFIG_SND_ATMEL_SOC is not set
 CONFIG_SND_BCM63XX_I2S_WHISTLER=m
@@ -6235,6 +6285,7 @@ CONFIG_SND_SOC_FSL_AUDMIX=m
 # CONFIG_SND_SOC_FSL_SPDIF is not set
 # CONFIG_SND_SOC_FSL_ESAI is not set
 CONFIG_SND_SOC_FSL_MICFIL=m
+CONFIG_SND_SOC_FSL_XCVR=m
 # CONFIG_SND_SOC_IMX_AUDMUX is not set
 # end of SoC Audio for Freescale CPUs
 
@@ -6292,6 +6343,9 @@ CONFIG_SND_SOC_I2C_AND_SPI=m
 #
 CONFIG_SND_SOC_AC97_CODEC=m
 CONFIG_SND_SOC_ADAU_UTILS=m
+CONFIG_SND_SOC_ADAU1372=m
+CONFIG_SND_SOC_ADAU1372_I2C=m
+CONFIG_SND_SOC_ADAU1372_SPI=m
 CONFIG_SND_SOC_ADAU1701=m
 CONFIG_SND_SOC_ADAU17X1=m
 CONFIG_SND_SOC_ADAU1761=m
@@ -6377,6 +6431,7 @@ CONFIG_SND_SOC_PCM3060_SPI=m
 CONFIG_SND_SOC_PCM3168A=m
 CONFIG_SND_SOC_PCM3168A_I2C=m
 CONFIG_SND_SOC_PCM3168A_SPI=m
+CONFIG_SND_SOC_PCM5102A=m
 CONFIG_SND_SOC_PCM512x=m
 CONFIG_SND_SOC_PCM512x_I2C=m
 CONFIG_SND_SOC_PCM512x_SPI=m
@@ -6392,6 +6447,7 @@ CONFIG_SND_SOC_SIGMADSP=m
 CONFIG_SND_SOC_SIGMADSP_I2C=m
 CONFIG_SND_SOC_SIGMADSP_REGMAP=m
 CONFIG_SND_SOC_SIMPLE_AMPLIFIER=m
+CONFIG_SND_SOC_SIMPLE_MUX=m
 CONFIG_SND_SOC_SIRF_AUDIO_CODEC=m
 CONFIG_SND_SOC_SPDIF=m
 CONFIG_SND_SOC_SSM2305=m
@@ -6455,11 +6511,14 @@ CONFIG_SND_SOC_MAX9759=m
 CONFIG_SND_SOC_MT6351=m
 CONFIG_SND_SOC_MT6358=m
 CONFIG_SND_SOC_MT6660=m
+CONFIG_SND_SOC_NAU8315=m
 CONFIG_SND_SOC_NAU8540=m
 CONFIG_SND_SOC_NAU8810=m
 CONFIG_SND_SOC_NAU8822=m
 CONFIG_SND_SOC_NAU8824=m
 CONFIG_SND_SOC_TPA6130A2=m
+CONFIG_SND_SOC_LPASS_WSA_MACRO=m
+CONFIG_SND_SOC_LPASS_VA_MACRO=m
 # end of CODEC drivers
 
 CONFIG_SND_SIMPLE_CARD_UTILS=m
@@ -6813,7 +6872,6 @@ CONFIG_USB_SERIAL_SIERRAWIRELESS=m
 CONFIG_USB_SERIAL_SYMBOL=m
 CONFIG_USB_SERIAL_TI=m
 CONFIG_USB_SERIAL_CYBERJACK=m
-CONFIG_USB_SERIAL_XIRCOM=m
 CONFIG_USB_SERIAL_WWAN=m
 CONFIG_USB_SERIAL_OPTION=m
 CONFIG_USB_SERIAL_OMNINET=m
@@ -7137,6 +7195,10 @@ CONFIG_LEDS_USER=y
 # CONFIG_LEDS_TI_LMU_COMMON is not set
 CONFIG_LEDS_TPS6105X=m
 
+#
+# Flash and Torch LED drivers
+#
+
 #
 # LED Triggers
 #
@@ -7257,7 +7319,6 @@ CONFIG_RTC_DRV_DS1390=m
 CONFIG_RTC_DRV_MAX6916=m
 CONFIG_RTC_DRV_R9701=m
 CONFIG_RTC_DRV_RX4581=m
-CONFIG_RTC_DRV_RX6110=m
 CONFIG_RTC_DRV_RS5C348=m
 CONFIG_RTC_DRV_MAX6902=m
 CONFIG_RTC_DRV_PCF2123=m
@@ -7272,6 +7333,7 @@ CONFIG_RTC_DRV_DS3232_HWMON=y
 CONFIG_RTC_DRV_PCF2127=m
 CONFIG_RTC_DRV_RV3029C2=m
 CONFIG_RTC_DRV_RV3029_HWMON=y
+CONFIG_RTC_DRV_RX6110=m
 
 #
 # Platform RTC drivers
@@ -7319,6 +7381,7 @@ CONFIG_RTC_DRV_CPCAP=m
 # HID Sensor RTC drivers
 #
 CONFIG_RTC_DRV_HID_SENSOR_TIME=m
+CONFIG_RTC_DRV_GOLDFISH=m
 CONFIG_DMADEVICES=y
 # CONFIG_DMADEVICES_DEBUG is not set
 
@@ -7403,6 +7466,7 @@ CONFIG_VIRTIO_MMIO=y
 CONFIG_VIRTIO_DMA_SHARED_BUFFER=m
 CONFIG_VDPA=m
 CONFIG_VDPA_SIM=m
+CONFIG_VDPA_SIM_NET=m
 CONFIG_IFCVF=m
 CONFIG_VHOST_IOTLB=m
 CONFIG_VHOST_RING=m
@@ -7530,7 +7594,6 @@ CONFIG_VIDEO_ZORAN_DC10=m
 CONFIG_VIDEO_ZORAN_LML33=m
 CONFIG_VIDEO_ZORAN_LML33R10=m
 CONFIG_VIDEO_ZORAN_AVS6EYES=m
-CONFIG_VIDEO_ROCKCHIP_ISP1=m
 
 #
 # Android
@@ -7594,6 +7657,11 @@ CONFIG_XIL_AXIS_FIFO=m
 # CONFIG_FIELDBUS_DEV is not set
 # CONFIG_KPC2000 is not set
 # CONFIG_QLGE is not set
+CONFIG_WIMAX=m
+CONFIG_WIMAX_DEBUG_LEVEL=8
+CONFIG_WIMAX_I2400M=m
+CONFIG_WIMAX_I2400M_USB=m
+CONFIG_WIMAX_I2400M_DEBUG_LEVEL=8
 # CONFIG_WFX is not set
 CONFIG_SPMI_HISI3670=m
 CONFIG_MFD_HI6421_SPMI=m
@@ -7617,6 +7685,11 @@ CONFIG_CROS_EC_TYPEC=m
 CONFIG_CROS_USBPD_LOGGER=m
 CONFIG_CROS_USBPD_NOTIFY=m
 # CONFIG_MELLANOX_PLATFORM is not set
+CONFIG_SURFACE_PLATFORMS=y
+CONFIG_SURFACE_3_BUTTON=m
+# CONFIG_SURFACE_3_POWER_OPREGION is not set
+CONFIG_SURFACE_GPE=m
+CONFIG_SURFACE_PRO3_BUTTON=m
 CONFIG_HAVE_CLK=y
 CONFIG_CLKDEV_LOOKUP=y
 CONFIG_HAVE_CLK_PREPARE=y
@@ -7637,7 +7710,6 @@ CONFIG_COMMON_CLK_SI544=m
 CONFIG_COMMON_CLK_CS2000_CP=y
 CONFIG_COMMON_CLK_S2MPS11=y
 CONFIG_CLK_TWL6040=m
-CONFIG_CLK_QORIQ=y
 CONFIG_COMMON_CLK_XGENE=y
 CONFIG_COMMON_CLK_PALMAS=m
 CONFIG_COMMON_CLK_PWM=y
@@ -7666,11 +7738,6 @@ CONFIG_COMMON_CLK_G12A=y
 
 CONFIG_COMMON_CLK_ROCKCHIP=y
 CONFIG_CLK_PX30=y
-CONFIG_CLK_RV110X=y
-CONFIG_CLK_RK3036=y
-CONFIG_CLK_RK312X=y
-CONFIG_CLK_RK3188=y
-CONFIG_CLK_RK322X=y
 CONFIG_CLK_RK3308=y
 CONFIG_CLK_RK3328=y
 CONFIG_CLK_RK3368=y
@@ -7696,6 +7763,7 @@ CONFIG_ARM64_ERRATUM_858921=y
 
 CONFIG_MAILBOX=y
 CONFIG_ARM_MHU=y
+CONFIG_ARM_MHU_V2=m
 CONFIG_PLATFORM_MHU=y
 # CONFIG_PL320_MBOX is not set
 # CONFIG_ROCKCHIP_MBOX is not set
@@ -7738,6 +7806,7 @@ CONFIG_ARM_SMMU_V3=y
 #
 CONFIG_RPMSG=y
 # CONFIG_RPMSG_CHAR is not set
+CONFIG_RPMSG_NS=m
 CONFIG_RPMSG_QCOM_GLINK=y
 CONFIG_RPMSG_QCOM_GLINK_RPM=y
 # CONFIG_RPMSG_VIRTIO is not set
@@ -7758,14 +7827,8 @@ CONFIG_MESON_GX_SOCINFO=y
 CONFIG_MESON_GX_PM_DOMAINS=y
 CONFIG_MESON_EE_PM_DOMAINS=y
 CONFIG_MESON_SECURE_PM_DOMAINS=y
-CONFIG_MESON_MX_SOCINFO=y
 # end of Amlogic SoC drivers
 
-#
-# Aspeed SoC drivers
-#
-# end of Aspeed SoC drivers
-
 #
 # Broadcom SoC drivers
 #
@@ -7784,6 +7847,13 @@ CONFIG_SOC_BRCMSTB=y
 #
 # end of i.MX SoC drivers
 
+#
+# Enable LiteX SoC Builder specific drivers
+#
+CONFIG_LITEX=y
+CONFIG_LITEX_SOC_CONTROLLER=m
+# end of Enable LiteX SoC Builder specific drivers
+
 #
 # Qualcomm SoC drivers
 #
@@ -7838,6 +7908,7 @@ CONFIG_EXTCON_PTN5150=m
 # CONFIG_EXTCON_SM5502 is not set
 CONFIG_EXTCON_USB_GPIO=y
 # CONFIG_EXTCON_USBC_CROS_EC is not set
+CONFIG_EXTCON_USBC_TUSB320=m
 CONFIG_MEMORY=y
 # CONFIG_ARM_PL172_MPMC is not set
 CONFIG_IIO=y
@@ -7953,6 +8024,7 @@ CONFIG_MAX9611=m
 CONFIG_MCP320X=m
 CONFIG_MCP3422=m
 CONFIG_MCP3911=m
+CONFIG_MEDIATEK_MT6360_ADC=m
 CONFIG_MESON_SARADC=m
 CONFIG_MP2629_ADC=m
 # CONFIG_NAU7802 is not set
@@ -8384,7 +8456,9 @@ CONFIG_MAX31856=m
 CONFIG_PWM=y
 CONFIG_PWM_SYSFS=y
 # CONFIG_PWM_DEBUG is not set
+CONFIG_PWM_ATMEL_TCB=m
 # CONFIG_PWM_CROS_EC is not set
+CONFIG_PWM_DWC=m
 # CONFIG_PWM_FSL_FTM is not set
 CONFIG_PWM_GPIO=m
 CONFIG_PWM_IQS620A=m
@@ -8427,13 +8501,13 @@ CONFIG_RESET_SCMI=y
 CONFIG_GENERIC_PHY=y
 CONFIG_GENERIC_PHY_MIPI_DPHY=y
 CONFIG_PHY_XGENE=y
-CONFIG_USB_LGM_PHY=m
 CONFIG_PHY_MESON8B_USB2=y
 CONFIG_PHY_MESON_GXL_USB2=y
 CONFIG_PHY_MESON_G12A_USB2=y
 CONFIG_PHY_MESON_G12A_USB3_PCIE=y
 CONFIG_PHY_MESON_AXG_PCIE=y
 CONFIG_PHY_MESON_AXG_MIPI_PCIE_ANALOG=y
+CONFIG_PHY_MESON_AXG_MIPI_DPHY=m
 # CONFIG_BCM_KONA_USB2_PHY is not set
 CONFIG_PHY_CADENCE_TORRENT=m
 # CONFIG_PHY_CADENCE_DPHY is not set
@@ -8475,12 +8549,14 @@ CONFIG_ARM_PMU_ACPI=y
 # CONFIG_ARM_SMMU_V3_PMU is not set
 # CONFIG_ARM_DSU_PMU is not set
 # CONFIG_ARM_SPE_PMU is not set
+CONFIG_ARM_DMC620_PMU=m
 CONFIG_HISI_PMU=y
 # end of Performance monitor support
 
 CONFIG_RAS=y
 CONFIG_USB4=m
 # CONFIG_USB4_DEBUGFS_WRITE is not set
+CONFIG_USB4_DMA_TEST=m
 
 #
 # Android
@@ -8765,6 +8841,7 @@ CONFIG_ROMFS_BACKED_BY_BLOCK=y
 # CONFIG_ROMFS_BACKED_BY_BOTH is not set
 CONFIG_ROMFS_ON_BLOCK=y
 CONFIG_PSTORE=y
+CONFIG_PSTORE_DEFAULT_KMSG_BYTES=10240
 CONFIG_PSTORE_DEFLATE_COMPRESS=y
 # CONFIG_PSTORE_LZO_COMPRESS is not set
 # CONFIG_PSTORE_LZ4_COMPRESS is not set
@@ -8793,24 +8870,6 @@ CONFIG_EROFS_FS_XATTR=y
 CONFIG_EROFS_FS_POSIX_ACL=y
 CONFIG_EROFS_FS_SECURITY=y
 # CONFIG_EROFS_FS_ZIP is not set
-CONFIG_AUFS_FS=m
-CONFIG_AUFS_BRANCH_MAX_127=y
-# CONFIG_AUFS_BRANCH_MAX_511 is not set
-# CONFIG_AUFS_BRANCH_MAX_1023 is not set
-# CONFIG_AUFS_BRANCH_MAX_32767 is not set
-CONFIG_AUFS_SBILIST=y
-# CONFIG_AUFS_HNOTIFY is not set
-# CONFIG_AUFS_EXPORT is not set
-# CONFIG_AUFS_XATTR is not set
-# CONFIG_AUFS_FHSM is not set
-# CONFIG_AUFS_RDU is not set
-# CONFIG_AUFS_DIRREN is not set
-# CONFIG_AUFS_SHWH is not set
-# CONFIG_AUFS_BR_RAMFS is not set
-# CONFIG_AUFS_BR_FUSE is not set
-CONFIG_AUFS_BR_HFSPLUS=y
-CONFIG_AUFS_BDEV_LOOP=y
-# CONFIG_AUFS_DEBUG is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=m
 CONFIG_NFS_V2=m
@@ -8870,6 +8929,7 @@ CONFIG_CIFS_DEBUG=y
 # CONFIG_CIFS_DEBUG2 is not set
 # CONFIG_CIFS_DEBUG_DUMP_KEYS is not set
 CONFIG_CIFS_DFS_UPCALL=y
+# CONFIG_CIFS_SWN_UPCALL is not set
 CONFIG_CIFS_FSCACHE=y
 CONFIG_CODA_FS=m
 CONFIG_AFS_FS=m
@@ -9000,6 +9060,7 @@ CONFIG_LOAD_UEFI_KEYS=y
 CONFIG_INTEGRITY_AUDIT=y
 # CONFIG_IMA is not set
 # CONFIG_IMA_KEYRINGS_PERMIT_SIGNED_BY_BUILTIN_OR_SECONDARY is not set
+# CONFIG_IMA_SECURE_AND_OR_TRUSTED_BOOT is not set
 # CONFIG_EVM is not set
 # CONFIG_DEFAULT_SECURITY_SELINUX is not set
 # CONFIG_DEFAULT_SECURITY_SMACK is not set
@@ -9016,6 +9077,10 @@ CONFIG_LSM="lockdown,yama,integrity,apparmor"
 # Memory initialization
 #
 CONFIG_INIT_STACK_NONE=y
+# CONFIG_GCC_PLUGIN_STRUCTLEAK_USER is not set
+# CONFIG_GCC_PLUGIN_STRUCTLEAK_BYREF is not set
+# CONFIG_GCC_PLUGIN_STRUCTLEAK_BYREF_ALL is not set
+# CONFIG_GCC_PLUGIN_STACKLEAK is not set
 CONFIG_INIT_ON_ALLOC_DEFAULT_ON=y
 # CONFIG_INIT_ON_FREE_DEFAULT_ON is not set
 # end of Memory initialization
@@ -9230,6 +9295,7 @@ CONFIG_CRYPTO_DEV_HISI_SEC=m
 CONFIG_CRYPTO_DEV_HISI_QM=m
 CONFIG_CRYPTO_DEV_HISI_ZIP=m
 CONFIG_CRYPTO_DEV_HISI_HPRE=m
+CONFIG_CRYPTO_DEV_HISI_TRNG=m
 CONFIG_CRYPTO_DEV_AMLOGIC_GXL=y
 # CONFIG_CRYPTO_DEV_AMLOGIC_GXL_DEBUG is not set
 CONFIG_ASYMMETRIC_KEY_TYPE=y
@@ -9366,6 +9432,7 @@ CONFIG_CMA_SIZE_SEL_MBYTES=y
 # CONFIG_CMA_SIZE_SEL_MAX is not set
 CONFIG_CMA_ALIGNMENT=8
 # CONFIG_DMA_API_DEBUG is not set
+# CONFIG_DMA_MAP_BENCHMARK is not set
 CONFIG_SGL_ALLOC=y
 CONFIG_CPU_RMAP=y
 CONFIG_DQL=y
@@ -9406,6 +9473,8 @@ CONFIG_SBITMAP=y
 # CONFIG_STRING_SELFTEST is not set
 # end of Library routines
 
+CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y
+
 #
 # Kernel hacking
 #
@@ -9429,7 +9498,6 @@ CONFIG_DEBUG_BUGVERBOSE=y
 # Compile-time checks and compiler options
 #
 # CONFIG_DEBUG_INFO is not set
-CONFIG_ENABLE_MUST_CHECK=y
 CONFIG_FRAME_WARN=1024
 # CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_READABLE_ASM is not set
@@ -9584,7 +9652,6 @@ CONFIG_TRACE_CLOCK=y
 CONFIG_TRACING_SUPPORT=y
 # CONFIG_FTRACE is not set
 # CONFIG_SAMPLES is not set
-CONFIG_ARCH_HAS_DEVMEM_IS_ALLOWED=y
 CONFIG_STRICT_DEVMEM=y
 # CONFIG_IO_STRICT_DEVMEM is not set
 
@@ -9643,9 +9710,11 @@ CONFIG_TEST_BLACKHOLE_DEV=m
 # CONFIG_TEST_FIRMWARE is not set
 # CONFIG_TEST_SYSCTL is not set
 CONFIG_BITFIELD_KUNIT=m
+CONFIG_RESOURCE_KUNIT_TEST=m
 CONFIG_SYSCTL_KUNIT_TEST=m
 CONFIG_LIST_KUNIT_TEST=m
 CONFIG_LINEAR_RANGES_TEST=m
+# CONFIG_CMDLINE_KUNIT_TEST is not set
 CONFIG_BITS_TEST=m
 # CONFIG_TEST_UDELAY is not set
 # CONFIG_TEST_STATIC_KEYS is not set

config/sources/families/include/meson64_common.inc

@@ -33,7 +33,7 @@ case $BRANCH in
         ;;
 
         dev)
-		KERNELBRANCH='branch:linux-5.10.y'
+		KERNELBRANCH='branch:linux-5.11.y'
 		KERNELPATCHDIR='meson64-dev'
         ;;
 

patch/kernel/meson64-dev/0001-HACK-set-meson-gx-cma-pool-to-896MB.patch

@@ -0,0 +1,28 @@
+From bb85ad77a67b5216c3dbc7bb9c8368e6d0e9a2d3 Mon Sep 17 00:00:00 2001
+From: chewitt <github@chrishewitt.net>
+Date: Sat, 13 Apr 2019 05:41:51 +0000
+Subject: [PATCH 01/58] HACK: set meson-gx cma pool to 896MB
+
+This change sets the CMA pool to a larger 896MB! value for vdec use
+
+Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
+---
+ arch/arm64/boot/dts/amlogic/meson-gx.dtsi | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
+index 0edd137151f8..797e193af8e3 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
++++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
+@@ -46,7 +46,7 @@ secmon_reserved_alt: secmon@5000000 {
+ 		linux,cma {
+ 			compatible = "shared-dma-pool";
+ 			reusable;
+-			size = <0x0 0x10000000>;
++			size = <0x0 0x38000000>;
+ 			alignment = <0x0 0x400000>;
+ 			linux,cma-default;
+ 		};
+-- 
+2.25.1
+

patch/kernel/meson64-dev/0002-HACK-set-meson-g12-cma-pool-to-896MB.patch

@@ -1,9 +1,9 @@
-From 0190b87a051b588bd2a7845a858e455bc9ff1af5 Mon Sep 17 00:00:00 2001
+From 0e84989008624cb175bb2b8a730309e4b3d3d12e Mon Sep 17 00:00:00 2001
 From: chewitt <github@chrishewitt.net>
 Date: Wed, 14 Aug 2019 19:58:14 +0000
-Subject: [PATCH 060/101] HACK: set meson-g12 cma pool to 896MB
+Subject: [PATCH 02/58] HACK: set meson-g12 cma pool to 896MB
 
-This change sets the CMA pool to a larger 896MB! value for (WIP) vdec use
+This change sets the CMA pool to a larger 896MB! value for vdec use
 
 Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
 ---
@@ -11,10 +11,10 @@ Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
-index 4625bdd08c07..3deace05d345 100644
+index b858c5e43cc8..3a4f20506a61 100644
 --- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
 +++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
-@@ -71,7 +71,7 @@
+@@ -104,7 +104,7 @@ secmon_reserved: secmon@5000000 {
  		linux,cma {
  			compatible = "shared-dma-pool";
  			reusable;
@@ -24,5 +24,5 @@ index 4625bdd08c07..3deace05d345 100644
  			linux,cma-default;
  		};
 -- 
-2.17.1
+2.25.1
 

patch/kernel/meson64-dev/0003-HACK-arm64-fix-Kodi-sysinfo-CPU-information.patch

@@ -0,0 +1,31 @@
+From 3404ba428d2f01d4467c0bf5c8d04b4b479d6320 Mon Sep 17 00:00:00 2001
+From: chewitt <github@chrishewitt.net>
+Date: Sat, 13 Apr 2019 05:45:18 +0000
+Subject: [PATCH 03/58] HACK: arm64: fix Kodi sysinfo CPU information
+
+This allows the CPU information to show in the Kodi sysinfo screen, e.g.
+
+"ARMv8 Processor rev 4 (v81)" on Amlogic devices
+
+Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
+---
+ arch/arm64/kernel/cpuinfo.c | 3 +--
+ 1 file changed, 1 insertion(+), 2 deletions(-)
+
+diff --git a/arch/arm64/kernel/cpuinfo.c b/arch/arm64/kernel/cpuinfo.c
+index 77605aec25fe..d69b4e486098 100644
+--- a/arch/arm64/kernel/cpuinfo.c
++++ b/arch/arm64/kernel/cpuinfo.c
+@@ -148,8 +148,7 @@ static int c_show(struct seq_file *m, void *v)
+ 		 * "processor".  Give glibc what it expects.
+ 		 */
+ 		seq_printf(m, "processor\t: %d\n", i);
+-		if (compat)
+-			seq_printf(m, "model name\t: ARMv8 Processor rev %d (%s)\n",
++		seq_printf(m, "model name\t: ARMv8 Processor rev %d (%s)\n",
+ 				   MIDR_REVISION(midr), COMPAT_ELF_PLATFORM);
+ 
+ 		seq_printf(m, "BogoMIPS\t: %lu.%02lu\n",
+-- 
+2.25.1
+

patch/kernel/meson64-dev/0004-HACK-arm64-dts-meson-gx-add-ATF-BL32-reserved-memory.patch

@@ -0,0 +1,37 @@
+From 403915f89bba1bef487b8a54a8e2c77163f16702 Mon Sep 17 00:00:00 2001
+From: kszaq <kszaquitto@gmail.com>
+Date: Sat, 6 Jul 2019 07:54:44 +0000
+Subject: [PATCH 04/58] HACK: arm64: dts: meson-gx: add ATF BL32 reserved
+ memory region
+
+Vendor firmware/uboot has an additional reserved region for BL32 trusted
+firmware. If a board uses BL32 firmware, booting kernel without knowledge
+of this region would cause an immediate kernel panic on SError Interrupt.
+
+TODO: This should be enabled only for boards actually requiring it.
+
+Signed-off-by: kszaq <kszaquitto@gmail.com>
+---
+ arch/arm64/boot/dts/amlogic/meson-gx.dtsi | 6 ++++++
+ 1 file changed, 6 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
+index 797e193af8e3..cf9eb7c8a6f0 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
++++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
+@@ -43,6 +43,12 @@ secmon_reserved_alt: secmon@5000000 {
+ 			no-map;
+ 		};
+ 
++		/* 32 MiB reserved for ARM Trusted Firmware (BL32) */
++		secmon_reserved_bl32: secmon@5300000 {
++			reg = <0x0 0x05300000 0x0 0x2000000>;
++			no-map;
++		};
++
+ 		linux,cma {
+ 			compatible = "shared-dma-pool";
+ 			reusable;
+-- 
+2.25.1
+

patch/kernel/meson64-dev/0005-HACK-drm-meson-add-YUV422-output-support.patch

@@ -1,22 +1,21 @@
-From 7c58b59ddefcfdc18dad2f938c2699c9113f969d Mon Sep 17 00:00:00 2001
+From 3d8c15d79e8d7499453b067d6b9f99be8bd8e060 Mon Sep 17 00:00:00 2001
 From: Dongjin Kim <tobetter@gmail.com>
 Date: Wed, 29 Jul 2020 04:05:03 +0900
-Subject: [PATCH 32/74] ODROID-N2: drm/meson: Add YUV422 output support
+Subject: [PATCH 05/58] HACK: drm/meson: add YUV422 output support
 
-This patch is to support YUV422 output from the Amlogic Meson SoC
-VPU to the HDMI controller.
+Support YUV422 output from the Amlogic Meson SoC VPU to the HDMI
+controller. This incorrectly fixes the green-line on GX devices.
 
-Change-Id: I03952f0592c7341585e518c3038877926a694329
 Signed-off-by: Dongjin Kim <tobetter@gmail.com>
 ---
  drivers/gpu/drm/meson/meson_dw_hdmi.c | 8 +++++++-
  1 file changed, 7 insertions(+), 1 deletion(-)
 
 diff --git a/drivers/gpu/drm/meson/meson_dw_hdmi.c b/drivers/gpu/drm/meson/meson_dw_hdmi.c
-index 24a12c453095..23a78996849c 100644
+index aad75a22dc33..97d670081824 100644
 --- a/drivers/gpu/drm/meson/meson_dw_hdmi.c
 +++ b/drivers/gpu/drm/meson/meson_dw_hdmi.c
-@@ -702,6 +702,7 @@ dw_hdmi_mode_valid(struct drm_connector *connector,
+@@ -703,6 +703,7 @@ dw_hdmi_mode_valid(struct dw_hdmi *hdmi, void *data,
  
  static const u32 meson_dw_hdmi_out_bus_fmts[] = {
  	MEDIA_BUS_FMT_YUV8_1X24,
@@ -24,7 +23,7 @@ index 24a12c453095..23a78996849c 100644
  	MEDIA_BUS_FMT_UYYVYY8_0_5X24,
  };
  
-@@ -801,7 +802,8 @@ static void meson_venc_hdmi_encoder_mode_set(struct drm_bridge *bridge,
+@@ -802,7 +803,8 @@ static void meson_venc_hdmi_encoder_mode_set(struct drm_bridge *bridge,
  	if (dw_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYYVYY8_0_5X24) {
  		ycrcb_map = VPU_HDMI_OUTPUT_CRYCB;
  		yuv420_mode = true;
@@ -34,7 +33,7 @@ index 24a12c453095..23a78996849c 100644
  
  	/* VENC + VENC-DVI Mode setup */
  	meson_venc_hdmi_mode_set(priv, vic, ycrcb_map, yuv420_mode, mode);
-@@ -813,6 +815,10 @@ static void meson_venc_hdmi_encoder_mode_set(struct drm_bridge *bridge,
+@@ -814,6 +816,10 @@ static void meson_venc_hdmi_encoder_mode_set(struct drm_bridge *bridge,
  		/* Setup YUV420 to HDMI-TX, no 10bit diphering */
  		writel_relaxed(2 | (2 << 2),
  			       priv->io_base + _REG(VPU_HDMI_FMT_CTRL));

patch/kernel/meson64-dev/0006-FROMGIT-media-rc-add-keymap-for-minix-neo-remote.patch

@@ -0,0 +1,117 @@
+From 243388ca15983179fd341ba7e51e883ce3887c7c Mon Sep 17 00:00:00 2001
+From: Christian Hewitt <christianshewitt@gmail.com>
+Date: Tue, 19 Jan 2021 11:55:20 +0000
+Subject: [PATCH 06/58] FROMGIT: media: rc: add keymap for minix-neo remote
+
+Add a keymap and bindings for the simple IR (NEC) remote used with
+Minix 'NEO' branded Android STB devices.
+
+Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
+---
+ .../devicetree/bindings/media/rc.yaml         |  1 +
+ drivers/media/rc/keymaps/Makefile             |  1 +
+ drivers/media/rc/keymaps/rc-minix-neo.c       | 55 +++++++++++++++++++
+ include/media/rc-map.h                        |  1 +
+ 4 files changed, 58 insertions(+)
+ create mode 100644 drivers/media/rc/keymaps/rc-minix-neo.c
+
+diff --git a/Documentation/devicetree/bindings/media/rc.yaml b/Documentation/devicetree/bindings/media/rc.yaml
+index 946441b4e1a5..cbffdd6a470d 100644
+--- a/Documentation/devicetree/bindings/media/rc.yaml
++++ b/Documentation/devicetree/bindings/media/rc.yaml
+@@ -93,6 +93,7 @@ properties:
+       - rc-medion-x10
+       - rc-medion-x10-digitainer
+       - rc-medion-x10-or2x
++      - rc-minix-neo
+       - rc-msi-digivox-ii
+       - rc-msi-digivox-iii
+       - rc-msi-tvanywhere
+diff --git a/drivers/media/rc/keymaps/Makefile b/drivers/media/rc/keymaps/Makefile
+index b252a1d2ebd6..b7f53f44c5c8 100644
+--- a/drivers/media/rc/keymaps/Makefile
++++ b/drivers/media/rc/keymaps/Makefile
+@@ -70,6 +70,7 @@ obj-$(CONFIG_RC_MAP) += rc-adstech-dvb-t-pci.o \
+ 			rc-medion-x10.o \
+ 			rc-medion-x10-digitainer.o \
+ 			rc-medion-x10-or2x.o \
++			rc-minix-neo.o \
+ 			rc-msi-digivox-ii.o \
+ 			rc-msi-digivox-iii.o \
+ 			rc-msi-tvanywhere.o \
+diff --git a/drivers/media/rc/keymaps/rc-minix-neo.c b/drivers/media/rc/keymaps/rc-minix-neo.c
+new file mode 100644
+index 000000000000..9165af548ff1
+--- /dev/null
++++ b/drivers/media/rc/keymaps/rc-minix-neo.c
+@@ -0,0 +1,55 @@
++// SPDX-License-Identifier: GPL-2.0+
++//
++// Copyright (C) 2021 Christian Hewitt <christianshewitt@gmail.com>
++
++#include <media/rc-map.h>
++#include <linux/module.h>
++
++//
++// Keytable for the Minix NEO remote control
++//
++
++static struct rc_map_table minix_neo[] = {
++
++	{ 0x118, KEY_POWER },
++
++	{ 0x146, KEY_UP },
++	{ 0x116, KEY_DOWN },
++	{ 0x147, KEY_LEFT },
++	{ 0x115, KEY_RIGHT },
++	{ 0x155, KEY_ENTER },
++
++	{ 0x110, KEY_VOLUMEDOWN },
++	{ 0x140, KEY_BACK },
++	{ 0x114, KEY_VOLUMEUP },
++
++	{ 0x10d, KEY_HOME },
++	{ 0x104, KEY_MENU },
++	{ 0x112, KEY_CONFIG },
++
++};
++
++static struct rc_map_list minix_neo_map = {
++	.map = {
++		.scan     = minix_neo,
++		.size     = ARRAY_SIZE(minix_neo),
++		.rc_proto = RC_PROTO_NEC,
++		.name     = RC_MAP_MINIX_NEO,
++	}
++};
++
++static int __init init_rc_map_minix_neo(void)
++{
++	return rc_map_register(&minix_neo_map);
++}
++
++static void __exit exit_rc_map_minix_neo(void)
++{
++	rc_map_unregister(&minix_neo_map);
++}
++
++module_init(init_rc_map_minix_neo)
++module_exit(exit_rc_map_minix_neo)
++
++MODULE_LICENSE("GPL");
++MODULE_AUTHOR("Christian Hewitt <christianshewitt@gmail.com");
+diff --git a/include/media/rc-map.h b/include/media/rc-map.h
+index 999b750bc6b8..a6fca9cc761f 100644
+--- a/include/media/rc-map.h
++++ b/include/media/rc-map.h
+@@ -273,6 +273,7 @@ struct rc_map *rc_map_get(const char *name);
+ #define RC_MAP_MEDION_X10                "rc-medion-x10"
+ #define RC_MAP_MEDION_X10_DIGITAINER     "rc-medion-x10-digitainer"
+ #define RC_MAP_MEDION_X10_OR2X           "rc-medion-x10-or2x"
++#define RC_MAP_MINIX_NEO                 "rc-minix-neo"
+ #define RC_MAP_MSI_DIGIVOX_II            "rc-msi-digivox-ii"
+ #define RC_MAP_MSI_DIGIVOX_III           "rc-msi-digivox-iii"
+ #define RC_MAP_MSI_TVANYWHERE            "rc-msi-tvanywhere"
+-- 
+2.25.1
+

patch/kernel/meson64-dev/0007-FROMLIST-v1-drm-panfrost-add-governor-data-with-pre-.patch

@@ -0,0 +1,64 @@
+From 53db47369f341fbafff51db849c83418351de1a9 Mon Sep 17 00:00:00 2001
+From: Lukasz Luba <lukasz.luba@arm.com>
+Date: Sun, 24 Jan 2021 03:57:47 +0000
+Subject: [PATCH 07/58] FROMLIST(v1): drm/panfrost: add governor data with
+ pre-defined thresholds
+
+The simple_ondemand devfreq governor uses two thresholds to decide about
+the frequency change: upthreshold, downdifferential. These two tunable
+change the behavior of the governor decision, e.g. how fast to increase
+the frequency or how rapidly limit the frequency. This patch adds needed
+governor data with thresholds values gathered experimentally in different
+workloads.
+
+Signed-off-by: Lukasz Luba <lukasz.luba@arm.com>
+---
+ drivers/gpu/drm/panfrost/panfrost_devfreq.c | 10 +++++++++-
+ drivers/gpu/drm/panfrost/panfrost_devfreq.h |  2 ++
+ 2 files changed, 11 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/gpu/drm/panfrost/panfrost_devfreq.c b/drivers/gpu/drm/panfrost/panfrost_devfreq.c
+index 56b3f5935703..7c5ffc81dce1 100644
+--- a/drivers/gpu/drm/panfrost/panfrost_devfreq.c
++++ b/drivers/gpu/drm/panfrost/panfrost_devfreq.c
+@@ -130,8 +130,16 @@ int panfrost_devfreq_init(struct panfrost_device *pfdev)
+ 	panfrost_devfreq_profile.initial_freq = cur_freq;
+ 	dev_pm_opp_put(opp);
+ 
++	/*
++	 * Setup default thresholds for the simple_ondemand governor.
++	 * The values are chosen based on experiments.
++	 */
++	pfdevfreq->gov_data.upthreshold = 45;
++	pfdevfreq->gov_data.downdifferential = 5;
++
+ 	devfreq = devm_devfreq_add_device(dev, &panfrost_devfreq_profile,
+-					  DEVFREQ_GOV_SIMPLE_ONDEMAND, NULL);
++					  DEVFREQ_GOV_SIMPLE_ONDEMAND,
++					  &pfdevfreq->gov_data);
+ 	if (IS_ERR(devfreq)) {
+ 		DRM_DEV_ERROR(dev, "Couldn't initialize GPU devfreq\n");
+ 		ret = PTR_ERR(devfreq);
+diff --git a/drivers/gpu/drm/panfrost/panfrost_devfreq.h b/drivers/gpu/drm/panfrost/panfrost_devfreq.h
+index db6ea48e21f9..1e2a4de941aa 100644
+--- a/drivers/gpu/drm/panfrost/panfrost_devfreq.h
++++ b/drivers/gpu/drm/panfrost/panfrost_devfreq.h
+@@ -4,6 +4,7 @@
+ #ifndef __PANFROST_DEVFREQ_H__
+ #define __PANFROST_DEVFREQ_H__
+ 
++#include <linux/devfreq.h>
+ #include <linux/spinlock.h>
+ #include <linux/ktime.h>
+ 
+@@ -17,6 +18,7 @@ struct panfrost_devfreq {
+ 	struct devfreq *devfreq;
+ 	struct opp_table *regulators_opp_table;
+ 	struct thermal_cooling_device *cooling;
++	struct devfreq_simple_ondemand_data gov_data;
+ 	bool opp_of_table_added;
+ 
+ 	ktime_t busy_time;
+-- 
+2.25.1
+

patch/kernel/meson64-dev/0008-FROMLIST-v1-drm-panfrost-fix-reference-leak-in-panfr.patch

@@ -0,0 +1,39 @@
+From 0eb45601fe5d6b3aa9eb7038bb51df6b5fb9f860 Mon Sep 17 00:00:00 2001
+From: Qinglang Miao <miaoqinglang@huawei.com>
+Date: Sat, 28 Nov 2020 16:10:04 +0000
+Subject: [PATCH 08/58] FROMLIST(v1): drm/panfrost: fix reference leak in
+ panfrost_job_hw_submit
+
+pm_runtime_get_sync will increment pm usage counter even it
+failed. Forgetting to putting operation will result in a
+reference leak here.
+
+A new function pm_runtime_resume_and_get is introduced in
+[0] to keep usage counter balanced. So We fix the reference
+leak by replacing it with new funtion.
+
+[0] dd8088d5a896 ("PM: runtime: Add  pm_runtime_resume_and_get to deal with usage counter")
+
+Fixes: f3ba91228e8e ("drm/panfrost: Add initial panfrost driver")
+Reported-by: Hulk Robot <hulkci@huawei.com>
+Signed-off-by: Qinglang Miao <miaoqinglang@huawei.com>
+---
+ drivers/gpu/drm/panfrost/panfrost_job.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/gpu/drm/panfrost/panfrost_job.c b/drivers/gpu/drm/panfrost/panfrost_job.c
+index 04e6f6f9b742..d6d5c15184f9 100644
+--- a/drivers/gpu/drm/panfrost/panfrost_job.c
++++ b/drivers/gpu/drm/panfrost/panfrost_job.c
+@@ -157,7 +157,7 @@ static void panfrost_job_hw_submit(struct panfrost_job *job, int js)
+ 
+ 	panfrost_devfreq_record_busy(&pfdev->pfdevfreq);
+ 
+-	ret = pm_runtime_get_sync(pfdev->dev);
++	ret = pm_runtime_resume_and_get(pfdev->dev);
+ 	if (ret < 0)
+ 		return;
+ 
+-- 
+2.25.1
+

patch/kernel/meson64-dev/0009-FROMLIST-v2-drm-panfrost-Clear-MMU-irqs-before-handl.patch

@@ -0,0 +1,44 @@
+From 98dcc15dc21ae95ab21b8b7bb0d49140a4d23a4e Mon Sep 17 00:00:00 2001
+From: Boris Brezillon <boris.brezillon@collabora.com>
+Date: Thu, 4 Feb 2021 07:34:34 +0000
+Subject: [PATCH 09/58] FROMLIST(v2): drm/panfrost: Clear MMU irqs before
+ handling the fault
+
+When a fault is handled it will unblock the GPU which will continue
+executing its shader and might fault almost immediately on a different
+page. If we clear interrupts after handling the fault we might miss new
+faults, so clear them before.
+
+Cc: <stable@vger.kernel.org>
+Fixes: 187d2929206e ("drm/panfrost: Add support for GPU heap allocations")
+Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
+Reviewed-by: Steven Price <steven.price@arm.com>
+---
+ drivers/gpu/drm/panfrost/panfrost_mmu.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/gpu/drm/panfrost/panfrost_mmu.c b/drivers/gpu/drm/panfrost/panfrost_mmu.c
+index 7c1b3481b785..904d63450862 100644
+--- a/drivers/gpu/drm/panfrost/panfrost_mmu.c
++++ b/drivers/gpu/drm/panfrost/panfrost_mmu.c
+@@ -593,6 +593,8 @@ static irqreturn_t panfrost_mmu_irq_handler_thread(int irq, void *data)
+ 		access_type = (fault_status >> 8) & 0x3;
+ 		source_id = (fault_status >> 16);
+ 
++		mmu_write(pfdev, MMU_INT_CLEAR, mask);
++
+ 		/* Page fault only */
+ 		ret = -1;
+ 		if ((status & mask) == BIT(i) && (exception_type & 0xF8) == 0xC0)
+@@ -616,8 +618,6 @@ static irqreturn_t panfrost_mmu_irq_handler_thread(int irq, void *data)
+ 				access_type, access_type_name(pfdev, fault_status),
+ 				source_id);
+ 
+-		mmu_write(pfdev, MMU_INT_CLEAR, mask);
+-
+ 		status &= ~mask;
+ 	}
+ 
+-- 
+2.25.1
+

patch/kernel/meson64-dev/0010-FROMLIST-v2-drm-panfrost-Don-t-try-to-map-pages-that.patch

@@ -0,0 +1,50 @@
+From d397ac50c05577d8c652a15b88161b0f7aabf70e Mon Sep 17 00:00:00 2001
+From: Boris Brezillon <boris.brezillon@collabora.com>
+Date: Thu, 4 Feb 2021 07:35:52 +0000
+Subject: [PATCH 10/58] FROMLIST(v2): drm/panfrost: Don't try to map pages that
+ are already mapped
+
+We allocate 2MB chunks at a time, so it might appear that a page fault
+has already been handled by a previous page fault when we reach
+panfrost_mmu_map_fault_addr(). Bail out in that case to avoid mapping the
+same area twice.
+
+Cc: <stable@vger.kernel.org>
+Fixes: 187d2929206e ("drm/panfrost: Add support for GPU heap allocations")
+Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
+Reviewed-by: Steven Price <steven.price@arm.com>
+---
+ drivers/gpu/drm/panfrost/panfrost_mmu.c | 9 ++++++++-
+ 1 file changed, 8 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/gpu/drm/panfrost/panfrost_mmu.c b/drivers/gpu/drm/panfrost/panfrost_mmu.c
+index 904d63450862..21e552d1ac71 100644
+--- a/drivers/gpu/drm/panfrost/panfrost_mmu.c
++++ b/drivers/gpu/drm/panfrost/panfrost_mmu.c
+@@ -488,8 +488,14 @@ static int panfrost_mmu_map_fault_addr(struct panfrost_device *pfdev, int as,
+ 		}
+ 		bo->base.pages = pages;
+ 		bo->base.pages_use_count = 1;
+-	} else
++	} else {
+ 		pages = bo->base.pages;
++		if (pages[page_offset]) {
++			/* Pages are already mapped, bail out. */
++			mutex_unlock(&bo->base.pages_lock);
++			goto out;
++		}
++	}
+ 
+ 	mapping = bo->base.base.filp->f_mapping;
+ 	mapping_set_unevictable(mapping);
+@@ -522,6 +528,7 @@ static int panfrost_mmu_map_fault_addr(struct panfrost_device *pfdev, int as,
+ 
+ 	dev_dbg(pfdev->dev, "mapped page fault @ AS%d %llx", as, addr);
+ 
++out:
+ 	panfrost_gem_mapping_put(bomapping);
+ 
+ 	return 0;
+-- 
+2.25.1
+

patch/kernel/meson64-dev/0011-FROMLIST-v2-drm-panfrost-Stay-in-the-threaded-MMU-IR.patch

@@ -0,0 +1,86 @@
+From a9468802ec0218d71a6ff10dd7670374e2f6fc71 Mon Sep 17 00:00:00 2001
+From: Boris Brezillon <boris.brezillon@collabora.com>
+Date: Thu, 4 Feb 2021 07:37:53 +0000
+Subject: [PATCH 11/58] FROMLIST(v2): drm/panfrost: Stay in the threaded MMU
+ IRQ handler until we've handled all IRQs
+
+Doing a hw-irq -> threaded-irq round-trip is counter-productive, stay
+in the threaded irq handler as long as we can.
+
+v2:
+* Rework the loop to avoid a goto
+
+Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
+Reviewed-by: Steven Price <steven.price@arm.com>
+---
+ drivers/gpu/drm/panfrost/panfrost_mmu.c | 26 +++++++++++++------------
+ 1 file changed, 14 insertions(+), 12 deletions(-)
+
+diff --git a/drivers/gpu/drm/panfrost/panfrost_mmu.c b/drivers/gpu/drm/panfrost/panfrost_mmu.c
+index 21e552d1ac71..0581186ebfb3 100644
+--- a/drivers/gpu/drm/panfrost/panfrost_mmu.c
++++ b/drivers/gpu/drm/panfrost/panfrost_mmu.c
+@@ -578,22 +578,20 @@ static irqreturn_t panfrost_mmu_irq_handler_thread(int irq, void *data)
+ {
+ 	struct panfrost_device *pfdev = data;
+ 	u32 status = mmu_read(pfdev, MMU_INT_RAWSTAT);
+-	int i, ret;
++	int ret;
+ 
+-	for (i = 0; status; i++) {
+-		u32 mask = BIT(i) | BIT(i + 16);
++	while (status) {
++		u32 as = ffs(status | (status >> 16)) - 1;
++		u32 mask = BIT(as) | BIT(as + 16);
+ 		u64 addr;
+ 		u32 fault_status;
+ 		u32 exception_type;
+ 		u32 access_type;
+ 		u32 source_id;
+ 
+-		if (!(status & mask))
+-			continue;
+-
+-		fault_status = mmu_read(pfdev, AS_FAULTSTATUS(i));
+-		addr = mmu_read(pfdev, AS_FAULTADDRESS_LO(i));
+-		addr |= (u64)mmu_read(pfdev, AS_FAULTADDRESS_HI(i)) << 32;
++		fault_status = mmu_read(pfdev, AS_FAULTSTATUS(as));
++		addr = mmu_read(pfdev, AS_FAULTADDRESS_LO(as));
++		addr |= (u64)mmu_read(pfdev, AS_FAULTADDRESS_HI(as)) << 32;
+ 
+ 		/* decode the fault status */
+ 		exception_type = fault_status & 0xFF;
+@@ -604,8 +602,8 @@ static irqreturn_t panfrost_mmu_irq_handler_thread(int irq, void *data)
+ 
+ 		/* Page fault only */
+ 		ret = -1;
+-		if ((status & mask) == BIT(i) && (exception_type & 0xF8) == 0xC0)
+-			ret = panfrost_mmu_map_fault_addr(pfdev, i, addr);
++		if ((status & mask) == BIT(as) && (exception_type & 0xF8) == 0xC0)
++			ret = panfrost_mmu_map_fault_addr(pfdev, as, addr);
+ 
+ 		if (ret)
+ 			/* terminal fault, print info about the fault */
+@@ -617,7 +615,7 @@ static irqreturn_t panfrost_mmu_irq_handler_thread(int irq, void *data)
+ 				"exception type 0x%X: %s\n"
+ 				"access type 0x%X: %s\n"
+ 				"source id 0x%X\n",
+-				i, addr,
++				as, addr,
+ 				"TODO",
+ 				fault_status,
+ 				(fault_status & (1 << 10) ? "DECODER FAULT" : "SLAVE FAULT"),
+@@ -626,6 +624,10 @@ static irqreturn_t panfrost_mmu_irq_handler_thread(int irq, void *data)
+ 				source_id);
+ 
+ 		status &= ~mask;
++
++		/* If we received new MMU interrupts, process them before returning. */
++		if (!status)
++			status = mmu_read(pfdev, MMU_INT_RAWSTAT);
+ 	}
+ 
+ 	mmu_write(pfdev, MMU_INT_MASK, ~0);
+-- 
+2.25.1
+

patch/kernel/meson64-dev/0012-FROMLIST-v2-drm-lima-add-governor-data-with-pre-defi.patch

@@ -0,0 +1,64 @@
+From 54fbc49a6fd430859c5d4db8c2ea813d55c61189 Mon Sep 17 00:00:00 2001
+From: Christian Hewitt <christianshewitt@gmail.com>
+Date: Sun, 24 Jan 2021 11:27:35 +0000
+Subject: [PATCH 12/58] FROMLIST(v2): drm/lima: add governor data with
+ pre-defined thresholds
+
+This patch adapts the panfrost pre-defined thresholds change [0] to the
+lima driver to improve real-world performance. The upthreshold value has
+been set to ramp GPU frequency to max freq faster (compared to panfrost)
+to compensate for the lower overall performance of utgard devices.
+
+[0] https://patchwork.kernel.org/project/dri-devel/patch/20210121170445.19761-1-lukasz.luba@arm.com/
+
+Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
+---
+ drivers/gpu/drm/lima/lima_devfreq.c | 10 +++++++++-
+ drivers/gpu/drm/lima/lima_devfreq.h |  2 ++
+ 2 files changed, 11 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/gpu/drm/lima/lima_devfreq.c b/drivers/gpu/drm/lima/lima_devfreq.c
+index 5686ad4aaf7c..c9854315a0b5 100644
+--- a/drivers/gpu/drm/lima/lima_devfreq.c
++++ b/drivers/gpu/drm/lima/lima_devfreq.c
+@@ -163,8 +163,16 @@ int lima_devfreq_init(struct lima_device *ldev)
+ 	lima_devfreq_profile.initial_freq = cur_freq;
+ 	dev_pm_opp_put(opp);
+ 
++	/*
++	 * Setup default thresholds for the simple_ondemand governor.
++	 * The values are chosen based on experiments.
++	 */
++	ldevfreq->gov_data.upthreshold = 30;
++	ldevfreq->gov_data.downdifferential = 5;
++
+ 	devfreq = devm_devfreq_add_device(dev, &lima_devfreq_profile,
+-					  DEVFREQ_GOV_SIMPLE_ONDEMAND, NULL);
++					  DEVFREQ_GOV_SIMPLE_ONDEMAND,
++					  &ldevfreq->gov_data);
+ 	if (IS_ERR(devfreq)) {
+ 		dev_err(dev, "Couldn't initialize GPU devfreq\n");
+ 		ret = PTR_ERR(devfreq);
+diff --git a/drivers/gpu/drm/lima/lima_devfreq.h b/drivers/gpu/drm/lima/lima_devfreq.h
+index 2d9b3008ce77..b0c7c736e81a 100644
+--- a/drivers/gpu/drm/lima/lima_devfreq.h
++++ b/drivers/gpu/drm/lima/lima_devfreq.h
+@@ -4,6 +4,7 @@
+ #ifndef __LIMA_DEVFREQ_H__
+ #define __LIMA_DEVFREQ_H__
+ 
++#include <linux/devfreq.h>
+ #include <linux/spinlock.h>
+ #include <linux/ktime.h>
+ 
+@@ -18,6 +19,7 @@ struct lima_devfreq {
+ 	struct opp_table *clkname_opp_table;
+ 	struct opp_table *regulators_opp_table;
+ 	struct thermal_cooling_device *cooling;
++	struct devfreq_simple_ondemand_data gov_data;
+ 
+ 	ktime_t busy_time;
+ 	ktime_t idle_time;
+-- 
+2.25.1
+

patch/kernel/meson64-dev/0013-FROMLIST-v1-drm-lima-Use-delayed-timer-as-default-in.patch

@@ -0,0 +1,30 @@
+From 2477e73927c050f4ad049d44a0052c815ba746a9 Mon Sep 17 00:00:00 2001
+From: Lukasz Luba <lukasz.luba@arm.com>
+Date: Wed, 27 Jan 2021 11:36:36 +0000
+Subject: [PATCH 13/58] FROMLIST(v1): drm/lima: Use delayed timer as default in
+ devfreq profile
+
+Devfreq framework supports 2 modes for monitoring devices.
+Use delayed timer as default instead of deferrable timer
+in order to monitor the GPU status regardless of CPU idle.
+
+Signed-off-by: Lukasz Luba <lukasz.luba@arm.com>
+---
+ drivers/gpu/drm/lima/lima_devfreq.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/drivers/gpu/drm/lima/lima_devfreq.c b/drivers/gpu/drm/lima/lima_devfreq.c
+index c9854315a0b5..4f64940b9055 100644
+--- a/drivers/gpu/drm/lima/lima_devfreq.c
++++ b/drivers/gpu/drm/lima/lima_devfreq.c
+@@ -81,6 +81,7 @@ static int lima_devfreq_get_dev_status(struct device *dev,
+ }
+ 
+ static struct devfreq_dev_profile lima_devfreq_profile = {
++	.timer = DEVFREQ_TIMER_DELAYED,
+ 	.polling_ms = 50, /* ~3 frames */
+ 	.target = lima_devfreq_target,
+ 	.get_dev_status = lima_devfreq_get_dev_status,
+-- 
+2.25.1
+

patch/kernel/meson64-dev/0014-FROMLIST-v1-phy-amlogic-phy-meson-gxl-usb2-fix-share.patch

@@ -0,0 +1,48 @@
+From dbb14693f1efbb904658288c0914f7747965ab0d Mon Sep 17 00:00:00 2001
+From: Amjad Ouled-Ameur <aouledameur@baylibre.com>
+Date: Fri, 13 Nov 2020 07:45:15 +0000
+Subject: [PATCH 14/58] FROMLIST(v1): phy: amlogic: phy-meson-gxl-usb2: fix
+ shared reset controller use
+
+Use reset_control_rearm() call if an error occurs in case
+phy_meson_gxl_usb2_init() fails after reset() has been called ; or in case
+phy_meson_gxl_usb2_exit() is called i.e the resource is no longer used
+and the reset line may be triggered again by other devices.
+
+reset_control_rearm() keeps use of triggered_count sane in the reset
+framework. Therefore, use of reset_control_reset() on shared reset line
+should be balanced with reset_control_rearm().
+
+Signed-off-by: Amjad Ouled-Ameur <aouledameur@baylibre.com>
+Reported-by: Jerome Brunet <jbrunet@baylibre.com>
+---
+ drivers/phy/amlogic/phy-meson-gxl-usb2.c | 5 ++++-
+ 1 file changed, 4 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/phy/amlogic/phy-meson-gxl-usb2.c b/drivers/phy/amlogic/phy-meson-gxl-usb2.c
+index 2b3c0d730f20..17826cd03142 100644
+--- a/drivers/phy/amlogic/phy-meson-gxl-usb2.c
++++ b/drivers/phy/amlogic/phy-meson-gxl-usb2.c
+@@ -114,8 +114,10 @@ static int phy_meson_gxl_usb2_init(struct phy *phy)
+ 		return ret;
+ 
+ 	ret = clk_prepare_enable(priv->clk);
+-	if (ret)
++	if (ret) {
++		reset_control_rearm(priv->reset);
+ 		return ret;
++	}
+ 
+ 	return 0;
+ }
+@@ -124,6 +126,7 @@ static int phy_meson_gxl_usb2_exit(struct phy *phy)
+ {
+ 	struct phy_meson_gxl_usb2_priv *priv = phy_get_drvdata(phy);
+ 
++	reset_control_rearm(priv->reset);
+ 	clk_disable_unprepare(priv->clk);
+ 
+ 	return 0;
+-- 
+2.25.1
+

patch/kernel/meson64-dev/0015-FROMLIST-v1-usb-dwc3-meson-g12a-fix-shared-reset-con.patch

@@ -0,0 +1,105 @@
+From 1ff484448145880c7bd8083439fd267598b77169 Mon Sep 17 00:00:00 2001
+From: Amjad Ouled-Ameur <aouledameur@baylibre.com>
+Date: Fri, 13 Nov 2020 07:46:15 +0000
+Subject: [PATCH 15/58] FROMLIST(v1): usb: dwc3: meson-g12a: fix shared reset
+ control use
+
+reset_control_(de)assert() calls are called on a shared reset line when
+reset_control_reset has been used. This is not allowed by the reset
+framework.
+
+Use reset_control_rearm() call in suspend() and remove() as a way to state
+that the resource is no longer used, hence the shared reset line
+may be triggered again by other devices. Use reset_control_rearm() also in
+case probe fails after reset() has been called.
+
+reset_control_rearm() keeps use of triggered_count sane in the reset
+framework, use of reset_control_reset() on shared reset line should be
+balanced with reset_control_rearm().
+
+Signed-off-by: Amjad Ouled-Ameur <aouledameur@baylibre.com>
+Reported-by: Jerome Brunet <jbrunet@baylibre.com>
+---
+ drivers/usb/dwc3/dwc3-meson-g12a.c | 19 +++++++++++++------
+ 1 file changed, 13 insertions(+), 6 deletions(-)
+
+diff --git a/drivers/usb/dwc3/dwc3-meson-g12a.c b/drivers/usb/dwc3/dwc3-meson-g12a.c
+index bdf1f98dfad8..6570146cabc5 100644
+--- a/drivers/usb/dwc3/dwc3-meson-g12a.c
++++ b/drivers/usb/dwc3/dwc3-meson-g12a.c
+@@ -750,7 +750,7 @@ static int dwc3_meson_g12a_probe(struct platform_device *pdev)
+ 
+ 	ret = dwc3_meson_g12a_get_phys(priv);
+ 	if (ret)
+-		goto err_disable_clks;
++		goto err_rearm;
+ 
+ 	ret = priv->drvdata->setup_regmaps(priv, base);
+ 	if (ret)
+@@ -759,7 +759,7 @@ static int dwc3_meson_g12a_probe(struct platform_device *pdev)
+ 	if (priv->vbus) {
+ 		ret = regulator_enable(priv->vbus);
+ 		if (ret)
+-			goto err_disable_clks;
++			goto err_rearm;
+ 	}
+ 
+ 	/* Get dr_mode */
+@@ -772,13 +772,13 @@ static int dwc3_meson_g12a_probe(struct platform_device *pdev)
+ 
+ 	ret = priv->drvdata->usb_init(priv);
+ 	if (ret)
+-		goto err_disable_clks;
++		goto err_rearm;
+ 
+ 	/* Init PHYs */
+ 	for (i = 0 ; i < PHY_COUNT ; ++i) {
+ 		ret = phy_init(priv->phys[i]);
+ 		if (ret)
+-			goto err_disable_clks;
++			goto err_rearm;
+ 	}
+ 
+ 	/* Set PHY Power */
+@@ -816,6 +816,9 @@ static int dwc3_meson_g12a_probe(struct platform_device *pdev)
+ 	for (i = 0 ; i < PHY_COUNT ; ++i)
+ 		phy_exit(priv->phys[i]);
+ 
++err_rearm:
++	reset_control_rearm(priv->reset);
++
+ err_disable_clks:
+ 	clk_bulk_disable_unprepare(priv->drvdata->num_clks,
+ 				   priv->drvdata->clks);
+@@ -843,6 +846,8 @@ static int dwc3_meson_g12a_remove(struct platform_device *pdev)
+ 	pm_runtime_put_noidle(dev);
+ 	pm_runtime_set_suspended(dev);
+ 
++	reset_control_rearm(priv->reset);
++
+ 	clk_bulk_disable_unprepare(priv->drvdata->num_clks,
+ 				   priv->drvdata->clks);
+ 
+@@ -883,7 +888,7 @@ static int __maybe_unused dwc3_meson_g12a_suspend(struct device *dev)
+ 		phy_exit(priv->phys[i]);
+ 	}
+ 
+-	reset_control_assert(priv->reset);
++	reset_control_rearm(priv->reset);
+ 
+ 	return 0;
+ }
+@@ -893,7 +898,9 @@ static int __maybe_unused dwc3_meson_g12a_resume(struct device *dev)
+ 	struct dwc3_meson_g12a *priv = dev_get_drvdata(dev);
+ 	int i, ret;
+ 
+-	reset_control_deassert(priv->reset);
++	ret = reset_control_reset(priv->reset);
++	if (ret)
++		return ret;
+ 
+ 	ret = priv->drvdata->usb_init(priv);
+ 	if (ret)
+-- 
+2.25.1
+

patch/kernel/meson64-dev/0016-FROMLIST-v1-ASoC-constify-of_phandle_args-in-snd_soc.patch

@@ -0,0 +1,176 @@
+From fc0c6a0dbf33dd51965e8314cbe2a8df5e368016 Mon Sep 17 00:00:00 2001
+From: Krzysztof Kozlowski <krzk@kernel.org>
+Date: Sun, 21 Feb 2021 16:27:16 +0000
+Subject: [PATCH 16/58] FROMLIST(v1): ASoC: constify of_phandle_args in
+ snd_soc_get_dai_name()
+
+The pointer to of_phandle_args passed to snd_soc_get_dai_name() and
+of_xlate_dai_name() implementations is not modified.  Since it is being
+used only to translate passed OF node to a DAI name, it should not be
+modified, so mark it as const for correctness and safer code.
+
+Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
+---
+ include/sound/soc-component.h     | 4 ++--
+ include/sound/soc.h               | 2 +-
+ sound/soc/meson/aiu-acodec-ctrl.c | 2 +-
+ sound/soc/meson/aiu-codec-ctrl.c  | 2 +-
+ sound/soc/meson/aiu.c             | 4 ++--
+ sound/soc/meson/aiu.h             | 2 +-
+ sound/soc/qcom/lpass-cpu.c        | 2 +-
+ sound/soc/qcom/qdsp6/q6afe-dai.c  | 2 +-
+ sound/soc/soc-component.c         | 2 +-
+ sound/soc/soc-core.c              | 2 +-
+ 10 files changed, 12 insertions(+), 12 deletions(-)
+
+diff --git a/include/sound/soc-component.h b/include/sound/soc-component.h
+index 5b47768222b7..7dc75b39287f 100644
+--- a/include/sound/soc-component.h
++++ b/include/sound/soc-component.h
+@@ -101,7 +101,7 @@ struct snd_soc_component_driver {
+ 
+ 	/* DT */
+ 	int (*of_xlate_dai_name)(struct snd_soc_component *component,
+-				 struct of_phandle_args *args,
++				 const struct of_phandle_args *args,
+ 				 const char **dai_name);
+ 	int (*of_xlate_dai_id)(struct snd_soc_component *comment,
+ 			       struct device_node *endpoint);
+@@ -450,7 +450,7 @@ void snd_soc_component_remove(struct snd_soc_component *component);
+ int snd_soc_component_of_xlate_dai_id(struct snd_soc_component *component,
+ 				      struct device_node *ep);
+ int snd_soc_component_of_xlate_dai_name(struct snd_soc_component *component,
+-					struct of_phandle_args *args,
++					const struct of_phandle_args *args,
+ 					const char **dai_name);
+ int snd_soc_component_compr_open(struct snd_compr_stream *cstream);
+ void snd_soc_component_compr_free(struct snd_compr_stream *cstream,
+diff --git a/include/sound/soc.h b/include/sound/soc.h
+index bd38015d6c6d..78609ab331c8 100644
+--- a/include/sound/soc.h
++++ b/include/sound/soc.h
+@@ -1219,7 +1219,7 @@ unsigned int snd_soc_of_parse_daifmt(struct device_node *np,
+ 				     struct device_node **bitclkmaster,
+ 				     struct device_node **framemaster);
+ int snd_soc_get_dai_id(struct device_node *ep);
+-int snd_soc_get_dai_name(struct of_phandle_args *args,
++int snd_soc_get_dai_name(const struct of_phandle_args *args,
+ 			 const char **dai_name);
+ int snd_soc_of_get_dai_name(struct device_node *of_node,
+ 			    const char **dai_name);
+diff --git a/sound/soc/meson/aiu-acodec-ctrl.c b/sound/soc/meson/aiu-acodec-ctrl.c
+index 7078197e0cc5..27a6d3259c50 100644
+--- a/sound/soc/meson/aiu-acodec-ctrl.c
++++ b/sound/soc/meson/aiu-acodec-ctrl.c
+@@ -159,7 +159,7 @@ static const struct snd_kcontrol_new aiu_acodec_ctrl_controls[] = {
+ };
+ 
+ static int aiu_acodec_of_xlate_dai_name(struct snd_soc_component *component,
+-					struct of_phandle_args *args,
++					const struct of_phandle_args *args,
+ 					const char **dai_name)
+ {
+ 	return aiu_of_xlate_dai_name(component, args, dai_name, AIU_ACODEC);
+diff --git a/sound/soc/meson/aiu-codec-ctrl.c b/sound/soc/meson/aiu-codec-ctrl.c
+index 4b773d3e8b07..c3ea733fce91 100644
+--- a/sound/soc/meson/aiu-codec-ctrl.c
++++ b/sound/soc/meson/aiu-codec-ctrl.c
+@@ -125,7 +125,7 @@ static const struct snd_soc_dapm_route aiu_hdmi_ctrl_routes[] = {
+ };
+ 
+ static int aiu_hdmi_of_xlate_dai_name(struct snd_soc_component *component,
+-				      struct of_phandle_args *args,
++				      const struct of_phandle_args *args,
+ 				      const char **dai_name)
+ {
+ 	return aiu_of_xlate_dai_name(component, args, dai_name, AIU_HDMI);
+diff --git a/sound/soc/meson/aiu.c b/sound/soc/meson/aiu.c
+index dc35ca79021c..ba15d5762b0b 100644
+--- a/sound/soc/meson/aiu.c
++++ b/sound/soc/meson/aiu.c
+@@ -42,7 +42,7 @@ static const struct snd_soc_dapm_route aiu_cpu_dapm_routes[] = {
+ };
+ 
+ int aiu_of_xlate_dai_name(struct snd_soc_component *component,
+-			  struct of_phandle_args *args,
++			  const struct of_phandle_args *args,
+ 			  const char **dai_name,
+ 			  unsigned int component_id)
+ {
+@@ -72,7 +72,7 @@ int aiu_of_xlate_dai_name(struct snd_soc_component *component,
+ }
+ 
+ static int aiu_cpu_of_xlate_dai_name(struct snd_soc_component *component,
+-				     struct of_phandle_args *args,
++				     const struct of_phandle_args *args,
+ 				     const char **dai_name)
+ {
+ 	return aiu_of_xlate_dai_name(component, args, dai_name, AIU_CPU);
+diff --git a/sound/soc/meson/aiu.h b/sound/soc/meson/aiu.h
+index 87aa19ac4af3..393b6c2307e4 100644
+--- a/sound/soc/meson/aiu.h
++++ b/sound/soc/meson/aiu.h
+@@ -45,7 +45,7 @@ struct aiu {
+ 		     SNDRV_PCM_FMTBIT_S24_LE)
+ 
+ int aiu_of_xlate_dai_name(struct snd_soc_component *component,
+-			  struct of_phandle_args *args,
++			  const struct of_phandle_args *args,
+ 			  const char **dai_name,
+ 			  unsigned int component_id);
+ 
+diff --git a/sound/soc/qcom/lpass-cpu.c b/sound/soc/qcom/lpass-cpu.c
+index c642e5f8f28c..4762286b33fe 100644
+--- a/sound/soc/qcom/lpass-cpu.c
++++ b/sound/soc/qcom/lpass-cpu.c
+@@ -340,7 +340,7 @@ int asoc_qcom_lpass_cpu_dai_probe(struct snd_soc_dai *dai)
+ EXPORT_SYMBOL_GPL(asoc_qcom_lpass_cpu_dai_probe);
+ 
+ static int asoc_qcom_of_xlate_dai_name(struct snd_soc_component *component,
+-				   struct of_phandle_args *args,
++				   const struct of_phandle_args *args,
+ 				   const char **dai_name)
+ {
+ 	struct lpass_data *drvdata = snd_soc_component_get_drvdata(component);
+diff --git a/sound/soc/qcom/qdsp6/q6afe-dai.c b/sound/soc/qcom/qdsp6/q6afe-dai.c
+index 4e1f101281e7..e8915519f427 100644
+--- a/sound/soc/qcom/qdsp6/q6afe-dai.c
++++ b/sound/soc/qcom/qdsp6/q6afe-dai.c
+@@ -1315,7 +1315,7 @@ static struct snd_soc_dai_driver q6afe_dais[] = {
+ };
+ 
+ static int q6afe_of_xlate_dai_name(struct snd_soc_component *component,
+-				   struct of_phandle_args *args,
++				   const struct of_phandle_args *args,
+ 				   const char **dai_name)
+ {
+ 	int id = args->args[0];
+diff --git a/sound/soc/soc-component.c b/sound/soc/soc-component.c
+index 159bf88b9f8c..8415e9bd2932 100644
+--- a/sound/soc/soc-component.c
++++ b/sound/soc/soc-component.c
+@@ -370,7 +370,7 @@ int snd_soc_component_of_xlate_dai_id(struct snd_soc_component *component,
+ }
+ 
+ int snd_soc_component_of_xlate_dai_name(struct snd_soc_component *component,
+-					struct of_phandle_args *args,
++					const struct of_phandle_args *args,
+ 					const char **dai_name)
+ {
+ 	if (component->driver->of_xlate_dai_name)
+diff --git a/sound/soc/soc-core.c b/sound/soc/soc-core.c
+index f6d4e99b590c..50190654edda 100644
+--- a/sound/soc/soc-core.c
++++ b/sound/soc/soc-core.c
+@@ -2994,7 +2994,7 @@ int snd_soc_get_dai_id(struct device_node *ep)
+ }
+ EXPORT_SYMBOL_GPL(snd_soc_get_dai_id);
+ 
+-int snd_soc_get_dai_name(struct of_phandle_args *args,
++int snd_soc_get_dai_name(const struct of_phandle_args *args,
+ 				const char **dai_name)
+ {
+ 	struct snd_soc_component *pos;
+-- 
+2.25.1
+

patch/kernel/meson64-dev/0017-FROMLIST-v1-spi-nor-add-support-for-XT25F128B.patch

@@ -0,0 +1,90 @@
+From a5dc8bb92c6b67be7e48d442e821837b03fc129a Mon Sep 17 00:00:00 2001
+From: Andreas Rammhold <andreas@rammhold.de>
+Date: Thu, 28 Jan 2021 09:43:36 +0000
+Subject: [PATCH 17/58] FROMLIST(v1): spi-nor: add support for XT25F128B
+
+This adds support for the XT25F128B as found on the RockPi4b SBC.
+
+Signed-off-by: Andreas Rammhold <andreas@rammhold.de>
+---
+
+This continues the efforts done in [1] & [2] that went stale. I've
+tested this patch on my RockPi4b which only has the xt25f128b (and not
+the xt25f32b as also propsed in [2]). I have tried to obtain a copy of
+the datasheets but was unable to find them. Not sure whre you would get
+them.
+
+While [1] was already for the new spi-nor layout it was missing the bits
+in the core.{c,h} files.
+
+[1]: https://patchwork.ozlabs.org/project/linux-mtd/patch/CAMgqO2y9MYDj6antOaWLBRKU8vGEwqCB-Y1TkXTSWsmsed+W6A@mail.gmail.com/
+[2]: https://patchwork.ozlabs.org/project/linux-mtd/patch/20200206171941.GA2398@makrotopia.org/
+---
+ drivers/mtd/spi-nor/Makefile |  1 +
+ drivers/mtd/spi-nor/core.c   |  1 +
+ drivers/mtd/spi-nor/core.h   |  1 +
+ drivers/mtd/spi-nor/xtx.c    | 16 ++++++++++++++++
+ 4 files changed, 19 insertions(+)
+ create mode 100644 drivers/mtd/spi-nor/xtx.c
+
+diff --git a/drivers/mtd/spi-nor/Makefile b/drivers/mtd/spi-nor/Makefile
+index 653923896205..3f7a52d7fa0b 100644
+--- a/drivers/mtd/spi-nor/Makefile
++++ b/drivers/mtd/spi-nor/Makefile
+@@ -17,6 +17,7 @@ spi-nor-objs			+= sst.o
+ spi-nor-objs			+= winbond.o
+ spi-nor-objs			+= xilinx.o
+ spi-nor-objs			+= xmc.o
++spi-nor-objs			+= xtx.o
+ obj-$(CONFIG_MTD_SPI_NOR)	+= spi-nor.o
+ 
+ obj-$(CONFIG_MTD_SPI_NOR)	+= controllers/
+diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
+index 0522304f52fa..9a89ec473e4b 100644
+--- a/drivers/mtd/spi-nor/core.c
++++ b/drivers/mtd/spi-nor/core.c
+@@ -2215,6 +2215,7 @@ static const struct spi_nor_manufacturer *manufacturers[] = {
+ 	&spi_nor_winbond,
+ 	&spi_nor_xilinx,
+ 	&spi_nor_xmc,
++	&spi_nor_xtx,
+ };
+ 
+ static const struct flash_info *
+diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h
+index 4a3f7f150b5d..ee0e45eaffcd 100644
+--- a/drivers/mtd/spi-nor/core.h
++++ b/drivers/mtd/spi-nor/core.h
+@@ -425,6 +425,7 @@ extern const struct spi_nor_manufacturer spi_nor_sst;
+ extern const struct spi_nor_manufacturer spi_nor_winbond;
+ extern const struct spi_nor_manufacturer spi_nor_xilinx;
+ extern const struct spi_nor_manufacturer spi_nor_xmc;
++extern const struct spi_nor_manufacturer spi_nor_xtx;
+ 
+ void spi_nor_spimem_setup_op(const struct spi_nor *nor,
+ 			     struct spi_mem_op *op,
+diff --git a/drivers/mtd/spi-nor/xtx.c b/drivers/mtd/spi-nor/xtx.c
+new file mode 100644
+index 000000000000..a10102d8b3e2
+--- /dev/null
++++ b/drivers/mtd/spi-nor/xtx.c
+@@ -0,0 +1,16 @@
++// SPDX-License-Identifier: GPL-2.0
++
++#include <linux/mtd/spi-nor.h>
++
++#include "core.h"
++
++static const struct flash_info xtx_parts[] = {
++ /* XTX (Shenzhen Xin Tian Xia Tech) */
++ { "xt25f128b", INFO(0x0b4018, 0, 64 * 1024, 256, SECT_4K) },
++};
++
++const struct spi_nor_manufacturer spi_nor_xtx = {
++ .name = "xtx",
++ .parts = xtx_parts,
++ .nparts = ARRAY_SIZE(xtx_parts),
++};
+-- 
+2.25.1
+

patch/kernel/meson64-dev/0018-FROMLIST-v1-dt-bindings-arm-amlogic-add-support-for-.patch

@@ -0,0 +1,29 @@
+From 9f09898cfd66e1a73f0756d95998e224bbba36fb Mon Sep 17 00:00:00 2001
+From: Christian Hewitt <christianshewitt@gmail.com>
+Date: Fri, 29 Jan 2021 04:46:21 +0000
+Subject: [PATCH 18/58] FROMLIST(v1): dt-bindings: arm: amlogic: add support
+ for the Minix NEO U9-H
+
+The Minix NEO U9-H is a small form-factor Android STB based on the
+Amlogic Q200 reference board with an S912-H chip.
+
+Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
+---
+ Documentation/devicetree/bindings/arm/amlogic.yaml | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/Documentation/devicetree/bindings/arm/amlogic.yaml b/Documentation/devicetree/bindings/arm/amlogic.yaml
+index 5f6769bf45bd..d24334e1e166 100644
+--- a/Documentation/devicetree/bindings/arm/amlogic.yaml
++++ b/Documentation/devicetree/bindings/arm/amlogic.yaml
+@@ -120,6 +120,7 @@ properties:
+               - khadas,vim2
+               - kingnovel,r-box-pro
+               - libretech,aml-s912-pc
++              - minix,neo-u9h
+               - nexbox,a1
+               - tronsmart,vega-s96
+               - wetek,core2
+-- 
+2.25.1
+

patch/kernel/meson64-dev/0019-FROMLIST-v1-arm64-dts-meson-add-initial-device-tree-.patch

@@ -0,0 +1,174 @@
+From 7b86df42383a0783882d51976b15598e69b2b7b1 Mon Sep 17 00:00:00 2001
+From: Christian Hewitt <christianshewitt@gmail.com>
+Date: Tue, 19 Jan 2021 12:57:11 +0000
+Subject: [PATCH 19/58] FROMLIST(v1): arm64: dts: meson: add initial
+ device-tree for Minix NEO U9-H
+
+Minix NEO U9-H is based on the Amlogic Q200 reference board with an
+S912-H chip and the following specs:
+
+- 2GB DDR3 RAM
+- 16GB eMMC
+- 10/100/1000 Base-T Ethernet
+- AP6356S Wireless (802.11 a/b/g/n/ac, BT 4.1)
+- RTC chip
+- HDMI 2.1 video
+- S/PDIF optical output
+- ES8323 audio codec
+- Analogue headphone output
+- 3x USB 2.0 ports (1x OTG)
+- IR receiver
+- 1x Power LED (white)
+- 1x Power button (rear)
+- 1x Update/Reset button (underside)
+- 1x micro SD card slot
+
+Tested-by: Wes Bradley <komplex@live.ie>
+Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
+---
+ arch/arm64/boot/dts/amlogic/Makefile          |   1 +
+ .../dts/amlogic/meson-gxm-minix-neo-u9h.dts   | 120 ++++++++++++++++++
+ 2 files changed, 121 insertions(+)
+ create mode 100644 arch/arm64/boot/dts/amlogic/meson-gxm-minix-neo-u9h.dts
+
+diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
+index 78a569d7fa20..aebd49c88719 100644
+--- a/arch/arm64/boot/dts/amlogic/Makefile
++++ b/arch/arm64/boot/dts/amlogic/Makefile
+@@ -38,6 +38,7 @@ dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905w-p281.dtb
+ dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905w-tx3-mini.dtb
+ dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905d-libretech-pc.dtb
+ dtb-$(CONFIG_ARCH_MESON) += meson-gxm-khadas-vim2.dtb
++dtb-$(CONFIG_ARCH_MESON) += meson-gxm-minix-neo-u9h.dtb
+ dtb-$(CONFIG_ARCH_MESON) += meson-gxm-nexbox-a1.dtb
+ dtb-$(CONFIG_ARCH_MESON) += meson-gxm-q200.dtb
+ dtb-$(CONFIG_ARCH_MESON) += meson-gxm-q201.dtb
+diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-minix-neo-u9h.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-minix-neo-u9h.dts
+new file mode 100644
+index 000000000000..a414cd39c2b1
+--- /dev/null
++++ b/arch/arm64/boot/dts/amlogic/meson-gxm-minix-neo-u9h.dts
+@@ -0,0 +1,120 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++/*
++ * Copyright (c) Christian Hewitt <christianshewitt@gmail.com>
++ */
++
++/dts-v1/;
++
++#include "meson-gxm.dtsi"
++#include "meson-gx-p23x-q20x.dtsi"
++#include <dt-bindings/input/input.h>
++#include <dt-bindings/leds/common.h>
++
++/ {
++	compatible = "minix,neo-u9h", "amlogic,s912", "amlogic,meson-gxm";
++	model = "Minix Neo U9-H";
++
++	leds {
++		compatible = "gpio-leds";
++
++		white {
++			color = <LED_COLOR_ID_WHITE>;
++			function = LED_FUNCTION_POWER;
++			gpios = <&gpio_ao GPIOAO_9 GPIO_ACTIVE_HIGH>;
++			default-state = "on";
++			panic-indicator;
++		};
++	};
++
++	adc-keys {
++		compatible = "adc-keys";
++		io-channels = <&saradc 0>;
++		io-channel-names = "buttons";
++		keyup-threshold-microvolt = <1710000>;
++
++		button-function {
++			label = "update";
++			linux,code = <KEY_VENDOR>;
++			press-threshold-microvolt = <10000>;
++		};
++	};
++
++	gpio-keys-polled {
++		compatible = "gpio-keys-polled";
++		#address-cells = <1>;
++		#size-cells = <0>;
++		poll-interval = <100>;
++
++		button@0 {
++			label = "power";
++			linux,code = <KEY_POWER>;
++			gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>;
++		};
++	};
++};
++
++&ethmac {
++	pinctrl-0 = <&eth_pins>;
++	pinctrl-names = "default";
++	phy-handle = <&external_phy>;
++	amlogic,tx-delay-ns = <2>;
++	phy-mode = "rgmii";
++};
++
++&external_mdio {
++	external_phy: ethernet-phy@0 {
++		/* Realtek RTL8211F (0x001cc916) */
++		reg = <0>;
++		max-speed = <1000>;
++
++		reset-assert-us = <10000>;
++		reset-deassert-us = <80000>;
++		reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
++
++		interrupt-parent = <&gpio_intc>;
++		/* MAC_INTR on GPIOZ_15 */
++		interrupts = <25 IRQ_TYPE_LEVEL_LOW>;
++	};
++};
++
++&ir {
++	linux,rc-map-name = "rc-minix-neo";
++};
++
++&i2c_B {
++	status = "okay";
++	pinctrl-0 = <&i2c_b_pins>;
++	pinctrl-names = "default";
++
++	rtc: rtc@51 {
++		status = "okay";
++		compatible = "haoyu,hym8563";
++		reg = <0x51>;
++		#clock-cells = <0>;
++		clock-frequency = <32768>;
++		clock-output-names = "xin32k";
++		wakeup-source;
++	};
++};
++
++&sd_emmc_a {
++	brcmf: wifi@1 {
++		reg = <1>;
++		compatible = "brcm,bcm4329-fmac";
++	};
++};
++
++&uart_A {
++	status = "okay";
++	pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
++	pinctrl-names = "default";
++	uart-has-rtscts;
++
++	bluetooth {
++		compatible = "brcm,bcm43438-bt";
++		shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
++		max-speed = <2000000>;
++		clocks = <&wifi32k>;
++		clock-names = "lpo";
++	};
++};
+-- 
+2.25.1
+

patch/kernel/meson64-dev/0020-FROMLIST-v2-arm64-dts-amlogic-assign-a-fixed-index-t.patch

@@ -0,0 +1,63 @@
+From acae66eab6e5a815e489565ea98524f6d4b9d3a7 Mon Sep 17 00:00:00 2001
+From: Alexander Stein <alexander.stein@mailbox.org>
+Date: Wed, 3 Feb 2021 17:03:42 +0000
+Subject: [PATCH 20/58] FROMLIST(v2): arm64: dts: amlogic: assign a fixed index
+ to mmc devices
+
+Recently introduced async probe on mmc devices can shuffle block IDs.
+Pin them to fixed values to ease booting in environments where UUIDs
+are not practical. Use newly introduced aliases for mmcblk devices
+from [1].
+
+The unconventional order (B, C, A) is due to the fact that sd_emmc_a is
+(according to the comments) only used for SDIO.
+
+AFAICS all boards either have both sd_emmc_b and sd_emmc_c or only one
+of them enabled. So the alias order should match the previous non-async
+order for all of them.
+
+[1] https://patchwork.kernel.org/patch/11747669/
+
+Signed-off-by: Alexander Stein <alexander.stein@mailbox.org>
+---
+ arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi | 6 ++++++
+ arch/arm64/boot/dts/amlogic/meson-gx.dtsi         | 6 ++++++
+ 2 files changed, 12 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
+index 3a4f20506a61..bd6e48e3c51a 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
++++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
+@@ -17,6 +17,12 @@ / {
+ 	#address-cells = <2>;
+ 	#size-cells = <2>;
+ 
++	aliases {
++		mmc0 = &sd_emmc_b;
++		mmc1 = &sd_emmc_c;
++		mmc2 = &sd_emmc_a;
++	};
++
+ 	chosen {
+ 		#address-cells = <2>;
+ 		#size-cells = <2>;
+diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
+index cf9eb7c8a6f0..14ff467c6be8 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
++++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
+@@ -20,6 +20,12 @@ / {
+ 	#address-cells = <2>;
+ 	#size-cells = <2>;
+ 
++	aliases {
++		mmc0 = &sd_emmc_b;
++		mmc1 = &sd_emmc_c;
++		mmc2 = &sd_emmc_a;
++	};
++
+ 	reserved-memory {
+ 		#address-cells = <2>;
+ 		#size-cells = <2>;
+-- 
+2.25.1
+

patch/kernel/meson64-dev/0021-FROMLIST-v1-drm-meson-add-shutdown-function-to-meson.patch

@@ -0,0 +1,69 @@
+From f11388785b09c4685a14303f0961f2bed875ab88 Mon Sep 17 00:00:00 2001
+From: Artem Lapkin <art@khadas.com>
+Date: Wed, 24 Feb 2021 12:12:53 +0000
+Subject: [PATCH 21/58] FROMLIST(v1): drm/meson: add shutdown function to
+ meson_drv
+
+Problem: random stucks on reboot stage about 1/20 stuck/reboots
+// debug kernel log
+[    4.496660] reboot: kernel restart prepare CMD:(null)
+[    4.498114] meson_ee_pwrc c883c000.system-controller:power-controller: shutdown begin
+[    4.503949] meson_ee_pwrc c883c000.system-controller:power-controller: shutdown domain 0:VPU...
+...STUCK...
+
+Solution: add shutdown function to meson_drm driver
+// debug kernel log
+[    5.231896] reboot: kernel restart prepare CMD:(null)
+[    5.246135] [drm:meson_drv_shutdown]
+...
+[    5.259271] meson_ee_pwrc c883c000.system-controller:power-controller: shutdown begin
+[    5.274688] meson_ee_pwrc c883c000.system-controller:power-controller: shutdown domain 0:VPU...
+[    5.338331] reboot: Restarting system
+[    5.358293] psci: PSCI_0_2_FN_SYSTEM_RESET reboot_mode:0 cmd:(null)
+bl31 reboot reason: 0xd
+bl31 reboot reason: 0x0
+system cmd  1.
+...REBOOT...
+
+Tested: on VIM1 VIM2 VIM3 VIM3L khadas sbcs - 1000+ successful reboots
+and Odroid boards, WeTek Play2 (GXBB)
+
+Tested-by: Christian Hewitt <christianshewitt@gmail.com>
+Signed-off-by: Artem Lapkin <art@khadas.com>
+---
+ drivers/gpu/drm/meson/meson_drv.c | 12 ++++++++++++
+ 1 file changed, 12 insertions(+)
+
+diff --git a/drivers/gpu/drm/meson/meson_drv.c b/drivers/gpu/drm/meson/meson_drv.c
+index 42c5d3246cfc..ac3808e846ff 100644
+--- a/drivers/gpu/drm/meson/meson_drv.c
++++ b/drivers/gpu/drm/meson/meson_drv.c
+@@ -482,6 +482,17 @@ static int meson_probe_remote(struct platform_device *pdev,
+ 	return count;
+ }
+ 
++static void meson_drv_shutdown(struct platform_device *pdev)
++{
++	struct meson_drm *priv = dev_get_drvdata(&pdev->dev);
++	struct drm_device *drm = priv->drm;
++
++	dev_warn(&pdev->dev, "%s", __func__);
++	//drm_dev_unregister(drm);
++	drm_kms_helper_poll_fini(drm);
++	drm_atomic_helper_shutdown(drm);
++}
++
+ static int meson_drv_probe(struct platform_device *pdev)
+ {
+ 	struct component_match *match = NULL;
+@@ -553,6 +564,7 @@ static const struct dev_pm_ops meson_drv_pm_ops = {
+ 
+ static struct platform_driver meson_drm_platform_driver = {
+ 	.probe      = meson_drv_probe,
++	.shutdown   = meson_drv_shutdown,
+ 	.driver     = {
+ 		.name	= "meson-drm",
+ 		.of_match_table = dt_match,
+-- 
+2.25.1
+

patch/kernel/meson64-dev/0022-WIP-drm-panfrost-Make-sure-MMU-context-lifetime-is-n.patch

@@ -0,0 +1,459 @@
+From 1c37c507b0dbd95ab436ff87f04b3409cb7f8755 Mon Sep 17 00:00:00 2001
+From: Boris Brezillon <boris.brezillon@collabora.com>
+Date: Tue, 4 Feb 2020 15:35:03 +0100
+Subject: [PATCH 22/58] WIP: drm/panfrost: Make sure MMU context lifetime is
+ not bound to panfrost_priv
+
+Jobs can be in-flight when the file descriptor is closed (either because
+the process did not terminate properly, or because it didn't wait for
+all GPU jobs to be finished), and apparently panfrost_job_close() does
+not cancel already running jobs. Let's refcount the MMU context object
+so it's lifetime is no longer bound to the FD lifetime and running jobs
+can finish properly without generating spurious page faults.
+
+Reported-by: Icecream95 <ixn@keemail.me>
+Fixes: 7282f7645d06 ("drm/panfrost: Implement per FD address spaces")
+Cc: <stable@vger.kernel.org>
+Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
+---
+ drivers/gpu/drm/panfrost/panfrost_device.h |   8 +-
+ drivers/gpu/drm/panfrost/panfrost_drv.c    |  50 ++-----
+ drivers/gpu/drm/panfrost/panfrost_gem.c    |  20 ++-
+ drivers/gpu/drm/panfrost/panfrost_job.c    |   4 +-
+ drivers/gpu/drm/panfrost/panfrost_mmu.c    | 160 ++++++++++++++-------
+ drivers/gpu/drm/panfrost/panfrost_mmu.h    |   5 +-
+ 6 files changed, 136 insertions(+), 111 deletions(-)
+
+diff --git a/drivers/gpu/drm/panfrost/panfrost_device.h b/drivers/gpu/drm/panfrost/panfrost_device.h
+index 597cf1459b0a..4c6bdea5537b 100644
+--- a/drivers/gpu/drm/panfrost/panfrost_device.h
++++ b/drivers/gpu/drm/panfrost/panfrost_device.h
+@@ -120,8 +120,12 @@ struct panfrost_device {
+ };
+ 
+ struct panfrost_mmu {
++	struct panfrost_device *pfdev;
++	struct kref refcount;
+ 	struct io_pgtable_cfg pgtbl_cfg;
+ 	struct io_pgtable_ops *pgtbl_ops;
++	struct drm_mm mm;
++	spinlock_t mm_lock;
+ 	int as;
+ 	atomic_t as_count;
+ 	struct list_head list;
+@@ -132,9 +136,7 @@ struct panfrost_file_priv {
+ 
+ 	struct drm_sched_entity sched_entity[NUM_JOB_SLOTS];
+ 
+-	struct panfrost_mmu mmu;
+-	struct drm_mm mm;
+-	spinlock_t mm_lock;
++	struct panfrost_mmu *mmu;
+ };
+ 
+ static inline struct panfrost_device *to_panfrost_device(struct drm_device *ddev)
+diff --git a/drivers/gpu/drm/panfrost/panfrost_drv.c b/drivers/gpu/drm/panfrost/panfrost_drv.c
+index 83a461bdeea8..b2aa8e050314 100644
+--- a/drivers/gpu/drm/panfrost/panfrost_drv.c
++++ b/drivers/gpu/drm/panfrost/panfrost_drv.c
+@@ -417,7 +417,7 @@ static int panfrost_ioctl_madvise(struct drm_device *dev, void *data,
+ 		 * anyway, so let's not bother.
+ 		 */
+ 		if (!list_is_singular(&bo->mappings.list) ||
+-		    WARN_ON_ONCE(first->mmu != &priv->mmu)) {
++		    WARN_ON_ONCE(first->mmu != priv->mmu)) {
+ 			ret = -EINVAL;
+ 			goto out_unlock_mappings;
+ 		}
+@@ -449,32 +449,6 @@ int panfrost_unstable_ioctl_check(void)
+ 	return 0;
+ }
+ 
+-#define PFN_4G		(SZ_4G >> PAGE_SHIFT)
+-#define PFN_4G_MASK	(PFN_4G - 1)
+-#define PFN_16M		(SZ_16M >> PAGE_SHIFT)
+-
+-static void panfrost_drm_mm_color_adjust(const struct drm_mm_node *node,
+-					 unsigned long color,
+-					 u64 *start, u64 *end)
+-{
+-	/* Executable buffers can't start or end on a 4GB boundary */
+-	if (!(color & PANFROST_BO_NOEXEC)) {
+-		u64 next_seg;
+-
+-		if ((*start & PFN_4G_MASK) == 0)
+-			(*start)++;
+-
+-		if ((*end & PFN_4G_MASK) == 0)
+-			(*end)--;
+-
+-		next_seg = ALIGN(*start, PFN_4G);
+-		if (next_seg - *start <= PFN_16M)
+-			*start = next_seg + 1;
+-
+-		*end = min(*end, ALIGN(*start, PFN_4G) - 1);
+-	}
+-}
+-
+ static int
+ panfrost_open(struct drm_device *dev, struct drm_file *file)
+ {
+@@ -489,15 +463,11 @@ panfrost_open(struct drm_device *dev, struct drm_file *file)
+ 	panfrost_priv->pfdev = pfdev;
+ 	file->driver_priv = panfrost_priv;
+ 
+-	spin_lock_init(&panfrost_priv->mm_lock);
+-
+-	/* 4G enough for now. can be 48-bit */
+-	drm_mm_init(&panfrost_priv->mm, SZ_32M >> PAGE_SHIFT, (SZ_4G - SZ_32M) >> PAGE_SHIFT);
+-	panfrost_priv->mm.color_adjust = panfrost_drm_mm_color_adjust;
+-
+-	ret = panfrost_mmu_pgtable_alloc(panfrost_priv);
+-	if (ret)
+-		goto err_pgtable;
++	panfrost_priv->mmu = panfrost_mmu_ctx_create(pfdev);
++	if (IS_ERR(panfrost_priv->mmu)) {
++		ret = PTR_ERR(panfrost_priv->mmu);
++		goto err_free;
++	}
+ 
+ 	ret = panfrost_job_open(panfrost_priv);
+ 	if (ret)
+@@ -506,9 +476,8 @@ panfrost_open(struct drm_device *dev, struct drm_file *file)
+ 	return 0;
+ 
+ err_job:
+-	panfrost_mmu_pgtable_free(panfrost_priv);
+-err_pgtable:
+-	drm_mm_takedown(&panfrost_priv->mm);
++	panfrost_mmu_ctx_put(panfrost_priv->mmu);
++err_free:
+ 	kfree(panfrost_priv);
+ 	return ret;
+ }
+@@ -521,8 +490,7 @@ panfrost_postclose(struct drm_device *dev, struct drm_file *file)
+ 	panfrost_perfcnt_close(file);
+ 	panfrost_job_close(panfrost_priv);
+ 
+-	panfrost_mmu_pgtable_free(panfrost_priv);
+-	drm_mm_takedown(&panfrost_priv->mm);
++	panfrost_mmu_ctx_put(panfrost_priv->mmu);
+ 	kfree(panfrost_priv);
+ }
+ 
+diff --git a/drivers/gpu/drm/panfrost/panfrost_gem.c b/drivers/gpu/drm/panfrost/panfrost_gem.c
+index 3e0723bc36bd..23377481f4e3 100644
+--- a/drivers/gpu/drm/panfrost/panfrost_gem.c
++++ b/drivers/gpu/drm/panfrost/panfrost_gem.c
+@@ -60,7 +60,7 @@ panfrost_gem_mapping_get(struct panfrost_gem_object *bo,
+ 
+ 	mutex_lock(&bo->mappings.lock);
+ 	list_for_each_entry(iter, &bo->mappings.list, node) {
+-		if (iter->mmu == &priv->mmu) {
++		if (iter->mmu == priv->mmu) {
+ 			kref_get(&iter->refcount);
+ 			mapping = iter;
+ 			break;
+@@ -74,16 +74,13 @@ panfrost_gem_mapping_get(struct panfrost_gem_object *bo,
+ static void
+ panfrost_gem_teardown_mapping(struct panfrost_gem_mapping *mapping)
+ {
+-	struct panfrost_file_priv *priv;
+-
+ 	if (mapping->active)
+ 		panfrost_mmu_unmap(mapping);
+ 
+-	priv = container_of(mapping->mmu, struct panfrost_file_priv, mmu);
+-	spin_lock(&priv->mm_lock);
++	spin_lock(&mapping->mmu->mm_lock);
+ 	if (drm_mm_node_allocated(&mapping->mmnode))
+ 		drm_mm_remove_node(&mapping->mmnode);
+-	spin_unlock(&priv->mm_lock);
++	spin_unlock(&mapping->mmu->mm_lock);
+ }
+ 
+ static void panfrost_gem_mapping_release(struct kref *kref)
+@@ -94,6 +91,7 @@ static void panfrost_gem_mapping_release(struct kref *kref)
+ 
+ 	panfrost_gem_teardown_mapping(mapping);
+ 	drm_gem_object_put(&mapping->obj->base.base);
++	panfrost_mmu_ctx_put(mapping->mmu);
+ 	kfree(mapping);
+ }
+ 
+@@ -143,11 +141,11 @@ int panfrost_gem_open(struct drm_gem_object *obj, struct drm_file *file_priv)
+ 	else
+ 		align = size >= SZ_2M ? SZ_2M >> PAGE_SHIFT : 0;
+ 
+-	mapping->mmu = &priv->mmu;
+-	spin_lock(&priv->mm_lock);
+-	ret = drm_mm_insert_node_generic(&priv->mm, &mapping->mmnode,
++	mapping->mmu = panfrost_mmu_ctx_get(priv->mmu);
++	spin_lock(&mapping->mmu->mm_lock);
++	ret = drm_mm_insert_node_generic(&mapping->mmu->mm, &mapping->mmnode,
+ 					 size >> PAGE_SHIFT, align, color, 0);
+-	spin_unlock(&priv->mm_lock);
++	spin_unlock(&mapping->mmu->mm_lock);
+ 	if (ret)
+ 		goto err;
+ 
+@@ -176,7 +174,7 @@ void panfrost_gem_close(struct drm_gem_object *obj, struct drm_file *file_priv)
+ 
+ 	mutex_lock(&bo->mappings.lock);
+ 	list_for_each_entry(iter, &bo->mappings.list, node) {
+-		if (iter->mmu == &priv->mmu) {
++		if (iter->mmu == priv->mmu) {
+ 			mapping = iter;
+ 			list_del(&iter->node);
+ 			break;
+diff --git a/drivers/gpu/drm/panfrost/panfrost_job.c b/drivers/gpu/drm/panfrost/panfrost_job.c
+index d6d5c15184f9..b600618abb49 100644
+--- a/drivers/gpu/drm/panfrost/panfrost_job.c
++++ b/drivers/gpu/drm/panfrost/panfrost_job.c
+@@ -165,7 +165,7 @@ static void panfrost_job_hw_submit(struct panfrost_job *job, int js)
+ 		return;
+ 	}
+ 
+-	cfg = panfrost_mmu_as_get(pfdev, &job->file_priv->mmu);
++	cfg = panfrost_mmu_as_get(pfdev, job->file_priv->mmu);
+ 
+ 	job_write(pfdev, JS_HEAD_NEXT_LO(js), jc_head & 0xFFFFFFFF);
+ 	job_write(pfdev, JS_HEAD_NEXT_HI(js), jc_head >> 32);
+@@ -524,7 +524,7 @@ static irqreturn_t panfrost_job_irq_handler(int irq, void *data)
+ 			if (job) {
+ 				pfdev->jobs[j] = NULL;
+ 
+-				panfrost_mmu_as_put(pfdev, &job->file_priv->mmu);
++				panfrost_mmu_as_put(pfdev, job->file_priv->mmu);
+ 				panfrost_devfreq_record_idle(&pfdev->pfdevfreq);
+ 
+ 				dma_fence_signal_locked(job->done_fence);
+diff --git a/drivers/gpu/drm/panfrost/panfrost_mmu.c b/drivers/gpu/drm/panfrost/panfrost_mmu.c
+index 0581186ebfb3..569509c2ba27 100644
+--- a/drivers/gpu/drm/panfrost/panfrost_mmu.c
++++ b/drivers/gpu/drm/panfrost/panfrost_mmu.c
+@@ -1,5 +1,8 @@
+ // SPDX-License-Identifier:	GPL-2.0
+ /* Copyright 2019 Linaro, Ltd, Rob Herring <robh@kernel.org> */
++
++#include <drm/panfrost_drm.h>
++
+ #include <linux/atomic.h>
+ #include <linux/bitfield.h>
+ #include <linux/delay.h>
+@@ -337,7 +340,7 @@ static void mmu_tlb_inv_context_s1(void *cookie)
+ 
+ static void mmu_tlb_sync_context(void *cookie)
+ {
+-	//struct panfrost_device *pfdev = cookie;
++	//struct panfrost_mmu *mmu = cookie;
+ 	// TODO: Wait 1000 GPU cycles for HW_ISSUE_6367/T60X
+ }
+ 
+@@ -352,57 +355,10 @@ static const struct iommu_flush_ops mmu_tlb_ops = {
+ 	.tlb_flush_walk = mmu_tlb_flush_walk,
+ };
+ 
+-int panfrost_mmu_pgtable_alloc(struct panfrost_file_priv *priv)
+-{
+-	struct panfrost_mmu *mmu = &priv->mmu;
+-	struct panfrost_device *pfdev = priv->pfdev;
+-
+-	INIT_LIST_HEAD(&mmu->list);
+-	mmu->as = -1;
+-
+-	mmu->pgtbl_cfg = (struct io_pgtable_cfg) {
+-		.pgsize_bitmap	= SZ_4K | SZ_2M,
+-		.ias		= FIELD_GET(0xff, pfdev->features.mmu_features),
+-		.oas		= FIELD_GET(0xff00, pfdev->features.mmu_features),
+-		.coherent_walk	= pfdev->coherent,
+-		.tlb		= &mmu_tlb_ops,
+-		.iommu_dev	= pfdev->dev,
+-	};
+-
+-	mmu->pgtbl_ops = alloc_io_pgtable_ops(ARM_MALI_LPAE, &mmu->pgtbl_cfg,
+-					      priv);
+-	if (!mmu->pgtbl_ops)
+-		return -EINVAL;
+-
+-	return 0;
+-}
+-
+-void panfrost_mmu_pgtable_free(struct panfrost_file_priv *priv)
+-{
+-	struct panfrost_device *pfdev = priv->pfdev;
+-	struct panfrost_mmu *mmu = &priv->mmu;
+-
+-	spin_lock(&pfdev->as_lock);
+-	if (mmu->as >= 0) {
+-		pm_runtime_get_noresume(pfdev->dev);
+-		if (pm_runtime_active(pfdev->dev))
+-			panfrost_mmu_disable(pfdev, mmu->as);
+-		pm_runtime_put_autosuspend(pfdev->dev);
+-
+-		clear_bit(mmu->as, &pfdev->as_alloc_mask);
+-		clear_bit(mmu->as, &pfdev->as_in_use_mask);
+-		list_del(&mmu->list);
+-	}
+-	spin_unlock(&pfdev->as_lock);
+-
+-	free_io_pgtable_ops(mmu->pgtbl_ops);
+-}
+-
+ static struct panfrost_gem_mapping *
+ addr_to_mapping(struct panfrost_device *pfdev, int as, u64 addr)
+ {
+ 	struct panfrost_gem_mapping *mapping = NULL;
+-	struct panfrost_file_priv *priv;
+ 	struct drm_mm_node *node;
+ 	u64 offset = addr >> PAGE_SHIFT;
+ 	struct panfrost_mmu *mmu;
+@@ -415,11 +371,10 @@ addr_to_mapping(struct panfrost_device *pfdev, int as, u64 addr)
+ 	goto out;
+ 
+ found_mmu:
+-	priv = container_of(mmu, struct panfrost_file_priv, mmu);
+ 
+-	spin_lock(&priv->mm_lock);
++	spin_lock(&mmu->mm_lock);
+ 
+-	drm_mm_for_each_node(node, &priv->mm) {
++	drm_mm_for_each_node(node, &mmu->mm) {
+ 		if (offset >= node->start &&
+ 		    offset < (node->start + node->size)) {
+ 			mapping = drm_mm_node_to_panfrost_mapping(node);
+@@ -429,7 +384,7 @@ addr_to_mapping(struct panfrost_device *pfdev, int as, u64 addr)
+ 		}
+ 	}
+ 
+-	spin_unlock(&priv->mm_lock);
++	spin_unlock(&mmu->mm_lock);
+ out:
+ 	spin_unlock(&pfdev->as_lock);
+ 	return mapping;
+@@ -542,6 +497,107 @@ static int panfrost_mmu_map_fault_addr(struct panfrost_device *pfdev, int as,
+ 	return ret;
+ }
+ 
++static void panfrost_mmu_release_ctx(struct kref *kref)
++{
++	struct panfrost_mmu *mmu = container_of(kref, struct panfrost_mmu,
++						refcount);
++	struct panfrost_device *pfdev = mmu->pfdev;
++
++	spin_lock(&pfdev->as_lock);
++	if (mmu->as >= 0) {
++		pm_runtime_get_noresume(pfdev->dev);
++		if (pm_runtime_active(pfdev->dev))
++			panfrost_mmu_disable(pfdev, mmu->as);
++		pm_runtime_put_autosuspend(pfdev->dev);
++
++		clear_bit(mmu->as, &pfdev->as_alloc_mask);
++		clear_bit(mmu->as, &pfdev->as_in_use_mask);
++		list_del(&mmu->list);
++	}
++	spin_unlock(&pfdev->as_lock);
++
++	free_io_pgtable_ops(mmu->pgtbl_ops);
++	drm_mm_takedown(&mmu->mm);
++	kfree(mmu);
++}
++
++void panfrost_mmu_ctx_put(struct panfrost_mmu *mmu)
++{
++	kref_put(&mmu->refcount, panfrost_mmu_release_ctx);
++}
++
++struct panfrost_mmu *panfrost_mmu_ctx_get(struct panfrost_mmu *mmu)
++{
++	kref_get(&mmu->refcount);
++
++	return mmu;
++}
++
++#define PFN_4G		(SZ_4G >> PAGE_SHIFT)
++#define PFN_4G_MASK	(PFN_4G - 1)
++#define PFN_16M		(SZ_16M >> PAGE_SHIFT)
++
++static void panfrost_drm_mm_color_adjust(const struct drm_mm_node *node,
++					 unsigned long color,
++					 u64 *start, u64 *end)
++{
++	/* Executable buffers can't start or end on a 4GB boundary */
++	if (!(color & PANFROST_BO_NOEXEC)) {
++		u64 next_seg;
++
++		if ((*start & PFN_4G_MASK) == 0)
++			(*start)++;
++
++		if ((*end & PFN_4G_MASK) == 0)
++			(*end)--;
++
++		next_seg = ALIGN(*start, PFN_4G);
++		if (next_seg - *start <= PFN_16M)
++			*start = next_seg + 1;
++
++		*end = min(*end, ALIGN(*start, PFN_4G) - 1);
++	}
++}
++
++struct panfrost_mmu *panfrost_mmu_ctx_create(struct panfrost_device *pfdev)
++{
++	struct panfrost_mmu *mmu;
++
++	mmu = kzalloc(sizeof(*mmu), GFP_KERNEL);
++	if (!mmu)
++		return ERR_PTR(-ENOMEM);
++
++	mmu->pfdev = pfdev;
++	spin_lock_init(&mmu->mm_lock);
++
++	/* 4G enough for now. can be 48-bit */
++	drm_mm_init(&mmu->mm, SZ_32M >> PAGE_SHIFT, (SZ_4G - SZ_32M) >> PAGE_SHIFT);
++	mmu->mm.color_adjust = panfrost_drm_mm_color_adjust;
++
++	INIT_LIST_HEAD(&mmu->list);
++	mmu->as = -1;
++
++	mmu->pgtbl_cfg = (struct io_pgtable_cfg) {
++		.pgsize_bitmap	= SZ_4K | SZ_2M,
++		.ias		= FIELD_GET(0xff, pfdev->features.mmu_features),
++		.oas		= FIELD_GET(0xff00, pfdev->features.mmu_features),
++		.coherent_walk	= pfdev->coherent,
++		.tlb		= &mmu_tlb_ops,
++		.iommu_dev	= pfdev->dev,
++	};
++
++	mmu->pgtbl_ops = alloc_io_pgtable_ops(ARM_MALI_LPAE, &mmu->pgtbl_cfg,
++					      mmu);
++	if (!mmu->pgtbl_ops) {
++		kfree(mmu);
++		return ERR_PTR(-EINVAL);
++	}
++
++	kref_init(&mmu->refcount);
++
++	return mmu;
++}
++
+ static const char *access_type_name(struct panfrost_device *pfdev,
+ 		u32 fault_status)
+ {
+diff --git a/drivers/gpu/drm/panfrost/panfrost_mmu.h b/drivers/gpu/drm/panfrost/panfrost_mmu.h
+index 44fc2edf63ce..cc2a0d307feb 100644
+--- a/drivers/gpu/drm/panfrost/panfrost_mmu.h
++++ b/drivers/gpu/drm/panfrost/panfrost_mmu.h
+@@ -18,7 +18,8 @@ void panfrost_mmu_reset(struct panfrost_device *pfdev);
+ u32 panfrost_mmu_as_get(struct panfrost_device *pfdev, struct panfrost_mmu *mmu);
+ void panfrost_mmu_as_put(struct panfrost_device *pfdev, struct panfrost_mmu *mmu);
+ 
+-int panfrost_mmu_pgtable_alloc(struct panfrost_file_priv *priv);
+-void panfrost_mmu_pgtable_free(struct panfrost_file_priv *priv);
++struct panfrost_mmu *panfrost_mmu_ctx_get(struct panfrost_mmu *mmu);
++void panfrost_mmu_ctx_put(struct panfrost_mmu *mmu);
++struct panfrost_mmu *panfrost_mmu_ctx_create(struct panfrost_device *pfdev);
+ 
+ #endif
+-- 
+2.25.1
+

patch/kernel/meson64-dev/0023-WIP-arm64-meson-add-Amlogic-Meson-GX-PM-Suspend.patch

@@ -0,0 +1,135 @@
+From 700cd65f3e839c539477ba6194ed54989af2557e Mon Sep 17 00:00:00 2001
+From: Neil Armstrong <narmstrong@baylibre.com>
+Date: Thu, 3 Nov 2016 15:29:23 +0100
+Subject: [PATCH 23/58] WIP: arm64: meson: add Amlogic Meson GX PM Suspend
+
+The Amlogic Meson GX SoCs uses a non-standard argument to the
+PSCI CPU_SUSPEND call to enter system suspend.
+
+Implement such call within platform_suspend_ops.
+
+Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
+---
+ drivers/firmware/meson/Kconfig       |  6 ++
+ drivers/firmware/meson/Makefile      |  1 +
+ drivers/firmware/meson/meson_gx_pm.c | 86 ++++++++++++++++++++++++++++
+ 3 files changed, 93 insertions(+)
+ create mode 100644 drivers/firmware/meson/meson_gx_pm.c
+
+diff --git a/drivers/firmware/meson/Kconfig b/drivers/firmware/meson/Kconfig
+index f2fdd3756648..d3ead92ac61b 100644
+--- a/drivers/firmware/meson/Kconfig
++++ b/drivers/firmware/meson/Kconfig
+@@ -9,3 +9,9 @@ config MESON_SM
+ 	depends on ARM64_4K_PAGES
+ 	help
+ 	  Say y here to enable the Amlogic secure monitor driver
++
++config MESON_GX_PM
++	bool
++	default ARCH_MESON if ARM64
++	help
++	  Say y here to enable the Amlogic GX SoC Power Management
+diff --git a/drivers/firmware/meson/Makefile b/drivers/firmware/meson/Makefile
+index c6c09483b622..0193cdfee32f 100644
+--- a/drivers/firmware/meson/Makefile
++++ b/drivers/firmware/meson/Makefile
+@@ -1,2 +1,3 @@
+ # SPDX-License-Identifier: GPL-2.0-only
+ obj-$(CONFIG_MESON_SM) +=	meson_sm.o
++obj-$(CONFIG_MESON_GX_PM) +=	meson_gx_pm.o
+diff --git a/drivers/firmware/meson/meson_gx_pm.c b/drivers/firmware/meson/meson_gx_pm.c
+new file mode 100644
+index 000000000000..c104c2e4c77f
+--- /dev/null
++++ b/drivers/firmware/meson/meson_gx_pm.c
+@@ -0,0 +1,86 @@
++/*
++ * Amlogic Meson GX Power Management
++ *
++ * Copyright (c) 2016 Baylibre, SAS.
++ * Author: Neil Armstrong <narmstrong@baylibre.com>
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of version 2 of the GNU General Public License as
++ * published by the Free Software Foundation.
++ *
++ * This program is distributed in the hope that it will be useful, but WITHOUT
++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
++ * more details.
++ */
++
++#include <linux/module.h>
++#include <linux/of.h>
++#include <linux/platform_device.h>
++#include <linux/suspend.h>
++#include <linux/arm-smccc.h>
++
++#include <uapi/linux/psci.h>
++
++#include <asm/suspend.h>
++
++/*
++ * The Amlogic GX SoCs uses a special argument value to the
++ * PSCI CPU_SUSPEND method to enter SUSPEND_MEM.
++ */
++
++#define MESON_SUSPEND_PARAM	0x0010000
++#define PSCI_FN_NATIVE(version, name)	PSCI_##version##_FN64_##name
++
++static int meson_gx_suspend_finish(unsigned long arg)
++{
++	struct arm_smccc_res res;
++
++	arm_smccc_smc(PSCI_FN_NATIVE(0_2, CPU_SUSPEND), arg,
++		      virt_to_phys(cpu_resume), 0, 0, 0, 0, 0, &res);
++
++	return res.a0;
++}
++
++static int meson_gx_suspend_enter(suspend_state_t state)
++{
++	switch (state) {
++	case PM_SUSPEND_MEM:
++		return cpu_suspend(MESON_SUSPEND_PARAM,
++				   meson_gx_suspend_finish);
++	}
++
++	return -EINVAL;
++}
++
++static const struct platform_suspend_ops meson_gx_pm_ops = {
++		.enter = meson_gx_suspend_enter,
++		.valid = suspend_valid_only_mem,
++};
++
++static const struct of_device_id meson_gx_pm_match[] = {
++	{ .compatible = "amlogic,meson-gx-pm", },
++	{ /* sentinel */ },
++};
++MODULE_DEVICE_TABLE(of, meson_gx_pm_match);
++
++static int meson_gx_pm_probe(struct platform_device *pdev)
++{
++	suspend_set_ops(&meson_gx_pm_ops);
++
++	return 0;
++}
++
++static struct platform_driver meson_gx_pm_driver = {
++	.probe = meson_gx_pm_probe,
++	.driver = {
++		.name = "meson-gx-pm",
++		.of_match_table = meson_gx_pm_match,
++	},
++};
++
++module_platform_driver(meson_gx_pm_driver);
++
++MODULE_AUTHOR("Neil Armstrong <narmstrong@baylibre.com>");
++MODULE_DESCRIPTION("Amlogic Meson GX PM driver");
++MODULE_LICENSE("GPL v2");
+-- 
+2.25.1
+

patch/kernel/meson64-dev/0024-WIP-arm64-dts-meson-add-support-for-GX-PM-and-Virtua.patch

@@ -0,0 +1,41 @@
+From 42a1afe49ebd6f14b852523ec7b6bad2a72585eb Mon Sep 17 00:00:00 2001
+From: Neil Armstrong <narmstrong@baylibre.com>
+Date: Thu, 3 Nov 2016 15:29:25 +0100
+Subject: [PATCH 24/58] WIP: arm64: dts: meson: add support for GX PM and
+ Virtual RTC
+
+Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
+---
+ arch/arm64/boot/dts/amlogic/meson-gx.dtsi | 9 +++++++++
+ 1 file changed, 9 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
+index 14ff467c6be8..2c7afe34112b 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
++++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
+@@ -221,6 +221,10 @@ sm: secure-monitor {
+ 		};
+ 	};
+ 
++	system-suspend {
++		compatible = "amlogic,meson-gx-pm";
++	};
++
+ 	efuse: efuse {
+ 		compatible = "amlogic,meson-gx-efuse", "amlogic,meson-gxbb-efuse";
+ 		#address-cells = <1>;
+@@ -458,6 +462,11 @@ clkc_AO: clock-controller {
+ 				};
+ 			};
+ 
++			vrtc: rtc@a8 {
++				compatible = "amlogic,meson-vrtc";
++				reg = <0x0 0x000a8 0x0 0x4>;
++			};
++
+ 			cec_AO: cec@100 {
+ 				compatible = "amlogic,meson-gx-ao-cec";
+ 				reg = <0x0 0x00100 0x0 0x14>;
+-- 
+2.25.1
+

patch/kernel/meson64-dev/0025-WIP-arm64-dts-meson-add-rtc-vrtc-aliases-to-Khadas-V.patch

@@ -0,0 +1,30 @@
+From 39fd5fbd1d33a1789b0a7d93f30a2ab2f60a3e21 Mon Sep 17 00:00:00 2001
+From: Christian Hewitt <christianshewitt@gmail.com>
+Date: Thu, 21 Jan 2021 01:35:36 +0000
+Subject: [PATCH 25/58] WIP: arm64: dts: meson: add rtc/vrtc aliases to Khadas
+ VIM
+
+Add aliases to ensure the vrtc time (which normally proves first) is /dev/rtc1
+while the onboard rtc chip claims /dev/rtc0.
+
+Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
+---
+ arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts
+index 60feac0179c0..df287b12975b 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts
++++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts
+@@ -29,6 +29,8 @@ button-function {
+ 	aliases {
+ 		serial2 = &uart_AO_B;
+ 		ethernet0 = &ethmac;
++		rtc0 = &rtc;
++		rtc1 = &vrtc;
+ 	};
+ 
+ 	gpio-keys-polled {
+-- 
+2.25.1
+

patch/kernel/meson64-dev/0026-WIP-arm64-dts-meson-add-rtc-vrtc-aliases-to-Minix-NE.patch

@@ -0,0 +1,32 @@
+From a44c5fc233c2834db3f977b1ec3de12a32b68c3a Mon Sep 17 00:00:00 2001
+From: Christian Hewitt <christianshewitt@gmail.com>
+Date: Mon, 1 Feb 2021 19:27:40 +0000
+Subject: [PATCH 26/58] WIP: arm64: dts: meson: add rtc/vrtc aliases to Minix
+ NEO U9-H
+
+Add node aliases to prevent meson-vrtc from claiming /dev/rtc0
+
+Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
+---
+ arch/arm64/boot/dts/amlogic/meson-gxm-minix-neo-u9h.dts | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-minix-neo-u9h.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-minix-neo-u9h.dts
+index a414cd39c2b1..443cea738e53 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-gxm-minix-neo-u9h.dts
++++ b/arch/arm64/boot/dts/amlogic/meson-gxm-minix-neo-u9h.dts
+@@ -14,6 +14,11 @@ / {
+ 	compatible = "minix,neo-u9h", "amlogic,s912", "amlogic,meson-gxm";
+ 	model = "Minix Neo U9-H";
+ 
++	aliases {
++		rtc0 = &rtc;
++		rtc1 = &vrtc;
++	};
++
+ 	leds {
+ 		compatible = "gpio-leds";
+ 
+-- 
+2.25.1
+

patch/kernel/meson64-dev/0027-WIP-arm64-dts-meson-add-spifc-node-to-ODROID-HC4.patch

@@ -0,0 +1,41 @@
+From c56aba5bb32d03e1c8806363dfa50245175907b4 Mon Sep 17 00:00:00 2001
+From: Christian Hewitt <christianshewitt@gmail.com>
+Date: Thu, 28 Jan 2021 17:15:22 +0000
+Subject: [PATCH 27/58] WIP: arm64: dts: meson: add spifc node to ODROID-HC4
+
+Add a node for the XT25F128B SPI-NOR flash to make it accessible
+from Linux.
+
+Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
+---
+ .../boot/dts/amlogic/meson-sm1-odroid-hc4.dts      | 14 ++++++++++++++
+ 1 file changed, 14 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-odroid-hc4.dts b/arch/arm64/boot/dts/amlogic/meson-sm1-odroid-hc4.dts
+index bf15700c4b15..5268d064ba1b 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-sm1-odroid-hc4.dts
++++ b/arch/arm64/boot/dts/amlogic/meson-sm1-odroid-hc4.dts
+@@ -90,6 +90,20 @@ &sd_emmc_c {
+ 	status = "disabled";
+ };
+ 
++&spifc {
++	status = "okay";
++	pinctrl-0 = <&nor_pins>;
++	pinctrl-names = "default";
++
++	xt25f128b: spi-flash@0 {
++		#address-cells = <1>;
++		#size-cells = <1>;
++		compatible = "jedec,spi-nor";
++		reg = <0>;
++		spi-max-frequency = <104000000>;
++	};
++};
++
+ &usb {
+ 	phys = <&usb2_phy0>, <&usb2_phy1>;
+ 	phy-names = "usb2-phy0", "usb2-phy1";
+-- 
+2.25.1
+

patch/kernel/meson64-dev/0028-WIP-arm64-dts-meson-add-audio-playback-to-nexbox-a1.patch

@@ -0,0 +1,125 @@
+From ae3996a1d895d4505a06004381ecf2e45349245c Mon Sep 17 00:00:00 2001
+From: Christian Hewitt <christianshewitt@gmail.com>
+Date: Fri, 15 May 2020 07:23:05 +0000
+Subject: [PATCH 28/58] WIP: arm64: dts: meson: add audio playback to nexbox-a1
+
+Add initial support is limited to HDMI i2s and SPDIF (LPCM).
+
+Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
+---
+ .../boot/dts/amlogic/meson-gxm-nexbox-a1.dts  | 80 +++++++++++++++++++
+ 1 file changed, 80 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts
+index dfa7a37a1281..a8c9ffbd97a4 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts
++++ b/arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts
+@@ -10,6 +10,7 @@
+ /dts-v1/;
+ 
+ #include "meson-gxm.dtsi"
++#include <dt-bindings/sound/meson-aiu.h>
+ 
+ / {
+ 	compatible = "nexbox,a1", "amlogic,s912", "amlogic,meson-gxm";
+@@ -24,11 +25,37 @@ chosen {
+ 		stdout-path = "serial0:115200n8";
+ 	};
+ 
++	spdif_dit: audio-codec-0 {
++		#sound-dai-cells = <0>;
++		compatible = "linux,spdif-dit";
++		status = "okay";
++		sound-name-prefix = "DIT";
++	};
++
+ 	memory@0 {
+ 		device_type = "memory";
+ 		reg = <0x0 0x0 0x0 0x80000000>;
+ 	};
+ 
++	vddio_ao18: regulator-vddio_ao18 {
++		compatible = "regulator-fixed";
++		regulator-name = "VDDIO_AO18";
++		regulator-min-microvolt = <1800000>;
++		regulator-max-microvolt = <1800000>;
++	};
++
++	hdmi_5v: regulator-hdmi-5v {
++		compatible = "regulator-fixed";
++
++		regulator-name = "HDMI_5V";
++		regulator-min-microvolt = <5000000>;
++		regulator-max-microvolt = <5000000>;
++
++		gpio = <&gpio GPIOH_3 GPIO_ACTIVE_HIGH>;
++		enable-active-high;
++		regulator-always-on;
++	};
++
+ 	vddio_boot: regulator-vddio-boot {
+ 		compatible = "regulator-fixed";
+ 		regulator-name = "VDDIO_BOOT";
+@@ -75,6 +102,59 @@ hdmi_connector_in: endpoint {
+ 			};
+ 		};
+ 	};
++
++	sound {
++		compatible = "amlogic,gx-sound-card";
++		model = "NEXBOX-A1";
++		assigned-clocks = <&clkc CLKID_MPLL0>,
++				  <&clkc CLKID_MPLL1>,
++				  <&clkc CLKID_MPLL2>;
++		assigned-clock-parents = <0>, <0>, <0>;
++		assigned-clock-rates = <294912000>,
++				       <270950400>,
++				       <393216000>;
++		status = "okay";
++
++		dai-link-0 {
++			sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>;
++		};
++
++		dai-link-1 {
++			sound-dai = <&aiu AIU_CPU CPU_SPDIF_FIFO>;
++		};
++
++		dai-link-2 {
++			sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>;
++			dai-format = "i2s";
++			mclk-fs = <256>;
++
++			codec-0 {
++				sound-dai = <&aiu AIU_HDMI CTRL_I2S>;
++			};
++		};
++
++		dai-link-3 {
++			sound-dai = <&aiu AIU_CPU CPU_SPDIF_ENCODER>;
++
++			codec-0 {
++				sound-dai = <&spdif_dit>;
++			};
++		};
++
++		dai-link-4 {
++			sound-dai = <&aiu AIU_HDMI CTRL_OUT>;
++
++			codec-0 {
++				sound-dai = <&hdmi_tx>;
++			};
++		};
++	};
++};
++
++&aiu {
++	status = "okay";
++	pinctrl-0 = <&spdif_out_h_pins>;
++	pinctrl-names = "default";
+ };
+ 
+ &cec_AO {
+-- 
+2.25.1
+

patch/kernel/meson64-dev/0029-WIP-arm64-dts-meson-add-audio-playback-to-p201.patch

@@ -0,0 +1,70 @@
+From d7883bb41fa93676e84b27306f07b982d39eaa89 Mon Sep 17 00:00:00 2001
+From: Christian Hewitt <christianshewitt@gmail.com>
+Date: Fri, 15 May 2020 07:52:47 +0000
+Subject: [PATCH 29/58] WIP: arm64: dts: meson: add audio playback to p201
+
+Add initial audio support limited to HDMI i2s.
+
+Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
+---
+ .../boot/dts/amlogic/meson-gxbb-p201.dts      | 40 +++++++++++++++++++
+ 1 file changed, 40 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-p201.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-p201.dts
+index 150a82f3b2d7..22bd0070146b 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-p201.dts
++++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-p201.dts
+@@ -8,10 +8,50 @@
+ /dts-v1/;
+ 
+ #include "meson-gxbb-p20x.dtsi"
++#include <dt-bindings/sound/meson-aiu.h>
+ 
+ / {
+ 	compatible = "amlogic,p201", "amlogic,meson-gxbb";
+ 	model = "Amlogic Meson GXBB P201 Development Board";
++
++	sound {
++		compatible = "amlogic,gx-sound-card";
++		model = "P201";
++		assigned-clocks = <&clkc CLKID_MPLL0>,
++				  <&clkc CLKID_MPLL1>,
++				  <&clkc CLKID_MPLL2>;
++		assigned-clock-parents = <0>, <0>, <0>;
++		assigned-clock-rates = <294912000>,
++				       <270950400>,
++				       <393216000>;
++		status = "okay";
++
++		dai-link-0 {
++			sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>;
++		};
++
++		dai-link-1 {
++			sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>;
++			dai-format = "i2s";
++			mclk-fs = <256>;
++
++			codec-0 {
++				sound-dai = <&aiu AIU_HDMI CTRL_I2S>;
++			};
++		};
++
++		dai-link-2 {
++			sound-dai = <&aiu AIU_HDMI CTRL_OUT>;
++
++			codec-0 {
++				sound-dai = <&hdmi_tx>;
++			};
++		};
++	};
++};
++
++&aiu {
++	status = "okay";
+ };
+ 
+ &ethmac {
+-- 
+2.25.1
+

patch/kernel/meson64-dev/0030-WIP-arm64-dts-meson-add-audio-playback-to-p200.patch

@@ -0,0 +1,99 @@
+From d95a5829ef1ba7e9778dbaf7605dab90d592469f Mon Sep 17 00:00:00 2001
+From: Christian Hewitt <christianshewitt@gmail.com>
+Date: Fri, 15 May 2020 07:56:15 +0000
+Subject: [PATCH 30/58] WIP: arm64: dts: meson: add audio playback to p200
+
+Add initial support limited to HDMI i2s and SPDIF (LPCM).
+
+Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
+---
+ .../boot/dts/amlogic/meson-gxbb-p200.dts      | 61 +++++++++++++++++++
+ 1 file changed, 61 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts
+index 3c93d1898b40..27b3ab20f070 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts
++++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts
+@@ -9,11 +9,19 @@
+ 
+ #include "meson-gxbb-p20x.dtsi"
+ #include <dt-bindings/input/input.h>
++#include <dt-bindings/sound/meson-aiu.h>
+ 
+ / {
+ 	compatible = "amlogic,p200", "amlogic,meson-gxbb";
+ 	model = "Amlogic Meson GXBB P200 Development Board";
+ 
++	spdif_dit: audio-codec-0 {
++		#sound-dai-cells = <0>;
++		compatible = "linux,spdif-dit";
++		status = "okay";
++		sound-name-prefix = "DIT";
++	};
++
+ 	avdd18_usb_adc: regulator-avdd18_usb_adc {
+ 		compatible = "regulator-fixed";
+ 		regulator-name = "AVDD18_USB_ADC";
+@@ -57,6 +65,59 @@ button-menu {
+ 			press-threshold-microvolt = <0>; /* 0% */
+ 		};
+ 	};
++
++	sound {
++		compatible = "amlogic,gx-sound-card";
++		model = "P200";
++		assigned-clocks = <&clkc CLKID_MPLL0>,
++				  <&clkc CLKID_MPLL1>,
++				  <&clkc CLKID_MPLL2>;
++		assigned-clock-parents = <0>, <0>, <0>;
++		assigned-clock-rates = <294912000>,
++				       <270950400>,
++				       <393216000>;
++		status = "okay";
++
++		dai-link-0 {
++			sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>;
++		};
++
++		dai-link-1 {
++			sound-dai = <&aiu AIU_CPU CPU_SPDIF_FIFO>;
++		};
++
++		dai-link-2 {
++			sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>;
++			dai-format = "i2s";
++			mclk-fs = <256>;
++
++			codec-0 {
++				sound-dai = <&aiu AIU_HDMI CTRL_I2S>;
++			};
++		};
++
++		dai-link-3 {
++			sound-dai = <&aiu AIU_CPU CPU_SPDIF_ENCODER>;
++
++			codec-0 {
++				sound-dai = <&spdif_dit>;
++			};
++		};
++
++		dai-link-4 {
++			sound-dai = <&aiu AIU_HDMI CTRL_OUT>;
++
++			codec-0 {
++				sound-dai = <&hdmi_tx>;
++			};
++		};
++	};
++};
++
++&aiu {
++	status = "okay";
++	pinctrl-0 = <&spdif_out_y_pins>;
++	pinctrl-names = "default";
+ };
+ 
+ &ethmac {
+-- 
+2.25.1
+

patch/kernel/meson64-dev/0031-WIP-arm64-dts-meson-add-audio-playback-to-p212-s905x.patch

@@ -0,0 +1,74 @@
+From 7fad546b01a485b99119028d9510f4abb368c1b1 Mon Sep 17 00:00:00 2001
+From: Christian Hewitt <christianshewitt@gmail.com>
+Date: Fri, 15 May 2020 08:02:54 +0000
+Subject: [PATCH 31/58] WIP: arm64: dts: meson: add audio playback to
+ p212-s905x dtsi
+
+Add initial audio support limited to HDMI i2s.
+
+Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
+---
+ .../dts/amlogic/meson-gxl-s905x-p212.dtsi     | 40 +++++++++++++++++++
+ 1 file changed, 40 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi
+index 05cb2f5e5c36..5d41d93bd008 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi
++++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi
+@@ -11,6 +11,7 @@
+ /* Common DTSI for devices which are based on the P212 reference board. */
+ 
+ #include "meson-gxl-s905x.dtsi"
++#include <dt-bindings/sound/meson-aiu.h>
+ 
+ / {
+ 	aliases {
+@@ -85,6 +86,45 @@ sdio_pwrseq: sdio-pwrseq {
+ 		clocks = <&wifi32k>;
+ 		clock-names = "ext_clock";
+ 	};
++
++	sound {
++		compatible = "amlogic,gx-sound-card";
++		model = "S905X-P212";
++		assigned-clocks = <&clkc CLKID_MPLL0>,
++				  <&clkc CLKID_MPLL1>,
++				  <&clkc CLKID_MPLL2>;
++		assigned-clock-parents = <0>, <0>, <0>;
++		assigned-clock-rates = <294912000>,
++				       <270950400>,
++				       <393216000>;
++		status = "okay";
++
++		dai-link-0 {
++			sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>;
++		};
++
++		dai-link-1 {
++			sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>;
++			dai-format = "i2s";
++			mclk-fs = <256>;
++
++			codec-0 {
++				sound-dai = <&aiu AIU_HDMI CTRL_I2S>;
++			};
++		};
++
++		dai-link-2 {
++			sound-dai = <&aiu AIU_HDMI CTRL_OUT>;
++
++			codec-0 {
++				sound-dai = <&hdmi_tx>;
++			};
++		};
++	};
++};
++
++&aiu {
++	status = "okay";
+ };
+ 
+ &ethmac {
+-- 
+2.25.1
+

patch/kernel/meson64-dev/0032-WIP-arm64-dts-meson-add-audio-playback-to-rbox-pro.patch

@@ -0,0 +1,127 @@
+From fbd19b8e193d7389a58fede058304200b978f205 Mon Sep 17 00:00:00 2001
+From: Christian Hewitt <christianshewitt@gmail.com>
+Date: Fri, 15 May 2020 08:13:00 +0000
+Subject: [PATCH 32/58] WIP: arm64: dts: meson: add audio playback to rbox-pro
+
+Add initial support limited to HDMI i2s and SPDIF (LPCM).
+
+Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
+---
+ .../boot/dts/amlogic/meson-gxm-rbox-pro.dts   | 80 +++++++++++++++++++
+ 1 file changed, 80 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts
+index dde7cfe12cff..0208c95e92cf 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts
++++ b/arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts
+@@ -14,6 +14,7 @@
+ /dts-v1/;
+ 
+ #include "meson-gxm.dtsi"
++#include <dt-bindings/sound/meson-aiu.h>
+ 
+ / {
+ 	compatible = "kingnovel,r-box-pro", "amlogic,s912", "amlogic,meson-gxm";
+@@ -33,6 +34,13 @@ memory@0 {
+ 		reg = <0x0 0x0 0x0 0x80000000>; /* 2 GiB or 3 GiB */
+ 	};
+ 
++	spdif_dit: audio-codec-0 {
++		#sound-dai-cells = <0>;
++		compatible = "linux,spdif-dit";
++		status = "okay";
++		sound-name-prefix = "DIT";
++	};
++
+ 	leds {
+ 		compatible = "gpio-leds";
+ 
+@@ -51,6 +59,25 @@ led-red {
+ 		};
+ 	};
+ 
++	vddio_ao18: regulator-vddio_ao18 {
++		compatible = "regulator-fixed";
++		regulator-name = "VDDIO_AO18";
++		regulator-min-microvolt = <1800000>;
++		regulator-max-microvolt = <1800000>;
++	};
++
++	hdmi_5v: regulator-hdmi-5v {
++		compatible = "regulator-fixed";
++
++		regulator-name = "HDMI_5V";
++		regulator-min-microvolt = <5000000>;
++		regulator-max-microvolt = <5000000>;
++
++		gpio = <&gpio GPIOH_3 GPIO_ACTIVE_HIGH>;
++		enable-active-high;
++		regulator-always-on;
++	};
++
+ 	vddio_boot: regulator-vddio-boot {
+ 		compatible = "regulator-fixed";
+ 		regulator-name = "VDDIO_BOOT";
+@@ -90,6 +117,59 @@ sdio_pwrseq: sdio-pwrseq {
+ 		clocks = <&wifi32k>;
+ 		clock-names = "ext_clock";
+ 	};
++
++	sound {
++		compatible = "amlogic,gx-sound-card";
++		model = "RBOX-PRO";
++		assigned-clocks = <&clkc CLKID_MPLL0>,
++				  <&clkc CLKID_MPLL1>,
++				  <&clkc CLKID_MPLL2>;
++		assigned-clock-parents = <0>, <0>, <0>;
++		assigned-clock-rates = <294912000>,
++				       <270950400>,
++				       <393216000>;
++		status = "okay";
++
++		dai-link-0 {
++			sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>;
++		};
++
++		dai-link-1 {
++			sound-dai = <&aiu AIU_CPU CPU_SPDIF_FIFO>;
++		};
++
++		dai-link-2 {
++			sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>;
++			dai-format = "i2s";
++			mclk-fs = <256>;
++
++			codec-0 {
++				sound-dai = <&aiu AIU_HDMI CTRL_I2S>;
++			};
++		};
++
++		dai-link-3 {
++			sound-dai = <&aiu AIU_CPU CPU_SPDIF_ENCODER>;
++
++			codec-0 {
++				sound-dai = <&spdif_dit>;
++			};
++		};
++
++		dai-link-4 {
++			sound-dai = <&aiu AIU_HDMI CTRL_OUT>;
++
++			codec-0 {
++				sound-dai = <&hdmi_tx>;
++			};
++		};
++	};
++};
++
++&aiu {
++	status = "okay";
++	pinctrl-0 = <&spdif_out_h_pins>;
++	pinctrl-names = "default";
+ };
+ 
+ &ethmac {
+-- 
+2.25.1
+

patch/kernel/meson64-dev/0033-WIP-arm64-dts-meson-add-audio-playback-to-u200.patch

@@ -0,0 +1,192 @@
+From 12798fae0a0c5d6dda0ddd4d84c047fcdc8fc811 Mon Sep 17 00:00:00 2001
+From: Christian Hewitt <christianshewitt@gmail.com>
+Date: Sun, 17 May 2020 05:00:55 +0000
+Subject: [PATCH 33/58] WIP: arm64: dts: meson: add audio playback to u200
+
+Add initial support limited to HDMI i2s and SPDIF (LPCM).
+
+Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
+---
+ .../boot/dts/amlogic/meson-g12a-u200.dts      | 131 ++++++++++++++++++
+ 1 file changed, 131 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts
+index a26bfe72550f..280f8159ebb1 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts
++++ b/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts
+@@ -8,6 +8,7 @@
+ #include "meson-g12a.dtsi"
+ #include <dt-bindings/gpio/gpio.h>
+ #include <dt-bindings/gpio/meson-g12a-gpio.h>
++#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
+ 
+ / {
+ 	compatible = "amlogic,u200", "amlogic,g12a";
+@@ -18,6 +19,13 @@ aliases {
+ 		ethernet0 = &ethmac;
+ 	};
+ 
++	spdif_dit: audio-codec-1 {
++		#sound-dai-cells = <0>;
++		compatible = "linux,spdif-dit";
++		status = "okay";
++		sound-name-prefix = "DIT";
++	};
++
+ 	chosen {
+ 		stdout-path = "serial0:115200n8";
+ 	};
+@@ -147,6 +155,91 @@ vddcpu: regulator-vddcpu {
+ 		regulator-boot-on;
+ 		regulator-always-on;
+ 	};
++
++
++	sound {
++		compatible = "amlogic,axg-sound-card";
++		model = "U200";
++		audio-aux-devs = <&tdmout_b>;
++		audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
++				"TDMOUT_B IN 1", "FRDDR_B OUT 1",
++				"TDMOUT_B IN 2", "FRDDR_C OUT 1",
++				"TDM_B Playback", "TDMOUT_B OUT",
++				"SPDIFOUT IN 0", "FRDDR_A OUT 3",
++				"SPDIFOUT IN 1", "FRDDR_B OUT 3",
++				"SPDIFOUT IN 2", "FRDDR_C OUT 3";
++
++		assigned-clocks = <&clkc CLKID_MPLL2>,
++				  <&clkc CLKID_MPLL0>,
++				  <&clkc CLKID_MPLL1>;
++		assigned-clock-parents = <0>, <0>, <0>;
++		assigned-clock-rates = <294912000>,
++				       <270950400>,
++				       <393216000>;
++		status = "okay";
++
++		dai-link-0 {
++			sound-dai = <&frddr_a>;
++		};
++
++		dai-link-1 {
++			sound-dai = <&frddr_b>;
++		};
++
++		dai-link-2 {
++			sound-dai = <&frddr_c>;
++		};
++
++		/* 8ch hdmi interface */
++		dai-link-3 {
++			sound-dai = <&tdmif_b>;
++			dai-format = "i2s";
++			dai-tdm-slot-tx-mask-0 = <1 1>;
++			dai-tdm-slot-tx-mask-1 = <1 1>;
++			dai-tdm-slot-tx-mask-2 = <1 1>;
++			dai-tdm-slot-tx-mask-3 = <1 1>;
++			mclk-fs = <256>;
++
++			codec {
++				sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
++			};
++		};
++
++		/* spdif hdmi or toslink interface */
++		dai-link-4 {
++			sound-dai = <&spdifout>;
++
++			codec-0 {
++				sound-dai = <&spdif_dit>;
++			};
++
++			codec-1 {
++				sound-dai = <&tohdmitx TOHDMITX_SPDIF_IN_A>;
++			};
++		};
++
++		/* spdif hdmi interface */
++		dai-link-5 {
++			sound-dai = <&spdifout_b>;
++
++			codec {
++				sound-dai = <&tohdmitx TOHDMITX_SPDIF_IN_B>;
++			};
++		};
++
++		/* hdmi glue */
++		dai-link-6 {
++			sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
++
++			codec {
++				sound-dai = <&hdmi_tx>;
++			};
++		};
++	};
++};
++
++&arb {
++	status = "okay";
+ };
+ 
+ &cec_AO {
+@@ -163,6 +256,10 @@ &cecb_AO {
+ 	hdmi-phandle = <&hdmi_tx>;
+ };
+ 
++&clkc_audio {
++	status = "okay";
++};
++
+ &cpu0 {
+ 	cpu-supply = <&vddcpu>;
+ 	operating-points-v2 = <&cpu_opp_table>;
+@@ -203,6 +300,18 @@ &ethmac {
+ 	phy-mode = "rmii";
+ };
+ 
++&frddr_a {
++	status = "okay";
++};
++
++&frddr_b {
++	status = "okay";
++};
++
++&frddr_c {
++	status = "okay";
++};
++
+ &hdmi_tx {
+ 	status = "okay";
+ 	pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;
+@@ -288,6 +397,28 @@ &sd_emmc_c {
+ 	vqmmc-supply = <&flash_1v8>;
+ };
+ 
++&spdifout {
++	pinctrl-0 = <&spdif_out_h_pins>;
++	pinctrl-names = "default";
++	status = "okay";
++};
++
++&spdifout_b {
++	status = "okay";
++};
++
++&tdmif_b {
++	status = "okay";
++};
++
++&tdmout_b {
++	status = "okay";
++};
++
++&tohdmitx {
++	status = "okay";
++};
++
+ &uart_AO {
+ 	status = "okay";
+ 	pinctrl-0 = <&uart_ao_a_pins>;
+-- 
+2.25.1
+

patch/kernel/meson64-dev/0034-WIP-arm64-dts-meson-add-audio-playback-to-vega-s95-d.patch

@@ -0,0 +1,103 @@
+From a6643bce485405d79c2020c33a567f1efa2c8938 Mon Sep 17 00:00:00 2001
+From: Christian Hewitt <christianshewitt@gmail.com>
+Date: Sat, 16 May 2020 07:04:58 +0000
+Subject: [PATCH 34/58] WIP: arm64: dts: meson: add audio playback to vega-s95
+ dtsi
+
+Add initial support limited to HDMI i2s and SPDIF (LPCM).
+
+Tested-by: Oleg Ivanov <150balbes@yandex.ru>
+Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
+---
+ .../boot/dts/amlogic/meson-gxbb-vega-s95.dtsi | 61 +++++++++++++++++++
+ 1 file changed, 61 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi
+index 9b0b81f191f1..66daf3af34c3 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi
++++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi
+@@ -4,6 +4,7 @@
+  */
+ 
+ #include "meson-gxbb.dtsi"
++#include <dt-bindings/sound/meson-aiu.h>
+ 
+ / {
+ 	compatible = "tronsmart,vega-s95", "amlogic,meson-gxbb";
+@@ -17,6 +18,13 @@ chosen {
+ 		stdout-path = "serial0:115200n8";
+ 	};
+ 
++	spdif_dit: audio-codec-0 {
++		#sound-dai-cells = <0>;
++		compatible = "linux,spdif-dit";
++		status = "okay";
++		sound-name-prefix = "DIT";
++	};
++
+ 	leds {
+ 		compatible = "gpio-leds";
+ 
+@@ -97,6 +105,59 @@ sdio_pwrseq: sdio-pwrseq {
+ 		clocks = <&wifi32k>;
+ 		clock-names = "ext_clock";
+ 	};
++
++	sound {
++		compatible = "amlogic,gx-sound-card";
++		model = "VEGA-S95";
++		assigned-clocks = <&clkc CLKID_MPLL0>,
++				  <&clkc CLKID_MPLL1>,
++				  <&clkc CLKID_MPLL2>;
++		assigned-clock-parents = <0>, <0>, <0>;
++		assigned-clock-rates = <294912000>,
++				       <270950400>,
++				       <393216000>;
++		status = "okay";
++
++		dai-link-0 {
++			sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>;
++		};
++
++		dai-link-1 {
++			sound-dai = <&aiu AIU_CPU CPU_SPDIF_FIFO>;
++		};
++
++		dai-link-2 {
++			sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>;
++			dai-format = "i2s";
++			mclk-fs = <256>;
++
++			codec-0 {
++				sound-dai = <&aiu AIU_HDMI CTRL_I2S>;
++			};
++		};
++
++		dai-link-3 {
++			sound-dai = <&aiu AIU_CPU CPU_SPDIF_ENCODER>;
++
++			codec-0 {
++				sound-dai = <&spdif_dit>;
++			};
++		};
++
++		dai-link-4 {
++			sound-dai = <&aiu AIU_HDMI CTRL_OUT>;
++
++			codec-0 {
++				sound-dai = <&hdmi_tx>;
++			};
++		};
++	};
++};
++
++&aiu {
++	status = "okay";
++	pinctrl-0 = <&spdif_out_y_pins>;
++	pinctrl-names = "default";
+ };
+ 
+ &cec_AO {
+-- 
+2.25.1
+

patch/kernel/meson64-dev/0036-WIP-clk-meson-g12a-fix-hifi-pll-lock.patch

@@ -0,0 +1,33 @@
+From c5899d7604cd6da75919fed2ee041dc7e56db4a0 Mon Sep 17 00:00:00 2001
+From: Jerome Brunet <jbrunet@baylibre.com>
+Date: Tue, 14 Apr 2020 10:45:08 +0200
+Subject: [PATCH 36/58] WIP: clk: meson: g12a: fix hifi pll lock
+
+The HIFI pll of the g12a sometimes takes a long time to report the lock in
+HIFI_PLL_CNTL0 bit 31. The would eventually be reported but the delay may
+be so long that the driver consider it a lock failure.
+
+Bit 30 seems to do the same job but more quickly, let's try this instead.
+
+Fixes: 085a4ea93d54 ("clk: meson: g12a: add peripheral clock controller")
+Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
+---
+ drivers/clk/meson/g12a.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c
+index a805bac93c11..c22611d3669a 100644
+--- a/drivers/clk/meson/g12a.c
++++ b/drivers/clk/meson/g12a.c
+@@ -1783,7 +1783,7 @@ static struct clk_regmap g12a_hifi_pll_dco = {
+ 		},
+ 		.l = {
+ 			.reg_off = HHI_HIFI_PLL_CNTL0,
+-			.shift   = 31,
++			.shift   = 30,
+ 			.width   = 1,
+ 		},
+ 		.rst = {
+-- 
+2.25.1
+

patch/kernel/meson64-dev/0037-WIP-ASoC-hdmi-codec-reorder-channel-allocation-list.patch

@@ -0,0 +1,202 @@
+From 7af9b8917cc6ccd1a66d92a909acd06e077b6cf7 Mon Sep 17 00:00:00 2001
+From: Jonas Karlman <jonas@kwiboo.se>
+Date: Sun, 23 Dec 2018 02:24:38 +0100
+Subject: [PATCH 37/58] WIP: ASoC: hdmi-codec: reorder channel allocation list
+
+Wrong channel allocation is selected by hdmi_codec_get_ch_alloc_table_idx().
+
+E.g when ELD reports FL|FR|LFE|FC|RL|RR or FL|FR|LFE|FC|RL|RR|RC|RLC|RRC
+
+ca_id 0x01 with speaker mask FL|FR|LFE gets selected instead of
+ca_id 0x03 with speaker mask FL|FR|LFE|FC for 4 channels
+
+and
+
+ca_id 0x04 with speaker mask FL|FR|RC gets selected instead of
+ca_id 0x0b with speaker mask FL|FR|LFE|FC|RL|RR for 6 channels
+
+Fix this by reorder the channel allocation list with
+most specific speaker mask at the top.
+
+Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
+---
+ sound/soc/codecs/hdmi-codec.c | 140 +++++++++++++++++++---------------
+ 1 file changed, 77 insertions(+), 63 deletions(-)
+
+diff --git a/sound/soc/codecs/hdmi-codec.c b/sound/soc/codecs/hdmi-codec.c
+index 422539f933de..8f59265d2c93 100644
+--- a/sound/soc/codecs/hdmi-codec.c
++++ b/sound/soc/codecs/hdmi-codec.c
+@@ -189,84 +189,97 @@ static const struct snd_pcm_chmap_elem hdmi_codec_8ch_chmaps[] = {
+ /*
+  * hdmi_codec_channel_alloc: speaker configuration available for CEA
+  *
+- * This is an ordered list that must match with hdmi_codec_8ch_chmaps struct
++ * This is an ordered list where ca_id must exist in hdmi_codec_8ch_chmaps
+  * The preceding ones have better chances to be selected by
+  * hdmi_codec_get_ch_alloc_table_idx().
+  */
+ static const struct hdmi_codec_cea_spk_alloc hdmi_codec_channel_alloc[] = {
+ 	{ .ca_id = 0x00, .n_ch = 2,
+-	  .mask = FL | FR},
+-	/* 2.1 */
+-	{ .ca_id = 0x01, .n_ch = 4,
+-	  .mask = FL | FR | LFE},
+-	/* Dolby Surround */
++	  .mask = FL | FR },
++	{ .ca_id = 0x03, .n_ch = 4,
++	  .mask = FL | FR | LFE | FC },
+ 	{ .ca_id = 0x02, .n_ch = 4,
+ 	  .mask = FL | FR | FC },
+-	/* surround51 */
++	{ .ca_id = 0x01, .n_ch = 4,
++	  .mask = FL | FR | LFE },
+ 	{ .ca_id = 0x0b, .n_ch = 6,
+-	  .mask = FL | FR | LFE | FC | RL | RR},
+-	/* surround40 */
+-	{ .ca_id = 0x08, .n_ch = 6,
+-	  .mask = FL | FR | RL | RR },
+-	/* surround41 */
+-	{ .ca_id = 0x09, .n_ch = 6,
+-	  .mask = FL | FR | LFE | RL | RR },
+-	/* surround50 */
++	  .mask = FL | FR | LFE | FC | RL | RR },
+ 	{ .ca_id = 0x0a, .n_ch = 6,
+ 	  .mask = FL | FR | FC | RL | RR },
+-	/* 6.1 */
+-	{ .ca_id = 0x0f, .n_ch = 8,
+-	  .mask = FL | FR | LFE | FC | RL | RR | RC },
+-	/* surround71 */
++	{ .ca_id = 0x09, .n_ch = 6,
++	  .mask = FL | FR | LFE | RL | RR },
++	{ .ca_id = 0x08, .n_ch = 6,
++	  .mask = FL | FR | RL | RR },
++	{ .ca_id = 0x07, .n_ch = 6,
++	  .mask = FL | FR | LFE | FC | RC },
++	{ .ca_id = 0x06, .n_ch = 6,
++	  .mask = FL | FR | FC | RC },
++	{ .ca_id = 0x05, .n_ch = 6,
++	  .mask = FL | FR | LFE | RC },
++	{ .ca_id = 0x04, .n_ch = 6,
++	  .mask = FL | FR | RC },
+ 	{ .ca_id = 0x13, .n_ch = 8,
+ 	  .mask = FL | FR | LFE | FC | RL | RR | RLC | RRC },
+-	/* others */
+-	{ .ca_id = 0x03, .n_ch = 8,
+-	  .mask = FL | FR | LFE | FC },
+-	{ .ca_id = 0x04, .n_ch = 8,
+-	  .mask = FL | FR | RC},
+-	{ .ca_id = 0x05, .n_ch = 8,
+-	  .mask = FL | FR | LFE | RC },
+-	{ .ca_id = 0x06, .n_ch = 8,
+-	  .mask = FL | FR | FC | RC },
+-	{ .ca_id = 0x07, .n_ch = 8,
+-	  .mask = FL | FR | LFE | FC | RC },
+-	{ .ca_id = 0x0c, .n_ch = 8,
+-	  .mask = FL | FR | RC | RL | RR },
+-	{ .ca_id = 0x0d, .n_ch = 8,
+-	  .mask = FL | FR | LFE | RL | RR | RC },
+-	{ .ca_id = 0x0e, .n_ch = 8,
+-	  .mask = FL | FR | FC | RL | RR | RC },
+-	{ .ca_id = 0x10, .n_ch = 8,
+-	  .mask = FL | FR | RL | RR | RLC | RRC },
+-	{ .ca_id = 0x11, .n_ch = 8,
+-	  .mask = FL | FR | LFE | RL | RR | RLC | RRC },
++	{ .ca_id = 0x1f, .n_ch = 8,
++	  .mask = FL | FR | LFE | FC | RL | RR | FLC | FRC },
+ 	{ .ca_id = 0x12, .n_ch = 8,
+ 	  .mask = FL | FR | FC | RL | RR | RLC | RRC },
+-	{ .ca_id = 0x14, .n_ch = 8,
+-	  .mask = FL | FR | FLC | FRC },
+-	{ .ca_id = 0x15, .n_ch = 8,
+-	  .mask = FL | FR | LFE | FLC | FRC },
+-	{ .ca_id = 0x16, .n_ch = 8,
+-	  .mask = FL | FR | FC | FLC | FRC },
+-	{ .ca_id = 0x17, .n_ch = 8,
+-	  .mask = FL | FR | LFE | FC | FLC | FRC },
+-	{ .ca_id = 0x18, .n_ch = 8,
+-	  .mask = FL | FR | RC | FLC | FRC },
+-	{ .ca_id = 0x19, .n_ch = 8,
+-	  .mask = FL | FR | LFE | RC | FLC | FRC },
+-	{ .ca_id = 0x1a, .n_ch = 8,
+-	  .mask = FL | FR | RC | FC | FLC | FRC },
+-	{ .ca_id = 0x1b, .n_ch = 8,
+-	  .mask = FL | FR | LFE | RC | FC | FLC | FRC },
+-	{ .ca_id = 0x1c, .n_ch = 8,
+-	  .mask = FL | FR | RL | RR | FLC | FRC },
+-	{ .ca_id = 0x1d, .n_ch = 8,
+-	  .mask = FL | FR | LFE | RL | RR | FLC | FRC },
+ 	{ .ca_id = 0x1e, .n_ch = 8,
+ 	  .mask = FL | FR | FC | RL | RR | FLC | FRC },
+-	{ .ca_id = 0x1f, .n_ch = 8,
+-	  .mask = FL | FR | LFE | FC | RL | RR | FLC | FRC },
++	{ .ca_id = 0x11, .n_ch = 8,
++	  .mask = FL | FR | LFE | RL | RR | RLC | RRC },
++	{ .ca_id = 0x1d, .n_ch = 8,
++	  .mask = FL | FR | LFE | RL | RR | FLC | FRC },
++	{ .ca_id = 0x10, .n_ch = 8,
++	  .mask = FL | FR | RL | RR | RLC | RRC },
++	{ .ca_id = 0x1c, .n_ch = 8,
++	  .mask = FL | FR | RL | RR | FLC | FRC },
++	{ .ca_id = 0x0f, .n_ch = 8,
++	  .mask = FL | FR | LFE | FC | RL | RR | RC },
++	{ .ca_id = 0x1b, .n_ch = 8,
++	  .mask = FL | FR | LFE | RC | FC | FLC | FRC },
++	{ .ca_id = 0x0e, .n_ch = 8,
++	  .mask = FL | FR | FC | RL | RR | RC },
++	{ .ca_id = 0x1a, .n_ch = 8,
++	  .mask = FL | FR | RC | FC | FLC | FRC },
++	{ .ca_id = 0x0d, .n_ch = 8,
++	  .mask = FL | FR | LFE | RL | RR | RC },
++	{ .ca_id = 0x19, .n_ch = 8,
++	  .mask = FL | FR | LFE | RC | FLC | FRC },
++	{ .ca_id = 0x0c, .n_ch = 8,
++	  .mask = FL | FR | RC | RL | RR },
++	{ .ca_id = 0x18, .n_ch = 8,
++	  .mask = FL | FR | RC | FLC | FRC },
++	{ .ca_id = 0x17, .n_ch = 8,
++	  .mask = FL | FR | LFE | FC | FLC | FRC },
++	{ .ca_id = 0x16, .n_ch = 8,
++	  .mask = FL | FR | FC | FLC | FRC },
++	{ .ca_id = 0x15, .n_ch = 8,
++	  .mask = FL | FR | LFE | FLC | FRC },
++	{ .ca_id = 0x14, .n_ch = 8,
++	  .mask = FL | FR | FLC | FRC },
++	{ .ca_id = 0x0b, .n_ch = 8,
++	  .mask = FL | FR | LFE | FC | RL | RR },
++	{ .ca_id = 0x0a, .n_ch = 8,
++	  .mask = FL | FR | FC | RL | RR },
++	{ .ca_id = 0x09, .n_ch = 8,
++	  .mask = FL | FR | LFE | RL | RR },
++	{ .ca_id = 0x08, .n_ch = 8,
++	  .mask = FL | FR | RL | RR },
++	{ .ca_id = 0x07, .n_ch = 8,
++	  .mask = FL | FR | LFE | FC | RC },
++	{ .ca_id = 0x06, .n_ch = 8,
++	  .mask = FL | FR | FC | RC },
++	{ .ca_id = 0x05, .n_ch = 8,
++	  .mask = FL | FR | LFE | RC },
++	{ .ca_id = 0x04, .n_ch = 8,
++	  .mask = FL | FR | RC },
++	{ .ca_id = 0x03, .n_ch = 8,
++	  .mask = FL | FR | LFE | FC },
++	{ .ca_id = 0x02, .n_ch = 8,
++	  .mask = FL | FR | FC },
++	{ .ca_id = 0x01, .n_ch = 8,
++	  .mask = FL | FR | LFE },
+ };
+ 
+ struct hdmi_codec_priv {
+@@ -374,7 +387,8 @@ static int hdmi_codec_chmap_ctl_get(struct snd_kcontrol *kcontrol,
+ 	struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
+ 	struct hdmi_codec_priv *hcp = info->private_data;
+ 
+-	map = info->chmap[hcp->chmap_idx].map;
++	if (hcp->chmap_idx != HDMI_CODEC_CHMAP_IDX_UNKNOWN)
++		map = info->chmap[hcp->chmap_idx].map;
+ 
+ 	for (i = 0; i < info->max_channels; i++) {
+ 		if (hcp->chmap_idx == HDMI_CODEC_CHMAP_IDX_UNKNOWN)
+-- 
+2.25.1
+

patch/kernel/meson64-dev/0038-WIP-ASoC-meson-aiu-encoder-spdif-implement-the-.mute.patch

@@ -0,0 +1,60 @@
+From 3c114698990fb506d478fd5dd27a3298e526ef50 Mon Sep 17 00:00:00 2001
+From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
+Date: Wed, 23 Dec 2020 02:45:27 +0100
+Subject: [PATCH 38/58] WIP: ASoC: meson: aiu: encoder-spdif: implement the
+ .mute_stream callback
+
+Implement the .mute_stream callback based on code from the vendor
+driver.
+
+Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
+---
+ sound/soc/meson/aiu-encoder-spdif.c | 21 +++++++++++++++++++++
+ 1 file changed, 21 insertions(+)
+
+diff --git a/sound/soc/meson/aiu-encoder-spdif.c b/sound/soc/meson/aiu-encoder-spdif.c
+index de850913975f..5c42a784cee4 100644
+--- a/sound/soc/meson/aiu-encoder-spdif.c
++++ b/sound/soc/meson/aiu-encoder-spdif.c
+@@ -19,6 +19,8 @@
+ #define AIU_958_MISC_U_FROM_STREAM	BIT(12)
+ #define AIU_958_MISC_FORCE_LR		BIT(13)
+ #define AIU_958_CTRL_HOLD_EN		BIT(0)
++#define AIU_958_CTRL_MUTE_RIGHT_SPEAKER	BIT(3)
++#define AIU_958_CTRL_MUTE_LEFT_SPEAKER	BIT(4)
+ #define AIU_CLK_CTRL_958_DIV_EN		BIT(1)
+ #define AIU_CLK_CTRL_958_DIV		GENMASK(5, 4)
+ #define AIU_CLK_CTRL_958_DIV_MORE	BIT(12)
+@@ -200,10 +202,29 @@ static void aiu_encoder_spdif_shutdown(struct snd_pcm_substream *substream,
+ 	clk_bulk_disable_unprepare(aiu->spdif.clk_num, aiu->spdif.clks);
+ }
+ 
++static int aiu_encoder_spdif_mute_stream(struct snd_soc_dai *dai, int mute,
++					 int stream)
++{
++	struct snd_soc_component *component = dai->component;
++	u32 value = 0;
++
++	if (mute)
++		value = AIU_958_CTRL_MUTE_RIGHT_SPEAKER |
++			AIU_958_CTRL_MUTE_LEFT_SPEAKER;
++
++	snd_soc_component_update_bits(component, AIU_958_CTRL,
++				      AIU_958_CTRL_MUTE_RIGHT_SPEAKER |
++				      AIU_958_CTRL_MUTE_LEFT_SPEAKER,
++				      value);
++
++	return 0;
++}
++
+ const struct snd_soc_dai_ops aiu_encoder_spdif_dai_ops = {
+ 	.trigger	= aiu_encoder_spdif_trigger,
+ 	.hw_params	= aiu_encoder_spdif_hw_params,
+ 	.hw_free	= aiu_encoder_spdif_hw_free,
+ 	.startup	= aiu_encoder_spdif_startup,
+ 	.shutdown	= aiu_encoder_spdif_shutdown,
++	.mute_stream	= aiu_encoder_spdif_mute_stream,
+ };
+-- 
+2.25.1
+

patch/kernel/meson64-dev/0039-WIP-ASoC-meson-aiu-encoder-i2s-implement-the-.mute_s.patch

@@ -0,0 +1,69 @@
+From 8cfc53316641c6df99e9d19c241df99237d55685 Mon Sep 17 00:00:00 2001
+From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
+Date: Wed, 23 Dec 2020 02:46:54 +0100
+Subject: [PATCH 39/58] WIP: ASoC: meson: aiu: encoder-i2s: implement the
+ .mute_stream callback
+
+Implement the .mute_stream callback based on the code from the vendor
+driver.
+
+Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
+---
+ sound/soc/meson/aiu-encoder-i2s.c | 15 +++++++++++++++
+ sound/soc/meson/aiu.h             |  1 +
+ 2 files changed, 16 insertions(+)
+
+diff --git a/sound/soc/meson/aiu-encoder-i2s.c b/sound/soc/meson/aiu-encoder-i2s.c
+index 932224552146..d6aea7797641 100644
+--- a/sound/soc/meson/aiu-encoder-i2s.c
++++ b/sound/soc/meson/aiu-encoder-i2s.c
+@@ -28,6 +28,8 @@
+ #define AIU_CLK_CTRL_MORE_I2S_DIV	GENMASK(5, 0)
+ #define AIU_CODEC_DAC_LRCLK_CTRL_DIV	GENMASK(11, 0)
+ 
++#define AIU_I2S_MUTE_SWAP_MUTE		GENMASK(15, 8)
++
+ static void aiu_encoder_i2s_divider_enable(struct snd_soc_component *component,
+ 					   bool enable)
+ {
+@@ -352,6 +354,18 @@ static void aiu_encoder_i2s_shutdown(struct snd_pcm_substream *substream,
+ 	clk_bulk_disable_unprepare(aiu->i2s.clk_num, aiu->i2s.clks);
+ }
+ 
++static int aiu_encoder_i2s_mute_stream(struct snd_soc_dai *dai, int mute,
++				       int stream)
++{
++	struct snd_soc_component *component = dai->component;
++
++	snd_soc_component_update_bits(component, AIU_I2S_MUTE_SWAP,
++				      AIU_I2S_MUTE_SWAP_MUTE,
++				      mute ? AIU_I2S_MUTE_SWAP_MUTE : 0);
++
++	return 0;
++}
++
+ const struct snd_soc_dai_ops aiu_encoder_i2s_dai_ops = {
+ 	.trigger	= aiu_encoder_i2s_trigger,
+ 	.hw_params	= aiu_encoder_i2s_hw_params,
+@@ -360,5 +374,6 @@ const struct snd_soc_dai_ops aiu_encoder_i2s_dai_ops = {
+ 	.set_sysclk	= aiu_encoder_i2s_set_sysclk,
+ 	.startup	= aiu_encoder_i2s_startup,
+ 	.shutdown	= aiu_encoder_i2s_shutdown,
++	.mute_stream	= aiu_encoder_i2s_mute_stream,
+ };
+ 
+diff --git a/sound/soc/meson/aiu.h b/sound/soc/meson/aiu.h
+index 393b6c2307e4..7884c50f244d 100644
+--- a/sound/soc/meson/aiu.h
++++ b/sound/soc/meson/aiu.h
+@@ -66,6 +66,7 @@ extern const struct snd_soc_dai_ops aiu_encoder_spdif_dai_ops;
+ #define AIU_958_CHSTAT_L0		0x020
+ #define AIU_958_CHSTAT_L1		0x024
+ #define AIU_958_CTRL			0x028
++#define AIU_I2S_MUTE_SWAP		0x030
+ #define AIU_I2S_SOURCE_DESC		0x034
+ #define AIU_I2S_DAC_CFG			0x040
+ #define AIU_I2S_SYNC			0x044
+-- 
+2.25.1
+

patch/kernel/meson64-dev/0040-WIP-mmc-meson-gx-mmc-set-core-clock-phase-to-270-deg.patch

@@ -0,0 +1,59 @@
+From 7d0a1b039aafd09bbee5007422c987e3effb1741 Mon Sep 17 00:00:00 2001
+From: Neil Armstrong <narmstrong@baylibre.com>
+Date: Thu, 14 Jan 2021 17:43:02 +0100
+Subject: [PATCH 40/58] WIP: mmc: meson-gx-mmc: set core clock phase to 270
+ degres for AXG compatible controllers
+
+Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
+---
+ drivers/mmc/host/meson-gx-mmc.c | 6 +++++-
+ 1 file changed, 5 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/mmc/host/meson-gx-mmc.c b/drivers/mmc/host/meson-gx-mmc.c
+index eb6c02bc4a02..3f835f73adf8 100644
+--- a/drivers/mmc/host/meson-gx-mmc.c
++++ b/drivers/mmc/host/meson-gx-mmc.c
+@@ -38,6 +38,7 @@
+ #define   CLK_RX_PHASE_MASK GENMASK(13, 12)
+ #define   CLK_PHASE_0 0
+ #define   CLK_PHASE_180 2
++#define   CLK_PHASE_270 3
+ #define   CLK_V2_TX_DELAY_MASK GENMASK(19, 16)
+ #define   CLK_V2_RX_DELAY_MASK GENMASK(23, 20)
+ #define   CLK_V2_ALWAYS_ON BIT(24)
+@@ -136,6 +137,7 @@ struct meson_mmc_data {
+ 	unsigned int rx_delay_mask;
+ 	unsigned int always_on;
+ 	unsigned int adjust;
++	unsigned int clk_core_phase;
+ };
+ 
+ struct sd_emmc_desc {
+@@ -421,7 +423,7 @@ static int meson_mmc_clk_init(struct meson_host *host)
+ 	/* init SD_EMMC_CLOCK to sane defaults w/min clock rate */
+ 	clk_reg = CLK_ALWAYS_ON(host);
+ 	clk_reg |= CLK_DIV_MASK;
+-	clk_reg |= FIELD_PREP(CLK_CORE_PHASE_MASK, CLK_PHASE_180);
++	clk_reg |= FIELD_PREP(CLK_CORE_PHASE_MASK, host->data->clk_core_phase);
+ 	clk_reg |= FIELD_PREP(CLK_TX_PHASE_MASK, CLK_PHASE_0);
+ 	clk_reg |= FIELD_PREP(CLK_RX_PHASE_MASK, CLK_PHASE_0);
+ 	writel(clk_reg, host->regs + SD_EMMC_CLOCK);
+@@ -1247,6 +1249,7 @@ static const struct meson_mmc_data meson_gx_data = {
+ 	.rx_delay_mask	= CLK_V2_RX_DELAY_MASK,
+ 	.always_on	= CLK_V2_ALWAYS_ON,
+ 	.adjust		= SD_EMMC_ADJUST,
++	.clk_core_phase	= CLK_PHASE_180,
+ };
+ 
+ static const struct meson_mmc_data meson_axg_data = {
+@@ -1254,6 +1257,7 @@ static const struct meson_mmc_data meson_axg_data = {
+ 	.rx_delay_mask	= CLK_V3_RX_DELAY_MASK,
+ 	.always_on	= CLK_V3_ALWAYS_ON,
+ 	.adjust		= SD_EMMC_V3_ADJUST,
++	.clk_core_phase	= CLK_PHASE_270,
+ };
+ 
+ static const struct of_device_id meson_mmc_of_match[] = {
+-- 
+2.25.1
+

patch/kernel/meson64-dev/0041-arm64-dts-meson-add-sd-uhs-modes-to-ODROID-N2-N2.patch

@@ -1,19 +1,21 @@
-From 2a7c14cbaec2d8307fb97a0036b155ee2857f7e2 Mon Sep 17 00:00:00 2001
-From: ckkim <changkon12@gmail.com>
-Date: Tue, 3 Mar 2020 14:20:59 +0900
-Subject: [PATCH 03/74] ODROID-N2: arm64/dts: support Ulta High Speed MMC card
+From b78360135c312a57c2b5e6b6866d9d75fd0dad90 Mon Sep 17 00:00:00 2001
+From: Chang-Kon Kim <changkon12@gmail.com>
+Date: Sun, 21 Feb 2021 05:51:27 +0000
+Subject: [PATCH 41/58] arm64: dts: meson: add sd-uhs modes to ODROID-N2/N2+
 
-Signed-off-by: ckkim <changkon12@gmail.com>
-Change-Id: I52bbf26aaf807e96bff7665bb65a1ee5594f6449
+Increase max-frequency to 200000000 and add sd-uhs modes to the
+SD card node in the ODROID N2/N2+ common dtsi.
+
+Signed-off-by: Chang-Kon Kim <changkon12@gmail.com>
 ---
- arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts | 6 +++++-
+ arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi | 6 +++++-
  1 file changed, 5 insertions(+), 1 deletion(-)
 
 diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
-index 169ea283d4ee..84236c578075 100644
+index 58ce569b2ace..5c70935a583e 100644
 --- a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
 +++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
-@@ -423,7 +423,11 @@ &sd_emmc_b {
+@@ -517,7 +517,11 @@ &sd_emmc_b {
  
  	bus-width = <4>;
  	cap-sd-highspeed;

patch/kernel/meson64-dev/0042-arm64-dts-meson-add-GPIO-line-names-to-ODROID-N2-N2.patch

@@ -1,18 +1,20 @@
-From abe827c2f577deecd87f04dcf06b0f26a607e79c Mon Sep 17 00:00:00 2001
+From 1d5c5d0bc1a65c7b81744475999c1cc674141dee Mon Sep 17 00:00:00 2001
 From: Hyeonki Hong <hhk7734@gmail.com>
-Date: Fri, 13 Mar 2020 14:07:34 +0900
-Subject: [PATCH 05/74] ODROID-N2: arm64/dts: Add gpio-line-names
+Date: Sun, 21 Feb 2021 05:58:56 +0000
+Subject: [PATCH 42/58] arm64: dts: meson: add GPIO line names to ODROID N2/N2+
 
-Change-Id: Ie5b40ea8885c324c81b4fa80a5bbe59b533b1b3a
+Add GPIO line-name identifiers to the ODROID N2/N2+ common dtsi.
+
+Signed-off-by: Hyeonki Hong <hhk7734@gmail.com>
 ---
- .../boot/dts/amlogic/meson-g12b-odroid-n2.dtsi | 45 +++++++++++++++++++
+ .../dts/amlogic/meson-g12b-odroid-n2.dtsi     | 45 +++++++++++++++++++
  1 file changed, 45 insertions(+)
 
 diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
-index e9d8d6bf4100..0bbd97997a42 100644
+index 5c70935a583e..ac396067911d 100644
 --- a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
 +++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
-@@ -412,6 +412,51 @@ &frddr_c {
+@@ -446,6 +446,51 @@ &frddr_c {
  };
  
  &gpio {

patch/kernel/meson64-dev/0043-arm64-dts-meson-add-saradc-node-to-ODROID-N2-N2.patch

@@ -0,0 +1,30 @@
+From e9d4f3e314399e72271c2a4c98fd71a16dc117b1 Mon Sep 17 00:00:00 2001
+From: Hyeonki Hong <hhk7734@gmail.com>
+Date: Sun, 21 Feb 2021 06:03:20 +0000
+Subject: [PATCH 43/58] arm64: dts: meson: add saradc node to ODROID N2/N2+
+
+Add the meson saradc node to the ODROID N2/N2+ common dtsi.
+
+Signed-off-by: Hyeonki Hong <hhk7734@gmail.com>
+---
+ arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
+index ac396067911d..f71d012e5460 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
++++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
+@@ -553,6 +553,10 @@ &pwm_AO_cd {
+ 	status = "okay";
+ };
+ 
++&saradc {
++	status = "okay";
++};
++
+ /* SD card */
+ &sd_emmc_b {
+ 	status = "okay";
+-- 
+2.25.1
+

patch/kernel/meson64-dev/0044-arm64-dts-meson-remove-extra-tab-from-ODROID-N2-N2-e.patch

@@ -0,0 +1,30 @@
+From ce5a0bce63f1974bf0d8ff6bf5d3c58cb0392379 Mon Sep 17 00:00:00 2001
+From: Christian Hewitt <christianshewitt@gmail.com>
+Date: Sun, 21 Feb 2021 06:05:25 +0000
+Subject: [PATCH 44/58] arm64: dts: meson: remove extra tab from ODROID N2/N2+
+ ext_mdio node
+
+Remove an extra tab from the ext_mdio node in the ODROID N2/N2+ common
+dtsi file.
+
+Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
+---
+ arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
+index f71d012e5460..eeceab18a497 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
++++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
+@@ -410,7 +410,7 @@ &cpu103 {
+ 
+ &ext_mdio {
+ 	external_phy: ethernet-phy@0 {
+-		/* Realtek RTL8211F (0x001cc916) */	
++		/* Realtek RTL8211F (0x001cc916) */
+ 		reg = <0>;
+ 		max-speed = <1000>;
+ 
+-- 
+2.25.1
+

patch/kernel/meson64-dev/0046-arm64-dts-meson-add-initial-device-tree-for-Bananapi.patch

@@ -0,0 +1,108 @@
+From 681db972d03bb40370e9f69eeb2f47e871a6f920 Mon Sep 17 00:00:00 2001
+From: Christian Hewitt <christianshewitt@gmail.com>
+Date: Sun, 27 Dec 2020 15:11:59 +0000
+Subject: [PATCH 46/58] arm64: dts: meson: add initial device-tree for Bananapi
+ BPI-M5
+
+The Bananapi Wiki links to Amlogic BSP kernel sources which show [0]
+BPI-M5 to be aligned with the HardKernel ODROID-C4 device-tree with
+relatively minor differences:
+
+- 1x Green LED
+- 4x Switches labelled SW1/RST/SW3/SW4
+- 3.5mm A/V connector
+- USB-C power connector (5V)
+
+[0] https://github.com/Dangku/amlogic-linux/commit/bddc95f88a07e7e66f73192d8307af5b547c5b32
+
+Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
+---
+ arch/arm64/boot/dts/amlogic/Makefile          |  1 +
+ .../dts/amlogic/meson-sm1-bananapi-m5.dts     | 63 +++++++++++++++++++
+ 2 files changed, 64 insertions(+)
+ create mode 100644 arch/arm64/boot/dts/amlogic/meson-sm1-bananapi-m5.dts
+
+diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
+index aebd49c88719..da11ef28a47b 100644
+--- a/arch/arm64/boot/dts/amlogic/Makefile
++++ b/arch/arm64/boot/dts/amlogic/Makefile
+@@ -46,6 +46,7 @@ dtb-$(CONFIG_ARCH_MESON) += meson-gxm-rbox-pro.dtb
+ dtb-$(CONFIG_ARCH_MESON) += meson-gxm-s912-libretech-pc.dtb
+ dtb-$(CONFIG_ARCH_MESON) += meson-gxm-vega-s96.dtb
+ dtb-$(CONFIG_ARCH_MESON) += meson-gxm-wetek-core2.dtb
++dtb-$(CONFIG_ARCH_MESON) += meson-sm1-bananapi-m5.dtb
+ dtb-$(CONFIG_ARCH_MESON) += meson-sm1-sei610.dtb
+ dtb-$(CONFIG_ARCH_MESON) += meson-sm1-khadas-vim3l.dtb
+ dtb-$(CONFIG_ARCH_MESON) += meson-sm1-odroid-c4.dtb
+diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-bananapi-m5.dts b/arch/arm64/boot/dts/amlogic/meson-sm1-bananapi-m5.dts
+new file mode 100644
+index 000000000000..a98301777622
+--- /dev/null
++++ b/arch/arm64/boot/dts/amlogic/meson-sm1-bananapi-m5.dts
+@@ -0,0 +1,63 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++/*
++ * Copyright (c) 2020 Christian Hewitt <christianshewitt@gmail.com>
++ */
++
++/dts-v1/;
++
++#include "meson-sm1-odroid-c4.dts"
++
++/ {
++	compatible = "sinovoip,bananapi-m5", "amlogic,sm1";
++	model = "Bananapi BPI-M5";
++
++	leds {
++		compatible = "gpio-leds";
++
++		blue {
++			color = <LED_COLOR_ID_BLUE>;
++			function = LED_FUNCTION_STATUS;
++			gpios = <&gpio_ao GPIOAO_11 GPIO_ACTIVE_LOW>;
++			linux,default-trigger = "heartbeat";
++			panic-indicator;
++		};
++
++		green {
++			color = <LED_COLOR_ID_GREEN>;
++			function = LED_FUNCTION_STATUS;
++			gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>;
++			default-state = "off";
++		};
++	};
++
++	hub_5v: regulator-hub_5v {
++		compatible = "regulator-fixed";
++		regulator-name = "HUB_5V";
++		regulator-min-microvolt = <5000000>;
++		regulator-max-microvolt = <5000000>;
++		vin-supply = <&vcc_5v>;
++
++		/* Connected to the Hub CHIPENABLE, LOW sets low power state */
++		gpio = <&gpio GPIOH_4 GPIO_ACTIVE_HIGH>;
++		enable-active-high;
++	};
++};
++
++&gpio {
++	/*
++	 * WARNING: The USB Hub on the Bananapi M5  needs a reset signal
++	 * to be turned high in order to be detected by the USB Controller
++	 * This signal should be handled by a USB specific power sequence
++	 * in order to reset the Hub when USB bus is powered down.
++	 */
++	usb-hub {
++		gpio-hog;
++		gpios = <GPIOH_4 GPIO_ACTIVE_HIGH>;
++		output-high;
++		line-name = "usb-hub-reset";
++	};
++};
++
++&ir {
++	linux,rc-map-name = "rc-odroid";
++};
+-- 
+2.25.1
+

patch/kernel/meson64-dev/0047-arm64-dts-meson-add-common-SM1-ac2xx-dtsi.patch

@@ -0,0 +1,322 @@
+From 7b0f6b008e5167351fc32a759de75d58026f1011 Mon Sep 17 00:00:00 2001
+From: Christian Hewitt <christianshewitt@gmail.com>
+Date: Wed, 24 Jun 2020 12:41:46 +0000
+Subject: [PATCH 47/58] arm64: dts: meson: add common SM1 ac2xx dtsi
+
+Add a common dtsi for Android STB devices based on the Amlogic S905X3
+(AC213/AC214) and S905D3 (AC201/AC202) reference designs. The dtsi is
+loosely based on the existing SEI610 device-tree.
+
+Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
+---
+ .../boot/dts/amlogic/meson-sm1-ac2xx.dtsi     | 298 ++++++++++++++++++
+ 1 file changed, 298 insertions(+)
+ create mode 100644 arch/arm64/boot/dts/amlogic/meson-sm1-ac2xx.dtsi
+
+diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-ac2xx.dtsi b/arch/arm64/boot/dts/amlogic/meson-sm1-ac2xx.dtsi
+new file mode 100644
+index 000000000000..b3872983b5ce
+--- /dev/null
++++ b/arch/arm64/boot/dts/amlogic/meson-sm1-ac2xx.dtsi
+@@ -0,0 +1,298 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++/*
++ * Copyright (c) 2019 BayLibre SAS. All rights reserved.
++ * Copyright (c) 2020 Christian Hewitt <christianshewitt@gmail.com>
++ *
++ * AC200/AC202 = S905D3
++ * AC213/AC214 = S905X3
++ *
++ */
++
++#include "meson-sm1.dtsi"
++#include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/gpio/meson-g12a-gpio.h>
++#include <dt-bindings/input/input.h>
++
++/ {
++	aliases {
++		serial0 = &uart_AO;
++		ethernet0 = &ethmac;
++	};
++
++	chosen {
++		stdout-path = "serial0:115200n8";
++	};
++
++	emmc_pwrseq: emmc-pwrseq {
++		compatible = "mmc-pwrseq-emmc";
++		reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
++	};
++
++	cvbs-connector {
++		compatible = "composite-video-connector";
++
++		port {
++			cvbs_connector_in: endpoint {
++				remote-endpoint = <&cvbs_vdac_out>;
++			};
++		};
++	};
++
++	hdmi-connector {
++		compatible = "hdmi-connector";
++		type = "a";
++
++		port {
++			hdmi_connector_in: endpoint {
++				remote-endpoint = <&hdmi_tx_tmds_out>;
++			};
++		};
++	};
++
++	memory@0 {
++		device_type = "memory";
++		reg = <0x0 0x0 0x0 0x40000000>;
++	};
++
++	ao_5v: regulator-ao_5v {
++		compatible = "regulator-fixed";
++		regulator-name = "AO_5V";
++		regulator-min-microvolt = <5000000>;
++		regulator-max-microvolt = <5000000>;
++		vin-supply = <&dc_in>;
++		regulator-always-on;
++	};
++
++	dc_in: regulator-dc_in {
++		compatible = "regulator-fixed";
++		regulator-name = "DC_IN";
++		regulator-min-microvolt = <5000000>;
++		regulator-max-microvolt = <5000000>;
++		regulator-always-on;
++	};
++
++	emmc_1v8: regulator-emmc_1v8 {
++		compatible = "regulator-fixed";
++		regulator-name = "EMMC_1V8";
++		regulator-min-microvolt = <1800000>;
++		regulator-max-microvolt = <1800000>;
++		vin-supply = <&vddao_3v3>;
++		regulator-always-on;
++	};
++
++	vddao_3v3: regulator-vddao_3v3 {
++		compatible = "regulator-fixed";
++		regulator-name = "VDDAO_3V3";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++		vin-supply = <&dc_in>;
++		regulator-always-on;
++	};
++
++	vddcpu: regulator-vddcpu {
++		compatible = "pwm-regulator";
++
++		regulator-name = "VDDCPU";
++		regulator-min-microvolt = <690000>;
++		regulator-max-microvolt = <1050000>;
++
++		vin-supply = <&dc_in>;
++
++		pwms = <&pwm_AO_cd 1 1500 0>;
++		pwm-dutycycle-range = <100 0>;
++
++		regulator-boot-on;
++		regulator-always-on;
++	};
++
++	vddio_ao1v8: regulator-vddio_ao1v8 {
++		compatible = "regulator-fixed";
++		regulator-name = "VDDIO_AO1V8";
++		regulator-min-microvolt = <1800000>;
++		regulator-max-microvolt = <1800000>;
++		vin-supply = <&vddao_3v3>;
++		regulator-always-on;
++	};
++
++	sdio_pwrseq: sdio-pwrseq {
++		compatible = "mmc-pwrseq-simple";
++		reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
++		clocks = <&wifi32k>;
++		clock-names = "ext_clock";
++	};
++
++	wifi32k: wifi32k {
++		compatible = "pwm-clock";
++		#clock-cells = <0>;
++		clock-frequency = <32768>;
++		pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
++	};
++};
++
++&cec_AO {
++	pinctrl-0 = <&cec_ao_a_h_pins>;
++	pinctrl-names = "default";
++	status = "disabled";
++	hdmi-phandle = <&hdmi_tx>;
++};
++
++&cecb_AO {
++	pinctrl-0 = <&cec_ao_b_h_pins>;
++	pinctrl-names = "default";
++	status = "okay";
++	hdmi-phandle = <&hdmi_tx>;
++};
++
++&cpu0 {
++	cpu-supply = <&vddcpu>;
++	operating-points-v2 = <&cpu_opp_table>;
++	clocks = <&clkc CLKID_CPU_CLK>;
++	clock-latency = <50000>;
++};
++
++&cpu1 {
++	cpu-supply = <&vddcpu>;
++	operating-points-v2 = <&cpu_opp_table>;
++	clocks = <&clkc CLKID_CPU1_CLK>;
++	clock-latency = <50000>;
++};
++
++&cpu2 {
++	cpu-supply = <&vddcpu>;
++	operating-points-v2 = <&cpu_opp_table>;
++	clocks = <&clkc CLKID_CPU2_CLK>;
++	clock-latency = <50000>;
++};
++
++&cpu3 {
++	cpu-supply = <&vddcpu>;
++	operating-points-v2 = <&cpu_opp_table>;
++	clocks = <&clkc CLKID_CPU3_CLK>;
++	clock-latency = <50000>;
++};
++
++&cvbs_vdac_port {
++	cvbs_vdac_out: endpoint {
++		remote-endpoint = <&cvbs_connector_in>;
++	};
++};
++
++&hdmi_tx {
++	status = "okay";
++	pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;
++	pinctrl-names = "default";
++};
++
++&hdmi_tx_tmds_port {
++	hdmi_tx_tmds_out: endpoint {
++		remote-endpoint = <&hdmi_connector_in>;
++	};
++};
++
++&ir {
++	status = "okay";
++	pinctrl-0 = <&remote_input_ao_pins>;
++	pinctrl-names = "default";
++};
++
++&pwm_AO_ab {
++	status = "okay";
++	pinctrl-0 = <&pwm_ao_a_pins>;
++	pinctrl-names = "default";
++	clocks = <&xtal>;
++	clock-names = "clkin0";
++};
++
++&pwm_AO_cd {
++	pinctrl-0 = <&pwm_ao_d_e_pins>;
++	pinctrl-names = "default";
++	clocks = <&xtal>;
++	clock-names = "clkin1";
++	status = "okay";
++};
++
++&pwm_ef {
++	status = "okay";
++	pinctrl-0 = <&pwm_e_pins>;
++	pinctrl-names = "default";
++	clocks = <&xtal>;
++	clock-names = "clkin0";
++};
++
++&saradc {
++	status = "okay";
++	vref-supply = <&vddio_ao1v8>;
++};
++
++/* SDIO */
++&sd_emmc_a {
++	status = "okay";
++	pinctrl-0 = <&sdio_pins>;
++	pinctrl-1 = <&sdio_clk_gate_pins>;
++	pinctrl-names = "default", "clk-gate";
++	#address-cells = <1>;
++	#size-cells = <0>;
++
++	bus-width = <4>;
++	cap-sd-highspeed;
++	max-frequency = <100000000>;
++
++	non-removable;
++	disable-wp;
++
++	/* WiFi firmware requires power to be kept while in suspend */
++	keep-power-in-suspend;
++
++	mmc-pwrseq = <&sdio_pwrseq>;
++
++	vmmc-supply = <&vddao_3v3>;
++	vqmmc-supply = <&vddio_ao1v8>;
++};
++
++/* SD card */
++&sd_emmc_b {
++	status = "okay";
++	pinctrl-0 = <&sdcard_c_pins>;
++	pinctrl-1 = <&sdcard_clk_gate_c_pins>;
++	pinctrl-names = "default", "clk-gate";
++
++	bus-width = <4>;
++	cap-sd-highspeed;
++	max-frequency = <50000000>;
++	disable-wp;
++
++	cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
++	vmmc-supply = <&vddao_3v3>;
++	vqmmc-supply = <&vddao_3v3>;
++};
++
++/* eMMC */
++&sd_emmc_c {
++	status = "okay";
++	pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
++	pinctrl-1 = <&emmc_clk_gate_pins>;
++	pinctrl-names = "default", "clk-gate";
++
++	bus-width = <8>;
++	cap-mmc-highspeed;
++	mmc-ddr-1_8v;
++	mmc-hs200-1_8v;
++	max-frequency = <200000000>;
++	non-removable;
++	disable-wp;
++
++	mmc-pwrseq = <&emmc_pwrseq>;
++	vmmc-supply = <&vddao_3v3>;
++	vqmmc-supply = <&emmc_1v8>;
++};
++
++&uart_AO {
++	status = "okay";
++	pinctrl-0 = <&uart_ao_a_pins>;
++	pinctrl-names = "default";
++};
++
++&usb {
++	status = "okay";
++	dr_mode = "otg";
++};
+-- 
+2.25.1
+

patch/kernel/meson64-dev/0049-arm64-dts-meson-add-initial-device-trees-for-X96-AIR.patch

@@ -0,0 +1,309 @@
+From bfa1583bbbd778a6ceb918bdd24b166bfa91ee34 Mon Sep 17 00:00:00 2001
+From: Christian Hewitt <christianshewitt@gmail.com>
+Date: Wed, 24 Jun 2020 15:04:10 +0000
+Subject: [PATCH 49/58] arm64: dts: meson: add initial device-trees for X96-AIR
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+The Amediatek X96-AIR is based on Amlogic S905X3 reference board
+designs and ships in multiple configurations:
+
+– 4GB DDR3 + 64GB eMMC + WiFi a/b/g/n/ac + BT + Gb Ethernet
+– 4GB DDR3 + 32GB eMMC + WiFi a/b/g/n/ac + BT + Gb Ethernet
+– 4GB DDR3 + 32GB eMMC + WiFi b/g/n (no BT) + 10/100 Ethernet
+– 2GB DDR3 + 16GB eMMC + WiFi b/g/n (no BT) + 10/100 Ethernet
+...
+- HDMI 2.1 video
+- S/PDIF optical output
+- AV output
+- 2x USB 2.0 inc. OTG port
+- 1x USB 3.0 port
+- IR receiver
+- 1x micro SD card slot (internal)
+- 1x Reset/Update button (in AV jack)
+- 7-segment VFD
+
+The device-tree with -100 suffix supports models with 10/100 Ethernet
+and with -1000 suffix supports models with Gigabit Ethernet.
+
+Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
+---
+ arch/arm64/boot/dts/amlogic/Makefile          |   2 +
+ .../dts/amlogic/meson-sm1-x96-air-100.dts     | 112 +++++++++++++++
+ .../dts/amlogic/meson-sm1-x96-air-1000.dts    | 133 ++++++++++++++++++
+ 3 files changed, 247 insertions(+)
+ create mode 100644 arch/arm64/boot/dts/amlogic/meson-sm1-x96-air-100.dts
+ create mode 100644 arch/arm64/boot/dts/amlogic/meson-sm1-x96-air-1000.dts
+
+diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
+index da11ef28a47b..5de47ce6d8a4 100644
+--- a/arch/arm64/boot/dts/amlogic/Makefile
++++ b/arch/arm64/boot/dts/amlogic/Makefile
+@@ -51,4 +51,6 @@ dtb-$(CONFIG_ARCH_MESON) += meson-sm1-khadas-vim3l.dtb
+ dtb-$(CONFIG_ARCH_MESON) += meson-sm1-khadas-vim3l.dtb
+ dtb-$(CONFIG_ARCH_MESON) += meson-sm1-odroid-c4.dtb
+ dtb-$(CONFIG_ARCH_MESON) += meson-sm1-odroid-hc4.dtb
++dtb-$(CONFIG_ARCH_MESON) += meson-sm1-x96-air-100.dtb
++dtb-$(CONFIG_ARCH_MESON) += meson-sm1-x96-air-1000.dtb
+ dtb-$(CONFIG_ARCH_MESON) += meson-a1-ad401.dtb
+diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-x96-air-100.dts b/arch/arm64/boot/dts/amlogic/meson-sm1-x96-air-100.dts
+new file mode 100644
+index 000000000000..54a765c1948b
+--- /dev/null
++++ b/arch/arm64/boot/dts/amlogic/meson-sm1-x96-air-100.dts
+@@ -0,0 +1,112 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++/*
++ * Copyright (c) 2019 BayLibre SAS. All rights reserved.
++ * Copyright (c) 2020 Christian Hewitt <christianshewitt@gmail.com>
++ */
++
++/dts-v1/;
++
++#include "meson-sm1-ac2xx.dtsi"
++#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
++
++/ {
++	compatible = "amediatech,x96-air-100", "amlogic,sm1";
++	model = "Shenzhen Amediatech Technology Co., Ltd X96 Air";
++
++	sound {
++		compatible = "amlogic,axg-sound-card";
++		model = "X96-AIR";
++		audio-aux-devs = <&tdmout_b>;
++		audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
++				"TDMOUT_B IN 1", "FRDDR_B OUT 1",
++				"TDMOUT_B IN 2", "FRDDR_C OUT 1",
++				"TDM_B Playback", "TDMOUT_B OUT";
++
++		assigned-clocks = <&clkc CLKID_MPLL2>,
++				  <&clkc CLKID_MPLL0>,
++				  <&clkc CLKID_MPLL1>;
++		assigned-clock-parents = <0>, <0>, <0>;
++		assigned-clock-rates = <294912000>,
++				       <270950400>,
++				       <393216000>;
++		status = "okay";
++
++		dai-link-0 {
++			sound-dai = <&frddr_a>;
++		};
++
++		dai-link-1 {
++			sound-dai = <&frddr_b>;
++		};
++
++		dai-link-2 {
++			sound-dai = <&frddr_c>;
++		};
++
++		/* 8ch hdmi interface */
++		dai-link-3 {
++			sound-dai = <&tdmif_b>;
++			dai-format = "i2s";
++			dai-tdm-slot-tx-mask-0 = <1 1>;
++			dai-tdm-slot-tx-mask-1 = <1 1>;
++			dai-tdm-slot-tx-mask-2 = <1 1>;
++			dai-tdm-slot-tx-mask-3 = <1 1>;
++			mclk-fs = <256>;
++
++			codec {
++				sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
++			};
++		};
++
++		/* hdmi glue */
++		dai-link-4 {
++			sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
++
++			codec {
++				sound-dai = <&hdmi_tx>;
++			};
++		};
++	};
++};
++
++&arb {
++	status = "okay";
++};
++
++&clkc_audio {
++	status = "okay";
++};
++
++&ethmac {
++        status = "okay";
++        phy-handle = <&internal_ephy>;
++        phy-mode = "rmii";
++};
++
++&frddr_a {
++	status = "okay";
++};
++
++&frddr_b {
++	status = "okay";
++};
++
++&frddr_c {
++	status = "okay";
++};
++
++&ir {
++	linux,rc-map-name = "rc-beelink-gs1";
++};
++
++&tdmif_b {
++	status = "okay";
++};
++
++&tdmout_b {
++	status = "okay";
++};
++
++&tohdmitx {
++	status = "okay";
++};
+diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-x96-air-1000.dts b/arch/arm64/boot/dts/amlogic/meson-sm1-x96-air-1000.dts
+new file mode 100644
+index 000000000000..8047c6b116fe
+--- /dev/null
++++ b/arch/arm64/boot/dts/amlogic/meson-sm1-x96-air-1000.dts
+@@ -0,0 +1,133 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++/*
++ * Copyright (c) 2019 BayLibre SAS. All rights reserved.
++ * Copyright (c) 2020 Christian Hewitt <christianshewitt@gmail.com>
++ */
++
++/dts-v1/;
++
++#include "meson-sm1-ac2xx.dtsi"
++#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
++
++/ {
++	compatible = "amediatech,x96-air-1000", "amlogic,sm1";
++	model = "Shenzhen Amediatech Technology Co., Ltd X96 Air";
++
++	sound {
++		compatible = "amlogic,axg-sound-card";
++		model = "X96-AIR";
++		audio-aux-devs = <&tdmout_b>;
++		audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
++				"TDMOUT_B IN 1", "FRDDR_B OUT 1",
++				"TDMOUT_B IN 2", "FRDDR_C OUT 1",
++				"TDM_B Playback", "TDMOUT_B OUT";
++
++		assigned-clocks = <&clkc CLKID_MPLL2>,
++				  <&clkc CLKID_MPLL0>,
++				  <&clkc CLKID_MPLL1>;
++		assigned-clock-parents = <0>, <0>, <0>;
++		assigned-clock-rates = <294912000>,
++				       <270950400>,
++				       <393216000>;
++		status = "okay";
++
++		dai-link-0 {
++			sound-dai = <&frddr_a>;
++		};
++
++		dai-link-1 {
++			sound-dai = <&frddr_b>;
++		};
++
++		dai-link-2 {
++			sound-dai = <&frddr_c>;
++		};
++
++		/* 8ch hdmi interface */
++		dai-link-3 {
++			sound-dai = <&tdmif_b>;
++			dai-format = "i2s";
++			dai-tdm-slot-tx-mask-0 = <1 1>;
++			dai-tdm-slot-tx-mask-1 = <1 1>;
++			dai-tdm-slot-tx-mask-2 = <1 1>;
++			dai-tdm-slot-tx-mask-3 = <1 1>;
++			mclk-fs = <256>;
++
++			codec {
++				sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
++			};
++		};
++
++		/* hdmi glue */
++		dai-link-4 {
++			sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
++
++			codec {
++				sound-dai = <&hdmi_tx>;
++			};
++		};
++	};
++};
++
++&arb {
++	status = "okay";
++};
++
++&clkc_audio {
++	status = "okay";
++};
++
++&ethmac {
++	status = "okay";
++
++	pinctrl-0 = <&eth_pins>, <&eth_rgmii_pins>;
++	pinctrl-names = "default";
++	phy-mode = "rgmii-txid";
++	phy-handle = <&external_phy>;
++
++	rx-internal-delay-ps = <800>;
++};
++
++&ext_mdio {
++	external_phy: ethernet-phy@0 {
++		/* Realtek RTL8211F (0x001cc916) */
++		reg = <0>;
++		max-speed = <1000>;
++
++		reset-assert-us = <10000>;
++		reset-deassert-us = <80000>;
++		reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
++
++		interrupt-parent = <&gpio_intc>;
++		/* MAC_INTR on GPIOZ_14 */
++		interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
++	};
++};
++
++&frddr_a {
++	status = "okay";
++};
++
++&frddr_b {
++	status = "okay";
++};
++
++&frddr_c {
++	status = "okay";
++};
++
++&ir {
++	linux,rc-map-name = "rc-x96max";
++};
++
++&tdmif_b {
++	status = "okay";
++};
++
++&tdmout_b {
++	status = "okay";
++};
++
++&tohdmitx {
++	status = "okay";
++};
+-- 
+2.25.1
+

patch/kernel/meson64-dev/0051-WIP-arm64-dts-meson-add-audio-playback-to-s905x-p212.patch

@@ -1,109 +0,0 @@
-From 86a08466dd986507bbd4d609d2d81d9bfc300999 Mon Sep 17 00:00:00 2001
-From: Christian Hewitt <christianshewitt@gmail.com>
-Date: Tue, 18 Feb 2020 03:54:58 +0000
-Subject: [PATCH 051/101] WIP: arm64: dts: meson: add audio playback to
- s905x-p212 dtsi
-
-Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
----
- .../dts/amlogic/meson-gxl-s905x-p212.dtsi     | 70 +++++++++++++++++++
- 1 file changed, 70 insertions(+)
-
-diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi
-index 43eb7d149e36..ba74f54c5b3f 100644
---- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi
-+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi
-@@ -11,6 +11,7 @@
- /* Common DTSI for devices which are based on the P212 reference board. */
- 
- #include "meson-gxl-s905x.dtsi"
-+#include <dt-bindings/sound/meson-aiu.h>
- 
- / {
- 	aliases {
-@@ -23,6 +24,13 @@
- 		stdout-path = "serial0:115200n8";
- 	};
- 
-+	dio2133: analog-amplifier {
-+		compatible = "simple-audio-amplifier";
-+		sound-name-prefix = "AU2";
-+		VCC-supply = <&hdmi_5v>;
-+		enable-gpios = <&gpio GPIOH_5 GPIO_ACTIVE_HIGH>;
-+	};
-+
- 	memory@0 {
- 		device_type = "memory";
- 		reg = <0x0 0x0 0x0 0x80000000>;
-@@ -86,6 +94,68 @@
- 		clocks = <&wifi32k>;
- 		clock-names = "ext_clock";
- 	};
-+
-+	sound {
-+		compatible = "amlogic,gx-sound-card";
-+		model = "GX-SOUND-CARD";
-+		audio-aux-devs = <&dio2133>;
-+		audio-widgets = "Line", "Lineout";
-+		audio-routing = "AU2 INL", "ACODEC LOLN",
-+				"AU2 INR", "ACODEC LORN",
-+				"Lineout", "AU2 OUTL",
-+				"Lineout", "AU2 OUTR";
-+		assigned-clocks = <&clkc CLKID_MPLL2>,
-+				  <&clkc CLKID_MPLL0>,
-+				  <&clkc CLKID_MPLL1>;
-+		assigned-clock-parents = <0>, <0>, <0>;
-+		assigned-clock-rates = <294912000>,
-+				       <270950400>,
-+				       <393216000>;
-+		status = "okay";
-+
-+		dai-link-0 {
-+			sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>;
-+		};
-+
-+		dai-link-1 {
-+			sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>;
-+			dai-format = "i2s";
-+			mclk-fs = <512>;
-+
-+			codec-0 {
-+				sound-dai = <&aiu AIU_HDMI CTRL_I2S>;
-+			};
-+
-+			codec-1 {
-+				sound-dai = <&aiu AIU_ACODEC CTRL_I2S>;
-+			};
-+		};
-+
-+		dai-link-2 {
-+			sound-dai = <&aiu AIU_HDMI CTRL_OUT>;
-+
-+			codec-0 {
-+				sound-dai = <&hdmi_tx>;
-+			};
-+		};
-+
-+		dai-link-3 {
-+			sound-dai = <&aiu AIU_ACODEC CTRL_OUT>;
-+
-+			codec-0 {
-+				sound-dai = <&acodec>;
-+			};
-+		};
-+	};
-+};
-+
-+&acodec {
-+	AVDD-supply = <&vddio_ao18>;
-+	status = "okay";
-+};
-+
-+&aiu {
-+	status = "okay";
- };
- 
- &ethmac {
--- 
-2.17.1
-

patch/kernel/meson64-dev/0051-arm64-dts-meson-add-initial-device-trees-for-A95XF3-.patch

@@ -0,0 +1,304 @@
+From 9f465b038eb937d9bc4b8c9c23162b20824021a5 Mon Sep 17 00:00:00 2001
+From: Christian Hewitt <christianshewitt@gmail.com>
+Date: Wed, 3 Jun 2020 18:03:22 +0000
+Subject: [PATCH 51/58] arm64: dts: meson: add initial device-trees for
+ A95XF3-AIR
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+The CYX A95XF3-AIR is based on Amlogic S905X3 reference board
+designs and ships in multiple configurations:
+
+– 4GB DDR3 + 64GB eMMC + WiFi a/b/g/n/ac + BT + Gb Ethernet
+– 4GB DDR3 + 32GB eMMC + WiFi a/b/g/n/ac + BT + Gb Ethernet
+– 2GB DDR3 + 16GB eMMC + WiFi b/g/n (no BT) + 10/100 Ethernet
+...
+- HDMI 2.1 video
+- S/PDIF optical output
+- AV output
+- 1x USB 2.0 OTG port
+- 1x USB 3.0 port
+- IR receiver
+- 1x micro SD card slot (internal)
+- 1x Reset/Update button (in AV jack)
+- 7-segment VFD
+- Multicolour case LED 'arc'
+
+The device-tree with -100 suffix supports models with 10/100 Ethernet
+and with -1000 suffix supports models with Gigabit Ethernet.
+
+Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
+---
+ arch/arm64/boot/dts/amlogic/Makefile          |   2 +
+ .../dts/amlogic/meson-sm1-a95xf3-air-100.dts  | 108 +++++++++++++++
+ .../dts/amlogic/meson-sm1-a95xf3-air-1000.dts | 129 ++++++++++++++++++
+ 3 files changed, 239 insertions(+)
+ create mode 100644 arch/arm64/boot/dts/amlogic/meson-sm1-a95xf3-air-100.dts
+ create mode 100644 arch/arm64/boot/dts/amlogic/meson-sm1-a95xf3-air-1000.dts
+
+diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
+index 5de47ce6d8a4..47a9d1f85596 100644
+--- a/arch/arm64/boot/dts/amlogic/Makefile
++++ b/arch/arm64/boot/dts/amlogic/Makefile
+@@ -46,6 +46,8 @@ dtb-$(CONFIG_ARCH_MESON) += meson-gxm-rbox-pro.dtb
+ dtb-$(CONFIG_ARCH_MESON) += meson-gxm-s912-libretech-pc.dtb
+ dtb-$(CONFIG_ARCH_MESON) += meson-gxm-vega-s96.dtb
+ dtb-$(CONFIG_ARCH_MESON) += meson-gxm-wetek-core2.dtb
++dtb-$(CONFIG_ARCH_MESON) += meson-sm1-a95xf3-air-100.dtb
++dtb-$(CONFIG_ARCH_MESON) += meson-sm1-a95xf3-air-1000.dtb
+ dtb-$(CONFIG_ARCH_MESON) += meson-sm1-bananapi-m5.dtb
+ dtb-$(CONFIG_ARCH_MESON) += meson-sm1-khadas-vim3l.dtb
+ dtb-$(CONFIG_ARCH_MESON) += meson-sm1-odroid-c4.dtb
+diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-a95xf3-air-100.dts b/arch/arm64/boot/dts/amlogic/meson-sm1-a95xf3-air-100.dts
+new file mode 100644
+index 000000000000..1d3820c4a2f5
+--- /dev/null
++++ b/arch/arm64/boot/dts/amlogic/meson-sm1-a95xf3-air-100.dts
+@@ -0,0 +1,108 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++/*
++ * Copyright (c) 2019 BayLibre SAS. All rights reserved.
++ * Copyright (c) 2020 Christian Hewitt <christianshewitt@gmail.com>
++ */
++
++/dts-v1/;
++
++#include "meson-sm1-ac2xx.dtsi"
++#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
++
++/ {
++	compatible = "cyx,a95xf3-air-100", "amlogic,sm1";
++	model = "Shenzhen CYX Industrial Co., Ltd A95XF3-AIR";
++
++	sound {
++		compatible = "amlogic,axg-sound-card";
++		model = "A95XF3-AIR";
++		audio-aux-devs = <&tdmout_b>;
++		audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
++				"TDMOUT_B IN 1", "FRDDR_B OUT 1",
++				"TDMOUT_B IN 2", "FRDDR_C OUT 1",
++				"TDM_B Playback", "TDMOUT_B OUT";
++
++		assigned-clocks = <&clkc CLKID_MPLL2>,
++				  <&clkc CLKID_MPLL0>,
++				  <&clkc CLKID_MPLL1>;
++		assigned-clock-parents = <0>, <0>, <0>;
++		assigned-clock-rates = <294912000>,
++				       <270950400>,
++				       <393216000>;
++		status = "okay";
++
++		dai-link-0 {
++			sound-dai = <&frddr_a>;
++		};
++
++		dai-link-1 {
++			sound-dai = <&frddr_b>;
++		};
++
++		dai-link-2 {
++			sound-dai = <&frddr_c>;
++		};
++
++		/* 8ch hdmi interface */
++		dai-link-3 {
++			sound-dai = <&tdmif_b>;
++			dai-format = "i2s";
++			dai-tdm-slot-tx-mask-0 = <1 1>;
++			dai-tdm-slot-tx-mask-1 = <1 1>;
++			dai-tdm-slot-tx-mask-2 = <1 1>;
++			dai-tdm-slot-tx-mask-3 = <1 1>;
++			mclk-fs = <256>;
++
++			codec {
++				sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
++			};
++		};
++
++		/* hdmi glue */
++		dai-link-4 {
++			sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
++
++			codec {
++				sound-dai = <&hdmi_tx>;
++			};
++		};
++	};
++};
++
++&arb {
++	status = "okay";
++};
++
++&clkc_audio {
++	status = "okay";
++};
++
++&ethmac {
++        status = "okay";
++        phy-handle = <&internal_ephy>;
++        phy-mode = "rmii";
++};
++
++&frddr_a {
++	status = "okay";
++};
++
++&frddr_b {
++	status = "okay";
++};
++
++&frddr_c {
++	status = "okay";
++};
++
++&tdmif_b {
++	status = "okay";
++};
++
++&tdmout_b {
++	status = "okay";
++};
++
++&tohdmitx {
++	status = "okay";
++};
+diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-a95xf3-air-1000.dts b/arch/arm64/boot/dts/amlogic/meson-sm1-a95xf3-air-1000.dts
+new file mode 100644
+index 000000000000..c87d948fa3e6
+--- /dev/null
++++ b/arch/arm64/boot/dts/amlogic/meson-sm1-a95xf3-air-1000.dts
+@@ -0,0 +1,129 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++/*
++ * Copyright (c) 2019 BayLibre SAS. All rights reserved.
++ * Copyright (c) 2020 Christian Hewitt <christianshewitt@gmail.com>
++ */
++
++/dts-v1/;
++
++#include "meson-sm1-ac2xx.dtsi"
++#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
++
++/ {
++	compatible = "cyx,a95xf3-air-1000", "amlogic,sm1";
++	model = "Shenzhen CYX Industrial Co., Ltd A95XF3-AIR";
++
++	sound {
++		compatible = "amlogic,axg-sound-card";
++		model = "A95XF3-AIR";
++		audio-aux-devs = <&tdmout_b>;
++		audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
++				"TDMOUT_B IN 1", "FRDDR_B OUT 1",
++				"TDMOUT_B IN 2", "FRDDR_C OUT 1",
++				"TDM_B Playback", "TDMOUT_B OUT";
++
++		assigned-clocks = <&clkc CLKID_MPLL2>,
++				  <&clkc CLKID_MPLL0>,
++				  <&clkc CLKID_MPLL1>;
++		assigned-clock-parents = <0>, <0>, <0>;
++		assigned-clock-rates = <294912000>,
++				       <270950400>,
++				       <393216000>;
++		status = "okay";
++
++		dai-link-0 {
++			sound-dai = <&frddr_a>;
++		};
++
++		dai-link-1 {
++			sound-dai = <&frddr_b>;
++		};
++
++		dai-link-2 {
++			sound-dai = <&frddr_c>;
++		};
++
++		/* 8ch hdmi interface */
++		dai-link-3 {
++			sound-dai = <&tdmif_b>;
++			dai-format = "i2s";
++			dai-tdm-slot-tx-mask-0 = <1 1>;
++			dai-tdm-slot-tx-mask-1 = <1 1>;
++			dai-tdm-slot-tx-mask-2 = <1 1>;
++			dai-tdm-slot-tx-mask-3 = <1 1>;
++			mclk-fs = <256>;
++
++			codec {
++				sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
++			};
++		};
++
++		/* hdmi glue */
++		dai-link-4 {
++			sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
++
++			codec {
++				sound-dai = <&hdmi_tx>;
++			};
++		};
++	};
++};
++
++&arb {
++	status = "okay";
++};
++
++&clkc_audio {
++	status = "okay";
++};
++
++&ethmac {
++	status = "okay";
++
++	pinctrl-0 = <&eth_pins>, <&eth_rgmii_pins>;
++	pinctrl-names = "default";
++	phy-mode = "rgmii-txid";
++	phy-handle = <&external_phy>;
++
++	rx-internal-delay-ps = <800>;
++};
++
++&ext_mdio {
++	external_phy: ethernet-phy@0 {
++		/* Realtek RTL8211F (0x001cc916) */
++		reg = <0>;
++		max-speed = <1000>;
++
++		reset-assert-us = <10000>;
++		reset-deassert-us = <80000>;
++		reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
++
++		interrupt-parent = <&gpio_intc>;
++		/* MAC_INTR on GPIOZ_14 */
++		interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
++	};
++};
++
++&frddr_a {
++	status = "okay";
++};
++
++&frddr_b {
++	status = "okay";
++};
++
++&frddr_c {
++	status = "okay";
++};
++
++&tdmif_b {
++	status = "okay";
++};
++
++&tdmout_b {
++	status = "okay";
++};
++
++&tohdmitx {
++	status = "okay";
++};
+-- 
+2.25.1
+

patch/kernel/meson64-dev/0052-dt-bindings-vendor-prefixes-add-haochuangyi-prefix.patch

@@ -0,0 +1,29 @@
+From 559161b51f5b05553a46c7c9907bfc374db5200b Mon Sep 17 00:00:00 2001
+From: Christian Hewitt <christianshewitt@gmail.com>
+Date: Tue, 12 Jan 2021 17:24:07 +0000
+Subject: [PATCH 52/58] dt-bindings: vendor-prefixes: add haochuangyi prefix
+
+Shenzhen Haochuangyi Technology Co.,Ltd are a manufcaturer of Android
+Set-Top Box devices.
+
+Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
+---
+ Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml
+index f6064d84a424..b0b4857b7ae8 100644
+--- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
++++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
+@@ -455,6 +455,8 @@ patternProperties:
+     deprecated: true
+   "^hannstar,.*":
+     description: HannStar Display Corporation
++  "^haochuangyi,.*":
++    description: Shenzhen Haochuangyi Technology Co.,Ltd
+   "^haoyu,.*":
+     description: Haoyu Microelectronic Co. Ltd.
+   "^hardkernel,.*":
+-- 
+2.25.1
+

patch/kernel/meson64-dev/0054-arm64-dts-meson-add-initial-device-tree-for-H96-Max.patch

@@ -0,0 +1,196 @@
+From 695ce53e74edb9760b08c60a7fb5221e5a8733cf Mon Sep 17 00:00:00 2001
+From: Christian Hewitt <christianshewitt@gmail.com>
+Date: Tue, 12 Jan 2021 17:26:42 +0000
+Subject: [PATCH 54/58] arm64: dts: meson: add initial device-tree for H96-Max
+
+The Haochuangyi H96-Max is based on the Amlogic S905X3 reference
+design with the following specs:
+
+- 4GB DDR4 RAM
+- 32/64/128GB eMMC
+- HDMI 2.1 video
+- S/PDIF optical output
+- AV output
+- 10/100/1000 Base-T Ethernet
+- AP6356S Wireless (802.11 a/b/g/n/ac, BT 4.1)
+- 1x USB 2.0 OTG port
+- 1x USB 3.0 port
+- IR receiver
+- 1x micro SD card slot (internal)
+- 1x Reset/Update button (in AV jack)
+- 7-segment VFD
+
+Tested-by: Benoit Masson <yahoo@perenite.com>
+Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
+---
+ arch/arm64/boot/dts/amlogic/Makefile          |   1 +
+ .../boot/dts/amlogic/meson-sm1-h96-max.dts    | 145 ++++++++++++++++++
+ 2 files changed, 146 insertions(+)
+ create mode 100644 arch/arm64/boot/dts/amlogic/meson-sm1-h96-max.dts
+
+diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
+index 47a9d1f85596..7dd039173ef0 100644
+--- a/arch/arm64/boot/dts/amlogic/Makefile
++++ b/arch/arm64/boot/dts/amlogic/Makefile
+@@ -49,6 +49,7 @@ dtb-$(CONFIG_ARCH_MESON) += meson-gxm-wetek-core2.dtb
+ dtb-$(CONFIG_ARCH_MESON) += meson-sm1-a95xf3-air-100.dtb
+ dtb-$(CONFIG_ARCH_MESON) += meson-sm1-a95xf3-air-1000.dtb
+ dtb-$(CONFIG_ARCH_MESON) += meson-sm1-bananapi-m5.dtb
++dtb-$(CONFIG_ARCH_MESON) += meson-sm1-h96-max.dtb
+ dtb-$(CONFIG_ARCH_MESON) += meson-sm1-sei610.dtb
+ dtb-$(CONFIG_ARCH_MESON) += meson-sm1-khadas-vim3l.dtb
+ dtb-$(CONFIG_ARCH_MESON) += meson-sm1-odroid-c4.dtb
+diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-h96-max.dts b/arch/arm64/boot/dts/amlogic/meson-sm1-h96-max.dts
+new file mode 100644
+index 000000000000..0f6660e68e72
+--- /dev/null
++++ b/arch/arm64/boot/dts/amlogic/meson-sm1-h96-max.dts
+@@ -0,0 +1,145 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++/*
++ * Copyright (c) 2019 BayLibre SAS. All rights reserved.
++ * Copyright (c) 2020 Christian Hewitt <christianshewitt@gmail.com>
++ */
++
++/dts-v1/;
++
++#include "meson-sm1-ac2xx.dtsi"
++#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
++
++/ {
++	compatible = "haochuangyi,h96-max", "amlogic,sm1";
++	model = "Shenzhen Haochuangyi Technology Co., Ltd H96 Max";
++
++	sound {
++		compatible = "amlogic,axg-sound-card";
++		model = "H96-MAX";
++		audio-aux-devs = <&tdmout_b>;
++		audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
++				"TDMOUT_B IN 1", "FRDDR_B OUT 1",
++				"TDMOUT_B IN 2", "FRDDR_C OUT 1",
++				"TDM_B Playback", "TDMOUT_B OUT";
++
++		assigned-clocks = <&clkc CLKID_MPLL2>,
++				  <&clkc CLKID_MPLL0>,
++				  <&clkc CLKID_MPLL1>;
++		assigned-clock-parents = <0>, <0>, <0>;
++		assigned-clock-rates = <294912000>,
++				       <270950400>,
++				       <393216000>;
++		status = "okay";
++
++		dai-link-0 {
++			sound-dai = <&frddr_a>;
++		};
++
++		dai-link-1 {
++			sound-dai = <&frddr_b>;
++		};
++
++		dai-link-2 {
++			sound-dai = <&frddr_c>;
++		};
++
++		/* 8ch hdmi interface */
++		dai-link-3 {
++			sound-dai = <&tdmif_b>;
++			dai-format = "i2s";
++			dai-tdm-slot-tx-mask-0 = <1 1>;
++			dai-tdm-slot-tx-mask-1 = <1 1>;
++			dai-tdm-slot-tx-mask-2 = <1 1>;
++			dai-tdm-slot-tx-mask-3 = <1 1>;
++			mclk-fs = <256>;
++
++			codec {
++				sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
++			};
++		};
++
++		/* hdmi glue */
++		dai-link-4 {
++			sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
++
++			codec {
++				sound-dai = <&hdmi_tx>;
++			};
++		};
++	};
++};
++
++&arb {
++	status = "okay";
++};
++
++&clkc_audio {
++	status = "okay";
++};
++
++&ethmac {
++	status = "okay";
++
++	pinctrl-0 = <&eth_pins>, <&eth_rgmii_pins>;
++	pinctrl-names = "default";
++	phy-mode = "rgmii-txid";
++	phy-handle = <&external_phy>;
++
++	rx-internal-delay-ps = <800>;
++};
++
++&ext_mdio {
++	external_phy: ethernet-phy@0 {
++		/* Realtek RTL8211F (0x001cc916) */
++		reg = <0>;
++		max-speed = <1000>;
++
++		reset-assert-us = <10000>;
++		reset-deassert-us = <80000>;
++		reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
++
++		interrupt-parent = <&gpio_intc>;
++		/* MAC_INTR on GPIOZ_14 */
++		interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
++	};
++};
++
++&frddr_a {
++	status = "okay";
++};
++
++&frddr_b {
++	status = "okay";
++};
++
++&frddr_c {
++	status = "okay";
++};
++
++&tdmif_b {
++	status = "okay";
++};
++
++&tdmout_b {
++	status = "okay";
++};
++
++&tohdmitx {
++	status = "okay";
++};
++
++&uart_A {
++	status = "okay";
++
++	pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
++	pinctrl-names = "default";
++	uart-has-rtscts;
++
++	bluetooth {
++		compatible = "brcm,bcm43438-bt";
++		shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
++		max-speed = <2000000>;
++		clocks = <&wifi32k>;
++		clock-names = "lpo";
++	};
++};
+-- 
+2.25.1
+

patch/kernel/meson64-dev/0055-dt-bindings-arm-amlogic-add-support-for-the-Tanix-TX.patch

@@ -0,0 +1,29 @@
+From 6e61f9d59b12ccba2bf51dd41278dfe03f470b92 Mon Sep 17 00:00:00 2001
+From: Christian Hewitt <christianshewitt@gmail.com>
+Date: Sat, 29 Feb 2020 15:13:02 +0000
+Subject: [PATCH 55/58] dt-bindings: arm: amlogic: add support for the Tanix
+ TX5 Max
+
+The Oranth (Tanix) TX5 Max is based on the Amlogic U200 reference
+board with an S905X2 chip.
+
+Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
+---
+ Documentation/devicetree/bindings/arm/amlogic.yaml | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/Documentation/devicetree/bindings/arm/amlogic.yaml b/Documentation/devicetree/bindings/arm/amlogic.yaml
+index 455cdd951c6e..e8aec4b53553 100644
+--- a/Documentation/devicetree/bindings/arm/amlogic.yaml
++++ b/Documentation/devicetree/bindings/arm/amlogic.yaml
+@@ -140,6 +140,7 @@ properties:
+               - amediatech,x96-max
+               - amlogic,u200
+               - seirobotics,sei510
++              - oranth,tx5-max
+           - const: amlogic,g12a
+ 
+       - description: Boards with the Amlogic Meson G12B A311D SoC
+-- 
+2.25.1
+

patch/kernel/meson64-dev/0056-arm64-dts-meson-add-support-for-the-Tanix-TX5-Max.patch

@@ -0,0 +1,528 @@
+From 10f56e851df75361f15f37aac326fc1eeea68533 Mon Sep 17 00:00:00 2001
+From: Christian Hewitt <christianshewitt@gmail.com>
+Date: Sun, 20 Oct 2019 04:06:59 +0000
+Subject: [PATCH 56/58] arm64: dts: meson: add support for the Tanix TX5 Max
+
+The Tanix TX5 Max is based on the Amlogic U200 reference design
+using the S905X2 chipset. Hardware specification:
+
+- 4GB LPDDR4 RAM
+- 32GB eMMC storage
+- 10/100/1000 Base-T Ethernet using External RGMII PHY
+- 802.11 a/b/g/b/ac + BT 4.1 sdio wireless
+- HDMI 2.0 (4k@60p) video
+- Composite video + 2-channel audio output on 3.5mm jack
+- S/PDIF audio output
+- 1x USB 3.0
+- 1x USB 2.0
+- 1x micro SD card slot
+
+Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
+---
+ arch/arm64/boot/dts/amlogic/Makefile          |   1 +
+ .../dts/amlogic/meson-g12a-tanix-tx5max.dts   | 481 ++++++++++++++++++
+ 2 files changed, 482 insertions(+)
+ create mode 100644 arch/arm64/boot/dts/amlogic/meson-g12a-tanix-tx5max.dts
+
+diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
+index 7dd039173ef0..7d8586c718a1 100644
+--- a/arch/arm64/boot/dts/amlogic/Makefile
++++ b/arch/arm64/boot/dts/amlogic/Makefile
+@@ -1,6 +1,7 @@
+ # SPDX-License-Identifier: GPL-2.0
+ dtb-$(CONFIG_ARCH_MESON) += meson-axg-s400.dtb
+ dtb-$(CONFIG_ARCH_MESON) += meson-g12a-sei510.dtb
++dtb-$(CONFIG_ARCH_MESON) += meson-g12a-tanix-tx5max.dtb
+ dtb-$(CONFIG_ARCH_MESON) += meson-g12a-u200.dtb
+ dtb-$(CONFIG_ARCH_MESON) += meson-g12a-x96-max.dtb
+ dtb-$(CONFIG_ARCH_MESON) += meson-g12b-gsking-x.dtb
+diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-tanix-tx5max.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-tanix-tx5max.dts
+new file mode 100644
+index 000000000000..0e55427ca398
+--- /dev/null
++++ b/arch/arm64/boot/dts/amlogic/meson-g12a-tanix-tx5max.dts
+@@ -0,0 +1,481 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++/*
++ * Copyright (c) 2018 BayLibre SAS. All rights reserved.
++ */
++
++/dts-v1/;
++
++#include "meson-g12a.dtsi"
++#include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/gpio/meson-g12a-gpio.h>
++#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
++
++/ {
++	compatible = "oranth,tx5-max", "amlogic,g12a";
++	model = "Tanix TX5 Max";
++
++	aliases {
++		serial0 = &uart_AO;
++		ethernet0 = &ethmac;
++	};
++
++	spdif_dit: audio-codec-1 {
++		#sound-dai-cells = <0>;
++		compatible = "linux,spdif-dit";
++		status = "okay";
++		sound-name-prefix = "DIT";
++	};
++
++	chosen {
++		stdout-path = "serial0:115200n8";
++	};
++	memory@0 {
++		device_type = "memory";
++		reg = <0x0 0x0 0x0 0x40000000>;
++	};
++
++	cvbs-connector {
++		compatible = "composite-video-connector";
++
++		port {
++			cvbs_connector_in: endpoint {
++				remote-endpoint = <&cvbs_vdac_out>;
++			};
++		};
++	};
++
++	hdmi-connector {
++		compatible = "hdmi-connector";
++		type = "a";
++
++		port {
++			hdmi_connector_in: endpoint {
++				remote-endpoint = <&hdmi_tx_tmds_out>;
++			};
++		};
++	};
++
++	emmc_pwrseq: emmc-pwrseq {
++		compatible = "mmc-pwrseq-emmc";
++		reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
++	};
++
++	sdio_pwrseq: sdio-pwrseq {
++		compatible = "mmc-pwrseq-simple";
++		reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
++		clocks = <&wifi32k>;
++		clock-names = "ext_clock";
++	};
++
++	flash_1v8: regulator-flash_1v8 {
++		compatible = "regulator-fixed";
++		regulator-name = "FLASH_1V8";
++		regulator-min-microvolt = <1800000>;
++		regulator-max-microvolt = <1800000>;
++		vin-supply = <&vcc_3v3>;
++		regulator-always-on;
++	};
++
++	dc_in: regulator-dc_in {
++		compatible = "regulator-fixed";
++		regulator-name = "DC_IN";
++		regulator-min-microvolt = <5000000>;
++		regulator-max-microvolt = <5000000>;
++		regulator-always-on;
++	};
++
++	vcc_1v8: regulator-vcc_1v8 {
++		compatible = "regulator-fixed";
++		regulator-name = "VCC_1V8";
++		regulator-min-microvolt = <1800000>;
++		regulator-max-microvolt = <1800000>;
++		vin-supply = <&vcc_3v3>;
++		regulator-always-on;
++	};
++
++	vcc_3v3: regulator-vcc_3v3 {
++		compatible = "regulator-fixed";
++		regulator-name = "VCC_3V3";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++		vin-supply = <&vddao_3v3>;
++		regulator-always-on;
++		/* FIXME: actually controlled by VDDCPU_B_EN */
++	};
++
++	vcc_5v: regulator-vcc_5v {
++		compatible = "regulator-fixed";
++		regulator-name = "VCC_5V";
++		regulator-min-microvolt = <5000000>;
++		regulator-max-microvolt = <5000000>;
++		vin-supply = <&dc_in>;
++
++		gpio = <&gpio GPIOH_8 GPIO_OPEN_DRAIN>;
++		enable-active-low;
++	};
++
++	vddao_1v8: regulator-vddao_1v8 {
++		compatible = "regulator-fixed";
++		regulator-name = "VDDAO_1V8";
++		regulator-min-microvolt = <1800000>;
++		regulator-max-microvolt = <1800000>;
++		vin-supply = <&vddao_3v3>;
++		regulator-always-on;
++	};
++
++	vddao_3v3: regulator-vddao_3v3 {
++		compatible = "regulator-fixed";
++		regulator-name = "VDDAO_3V3";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++		vin-supply = <&dc_in>;
++		regulator-always-on;
++	};
++
++	vddcpu: regulator-vddcpu {
++		compatible = "pwm-regulator";
++
++		regulator-name = "VDDCPU";
++		regulator-min-microvolt = <721000>;
++		regulator-max-microvolt = <1022000>;
++
++		vin-supply = <&dc_in>;
++
++		pwms = <&pwm_AO_cd 1 1250 0>;
++		pwm-dutycycle-range = <100 0>;
++
++		regulator-boot-on;
++		regulator-always-on;
++	};
++
++	wifi32k: wifi32k {
++		compatible = "pwm-clock";
++		#clock-cells = <0>;
++		clock-frequency = <32768>;
++		pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
++	};
++
++	sound {
++		compatible = "amlogic,axg-sound-card";
++		model = "TANIX-TX5MAX";
++		audio-aux-devs = <&tdmout_b>;
++		audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
++				"TDMOUT_B IN 1", "FRDDR_B OUT 1",
++				"TDMOUT_B IN 2", "FRDDR_C OUT 1",
++				"TDM_B Playback", "TDMOUT_B OUT",
++				"SPDIFOUT IN 0", "FRDDR_A OUT 3",
++				"SPDIFOUT IN 1", "FRDDR_B OUT 3",
++				"SPDIFOUT IN 2", "FRDDR_C OUT 3";
++
++		assigned-clocks = <&clkc CLKID_MPLL2>,
++				  <&clkc CLKID_MPLL0>,
++				  <&clkc CLKID_MPLL1>;
++		assigned-clock-parents = <0>, <0>, <0>;
++		assigned-clock-rates = <294912000>,
++				       <270950400>,
++				       <393216000>;
++		status = "okay";
++
++		dai-link-0 {
++			sound-dai = <&frddr_a>;
++		};
++
++		dai-link-1 {
++			sound-dai = <&frddr_b>;
++		};
++
++		dai-link-2 {
++			sound-dai = <&frddr_c>;
++		};
++
++		/* 8ch hdmi interface */
++		dai-link-3 {
++			sound-dai = <&tdmif_b>;
++			dai-format = "i2s";
++			dai-tdm-slot-tx-mask-0 = <1 1>;
++			dai-tdm-slot-tx-mask-1 = <1 1>;
++			dai-tdm-slot-tx-mask-2 = <1 1>;
++			dai-tdm-slot-tx-mask-3 = <1 1>;
++			mclk-fs = <256>;
++
++			codec {
++				sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
++			};
++		};
++
++		/* spdif hdmi or toslink interface */
++		dai-link-4 {
++			sound-dai = <&spdifout>;
++
++			codec-0 {
++				sound-dai = <&spdif_dit>;
++			};
++
++			codec-1 {
++				sound-dai = <&tohdmitx TOHDMITX_SPDIF_IN_A>;
++			};
++		};
++
++		/* spdif hdmi interface */
++		dai-link-5 {
++			sound-dai = <&spdifout_b>;
++
++			codec {
++				sound-dai = <&tohdmitx TOHDMITX_SPDIF_IN_B>;
++			};
++		};
++
++		/* hdmi glue */
++		dai-link-6 {
++			sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
++
++			codec {
++				sound-dai = <&hdmi_tx>;
++			};
++		};
++	};
++};
++
++&arb {
++	status = "okay";
++};
++
++&cec_AO {
++	pinctrl-0 = <&cec_ao_a_h_pins>;
++	pinctrl-names = "default";
++	status = "disabled";
++	hdmi-phandle = <&hdmi_tx>;
++};
++
++&cecb_AO {
++	pinctrl-0 = <&cec_ao_b_h_pins>;
++	pinctrl-names = "default";
++	status = "okay";
++	hdmi-phandle = <&hdmi_tx>;
++};
++
++&clkc_audio {
++	status = "okay";
++};
++
++&cpu0 {
++	cpu-supply = <&vddcpu>;
++	operating-points-v2 = <&cpu_opp_table>;
++	clocks = <&clkc CLKID_CPU_CLK>;
++	clock-latency = <50000>;
++};
++
++&cpu1 {
++	cpu-supply = <&vddcpu>;
++	operating-points-v2 = <&cpu_opp_table>;
++	clocks = <&clkc CLKID_CPU_CLK>;
++	clock-latency = <50000>;
++};
++
++&cpu2 {
++	cpu-supply = <&vddcpu>;
++	operating-points-v2 = <&cpu_opp_table>;
++	clocks = <&clkc CLKID_CPU_CLK>;
++	clock-latency = <50000>;
++};
++
++&cpu3 {
++	cpu-supply = <&vddcpu>;
++	operating-points-v2 = <&cpu_opp_table>;
++	clocks = <&clkc CLKID_CPU_CLK>;
++	clock-latency = <50000>;
++};
++
++&cvbs_vdac_port {
++	cvbs_vdac_out: endpoint {
++		remote-endpoint = <&cvbs_connector_in>;
++	};
++};
++
++&frddr_a {
++	status = "okay";
++};
++
++&frddr_b {
++	status = "okay";
++};
++
++&frddr_c {
++	status = "okay";
++};
++
++&hdmi_tx {
++	status = "okay";
++	pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;
++	pinctrl-names = "default";
++	hdmi-supply = <&vcc_5v>;
++};
++
++&hdmi_tx_tmds_port {
++	hdmi_tx_tmds_out: endpoint {
++		remote-endpoint = <&hdmi_connector_in>;
++	};
++};
++
++&ir {
++	status = "okay";
++	pinctrl-0 = <&remote_input_ao_pins>;
++	pinctrl-names = "default";
++	linux,rc-map-name = "rc-tx5max";
++};
++
++&pwm_AO_cd {
++	pinctrl-0 = <&pwm_ao_d_e_pins>;
++	pinctrl-names = "default";
++	clocks = <&xtal>;
++	clock-names = "clkin1";
++	status = "okay";
++};
++
++&ext_mdio {
++	external_phy: ethernet-phy@0 {
++		/* Realtek RTL8211F (0x001cc916) */
++		reg = <0>;
++		max-speed = <1000>;
++		eee-broken-1000t;
++
++		reset-assert-us = <10000>;
++		reset-deassert-us = <80000>;
++		reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
++
++		interrupt-parent = <&gpio_intc>;
++		/* MAC_INTR on GPIOZ_14 */
++		interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
++	};
++};
++
++&ethmac {
++	pinctrl-0 = <&eth_pins>, <&eth_rgmii_pins>;
++	pinctrl-names = "default";
++	status = "okay";
++	phy-mode = "rgmii";
++	phy-handle = <&external_phy>;
++	amlogic,tx-delay-ns = <2>;
++};
++
++&pwm_ef {
++	status = "okay";
++	pinctrl-0 = <&pwm_e_pins>;
++	pinctrl-names = "default";
++	clocks = <&xtal>;
++	clock-names = "clkin0";
++};
++
++&uart_A {
++	status = "okay";
++	pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
++	pinctrl-names = "default";
++	uart-has-rtscts;
++
++	bluetooth {
++		compatible = "brcm,bcm43438-bt";
++		shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
++		max-speed = <2000000>;
++		clocks = <&wifi32k>;
++		clock-names = "lpo";
++	};
++};
++
++&uart_AO {
++	status = "okay";
++	pinctrl-0 = <&uart_ao_a_pins>;
++	pinctrl-names = "default";
++};
++
++&usb {
++	status = "okay";
++	dr_mode = "host";
++};
++
++/* SDIO */
++&sd_emmc_a {
++	status = "okay";
++	pinctrl-0 = <&sdio_pins>;
++	pinctrl-1 = <&sdio_clk_gate_pins>;
++	pinctrl-names = "default", "clk-gate";
++	#address-cells = <1>;
++	#size-cells = <0>;
++
++	bus-width = <4>;
++	cap-sd-highspeed;
++	sd-uhs-sdr50;
++	max-frequency = <100000000>;
++
++	non-removable;
++	disable-wp;
++
++	/* WiFi firmware requires power to be kept while in suspend */
++	keep-power-in-suspend;
++
++	mmc-pwrseq = <&sdio_pwrseq>;
++
++	vmmc-supply = <&vddao_3v3>;
++	vqmmc-supply = <&vddao_1v8>;
++
++	brcmf: wifi@1 {
++		reg = <1>;
++		compatible = "brcm,bcm4329-fmac";
++	};
++};
++
++/* SD card */
++&sd_emmc_b {
++	status = "okay";
++	pinctrl-0 = <&sdcard_c_pins>;
++	pinctrl-1 = <&sdcard_clk_gate_c_pins>;
++	pinctrl-names = "default", "clk-gate";
++
++	bus-width = <4>;
++	cap-sd-highspeed;
++	max-frequency = <100000000>;
++	disable-wp;
++
++	cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
++	vmmc-supply = <&vddao_3v3>;
++	vqmmc-supply = <&vddao_3v3>;
++};
++
++/* eMMC */
++&sd_emmc_c {
++	status = "okay";
++	pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
++	pinctrl-1 = <&emmc_clk_gate_pins>;
++	pinctrl-names = "default", "clk-gate";
++
++	bus-width = <8>;
++	cap-mmc-highspeed;
++	max-frequency = <100000000>;
++	non-removable;
++	disable-wp;
++
++	mmc-pwrseq = <&emmc_pwrseq>;
++	vmmc-supply = <&vcc_3v3>;
++	vqmmc-supply = <&flash_1v8>;
++};
++
++&spdifout {
++	pinctrl-0 = <&spdif_out_h_pins>;
++	pinctrl-names = "default";
++	status = "okay";
++};
++
++&spdifout_b {
++	status = "okay";
++};
++
++&tdmif_b {
++	status = "okay";
++};
++
++&tdmout_b {
++	status = "okay";
++};
++
++&tohdmitx {
++	status = "okay";
++};
+-- 
+2.25.1
+

patch/kernel/meson64-dev/0057-arm64-dts-meson-add-multiple-MeCool-device-trees.patch

@@ -0,0 +1,264 @@
+From a7808c93aacd4d9a92820afd44c67dd653e44fa1 Mon Sep 17 00:00:00 2001
+From: Christian Hewitt <christianshewitt@gmail.com>
+Date: Mon, 21 Oct 2019 03:58:06 +0000
+Subject: [PATCH 57/58] arm64: dts: meson: add multiple MeCool device trees
+
+This adds initial device trees for a range of MeCool devices based on various
+Amlogic GXBB, GXL and GXM reference designs. The current purpose is to allow
+devices to be associated with their respective IR remote keymaps. It also
+prepares for the addition of DVB support in the future.
+
+Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
+---
+ arch/arm64/boot/dts/amlogic/Makefile          |  7 ++++
+ .../dts/amlogic/meson-gxbb-mecool-ki-plus.dts | 34 +++++++++++++++++++
+ .../dts/amlogic/meson-gxbb-mecool-kii-pro.dts | 34 +++++++++++++++++++
+ .../meson-gxl-s905d-mecool-ki-plus.dts        | 21 ++++++++++++
+ .../amlogic/meson-gxl-s905d-mecool-ki-pro.dts | 16 +++++++++
+ .../meson-gxl-s905d-mecool-kii-pro.dts        | 16 +++++++++
+ .../meson-gxl-s905d-mecool-m8s-plus.dts       | 16 +++++++++
+ .../dts/amlogic/meson-gxm-mecool-kiii-pro.dts | 21 ++++++++++++
+ 8 files changed, 165 insertions(+)
+ create mode 100644 arch/arm64/boot/dts/amlogic/meson-gxbb-mecool-ki-plus.dts
+ create mode 100644 arch/arm64/boot/dts/amlogic/meson-gxbb-mecool-kii-pro.dts
+ create mode 100644 arch/arm64/boot/dts/amlogic/meson-gxl-s905d-mecool-ki-plus.dts
+ create mode 100644 arch/arm64/boot/dts/amlogic/meson-gxl-s905d-mecool-ki-pro.dts
+ create mode 100644 arch/arm64/boot/dts/amlogic/meson-gxl-s905d-mecool-kii-pro.dts
+ create mode 100644 arch/arm64/boot/dts/amlogic/meson-gxl-s905d-mecool-m8s-plus.dts
+ create mode 100644 arch/arm64/boot/dts/amlogic/meson-gxm-mecool-kiii-pro.dts
+
+diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
+index 7d8586c718a1..3e72b2ad3a2d 100644
+--- a/arch/arm64/boot/dts/amlogic/Makefile
++++ b/arch/arm64/boot/dts/amlogic/Makefile
+@@ -13,6 +13,8 @@ dtb-$(CONFIG_ARCH_MESON) += meson-g12b-odroid-n2.dtb
+ dtb-$(CONFIG_ARCH_MESON) += meson-g12b-odroid-n2-plus.dtb
+ dtb-$(CONFIG_ARCH_MESON) += meson-g12b-ugoos-am6.dtb
+ dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-kii-pro.dtb
++dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-mecool-ki-plus.dtb
++dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-mecool-kii-pro.dtb
+ dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-nanopi-k2.dtb
+ dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-nexbox-a95x.dtb
+ dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-odroidc2.dtb
+@@ -30,6 +32,10 @@ dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905x-libretech-cc.dtb
+ dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905x-libretech-cc-v2.dtb
+ dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905x-nexbox-a95x.dtb
+ dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905x-p212.dtb
++dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905d-mecool-ki-plus.dtb
++dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905d-mecool-ki-pro.dtb
++dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905d-mecool-kii-pro.dtb
++dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905d-mecool-m8s-plus.dtb
+ dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905d-p230.dtb
+ dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905d-p231.dtb
+ dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905d-phicomm-n1.dtb
+@@ -39,6 +45,7 @@ dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905w-p281.dtb
+ dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905w-tx3-mini.dtb
+ dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905d-libretech-pc.dtb
+ dtb-$(CONFIG_ARCH_MESON) += meson-gxm-khadas-vim2.dtb
++dtb-$(CONFIG_ARCH_MESON) += meson-gxm-mecool-kiii-pro.dtb
+ dtb-$(CONFIG_ARCH_MESON) += meson-gxm-minix-neo-u9h.dtb
+ dtb-$(CONFIG_ARCH_MESON) += meson-gxm-nexbox-a1.dtb
+ dtb-$(CONFIG_ARCH_MESON) += meson-gxm-q200.dtb
+diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-mecool-ki-plus.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-mecool-ki-plus.dts
+new file mode 100644
+index 000000000000..0c27f7e67d5a
+--- /dev/null
++++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-mecool-ki-plus.dts
+@@ -0,0 +1,34 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++
++/*
++ * Author: Christian Hewitt <christianshewitt@gmail.com>
++ */
++
++#include "meson-gxbb-p201.dts"
++
++/ {
++	compatible = "mecool,gxbb-ki-plus", "amlogic,meson-gxbb";
++	model = "MeCool KI Plus";
++
++	clock: meson_clock {
++		compatible = "amlogic, gxbb-clock";
++		reg = <0x0 0xc883c000 0x0 0x1000>,
++		      <0x0 0xc8100000 0x0 0x1000>;
++		#clock-cells = <1>;
++		#reset-cells = <1>;
++		sys_max = <1536000000>;
++	};
++
++	memory@0 {
++		device_type = "memory";
++		reg = <0x0 0x0 0x0 0x40000000>;
++	};
++};
++
++&ir {
++	linux,rc-map-name = "rc-mecool-ki-plus";
++};
++
++&usb_pwr {
++	gpio = <>;
++};
+diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-mecool-kii-pro.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-mecool-kii-pro.dts
+new file mode 100644
+index 000000000000..83bd0204b153
+--- /dev/null
++++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-mecool-kii-pro.dts
+@@ -0,0 +1,34 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++
++/*
++ * Author: Christian Hewitt <christianshewitt@gmail.com>
++ */
++
++#include "meson-gxbb-p201.dts"
++
++/ {
++	compatible = "mecool,gxbb-kii-pro", "amlogic,meson-gxbb";
++	model = "MeCool KII Pro";
++
++	clock: meson_clock {
++		compatible = "amlogic, gxbb-clock";
++		reg = <0x0 0xc883c000 0x0 0x1000>,
++		      <0x0 0xc8100000 0x0 0x1000>;
++		#clock-cells = <1>;
++		#reset-cells = <1>;
++		sys_max = <1536000000>;
++	};
++
++	memory@0 {
++		device_type = "memory";
++		reg = <0x0 0x0 0x0 0x40000000>;
++	};
++};
++
++&ir {
++	linux,rc-map-name = "rc-mecool-kii-pro";
++};
++
++&usb_pwr {
++	gpio = <>;
++};
+diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-mecool-ki-plus.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-mecool-ki-plus.dts
+new file mode 100644
+index 000000000000..7369c4111c43
+--- /dev/null
++++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-mecool-ki-plus.dts
+@@ -0,0 +1,21 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++
++/*
++ * Author: Christian Hewitt <christianshewitt@gmail.com>
++ */
++
++#include "meson-gxl-s905d-p231.dts"
++
++/ {
++	compatible = "mecool,ki-plus", "amlogic,s905d", "amlogic,meson-gxl";
++	model = "MeCool KI Plus";
++
++	memory@0 {
++		device_type = "memory";
++		reg = <0x0 0x0 0x0 0x40000000>;
++	};
++};
++
++&ir {
++	linux,rc-map-name = "rc-mecool-ki-plus";
++};
+diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-mecool-ki-pro.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-mecool-ki-pro.dts
+new file mode 100644
+index 000000000000..65e1a738a563
+--- /dev/null
++++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-mecool-ki-pro.dts
+@@ -0,0 +1,16 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++
++/*
++ * Author: Christian Hewitt <christianshewitt@gmail.com>
++ */
++
++#include "meson-gxl-s905d-p230.dts"
++
++/ {
++	compatible = "mecool,ki-pro", "amlogic,s905d", "amlogic,meson-gxl";
++	model = "MeCool KI Pro";
++};
++
++&ir {
++	linux,rc-map-name = "rc-mecool-ki-pro";
++};
+diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-mecool-kii-pro.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-mecool-kii-pro.dts
+new file mode 100644
+index 000000000000..2605d6eb6ca5
+--- /dev/null
++++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-mecool-kii-pro.dts
+@@ -0,0 +1,16 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++
++/*
++ * Author: Christian Hewitt <christianshewitt@gmail.com>
++ */
++
++#include "meson-gxl-s905d-p231.dts"
++
++/ {
++	compatible = "mecool,kii-pro", "amlogic,s905d", "amlogic,meson-gxl";
++	model = "MeCool KII Pro";
++};
++
++&ir {
++	linux,rc-map-name = "rc-mecool-kii-pro";
++};
+diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-mecool-m8s-plus.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-mecool-m8s-plus.dts
+new file mode 100644
+index 000000000000..ac9f4ad205ac
+--- /dev/null
++++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-mecool-m8s-plus.dts
+@@ -0,0 +1,16 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++
++/*
++ * Author: Christian Hewitt <christianshewitt@gmail.com>
++ */
++
++#include "meson-gxl-s905d-p231.dts"
++
++/ {
++	compatible = "mecool,kii-pro", "amlogic,s905d", "amlogic,meson-gxl";
++	model = "MeCool M8S Plus";
++};
++
++&ir {
++	linux,rc-map-name = "rc-mecool-m8s-plus";
++};
+diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-mecool-kiii-pro.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-mecool-kiii-pro.dts
+new file mode 100644
+index 000000000000..ca0ac6bc52ad
+--- /dev/null
++++ b/arch/arm64/boot/dts/amlogic/meson-gxm-mecool-kiii-pro.dts
+@@ -0,0 +1,21 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++
++/*
++ * Author: Christian Hewitt <christianshewitt@gmail.com>
++ */
++
++#include "meson-gxm-q200.dts"
++
++/ {
++	compatible = "mecool,gxm-kiii-pro", "amlogic,s912", "amlogic,meson-gxm";
++	model = "MeCool KIII Pro";
++
++	memory@0 {
++		device_type = "memory";
++		reg = <0x0 0x0 0x0 0xC0000000>;
++	};
++};
++
++&ir {
++	linux,rc-map-name = "rc-mecool-kiii-pro";
++};
+-- 
+2.25.1
+

patch/kernel/meson64-dev/0058-arm64-dts-meson-fixups-for-WeTek-common-dtsi.patch

@@ -0,0 +1,68 @@
+From b7a3260479da902b11b1ce7738b2f5a86aa39834 Mon Sep 17 00:00:00 2001
+From: Christian Hewitt <christianshewitt@gmail.com>
+Date: Tue, 29 Dec 2020 09:31:57 +0000
+Subject: [PATCH 58/58] arm64: dts: meson: fixups for WeTek common dtsi
+
+Minor changes that result from work on mainline u-boot support, closer
+study of vendor 3.14 device-tree, and access to vendor schematics:
+
+- Add missing GPIO binding
+- Add higher max-freq to SDIO and SD
+- Add higher rates to SDIO
+- Use updated LED bindings
+
+Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
+---
+ arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi | 15 +++++++++++----
+ 1 file changed, 11 insertions(+), 4 deletions(-)
+
+diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi
+index a350fee1264d..8c6453fd130f 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi
++++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi
+@@ -6,6 +6,8 @@
+  */
+ 
+ #include "meson-gxbb.dtsi"
++#include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/leds/common.h>
+ 
+ / {
+ 	aliases {
+@@ -25,8 +27,10 @@ memory@0 {
+ 	leds {
+ 		compatible = "gpio-leds";
+ 
+-		led-system {
+-			label = "wetek-play:system-status";
++		blue {
++			/* red in suspend or power-off */
++			color = <LED_COLOR_ID_BLUE>;
++			function = LED_FUNCTION_POWER;
+ 			gpios = <&gpio_ao GPIOAO_13 GPIO_ACTIVE_HIGH>;
+ 			default-state = "on";
+ 			panic-indicator;
+@@ -199,7 +203,10 @@ &sd_emmc_a {
+ 
+ 	bus-width = <4>;
+ 	cap-sd-highspeed;
+-	max-frequency = <50000000>;
++	sd-uhs-sdr12;
++	sd-uhs-sdr25;
++	sd-uhs-sdr50;
++	max-frequency = <200000000>;
+ 
+ 	non-removable;
+ 	disable-wp;
+@@ -227,7 +234,7 @@ &sd_emmc_b {
+ 
+ 	bus-width = <4>;
+ 	cap-sd-highspeed;
+-	max-frequency = <50000000>;
++	max-frequency = <100000000>;
+ 	disable-wp;
+ 
+ 	cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
+-- 
+2.25.1
+

patch/kernel/meson64-dev/0081-FROMLIST-arm64-dts-meson-gxl-s905x-khadas-vim-add-th.patch

@@ -17,14 +17,14 @@ diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts b/arch/a
 index 440bc23c7342..2c198c4212b2 100644
 --- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts
 +++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts
-@@ -6,6 +6,7 @@
- /dts-v1/;
- 
+@@ -8,6 +8,7 @@
+ #include "meson-gxl-s905x-p212.dtsi"
  #include <dt-bindings/input/input.h>
+ #include <dt-bindings/sound/meson-aiu.h>
 +#include <dt-bindings/thermal/thermal.h>
  
- #include "meson-gxl-s905x-p212.dtsi"
- 
+ / {
+ 	compatible = "khadas,vim", "amlogic,s905x", "amlogic,meson-gxl";
 @@ -63,6 +64,39 @@
  			};
  		};

patch/kernel/meson64-dev/0101-fix-mesongxm-cpu-scheduling.patch

@@ -1,64 +0,0 @@
-[0] https://github.com/torvalds/linux/commit/6eeaf4d2452ec8b1ece58776812140734fc2e088
-
-Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
----
- arch/arm64/boot/dts/amlogic/meson-gxm.dtsi | 20 ++++++++++++++++++++
- 1 file changed, 20 insertions(+)
-
-diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi
-index fe4145112295c..411cc312fc62b 100644
---- a/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi
-+++ b/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi
-@@ -42,11 +42,28 @@
- 			};
- 		};
- 
-+		cpu0: cpu@0 {
-+			capacity-dmips-mhz = <1024>;
-+		};
-+
-+		cpu1: cpu@1 {
-+			capacity-dmips-mhz = <1024>;
-+		};
-+
-+		cpu2: cpu@2 {
-+			capacity-dmips-mhz = <1024>;
-+		};
-+
-+		cpu3: cpu@3 {
-+			capacity-dmips-mhz = <1024>;
-+		};
-+
- 		cpu4: cpu@100 {
- 			device_type = "cpu";
- 			compatible = "arm,cortex-a53";
- 			reg = <0x0 0x100>;
- 			enable-method = "psci";
-+			capacity-dmips-mhz = <1024>;
- 			next-level-cache = <&l2>;
- 			clocks = <&scpi_dvfs 1>;
- 			#cooling-cells = <2>;
-@@ -57,6 +74,7 @@
- 			compatible = "arm,cortex-a53";
- 			reg = <0x0 0x101>;
- 			enable-method = "psci";
-+			capacity-dmips-mhz = <1024>;
- 			next-level-cache = <&l2>;
- 			clocks = <&scpi_dvfs 1>;
- 			#cooling-cells = <2>;
-@@ -67,6 +85,7 @@
- 			compatible = "arm,cortex-a53";
- 			reg = <0x0 0x102>;
- 			enable-method = "psci";
-+			capacity-dmips-mhz = <1024>;
- 			next-level-cache = <&l2>;
- 			clocks = <&scpi_dvfs 1>;
- 			#cooling-cells = <2>;
-@@ -77,6 +96,7 @@
- 			compatible = "arm,cortex-a53";
- 			reg = <0x0 0x103>;
- 			enable-method = "psci";
-+			capacity-dmips-mhz = <1024>;
- 			next-level-cache = <&l2>;
- 			clocks = <&scpi_dvfs 1>;
- 			#cooling-cells = <2>;

patch/kernel/meson64-dev/board-VIM1-enable-RTC.patch

@@ -1,26 +0,0 @@
-From b7aad5252373bb1270a9bcc362fa6f869108f1eb Mon Sep 17 00:00:00 2001
-From: Nick Xie <nick@khadas.com>
-Date: Sat, 17 Aug 2019 15:29:46 +0800
-Subject: [PATCH 093/101] arm64: dts: VIM1: enable RTC
-
-Signed-off-by: Nick Xie <nick@khadas.com>
----
- arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts
-index 2c198c4212b2..8637e6a42bb8 100644
---- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts
-+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts
-@@ -148,7 +148,7 @@
- 
- 	rtc: rtc@51 {
- 		/* has to be enabled manually when a battery is connected: */
--		status = "disabled";
-+		status = "okay";
- 		compatible = "haoyu,hym8563";
- 		reg = <0x51>;
- 		#clock-cells = <0>;
--- 
-2.17.1
-

patch/kernel/meson64-dev/board-VIM2-enable-RTC.patch

@@ -1,26 +0,0 @@
-From 096db0ffef76a1fdfe20ff528f120de1e708758a Mon Sep 17 00:00:00 2001
-From: Nick Xie <nick@khadas.com>
-Date: Sat, 17 Aug 2019 15:44:24 +0800
-Subject: [PATCH 094/101] arm64: dts: VIM2: enable RTC
-
-Signed-off-by: Nick Xie <nick@khadas.com>
----
- arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts
-index dfa2abc55918..5ef329f10a06 100644
---- a/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts
-+++ b/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts
-@@ -356,7 +356,7 @@
- 
- 	rtc: rtc@51 {
- 		/* has to be enabled manually when a battery is connected: */
--		status = "disabled";
-+		status = "okay";
- 		compatible = "haoyu,hym8563";
- 		reg = <0x51>;
- 		#clock-cells = <0>;
--- 
-2.17.1
-

patch/kernel/meson64-dev/board-khadas-vim3-change-LED-behaviour.patch

@@ -1,45 +0,0 @@
-From 6bcac8270ce9c08d0a53423d4511f3d3fcb99644 Mon Sep 17 00:00:00 2001
-From: Christian Hewitt <christianshewitt@gmail.com>
-Date: Fri, 21 Feb 2020 03:40:31 +0000
-Subject: [PATCH 087/101] WIP: arm64: dts: meson: khadas-vim3: change LED
- behaviours on VIM3/3L
-
-VIM3/3L have two LEDs (red/white) located 1mm apart on the board. In the
-current configuration both are powered on creating a pink visual status
-indication. The boards are also marketed as HTPC devices where heartbeat
-pulses are distracting and undesirable.
-
-This change removes the heartbeat and sets the default state so that only
-the white LED is on while the board is powered.
-
-Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
----
- arch/arm64/boot/dts/amlogic/meson-khadas-vim3.dtsi | 8 ++++----
- 1 file changed, 4 insertions(+), 4 deletions(-)
-
-diff --git a/arch/arm64/boot/dts/amlogic/meson-khadas-vim3.dtsi b/arch/arm64/boot/dts/amlogic/meson-khadas-vim3.dtsi
-index 6022805d2032..6d0163f56b0d 100644
---- a/arch/arm64/boot/dts/amlogic/meson-khadas-vim3.dtsi
-+++ b/arch/arm64/boot/dts/amlogic/meson-khadas-vim3.dtsi
-@@ -40,14 +40,14 @@
- 		compatible = "gpio-leds";
- 
- 		led-white {
--			label = "vim3:white:sys";
--			gpios = <&gpio_ao GPIOAO_4 GPIO_ACTIVE_HIGH>;
--			linux,default-trigger = "heartbeat";
-+			label = "vim3:white:power";
-+			gpios = <&gpio_ao GPIOAO_4 GPIO_ACTIVE_HIGH>;
-+			linux,default-trigger = "default-on";
- 		};
- 
- 		led-red {
- 			label = "vim3:red";
--			gpios = <&gpio_expander 5 GPIO_ACTIVE_HIGH>;
-+			gpios = <&gpio_expander 5 GPIO_ACTIVE_HIGH>;
- 		};
- 	};
- 
--- 
-2.17.1
-

patch/kernel/meson64-dev/board-nanopi-k2-add-sound.patch

@@ -1,57 +0,0 @@
-diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts
-index 7d33cacd0..85004e51c 100644
---- a/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts
-+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts
-@@ -7,6 +7,7 @@
-
- #include "meson-gxbb.dtsi"
- #include <dt-bindings/gpio/gpio.h>
-+#include <dt-bindings/sound/meson-aiu.h>
-
- / {
- 	compatible = "friendlyarm,nanopi-k2", "amlogic,meson-gxbb";
-@@ -131,6 +132,44 @@
- 			};
- 		};
- 	};
-+	sound {
-+		compatible = "amlogic,gx-sound-card";
-+		model = "GX-SOUND-CARD";
-+		assigned-clocks = <&clkc CLKID_MPLL0>,
-+				  <&clkc CLKID_MPLL1>,
-+				  <&clkc CLKID_MPLL2>;
-+		assigned-clock-parents = <0>, <0>, <0>;
-+		assigned-clock-rates = <294912000>,
-+			       <270950400>,
-+				       <393216000>;
-+		status = "okay";
-+
-+		dai-link-0 {
-+			sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>;
-+		};
-+
-+		dai-link-1 {
-+			sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>;
-+			dai-format = "i2s";
-+			mclk-fs = <256>;
-+
-+			codec-0 {
-+				sound-dai = <&aiu AIU_HDMI CTRL_I2S>;
-+			};
-+		};
-+
-+		dai-link-2 {
-+			sound-dai = <&aiu AIU_HDMI CTRL_OUT>;
-+
-+			codec-0 {
-+				sound-dai = <&hdmi_tx>;
-+			};
-+		};
-+	};
-+};
-+
-+&aiu {
-+	status = "okay";
- };
-
- &cec_AO {

patch/kernel/meson64-dev/board-odroidc2-add-sound.patch

@@ -1,58 +0,0 @@
-diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
-index 0d0dd26ce..9e8384978 100644
---- a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
-+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
-@@ -9,6 +9,7 @@
-
- #include "meson-gxbb.dtsi"
- #include <dt-bindings/gpio/gpio.h>
-+#include <dt-bindings/sound/meson-aiu.h>
-
- / {
- 	compatible = "hardkernel,odroid-c2", "amlogic,meson-gxbb";
-@@ -200,6 +201,44 @@
- 			};
- 		};
- 	};
-+	sound {
-+		compatible = "amlogic,gx-sound-card";
-+		model = "GX-SOUND-CARD";
-+		assigned-clocks = <&clkc CLKID_MPLL0>,
-+				  <&clkc CLKID_MPLL1>,
-+				  <&clkc CLKID_MPLL2>;
-+		assigned-clock-parents = <0>, <0>, <0>;
-+		assigned-clock-rates = <294912000>,
-+			       <270950400>,
-+				       <393216000>;
-+		status = "okay";
-+
-+		dai-link-0 {
-+			sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>;
-+		};
-+
-+		dai-link-1 {
-+			sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>;
-+			dai-format = "i2s";
-+			mclk-fs = <256>;
-+
-+			codec-0 {
-+				sound-dai = <&aiu AIU_HDMI CTRL_I2S>;
-+			};
-+		};
-+
-+		dai-link-2 {
-+			sound-dai = <&aiu AIU_HDMI CTRL_OUT>;
-+
-+			codec-0 {
-+				sound-dai = <&hdmi_tx>;
-+			};
-+		};
-+	};
-+};
-+
-+&aiu {
-+	status = "okay";
- };
-
- &cec_AO {
- 

patch/kernel/meson64-dev/dts-meson-add-watchdog-to-g12-common-dtsi.patch.txt.patch

@@ -1,30 +0,0 @@
-Subject: [PATCH] arm64: dts: meson: add watchdog to g12-common dtsi
-Date: Fri, 30 Oct 2020 18:00:57 +0000
-Message-Id: <20201030180057.23886-1-christianshewitt@gmail.com>
-
-G12 vendor kernels show the watchdog on the same address as AXG
-so add the node to meson-g12-common.dtsi. GX boards inherit the
-same from meson-gx.dtsi.
-
-Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
----
- arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi | 6 ++++++
- 1 file changed, 6 insertions(+)
-
-diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
-index 1e83ec5b8c91..92afec3ffb2d 100644
---- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
-+++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
-@@ -2179,6 +2179,12 @@
- 				amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>;
- 			};
- 
-+			watchdog: wdt@f0d0 {
-+				compatible = "amlogic,meson-gxbb-wdt";
-+				reg = <0x0 0xf0d0 0x0 0x10>;
-+				clocks = <&xtal>;
-+			};
-+
- 			spicc0: spi@13000 {
- 				compatible = "amlogic,meson-g12a-spicc";
- 				reg = <0x0 0x13000 0x0 0x44>;