diff --git a/patch/kernel/sunxi-next/add-orangepi-zeroplus.patch b/patch/kernel/sunxi-next/add-orangepi-zeroplus.patch deleted file mode 100644 index 8c0c4b02b..000000000 --- a/patch/kernel/sunxi-next/add-orangepi-zeroplus.patch +++ /dev/null @@ -1,102 +0,0 @@ -diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile -index 4b17f35d..6a6639ab 100644 ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -918,6 +918,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \ - sun8i-h3-orangepi-pc-plus.dtb \ - sun8i-h3-orangepi-plus.dtb \ - sun8i-h3-orangepi-plus2e.dtb \ -+ sun8i-h3-orangepi-zeroplus.dtb \ - sun8i-r16-parrot.dtb \ - sun8i-v3s-licheepi-zero.dtb \ - sun8i-v3s-licheepi-zero-dock.dtb -diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-zeroplus.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-zeroplus.dts -new file mode 100644 -index 00000000..67b4a725 ---- /dev/null -+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-zeroplus.dts -@@ -0,0 +1,84 @@ -+ -+#include "sun8i-h2-plus-orangepi-zero.dts" -+#include "sunxi-common-regulators.dtsi" -+#include -+#include -+ -+/ { -+ model = "Xunlong Orange Pi Zero Plus"; -+ compatible = "xunlong,orangepi-zeroplus", "allwinner,sun8i-h3"; -+ -+ aliases { -+ ethernet1 = &brcmf; -+ }; -+ -+ /delete-node/ reg_vcc_wifi; -+ -+ wifi_pwrseq: wifi_pwrseq { -+ compatible = "mmc-pwrseq-simple"; -+ reset-gpios = <&pio 0 9 GPIO_ACTIVE_LOW>; -+ post-power-on-delay-ms = <50>; -+ }; -+ -+ reg_usb1_vbus: usb1-vbus { -+ /delete-property/ gpio; -+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; -+ status = "okay"; -+ }; -+}; -+ -+&ehci2 { -+ status = "okay"; -+}; -+ -+&ehci3 { -+ status = "okay"; -+}; -+ -+&mmc1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&mmc1_pins_a>; -+ vmmc-supply = <®_vcc3v3>; -+ vqmmc-supply = <®_vcc3v3>; -+ mmc-pwrseq = <&wifi_pwrseq>; -+ bus-width = <4>; -+ non-removable; -+ status = "okay"; -+ -+ /delete-node/ sdio_wifi@1; -+ -+ brcmf: bcrmf@1 { -+ reg = <1>; -+ compatible = "brcm,bcm4329-fmac"; -+ interrupt-parent = <&r_pio>; -+ interrupts = <0 7 IRQ_TYPE_LEVEL_LOW>; /* PL7 / EINT7 */ -+ interrupt-names = "host-wake"; -+ }; -+}; -+ -+&mmc2 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&mmc2_8bit_pins>; -+ vmmc-supply = <®_vcc3v3>; -+ bus-width = <8>; -+ non-removable; -+ cap-mmc-hw-reset; -+ status = "okay"; -+}; -+ -+&ohci0 { -+ status = "okay"; -+}; -+ -+&ohci1 { -+ status = "okay"; -+}; -+ -+&spi0 { -+ /delete-node/ spi-flash@0; -+}; -+ -+&usbphy { -+ usb1_vbus-supply = <®_usb1_vbus>; -+ status = "okay"; -+}; diff --git a/patch/kernel/sunxi-next/add-orangepi-zeroplus2.patch b/patch/kernel/sunxi-next/add-orangepi-zeroplus2.patch new file mode 100644 index 000000000..64ed784cf --- /dev/null +++ b/patch/kernel/sunxi-next/add-orangepi-zeroplus2.patch @@ -0,0 +1,276 @@ +diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile +index 4b17f35d..6a6639ab 100644 +--- a/arch/arm/boot/dts/Makefile ++++ b/arch/arm/boot/dts/Makefile +@@ -918,6 +918,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \ + sun8i-h3-orangepi-pc-plus.dtb \ + sun8i-h3-orangepi-plus.dtb \ + sun8i-h3-orangepi-plus2e.dtb \ ++ sun8i-h3-orangepi-zeroplus2.dtb \ + sun8i-r16-parrot.dtb \ + sun8i-v3s-licheepi-zero.dtb \ + sun8i-v3s-licheepi-zero-dock.dtb +diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-zeroplus2.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-zeroplus2.dts +new file mode 100755 +index 0000000..9856052 +--- /dev/null ++++ b/arch/arm/boot/dts/sun8i-h3-orangepi-zeroplus2.dts +@@ -0,0 +1,258 @@ ++/* ++ * Copyright (C) Armbian ++ * ++ * This file is dual-licensed: you can use it either under the terms ++ * of the GPL or the X11 license, at your option. Note that this dual ++ * licensing only applies to this file, and not this project as a ++ * whole. ++ * ++ * a) This file is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of the ++ * License, or (at your option) any later version. ++ * ++ * This file is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * Or, alternatively, ++ * ++ * b) Permission is hereby granted, free of charge, to any person ++ * obtaining a copy of this software and associated documentation ++ * files (the "Software"), to deal in the Software without ++ * restriction, including without limitation the rights to use, ++ * copy, modify, merge, publish, distribute, sublicense, and/or ++ * sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following ++ * conditions: ++ * ++ * The above copyright notice and this permission notice shall be ++ * included in all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, ++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES ++ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND ++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT ++ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, ++ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING ++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR ++ * OTHER DEALINGS IN THE SOFTWARE. ++ */ ++ ++/dts-v1/; ++#include "sun8i-h3.dtsi" ++#include "sunxi-common-regulators.dtsi" ++#include ++#include ++ ++/ { ++ model = "Xunlong Orange Pi Zero Plus 2"; ++ compatible = "xunlong,orangepi-zeroplus", "allwinner,sun8i-h3"; ++ ++ aliases { ++ ethernet1 = &brcmf; ++ }; ++ ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ ++ pwr_led { ++ label = "orangepi:green:pwr"; ++ gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; ++ default-state = "on"; ++ }; ++ ++ status_led { ++ label = "orangepi:red:status"; ++ gpios = <&pio 0 17 GPIO_ACTIVE_HIGH>; ++ }; ++ }; ++ ++ connector { ++ compatible = "hdmi-connector"; ++ type = "a"; ++ ++ port { ++ hdmi_con_in: endpoint { ++ remote-endpoint = <&hdmi_out_con>; ++ }; ++ }; ++ }; ++ ++ /delete-node/ reg_vcc_wifi; ++ ++ wifi_pwrseq: wifi_pwrseq { ++ compatible = "mmc-pwrseq-simple"; ++ reset-gpios = <&pio 0 9 GPIO_ACTIVE_LOW>; ++ post-power-on-delay-ms = <50>; ++ }; ++ ++ reg_usb1_vbus: usb1-vbus { ++ /delete-property/ gpio; ++ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; ++ status = "okay"; ++ }; ++ ++ reg_sy8113b: gpio-regulator { ++ compatible = "regulator-gpio"; ++ regulator-name = "vdd-cpux"; ++ regulator-type = "voltage"; ++ regulator-boot-on; ++ regulator-always-on; ++ regulator-min-microvolt = <1100000>; ++ regulator-max-microvolt = <1300000>; ++ regulator-ramp-delay = <50>; /* 4ms */ ++ ++ gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */ ++ enable-active-high; ++ gpios-states = <0x1>; ++ states = <1100000 0x0 ++ 1300000 0x1>; ++ }; ++}; ++ ++&cpu0 { ++ cpu-supply = <®_sy8113b>; ++}; ++ ++&de { ++ status = "okay"; ++}; ++ ++&ehci1 { ++ status = "disabled"; ++}; ++ ++&ehci2 { ++ status = "disabled"; ++}; ++ ++&ehci3 { ++ status = "disabled"; ++}; ++ ++&hdmi { ++ status = "okay"; ++}; ++ ++&hdmi_out { ++ hdmi_out_con: endpoint { ++ remote-endpoint = <&hdmi_con_in>; ++ }; ++}; ++ ++&sound_hdmi { ++ status = "okay"; ++}; ++ ++&i2s2 { ++ status = "okay"; ++}; ++ ++&mixer0 { ++ status = "okay"; ++}; ++ ++&tcon0 { ++ status = "okay"; ++}; ++ ++&mmc0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mmc0_pins_a>; ++ vmmc-supply = <®_vcc3v3>; ++ bus-width = <4>; ++ cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */ ++ cd-inverted; ++ status = "okay"; ++}; ++ ++&mmc1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mmc1_pins_a>; ++ vmmc-supply = <®_vcc3v3>; ++ vqmmc-supply = <®_vcc3v3>; ++ mmc-pwrseq = <&wifi_pwrseq>; ++ bus-width = <4>; ++ non-removable; ++ status = "okay"; ++ ++ /delete-node/ sdio_wifi@1; ++ ++ brcmf: bcrmf@1 { ++ reg = <1>; ++ compatible = "brcm,bcm4329-fmac"; ++ interrupt-parent = <&r_pio>; ++ interrupts = <0 7 IRQ_TYPE_LEVEL_LOW>; /* PL7 / EINT7 */ ++ interrupt-names = "host-wake"; ++ }; ++}; ++ ++&mmc2 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mmc2_8bit_pins>; ++ vmmc-supply = <®_vcc3v3>; ++ bus-width = <8>; ++ non-removable; ++ cap-mmc-hw-reset; ++ status = "okay"; ++}; ++ ++&ohci0 { ++ status = "disabled"; ++}; ++ ++&ohci1 { ++ status = "disabled"; ++}; ++ ++&spi0 { ++ /* Disable SPI NOR by default: it optional on Orange Pi Zero boards */ ++ status = "disabled"; ++ ++ flash@0 { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ compatible = "mxicy,mx25l1606e", "winbond,w25q128"; ++ reg = <0>; ++ spi-max-frequency = <40000000>; ++ }; ++}; ++ ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_pins_a>; ++ status = "okay"; ++}; ++ ++&uart1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart1_pins>; ++ status = "disabled"; ++}; ++ ++&uart2 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart2_pins>; ++ status = "disabled"; ++}; ++ ++&usb_otg { ++ dr_mode = "peripheral"; ++ status = "okay"; ++}; ++ ++&usbphy { ++ /* ++ * USB Type-A port VBUS is always on. However, MicroUSB VBUS can only ++ * power up the board; when it's used as OTG port, this VBUS is ++ * always off even if the board is powered via GPIO pins. ++ */ ++ status = "okay"; ++ usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */ ++}; diff --git a/patch/u-boot/u-boot-sunxi/add-orangepi-zeroplus2_h3.patch b/patch/u-boot/u-boot-sunxi/add-orangepi-zeroplus2_h3.patch index 057864820..ef31ffc67 100644 --- a/patch/u-boot/u-boot-sunxi/add-orangepi-zeroplus2_h3.patch +++ b/patch/u-boot/u-boot-sunxi/add-orangepi-zeroplus2_h3.patch @@ -6,15 +6,15 @@ index 9cc5c1e0aa..a3ef6854c2 100644 sun8i-h3-orangepi-pc-plus.dtb \ sun8i-h3-orangepi-plus.dtb \ sun8i-h3-orangepi-plus2e.dtb \ -+ sun8i-h3-orangepi-zeroplus.dtb \ ++ sun8i-h3-orangepi-zeroplus2.dtb \ sun8i-h3-nanopi-m1.dtb \ sun8i-h3-nanopi-m1-plus.dtb \ sun8i-h3-nanopi-neo.dtb \ -diff --git a/arch/arm/dts/sun8i-h3-orangepi-zeroplus.dts b/arch/arm/dts/sun8i-h3-orangepi-zeroplus.dts +diff --git a/arch/arm/dts/sun8i-h3-orangepi-zeroplus2.dts b/arch/arm/dts/sun8i-h3-orangepi-zeroplus2.dts new file mode 100644 index 0000000000..b03e3a51a2 --- /dev/null -+++ b/arch/arm/dts/sun8i-h3-orangepi-zeroplus.dts ++++ b/arch/arm/dts/sun8i-h3-orangepi-zeroplus2.dts @@ -0,0 +1,175 @@ +/* + * Copyright (C) 2016 Icenowy Zheng @@ -70,7 +70,7 @@ index 0000000000..b03e3a51a2 +#include + +/ { -+ model = "Xunlong Orange Pi Zero Plus"; ++ model = "Xunlong Orange Pi Zero Plus 2"; + compatible = "xunlong,orangepi-zeroplus", "allwinner,sun8i-h3"; + + aliases { @@ -203,7 +203,7 @@ index 0000000000..9257b7c1ed +CONFIG_DRAM_CLK=408 +CONFIG_DRAM_ZQ=3881979 +CONFIG_DRAM_ODT_EN=y -+CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-zeroplus" ++CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-zeroplus2" +CONFIG_MMC_SUNXI_SLOT_EXTRA=2 +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL=y