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Multiple bootloader creation options for rk3399 (#1614)

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* Updated rockchip64-dev to u-boot v2019.10 and BL31 v1.30 (rk3399 boards)

* Updated rk3399 to u-boot v2019.10 and BL31 v1.30

* Revert changes to renegade u-boot patches

* Moved renegade u-boot patches into board dir

* Added debug info for RockPro64 and switched sdmmc to fifo-mode

* Disabled regulators in SPL for RockPro64

* Re-enabled sd vcc regulator in SPL for RockPro64

* Some device tree and config changes for OrangePi RK3399

* Fixed Rock Pi 4A's $BOOTCONFIG

* Let some boards use mainline atf instead of the one in rkbin

For example, roc-rk3399-pc can just boot the kernel using the
mainline atf.

* Add roc-rk3399-pc

* Fixed reset in mainline ATF

* Attached ATF version to v2.2 tag

* WIP: sdmmc fifo-mode in SPL only

* Renamed source config files

* Reverted changes to rockchip64 sources config

* Reverted patch moves

* Add missing trust.ini patch to rk3399 u-boot

* Reinstated tpl/spl patches in rk3399 family

* Added $RKBIN_DIR prefix in rk3399 sources

* Add demonstration of boards bootloader assignment in rk3399
This commit is contained in:
Piotr Szczepanik 2019-11-24 22:07:46 +01:00 • committed by Igor Pečovnik
parent 7eb49d49a2
commit 1c9ef0872b
14 changed files with 2371 additions and 15 deletions
Download patch file Download diff file Expand all files Collapse all files

56
patch/atf/atf-rk3399/fix-reset-in-v2.2.patch Normal file
View file

@ -0,0 +1,56 @@
From f4707a3c40bfc752a24c427263f7cbe8d7adfcd6 Mon Sep 17 00:00:00 2001
From: Vasily Khoruzhick <anarsoul@gmail.com>
Date: Fri, 15 Nov 2019 08:25:02 -0800
Subject: [PATCH] plat/rockchip: initialize reset and poweroff GPIOs with known
invalid value
And return NULL if we didn't get them in bl aux params otherwise reset and poweroff
will be broken on platforms that do not have reset and poweroff GPIOs.
Fixes: c1185ffde17c ("plat/rockchip: Switch to use new common BL aux parameter library")
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
---
plat/rockchip/common/params_setup.c | 11 +++++++++--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/plat/rockchip/common/params_setup.c b/plat/rockchip/common/params_setup.c
index 8c2e5e911b..b2fd2011e4 100644
--- a/plat/rockchip/common/params_setup.c
+++ b/plat/rockchip/common/params_setup.c
@@ -6,6 +6,7 @@
#include <assert.h>
#include <errno.h>
+#include <limits.h>
#include <string.h>
#include <lib/bl_aux_params/bl_aux_params.h>
@@ -21,8 +22,8 @@
#include <plat_params.h>
#include <plat_private.h>
-static struct bl_aux_gpio_info rst_gpio;
-static struct bl_aux_gpio_info poweroff_gpio;
+static struct bl_aux_gpio_info rst_gpio = { .index = UINT_MAX } ;
+static struct bl_aux_gpio_info poweroff_gpio = { .index = UINT_MAX };
static struct bl_aux_gpio_info suspend_gpio[10];
uint32_t suspend_gpio_cnt;
static struct bl_aux_rk_apio_info suspend_apio;
@@ -174,11 +175,17 @@ uint32_t rockchip_get_uart_clock(void)
struct bl_aux_gpio_info *plat_get_rockchip_gpio_reset(void)
{
+ if (rst_gpio.index == UINT_MAX)
+ return NULL;
+
return &rst_gpio;
}
struct bl_aux_gpio_info *plat_get_rockchip_gpio_poweroff(void)
{
+ if (poweroff_gpio.index == UINT_MAX)
+ return NULL;
+
return &poweroff_gpio;
}

63
patch/atf/atf-rk3399/switch-power-domains-on-before-reset.patch Normal file
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@ -0,0 +1,63 @@
diff --git a/plat/rockchip/rk3399/drivers/pmu/pmu.c b/plat/rockchip/rk3399/drivers/pmu/pmu.c
index 42589b9..8f2a419 100644
--- a/plat/rockchip/rk3399/drivers/pmu/pmu.c
+++ b/plat/rockchip/rk3399/drivers/pmu/pmu.c
@@ -400,7 +400,26 @@ static void pmu_power_domains_resume(void)
clk_gate_con_restore();
}
-void rk3399_flush_l2_b(void)
+void pmu_power_domains_on(void)
+{
+ clk_gate_con_disable();
+ pmu_set_power_domain(PD_VDU, pmu_pd_on);
+ pmu_set_power_domain(PD_VCODEC, pmu_pd_on);
+ pmu_set_power_domain(PD_RGA, pmu_pd_on);
+ pmu_set_power_domain(PD_IEP, pmu_pd_on);
+ pmu_set_power_domain(PD_EDP, pmu_pd_on);
+ pmu_set_power_domain(PD_GMAC, pmu_pd_on);
+ pmu_set_power_domain(PD_SDIOAUDIO, pmu_pd_on);
+ pmu_set_power_domain(PD_HDCP, pmu_pd_on);
+ pmu_set_power_domain(PD_ISP1, pmu_pd_on);
+ pmu_set_power_domain(PD_ISP0, pmu_pd_on);
+ pmu_set_power_domain(PD_VO, pmu_pd_on);
+ pmu_set_power_domain(PD_TCPD1, pmu_pd_on);
+ pmu_set_power_domain(PD_TCPD0, pmu_pd_on);
+ pmu_set_power_domain(PD_GPU, pmu_pd_on);
+}
+
+void rk3399_flush_l2_b(void)
{
uint32_t wait_cnt = 0;
diff --git a/plat/rockchip/rk3399/drivers/pmu/pmu.h b/plat/rockchip/rk3399/drivers/pmu/pmu.h
index e1ba410..27a453b 100644
--- a/plat/rockchip/rk3399/drivers/pmu/pmu.h
+++ b/plat/rockchip/rk3399/drivers/pmu/pmu.h
@@ -136,5 +136,6 @@ struct pmu_slpdata_s {
extern uint32_t clst_warmboot_data[PLATFORM_CLUSTER_COUNT];
extern void sram_func_set_ddrctl_pll(uint32_t pll_src);
+void pmu_power_domains_on(void);
#endif /* PMU_H */
diff --git a/plat/rockchip/rk3399/drivers/soc/soc.c b/plat/rockchip/rk3399/drivers/soc/soc.c
index c877dbd..98b5ad6 100644
--- a/plat/rockchip/rk3399/drivers/soc/soc.c
+++ b/plat/rockchip/rk3399/drivers/soc/soc.c
@@ -17,6 +17,7 @@
#include <dram.h>
#include <m0_ctl.h>
#include <plat_private.h>
+#include <pmu.h>
#include <rk3399_def.h>
#include <secure.h>
#include <soc.h>
@@ -327,6 +328,7 @@ void soc_global_soft_reset_init(void)
void __dead2 soc_global_soft_reset(void)
{
+ pmu_power_domains_on();
set_pll_slow_mode(VPLL_ID);
set_pll_slow_mode(NPLL_ID);
set_pll_slow_mode(GPLL_ID);