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Merge u-boot patches from development

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This commit is contained in:
Igor Pecovnik 2018-05-27 13:11:47 +02:00
parent f6d4d89b08
commit 23038e35b5
8 changed files with 352 additions and 22 deletions
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0
patch/u-boot/u-boot-rk3328-default/Add_roc-rk3328-cc_config.patch → patch/u-boot/u-boot-rk3328-default/board_roc-rk3328-cc/Add_roc-rk3328-cc_config.patch
View file

0
patch/u-boot/u-boot-rk3328-default/size_support_ddr4.patch → patch/u-boot/u-boot-rk3328-default/board_roc-rk3328-cc/size_support_ddr4.patch
View file

209
patch/u-boot/u-boot-rk3328-default/board_z28pro/use_sdmmc_ext.patch Normal file
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@ -0,0 +1,209 @@
diff --git a/arch/arm/dts/rk3328-rock64.dts b/arch/arm/dts/rk3328-rock64.dts
index d19d609..5c72488 100644
--- a/arch/arm/dts/rk3328-rock64.dts
+++ b/arch/arm/dts/rk3328-rock64.dts
@@ -17,7 +17,7 @@
};
aliases {
- spi0 = &spi0;
+ mmc1 = &sdmmc_ext;
};
gmac_clkin: external-gmac-clock {
@@ -37,7 +37,7 @@
vcc3v3_sdmmc: sdmmc-pwren {
compatible = "regulator-fixed";
regulator-name = "vcc3v3";
- gpio = <&gpio0 30 GPIO_ACTIVE_LOW>;
+ gpio = <&gpio2 7 GPIO_ACTIVE_LOW>;
regulator-always-on;
regulator-boot-on;
};
@@ -75,17 +75,17 @@
status = "okay";
};
-&sdmmc {
+&sdmmc_ext {
u-boot,dm-spl;
bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;
fifo-mode;
- card-detect-delay = <200>;
+ cd-gpios = <&gpio3 RK_PA1 GPIO_ACTIVE_LOW>;
disable-wp;
num-slots = <1>;
pinctrl-names = "default";
- pinctrl-0 = <&sdmmc0_clk>, <&sdmmc0_cmd>, <&sdmmc0_dectn>, <&sdmmc0_bus4>;
+ pinctrl-0 = <&sdmmc0ext_clk>, <&sdmmc0ext_cmd>, <&sdmmc0ext_dectn>, <&sdmmc0ext_bus4>;
status = "okay";
};
@@ -270,58 +270,6 @@
status = "okay";
};
-&spi0 {
- u-boot,dm-spl;
- status = "okay";
-
- spiflash: spi-flash@0 {
- u-boot,dm-spl;
- #address-cells = <0x1>;
- #size-cells = <1>;
- compatible = "spi-flash";
- reg = <0x0>;
- spi-max-frequency = <25000000>;
- status = "okay";
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- system@0 {
- label = "system";
- reg = <0x0 0x8000>;
- read-only;
- };
-
- loader@8000 {
- label = "loader";
- reg = <0x8000 0x3F8000>;
- };
-
- reserved@400000 {
- label = "reserved";
- reg = <0x400000 0x3C0000>;
- read-only;
- };
-
- vendor@7c0000 {
- label = "vendor";
- reg = <0x7C0000 0x40000>;
- };
-
- uboot@800000 {
- label = "uboot";
- reg = <0x800000 0x400000>;
- };
-
- atf@c00000 {
- label = "atf";
- reg = <0xC00000 0x400000>;
- };
- };
- };
-};
&pinctrl {
pmic {
diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk3328.h b/arch/arm/include/asm/arch-rockchip/grf_rk3328.h
index a396510..260117b 100644
--- a/arch/arm/include/asm/arch-rockchip/grf_rk3328.h
+++ b/arch/arm/include/asm/arch-rockchip/grf_rk3328.h
@@ -361,6 +361,17 @@ enum {
GPIO2D4_SEL_MASK = 0xff << GPIO2D4_SEL_SHIFT,
GPIO2D4_EMMC_DATA1234 = 0xaa,
+ /* GPIO3AL_IOMUX */
+ GPIO3A0_SEL_SHIFT = 0,
+ GPIO3A0_SEL_MASK = 0x71ff << GPIO3A0_SEL_SHIFT,
+ GPIO3A0_CARD_DATA_CLK_CMD_DETN = 0x36db,
+
+ /* GPIO3AH_IOMUX */
+ GPIO3A5_SEL_SHIFT = 0,
+ GPIO3A5_SEL_MASK = 0x1ff << GPIO3A5_SEL_SHIFT,
+ GPIO3A5_CARD_DATA234 = 0xdb,
+
+
/* GPIO3C_IOMUX */
GPIO3C0_SEL_SHIFT = 0,
GPIO3C0_SEL_MASK = 0x3fff << GPIO3C0_SEL_SHIFT,
diff --git a/arch/arm/mach-rockchip/rk3328/rk3328.c b/arch/arm/mach-rockchip/rk3328/rk3328.c
index f1db5bf..b627083 100644
--- a/arch/arm/mach-rockchip/rk3328/rk3328.c
+++ b/arch/arm/mach-rockchip/rk3328/rk3328.c
@@ -96,11 +96,10 @@ int board_init(void)
#define GRF_BASE 0xff100000
struct rk3328_grf_regs * const grf = (void *)GRF_BASE;
- /* uart2 select m1, sdcard select m1*/
+ /* uart2 select m1, no sdcard select, because we use sdmmc_ext */
rk_clrsetreg(&grf->com_iomux,
- IOMUX_SEL_UART2_MASK | IOMUX_SEL_SDMMC_MASK,
- IOMUX_SEL_UART2_M1 << IOMUX_SEL_UART2_SHIFT |
- IOMUX_SEL_SDMMC_M1 << IOMUX_SEL_SDMMC_SHIFT);
+ IOMUX_SEL_UART2_MASK,
+ IOMUX_SEL_UART2_M1 << IOMUX_SEL_UART2_SHIFT);
ret = regulators_enable_boot_on(false);
if (ret)
diff --git a/drivers/clk/rockchip/clk_rk3328.c b/drivers/clk/rockchip/clk_rk3328.c
index 8438047..9af8262 100644
--- a/drivers/clk/rockchip/clk_rk3328.c
+++ b/drivers/clk/rockchip/clk_rk3328.c
@@ -401,7 +401,7 @@ static ulong rk3328_mmc_get_clk(struct rk3328_cru *cru, uint clk_id)
switch (clk_id) {
case HCLK_SDMMC:
case SCLK_SDMMC:
- con_id = 30;
+ con_id = 43;
break;
case HCLK_EMMC:
case SCLK_EMMC:
@@ -429,7 +429,7 @@ static ulong rk3328_mmc_set_clk(struct rk3328_cru *cru,
switch (clk_id) {
case HCLK_SDMMC:
case SCLK_SDMMC:
- con_id = 30;
+ con_id = 43;
break;
case HCLK_EMMC:
case SCLK_EMMC:
diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3328.c b/drivers/pinctrl/rockchip/pinctrl_rk3328.c
index c928134..01ed39d 100644
--- a/drivers/pinctrl/rockchip/pinctrl_rk3328.c
+++ b/drivers/pinctrl/rockchip/pinctrl_rk3328.c
@@ -180,19 +180,17 @@ static void pinctrl_rk3328_sdmmc_config(struct rk3328_grf_regs *grf,
<< GPIO3C0_SEL_SHIFT);
break;
case PERIPH_ID_SDCARD:
- /* SDMMC_PWREN use GPIO and init as regulator-fiexed */
- if (com_iomux & IOMUX_SEL_SDMMC_MASK)
- rk_clrsetreg(&grf->gpio0d_iomux,
- GPIO0D6_SEL_MASK,
- GPIO0D6_GPIO << GPIO0D6_SEL_SHIFT);
- else
- rk_clrsetreg(&grf->gpio2a_iomux,
- GPIO2A7_SEL_MASK,
- GPIO2A7_GPIO << GPIO2A7_SEL_SHIFT);
- rk_clrsetreg(&grf->gpio1a_iomux,
- GPIO1A0_SEL_MASK,
- GPIO1A0_CARD_DATA_CLK_CMD_DETN
- << GPIO1A0_SEL_SHIFT);
+ /* SDMMC_PWREN use GPIO and init as regulator-fixed */
+ /* SDMMC0EXT hardcoded */
+ rk_clrsetreg(&grf->gpio2a_iomux,
+ GPIO2A7_SEL_MASK,
+ GPIO2A7_GPIO << GPIO2A7_SEL_SHIFT);
+ rk_clrsetreg(&grf->gpio3al_iomux,
+ GPIO3A0_SEL_MASK,
+ GPIO3A0_CARD_DATA_CLK_CMD_DETN << GPIO3A0_SEL_SHIFT);
+ rk_clrsetreg(&grf->gpio3ah_iomux,
+ GPIO3A5_SEL_MASK,
+ GPIO3A5_CARD_DATA234 << GPIO3A5_SEL_SHIFT);
break;
default:
debug("mmc id = %d iomux error!\n", mmc_id);
@@ -425,7 +423,7 @@ static int rk3328_pinctrl_get_periph_id(struct udevice *dev,
return PERIPH_ID_I2C2;
case 39:
return PERIPH_ID_I2C3;
- case 12:
+ case 4:
return PERIPH_ID_SDCARD;
case 14:
return PERIPH_ID_EMMC;

54
patch/u-boot/u-boot-rockchip/board_tinkerboard/100-tinker-s-eMMC-bootable.patch Normal file
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@ -0,0 +1,54 @@
diff --git a/arch/arm/dts/rk3288-tinker.dtsi b/arch/arm/dts/rk3288-tinker.dtsi
index a752458..14cca73 100644
--- a/arch/arm/dts/rk3288-tinker.dtsi
+++ b/arch/arm/dts/rk3288-tinker.dtsi
@@ -143,6 +143,21 @@
vqmmc-supply = <&vccio_sd>;
};
+&emmc {
+ bus-width = <8>;
+ cap-mmc-highspeed;
+ disable-wp;
+ non-removable;
+ num-slots = <1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>;
+ max-frequency = <150000000>;
+ mmc-hs200-1_8v;
+ mmc-ddr-1_8v;
+ status = "okay";
+};
+
+
&gpu {
mali-supply = <&vdd_gpu>;
status = "okay";
diff --git a/include/configs/tinker_rk3288.h b/include/configs/tinker_rk3288.h
index 58eea3c..cc585dc 100644
--- a/include/configs/tinker_rk3288.h
+++ b/include/configs/tinker_rk3288.h
@@ -7,17 +7,14 @@
#ifndef __CONFIG_H
#define __CONFIG_H
-#define ROCKCHIP_DEVICE_SETTINGS
-#include <configs/rk3288_common.h>
+#define ROCKCHIP_DEVICE_SETTINGS \
+ "stdin=serial,cros-ec-keyb\0"\
+ "stdout=serial,vidconsole\0"\
+ "stderr=serial,vidconsole\0"
-#undef BOOT_TARGET_DEVICES
-#define BOOT_TARGET_DEVICES(func) \
- func(MMC, mmc, 1) \
- func(USB, usb, 0) \
- func(PXE, pxe, na) \
- func(DHCP, dchp, na)
+#include <configs/rk3288_common.h>
-#define CONFIG_SYS_MMC_ENV_DEV 1
+#define CONFIG_SYS_MMC_ENV_DEV 0
#endif

68
patch/u-boot/u-boot-rockchip/board_tinkerboard/200_tinker_uart3_debug.patch Normal file
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@ -0,0 +1,68 @@
From d4a93aa654e8c84fb23d7a7a7d6dc6d50dfa3072 Mon Sep 17 00:00:00 2001
From: jamess_huang <Jamess_Huang@asus.com>
Date: Thu, 26 Oct 2017 18:01:28 +0800
Subject: [PATCH] change UART debug port to UART 3 (adjusted by Thomas McKahan)
Change-Id: Ie54fdd4cfc0a76dc7d9e94488ea11b576cf0171d
---
arch/arm/dts/rk3288-tinker.dts | 4 ++--
arch/arm/mach-rockchip/rk3288-board-spl.c | 11 ++++++-----
configs/tinker-rk3288_defconfig | 2 +-
3 files changed, 9 insertions(+), 8 deletions(-)
diff --git a/arch/arm/dts/rk3288-tinker.dts b/arch/arm/dts/rk3288-tinker.dts
index 4efba50e48..6193288949 100755
--- a/arch/arm/dts/rk3288-tinker.dts
+++ b/arch/arm/dts/rk3288-tinker.dts
@@ -12,7 +12,7 @@
compatible = "rockchip,rk3288-tinker", "rockchip,rk3288";
chosen {
- stdout-path = &uart2;
+ stdout-path = &uart3;
};
};
@@ -42,7 +42,7 @@
status = "okay";
};
-&uart2 {
+&uart3 {
u-boot,dm-pre-reloc;
reg-shift = <2>;
};
diff --git a/arch/arm/mach-rockchip/rk3288-board-spl.c b/arch/arm/mach-rockchip/rk3288-board-spl.c
index a0d0ce2ff4..797bc3eb56 100755
--- a/arch/arm/mach-rockchip/rk3288-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3288-board-spl.c
@@ -198,10 +198,12 @@ void board_init_f(ulong dummy)
#define GRF_BASE 0xff770000
struct rk3288_grf * const grf = (void *)GRF_BASE;
- rk_clrsetreg(&grf->gpio7ch_iomux, GPIO7C7_MASK << GPIO7C7_SHIFT |
- GPIO7C6_MASK << GPIO7C6_SHIFT,
- GPIO7C7_UART2DBG_SOUT << GPIO7C7_SHIFT |
- GPIO7C6_UART2DBG_SIN << GPIO7C6_SHIFT);
+ rk_clrsetreg(&grf->gpio7a_iomux,
+ GPIO7A7_MASK << GPIO7A7_SHIFT,
+ GPIO7A7_UART3GPS_SIN << GPIO7A7_SHIFT);
+ rk_clrsetreg(&grf->gpio7b_iomux,
+ GPIO7B0_MASK << GPIO7B0_SHIFT,
+ GPIO7B0_UART3GPS_SOUT << GPIO7B0_SHIFT);
/*
* Debug UART can be used from here if required:
*
diff --git a/configs/tinker-rk3288_defconfig b/configs/tinker-rk3288_defconfig
index 0b095b9571..89394f5cfd 100755
--- a/configs/tinker-rk3288_defconfig
+++ b/configs/tinker-rk3288_defconfig
@@ -59,7 +59,7 @@ CONFIG_REGULATOR_RK8XX=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_RAM=y
CONFIG_SPL_RAM=y
-CONFIG_DEBUG_UART_BASE=0xff690000
+CONFIG_DEBUG_UART_BASE=0xff1b0000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550=y

26
patch/u-boot/u-boot-sunxi/add-nanopi-m1-plus2-emmc.patch
View file

@ -1,3 +1,15 @@
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 916435c..5891be2 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -345,6 +345,7 @@ dtb-$(CONFIG_MACH_SUN8I_V3S) += \
sun8i-v3s-licheepi-zero.dtb
dtb-$(CONFIG_MACH_SUN50I_H5) += \
sun50i-h5-nanopi-neo2.dtb \
+ sun50i-h5-nanopi-m1-plus2.dtb \
sun50i-h5-orangepi-pc2.dtb \
sun50i-h5-orangepi-prime.dtb \
sun50i-h5-orangepi-zero-plus2.dtb
diff --git a/arch/arm/dts/sun50i-h5-nanopi-m1-plus2.dts b/arch/arm/dts/sun50i-h5-nanopi-m1-plus2.dts
new file mode 100644
index 0000000..fdf2c87
@ -132,7 +144,7 @@ index 0000000..fdf2c87
+};
diff --git a/configs/nanopi_m1_plus2_defconfig b/configs/nanopi_m1_plus2_defconfig
new file mode 100644
index 0000000..f710366
index 0000000..d088b3b
--- /dev/null
+++ b/configs/nanopi_m1_plus2_defconfig
@@ -0,0 +1,21 @@
@ -157,15 +169,3 @@ index 0000000..f710366
+CONFIG_SUN8I_EMAC=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index c9ace9f..d1bd78c
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -332,6 +332,7 @@ dtb-$(CONFIG_MACH_SUN8I_V3S) += \
sun8i-v3s-licheepi-zero.dtb
dtb-$(CONFIG_MACH_SUN50I_H5) += \
sun50i-h5-nanopi-neo2.dtb \
+ sun50i-h5-nanopi-m1-plus2.dts \
sun50i-h5-orangepi-pc2.dtb \
sun50i-h5-orangepi-prime.dtb \
sun50i-h5-orangepi-zero-plus2.dtb

5
patch/u-boot/u-boot-sunxi/add-nanopineoplus2.patch
View file

@ -2,11 +2,10 @@ diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index fee4680..295a675 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -333,7 +333,8 @@ dtb-$(CONFIG_MACH_SUN8I_V3S) += \
sun8i-v3s-licheepi-zero.dtb
@@ -346,6 +346,7 @@ dtb-$(CONFIG_MACH_SUN8I_V3S) += \
dtb-$(CONFIG_MACH_SUN50I_H5) += \
sun50i-h5-nanopi-neo2.dtb \
sun50i-h5-nanopi-m1-plus2.dts \
sun50i-h5-nanopi-m1-plus2.dtb \
+ sun50i-h5-nanopi-neo-plus2.dtb \
sun50i-h5-orangepi-pc2.dtb \
sun50i-h5-orangepi-prime.dtb \

4
patch/u-boot/u-boot-sunxi/add-orangepi-zeroplus.patch
View file

@ -2,12 +2,12 @@ diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index fee4680..295a675 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -333,6 +333,7 @@ dtb-$(CONFIG_MACH_SUN8I_V3S) += \
@@ -345,6 +345,7 @@ dtb-$(CONFIG_MACH_SUN8I_V3S) += \
sun8i-v3s-licheepi-zero.dtb
dtb-$(CONFIG_MACH_SUN50I_H5) += \
sun50i-h5-nanopi-neo2.dtb \
+ sun50i-h5-orangepi-zero-plus.dtb \
sun50i-h5-nanopi-m1-plus2.dts \
sun50i-h5-nanopi-m1-plus2.dtb \
sun50i-h5-nanopi-neo-plus2.dtb \
sun50i-h5-orangepi-pc2.dtb \
diff --git a/configs/orangepizero_plus_defconfig b/configs/orangepizero_plus_defconfig