mirror of
https://github.com/Fishwaldo/build.git
synced 2025-03-26 08:41:54 +00:00
Reenable mvebu gpio patch for newer kernels
Linux commit ba78d83be7d04f03a7fe6133efb5b6f83b9b0e7c broke support for this patch
This commit is contained in:
parent
1c9bb649a9
commit
357b54b9ef
1 changed files with 33 additions and 39 deletions
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@ -1,8 +1,8 @@
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diff --git a/drivers/gpio/gpio-mvebu.c b/drivers/gpio/gpio-mvebu.c
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index 45c65f8..2ec4a15 100644
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index adc768f908f1..a2bd264ee92c 100644
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--- a/drivers/gpio/gpio-mvebu.c
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+++ b/drivers/gpio/gpio-mvebu.c
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@@ -93,20 +93,41 @@
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@@ -92,20 +92,41 @@
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#define MVEBU_MAX_GPIO_PER_BANK 32
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@ -48,7 +48,7 @@ index 45c65f8..2ec4a15 100644
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struct mvebu_gpio_chip {
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struct gpio_chip chip;
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struct regmap *regs;
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@@ -283,12 +304,12 @@ mvebu_gpio_write_level_mask(struct mvebu_gpio_chip *mvchip, u32 val)
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@@ -282,12 +303,12 @@ mvebu_gpio_write_level_mask(struct mvebu_gpio_chip *mvchip, u32 val)
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* Functions returning addresses of individual registers for a given
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* PWM controller.
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*/
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@ -63,7 +63,7 @@ index 45c65f8..2ec4a15 100644
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{
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return mvpwm->membase + PWM_BLINK_OFF_DURATION_OFF;
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}
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@@ -600,46 +621,80 @@ static int mvebu_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm)
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@@ -599,43 +620,76 @@ static int mvebu_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm)
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struct mvebu_pwm *mvpwm = to_mvebu_pwm(chip);
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struct mvebu_gpio_chip *mvchip = mvpwm->mvchip;
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struct gpio_desc *desc;
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@ -78,9 +78,10 @@ index 45c65f8..2ec4a15 100644
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- if (mvpwm->gpiod) {
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- ret = -EBUSY;
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- } else {
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- desc = gpio_to_desc(mvchip->chip.base + pwm->hwpwm);
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- if (!desc) {
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- ret = -ENODEV;
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- desc = gpiochip_request_own_desc(&mvchip->chip,
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- pwm->hwpwm, "mvebu-pwm");
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- if (IS_ERR(desc)) {
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- ret = PTR_ERR(desc);
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- goto out;
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- }
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+ regmap_read(mvchip->regs, GPIO_BLINK_EN_OFF + mvchip->offset,
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@ -88,38 +89,31 @@ index 45c65f8..2ec4a15 100644
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+ if (pwm->chip_data || (mvchip->blink_en_reg & BIT(pwm->hwpwm)))
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+ return -EBUSY;
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- ret = gpiod_request(desc, "mvebu-pwm");
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- if (ret)
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- goto out;
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+ desc = gpio_to_desc(mvchip->chip.base + pwm->hwpwm);
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+ if (!desc) {
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+ ret = -ENODEV;
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+ goto out;
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+ }
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- ret = gpiod_direction_output(desc, 0);
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- if (ret) {
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- gpiod_free(desc);
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- gpiochip_free_own_desc(desc);
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- goto out;
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- }
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+ ret = gpiod_request(desc, "mvebu-pwm");
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+ if (ret)
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+ desc = gpiochip_request_own_desc(&mvchip->chip, pwm->hwpwm, "mvebu-pwm");
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+ if (IS_ERR(desc)) {
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+ ret = PTR_ERR(desc);
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+ goto out;
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- mvpwm->gpiod = desc;
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+ }
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+
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+ ret = gpiod_direction_output(desc, 0);
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+ if (ret) {
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+ gpiod_free(desc);
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+ gpiochip_free_own_desc(desc);
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+ goto out;
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}
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+ }
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+
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+ chip_data = kzalloc(sizeof(struct mvebu_pwm_chip_drv), GFP_KERNEL);
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+ if (!chip_data) {
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+ gpiod_free(desc);
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+ gpiochip_free_own_desc(desc);
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+ ret = -ENOMEM;
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+ goto out;
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+ }
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+
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- mvpwm->gpiod = desc;
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+ for (id = MVEBU_PWM_CTRL_SET_A;id < MVEBU_PWM_CTRL_MAX; id++) {
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+ if (!mvebu_pwm_list[id]->in_use) {
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+ chip_data->ctrl = id;
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@ -127,7 +121,7 @@ index 45c65f8..2ec4a15 100644
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+ mvebu_pwm_list[id]->in_use = true;
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+ break;
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+ }
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+ }
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}
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+
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+ if (!chip_data->master)
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+ chip_data->ctrl = mvpwm->default_counter;
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@ -153,21 +147,21 @@ index 45c65f8..2ec4a15 100644
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unsigned long flags;
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- spin_lock_irqsave(&mvpwm->lock, flags);
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- gpiod_free(mvpwm->gpiod);
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- gpiochip_free_own_desc(mvpwm->gpiod);
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- mvpwm->gpiod = NULL;
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- spin_unlock_irqrestore(&mvpwm->lock, flags);
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+ spin_lock_irqsave(&mvpwm->controller.lock, flags);
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+ if (chip_data->master)
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+ mvebu_pwm_list[chip_data->ctrl]->in_use = false;
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+
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+ gpiod_free(chip_data->gpiod);
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+ gpiochip_free_own_desc(chip_data->gpiod);
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+ kfree(chip_data);
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+ pwm->chip_data = NULL;
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+ spin_unlock_irqrestore(&mvpwm->controller.lock, flags);
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}
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static void mvebu_pwm_get_state(struct pwm_chip *chip,
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@@ -647,17 +702,24 @@ static void mvebu_pwm_get_state(struct pwm_chip *chip,
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@@ -643,17 +697,24 @@ static void mvebu_pwm_get_state(struct pwm_chip *chip,
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struct pwm_state *state) {
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struct mvebu_pwm *mvpwm = to_mvebu_pwm(chip);
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@ -195,7 +189,7 @@ index 45c65f8..2ec4a15 100644
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if (val > UINT_MAX)
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state->duty_cycle = UINT_MAX;
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else if (val)
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@@ -666,9 +728,9 @@ static void mvebu_pwm_get_state(struct pwm_chip *chip,
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@@ -662,9 +723,9 @@ static void mvebu_pwm_get_state(struct pwm_chip *chip,
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state->duty_cycle = 1;
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val = (unsigned long long)
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@ -207,7 +201,7 @@ index 45c65f8..2ec4a15 100644
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if (val < state->duty_cycle) {
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state->period = 1;
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} else {
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@@ -687,19 +749,21 @@ static void mvebu_pwm_get_state(struct pwm_chip *chip,
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@@ -683,19 +744,21 @@ static void mvebu_pwm_get_state(struct pwm_chip *chip,
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else
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state->enabled = false;
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@ -231,7 +225,7 @@ index 45c65f8..2ec4a15 100644
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do_div(val, NSEC_PER_SEC);
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if (val > UINT_MAX)
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return -EINVAL;
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@@ -708,7 +772,7 @@ static int mvebu_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
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@@ -704,7 +767,7 @@ static int mvebu_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
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else
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on = 1;
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@ -240,7 +234,7 @@ index 45c65f8..2ec4a15 100644
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(state->period - state->duty_cycle);
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do_div(val, NSEC_PER_SEC);
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if (val > UINT_MAX)
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@@ -718,16 +782,16 @@ static int mvebu_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
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@@ -714,16 +777,16 @@ static int mvebu_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
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else
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off = 1;
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@ -261,7 +255,7 @@ index 45c65f8..2ec4a15 100644
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return 0;
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}
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@@ -746,10 +810,10 @@ static void __maybe_unused mvebu_pwm_suspend(struct mvebu_gpio_chip *mvchip)
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@@ -742,10 +805,10 @@ static void __maybe_unused mvebu_pwm_suspend(struct mvebu_gpio_chip *mvchip)
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regmap_read(mvchip->regs, GPIO_BLINK_CNT_SELECT_OFF + mvchip->offset,
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&mvpwm->blink_select);
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}
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static void __maybe_unused mvebu_pwm_resume(struct mvebu_gpio_chip *mvchip)
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@@ -758,10 +822,10 @@ static void __maybe_unused mvebu_pwm_resume(struct mvebu_gpio_chip *mvchip)
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@@ -754,10 +817,10 @@ static void __maybe_unused mvebu_pwm_resume(struct mvebu_gpio_chip *mvchip)
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regmap_write(mvchip->regs, GPIO_BLINK_CNT_SELECT_OFF + mvchip->offset,
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mvpwm->blink_select);
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}
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static int mvebu_pwm_probe(struct platform_device *pdev,
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@@ -772,6 +836,7 @@ static int mvebu_pwm_probe(struct platform_device *pdev,
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@@ -768,6 +831,7 @@ static int mvebu_pwm_probe(struct platform_device *pdev,
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struct mvebu_pwm *mvpwm;
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struct resource *res;
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u32 set;
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@ -299,7 +293,7 @@ index 45c65f8..2ec4a15 100644
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if (!of_device_is_compatible(mvchip->chip.of_node,
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"marvell,armada-370-gpio"))
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@@ -794,12 +859,15 @@ static int mvebu_pwm_probe(struct platform_device *pdev,
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@@ -790,12 +854,15 @@ static int mvebu_pwm_probe(struct platform_device *pdev,
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* Use set A for lines of GPIO chip with id 0, B for GPIO chip
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* with id 1. Don't allow further GPIO chips to be used for PWM.
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*/
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regmap_write(mvchip->regs,
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GPIO_BLINK_CNT_SELECT_OFF + mvchip->offset, set);
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@@ -809,15 +877,13 @@ static int mvebu_pwm_probe(struct platform_device *pdev,
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@@ -805,15 +872,13 @@ static int mvebu_pwm_probe(struct platform_device *pdev,
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mvchip->mvpwm = mvpwm;
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mvpwm->mvchip = mvchip;
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mvpwm->chip.dev = dev;
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mvpwm->chip.ops = &mvebu_pwm_ops;
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@@ -830,7 +896,9 @@ static int mvebu_pwm_probe(struct platform_device *pdev,
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@@ -826,7 +891,9 @@ static int mvebu_pwm_probe(struct platform_device *pdev,
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*/
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mvpwm->chip.base = -1;
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