[ rockchip-dev ] update patchset, target 5.0 RC

Includes experimental video decoder driver.  Thanks as always to @miouyouyou for the base patches

config/kernel/linux-rockchip-dev.config

@@ -1,6 +1,6 @@
 #
 # Automatically generated file; DO NOT EDIT.
-# Linux/arm 4.19.9 Kernel Configuration
+# Linux/arm 5.0.0-rc3 Kernel Configuration
 #
 
 #
@@ -9,6 +9,7 @@
 CONFIG_CC_IS_GCC=y
 CONFIG_GCC_VERSION=70201
 CONFIG_CLANG_VERSION=0
+CONFIG_CC_HAS_ASM_GOTO=y
 CONFIG_IRQ_WORK=y
 CONFIG_BUILDTIME_EXTABLE_SORT=y
 
@@ -41,8 +42,6 @@ CONFIG_USELIB=y
 CONFIG_AUDIT=y
 CONFIG_HAVE_ARCH_AUDITSYSCALL=y
 CONFIG_AUDITSYSCALL=y
-CONFIG_AUDIT_WATCH=y
-CONFIG_AUDIT_TREE=y
 
 #
 # IRQ subsystem
@@ -89,6 +88,7 @@ CONFIG_TICK_CPU_ACCOUNTING=y
 # CONFIG_IRQ_TIME_ACCOUNTING is not set
 # CONFIG_BSD_PROCESS_ACCT is not set
 # CONFIG_TASKSTATS is not set
+# CONFIG_PSI is not set
 CONFIG_CPU_ISOLATION=y
 
 #
@@ -214,7 +214,6 @@ CONFIG_ARM=y
 CONFIG_ARM_HAS_SG_CHAIN=y
 CONFIG_ARM_DMA_USE_IOMMU=y
 CONFIG_ARM_DMA_IOMMU_ALIGNMENT=8
-CONFIG_MIGHT_HAVE_PCI=y
 CONFIG_SYS_SUPPORTS_APM_EMULATION=y
 CONFIG_HAVE_PROC_CPU=y
 CONFIG_STACKTRACE_SUPPORT=y
@@ -295,6 +294,7 @@ CONFIG_ARCH_MULTI_V6_V7=y
 # CONFIG_SOC_DRA7XX is not set
 # CONFIG_ARCH_SIRF is not set
 # CONFIG_ARCH_QCOM is not set
+# CONFIG_ARCH_RDA is not set
 # CONFIG_ARCH_REALVIEW is not set
 CONFIG_ARCH_ROCKCHIP=y
 # CONFIG_ARCH_S5PV210 is not set
@@ -376,13 +376,6 @@ CONFIG_ARM_ERRATA_825619=y
 #
 # Bus support
 #
-# CONFIG_PCI is not set
-
-#
-# PCI Endpoint
-#
-# CONFIG_PCI_ENDPOINT is not set
-# CONFIG_PCCARD is not set
 
 #
 # Kernel Features
@@ -530,6 +523,7 @@ CONFIG_PM_GENERIC_DOMAINS=y
 CONFIG_PM_GENERIC_DOMAINS_SLEEP=y
 CONFIG_PM_GENERIC_DOMAINS_OF=y
 CONFIG_CPU_PM=y
+# CONFIG_ENERGY_MODEL is not set
 CONFIG_ARCH_SUSPEND_POSSIBLE=y
 CONFIG_ARM_CPU_SUSPEND=y
 CONFIG_ARCH_HIBERNATION_POSSIBLE=y
@@ -539,6 +533,7 @@ CONFIG_ARCH_HIBERNATION_POSSIBLE=y
 #
 # CONFIG_FIRMWARE_MEMMAP is not set
 # CONFIG_FW_CFG_SYSFS is not set
+# CONFIG_INTEL_STRATIX10_SERVICE is not set
 CONFIG_HAVE_ARM_SMCCC=y
 # CONFIG_GOOGLE_FIRMWARE is not set
 
@@ -664,18 +659,11 @@ CONFIG_MSDOS_PARTITION=y
 CONFIG_EFI_PARTITION=y
 # CONFIG_SYSV68_PARTITION is not set
 # CONFIG_CMDLINE_PARTITION is not set
+CONFIG_BLK_PM=y
 
 #
 # IO Schedulers
 #
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
-CONFIG_CFQ_GROUP_IOSCHED=y
-# CONFIG_DEFAULT_DEADLINE is not set
-CONFIG_DEFAULT_CFQ=y
-# CONFIG_DEFAULT_NOOP is not set
-CONFIG_DEFAULT_IOSCHED="cfq"
 CONFIG_MQ_IOSCHED_DEADLINE=y
 CONFIG_MQ_IOSCHED_KYBER=y
 # CONFIG_IOSCHED_BFQ is not set
@@ -707,8 +695,6 @@ CONFIG_COREDUMP=y
 #
 CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
-CONFIG_HAVE_MEMBLOCK=y
-CONFIG_NO_BOOTMEM=y
 CONFIG_MEMORY_ISOLATION=y
 CONFIG_SPLIT_PTLOCK_CPUS=4
 CONFIG_COMPACTION=y
@@ -737,6 +723,7 @@ CONFIG_FRAME_VECTOR=y
 CONFIG_NET=y
 CONFIG_NET_INGRESS=y
 CONFIG_NET_EGRESS=y
+CONFIG_SKB_EXTENSIONS=y
 
 #
 # Networking options
@@ -903,9 +890,6 @@ CONFIG_NF_CT_NETLINK_HELPER=m
 CONFIG_NETFILTER_NETLINK_GLUE_CT=y
 CONFIG_NF_NAT=m
 CONFIG_NF_NAT_NEEDED=y
-CONFIG_NF_NAT_PROTO_DCCP=y
-CONFIG_NF_NAT_PROTO_UDPLITE=y
-CONFIG_NF_NAT_PROTO_SCTP=y
 CONFIG_NF_NAT_AMANDA=m
 CONFIG_NF_NAT_FTP=m
 CONFIG_NF_NAT_IRC=m
@@ -937,6 +921,7 @@ CONFIG_NFT_COMPAT=m
 CONFIG_NFT_HASH=m
 CONFIG_NFT_FIB=m
 CONFIG_NFT_FIB_INET=m
+CONFIG_NFT_XFRM=m
 CONFIG_NFT_SOCKET=m
 CONFIG_NFT_OSF=m
 CONFIG_NFT_TPROXY=m
@@ -1124,7 +1109,6 @@ CONFIG_NFT_CHAIN_NAT_IPV4=m
 CONFIG_NFT_MASQ_IPV4=m
 CONFIG_NFT_REDIR_IPV4=m
 CONFIG_NF_NAT_SNMP_BASIC=m
-CONFIG_NF_NAT_PROTO_GRE=m
 CONFIG_NF_NAT_PPTP=m
 CONFIG_NF_NAT_H323=m
 CONFIG_IP_NF_IPTABLES=m
@@ -1268,7 +1252,6 @@ CONFIG_NET_DSA_TAG_BRCM=y
 CONFIG_NET_DSA_TAG_BRCM_PREPEND=y
 CONFIG_NET_DSA_TAG_DSA=y
 CONFIG_NET_DSA_TAG_EDSA=y
-CONFIG_NET_DSA_TAG_KSZ=y
 CONFIG_NET_DSA_TAG_LAN9303=y
 CONFIG_NET_DSA_TAG_MTK=y
 CONFIG_NET_DSA_TAG_TRAILER=y
@@ -1320,6 +1303,7 @@ CONFIG_NET_SCH_TEQL=m
 CONFIG_NET_SCH_TBF=m
 CONFIG_NET_SCH_CBS=m
 CONFIG_NET_SCH_ETF=m
+# CONFIG_NET_SCH_TAPRIO is not set
 CONFIG_NET_SCH_GRED=m
 CONFIG_NET_SCH_DSMARK=m
 CONFIG_NET_SCH_NETEM=m
@@ -1404,6 +1388,8 @@ CONFIG_BATMAN_ADV_DAT=y
 CONFIG_BATMAN_ADV_NC=y
 CONFIG_BATMAN_ADV_MCAST=y
 # CONFIG_BATMAN_ADV_DEBUGFS is not set
+# CONFIG_BATMAN_ADV_DEBUG is not set
+# CONFIG_BATMAN_ADV_TRACING is not set
 CONFIG_OPENVSWITCH=m
 CONFIG_OPENVSWITCH_GRE=m
 CONFIG_OPENVSWITCH_VXLAN=m
@@ -1529,7 +1515,7 @@ CONFIG_BT_MRVL_SDIO=y
 CONFIG_BT_MTKUART=m
 # CONFIG_AF_RXRPC is not set
 # CONFIG_AF_KCM is not set
-CONFIG_STREAM_PARSER=m
+CONFIG_STREAM_PARSER=y
 CONFIG_FIB_RULES=y
 CONFIG_WIRELESS=y
 CONFIG_WIRELESS_EXT=y
@@ -1555,8 +1541,6 @@ CONFIG_LIB80211_CRYPT_TKIP=y
 CONFIG_MAC80211=y
 CONFIG_MAC80211_HAS_RC=y
 CONFIG_MAC80211_RC_MINSTREL=y
-CONFIG_MAC80211_RC_MINSTREL_HT=y
-# CONFIG_MAC80211_RC_MINSTREL_VHT is not set
 CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y
 CONFIG_MAC80211_RC_DEFAULT="minstrel_ht"
 CONFIG_MAC80211_MESH=y
@@ -1598,6 +1582,7 @@ CONFIG_LWTUNNEL=y
 CONFIG_LWTUNNEL_BPF=y
 CONFIG_DST_CACHE=y
 CONFIG_GRO_CELLS=y
+CONFIG_NET_SOCK_MSG=y
 # CONFIG_NET_DEVLINK is not set
 CONFIG_MAY_USE_DEVLINK=y
 CONFIG_FAILOVER=m
@@ -1607,6 +1592,9 @@ CONFIG_HAVE_EBPF_JIT=y
 # Device Drivers
 #
 CONFIG_ARM_AMBA=y
+CONFIG_HAVE_PCI=y
+# CONFIG_PCI is not set
+# CONFIG_PCCARD is not set
 
 #
 # Generic Driver Options
@@ -1638,6 +1626,7 @@ CONFIG_REGMAP_SPI=y
 CONFIG_REGMAP_W1=m
 CONFIG_REGMAP_MMIO=y
 CONFIG_REGMAP_IRQ=y
+CONFIG_REGMAP_SCCB=m
 CONFIG_DMA_SHARED_BUFFER=y
 CONFIG_DMA_FENCE_TRACE=y
 # CONFIG_DMA_CMA is not set
@@ -1714,6 +1703,7 @@ CONFIG_ATA_OVER_ETH=m
 # CONFIG_USB_SWITCH_FSA9480 is not set
 # CONFIG_LATTICE_ECP3_CONFIG is not set
 # CONFIG_SRAM is not set
+# CONFIG_PVPANIC is not set
 # CONFIG_C2PORT is not set
 
 #
@@ -1726,6 +1716,7 @@ CONFIG_EEPROM_AT24=m
 CONFIG_EEPROM_93CX6=m
 # CONFIG_EEPROM_93XX46 is not set
 # CONFIG_EEPROM_IDT_89HPESX is not set
+# CONFIG_EEPROM_EE1004 is not set
 
 #
 # Texas Instruments shared transport line discipline
@@ -1780,7 +1771,6 @@ CONFIG_SCSI_MOD=y
 # CONFIG_RAID_ATTRS is not set
 CONFIG_SCSI=y
 CONFIG_SCSI_DMA=y
-# CONFIG_SCSI_MQ_DEFAULT is not set
 CONFIG_SCSI_PROC_FS=y
 
 #
@@ -1827,7 +1817,6 @@ CONFIG_MD_RAID456=y
 # CONFIG_BCACHE is not set
 CONFIG_BLK_DEV_DM_BUILTIN=y
 CONFIG_BLK_DEV_DM=y
-# CONFIG_DM_MQ_DEFAULT is not set
 # CONFIG_DM_DEBUG is not set
 CONFIG_DM_BUFIO=y
 # CONFIG_DM_DEBUG_BLOCK_MANAGER_LOCKING is not set
@@ -1893,12 +1882,13 @@ CONFIG_B53_SPI_DRIVER=m
 CONFIG_B53_MDIO_DRIVER=m
 CONFIG_B53_MMAP_DRIVER=m
 CONFIG_B53_SRAB_DRIVER=m
+# CONFIG_B53_SERDES is not set
 CONFIG_NET_DSA_BCM_SF2=m
 CONFIG_NET_DSA_LOOP=m
+# CONFIG_NET_DSA_LANTIQ_GSWIP is not set
 CONFIG_NET_DSA_MT7530=m
 CONFIG_NET_DSA_MV88E6060=m
-CONFIG_MICROCHIP_KSZ=m
-CONFIG_MICROCHIP_KSZ_SPI_DRIVER=m
+# CONFIG_NET_DSA_MICROCHIP_KSZ9477 is not set
 CONFIG_NET_DSA_MV88E6XXX=m
 CONFIG_NET_DSA_MV88E6XXX_GLOBAL2=y
 # CONFIG_NET_DSA_MV88E6XXX_PTP is not set
@@ -1940,6 +1930,7 @@ CONFIG_MSCC_OCELOT_SWITCH_OCELOT=m
 # CONFIG_NET_VENDOR_NATSEMI is not set
 # CONFIG_NET_VENDOR_NETRONOME is not set
 CONFIG_NET_VENDOR_NI=y
+# CONFIG_NI_XGE_MANAGEMENT_ENET is not set
 # CONFIG_ETHOC is not set
 # CONFIG_NET_VENDOR_QUALCOMM is not set
 # CONFIG_NET_VENDOR_RENESAS is not set
@@ -2062,6 +2053,7 @@ CONFIG_USB_NET_RNDIS_HOST=y
 # CONFIG_USB_SIERRA_NET is not set
 # CONFIG_USB_VL600 is not set
 # CONFIG_USB_NET_CH9200 is not set
+# CONFIG_USB_NET_AQC111 is not set
 CONFIG_WLAN=y
 # CONFIG_WIRELESS_WDS is not set
 CONFIG_WLAN_VENDOR_ADMTEK=y
@@ -2098,7 +2090,6 @@ CONFIG_ATH10K_USB=m
 # CONFIG_ATH10K_TRACING is not set
 CONFIG_WCN36XX=m
 # CONFIG_WCN36XX_DEBUGFS is not set
-CONFIG_RTL8188EU=m
 CONFIG_WLAN_VENDOR_ATMEL=y
 CONFIG_AT76C50X_USB=m
 CONFIG_WLAN_VENDOR_BROADCOM=y
@@ -2132,15 +2123,16 @@ CONFIG_LIBERTAS_THINFIRM_USB=m
 CONFIG_MWIFIEX=y
 CONFIG_MWIFIEX_SDIO=y
 CONFIG_MWIFIEX_USB=m
-CONFIG_RTL8812AU=m
-CONFIG_RTL8814AU=m
 CONFIG_WLAN_VENDOR_MEDIATEK=y
 CONFIG_MT7601U=m
 CONFIG_MT76_CORE=m
 CONFIG_MT76_LEDS=y
 CONFIG_MT76_USB=m
-CONFIG_MT76x2_COMMON=m
+CONFIG_MT76x02_LIB=m
+CONFIG_MT76x02_USB=m
+CONFIG_MT76x0_COMMON=m
 CONFIG_MT76x0U=m
+CONFIG_MT76x2_COMMON=m
 CONFIG_MT76x2U=m
 CONFIG_WLAN_VENDOR_RALINK=y
 CONFIG_RT2X00=y
@@ -2188,6 +2180,7 @@ CONFIG_ZD1211RW=m
 CONFIG_WLAN_VENDOR_QUANTENNA=y
 # CONFIG_MAC80211_HWSIM is not set
 CONFIG_USB_NET_RNDIS_WLAN=y
+CONFIG_VIRT_WIFI=m
 
 #
 # Enable WiMAX (Networking options) to see the WiMAX drivers
@@ -2196,6 +2189,7 @@ CONFIG_USB_NET_RNDIS_WLAN=y
 # CONFIG_NETDEVSIM is not set
 CONFIG_NET_FAILOVER=m
 # CONFIG_ISDN is not set
+# CONFIG_NVM is not set
 
 #
 # Input device support
@@ -2437,6 +2431,7 @@ CONFIG_SERIO_RAW=y
 # CONFIG_SERIO_PS2MULT is not set
 # CONFIG_SERIO_ARC_PS2 is not set
 # CONFIG_SERIO_APBPS2 is not set
+# CONFIG_SERIO_OLPC_APSP is not set
 # CONFIG_SERIO_GPIO_PS2 is not set
 # CONFIG_USERIO is not set
 # CONFIG_GAMEPORT is not set
@@ -2583,6 +2578,7 @@ CONFIG_I2C_STUB=m
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I3C is not set
 CONFIG_SPI=y
 # CONFIG_SPI_DEBUG is not set
 CONFIG_SPI_MASTER=y
@@ -2602,6 +2598,7 @@ CONFIG_SPI_BITBANG=y
 # CONFIG_SPI_PL022 is not set
 CONFIG_SPI_ROCKCHIP=y
 # CONFIG_SPI_SC18IS602 is not set
+# CONFIG_SPI_MXIC is not set
 # CONFIG_SPI_XCOMM is not set
 # CONFIG_SPI_XILINX is not set
 # CONFIG_SPI_ZYNQMP_GQSPI is not set
@@ -2648,6 +2645,7 @@ CONFIG_PINCTRL_ROCKCHIP=y
 # CONFIG_PINCTRL_SINGLE is not set
 # CONFIG_PINCTRL_SX150X is not set
 # CONFIG_PINCTRL_RK805 is not set
+# CONFIG_PINCTRL_OCELOT is not set
 CONFIG_PINCTRL_MADERA=m
 CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
 CONFIG_GPIOLIB=y
@@ -2663,6 +2661,7 @@ CONFIG_GPIO_GENERIC=y
 #
 # CONFIG_GPIO_74XX_MMIO is not set
 # CONFIG_GPIO_ALTERA is not set
+# CONFIG_GPIO_CADENCE is not set
 # CONFIG_GPIO_DWAPB is not set
 # CONFIG_GPIO_FTGPIO010 is not set
 CONFIG_GPIO_GENERIC_PLATFORM=y
@@ -2672,6 +2671,7 @@ CONFIG_GPIO_HLWD=m
 # CONFIG_GPIO_MOCKUP is not set
 # CONFIG_GPIO_MPC8XXX is not set
 # CONFIG_GPIO_PL061 is not set
+# CONFIG_GPIO_SAMA5D2_PIOBU is not set
 # CONFIG_GPIO_SYSCON is not set
 # CONFIG_GPIO_XILINX is not set
 # CONFIG_GPIO_ZEVIO is not set
@@ -2875,6 +2875,7 @@ CONFIG_SENSORS_NCT6775=m
 CONFIG_SENSORS_NCT7802=m
 CONFIG_SENSORS_NCT7904=m
 CONFIG_SENSORS_NPCM7XX=m
+# CONFIG_SENSORS_OCC_P8_I2C is not set
 CONFIG_SENSORS_PCF8591=m
 # CONFIG_PMBUS is not set
 CONFIG_SENSORS_PWM_FAN=m
@@ -2942,10 +2943,6 @@ CONFIG_CPU_THERMAL=y
 # CONFIG_THERMAL_EMULATION is not set
 # CONFIG_QORIQ_THERMAL is not set
 CONFIG_ROCKCHIP_THERMAL=m
-
-#
-# ACPI INT340X thermal drivers
-#
 # CONFIG_GENERIC_ADC_THERMAL is not set
 CONFIG_WATCHDOG=y
 CONFIG_WATCHDOG_CORE=y
@@ -3114,6 +3111,7 @@ CONFIG_REGULATOR_FAN53555=y
 # CONFIG_REGULATOR_MAX8660 is not set
 # CONFIG_REGULATOR_MAX8952 is not set
 # CONFIG_REGULATOR_MAX8973 is not set
+# CONFIG_REGULATOR_MCP16502 is not set
 # CONFIG_REGULATOR_MT6311 is not set
 # CONFIG_REGULATOR_PFUZE100 is not set
 # CONFIG_REGULATOR_PV88060 is not set
@@ -3164,6 +3162,7 @@ CONFIG_IR_GPIO_CIR=m
 # CONFIG_IR_PWM_TX is not set
 # CONFIG_IR_SERIAL is not set
 # CONFIG_IR_SIR is not set
+# CONFIG_RC_XBOX_DVD is not set
 CONFIG_MEDIA_SUPPORT=y
 
 #
@@ -3359,6 +3358,7 @@ CONFIG_USB_HACKRF=m
 CONFIG_USB_MSI2500=m
 CONFIG_V4L_PLATFORM_DRIVERS=y
 # CONFIG_VIDEO_CADENCE is not set
+# CONFIG_VIDEO_ASPEED is not set
 CONFIG_VIDEO_MUX=m
 CONFIG_SOC_CAMERA=m
 CONFIG_SOC_CAMERA_PLATFORM=m
@@ -3368,7 +3368,7 @@ CONFIG_VIDEO_XILINX_VTC=m
 CONFIG_V4L_MEM2MEM_DRIVERS=y
 # CONFIG_VIDEO_MEM2MEM_DEINTERLACE is not set
 # CONFIG_VIDEO_SH_VEU is not set
-# CONFIG_VIDEO_ROCKCHIP_RGA is not set
+CONFIG_VIDEO_ROCKCHIP_RGA=m
 CONFIG_V4L_TEST_DRIVERS=y
 # CONFIG_VIDEO_VIMC is not set
 CONFIG_VIDEO_VIVID=m
@@ -3421,6 +3421,7 @@ CONFIG_VIDEOBUF2_V4L2=m
 CONFIG_VIDEOBUF2_MEMOPS=m
 CONFIG_VIDEOBUF2_DMA_CONTIG=m
 CONFIG_VIDEOBUF2_VMALLOC=m
+CONFIG_VIDEOBUF2_DMA_SG=m
 CONFIG_DVB_B2C2_FLEXCOP=m
 CONFIG_SMS_SIANO_MDTV=m
 CONFIG_SMS_SIANO_RC=y
@@ -3521,8 +3522,11 @@ CONFIG_VIDEO_THS8200=m
 #
 CONFIG_VIDEO_APTINA_PLL=m
 CONFIG_VIDEO_SMIAPP_PLL=m
+# CONFIG_VIDEO_IMX214 is not set
 # CONFIG_VIDEO_IMX258 is not set
 CONFIG_VIDEO_IMX274=m
+# CONFIG_VIDEO_IMX319 is not set
+# CONFIG_VIDEO_IMX355 is not set
 CONFIG_VIDEO_OV2640=m
 CONFIG_VIDEO_OV2659=m
 CONFIG_VIDEO_OV2680=m
@@ -3801,6 +3805,7 @@ CONFIG_DVB_TUNER_DIB0090=m
 #
 CONFIG_DVB_DRX39XYJ=m
 CONFIG_DVB_LNBH25=m
+CONFIG_DVB_LNBH29=m
 CONFIG_DVB_LNBP21=m
 CONFIG_DVB_LNBP22=m
 CONFIG_DVB_ISL6405=m
@@ -3862,6 +3867,7 @@ CONFIG_DRM_KMS_HELPER=y
 CONFIG_DRM_KMS_FB_HELPER=y
 CONFIG_DRM_FBDEV_EMULATION=y
 CONFIG_DRM_FBDEV_OVERALLOC=100
+# CONFIG_DRM_FBDEV_LEAK_PHYS_SMEM is not set
 # CONFIG_DRM_LOAD_EDID_FIRMWARE is not set
 # CONFIG_DRM_DP_CEC is not set
 CONFIG_DRM_GEM_CMA_HELPER=y
@@ -3893,6 +3899,7 @@ CONFIG_ROCKCHIP_DW_HDMI=y
 # CONFIG_ROCKCHIP_DW_MIPI_DSI is not set
 # CONFIG_ROCKCHIP_INNO_HDMI is not set
 CONFIG_ROCKCHIP_LVDS=y
+# CONFIG_ROCKCHIP_RGB is not set
 CONFIG_DRM_UDL=y
 # CONFIG_DRM_ARMADA is not set
 # CONFIG_DRM_RCAR_DW_HDMI is not set
@@ -3915,10 +3922,12 @@ CONFIG_DRM_PANEL_INNOLUX_P079ZCA=m
 CONFIG_DRM_PANEL_JDI_LT070ME05000=m
 # CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set
 # CONFIG_DRM_PANEL_LG_LG4573 is not set
+# CONFIG_DRM_PANEL_OLIMEX_LCD_OLINUXINO is not set
 CONFIG_DRM_PANEL_ORISETECH_OTM8009A=m
 CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00=m
 CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN=m
 CONFIG_DRM_PANEL_RAYDIUM_RM68200=m
+# CONFIG_DRM_PANEL_SAMSUNG_S6D16D0 is not set
 CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2=m
 CONFIG_DRM_PANEL_SAMSUNG_S6E63J0X03=m
 # CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set
@@ -3926,6 +3935,7 @@ CONFIG_DRM_PANEL_SAMSUNG_S6E63J0X03=m
 CONFIG_DRM_PANEL_SHARP_LQ101R1SX01=m
 CONFIG_DRM_PANEL_SHARP_LS043T1LE01=m
 # CONFIG_DRM_PANEL_SITRONIX_ST7789V is not set
+# CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA is not set
 CONFIG_DRM_BRIDGE=y
 CONFIG_DRM_PANEL_BRIDGE=y
 
@@ -3943,8 +3953,10 @@ CONFIG_DRM_SIL_SII8620=m
 # CONFIG_DRM_SII902X is not set
 # CONFIG_DRM_SII9234 is not set
 CONFIG_DRM_THINE_THC63LVD1024=m
+CONFIG_DRM_TOSHIBA_TC358764=m
 # CONFIG_DRM_TOSHIBA_TC358767 is not set
 # CONFIG_DRM_TI_TFP410 is not set
+# CONFIG_DRM_TI_SN65DSI86 is not set
 # CONFIG_DRM_I2C_ADV7511 is not set
 CONFIG_DRM_DW_HDMI=y
 # CONFIG_DRM_DW_HDMI_AHB_AUDIO is not set
@@ -3955,6 +3967,7 @@ CONFIG_DRM_DW_HDMI_I2S_AUDIO=m
 # CONFIG_DRM_MXSFB is not set
 CONFIG_DRM_TINYDRM=m
 CONFIG_TINYDRM_MIPI_DBI=m
+# CONFIG_TINYDRM_HX8357D is not set
 # CONFIG_TINYDRM_ILI9225 is not set
 CONFIG_TINYDRM_ILI9341=m
 CONFIG_TINYDRM_MI0283QT=m
@@ -3969,10 +3982,10 @@ CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y
 #
 # Frame buffer Devices
 #
-CONFIG_FB=y
-# CONFIG_FIRMWARE_EDID is not set
 CONFIG_FB_CMDLINE=y
 CONFIG_FB_NOTIFY=y
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
 CONFIG_FB_CFB_FILLRECT=y
 CONFIG_FB_CFB_COPYAREA=y
 CONFIG_FB_CFB_IMAGEBLIT=y
@@ -3982,7 +3995,7 @@ CONFIG_FB_SYS_IMAGEBLIT=y
 # CONFIG_FB_FOREIGN_ENDIAN is not set
 CONFIG_FB_SYS_FOPS=y
 CONFIG_FB_DEFERRED_IO=y
-CONFIG_FB_BACKLIGHT=y
+CONFIG_FB_BACKLIGHT=m
 CONFIG_FB_MODE_HELPERS=y
 # CONFIG_FB_TILEBLITTING is not set
 
@@ -3998,7 +4011,6 @@ CONFIG_FB_MODE_HELPERS=y
 # CONFIG_FB_IBM_GXT4500 is not set
 # CONFIG_FB_VIRTUAL is not set
 # CONFIG_FB_METRONOME is not set
-# CONFIG_FB_BROADSHEET is not set
 # CONFIG_FB_SIMPLE is not set
 # CONFIG_FB_SSD1307 is not set
 CONFIG_BACKLIGHT_LCD_SUPPORT=y
@@ -4113,6 +4125,7 @@ CONFIG_SND_SOC_RK3288_HDMI_ANALOG=m
 #
 # STMicroelectronics STM32 SOC audio support
 #
+# CONFIG_SND_SOC_XILINX_I2S is not set
 # CONFIG_SND_SOC_XTFPGA_I2S is not set
 # CONFIG_ZX_TDM is not set
 CONFIG_SND_SOC_I2C_AND_SPI=y
@@ -4126,6 +4139,7 @@ CONFIG_SND_SOC_I2C_AND_SPI=y
 # CONFIG_SND_SOC_ADAU1761_SPI is not set
 # CONFIG_SND_SOC_ADAU7002 is not set
 # CONFIG_SND_SOC_AK4104 is not set
+# CONFIG_SND_SOC_AK4118 is not set
 CONFIG_SND_SOC_AK4458=m
 # CONFIG_SND_SOC_AK4554 is not set
 # CONFIG_SND_SOC_AK4613 is not set
@@ -4153,6 +4167,7 @@ CONFIG_SND_SOC_CPCAP=m
 # CONFIG_SND_SOC_CS43130 is not set
 # CONFIG_SND_SOC_CS4349 is not set
 # CONFIG_SND_SOC_CS53L30 is not set
+# CONFIG_SND_SOC_DMIC is not set
 CONFIG_SND_SOC_HDMI_CODEC=m
 # CONFIG_SND_SOC_ES7134 is not set
 CONFIG_SND_SOC_ES7241=m
@@ -4162,6 +4177,7 @@ CONFIG_SND_SOC_ES8328_I2C=m
 CONFIG_SND_SOC_ES8328_SPI=m
 # CONFIG_SND_SOC_GTM601 is not set
 # CONFIG_SND_SOC_INNO_RK3036 is not set
+# CONFIG_SND_SOC_MAX98088 is not set
 CONFIG_SND_SOC_MAX98090=y
 # CONFIG_SND_SOC_MAX98504 is not set
 CONFIG_SND_SOC_MAX9867=m
@@ -4176,6 +4192,8 @@ CONFIG_SND_SOC_PCM1789_I2C=m
 # CONFIG_SND_SOC_PCM179X_SPI is not set
 # CONFIG_SND_SOC_PCM186X_I2C is not set
 # CONFIG_SND_SOC_PCM186X_SPI is not set
+# CONFIG_SND_SOC_PCM3060_I2C is not set
+# CONFIG_SND_SOC_PCM3060_SPI is not set
 # CONFIG_SND_SOC_PCM3168A_I2C is not set
 # CONFIG_SND_SOC_PCM3168A_SPI is not set
 # CONFIG_SND_SOC_PCM512x_I2C is not set
@@ -4238,6 +4256,7 @@ CONFIG_SND_SOC_MAX9759=m
 CONFIG_SND_SOC_MT6351=m
 CONFIG_SND_SOC_NAU8540=m
 # CONFIG_SND_SOC_NAU8810 is not set
+# CONFIG_SND_SOC_NAU8822 is not set
 # CONFIG_SND_SOC_NAU8824 is not set
 # CONFIG_SND_SOC_TPA6130A2 is not set
 CONFIG_SND_SIMPLE_CARD_UTILS=y
@@ -4268,6 +4287,7 @@ CONFIG_HID_APPLEIR=m
 CONFIG_HID_AUREAL=m
 CONFIG_HID_BELKIN=m
 CONFIG_HID_BETOP_FF=m
+# CONFIG_HID_BIGBEN_FF is not set
 CONFIG_HID_CHERRY=m
 CONFIG_HID_CHICONY=m
 CONFIG_HID_CORSAIR=m
@@ -4627,6 +4647,7 @@ CONFIG_USB_G_HID=m
 # CONFIG_USB_G_DBGP is not set
 # CONFIG_USB_G_WEBCAM is not set
 # CONFIG_TYPEC is not set
+CONFIG_USB_ROLE_SWITCH=m
 # CONFIG_USB_LED_TRIG is not set
 # CONFIG_USB_ULPI_BUS is not set
 # CONFIG_UWB is not set
@@ -4666,6 +4687,7 @@ CONFIG_MMC_DW_ROCKCHIP=y
 # CONFIG_MMC_MTK is not set
 # CONFIG_MMC_SDHCI_XENON is not set
 # CONFIG_MMC_SDHCI_OMAP is not set
+# CONFIG_MMC_SDHCI_AM654 is not set
 # CONFIG_MEMSTICK is not set
 CONFIG_NEW_LEDS=y
 CONFIG_LEDS_CLASS=y
@@ -4675,6 +4697,7 @@ CONFIG_LEDS_CLASS=y
 #
 # LED drivers
 #
+# CONFIG_LEDS_AN30259A is not set
 # CONFIG_LEDS_BCM6328 is not set
 # CONFIG_LEDS_BCM6358 is not set
 # CONFIG_LEDS_CPCAP is not set
@@ -4732,6 +4755,8 @@ CONFIG_LEDS_TRIGGER_TRANSIENT=y
 # CONFIG_LEDS_TRIGGER_CAMERA is not set
 # CONFIG_LEDS_TRIGGER_PANIC is not set
 # CONFIG_LEDS_TRIGGER_NETDEV is not set
+# CONFIG_LEDS_TRIGGER_PATTERN is not set
+# CONFIG_LEDS_TRIGGER_AUDIO is not set
 # CONFIG_ACCESSIBILITY is not set
 # CONFIG_INFINIBAND is not set
 CONFIG_EDAC_ATOMIC_SCRUB=y
@@ -4884,6 +4909,7 @@ CONFIG_PL330_DMA=y
 #
 CONFIG_SYNC_FILE=y
 # CONFIG_SW_SYNC is not set
+# CONFIG_UDMABUF is not set
 # CONFIG_AUXDISPLAY is not set
 # CONFIG_UIO is not set
 # CONFIG_VFIO is not set
@@ -4953,7 +4979,6 @@ CONFIG_88EU_AP_MODE=y
 #
 # Resolver to digital converters
 #
-# CONFIG_AD2S90 is not set
 # CONFIG_AD2S1210 is not set
 
 #
@@ -5054,6 +5079,7 @@ CONFIG_COMMON_CLK_SI544=m
 # CONFIG_CLK_QORIQ is not set
 # CONFIG_COMMON_CLK_PWM is not set
 CONFIG_COMMON_CLK_VC5=m
+# CONFIG_COMMON_CLK_BD718XX is not set
 # CONFIG_HWSPINLOCK is not set
 
 #
@@ -5147,6 +5173,7 @@ CONFIG_DEVFREQ_GOV_USERSPACE=y
 # CONFIG_EXTCON is not set
 CONFIG_MEMORY=y
 # CONFIG_ARM_PL172_MPMC is not set
+CONFIG_PL353_SMC=y
 CONFIG_IIO=y
 CONFIG_IIO_BUFFER=y
 CONFIG_IIO_BUFFER_CB=m
@@ -5167,6 +5194,8 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2
 CONFIG_ADXL345=m
 CONFIG_ADXL345_I2C=m
 CONFIG_ADXL345_SPI=m
+# CONFIG_ADXL372_SPI is not set
+# CONFIG_ADXL372_I2C is not set
 # CONFIG_BMA180 is not set
 # CONFIG_BMA220 is not set
 # CONFIG_BMC150_ACCEL is not set
@@ -5196,6 +5225,7 @@ CONFIG_HID_SENSOR_ACCEL_3D=m
 #
 # Analog to digital converters
 #
+# CONFIG_AD7124 is not set
 # CONFIG_AD7266 is not set
 # CONFIG_AD7291 is not set
 # CONFIG_AD7298 is not set
@@ -5205,6 +5235,7 @@ CONFIG_HID_SENSOR_ACCEL_3D=m
 # CONFIG_AD7793 is not set
 # CONFIG_AD7887 is not set
 # CONFIG_AD7923 is not set
+# CONFIG_AD7949 is not set
 # CONFIG_AD799X is not set
 # CONFIG_CC10001_ADC is not set
 # CONFIG_CPCAP_ADC is not set
@@ -5222,6 +5253,7 @@ CONFIG_HID_SENSOR_ACCEL_3D=m
 # CONFIG_MAX9611 is not set
 # CONFIG_MCP320X is not set
 # CONFIG_MCP3422 is not set
+# CONFIG_MCP3911 is not set
 # CONFIG_NAU7802 is not set
 CONFIG_ROCKCHIP_SARADC=y
 # CONFIG_SD_ADC_MODULATOR is not set
@@ -5288,6 +5320,7 @@ CONFIG_HID_SENSOR_IIO_TRIGGER=m
 # CONFIG_AD5593R is not set
 # CONFIG_AD5504 is not set
 # CONFIG_AD5624R_SPI is not set
+# CONFIG_LTC1660 is not set
 # CONFIG_LTC2632 is not set
 CONFIG_AD5686=m
 CONFIG_AD5686_SPI=m
@@ -5308,6 +5341,7 @@ CONFIG_AD5758=m
 # CONFIG_MCP4922 is not set
 # CONFIG_TI_DAC082S085 is not set
 CONFIG_TI_DAC5571=m
+# CONFIG_TI_DAC7311 is not set
 # CONFIG_VF610_DAC is not set
 
 #
@@ -5417,6 +5451,7 @@ CONFIG_TSL2772=m
 # CONFIG_TSL4531 is not set
 # CONFIG_US5182D is not set
 # CONFIG_VCNL4000 is not set
+# CONFIG_VCNL4035 is not set
 # CONFIG_VEML6070 is not set
 # CONFIG_VL6180 is not set
 # CONFIG_ZOPT2201 is not set
@@ -5435,6 +5470,8 @@ CONFIG_HID_SENSOR_MAGNETOMETER_3D=m
 # CONFIG_IIO_ST_MAGN_3AXIS is not set
 # CONFIG_SENSORS_HMC5843_I2C is not set
 # CONFIG_SENSORS_HMC5843_SPI is not set
+# CONFIG_SENSORS_RM3100_I2C is not set
+# CONFIG_SENSORS_RM3100_SPI is not set
 
 #
 # Multiplexers
@@ -5463,6 +5500,7 @@ CONFIG_AD5272=m
 CONFIG_MCP4018=m
 # CONFIG_MCP4131 is not set
 # CONFIG_MCP4531 is not set
+# CONFIG_MCP41010 is not set
 # CONFIG_TPL0102 is not set
 
 #
@@ -5501,10 +5539,12 @@ CONFIG_ISL29501=m
 # CONFIG_SRF04 is not set
 # CONFIG_SX9500 is not set
 # CONFIG_SRF08 is not set
+# CONFIG_VL53L0X_I2C is not set
 
 #
 # Resolver to digital converters
 #
+# CONFIG_AD2S90 is not set
 # CONFIG_AD2S1200 is not set
 
 #
@@ -5531,6 +5571,7 @@ CONFIG_PWM_ROCKCHIP=y
 CONFIG_IRQCHIP=y
 CONFIG_ARM_GIC=y
 CONFIG_ARM_GIC_MAX_NR=1
+CONFIG_MADERA_IRQ=m
 # CONFIG_IPACK_BUS is not set
 CONFIG_ARCH_HAS_RESET_CONTROLLER=y
 CONFIG_RESET_CONTROLLER=y
@@ -5542,12 +5583,17 @@ CONFIG_RESET_CONTROLLER=y
 #
 CONFIG_GENERIC_PHY=y
 # CONFIG_BCM_KONA_USB2_PHY is not set
+# CONFIG_PHY_CADENCE_DP is not set
+# CONFIG_PHY_CADENCE_SIERRA is not set
+# CONFIG_PHY_FSL_IMX8MQ_USB is not set
 # CONFIG_PHY_PXA_28NM_HSIC is not set
 # CONFIG_PHY_PXA_28NM_USB2 is not set
 # CONFIG_PHY_CPCAP_USB is not set
 CONFIG_PHY_MAPPHONE_MDM6600=m
+# CONFIG_PHY_OCELOT_SERDES is not set
 CONFIG_PHY_ROCKCHIP_DP=y
 CONFIG_PHY_ROCKCHIP_EMMC=y
+# CONFIG_PHY_ROCKCHIP_INNO_HDMI is not set
 # CONFIG_PHY_ROCKCHIP_PCIE is not set
 # CONFIG_PHY_ROCKCHIP_TYPEC is not set
 CONFIG_PHY_ROCKCHIP_USB=y
@@ -5776,24 +5822,6 @@ CONFIG_PSTORE_CONSOLE=y
 CONFIG_PSTORE_RAM=y
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
-CONFIG_AUFS_FS=m
-CONFIG_AUFS_BRANCH_MAX_127=y
-# CONFIG_AUFS_BRANCH_MAX_511 is not set
-# CONFIG_AUFS_BRANCH_MAX_1023 is not set
-# CONFIG_AUFS_BRANCH_MAX_32767 is not set
-CONFIG_AUFS_SBILIST=y
-# CONFIG_AUFS_HNOTIFY is not set
-# CONFIG_AUFS_EXPORT is not set
-# CONFIG_AUFS_XATTR is not set
-# CONFIG_AUFS_FHSM is not set
-# CONFIG_AUFS_RDU is not set
-# CONFIG_AUFS_DIRREN is not set
-# CONFIG_AUFS_SHWH is not set
-# CONFIG_AUFS_BR_RAMFS is not set
-# CONFIG_AUFS_BR_FUSE is not set
-CONFIG_AUFS_BR_HFSPLUS=y
-CONFIG_AUFS_BDEV_LOOP=y
-# CONFIG_AUFS_DEBUG is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=y
 CONFIG_NFS_V2=y
@@ -5975,7 +6003,6 @@ CONFIG_CRYPTO_NULL2=y
 CONFIG_CRYPTO_PCRYPT=m
 CONFIG_CRYPTO_WORKQUEUE=y
 CONFIG_CRYPTO_CRYPTD=m
-CONFIG_CRYPTO_MCRYPTD=m
 CONFIG_CRYPTO_AUTHENC=y
 CONFIG_CRYPTO_TEST=m
 
@@ -6002,9 +6029,11 @@ CONFIG_CRYPTO_CTR=y
 CONFIG_CRYPTO_CTS=m
 CONFIG_CRYPTO_ECB=y
 CONFIG_CRYPTO_LRW=m
+# CONFIG_CRYPTO_OFB is not set
 CONFIG_CRYPTO_PCBC=m
 CONFIG_CRYPTO_XTS=m
 CONFIG_CRYPTO_KEYWRAP=m
+# CONFIG_CRYPTO_ADIANTUM is not set
 
 #
 # Hash modes
@@ -6034,6 +6063,7 @@ CONFIG_CRYPTO_SHA256=y
 CONFIG_CRYPTO_SHA512=y
 CONFIG_CRYPTO_SHA3=m
 CONFIG_CRYPTO_SM3=m
+# CONFIG_CRYPTO_STREEBOG is not set
 CONFIG_CRYPTO_TGR192=m
 CONFIG_CRYPTO_WP512=m
 
@@ -6087,6 +6117,7 @@ CONFIG_CRYPTO_USER_API_HASH=m
 CONFIG_CRYPTO_USER_API_SKCIPHER=m
 CONFIG_CRYPTO_USER_API_RNG=m
 CONFIG_CRYPTO_USER_API_AEAD=m
+# CONFIG_CRYPTO_STATS is not set
 CONFIG_CRYPTO_HASH_INFO=y
 CONFIG_CRYPTO_HW=y
 CONFIG_CRYPTO_DEV_ROCKCHIP=m
@@ -6094,6 +6125,7 @@ CONFIG_CRYPTO_DEV_CCREE=m
 CONFIG_ASYMMETRIC_KEY_TYPE=y
 CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y
 CONFIG_X509_CERTIFICATE_PARSER=y
+# CONFIG_PKCS8_PRIVATE_KEY_PARSER is not set
 CONFIG_PKCS7_MESSAGE_PARSER=y
 # CONFIG_PKCS7_TEST_KEY is not set
 # CONFIG_SIGNED_PE_FILE_VERIFICATION is not set
@@ -6112,6 +6144,7 @@ CONFIG_BINARY_PRINTF=y
 # Library routines
 #
 CONFIG_RAID6_PQ=y
+CONFIG_RAID6_PQ_BENCHMARK=y
 CONFIG_BITREVERSE=y
 CONFIG_HAVE_ARCH_BITREVERSE=y
 CONFIG_RATIONAL=y
@@ -6179,6 +6212,7 @@ CONFIG_HAS_DMA=y
 CONFIG_NEED_SG_DMA_LENGTH=y
 CONFIG_NEED_DMA_MAP_STATE=y
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_DMA_REMAP=y
 CONFIG_SGL_ALLOC=y
 CONFIG_CPU_RMAP=y
 CONFIG_DQL=y
@@ -6197,7 +6231,6 @@ CONFIG_FONT_SUPPORT=y
 CONFIG_FONT_8x8=y
 CONFIG_FONT_8x16=y
 CONFIG_SG_POOL=y
-CONFIG_ARCH_HAS_SG_CHAIN=y
 CONFIG_STACKDEPOT=y
 CONFIG_SBITMAP=y
 # CONFIG_STRING_SELFTEST is not set
@@ -6230,6 +6263,7 @@ CONFIG_DEBUG_FS=y
 # CONFIG_HEADERS_CHECK is not set
 # CONFIG_DEBUG_SECTION_MISMATCH is not set
 CONFIG_SECTION_MISMATCH_WARN_ONLY=y
+CONFIG_ARCH_WANT_FRAME_POINTERS=y
 CONFIG_FRAME_POINTER=y
 # CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
 CONFIG_MAGIC_SYSRQ=y
@@ -6257,6 +6291,7 @@ CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y
 # CONFIG_DEBUG_MEMORY_INIT is not set
 # CONFIG_DEBUG_PER_CPU_MAPS is not set
 # CONFIG_DEBUG_HIGHMEM is not set
+CONFIG_CC_HAS_KASAN_GENERIC=y
 CONFIG_ARCH_HAS_KCOV=y
 CONFIG_CC_HAS_SANCOV_TRACE_PC=y
 # CONFIG_KCOV is not set
@@ -6376,8 +6411,8 @@ CONFIG_STRICT_DEVMEM=y
 # CONFIG_IO_STRICT_DEVMEM is not set
 # CONFIG_ARM_PTDUMP_DEBUGFS is not set
 # CONFIG_DEBUG_WX is not set
-CONFIG_ARM_UNWIND=y
-CONFIG_OLD_MCOUNT=y
+CONFIG_UNWINDER_FRAME_POINTER=y
+# CONFIG_UNWINDER_ARM is not set
 # CONFIG_DEBUG_USER is not set
 # CONFIG_DEBUG_LL is not set
 CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S"

config/sources/rockchip.conf

@@ -39,7 +39,7 @@ case $BRANCH in
 
 	dev)
 	KERNELSOURCE=$MAINLINE_KERNEL_SOURCE
-	KERNELBRANCH='branch:linux-4.20.y'
+	KERNELBRANCH='branch:master'
 	KERNELDIR=$MAINLINE_KERNEL_DIR
 
 	KERNEL_USE_GCC='> 7.0'

patch/kernel/rockchip-dev/0011-mali-kbase-v4.20-to-v5.0-rc2-changes.patch

@@ -0,0 +1,135 @@
+From c797a2ed95d500c1f7750a0703cff5ca2ed0af29 Mon Sep 17 00:00:00 2001
+From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
+Date: Sun, 20 Jan 2019 22:56:14 +0100
+Subject: [PATCH] mali: kbase: v4.20 to v5.0-rc2 changes
+
+The following changes are due to the following kernel changes :
+* totalram_pages()
+  mm: convert totalram_pages and totalhigh_pages variables to atomic
+  https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=ca79b0c211af63fa3276f0e3fd7dd9ada2439839
+  Kernel 5.0-rc1
+
+* reservation_object_reserve_shared(obj, 1)
+  dma-buf: allow reserving more than one shared fence slot
+  https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=ca05359f1e64cf8303ee532e50efe4ab7563d4a9
+  Kernel 5.0-rc1
+
+* vmf_insert_pfn
+  mm: remove vm_insert_pfn()
+  https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/include/linux/mm.h?id=ae2b01f37044c10e975d22116755df56252b09d8
+  Kernel 4.20-rc1
+
+Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
+---
+ drivers/gpu/arm/midgard/mali_kbase_dma_fence.c |  2 +-
+ drivers/gpu/arm/midgard/mali_kbase_gpuprops.c  |  2 +-
+ drivers/gpu/arm/midgard/mali_kbase_mem_linux.c | 27 +++++++++++++-------------
+ 3 files changed, 16 insertions(+), 15 deletions(-)
+
+diff --git a/drivers/gpu/arm/midgard/mali_kbase_dma_fence.c b/drivers/gpu/arm/midgard/mali_kbase_dma_fence.c
+index 9197743c8..a65a1fa18 100644
+--- a/drivers/gpu/arm/midgard/mali_kbase_dma_fence.c
++++ b/drivers/gpu/arm/midgard/mali_kbase_dma_fence.c
+@@ -342,7 +342,7 @@ int kbase_dma_fence_wait(struct kbase_jd_atom *katom,
+ 		struct reservation_object *obj = info->resv_objs[i];
+ 
+ 		if (!test_bit(i, info->dma_fence_excl_bitmap)) {
+-			err = reservation_object_reserve_shared(obj);
++			err = reservation_object_reserve_shared(obj, 1);
+ 			if (err) {
+ 				dev_err(katom->kctx->kbdev->dev,
+ 					"Error %d reserving space for shared fence.\n", err);
+diff --git a/drivers/gpu/arm/midgard/mali_kbase_gpuprops.c b/drivers/gpu/arm/midgard/mali_kbase_gpuprops.c
+index baf3c491c..e985d0a94 100644
+--- a/drivers/gpu/arm/midgard/mali_kbase_gpuprops.c
++++ b/drivers/gpu/arm/midgard/mali_kbase_gpuprops.c
+@@ -242,7 +242,7 @@ static void kbase_gpuprops_calculate_props(base_gpu_props * const gpu_props, str
+ 	/* Populate the base_gpu_props structure */
+ 	kbase_gpuprops_update_core_props_gpu_id(gpu_props);
+ 	gpu_props->core_props.log2_program_counter_size = KBASE_GPU_PC_SIZE_LOG2;
+-	gpu_props->core_props.gpu_available_memory_size = totalram_pages << PAGE_SHIFT;
++	gpu_props->core_props.gpu_available_memory_size = totalram_pages() << PAGE_SHIFT;
+ 
+ 	for (i = 0; i < BASE_GPU_NUM_TEXTURE_FEATURES_REGISTERS; i++)
+ 		gpu_props->core_props.texture_features[i] = gpu_props->raw_props.texture_features[i];
+diff --git a/drivers/gpu/arm/midgard/mali_kbase_mem_linux.c b/drivers/gpu/arm/midgard/mali_kbase_mem_linux.c
+index 896aa3528..e36eeeec1 100644
+--- a/drivers/gpu/arm/midgard/mali_kbase_mem_linux.c
++++ b/drivers/gpu/arm/midgard/mali_kbase_mem_linux.c
+@@ -1791,8 +1791,10 @@ KBASE_EXPORT_TEST_API(kbase_cpu_vm_close);
+ #if (LINUX_VERSION_CODE < KERNEL_VERSION(4, 11, 0))
+ static int kbase_cpu_vm_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
+ {
+-#else
++#elif (LINUX_VERSION_CODE < KERNEL_VERSION(4, 19, 0))
+ static int kbase_cpu_vm_fault(struct vm_fault *vmf)
++#else
++static vm_fault_t kbase_cpu_vm_fault(struct vm_fault *vmf)
+ {
+ 	struct vm_area_struct *vma = vmf->vma;
+ #endif
+@@ -1800,6 +1802,7 @@ static int kbase_cpu_vm_fault(struct vm_fault *vmf)
+ 	pgoff_t rel_pgoff;
+ 	size_t i;
+ 	pgoff_t addr;
++	vm_fault_t ret = VM_FAULT_NOPAGE;
+ 
+ 	KBASE_DEBUG_ASSERT(map);
+ 	KBASE_DEBUG_ASSERT(map->count > 0);
+@@ -1810,11 +1813,11 @@ static int kbase_cpu_vm_fault(struct vm_fault *vmf)
+ 
+ 	kbase_gpu_vm_lock(map->kctx);
+ 	if (rel_pgoff >= map->alloc->nents)
+-		goto locked_bad_fault;
++		goto out;
+ 
+ 	/* Fault on access to DONT_NEED regions */
+ 	if (map->alloc->reg && (map->alloc->reg->flags & KBASE_REG_DONT_NEED))
+-		goto locked_bad_fault;
++		goto out;
+ 
+ 	/* insert all valid pages from the fault location */
+ 	i = rel_pgoff;
+@@ -1824,21 +1827,18 @@ static int kbase_cpu_vm_fault(struct vm_fault *vmf)
+ 	addr = (pgoff_t)(vmf->address >> PAGE_SHIFT);
+ #endif
+ 	while (i < map->alloc->nents && (addr < vma->vm_end >> PAGE_SHIFT)) {
+-		int ret = vm_insert_pfn(vma, addr << PAGE_SHIFT,
++		ret = vmf_insert_pfn(vma, addr << PAGE_SHIFT,
+ 		    PFN_DOWN(as_phys_addr_t(map->alloc->pages[i])));
+-		if (ret < 0 && ret != -EBUSY)
+-			goto locked_bad_fault;
++		if (ret != VM_FAULT_NOPAGE) // It's either OOM or SIGBUS
++			goto out;
+ 
+ 		i++; addr++;
+ 	}
+ 
++out:
+ 	kbase_gpu_vm_unlock(map->kctx);
+ 	/* we resolved it, nothing for VM to do */
+-	return VM_FAULT_NOPAGE;
+-
+-locked_bad_fault:
+-	kbase_gpu_vm_unlock(map->kctx);
+-	return VM_FAULT_SIGBUS;
++	return ret;
+ }
+ 
+ const struct vm_operations_struct kbase_vm_ops = {
+@@ -1907,9 +1907,10 @@ static int kbase_cpu_mmap(struct kbase_va_region *reg, struct vm_area_struct *vm
+ 			phys_addr_t phys;
+ 
+ 			phys = as_phys_addr_t(page_array[i + start_off]);
+-			err = vm_insert_pfn(vma, addr, PFN_DOWN(phys));
+-			if (WARN_ON(err))
++			if (WARN_ON(vmf_insert_pfn(vma, addr, PFN_DOWN(phys)) != VM_FAULT_NOPAGE)) {
++				err = -ENOMEM;
+ 				break;
++			}
+ 
+ 			addr += PAGE_SIZE;
+ 		}
+-- 
+2.16.4
+

patch/kernel/rockchip-dev/1013-ARM-DTS-rk3288-tinker-Enabling-SDIO-and-Wifi.patch

@@ -0,0 +1,98 @@
+From d5d5c53173c484a13cda62a537cbf75a5df4b0e4 Mon Sep 17 00:00:00 2001
+From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
+Date: Mon, 5 Nov 2018 21:58:56 +0100
+Subject: [PATCH] ARM: DTS: rk3288-tinker: Enabling SDIO and Wifi
+
+Adding the appropriate nodes in order to exploit the WiFi capabilities
+of the board.
+Since these capabilities are provided through SDIO, and the SDIO
+nodes were not defined, these were added too.
+
+These seems to depend on each other so they are added in one big
+patch.
+
+Split if necessary.
+
+Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
+---
+ arch/arm/boot/dts/rk3288-tinker.dts | 62 +++++++++++++++++++++++++++++++++++++
+ 1 file changed, 62 insertions(+)
+
+diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
+index 1e43527aa..d4df13bed 100644
+--- a/arch/arm/boot/dts/rk3288-tinker.dts
++++ b/arch/arm/boot/dts/rk3288-tinker.dts
+@@ -6,8 +6,70 @@
+ /dts-v1/;
+ 
+ #include "rk3288-tinker.dtsi"
++#include <dt-bindings/clock/rockchip,rk808.h>
+ 
+ / {
+ 	model = "Rockchip RK3288 Asus Tinker Board";
+ 	compatible = "asus,rk3288-tinker", "rockchip,rk3288";
++
++	/* This is essential to get SDIO devices working.
++	   The Wifi depends on SDIO ! */
++	sdio_pwrseq: sdio-pwrseq {
++		compatible = "mmc-pwrseq-simple";
++		clocks = <&rk808 RK808_CLKOUT1>;
++		clock-names = "ext_clock";
++		pinctrl-names = "default";
++		pinctrl-0 = <&chip_enable_h>, <&wifi_enable_h>;
++
++		/*
++		 * On the module itself this is one of these (depending
++		 * on the actual card populated):
++		 * - SDIO_RESET_L_WL_REG_ON
++		 * - PDN (power down when low)
++		 */
++		reset-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>, <&gpio4 27 GPIO_ACTIVE_LOW>;
++	};
++
++	wireless-wlan {
++		compatible = "wlan-platdata";
++		rockchip,grf = <&grf>;
++		sdio_vref = <1800>;
++		status = "okay";
++		wifi_chip_type = "8723bs";
++		WIFI,host_wake_irq = <&gpio4 30 GPIO_ACTIVE_HIGH>;
++	};
++};
++
++&io_domains {
++	wifi-supply = <&vcc_18>;
++};
++
++&pinctrl {
++	sdio-pwrseq {
++		wifi_enable_h: wifienable-h {
++			rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_none>;
++		};
++
++		chip_enable_h: chip-enable-h {
++			rockchip,pins = <4 27 RK_FUNC_GPIO &pcfg_pull_none>;
++		};
++	};
++};
++
++&sdio0 {
++	bus-width = <4>;
++	cap-sd-highspeed;
++	cap-sdio-irq;
++	clock-frequency = <50000000>;
++	clock-freq-min-max = <200000 50000000>;
++	disable-wp;
++	keep-power-in-suspend;
++	mmc-pwrseq = <&sdio_pwrseq>;
++	non-removable;
++	num-slots = <1>;
++	pinctrl-names = "default";
++	pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
++	sd-uhs-sdr104;
++	status = "okay";
++	supports-sdio;
+ };
+-- 
+2.16.4
+

patch/kernel/rockchip-dev/1014-ARM-DTS-rk3288-tinker-Setup-the-Bluetooth-UART-pins.patch

@@ -0,0 +1,62 @@
+From 2c2e60256f2cbb2fce50a6317f85b1500efd1a6c Mon Sep 17 00:00:00 2001
+From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
+Date: Mon, 5 Nov 2018 22:03:26 +0100
+Subject: [PATCH] ARM: DTS: rk3288-tinker: Setup the Bluetooth UART pins
+
+The most essential being the RTS pin, which is clearly needed to
+upload the initial configuration into the Realtek Bluetooth
+chip, and make the Bluetooth chip work.
+
+Now, the Bluetooth chip also needs 3 other GPIOS to be enabled.
+I'll see how I do that through the DTS file in a near future.
+
+The 3 GPIOS being :
+Bluetooth Reset : <&gpio4 29 GPIO_ACTIVE_HIGH>
+Bluetooth Wake  : <&gpio4 26 GPIO_ACTIVE_HIGH>
+Bluetooth Wake_Host_IRQ : <&gpio4 31 GPIO_ACTIVE_HIGH>
+
+These are currently setup manually, through scripts. But it seems that
+GPIO handling through /sys entries might not be possible in the long
+term, the replacement being libgpio.
+Anyway, if you're interesting in enabling the Bluetooth GPIO by hand,
+here are the commands :
+
+cd /sys/class/gpio &&
+echo 146 > export &&
+echo 149 > export &&
+echo 151 > export &&
+echo high > gpio146/direction &&
+echo high > gpio149/direction &&
+echo high > gpio151/direction
+
+Resetting the chip is done like this :
+
+echo "Resetting the Bluetooth chip"
+cd /sys/class/gpio/gpio149 &&
+echo 0 > value &&
+sleep 1 &&
+echo 1 > value &&
+sleep 1
+
+Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
+---
+ arch/arm/boot/dts/rk3288-tinker.dts | 6 ++++++
+ 1 file changed, 6 insertions(+)
+
+diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
+index d4df13bed..b92e59c1e 100644
+--- a/arch/arm/boot/dts/rk3288-tinker.dts
++++ b/arch/arm/boot/dts/rk3288-tinker.dts
+@@ -73,3 +73,9 @@
+ 	status = "okay";
+ 	supports-sdio;
+ };
++
++&uart0 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&uart0_xfer>, <&uart0_cts>, <&uart0_rts>;
++};
++
+-- 
+2.16.4
+

patch/kernel/rockchip-dev/1015-ARM-DTSI-rk3288-tinker-Improving-the-CPU-max-voltage.patch

@@ -0,0 +1,28 @@
+From ebc29962ac27264772a4227f5abd6900cb72fa79 Mon Sep 17 00:00:00 2001
+From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
+Date: Mon, 5 Nov 2018 20:16:05 +0100
+Subject: [PATCH] ARM: DTSI: rk3288-tinker: Improving the CPU max voltage
+
+Taken from the various patches provided by @TonyMac32 .
+
+Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
+---
+ arch/arm/boot/dts/rk3288-tinker.dtsi | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm/boot/dts/rk3288-tinker.dtsi b/arch/arm/boot/dts/rk3288-tinker.dtsi
+index aa107ee41..3da1c830f 100644
+--- a/arch/arm/boot/dts/rk3288-tinker.dtsi
++++ b/arch/arm/boot/dts/rk3288-tinker.dtsi
+@@ -164,7 +164,7 @@
+ 				regulator-always-on;
+ 				regulator-boot-on;
+ 				regulator-min-microvolt = <750000>;
+-				regulator-max-microvolt = <1350000>;
++				regulator-max-microvolt = <1450000>;
+ 				regulator-name = "vdd_arm";
+ 				regulator-ramp-delay = <6000>;
+ 				regulator-state-mem {
+-- 
+2.16.4
+

patch/kernel/rockchip-dev/1016-ARM-DTSI-rk3288-tinker-Setting-up-the-SD-regulators.patch

@@ -0,0 +1,31 @@
+From 3dacea70a8e434008f5b1f119a7f7da9aebc772c Mon Sep 17 00:00:00 2001
+From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
+Date: Mon, 5 Nov 2018 20:18:58 +0100
+Subject: [PATCH] ARM: DTSI: rk3288-tinker: Setting up the SD regulators
+
+Some are needed and some are not. Playing with these parameters is
+required to get reboot working on these boards.
+
+I still can't believe that these boards can't soft reset correctly.
+
+Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
+---
+ arch/arm/boot/dts/rk3288-tinker.dtsi | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/arch/arm/boot/dts/rk3288-tinker.dtsi b/arch/arm/boot/dts/rk3288-tinker.dtsi
+index 3da1c830f..dd1090728 100644
+--- a/arch/arm/boot/dts/rk3288-tinker.dtsi
++++ b/arch/arm/boot/dts/rk3288-tinker.dtsi
+@@ -254,6 +254,8 @@
+ 			};
+ 
+ 			vccio_sd: LDO_REG5 {
++				regulator-always-on;
++				regulator-boot-on;
+ 				regulator-min-microvolt = <1800000>;
+ 				regulator-max-microvolt = <3300000>;
+ 				regulator-name = "vccio_sd";
+-- 
+2.16.4
+

patch/kernel/rockchip-dev/1017-ARM-DTS-rk3288-tinker-Defined-the-I2C-interfaces.patch

@@ -0,0 +1,53 @@
+From a72e0749acad92df7b854e38e97e1dc7b4799abe Mon Sep 17 00:00:00 2001
+From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
+Date: Mon, 5 Nov 2018 22:11:24 +0100
+Subject: [PATCH] ARM: DTS: rk3288-tinker: Defined the I2C interfaces
+
+And all the hardware behind.
+
+Taken from @TonyMac32, Butchered by @Miouyouyou .
+
+Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
+---
+ arch/arm/boot/dts/rk3288-tinker.dts | 25 +++++++++++++++++++++++++
+ 1 file changed, 25 insertions(+)
+
+diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
+index b92e59c1e..96d05fc6b 100644
+--- a/arch/arm/boot/dts/rk3288-tinker.dts
++++ b/arch/arm/boot/dts/rk3288-tinker.dts
+@@ -40,6 +40,31 @@
+ 	};
+ };
+ 
++&i2c1 {
++	status = "okay";
++};
++
++&i2c2 {
++	afc0:af-controller@0 {
++		status = "okay";
++		compatible = "silicon touch,vm149C-v4l2-i2c-subdev";
++		reg = <0x0 0x0c>;
++	};
++
++	eeprom:m24c08@50 {
++		compatible = "at,24c08";
++		reg = <0x50>;
++	};
++};
++
++&i2c3 {
++	status = "okay";
++};
++
++&i2c4 {
++	status = "okay";
++};
++
+ &io_domains {
+ 	wifi-supply = <&vcc_18>;
+ };
+-- 
+2.16.4
+

patch/kernel/rockchip-dev/1018-ARM-DTS-rk3288-tinker-Defining-the-SPI-interface.patch

@@ -0,0 +1,50 @@
+From b24b8f83e150811ad54ee2a4843e44cd1421fafa Mon Sep 17 00:00:00 2001
+From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
+Date: Mon, 5 Nov 2018 22:15:14 +0100
+Subject: [PATCH] ARM: DTS: rk3288-tinker: Defining the SPI interface
+
+Taken from, and tested by @TonyMac32 .
+
+Well, the original one was tested by him but I had to adapt the
+registers definitions to the new 64-bits LPAE-compliant syntax.
+
+Therefore that *might* break, along with a few other patches.
+
+Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
+---
+ arch/arm/boot/dts/rk3288-tinker.dts | 19 +++++++++++++++++++
+ 1 file changed, 19 insertions(+)
+
+diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
+index 96d05fc6b..17bfea298 100644
+--- a/arch/arm/boot/dts/rk3288-tinker.dts
++++ b/arch/arm/boot/dts/rk3288-tinker.dts
+@@ -99,6 +99,25 @@
+ 	supports-sdio;
+ };
+ 
++&spi2 {
++	max-freq = <50000000>;
++	status = "okay";
++
++	spidev@0 {
++		compatible = "rockchip,spi_tinker";
++		reg = <0x0 0>;
++		spi-max-frequency = <50000000>;
++		spi-cpha = <1>;
++	};
++
++	spidev@1 {
++		compatible = "rockchip,spi_tinker";
++		reg = <0x1>;
++		spi-max-frequency = <50000000>;
++		spi-cpha = <1>;
++	};
++};
++
+ &uart0 {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&uart0_xfer>, <&uart0_cts>, <&uart0_rts>;
+-- 
+2.16.4
+

patch/kernel/rockchip-dev/1019-ARM-DTSI-rk3288-tinker-Defining-SDMMC-properties.patch

@@ -0,0 +1,33 @@
+From 487db7cefc9861fdaf30579c378a98f0360690ae Mon Sep 17 00:00:00 2001
+From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
+Date: Mon, 5 Nov 2018 20:27:14 +0100
+Subject: [PATCH] ARM: DTSI: rk3288-tinker: Defining SDMMC properties
+
+I never knew if these properties were required to fix the dreaded
+reboot issue...
+
+Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
+---
+ arch/arm/boot/dts/rk3288-tinker.dtsi | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+diff --git a/arch/arm/boot/dts/rk3288-tinker.dtsi b/arch/arm/boot/dts/rk3288-tinker.dtsi
+index dd1090728..8edd6f681 100644
+--- a/arch/arm/boot/dts/rk3288-tinker.dtsi
++++ b/arch/arm/boot/dts/rk3288-tinker.dtsi
+@@ -436,7 +436,12 @@
+ 	disable-wp;			/* wp not hooked up */
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
++	sd-uhs-sdr12;
++	sd-uhs-sdr25;
++	sd-uhs-sdr50;
++	sd-uhs-sdr104;
+ 	status = "okay";
++	supports-sd;
+ 	vmmc-supply = <&vcc33_sd>;
+ 	vqmmc-supply = <&vccio_sd>;
+ };
+-- 
+2.16.4
+

patch/kernel/rockchip-dev/1020-ARM-DTSI-rk3288-Set-the-VPU-MMU-power-domains.patch

@@ -35,14 +35,6 @@ diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
 index 45ec4e89..46e1b8e2 100644
 --- a/arch/arm/boot/dts/rk3288.dtsi
 +++ b/arch/arm/boot/dts/rk3288.dtsi
-@@ -1230,6 +1230,7 @@
- 		interrupt-names = "vpu_mmu";
- 		clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>;
- 		clock-names = "aclk", "iface";
-+		power-domains = <&power RK3288_PD_VIDEO>;
- 		#iommu-cells = <0>;
- 		status = "disabled";
- 	};
 @@ -1262,6 +1263,7 @@
  		interrupt-names = "hevc_mmu";
  		clocks = <&cru ACLK_HEVC>, <&cru HCLK_HEVC>;

patch/kernel/rockchip-dev/1022-dts-rk3288-veyron-chromebook-dedicate-npll-to-VOP0-H.patch

@@ -0,0 +1,106 @@
+From 033f95ca5c233999a1c13f62b41bfd5b730fbba2 Mon Sep 17 00:00:00 2001
+From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
+Date: Sat, 29 Sep 2018 02:46:31 +0200
+Subject: [PATCH 3/6] dts: rk3288-veyron-chromebook: dedicate npll to VOP0/HDMI
+ + HDMI rates
+
+This patch is taken from Urja Rannikko ( @urjaman ) patchset here :
+https://github.com/urjaman/arch-c201/blob/master/linux-c201/0020-RK3288-HDMI-clock-hacks-combined.patch
+https://www.spinics.net/lists/arm-kernel/msg673156.html
+
+This adds special HDMI PLL rates used by Veyron Chromebooks, such as
+the ASUS C201.
+
+Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
+---
+ arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi | 67 +++++++++++++++++++++++++
+ 1 file changed, 67 insertions(+)
+
+diff --git a/arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi b/arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi
+index b54746df3..e6a9f3fa5 100644
+--- a/arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi
++++ b/arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi
+@@ -126,6 +126,25 @@
+ 	};
+ };
+ 
++&cru {
++	/* Dedicate NPLL for VOP0 / VOP_BIG for HDMI. */
++	rockchip,npll-for-vop = <0>;
++	/* The first assigned clocks are DCLK_VOP0 and DCLK_VOP1 */
++	assigned-clock-parents = <&cru PLL_NPLL>, <&cru PLL_GPLL>;
++};
++
++/* Delete the nodes that allow non-desirable VOP - connector links. That
++ * is the eDP cannot use vopb and HDMI cannot use vopl. */
++
++/delete-node/ &edp_in_vopb;
++/delete-node/ &vopb_out_edp;
++/delete-node/ &hdmi_in_vopl;
++/delete-node/ &vopl_out_hdmi;
++
++/* Delete the 500 Mhz GPU opp since that cannot be easily made
++ * without NPLL. */
++/delete-node/ &{/gpu-opp-table/opp@500000000};
++
+ &edp {
+ 	status = "okay";
+ 
+@@ -149,6 +168,54 @@
+ 	status = "okay";
+ };
+ 
++&hdmi {
++	/* These depend on NPLL being dedicated to HDMI use. */
++	rockchip,hdmi-rates-hz = <
++		25176471	/* for 25.175 MHz, 0.006% off */
++		25200000
++		27000000
++		28320000
++		30240000
++		31500000
++		32000000
++		33750000
++		36000000
++		40000000
++		49500000
++		50000000
++		54000000
++		57290323	/* for 57.284 MHz, .011 % off */
++		65000000
++		68250000
++		71000000
++		72000000
++		73250000
++		74250000
++		74437500	/* for 74.44 MHz, .003% off */
++		75000000
++		78750000
++		78800000
++		79500000
++		83500000
++		85500000
++		88750000
++		97750000
++		101000000
++		106500000
++		108000000
++		115500000
++		118666667	/* for 118.68 MHz, .011% off */
++		119000000
++		121714286	/* for 121.75 MHz, .029% off */
++		135000000
++		136800000	/* for 136.75 MHz, .037% off */
++		146250000
++		148500000
++		154000000
++		162000000 >;
++};
++
++
+ &gpio_keys {
+ 	pinctrl-0 = <&pwr_key_l &ap_lid_int_l>;
+ 	lid {
+-- 
+2.16.4
+

patch/kernel/rockchip-dev/1023-dts-rk3288-support-for-dedicating-npll-to-a-vop.patch

@@ -0,0 +1,46 @@
+From 4ab4f88649468dada5d609e1a6f8a71a7d5610c9 Mon Sep 17 00:00:00 2001
+From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
+Date: Sat, 29 Sep 2018 02:48:59 +0200
+Subject: [PATCH 4/6] dts: rk3288: support for dedicating npll to a vop
+
+This patch is taken from Urja Rannikko ( @urjaman ) patchset here :
+https://github.com/urjaman/arch-c201/blob/master/linux-c201/0020-RK3288-HDMI-clock-hacks-combined.patch
+https://www.spinics.net/lists/arm-kernel/msg673156.html
+
+The original description was :
+
+    Add the VOP DCLKs to the assigned clocks list so their
+    parents can be set in the dts include files for
+    devices that do dedicate npll to a vop.
+
+https://www.spinics.net/lists/arm-kernel/msg673162.html
+
+Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
+---
+ arch/arm/boot/dts/rk3288.dtsi | 6 ++++--
+ 1 file changed, 4 insertions(+), 2 deletions(-)
+
+diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
+index d23c7fa55..ff04aab5e 100644
+--- a/arch/arm/boot/dts/rk3288.dtsi
++++ b/arch/arm/boot/dts/rk3288.dtsi
+@@ -867,12 +867,14 @@
+ 		rockchip,grf = <&grf>;
+ 		#clock-cells = <1>;
+ 		#reset-cells = <1>;
+-		assigned-clocks = <&cru PLL_GPLL>, <&cru PLL_CPLL>,
++		assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>,
++				  <&cru PLL_GPLL>, <&cru PLL_CPLL>,
+ 				  <&cru PLL_NPLL>, <&cru ACLK_CPU>,
+ 				  <&cru HCLK_CPU>, <&cru PCLK_CPU>,
+ 				  <&cru ACLK_PERI>, <&cru HCLK_PERI>,
+ 				  <&cru PCLK_PERI>;
+-		assigned-clock-rates = <594000000>, <400000000>,
++		assigned-clock-rates = <0>, <0>,
++				       <594000000>, <400000000>,
+ 				       <500000000>, <300000000>,
+ 				       <150000000>, <75000000>,
+ 				       <300000000>, <150000000>,
+-- 
+2.16.4
+

patch/kernel/rockchip-dev/1024-arm-dts-veyron-Added-a-flag-to-disable-cache-flush-d.patch

@@ -0,0 +1,32 @@
+From 9177b30ab083dbda2bede3b3d61ef71ad4b1ffe0 Mon Sep 17 00:00:00 2001
+From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
+Date: Thu, 1 Nov 2018 21:31:26 +0100
+Subject: [PATCH 2/2] arm: dts: veyron: Added a flag to disable cache flush
+ during reset
+
+Flushing the MMC cache of ASUS Chromebooks during initialization or
+"recovery" generates 10 minutes hangup, according to @SolidHal.
+
+This is an adaptation of @SolidHal, in order to pinpoint the fix to
+Veyron Chromebooks, and avoiding issues other RK3288 boards.
+
+Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
+---
+ arch/arm/boot/dts/rk3288-veyron.dtsi | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm/boot/dts/rk3288-veyron.dtsi b/arch/arm/boot/dts/rk3288-veyron.dtsi
+index 2075120cf..fa4951fd7 100644
+--- a/arch/arm/boot/dts/rk3288-veyron.dtsi
++++ b/arch/arm/boot/dts/rk3288-veyron.dtsi
+@@ -123,6 +123,7 @@
+ 	mmc-hs200-1_8v;
+ 	mmc-pwrseq = <&emmc_pwrseq>;
+ 	non-removable;
++	no-recovery-cache-flush;
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
+ };
+-- 
+2.16.4
+

patch/kernel/rockchip-dev/2007-drivers-wifi-ath9k-reverse-do-not-use-bulk-on-EP3-and-EP4.patch

@@ -0,0 +1,101 @@
+FROM: Solidhal <hal@halemmerich.com>
+
+This patch reverses commit 2b721118b7821107757eb1d37af4b60e877b27e7, as can bee seen here:
+https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=2b721118b7821107757eb1d37af4b60e877b27e7
+
+This commit caused issues on veyron speedy with ath9k and dwc2 drivers. Any ath9k device (ar9271) 
+would intermittently work, most of the time ending in errors as can bee seen here:
+https://github.com/SolidHal/PrawnOS/issues/38
+This commit fixes that issue.
+This is only a temporary work around while a permenant fix is found, as this commit seems to only cause issues
+with dwc2
+
+diff --git a/drivers/net/wireless/ath/ath9k/hif_usb.c b/drivers/net/wireless/ath/ath9k/hif_usb.c
+--- b/drivers/net/wireless/ath/ath9k/hif_usb.c
++++ a/drivers/net/wireless/ath/ath9k/hif_usb.c
+@@ -115,10 +115,10 @@
+ 	cmd->skb = skb;
+ 	cmd->hif_dev = hif_dev;
+ 
++	usb_fill_bulk_urb(urb, hif_dev->udev,
++			 usb_sndbulkpipe(hif_dev->udev, USB_REG_OUT_PIPE),
+-	usb_fill_int_urb(urb, hif_dev->udev,
+-			 usb_sndintpipe(hif_dev->udev, USB_REG_OUT_PIPE),
+ 			 skb->data, skb->len,
++			 hif_usb_regout_cb, cmd);
+-			 hif_usb_regout_cb, cmd, 1);
+ 
+ 	usb_anchor_urb(urb, &hif_dev->regout_submitted);
+ 	ret = usb_submit_urb(urb, GFP_KERNEL);
+@@ -723,11 +723,11 @@
+ 			return;
+ 		}
+ 
++		usb_fill_bulk_urb(urb, hif_dev->udev,
++				 usb_rcvbulkpipe(hif_dev->udev,
+-		usb_fill_int_urb(urb, hif_dev->udev,
+-				 usb_rcvintpipe(hif_dev->udev,
+ 						 USB_REG_IN_PIPE),
+ 				 nskb->data, MAX_REG_IN_BUF_SIZE,
++				 ath9k_hif_usb_reg_in_cb, nskb);
+-				 ath9k_hif_usb_reg_in_cb, nskb, 1);
+ 	}
+ 
+ resubmit:
+@@ -909,11 +909,11 @@
+ 			goto err_skb;
+ 		}
+ 
++		usb_fill_bulk_urb(urb, hif_dev->udev,
++				  usb_rcvbulkpipe(hif_dev->udev,
+-		usb_fill_int_urb(urb, hif_dev->udev,
+-				  usb_rcvintpipe(hif_dev->udev,
+ 						  USB_REG_IN_PIPE),
+ 				  skb->data, MAX_REG_IN_BUF_SIZE,
++				  ath9k_hif_usb_reg_in_cb, skb);
+-				  ath9k_hif_usb_reg_in_cb, skb, 1);
+ 
+ 		/* Anchor URB */
+ 		usb_anchor_urb(urb, &hif_dev->reg_in_submitted);
+@@ -1031,7 +1031,9 @@
+ 
+ static int ath9k_hif_usb_dev_init(struct hif_device_usb *hif_dev)
+ {
++	struct usb_host_interface *alt = &hif_dev->interface->altsetting[0];
++	struct usb_endpoint_descriptor *endp;
++	int ret, idx;
+-	int ret;
+ 
+ 	ret = ath9k_hif_usb_download_fw(hif_dev);
+ 	if (ret) {
+@@ -1041,6 +1043,20 @@
+ 		return ret;
+ 	}
+ 
++	/* On downloading the firmware to the target, the USB descriptor of EP4
++	 * is 'patched' to change the type of the endpoint to Bulk. This will
++	 * bring down CPU usage during the scan period.
++	 */
++	for (idx = 0; idx < alt->desc.bNumEndpoints; idx++) {
++		endp = &alt->endpoint[idx].desc;
++		if ((endp->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK)
++				== USB_ENDPOINT_XFER_INT) {
++			endp->bmAttributes &= ~USB_ENDPOINT_XFERTYPE_MASK;
++			endp->bmAttributes |= USB_ENDPOINT_XFER_BULK;
++			endp->bInterval = 0;
++		}
++	}
++
+ 	/* Alloc URBs */
+ 	ret = ath9k_hif_usb_alloc_urbs(hif_dev);
+ 	if (ret) {
+@@ -1252,7 +1268,7 @@
+ 	if (!buf)
+ 		return;
+ 
++	ret = usb_bulk_msg(udev, usb_sndbulkpipe(udev, USB_REG_OUT_PIPE),
+-	ret = usb_interrupt_msg(udev, usb_sndintpipe(udev, USB_REG_OUT_PIPE),
+ 			   buf, 4, NULL, USB_MSG_TIMEOUT);
+ 	if (ret)
+ 		dev_err(&udev->dev, "ath9k_htc: USB reboot failed\n");
+

patch/kernel/rockchip-dev/2008-clk-rockchip-rk3288-Support-for-dedicating-NPLL-to-a.patch

@@ -0,0 +1,179 @@
+From e03d074b8ec00718337e7373e991912f6b6f9a52 Mon Sep 17 00:00:00 2001
+From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
+Date: Mon, 5 Nov 2018 19:53:43 +0100
+Subject: [PATCH] clk: rockchip: rk3288: Support for dedicating NPLL to a VOP
+
+This patch is taken from Urja Rannikko ( @urjaman ) patchset here :
+https://github.com/urjaman/arch-c201/blob/master/linux-c201/0020-RK3288-HDMI-clock-hacks-combined.patch
+https://www.spinics.net/lists/arm-kernel/msg673156.html
+
+I'm not really sure what this does exactly. It basically sets the
+parent clock of the newly added clocks, if the newly added property
+"rockchip,npll-for-vop" is detected and set.
+
+I have no clear idea how HDMI Neuronal PLL (and PLL in general) work,
+so I cannot comment on what it's doing and if it's a good idea in
+general.
+
+Now, I still have to test if that patch does anything useful on
+RK3288 boards. If it doesn't, I might just throw it away on next
+versions.
+
+Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
+---
+ drivers/clk/rockchip/clk-rk3288.c | 68 ++++++++++++++++++++++++++++++++-------
+ drivers/clk/rockchip/clk.h        |  3 ++
+ 2 files changed, 59 insertions(+), 12 deletions(-)
+
+diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c
+index 13b38cb89..0d8b99b6b 100644
+--- a/drivers/clk/rockchip/clk-rk3288.c
++++ b/drivers/clk/rockchip/clk-rk3288.c
+@@ -215,10 +215,13 @@ PNAME(mux_ddrphy_p)		= { "dpll_ddr", "gpll_ddr" };
+ PNAME(mux_aclk_cpu_src_p)	= { "cpll_aclk_cpu", "gpll_aclk_cpu" };
+ 
+ PNAME(mux_pll_src_cpll_gpll_p)		= { "cpll", "gpll" };
+-PNAME(mux_pll_src_npll_cpll_gpll_p)	= { "npll", "cpll", "gpll" };
+-PNAME(mux_pll_src_cpll_gpll_npll_p)	= { "cpll", "gpll", "npll" };
++PNAME_ED(mux_pll_src_npll_cpll_gpll_p)	= { "npll", "cpll", "gpll" };
++
++PNAME_ED(mux_pll_src_cgn_pll_nonvop_p)	= { "cpll", "gpll", "npll" };
++PNAME_ED(mux_pll_src_cgn_pll_vop0_p) = { "cpll", "gpll", "npll" };
++PNAME_ED(mux_pll_src_cgn_pll_vop1_p) = { "cpll", "gpll", "npll" };
+ PNAME(mux_pll_src_cpll_gpll_usb480m_p)	= { "cpll", "gpll", "usbphy480m_src" };
+-PNAME(mux_pll_src_cpll_gll_usb_npll_p)	= { "cpll", "gpll", "usbphy480m_src", "npll" };
++PNAME_ED(mux_pll_src_cpll_gll_usb_npll_p) = { "cpll", "gpll", "usbphy480m_src", "npll" };
+ 
+ PNAME(mux_mmc_src_p)	= { "cpll", "gpll", "xin24m", "xin24m" };
+ PNAME(mux_i2s_pre_p)	= { "i2s_src", "i2s_frac", "ext_i2s", "xin12m" };
+@@ -464,24 +467,24 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = {
+ 			RK3288_CLKSEL_CON(30), 14, 2, MFLAGS, 8, 5, DFLAGS,
+ 			RK3288_CLKGATE_CON(3), 4, GFLAGS),
+ 
+-	COMPOSITE(DCLK_VOP0, "dclk_vop0", mux_pll_src_cpll_gpll_npll_p, 0,
++	COMPOSITE(DCLK_VOP0, "dclk_vop0", mux_pll_src_cgn_pll_vop0_p, 0,
+ 			RK3288_CLKSEL_CON(27), 0, 2, MFLAGS, 8, 8, DFLAGS,
+ 			RK3288_CLKGATE_CON(3), 1, GFLAGS),
+-	COMPOSITE(DCLK_VOP1, "dclk_vop1", mux_pll_src_cpll_gpll_npll_p, 0,
++	COMPOSITE(DCLK_VOP1, "dclk_vop1", mux_pll_src_cgn_pll_vop1_p, 0,
+ 			RK3288_CLKSEL_CON(29), 6, 2, MFLAGS, 8, 8, DFLAGS,
+ 			RK3288_CLKGATE_CON(3), 3, GFLAGS),
+ 
+ 	COMPOSITE_NODIV(SCLK_EDP_24M, "sclk_edp_24m", mux_edp_24m_p, 0,
+ 			RK3288_CLKSEL_CON(28), 15, 1, MFLAGS,
+ 			RK3288_CLKGATE_CON(3), 12, GFLAGS),
+-	COMPOSITE(SCLK_EDP, "sclk_edp", mux_pll_src_cpll_gpll_npll_p, 0,
++	COMPOSITE(SCLK_EDP, "sclk_edp", mux_pll_src_cgn_pll_nonvop_p, 0,
+ 			RK3288_CLKSEL_CON(28), 6, 2, MFLAGS, 0, 6, DFLAGS,
+ 			RK3288_CLKGATE_CON(3), 13, GFLAGS),
+ 
+-	COMPOSITE(SCLK_ISP, "sclk_isp", mux_pll_src_cpll_gpll_npll_p, 0,
++	COMPOSITE(SCLK_ISP, "sclk_isp", mux_pll_src_cgn_pll_nonvop_p, 0,
+ 			RK3288_CLKSEL_CON(6), 6, 2, MFLAGS, 0, 6, DFLAGS,
+ 			RK3288_CLKGATE_CON(3), 14, GFLAGS),
+-	COMPOSITE(SCLK_ISP_JPE, "sclk_isp_jpe", mux_pll_src_cpll_gpll_npll_p, 0,
++	COMPOSITE(SCLK_ISP_JPE, "sclk_isp_jpe", mux_pll_src_cgn_pll_nonvop_p, 0,
+ 			RK3288_CLKSEL_CON(6), 14, 2, MFLAGS, 8, 6, DFLAGS,
+ 			RK3288_CLKGATE_CON(3), 15, GFLAGS),
+ 
+@@ -490,16 +493,16 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = {
+ 	GATE(SCLK_HDMI_CEC, "sclk_hdmi_cec", "xin32k", 0,
+ 			RK3288_CLKGATE_CON(5), 11, GFLAGS),
+ 
+-	COMPOSITE(ACLK_HEVC, "aclk_hevc", mux_pll_src_cpll_gpll_npll_p, 0,
++	COMPOSITE(ACLK_HEVC, "aclk_hevc", mux_pll_src_cgn_pll_nonvop_p, 0,
+ 			RK3288_CLKSEL_CON(39), 14, 2, MFLAGS, 8, 5, DFLAGS,
+ 			RK3288_CLKGATE_CON(13), 13, GFLAGS),
+ 	DIV(HCLK_HEVC, "hclk_hevc", "aclk_hevc", 0,
+ 			RK3288_CLKSEL_CON(40), 12, 2, DFLAGS),
+ 
+-	COMPOSITE(SCLK_HEVC_CABAC, "sclk_hevc_cabac", mux_pll_src_cpll_gpll_npll_p, 0,
++	COMPOSITE(SCLK_HEVC_CABAC, "sclk_hevc_cabac", mux_pll_src_cgn_pll_nonvop_p, 0,
+ 			RK3288_CLKSEL_CON(42), 6, 2, MFLAGS, 0, 5, DFLAGS,
+ 			RK3288_CLKGATE_CON(13), 14, GFLAGS),
+-	COMPOSITE(SCLK_HEVC_CORE, "sclk_hevc_core", mux_pll_src_cpll_gpll_npll_p, 0,
++	COMPOSITE(SCLK_HEVC_CORE, "sclk_hevc_core", mux_pll_src_cgn_pll_nonvop_p, 0,
+ 			RK3288_CLKSEL_CON(42), 14, 2, MFLAGS, 8, 5, DFLAGS,
+ 			RK3288_CLKGATE_CON(13), 15, GFLAGS),
+ 
+@@ -573,7 +576,7 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = {
+ 	COMPOSITE(0, "sclk_tspout", mux_tspout_p, 0,
+ 			RK3288_CLKSEL_CON(35), 14, 2, MFLAGS, 8, 5, DFLAGS,
+ 			RK3288_CLKGATE_CON(4), 11, GFLAGS),
+-	COMPOSITE(0, "sclk_tsp", mux_pll_src_cpll_gpll_npll_p, 0,
++	COMPOSITE(0, "sclk_tsp", mux_pll_src_cgn_pll_nonvop_p, 0,
+ 			RK3288_CLKSEL_CON(35), 6, 2, MFLAGS, 0, 5, DFLAGS,
+ 			RK3288_CLKGATE_CON(4), 10, GFLAGS),
+ 
+@@ -933,6 +936,7 @@ static void __init rk3288_clk_init(struct device_node *np)
+ {
+ 	struct rockchip_clk_provider *ctx;
+ 	struct clk *clk;
++	s32 npll_vop = -1;
+ 
+ 	rk3288_cru_base = of_iomap(np, 0);
+ 	if (!rk3288_cru_base) {
+@@ -940,6 +944,46 @@ static void __init rk3288_clk_init(struct device_node *np)
+ 		return;
+ 	}
+ 
++	if (!of_property_read_s32(np, "rockchip,npll-for-vop", &npll_vop)) {
++		if ((npll_vop < -1) || (npll_vop > 1)) {
++			pr_warn("%s: invalid VOP to dedicate NPLL to: %d\n",
++				__func__, npll_vop);
++		} else if (npll_vop >= 0) {
++			unsigned int vop_clk_id;
++			const char ** npll_names;
++			const char ** non_npll_names;
++			int i;
++
++			/* Firstly, not-VOP needs to not use npll */
++			mux_pll_src_npll_cpll_gpll_p[0] = "dummy_npll";
++			mux_pll_src_cgn_pll_nonvop_p[2] = "dummy_npll";
++			mux_pll_src_cpll_gll_usb_npll_p[3] = "dummy_npll";
++
++			/* Then the npll VOP needs to only use npll, and the other one not use npll. */
++			if (npll_vop) {
++				vop_clk_id = DCLK_VOP1;
++				npll_names = mux_pll_src_cgn_pll_vop1_p;
++				non_npll_names = mux_pll_src_cgn_pll_vop0_p;
++			} else {
++				vop_clk_id = DCLK_VOP0;
++				npll_names = mux_pll_src_cgn_pll_vop0_p;
++				non_npll_names = mux_pll_src_cgn_pll_vop1_p;
++			}
++			npll_names[0] = "dummy_cpll";
++			npll_names[1] = "dummy_gpll";
++			non_npll_names[2] = "dummy_npll";
++
++			/* Lastly the npll-dedicated-VOP needs to be able to control npll. */
++			for (i = 0; i < ARRAY_SIZE(rk3288_clk_branches); i++) {
++				if (rk3288_clk_branches[i].id == vop_clk_id) {
++					rk3288_clk_branches[i].flags |= CLK_SET_RATE_PARENT;
++					break;
++				}
++			}
++			pr_debug("%s: npll dedicated for VOP %d\n", __func__, npll_vop);
++		}
++	}
++
+ 	ctx = rockchip_clk_init(np, rk3288_cru_base, CLK_NR_CLKS);
+ 	if (IS_ERR(ctx)) {
+ 		pr_err("%s: rockchip clk init failed\n", __func__);
+diff --git a/drivers/clk/rockchip/clk.h b/drivers/clk/rockchip/clk.h
+index 6b53fff4c..dbda9d281 100644
+--- a/drivers/clk/rockchip/clk.h
++++ b/drivers/clk/rockchip/clk.h
+@@ -382,6 +382,9 @@ struct clk *rockchip_clk_register_muxgrf(const char *name,
+ 
+ #define PNAME(x) static const char *const x[] __initconst
+ 
++/* For when you want to be able to modify the pointers. */
++#define PNAME_ED(x) static const char * x[] __initdata
++
+ enum rockchip_clk_branch_type {
+ 	branch_composite,
+ 	branch_mux,
+-- 
+2.16.4
+

patch/kernel/rockchip-dev/2009-drm-dw_hdmi-rockchip-better-clock-selection-logic-an.patch

@@ -50,9 +50,9 @@ index 11309a2a4..740b0aeea 100644
 --- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
 +++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
 @@ -49,122 +49,141 @@ struct rockchip_hdmi {
- 	struct clk *vpll_clk;
- 	struct clk *grf_clk;
+  	struct clk *grf_clk;
  	struct dw_hdmi *hdmi;
+	struct phy *phy;
 +	u32* rates;
 +	u32 rates_cnt;
  };

patch/kernel/rockchip-dev/2013-spi-Added-support-for-Tinkerboard-s-SPI-interface.patch

@@ -0,0 +1,27 @@
+From d4d128324b8f8a9f5c441203d94703e41fa07df3 Mon Sep 17 00:00:00 2001
+From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
+Date: Mon, 5 Nov 2018 19:57:56 +0100
+Subject: [PATCH] spi: Added support for Tinkerboard's SPI interface
+
+Imported from ARMbian
+
+Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
+---
+ drivers/spi/spidev.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/drivers/spi/spidev.c b/drivers/spi/spidev.c
+index b0c76e262..36b5e7774 100644
+--- a/drivers/spi/spidev.c
++++ b/drivers/spi/spidev.c
+@@ -670,6 +670,7 @@ static const struct of_device_id spidev_dt_ids[] = {
+ 	{ .compatible = "ge,achc" },
+ 	{ .compatible = "semtech,sx1301" },
+ 	{ .compatible = "lwn,bk4" },
++	{ .compatible = "rockchip,spi_tinker" },
+ 	{},
+ };
+ MODULE_DEVICE_TABLE(of, spidev_dt_ids);
+-- 
+2.16.4
+

patch/kernel/rockchip-dev/2014-drivers-tty-serial-Bail-out-if-no-UART-is-detected.patch

@@ -0,0 +1,54 @@
+From 7e43ae8446b420907f00b43308ad0b99b6fe4e51 Mon Sep 17 00:00:00 2001
+From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
+Date: Wed, 16 Jan 2019 23:58:52 +0100
+Subject: [PATCH] drivers: tty: serial: Bail out if no UART is detected
+
+Before the 5.0, serial8250_register_8250_port consisted of one BIG
+if(uart && uart->port.type != PORT_8250_CIR) block, which prevented
+NULL dereference if uart, a pointer to an "uart_8250_port" detected
+through "serial8250_find_match_or_unused", were to be NULL.
+
+However, a recent patch added a few bits of code just after that,
+and that code manipulates the "uart" pointer without checking if
+it's NULL or not.
+
+This patch changes the mechanism and bail out early if no UART
+structure pointer is provided serial8250_find_match_or_unused.
+
+A goto is used instead of returning directly, since we're inside
+a mutex and must release it correctly.
+
+Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
+---
+ drivers/tty/serial/8250/8250_core.c | 8 +++++++-
+ 1 file changed, 7 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/tty/serial/8250/8250_core.c b/drivers/tty/serial/8250/8250_core.c
+index 189ab1212..11120c2d9 100644
+--- a/drivers/tty/serial/8250/8250_core.c
++++ b/drivers/tty/serial/8250/8250_core.c
+@@ -981,7 +981,12 @@ int serial8250_register_8250_port(struct uart_8250_port *up)
+ 	mutex_lock(&serial_mutex);
+ 
+ 	uart = serial8250_find_match_or_unused(&up->port);
+-	if (uart && uart->port.type != PORT_8250_CIR) {
++	if (!uart) {
++		printk(KERN_INFO "One UART port failed to register correctly\n");
++		goto no_uart;
++	}
++
++	if (uart->port.type != PORT_8250_CIR) {
+ 		if (uart->port.dev)
+ 			uart_remove_one_port(&serial8250_reg, &uart->port);
+ 
+@@ -1081,6 +1086,7 @@ int serial8250_register_8250_port(struct uart_8250_port *up)
+ 		uart->overrun_backoff_time_ms = 0;
+ 	}
+ 
++no_uart:
+ 	mutex_unlock(&serial_mutex);
+ 
+ 	return ret;
+-- 
+2.16.4
+

patch/kernel/rockchip-dev/general-fixup-dw-hdmi.patch

@@ -0,0 +1,12 @@
+diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
+index f108ffa92..76555b4c8 100644
+--- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
++++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
+@@ -477,7 +477,6 @@ static struct rockchip_hdmi_chip_data rk3328_chip_data = {
+ };
+ 
+ static const struct dw_hdmi_plat_data rk3328_hdmi_drv_data = {
+-	.mode_valid = dw_hdmi_rockchip_mode_valid,
+ 	.mpll_cfg = rockchip_mpll_cfg,
+ 	.cur_ctr = rockchip_cur_ctr,
+ 	.phy_config = rockchip_phy_config,

patch/kernel/rockchip-dev/general-increasing_DMA_block_memory_allocation_to_2048.patch

@@ -1,27 +0,0 @@
-diff --git a/arch/arm64/mm/dma-mapping.c b/arch/arm64/mm/dma-mapping.c
-index 3216e09..21bce28
---- a/arch/arm64/mm/dma-mapping.c
-+++ b/arch/arm64/mm/dma-mapping.c
-@@ -44,7 +44,7 @@ static pgprot_t __get_dma_pgprot(unsigned long attrs, pgprot_t prot,
-
- static struct gen_pool *atomic_pool;
-
--#define DEFAULT_DMA_COHERENT_POOL_SIZE  SZ_256K
-+#define DEFAULT_DMA_COHERENT_POOL_SIZE  SZ_2M
- static size_t atomic_pool_size __initdata = DEFAULT_DMA_COHERENT_POOL_SIZE;
-
- static int __init early_coherent_pool(char *p)
-
-diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
-index ada8eb2..8df220f
---- a/arch/arm/mm/dma-mapping.c
-+++ b/arch/arm/mm/dma-mapping.c
-@@ -381,7 +381,7 @@ static void __dma_free_remap(void *cpu_addr, size_t size)
- 			VM_ARM_DMA_CONSISTENT | VM_USERMAP);
- }
-
--#define DEFAULT_DMA_COHERENT_POOL_SIZE	SZ_256K
-+#define DEFAULT_DMA_COHERENT_POOL_SIZE	SZ_2M
- static struct gen_pool *atomic_pool __ro_after_init;
-
- static size_t atomic_pool_size __initdata = DEFAULT_DMA_COHERENT_POOL_SIZE;

patch/kernel/rockchip-dev/general-packaging-4.20-dev.patch

@@ -5,7 +5,7 @@ index 90c9a8a..3c79b90 100755
 @@ -29,6 +29,27 @@ create_package() {
  	# in case we are in a restrictive umask environment like 0077
  	chmod -R a+rX "$pdir"
-
+ 
 +	# Create preinstall and post install script to remove dtb
 +	if [[ "$1" == *dtb* ]]; then
 +		echo "if [ -d /boot/dtb-$version ]; then mv /boot/dtb-$version /boot/dtb-$version.old; fi" >> $pdir/DEBIAN/preinst
@@ -43,7 +43,7 @@ index 90c9a8a..3c79b90 100755
 +dtb_packagename=linux-dtb-dev"$LOCALVERSION"
 +libc_headers_packagename=linux-libc-dev-dev"$LOCALVERSION"
  dbg_packagename=$packagename-dbg
-
+ 
  if [ "$ARCH" = "um" ] ; then
 @@ -52,6 +75,15 @@ fi
  # XXX: have each arch Makefile export a variable of the canonical image install
@@ -63,7 +63,7 @@ index 90c9a8a..3c79b90 100755
  	;;
 @@ -65,7 +97,9 @@ esac
  BUILD_DEBUG="$(grep -s '^CONFIG_DEBUG_INFO=y' $KCONFIG_CONFIG || true)"
-
+ 
  # Setup the directory structure
 -rm -rf "$tmpdir" "$kernel_headers_dir" "$libc_headers_dir" "$dbg_dir" $objtree/debian/files
 +rm -rf "$tmpdir" "$kernel_headers_dir" "$libc_headers_dir" "$dbg_dir" "$dtb_dir" $objtree/debian/files
@@ -75,7 +75,7 @@ index 90c9a8a..3c79b90 100755
 @@ -118,6 +152,11 @@ if grep -q '^CONFIG_MODULES=y' $KCONFIG_CONFIG ; then
  	fi
  fi
-
+ 
 +if grep -q '^CONFIG_OF=y' $KCONFIG_CONFIG ; then
 +	#mkdir -p "$tmpdir/boot/dtb"
 +	INSTALL_DTBS_PATH="$dtb_dir/boot/dtb-$version" $MAKE KBUILD_SRC= dtbs_install
@@ -90,13 +90,13 @@ index 90c9a8a..3c79b90 100755
  	cat <<EOF > "$tmpdir/DEBIAN/$script"
 -#!/bin/sh
 +#!/bin/bash
-
+ 
  set -e
-
+ 
 @@ -153,9 +192,60 @@ EOF
  	chmod 755 "$tmpdir/DEBIAN/$script"
  done
-
+ 
 +##
 +## Create sym link to kernel image
 +##
@@ -164,7 +164,7 @@ index 90c9a8a..3c79b90 100755
  (cd $objtree; cp $KCONFIG_CONFIG $destdir/.config) # copy .config manually to be where it's expected to be
  ln -sf "/usr/src/linux-headers-$version" "$kernel_headers_dir/lib/modules/$version/build"
  rm -f "$objtree/debian/hdrsrcfiles" "$objtree/debian/hdrobjfiles"
-
+ 
 +(cd $destdir; make M=scripts clean)
 +
  if [ "$ARCH" != "um" ]; then
@@ -173,7 +173,7 @@ index 90c9a8a..3c79b90 100755
 +	# create_package "$libc_headers_packagename" "$libc_headers_dir"
 +	create_package "$dtb_packagename" "$dtb_dir"
  fi
-
+ 
  create_package "$packagename" "$tmpdir"
 diff --git a/scripts/package/mkdebian b/scripts/package/mkdebian
 index 6adb3a1..00e12eb 100755
@@ -192,7 +192,7 @@ index 6adb3a1..00e12eb 100755
  debarch=
 +image_name=
  set_debarch
-
+ 
  if [ "$ARCH" = "um" ] ; then
 @@ -168,6 +170,11 @@ Architecture: $debarch
  Description: Linux kernel debugging symbols for $version
@@ -204,18 +204,18 @@ index 6adb3a1..00e12eb 100755
 +Description: Linux DTB, version $version
 + This package contains device blobs from the Linux kernel, version $version
  EOF
-
+ 
  cat <<EOF > debian/rules
 diff --git a/arch/arm64/Makefile b/arch/arm64/Makefile
 index f839ecd9..cd276162 100644
 --- a/arch/arm64/Makefile
 +++ b/arch/arm64/Makefile
 @@ -103,7 +103,7 @@ core-$(CONFIG_EFI_STUB) += $(objtree)/drivers/firmware/efi/libstub/lib.a
-
+ 
  # Default target when executing plain make
  boot		:= arch/arm64/boot
 -KBUILD_IMAGE	:= $(boot)/Image.gz
 +KBUILD_IMAGE	:= $(boot)/Image
- KBUILD_DTBS	:= dtbs
-
+ 
  all:	Image.gz $(KBUILD_DTBS)
+ 

patch/kernel/rockchip-dev/need_to_be_checked/1005-ASUS-Tinkerboard-Stupid-reboot.patch

@@ -1,157 +0,0 @@
-From bf9b932f6ae506baf5b79c8407089448ed77fc56 Mon Sep 17 00:00:00 2001
-From: Myy Miouyouyou <myy@miouyouyou.fr>
-Date: Sun, 17 Dec 2017 16:15:03 +0100
-Subject: [PATCH] ASUS Tinkerboard: Stupid reboot patch
-
-This patch is ugly as shit and will be reworked when possible.
-
-Meanwhile, this fixes an issue with the ASUS Tinkerboard which
-cannot reboot correctly. The issue is that the MMC hardware is
-shutdown during the reboot phase and is not powered again after
-the power cycle, leading to a dead board awaiting a hard power
-cycle.
-
-Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
----
- drivers/mmc/host/dw_mmc-rockchip.c | 24 ++++++++++++++++++++++++
- drivers/mmc/host/dw_mmc.c          | 28 ++++++++++++++++++++++++++++
- include/linux/reboot.h             |  2 ++
- kernel/reboot.c                    |  1 +
- 4 files changed, 55 insertions(+)
-
-diff --git a/drivers/mmc/host/dw_mmc-rockchip.c b/drivers/mmc/host/dw_mmc-rockchip.c
-index a3f1c2b30..52c13733f 100644
---- a/drivers/mmc/host/dw_mmc-rockchip.c
-+++ b/drivers/mmc/host/dw_mmc-rockchip.c
-@@ -14,10 +14,12 @@
- #include <linux/of_address.h>
- #include <linux/mmc/slot-gpio.h>
- #include <linux/pm_runtime.h>
-+#include <linux/regulator/consumer.h> // Stupid Tinkerboard Hack
- #include <linux/slab.h>
- 
- #include "dw_mmc.h"
- #include "dw_mmc-pltfm.h"
-+#include "../core/core.h" // Stupid Tinkerboard Hack
- 
- #define RK3288_CLKGEN_DIV       2
- 
-@@ -365,6 +367,27 @@ static int dw_mci_rockchip_probe(struct platform_device *pdev)
- 	return 0;
- }
- 
-+/* Stupid Tinkerboard Hack */
-+static void dw_mci_rockchip_platfm_shutdown(struct platform_device *pdev)
-+{
-+	struct dw_mci *host = platform_get_drvdata(pdev);
-+	struct mmc_host *mmc = host->slot->mmc;
-+	int ret;
-+
-+	if(of_machine_is_compatible("asus,rk3288-tinker")){
-+
-+		mmc_power_off(mmc);
-+
-+		mdelay(20);
-+
-+		if (!IS_ERR(mmc->supply.vmmc))
-+			ret = regulator_enable(mmc->supply.vmmc);
-+
-+		if (!IS_ERR(mmc->supply.vqmmc))
-+			regulator_set_voltage(mmc->supply.vqmmc, 3000000, 3300000);
-+	}
-+}
-+
- static int dw_mci_rockchip_remove(struct platform_device *pdev)
- {
- 	pm_runtime_get_sync(&pdev->dev);
-@@ -385,6 +408,7 @@ static const struct dev_pm_ops dw_mci_rockchip_dev_pm_ops = {
- static struct platform_driver dw_mci_rockchip_pltfm_driver = {
- 	.probe		= dw_mci_rockchip_probe,
- 	.remove		= dw_mci_rockchip_remove,
-+	.shutdown	= dw_mci_rockchip_platfm_shutdown, // Stupid Tinkerboard Hack
- 	.driver		= {
- 		.name		= "dwmmc_rockchip",
- 		.of_match_table	= dw_mci_rockchip_match,
-diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
-index 0aa39975f..70f7ce21b 100644
---- a/drivers/mmc/host/dw_mmc.c
-+++ b/drivers/mmc/host/dw_mmc.c
-@@ -39,8 +39,10 @@
- #include <linux/of.h>
- #include <linux/of_gpio.h>
- #include <linux/mmc/slot-gpio.h>
-+#include <linux/reboot.h> // Stupid Tinkerboard Hack
- 
- #include "dw_mmc.h"
-+#include "../core/core.h" // Stupid Tinkerboard Hack
- 
- /* Common flag combinations */
- #define DW_MCI_DATA_ERROR_FLAGS	(SDMMC_INT_DRTO | SDMMC_INT_DCRC | \
-@@ -2778,6 +2780,29 @@ static irqreturn_t dw_mci_interrupt(int irq, void *dev_id)
- 	return IRQ_HANDLED;
- }
- 
-+/* Stupid Tinkerboard Hack */
-+struct dw_mci *mSdhost;
-+void setmmcEmergency() {
-+	struct mmc_host *mmc;
-+	int ret;
-+
-+	printk(KERN_ERR "Emergency route taken.\n");
-+	if (of_machine_is_compatible("asus,rk3288-tinker")) {
-+		mmc = mSdhost->slot->mmc;
-+
-+		mmc_power_off(mmc);
-+
-+		mdelay(20);
-+
-+		if (!IS_ERR(mmc->supply.vmmc))
-+			ret = regulator_enable(mmc->supply.vmmc);
-+
-+		if (!IS_ERR(mmc->supply.vqmmc))
-+			regulator_set_voltage(mmc->supply.vqmmc, 3000000, 3300000);
-+	}
-+}
-+EXPORT_SYMBOL(setmmcEmergency);
-+
- static int dw_mci_init_slot(struct dw_mci *host)
- {
- 	struct mmc_host *mmc;
-@@ -2809,6 +2834,9 @@ static int dw_mci_init_slot(struct dw_mci *host)
- 		mmc->f_max = freq[1];
- 	}
- 
-+	/* Stupid Tinkerboard Hack */
-+	if (of_find_property(host->dev->of_node, "supports-sd", NULL))
-+		mSdhost = host;
- 	/*if there are external regulators, get them*/
- 	ret = mmc_regulator_get_supply(mmc);
- 	if (ret)
-diff --git a/include/linux/reboot.h b/include/linux/reboot.h
-index e63799a6e..057d3ce0c 100644
---- a/include/linux/reboot.h
-+++ b/include/linux/reboot.h
-@@ -77,6 +77,8 @@ extern char poweroff_cmd[POWEROFF_CMD_PATH_LEN];
- 
- extern void orderly_poweroff(bool force);
- extern void orderly_reboot(void);
-+/* Stupid Tinkerboard Hack */
-+extern void setmmcEmergency(void);
- 
- /*
-  * Emergency restart, callable from an interrupt handler.
-diff --git a/kernel/reboot.c b/kernel/reboot.c
-index e4ced883d..c8e678ce6 100644
---- a/kernel/reboot.c
-+++ b/kernel/reboot.c
-@@ -61,6 +61,7 @@ void (*pm_power_off_prepare)(void);
- void emergency_restart(void)
- {
- 	kmsg_dump(KMSG_DUMP_EMERG);
-+	setmmcEmergency(); // Stupid Tinkerboard Hack
- 	machine_emergency_restart();
- }
- EXPORT_SYMBOL_GPL(emergency_restart);
--- 
-2.14.1
-

patch/kernel/rockchip-dev/need_to_be_checked/1100-media-Add-JPEG_RAW-format.patch

@@ -1,63 +0,0 @@
-From 1680a655127a62e74cbcfb84782e04a9c55dcf81 Mon Sep 17 00:00:00 2001
-From: Shunqian Zheng <zhengsq@rock-chips.com>
-Date: Wed, 5 Sep 2018 19:00:09 -0300
-Subject: [PATCH 3/6] media: Add JPEG_RAW format
-
-Add V4L2_PIX_FMT_JPEG_RAW format that does not contain
-JPEG header in the output frame.
-
-Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
-Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
----
- Documentation/media/uapi/v4l/pixfmt-compressed.rst | 9 +++++++++
- drivers/media/v4l2-core/v4l2-ioctl.c               | 1 +
- include/uapi/linux/videodev2.h                     | 1 +
- 3 files changed, 11 insertions(+)
-
-diff --git a/Documentation/media/uapi/v4l/pixfmt-compressed.rst b/Documentation/media/uapi/v4l/pixfmt-compressed.rst
-index d382e7a5..4dffe400 100644
---- a/Documentation/media/uapi/v4l/pixfmt-compressed.rst
-+++ b/Documentation/media/uapi/v4l/pixfmt-compressed.rst
-@@ -23,6 +23,15 @@ Compressed Formats
-       - 'JPEG'
-       - TBD. See also :ref:`VIDIOC_G_JPEGCOMP <VIDIOC_G_JPEGCOMP>`,
- 	:ref:`VIDIOC_S_JPEGCOMP <VIDIOC_G_JPEGCOMP>`.
-+    * .. _V4L2-PIX-FMT-JPEG-RAW:
-+
-+      - ``V4L2_PIX_FMT_JPEG_RAW``
-+      - 'Raw JPEG'
-+      - Raw JPEG bitstream, containing a compressed payload. This format
-+        contains an image scan, i.e. without any metadata or headers.
-+        The user is expected to set the needed metadata such as
-+        quantization and entropy encoding tables, via ``V4L2_CID_JPEG``
-+        controls, see :ref:`jpeg-control-id`.
-     * .. _V4L2-PIX-FMT-MPEG:
- 
-       - ``V4L2_PIX_FMT_MPEG``
-diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c b/drivers/media/v4l2-core/v4l2-ioctl.c
-index 54afc9c7..0dcd95f4 100644
---- a/drivers/media/v4l2-core/v4l2-ioctl.c
-+++ b/drivers/media/v4l2-core/v4l2-ioctl.c
-@@ -1301,6 +1301,7 @@ static void v4l_fill_fmtdesc(struct v4l2_fmtdesc *fmt)
- 		/* Max description length mask:	descr = "0123456789012345678901234567890" */
- 		case V4L2_PIX_FMT_MJPEG:	descr = "Motion-JPEG"; break;
- 		case V4L2_PIX_FMT_JPEG:		descr = "JFIF JPEG"; break;
-+		case V4L2_PIX_FMT_JPEG_RAW:	descr = "Raw JPEG"; break;
- 		case V4L2_PIX_FMT_DV:		descr = "1394"; break;
- 		case V4L2_PIX_FMT_MPEG:		descr = "MPEG-1/2/4"; break;
- 		case V4L2_PIX_FMT_H264:		descr = "H.264"; break;
-diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h
-index 5d1a3685..f271048c 100644
---- a/include/uapi/linux/videodev2.h
-+++ b/include/uapi/linux/videodev2.h
-@@ -627,6 +627,7 @@ struct v4l2_pix_format {
- /* compressed formats */
- #define V4L2_PIX_FMT_MJPEG    v4l2_fourcc('M', 'J', 'P', 'G') /* Motion-JPEG   */
- #define V4L2_PIX_FMT_JPEG     v4l2_fourcc('J', 'P', 'E', 'G') /* JFIF JPEG     */
-+#define V4L2_PIX_FMT_JPEG_RAW v4l2_fourcc('J', 'P', 'G', 'R') /* JFIF JPEG RAW without headers */
- #define V4L2_PIX_FMT_DV       v4l2_fourcc('d', 'v', 's', 'd') /* 1394          */
- #define V4L2_PIX_FMT_MPEG     v4l2_fourcc('M', 'P', 'E', 'G') /* MPEG-1/2/4 Multiplexed */
- #define V4L2_PIX_FMT_H264     v4l2_fourcc('H', '2', '6', '4') /* H264 with start codes */
--- 
-2.16.4
-

patch/kernel/rockchip-dev/need_to_be_checked/1101-media-Add-controls-for-JPEG-quantization-tables.patch.disabled

@@ -1,153 +0,0 @@
-From 82da876c36ccc7791d5b20e7ee8b50379f7b19aa Mon Sep 17 00:00:00 2001
-From: Shunqian Zheng <zhengsq@rock-chips.com>
-Date: Wed, 5 Sep 2018 19:00:10 -0300
-Subject: [PATCH 4/6] media: Add controls for JPEG quantization tables
-
-Add V4L2_CID_JPEG_QUANTIZATION compound control to allow userspace
-configure the JPEG quantization tables.
-
-Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
-Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
----
- Documentation/media/uapi/v4l/extended-controls.rst | 31 ++++++++++++++++++++++
- Documentation/media/videodev2.h.rst.exceptions     |  1 +
- drivers/media/v4l2-core/v4l2-ctrls.c               | 10 +++++++
- include/uapi/linux/v4l2-controls.h                 | 12 +++++++++
- include/uapi/linux/videodev2.h                     |  1 +
- 5 files changed, 55 insertions(+)
-
-diff --git a/Documentation/media/uapi/v4l/extended-controls.rst b/Documentation/media/uapi/v4l/extended-controls.rst
-index 9f7312bf..1335d27d 100644
---- a/Documentation/media/uapi/v4l/extended-controls.rst
-+++ b/Documentation/media/uapi/v4l/extended-controls.rst
-@@ -3354,7 +3354,38 @@ JPEG Control IDs
-     Specify which JPEG markers are included in compressed stream. This
-     control is valid only for encoders.
- 
-+.. _jpeg-quant-tables-control:
- 
-+``V4L2_CID_JPEG_QUANTIZATION (struct)``
-+    Specifies the luma and chroma quantization matrices for encoding
-+    or decoding a V4L2_PIX_FMT_JPEG_RAW format buffer. The :ref:`itu-t81`
-+    specification allows 8-bit quantization coefficients for
-+    baseline profile images, and 8-bit or 16-bit for extended profile
-+    images. Supporting or not 16-bit precision coefficients is driver-specific.
-+    Coefficients must be set in JPEG zigzag scan order.
-+
-+
-+.. c:type:: struct v4l2_ctrl_jpeg_quantization
-+
-+.. cssclass:: longtable
-+
-+.. flat-table:: struct v4l2_ctrl_jpeg_quantization
-+    :header-rows:  0
-+    :stub-columns: 0
-+    :widths:       1 1 2
-+
-+    * - __u8
-+      - ``precision``
-+      - Specifies the coefficient precision. User shall set 0
-+        for 8-bit, and 1 for 16-bit.
-+
-+    * - __u16
-+      - ``luma_quantization_matrix[64]``
-+      - Sets the luma quantization table.
-+
-+    * - __u16
-+      - ``chroma_quantization_matrix[64]``
-+      - Sets the chroma quantization table.
- 
- .. flat-table::
-     :header-rows:  0
-diff --git a/Documentation/media/videodev2.h.rst.exceptions b/Documentation/media/videodev2.h.rst.exceptions
-index ca9f0edc..a0a38e92 100644
---- a/Documentation/media/videodev2.h.rst.exceptions
-+++ b/Documentation/media/videodev2.h.rst.exceptions
-@@ -129,6 +129,7 @@ replace symbol V4L2_CTRL_TYPE_STRING :c:type:`v4l2_ctrl_type`
- replace symbol V4L2_CTRL_TYPE_U16 :c:type:`v4l2_ctrl_type`
- replace symbol V4L2_CTRL_TYPE_U32 :c:type:`v4l2_ctrl_type`
- replace symbol V4L2_CTRL_TYPE_U8 :c:type:`v4l2_ctrl_type`
-+replace symbol V4L2_CTRL_TYPE_JPEG_QUANTIZATION :c:type:`v4l2_ctrl_type`
- 
- # V4L2 capability defines
- replace define V4L2_CAP_VIDEO_CAPTURE device-capabilities
-diff --git a/drivers/media/v4l2-core/v4l2-ctrls.c b/drivers/media/v4l2-core/v4l2-ctrls.c
-index 599c1cbf..305bd7a9 100644
---- a/drivers/media/v4l2-core/v4l2-ctrls.c
-+++ b/drivers/media/v4l2-core/v4l2-ctrls.c
-@@ -999,6 +999,7 @@ const char *v4l2_ctrl_get_name(u32 id)
- 	case V4L2_CID_JPEG_RESTART_INTERVAL:	return "Restart Interval";
- 	case V4L2_CID_JPEG_COMPRESSION_QUALITY:	return "Compression Quality";
- 	case V4L2_CID_JPEG_ACTIVE_MARKER:	return "Active Markers";
-+	case V4L2_CID_JPEG_QUANTIZATION:	return "JPEG Quantization Tables";
- 
- 	/* Image source controls */
- 	/* Keep the order of the 'case's the same as in v4l2-controls.h! */
-@@ -1286,6 +1287,9 @@ void v4l2_ctrl_fill(u32 id, const char **name, enum v4l2_ctrl_type *type,
- 	case V4L2_CID_DETECT_MD_REGION_GRID:
- 		*type = V4L2_CTRL_TYPE_U8;
- 		break;
-+	case V4L2_CID_JPEG_QUANTIZATION:
-+		*type = V4L2_CTRL_TYPE_JPEG_QUANTIZATION;
-+		break;
- 	case V4L2_CID_DETECT_MD_THRESHOLD_GRID:
- 		*type = V4L2_CTRL_TYPE_U16;
- 		break;
-@@ -1612,6 +1616,9 @@ static int std_validate(const struct v4l2_ctrl *ctrl, u32 idx,
- 			return -ERANGE;
- 		return 0;
- 
-+	case V4L2_CTRL_TYPE_JPEG_QUANTIZATION:
-+		return 0;
-+
- 	default:
- 		return -EINVAL;
- 	}
-@@ -2133,6 +2140,9 @@ static struct v4l2_ctrl *v4l2_ctrl_new(struct v4l2_ctrl_handler *hdl,
- 	case V4L2_CTRL_TYPE_U32:
- 		elem_size = sizeof(u32);
- 		break;
-+	case V4L2_CTRL_TYPE_JPEG_QUANTIZATION:
-+		elem_size = sizeof(struct v4l2_ctrl_jpeg_quantization);
-+		break;
- 	default:
- 		if (type < V4L2_CTRL_COMPOUND_TYPES)
- 			elem_size = sizeof(s32);
-diff --git a/include/uapi/linux/v4l2-controls.h b/include/uapi/linux/v4l2-controls.h
-index e4ee10ee..856b3325 100644
---- a/include/uapi/linux/v4l2-controls.h
-+++ b/include/uapi/linux/v4l2-controls.h
-@@ -987,6 +987,18 @@ enum v4l2_jpeg_chroma_subsampling {
- #define	V4L2_JPEG_ACTIVE_MARKER_DQT		(1 << 17)
- #define	V4L2_JPEG_ACTIVE_MARKER_DHT		(1 << 18)
- 
-+#define V4L2_CID_JPEG_QUANTIZATION		(V4L2_CID_JPEG_CLASS_BASE + 5)
-+struct v4l2_ctrl_jpeg_quantization {
-+	/* ITU-T.81 specifies two quantization coefficient precisions:
-+	 * 8-bit for baseline profile,
-+	 * 8-bit or 16-bit for extended profile.
-+	 *
-+	 * User shall set "precision" to 0 for 8-bit and 1 for 16-bit.
-+	 */
-+	__u8	precision;
-+	__u16	luma_quantization_matrix[64];
-+	__u16	chroma_quantization_matrix[64];
-+};
- 
- /* Image source controls */
- #define V4L2_CID_IMAGE_SOURCE_CLASS_BASE	(V4L2_CTRL_CLASS_IMAGE_SOURCE | 0x900)
-diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h
-index f271048c..e998d074 100644
---- a/include/uapi/linux/videodev2.h
-+++ b/include/uapi/linux/videodev2.h
-@@ -1630,6 +1630,7 @@ enum v4l2_ctrl_type {
- 	V4L2_CTRL_TYPE_U8	     = 0x0100,
- 	V4L2_CTRL_TYPE_U16	     = 0x0101,
- 	V4L2_CTRL_TYPE_U32	     = 0x0102,
-+	V4L2_CTRL_TYPE_JPEG_QUANTIZATION = 0x0103,
- };
- 
- /*  Used in the VIDIOC_QUERYCTRL ioctl for querying controls */
--- 
-2.16.4
-

patch/kernel/rockchip-dev/need_to_be_checked/2008-Added-support-for-Tinkerboard-s-SPI-interface.patch

@@ -1,27 +0,0 @@
-From af8d73ec0df1dde1e2fe1674c5708d4c30385ba9 Mon Sep 17 00:00:00 2001
-From: Myy <myy@miouyouyou.fr>
-Date: Mon, 5 Jun 2017 12:37:17 +0000
-Subject: [PATCH 11/28] Added support for Tinkerboard's SPI interface
-
-Imported from ARMbian
-
-Signed-off-by: Myy <myy@miouyouyou.fr>
----
- drivers/spi/spidev.c | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/drivers/spi/spidev.c b/drivers/spi/spidev.c
-index cda10719..a6287475 100644
---- a/drivers/spi/spidev.c
-+++ b/drivers/spi/spidev.c
-@@ -669,6 +669,7 @@ static const struct of_device_id spidev_dt_ids[] = {
- 	{ .compatible = "lineartechnology,ltc2488" },
- 	{ .compatible = "ge,achc" },
- 	{ .compatible = "semtech,sx1301" },
-+	{ .compatible = "rockchip,spi_tinker" },
- 	{},
- };
- MODULE_DEVICE_TABLE(of, spidev_dt_ids);
--- 
-2.11.0
-

patch/kernel/rockchip-dev/need_to_be_checked/2013-ARM-DTS-rk3288-tinker-Enabling-SDIO-Wireless-and.patch

@@ -1,165 +0,0 @@
-From 2715f4a9ab5c169c546029a61eebb0bde6619b0e Mon Sep 17 00:00:00 2001
-From: Myy Miouyouyou <myy@miouyouyou.fr>
-Date: Thu, 19 Oct 2017 22:12:48 +0200
-Subject: [PATCH 18/28] ARM: DTS: rk3288-tinker.dts: Enabling SDIO, Wireless
- and Bluetooth
-
-Adding the appropriate nodes in order to exploit the WiFi capabilities
-of the board.
-Since these capabilities are provided through SDIO, and the SDIO
-nodes were not defined, these were added too.
-
-These seems to depend on each other so they are added in one big
-patch.
-
-Split if necessary.
-
-Bluetooth and uart0 (AKA Bluetooth UART) definitions were also added
-in order to deal with all the wireless techs in one patch.
-
-Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
----
- arch/arm/boot/dts/rk3288-tinker.dts | 82 ++++++++++++++++++++++++++++++++++++-
- 1 file changed, 81 insertions(+), 1 deletion(-)
-
-diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
-index 346b0d8b..c552fd95 100644
---- a/arch/arm/boot/dts/rk3288-tinker.dts
-+++ b/arch/arm/boot/dts/rk3288-tinker.dts
-@@ -44,6 +44,7 @@
- 
- #include "rk3288.dtsi"
- #include <dt-bindings/input/input.h>
-+#include <dt-bindings/clock/rockchip,rk808.h>
- 
- / {
- 	model = "Rockchip RK3288 Tinker Board";
-@@ -114,6 +115,24 @@
- 		};
- 	};
- 
-+	/* This is essential to get SDIO devices working.
-+	   The Wifi depends on SDIO ! */
-+	sdio_pwrseq: sdio-pwrseq {
-+		compatible = "mmc-pwrseq-simple";
-+		clocks = <&rk808 RK808_CLKOUT1>;
-+		clock-names = "ext_clock";
-+		pinctrl-names = "default";
-+		pinctrl-0 = <&chip_enable_h>, <&wifi_enable_h>;
-+
-+		/*
-+		 * On the module itself this is one of these (depending
-+		 * on the actual card populated):
-+		 * - SDIO_RESET_L_WL_REG_ON
-+		 * - PDN (power down when low)
-+		 */
-+		reset-gpios = <&gpio4 RK_PD4 GPIO_ACTIVE_LOW>, <&gpio4 RK_PD3 GPIO_ACTIVE_LOW>;
-+	};
-+
- 	vcc_sys: vsys-regulator {
- 		compatible = "regulator-fixed";
- 		regulator-name = "vcc_sys";
-@@ -134,6 +153,28 @@
- 		startup-delay-us = <100000>;
- 		vin-supply = <&vcc_io>;
- 	};
-+
-+	wireless-wlan {
-+		compatible = "wlan-platdata";
-+		rockchip,grf = <&grf>;
-+		wifi_chip_type = "8723bs";
-+		sdio_vref = <1800>;
-+		WIFI,host_wake_irq = <&gpio4 30 GPIO_ACTIVE_HIGH>;
-+		status = "okay";
-+	};
-+
-+	wireless-bluetooth {
-+		compatible = "bluetooth-platdata";
-+		uart_rts_gpios = <&gpio4 19 GPIO_ACTIVE_LOW>;
-+		pinctrl-names = "default","rts_gpio";
-+		pinctrl-0 = <&uart0_rts>;
-+		pinctrl-1 = <&uart0_gpios>;
-+		BT,reset_gpio    = <&gpio4 29 GPIO_ACTIVE_HIGH>;
-+		BT,wake_gpio     = <&gpio4 26 GPIO_ACTIVE_HIGH>;
-+		BT,wake_host_irq = <&gpio4 31 GPIO_ACTIVE_HIGH>;
-+		status = "okay";
-+	};
-+
- };
- 
- &cpu0 {
-@@ -373,10 +414,30 @@
- 
- &io_domains {
- 	status = "okay";
--
-+	rockchip,grf = <&grf>;
-+	wifi-supply = <&vcc_18>;
- 	sdcard-supply = <&vccio_sd>;
- };
- 
-+&sdio0 {
-+	status = "okay";
-+	clock-frequency = <50000000>;
-+	clock-freq-min-max = <200000 50000000>;
-+	bus-width = <4>;
-+	cap-sd-highspeed;
-+	cap-sdio-irq;
-+	disable-wp;
-+	keep-power-in-suspend;
-+	mmc-pwrseq = <&sdio_pwrseq>;
-+	non-removable;
-+	num-slots = <1>;
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
-+	sd-uhs-sdr104;
-+	supports-sdio;
-+
-+};
-+
- &pinctrl {
- 	pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma {
- 		drive-strength = <8>;
-@@ -422,6 +483,16 @@
- 		};
- 	};
- 
-+	sdio-pwrseq {
-+		wifi_enable_h: wifienable-h {
-+			rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_none>;
-+		};
-+
-+		chip_enable_h: chip-enable-h {
-+			rockchip,pins = <4 27 RK_FUNC_GPIO &pcfg_pull_none>;
-+		};
-+	};
-+
- 	sdmmc {
- 		sdmmc_bus4: sdmmc-bus4 {
- 			rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
-@@ -453,6 +524,13 @@
- 			rockchip,pins = <7 8 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 	};
-+
-+	wireless-bluetooth {
-+		uart0_gpios: uart0-gpios {
-+			rockchip,pins = <4 19 RK_FUNC_GPIO &pcfg_pull_none>;
-+		};
-+	};
-+
- };
- 
- &pwm0 {
-@@ -485,6 +563,8 @@
- 
- &uart0 {
- 	status = "okay";
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&uart0_xfer>, <&uart0_cts>;
- };
- 
- &uart1 {
--- 
-2.11.0
-

patch/kernel/rockchip-dev/need_to_be_checked/2014-ARM-DTS-rk3288-tinker-Setup-the-Bluetooth-UART-pins.patch

@@ -1,30 +0,0 @@
-diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
-index 07b4af4..7755426 100644
---- a/arch/arm/boot/dts/rk3288-tinker.dts
-+++ b/arch/arm/boot/dts/rk3288-tinker.dts
-@@ -162,7 +162,7 @@
- 		WIFI,host_wake_irq = <&gpio4 30 GPIO_ACTIVE_HIGH>;
- 		status = "okay";
- 	};
--
-+/*
- 	wireless-bluetooth {
- 		compatible = "bluetooth-platdata";
- 		uart_rts_gpios = <&gpio4 19 GPIO_ACTIVE_LOW>;
-@@ -174,6 +174,7 @@
- 		BT,wake_host_irq = <&gpio4 31 GPIO_ACTIVE_HIGH>;
- 		status = "okay";
- 	};
-+*/
- 
- };
- 
-@@ -620,7 +621,7 @@
- &uart0 {
- 	status = "okay";
- 	pinctrl-names = "default";
--	pinctrl-0 = <&uart0_xfer>, <&uart0_cts>;
-+	pinctrl-0 = <&uart0_xfer>, <&uart0_cts>,  <&uart0_rts>;
- };
- 
- &uart1 {

patch/kernel/rockchip-dev/need_to_be_checked/2015-ARM-DTS-rk3288-tinker-Improving-the-CPU-max-volt.patch

@@ -1,29 +0,0 @@
-From d4775f623b25009039a8ef3f28332033c7766ecc Mon Sep 17 00:00:00 2001
-From: Myy Miouyouyou <myy@miouyouyou.fr>
-Date: Thu, 19 Oct 2017 22:20:33 +0200
-Subject: [PATCH 19/28] ARM: DTS: rk3288-tinker.dts: Improving the CPU max
- voltage
-
-Taken from the various patches provided by @TonyMac32 .
-
-Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
----
- arch/arm/boot/dts/rk3288-tinker.dts | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
-index c552fd95..4ce94698 100644
---- a/arch/arm/boot/dts/rk3288-tinker.dts
-+++ b/arch/arm/boot/dts/rk3288-tinker.dts
-@@ -243,7 +243,7 @@
- 				regulator-always-on;
- 				regulator-boot-on;
- 				regulator-min-microvolt = <750000>;
--				regulator-max-microvolt = <1350000>;
-+				regulator-max-microvolt = <1450000>;
- 				regulator-name = "vdd_arm";
- 				regulator-ramp-delay = <6000>;
- 				regulator-state-mem {
--- 
-2.11.0
-

patch/kernel/rockchip-dev/need_to_be_checked/2016-ARM-DTS-rk3288-tinker-Setting-up-the-SD-regulato.patch

@@ -1,40 +0,0 @@
-From 39e50ab508d8104a733771a8681908a66a300edd Mon Sep 17 00:00:00 2001
-From: Myy Miouyouyou <myy@miouyouyou.fr>
-Date: Thu, 19 Oct 2017 22:25:03 +0200
-Subject: [PATCH 20/28] ARM: DTS: rk3288-tinker.dts: Setting up the SD
- regulators
-
-Some are needed and some are not. Playing with these parameters is
-required to get reboot working on these boards.
-
-I still can't believe that these boards can't soft reset correctly.
-
-Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
----
- arch/arm/boot/dts/rk3288-tinker.dts | 3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
-diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
-index 4ce94698..90c1a251 100644
---- a/arch/arm/boot/dts/rk3288-tinker.dts
-+++ b/arch/arm/boot/dts/rk3288-tinker.dts
-@@ -333,6 +333,8 @@
- 			};
- 
- 			vccio_sd: LDO_REG5 {
-+				regulator-always-on;
-+				regulator-boot-on;
- 				regulator-min-microvolt = <1800000>;
- 				regulator-max-microvolt = <3300000>;
- 				regulator-name = "vccio_sd";
-@@ -379,7 +381,6 @@
- 			};
- 
- 			vcc33_sd: SWITCH_REG1 {
--				regulator-always-on;
- 				regulator-boot-on;
- 				regulator-name = "vcc33_sd";
- 				regulator-state-mem {
--- 
-2.11.0
-

patch/kernel/rockchip-dev/need_to_be_checked/2017-ARM-DTS-rk3288-tinker-Defined-the-I2C-interfaces.patch

@@ -1,53 +0,0 @@
-From b0a552add28bf4590b979abb3530b14b6811eec1 Mon Sep 17 00:00:00 2001
-From: Myy Miouyouyou <myy@miouyouyou.fr>
-Date: Thu, 19 Oct 2017 22:33:39 +0200
-Subject: [PATCH 21/28] ARM: DTS: rk3288-tinker.dts: Defined the I2C interfaces
-
-And all the hardware behind.
-
-Taken from, and tested by @TonyMac32 .
-
-Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
----
- arch/arm/boot/dts/rk3288-tinker.dts | 23 +++++++++++++++++++++++
- 1 file changed, 23 insertions(+)
-
-diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
-index 90c1a251..67a3ce6f 100644
---- a/arch/arm/boot/dts/rk3288-tinker.dts
-+++ b/arch/arm/boot/dts/rk3288-tinker.dts
-@@ -400,8 +400,31 @@
- 	};
- };
- 
-+&i2c1 {
-+	status = "okay";
-+};
-+
- &i2c2 {
- 	status = "okay";
-+
-+	afc0:af-controller@0 {
-+		status = "okay";
-+		compatible = "silicon touch,vm149C-v4l2-i2c-subdev";
-+		reg = <0x0c>;
-+	};
-+
-+	eeprom:m24c08@50 {
-+		compatible = "at,24c08";
-+		reg = <0x50>;
-+	};
-+};
-+
-+&i2c3 {
-+	status = "okay";
-+};
-+
-+&i2c4 {
-+	status = "okay";
- };
- 
- &i2c5 {
--- 
-2.11.0
-

patch/kernel/rockchip-dev/need_to_be_checked/2019-ARM-DTS-rk3288-tinker-Add-the-MIPI-DSI-node.patch.disabled

@@ -1,35 +0,0 @@
-From 8ca607f3fe77c80a3367d8363703d5dc1d6781d4 Mon Sep 17 00:00:00 2001
-From: Myy Miouyouyou <myy@miouyouyou.fr>
-Date: Thu, 19 Oct 2017 22:36:02 +0200
-Subject: [PATCH 22/28] ARM: DTS: rk3288-tinker.dts: Add the MIPI DSI node
-
-Taken from, and tested by @TonyMac32 .
-
-Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
----
- arch/arm/boot/dts/rk3288-tinker.dts | 9 +++++++++
- 1 file changed, 9 insertions(+)
-
-diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
-index 67a3ce6f..6f4c0843 100644
---- a/arch/arm/boot/dts/rk3288-tinker.dts
-+++ b/arch/arm/boot/dts/rk3288-tinker.dts
-@@ -443,6 +443,15 @@
- 	sdcard-supply = <&vccio_sd>;
- };
- 
-+&mipi_dsi {
-+	status = "okay";
-+	mipi_panel: mipi-panel {
-+		compatible ="asus,tc358762";
-+		reg = <0x0 0>;
-+		status = "okay";
-+	};
-+};
-+
- &sdio0 {
- 	status = "okay";
- 	clock-frequency = <50000000>;
--- 
-2.11.0
-

patch/kernel/rockchip-dev/need_to_be_checked/2019-ARM-DTS-rk3288-tinker-Defining-SDMMC-properties.patch

@@ -1,33 +0,0 @@
-From 58d72a1cc693c4c08391487476d0cd6d167a57cf Mon Sep 17 00:00:00 2001
-From: Myy Miouyouyou <myy@miouyouyou.fr>
-Date: Thu, 19 Oct 2017 22:48:36 +0200
-Subject: [PATCH 24/28] ARM: DTS: rk3288-tinker.dts: Defining SDMMC properties
-
-I never knew if these properties were required to fix the dreaded
-reboot issue...
-
-Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
----
- arch/arm/boot/dts/rk3288-tinker.dts | 5 +++++
- 1 file changed, 5 insertions(+)
-
-diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
-index f4b4525c..a0663425 100644
---- a/arch/arm/boot/dts/rk3288-tinker.dts
-+++ b/arch/arm/boot/dts/rk3288-tinker.dts
-@@ -601,7 +601,12 @@
- 	disable-wp;			/* wp not hooked up */
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
-+	sd-uhs-sdr12;
-+	sd-uhs-sdr25;
-+	sd-uhs-sdr50;
-+	sd-uhs-sdr104;
- 	status = "okay";
-+	supports-sd;
- 	vmmc-supply = <&vcc33_sd>;
- 	vqmmc-supply = <&vccio_sd>;
- };
--- 
-2.11.0
-

patch/kernel/rockchip-dev/need_to_be_checked/2020-ARM-DTSI-rk3288-Define-the-VPU-services.patch

@@ -1,107 +0,0 @@
-From f4480cb8198085607c15e523b49aa21bc38cf62c Mon Sep 17 00:00:00 2001
-From: Myy Miouyouyou <myy@miouyouyou.fr>
-Date: Tue, 21 Nov 2017 21:47:33 +0100
-Subject: [PATCH 1/5] ARM: DTSI: rk3288.dtsi: Define the VPU services
-
-Still, you will need appropriate drivers to use them.
-
-Contrary to the previous versions of this patch, these services are :
-* NOT enabled by default;
-* MUST be activated in each individual DTS;
-
-I currently do not own enough RK3288 boards to ensure that the
-VPU and HEVC MMU + services can be activated without issues.
-
-Still this patch does not generate issues like the previous one AND
-still enable these services on boot, when activated properly in
-individual DTS files.
-
-Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
----
- arch/arm/boot/dts/rk3288.dtsi | 63 +++++++++++++++++++++++++++++++++++++++++++
- 1 file changed, 63 insertions(+)
-
-diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
-index 30b04257..bc3601ac 100644
---- a/arch/arm/boot/dts/rk3288.dtsi
-+++ b/arch/arm/boot/dts/rk3288.dtsi
-@@ -1182,6 +1182,27 @@
- 		status = "disabled";
- 	};
- 
-+	vpu_service: vpu-service@ff9a0000 {
-+		compatible = "rockchip,vpu_service";
-+		reg = <0x0 0xff9a0000 0x0 0x800>;
-+		interrupts = 
-+			<GIC_SPI  9 IRQ_TYPE_LEVEL_HIGH>,
-+			<GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
-+		interrupt-names = "irq_enc", "irq_dec";
-+		clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>;
-+		clock-names = "aclk_vcodec", "hclk_vcodec";
-+		power-domains = <&power RK3288_PD_VIDEO>;
-+		rockchip,grf = <&grf>;
-+		resets = <&cru SRST_VCODEC_AXI>, <&cru SRST_VCODEC_AHB>;
-+		reset-names = "video_a", "video_h";
-+		iommus = <&vpu_mmu>;
-+		iommu_enabled = <1>;
-+		dev_mode = <0>;
-+		status = "disabled";
-+		/* 0 means ion, 1 means drm */
-+		allocator = <1>;
-+	};
-+
- 	hevc_mmu: iommu@ff9c0440 {
- 		compatible = "rockchip,iommu";
- 		reg = <0x0 0xff9c0440 0x0 0x40>, <0x0 0xff9c0480 0x0 0x40>;
-@@ -1191,6 +1212,48 @@
- 		status = "disabled";
- 	};
- 
-+	hevc_service: hevc-service@ff9c0000 {
-+		compatible = "rockchip,hevc_service";
-+		reg = <0x0 0xff9c0000 0x0 0x400>;
-+		interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
-+		interrupt-names = "irq_dec";
-+		clocks =
-+			<&cru ACLK_HEVC>,
-+			<&cru HCLK_HEVC>,
-+			<&cru SCLK_HEVC_CORE>,
-+			<&cru SCLK_HEVC_CABAC>;
-+		clock-names =
-+			"aclk_vcodec",
-+			"hclk_vcodec",
-+			"clk_core",
-+			"clk_cabac";
-+		/*
-+		* The 4K hevc would also work well with 500/125/300/300,
-+		* no more err irq and reset request.
-+		*/
-+		assigned-clocks = 
-+			<&cru ACLK_HEVC>,
-+			<&cru HCLK_HEVC>,
-+			<&cru SCLK_HEVC_CORE>,
-+			<&cru SCLK_HEVC_CABAC>;
-+		assigned-clock-rates =
-+			<400000000>,
-+			<100000000>,
-+			<300000000>,
-+			<300000000>;
-+
-+		resets = <&cru SRST_HEVC>;
-+		reset-names = "video";
-+		power-domains = <&power RK3288_PD_HEVC>;
-+		rockchip,grf = <&grf>;
-+		dev_mode = <1>;
-+		iommus = <&hevc_mmu>;
-+		iommu_enabled = <1>;
-+		status = "disabled";
-+		/* 0 means ion, 1 means drm */
-+		allocator = <1>;
-+	};
-+
- 	gpu: gpu@ffa30000 {
- 		compatible = "rockchip,rk3288-mali", "arm,mali-t760";
- 		reg = <0x0 0xffa30000 0x0 0x10000>;
--- 
-2.14.1
-

patch/kernel/rockchip-dev/need_to_be_checked/2021-ARM-DTS-rk3288-miqi-Enable-the-Video-encoding-MM.patch

@@ -1,57 +0,0 @@
-From 647d6012849191e9909a8acb0fc9ae5df1afc747 Mon Sep 17 00:00:00 2001
-From: Myy Miouyouyou <myy@miouyouyou.fr>
-Date: Tue, 21 Nov 2017 21:51:31 +0100
-Subject: [PATCH 2/5] ARM: DTS: rk3288-miqi.dts: Enable the Video encoding MMU
- and services
-
-Enable the :
-* VPU MMU;
-* VPU service;
-* HEVC MMU;
-* HEVC service;
-on MiQi devices.
-
-Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
----
- arch/arm/boot/dts/rk3288-miqi.dts | 18 +++++++++++++++++-
- 1 file changed, 17 insertions(+), 1 deletion(-)
-
-diff --git a/arch/arm/boot/dts/rk3288-miqi.dts b/arch/arm/boot/dts/rk3288-miqi.dts
-index d7fde483..dd785c70 100644
---- a/arch/arm/boot/dts/rk3288-miqi.dts
-+++ b/arch/arm/boot/dts/rk3288-miqi.dts
-@@ -124,7 +124,7 @@
- 	};
- 
- 
--	cpu0_opp_table: opp_table0 {
-+	cpu0_opp_table: opp_table {
- 		compatible = "operating-points-v2";
- 		opp-shared;
- 
-@@ -575,6 +575,22 @@
- 	status = "okay";
- };
- 
-+&vpu_mmu {
-+	status = "okay";
-+};
-+
-+&vpu_service {
-+	status = "okay";
-+};
-+
-+&hevc_mmu {
-+	status = "okay";
-+};
-+
-+&hevc_service {
-+	status = "okay";
-+};
-+
- &wdt {
- 	status = "okay";
- };
--- 
-2.14.1
-

patch/kernel/rockchip-dev/need_to_be_checked/2022-ARM-DTS-rk3288-tinker-Enable-the-Video-encoding-MMU-.patch

@@ -1,48 +0,0 @@
-From 092c26ead2eb4035a57217f8705c9deed3bfb927 Mon Sep 17 00:00:00 2001
-From: Myy Miouyouyou <myy@miouyouyou.fr>
-Date: Tue, 21 Nov 2017 21:54:22 +0100
-Subject: [PATCH 3/5] ARM: DTS: rk3288-tinker: Enable the Video encoding MMU
- and services
-
-Enable the :
-* VPU MMU;
-* VPU Service;
-* HEVC MMU;
-* HEVC Service;
-for ASUS Tinkerboard devices.
-
-Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
----
- arch/arm/boot/dts/rk3288-tinker.dts | 16 ++++++++++++++++
- 1 file changed, 16 insertions(+)
-
-diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
-index a0663425..07b4af4f 100644
---- a/arch/arm/boot/dts/rk3288-tinker.dts
-+++ b/arch/arm/boot/dts/rk3288-tinker.dts
-@@ -671,6 +671,22 @@
- 	status = "okay";
- };
- 
-+&vpu_mmu {
-+	status = "okay";
-+};
-+
-+&vpu_service {
-+	status = "okay";
-+};
-+
-+&hevc_mmu {
-+	status = "okay";
-+};
-+
-+&hevc_service {
-+	status = "okay";
-+};
-+
- &wdt {
- 	status = "okay";
- };
--- 
-2.14.1
-

patch/kernel/rockchip-dev/need_to_be_checked/2023-ARM-DTSI-rk3288-firefly-Enable-the-Video-encoding-MM.patch

@@ -1,49 +0,0 @@
-From 2769b0e656d849c5d652c75db71ce0faff1c0551 Mon Sep 17 00:00:00 2001
-From: Myy Miouyouyou <myy@miouyouyou.fr>
-Date: Tue, 21 Nov 2017 21:56:45 +0100
-Subject: [PATCH 4/5] ARM: DTSI: rk3288-firefly: Enable the Video encoding MMU
- and services
-
-Enable the :
-* VPU MMU;
-* VPU Service;
-* HEVC MMU;
-* HEVC Service;
-for RK3288 Firefly devices.
-
-Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
----
- arch/arm/boot/dts/rk3288-firefly.dtsi | 17 +++++++++++++++++
- 1 file changed, 17 insertions(+)
-
-diff --git a/arch/arm/boot/dts/rk3288-firefly.dtsi b/arch/arm/boot/dts/rk3288-firefly.dtsi
-index b9e6f3a9..9961acce 100644
---- a/arch/arm/boot/dts/rk3288-firefly.dtsi
-+++ b/arch/arm/boot/dts/rk3288-firefly.dtsi
-@@ -606,6 +606,23 @@
- 	status = "okay";
- };
- 
-+&vpu_mmu {
-+	status = "okay";
-+};
-+
-+&vpu_service {
-+	status = "okay";
-+};
-+
-+&hevc_mmu {
-+	status = "okay";
-+};
-+
-+&hevc_service {
-+	status = "okay";
-+};
-+
- &wdt {
- 	status = "okay";
- };
-+
--- 
-2.14.1
-

patch/kernel/rockchip-dev/need_to_be_checked/2024-ARM-DTSI-rk3288-veyron-Enable-the-Video-encoding-MMU.patch

@@ -1,48 +0,0 @@
-From 4766516bcbf023813ad883c2d61c422316770d12 Mon Sep 17 00:00:00 2001
-From: Myy Miouyouyou <myy@miouyouyou.fr>
-Date: Tue, 21 Nov 2017 21:58:22 +0100
-Subject: [PATCH 5/5] ARM: DTSI: rk3288-veyron: Enable the Video encoding MMU
- and services
-
-Enable the :
-* VPU MMU;
-* VPU Service;
-* HEVC MMU;
-* HEVC Service;
-for RK3288 Chromebook laptops.
-
-Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
----
- arch/arm/boot/dts/rk3288-veyron.dtsi | 16 ++++++++++++++++
- 1 file changed, 16 insertions(+)
-
-diff --git a/arch/arm/boot/dts/rk3288-veyron.dtsi b/arch/arm/boot/dts/rk3288-veyron.dtsi
-index 6e5bd897..517b9242 100644
---- a/arch/arm/boot/dts/rk3288-veyron.dtsi
-+++ b/arch/arm/boot/dts/rk3288-veyron.dtsi
-@@ -450,6 +450,22 @@
- 	status = "okay";
- };
- 
-+&vpu_mmu {
-+	status = "okay";
-+};
-+
-+&vpu_service {
-+	status = "okay";
-+};
-+
-+&hevc_mmu {
-+	status = "okay";
-+};
-+
-+&hevc_service {
-+	status = "okay";
-+};
-+
- &wdt {
- 	status = "okay";
- };
--- 
-2.14.1
-

patch/kernel/rockchip-dev/need_to_be_checked/2025-ARM-DTSI-rk3288-Renamed-the-VPU-services-clocks.patch

@@ -1,39 +0,0 @@
-From 29ef524e8890bbfd24602a61e14234259df92349 Mon Sep 17 00:00:00 2001
-From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
-Date: Mon, 25 Jun 2018 17:05:37 +0200
-Subject: [PATCH 25/26] ARM: DTSI: rk3288: Renamed the VPU services clocks
-
-In order to conform to the naming scheme used in the whole DTSI.
-
-Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
----
- arch/arm/boot/dts/rk3288.dtsi | 6 +++---
- 1 file changed, 3 insertions(+), 3 deletions(-)
-
-diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
-index 796609e3..45ec4e89 100644
---- a/arch/arm/boot/dts/rk3288.dtsi
-+++ b/arch/arm/boot/dts/rk3288.dtsi
-@@ -1242,7 +1242,7 @@
- 			<GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
- 		interrupt-names = "irq_enc", "irq_dec";
- 		clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>;
--		clock-names = "aclk_vcodec", "hclk_vcodec";
-+		clock-names = "aclk", "iface";
- 		power-domains = <&power RK3288_PD_VIDEO>;
- 		rockchip,grf = <&grf>;
- 		resets = <&cru SRST_VCODEC_AXI>, <&cru SRST_VCODEC_AHB>;
-@@ -1277,8 +1277,8 @@
- 			<&cru SCLK_HEVC_CORE>,
- 			<&cru SCLK_HEVC_CABAC>;
- 		clock-names =
--			"aclk_vcodec",
--			"hclk_vcodec",
-+			"aclk",
-+			"iface",
- 			"clk_core",
- 			"clk_cabac";
- 		/*
--- 
-2.16.4
-

patch/kernel/rockchip-dev/need_to_be_checked/2027-ARM-dtsi-The-VPU-service-as-defined-in-the-V4L2-driv.patch

@@ -1,43 +0,0 @@
-From 7f8607ba9a20f8ddb5c24559d9b875af762d4717 Mon Sep 17 00:00:00 2001
-From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
-Date: Tue, 11 Sep 2018 02:55:55 +0200
-Subject: [PATCH] ARM: dtsi: The VPU service as defined in the V4L2 driver
-
-Let's try the V4L2 road.
-They've got a lot of things ready, like an entire H264
-movie with the V4L2 data of *every frame*.
-
-That might help in this endless endeavour.
-
-Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
----
- arch/arm/boot/dts/rk3288.dtsi | 13 ++++++++++++-
- 1 file changed, 12 insertions(+), 1 deletion(-)
-
-diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
-index 72c36af6..d23c7fa5 100644
---- a/arch/arm/boot/dts/rk3288.dtsi
-+++ b/arch/arm/boot/dts/rk3288.dtsi
-@@ -1246,7 +1246,18 @@
- 		clock-names = "aclk", "iface";
- 		power-domains = <&power RK3288_PD_VIDEO>;
- 		#iommu-cells = <0>;
--		status = "disabled";
-+	};
-+
-+	vpu: video-codec@ff9a0000 {
-+		clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>;
-+		clock-names = "aclk", "hclk";
-+		compatible = "rockchip,rk3288-vpu";
-+		interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
-+			<GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
-+		interrupt-names = "vepu", "vdpu";
-+		iommus = <&vpu_mmu>;
-+		power-domains = <&power RK3288_PD_VIDEO>;
-+		reg = <0x0 0xff9a0000 0x0 0x800>;
- 	};
- 
- 	hevc_mmu: iommu@ff9c0440 {
--- 
-2.16.4
-

patch/kernel/rockchip-dev/need_to_be_checked/3000_RK3288-Tinkerboard-add-1.7_1.8Ghz_OPP.patch

@@ -1,45 +0,0 @@
-diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
-index 2601316da..08ec7aa4b 100644
---- a/arch/arm/boot/dts/rk3288-tinker.dts
-+++ b/arch/arm/boot/dts/rk3288-tinker.dts
-@@ -210,8 +210,8 @@
- 			vdd_cpu: DCDC_REG1 {
- 				regulator-always-on;
- 				regulator-boot-on;
--				regulator-min-microvolt = <750000>;
--				regulator-max-microvolt = <1450000>;
-+				regulator-min-microvolt = <712500>;
-+				regulator-max-microvolt = <1500000>;
- 				regulator-name = "vdd_arm";
- 				regulator-ramp-delay = <6000>;
- 				regulator-state-mem {
-@@ -222,8 +222,8 @@
- 			vdd_gpu: DCDC_REG2 {
- 				regulator-always-on;
- 				regulator-boot-on;
--				regulator-min-microvolt = <850000>;
--				regulator-max-microvolt = <1250000>;
-+				regulator-min-microvolt = <712500>;
-+				regulator-max-microvolt = <1500000>;
- 				regulator-name = "vdd_gpu";
- 				regulator-ramp-delay = <6000>;
- 				regulator-state-mem {
-diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
-index 22bcaaa29..2fcd46098 100644
---- a/arch/arm/boot/dts/rk3288.dtsi
-+++ b/arch/arm/boot/dts/rk3288.dtsi
-@@ -149,6 +149,14 @@
- 			opp-hz = /bits/ 64 <1608000000>;
- 			opp-microvolt = <1350000>;
- 		};
-+		opp@1704000000 {
-+			opp-hz = /bits/ 64 <1704000000>;
-+			opp-microvolt = <1350000>;
-+		};
-+		opp@1800000000 {
-+			opp-hz = /bits/ 64 <1800000000>;
-+			opp-microvolt = <1400000>;
-+		};
- 	};
- 
- 	amba {