From 5c0c4919e734d10a8ca07f62edcabc06ca6926ba Mon Sep 17 00:00:00 2001 From: zador-blood-stained Date: Fri, 10 Feb 2017 16:39:17 +0300 Subject: [PATCH] Add LPDDR3 voltage patch for the ATF --- .../atf-set-lpddr3-dram-voltage.patch | 13 +++++++++++++ 1 file changed, 13 insertions(+) create mode 100644 patch/u-boot/u-boot-sun50i-dev/board_pine64so/atf-set-lpddr3-dram-voltage.patch diff --git a/patch/u-boot/u-boot-sun50i-dev/board_pine64so/atf-set-lpddr3-dram-voltage.patch b/patch/u-boot/u-boot-sun50i-dev/board_pine64so/atf-set-lpddr3-dram-voltage.patch new file mode 100644 index 000000000..b1ce18649 --- /dev/null +++ b/patch/u-boot/u-boot-sun50i-dev/board_pine64so/atf-set-lpddr3-dram-voltage.patch @@ -0,0 +1,13 @@ +diff --git a/arm-trusted-firmware/plat/sun50iw1p1/sunxi_power.c b/arm-trusted-firmware/plat/sun50iw1p1/sunxi_power.c +index 11badcd..f44a866 100644 +--- a/arm-trusted-firmware/plat/sun50iw1p1/sunxi_power.c ++++ b/arm-trusted-firmware/plat/sun50iw1p1/sunxi_power.c +@@ -251,7 +251,7 @@ static int pmic_setup(void) + } + } + +- sunxi_pmic_write(0x24, 0xb3); /* DCDC5 = DDR RAM voltage = 1.5V */ ++ sunxi_pmic_write(0x24, 0x25); /* DCDC5 = LPDDR RAM voltage = 1.24V */ + + return 0; + }