mirror of
https://github.com/Fishwaldo/build.git
synced 2025-03-15 19:31:42 +00:00
Bump rockchip to 5.10.y (#2570)
This commit is contained in:
parent
bd60eb7596
commit
677ac38998
57 changed files with 144 additions and 11345 deletions
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@ -1,12 +1,13 @@
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#
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# Automatically generated file; DO NOT EDIT.
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# Linux/arm 5.9.16 Kernel Configuration
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# Linux/arm 5.10.9 Kernel Configuration
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#
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CONFIG_CC_VERSION_TEXT="arm-linux-gnueabihf-gcc (GNU Toolchain for the A-profile Architecture 8.3-2019.03 (arm-rel-8.36)) 8.3.0"
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CONFIG_CC_IS_GCC=y
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CONFIG_GCC_VERSION=80300
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CONFIG_LD_VERSION=232000000
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CONFIG_CLANG_VERSION=0
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CONFIG_LLD_VERSION=0
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CONFIG_CC_CAN_LINK=y
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CONFIG_CC_CAN_LINK_STATIC=y
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CONFIG_CC_HAS_ASM_GOTO=y
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@ -58,6 +59,7 @@ CONFIG_HARDIRQS_SW_RESEND=y
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CONFIG_GENERIC_IRQ_CHIP=y
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CONFIG_IRQ_DOMAIN=y
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CONFIG_IRQ_DOMAIN_HIERARCHY=y
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CONFIG_GENERIC_IRQ_IPI=y
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CONFIG_HANDLE_DOMAIN_IRQ=y
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CONFIG_IRQ_FORCED_THREADING=y
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CONFIG_SPARSE_IRQ=y
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@ -175,6 +177,7 @@ CONFIG_RD_ZSTD=y
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# CONFIG_BOOT_CONFIG is not set
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CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y
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# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
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CONFIG_LD_ORPHAN_WARN=y
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CONFIG_SYSCTL=y
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CONFIG_HAVE_UID16=y
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CONFIG_BPF=y
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@ -460,7 +463,6 @@ CONFIG_ARCH_WANT_GENERAL_HUGETLB=y
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CONFIG_FORCE_MAX_ZONEORDER=11
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CONFIG_ALIGNMENT_TRAP=y
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# CONFIG_UACCESS_WITH_MEMCPY is not set
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CONFIG_SECCOMP=y
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# CONFIG_PARAVIRT is not set
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# CONFIG_PARAVIRT_TIME_ACCOUNTING is not set
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# CONFIG_XEN is not set
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@ -609,6 +611,7 @@ CONFIG_AS_VFP_VMRS_FPINST=y
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#
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# General architecture-dependent options
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#
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CONFIG_SET_FS=y
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# CONFIG_OPROFILE is not set
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CONFIG_HAVE_OPROFILE=y
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# CONFIG_KPROBES is not set
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@ -635,7 +638,9 @@ CONFIG_HAVE_PERF_REGS=y
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CONFIG_HAVE_PERF_USER_STACK_DUMP=y
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CONFIG_HAVE_ARCH_JUMP_LABEL=y
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CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
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CONFIG_HAVE_ARCH_SECCOMP=y
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CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
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CONFIG_SECCOMP=y
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CONFIG_SECCOMP_FILTER=y
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CONFIG_HAVE_STACKPROTECTOR=y
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CONFIG_STACKPROTECTOR=y
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@ -662,6 +667,7 @@ CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y
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CONFIG_STRICT_MODULE_RWX=y
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CONFIG_ARCH_HAS_PHYS_TO_DMA=y
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# CONFIG_LOCK_EVENT_COUNTS is not set
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CONFIG_ARCH_WANT_LD_ORPHAN_WARN=y
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#
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# GCOV-based kernel profiling
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@ -1545,6 +1551,7 @@ CONFIG_CAN_RAW=m
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CONFIG_CAN_BCM=m
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CONFIG_CAN_GW=m
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CONFIG_CAN_J1939=m
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CONFIG_CAN_ISOTP=m
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#
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# CAN Device Drivers
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@ -1578,6 +1585,8 @@ CONFIG_CAN_SOFTING=m
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#
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CONFIG_CAN_HI311X=m
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CONFIG_CAN_MCP251X=y
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CONFIG_CAN_MCP251XFD=m
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# CONFIG_CAN_MCP251XFD_SANITY is not set
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# end of CAN SPI interfaces
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#
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@ -1768,6 +1777,7 @@ CONFIG_REGMAP_W1=m
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CONFIG_REGMAP_MMIO=y
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CONFIG_REGMAP_IRQ=y
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CONFIG_REGMAP_SCCB=m
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CONFIG_REGMAP_SPI_AVMM=m
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CONFIG_DMA_SHARED_BUFFER=y
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# CONFIG_DMA_FENCE_TRACE is not set
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CONFIG_GENERIC_ARCH_TOPOLOGY=y
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@ -1801,7 +1811,6 @@ CONFIG_OF_DYNAMIC=y
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CONFIG_OF_ADDRESS=y
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CONFIG_OF_IRQ=y
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CONFIG_OF_NET=y
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CONFIG_OF_MDIO=y
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CONFIG_OF_RESERVED_MEM=y
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CONFIG_OF_RESOLVE=y
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CONFIG_OF_OVERLAY=y
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@ -1854,6 +1863,7 @@ CONFIG_BLK_DEV_RBD=m
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# CONFIG_XILINX_SDFEC is not set
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CONFIG_MISC_RTSX=m
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# CONFIG_PVPANIC is not set
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CONFIG_HISI_HIKEY_USB=m
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# CONFIG_C2PORT is not set
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#
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@ -1878,13 +1888,6 @@ CONFIG_EEPROM_93CX6=m
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# CONFIG_SENSORS_LIS3_SPI is not set
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# CONFIG_SENSORS_LIS3_I2C is not set
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# CONFIG_ALTERA_STAPL is not set
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#
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# Intel MIC & related support
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#
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# CONFIG_VOP_BUS is not set
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# end of Intel MIC & related support
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# CONFIG_ECHO is not set
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CONFIG_MISC_RTSX_USB=m
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# CONFIG_UACCE is not set
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@ -2039,6 +2042,7 @@ CONFIG_NET_DSA_MICROCHIP_KSZ8795_SPI=m
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CONFIG_NET_DSA_MV88E6XXX=m
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CONFIG_NET_DSA_MV88E6XXX_GLOBAL2=y
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# CONFIG_NET_DSA_MV88E6XXX_PTP is not set
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CONFIG_NET_DSA_MSCC_SEVILLE=m
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# CONFIG_NET_DSA_AR9331 is not set
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CONFIG_NET_DSA_SJA1105=m
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# CONFIG_NET_DSA_SJA1105_PTP is not set
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@ -2103,59 +2107,40 @@ CONFIG_STMMAC_PLATFORM=y
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# CONFIG_DWMAC_DWC_QOS_ETH is not set
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CONFIG_DWMAC_GENERIC=y
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CONFIG_DWMAC_ROCKCHIP=y
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CONFIG_DWMAC_INTEL_PLAT=m
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# CONFIG_NET_VENDOR_SYNOPSYS is not set
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# CONFIG_NET_VENDOR_VIA is not set
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# CONFIG_NET_VENDOR_WIZNET is not set
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CONFIG_NET_VENDOR_XILINX=y
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# CONFIG_XILINX_AXI_EMAC is not set
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# CONFIG_XILINX_LL_TEMAC is not set
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CONFIG_MDIO_DEVICE=y
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CONFIG_MDIO_BUS=y
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CONFIG_MDIO_DEVRES=y
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CONFIG_MDIO_BCM_UNIMAC=m
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# CONFIG_MDIO_BITBANG is not set
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CONFIG_MDIO_BUS_MUX=m
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# CONFIG_MDIO_BUS_MUX_GPIO is not set
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# CONFIG_MDIO_BUS_MUX_MMIOREG is not set
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CONFIG_MDIO_BUS_MUX_MULTIPLEXER=m
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# CONFIG_MDIO_HISI_FEMAC is not set
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# CONFIG_MDIO_IPQ4019 is not set
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# CONFIG_MDIO_IPQ8064 is not set
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CONFIG_MDIO_MSCC_MIIM=m
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# CONFIG_MDIO_MVUSB is not set
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CONFIG_MDIO_XPCS=y
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CONFIG_PHYLINK=y
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CONFIG_PHYLIB=y
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CONFIG_SWPHY=y
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CONFIG_LED_TRIGGER_PHY=y
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CONFIG_FIXED_PHY=y
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# CONFIG_SFP is not set
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#
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# MII PHY device drivers
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#
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# CONFIG_SFP is not set
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CONFIG_ADIN_PHY=m
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# CONFIG_AMD_PHY is not set
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CONFIG_ADIN_PHY=m
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# CONFIG_AQUANTIA_PHY is not set
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CONFIG_AX88796B_PHY=m
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CONFIG_BCM7XXX_PHY=m
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# CONFIG_BCM87XX_PHY is not set
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CONFIG_BCM_NET_PHYLIB=m
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# CONFIG_BROADCOM_PHY is not set
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# CONFIG_BCM54140_PHY is not set
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CONFIG_BCM7XXX_PHY=m
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# CONFIG_BCM84881_PHY is not set
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# CONFIG_BCM87XX_PHY is not set
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CONFIG_BCM_NET_PHYLIB=m
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# CONFIG_CICADA_PHY is not set
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# CONFIG_CORTINA_PHY is not set
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# CONFIG_DAVICOM_PHY is not set
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# CONFIG_DP83822_PHY is not set
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CONFIG_DP83TC811_PHY=m
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# CONFIG_DP83848_PHY is not set
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# CONFIG_DP83867_PHY is not set
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CONFIG_DP83869_PHY=m
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CONFIG_FIXED_PHY=y
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# CONFIG_ICPLUS_PHY is not set
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# CONFIG_LXT_PHY is not set
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# CONFIG_INTEL_XWAY_PHY is not set
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# CONFIG_LSI_ET1011C_PHY is not set
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# CONFIG_LXT_PHY is not set
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# CONFIG_MARVELL_PHY is not set
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# CONFIG_MARVELL_10G_PHY is not set
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# CONFIG_MICREL_PHY is not set
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@ -2169,12 +2154,44 @@ CONFIG_MICROCHIP_T1_PHY=m
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CONFIG_REALTEK_PHY=m
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# CONFIG_RENESAS_PHY is not set
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CONFIG_ROCKCHIP_PHY=y
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# CONFIG_SMSC_PHY is not set
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CONFIG_SMSC_PHY=m
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# CONFIG_STE10XP is not set
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# CONFIG_TERANETICS_PHY is not set
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# CONFIG_DP83822_PHY is not set
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CONFIG_DP83TC811_PHY=m
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# CONFIG_DP83848_PHY is not set
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# CONFIG_DP83867_PHY is not set
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CONFIG_DP83869_PHY=m
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CONFIG_VITESSE_PHY=m
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# CONFIG_XILINX_GMII2RGMII is not set
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# CONFIG_MICREL_KS8995MA is not set
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CONFIG_MDIO_DEVICE=y
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CONFIG_MDIO_BUS=y
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CONFIG_OF_MDIO=y
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CONFIG_MDIO_DEVRES=y
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# CONFIG_MDIO_BITBANG is not set
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CONFIG_MDIO_BCM_UNIMAC=m
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# CONFIG_MDIO_HISI_FEMAC is not set
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# CONFIG_MDIO_MVUSB is not set
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CONFIG_MDIO_MSCC_MIIM=m
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# CONFIG_MDIO_IPQ4019 is not set
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# CONFIG_MDIO_IPQ8064 is not set
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#
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# MDIO Multiplexers
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#
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CONFIG_MDIO_BUS_MUX=m
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# CONFIG_MDIO_BUS_MUX_GPIO is not set
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CONFIG_MDIO_BUS_MUX_MULTIPLEXER=m
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# CONFIG_MDIO_BUS_MUX_MMIOREG is not set
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#
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# PCS device drivers
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#
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CONFIG_PCS_XPCS=y
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CONFIG_PCS_LYNX=m
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# end of PCS device drivers
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CONFIG_PPP=m
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CONFIG_PPP_BSDCOMP=m
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CONFIG_PPP_DEFLATE=m
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@ -2272,6 +2289,10 @@ CONFIG_ATH10K_USB=m
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# CONFIG_ATH10K_TRACING is not set
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CONFIG_WCN36XX=m
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# CONFIG_WCN36XX_DEBUGFS is not set
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CONFIG_ATH11K=m
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# CONFIG_ATH11K_DEBUG is not set
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# CONFIG_ATH11K_DEBUGFS is not set
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# CONFIG_ATH11K_TRACING is not set
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CONFIG_WLAN_VENDOR_ATMEL=y
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CONFIG_AT76C50X_USB=m
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CONFIG_WLAN_VENDOR_BROADCOM=y
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@ -2458,6 +2479,7 @@ CONFIG_MOUSE_ELAN_I2C_I2C=y
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CONFIG_INPUT_JOYSTICK=y
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# CONFIG_JOYSTICK_ANALOG is not set
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# CONFIG_JOYSTICK_A3D is not set
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# CONFIG_JOYSTICK_ADC is not set
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# CONFIG_JOYSTICK_ADI is not set
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# CONFIG_JOYSTICK_COBRA is not set
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# CONFIG_JOYSTICK_GF2K is not set
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@ -2578,6 +2600,7 @@ CONFIG_TOUCHSCREEN_ZET6223=m
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# CONFIG_TOUCHSCREEN_ZFORCE is not set
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# CONFIG_TOUCHSCREEN_ROHM_BU21023 is not set
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CONFIG_TOUCHSCREEN_IQS5XX=m
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CONFIG_TOUCHSCREEN_ZINITIX=m
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CONFIG_INPUT_MISC=y
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# CONFIG_INPUT_AD714X is not set
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# CONFIG_INPUT_ATMEL_CAPTOUCH is not set
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@ -2621,6 +2644,7 @@ CONFIG_RMI4_F11=y
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CONFIG_RMI4_F12=y
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CONFIG_RMI4_F30=y
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# CONFIG_RMI4_F34 is not set
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# CONFIG_RMI4_F3A is not set
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# CONFIG_RMI4_F54 is not set
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# CONFIG_RMI4_F55 is not set
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@ -2723,6 +2747,7 @@ CONFIG_HW_RANDOM=y
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CONFIG_HW_RANDOM_BA431=m
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CONFIG_HW_RANDOM_VIRTIO=m
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# CONFIG_HW_RANDOM_CCTRNG is not set
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CONFIG_HW_RANDOM_XIPHERA=m
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CONFIG_DEVMEM=y
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# CONFIG_DEVKMEM is not set
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# CONFIG_RAW_DRIVER is not set
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@ -2888,6 +2913,12 @@ CONFIG_PINCTRL_ROCKCHIP=y
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CONFIG_PINCTRL_STMFX=m
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# CONFIG_PINCTRL_RK805 is not set
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# CONFIG_PINCTRL_OCELOT is not set
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#
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# Renesas pinctrl drivers
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#
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# end of Renesas pinctrl drivers
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CONFIG_PINCTRL_MADERA=m
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CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
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CONFIG_GPIOLIB=y
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@ -2896,6 +2927,8 @@ CONFIG_OF_GPIO=y
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CONFIG_GPIOLIB_IRQCHIP=y
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CONFIG_DEBUG_GPIO=y
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CONFIG_GPIO_SYSFS=y
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CONFIG_GPIO_CDEV=y
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CONFIG_GPIO_CDEV_V1=y
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CONFIG_GPIO_GENERIC=y
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#
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@ -3000,9 +3033,6 @@ CONFIG_W1_SLAVE_DS2781=m
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# CONFIG_W1_SLAVE_DS28E17 is not set
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# end of 1-wire Slaves
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|
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CONFIG_POWER_AVS=y
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# CONFIG_QCOM_CPR is not set
|
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CONFIG_ROCKCHIP_IODOMAIN=y
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CONFIG_POWER_RESET=y
|
||||
# CONFIG_POWER_RESET_BRCMKONA is not set
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# CONFIG_POWER_RESET_BRCMSTB is not set
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|
@ -3029,7 +3059,6 @@ CONFIG_BATTERY_DS2760=m
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# CONFIG_BATTERY_DS2780 is not set
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# CONFIG_BATTERY_DS2781 is not set
|
||||
# CONFIG_BATTERY_DS2782 is not set
|
||||
# CONFIG_BATTERY_LEGO_EV3 is not set
|
||||
CONFIG_BATTERY_SBS=y
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||||
# CONFIG_CHARGER_SBS is not set
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# CONFIG_MANAGER_SBS is not set
|
||||
|
@ -3037,6 +3066,7 @@ CONFIG_BATTERY_SBS=y
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|||
# CONFIG_BATTERY_MAX17040 is not set
|
||||
# CONFIG_BATTERY_MAX17042 is not set
|
||||
CONFIG_BATTERY_MAX1721X=m
|
||||
CONFIG_CHARGER_ISP1704=m
|
||||
# CONFIG_CHARGER_MAX8903 is not set
|
||||
# CONFIG_CHARGER_LP8727 is not set
|
||||
CONFIG_CHARGER_GPIO=y
|
||||
|
@ -3045,10 +3075,12 @@ CONFIG_CHARGER_LT3651=m
|
|||
# CONFIG_CHARGER_DETECTOR_MAX14656 is not set
|
||||
CONFIG_CHARGER_MAX77650=m
|
||||
# CONFIG_CHARGER_BQ2415X is not set
|
||||
CONFIG_CHARGER_BQ24190=m
|
||||
# CONFIG_CHARGER_BQ24257 is not set
|
||||
CONFIG_CHARGER_BQ24735=y
|
||||
CONFIG_CHARGER_BQ2515X=m
|
||||
# CONFIG_CHARGER_BQ25890 is not set
|
||||
CONFIG_CHARGER_BQ25980=m
|
||||
# CONFIG_CHARGER_SMB347 is not set
|
||||
# CONFIG_BATTERY_GAUGE_LTC2941 is not set
|
||||
# CONFIG_CHARGER_RT9455 is not set
|
||||
|
@ -3128,6 +3160,7 @@ CONFIG_SENSORS_MAX6697=m
|
|||
CONFIG_SENSORS_MAX31790=m
|
||||
CONFIG_SENSORS_MCP3021=m
|
||||
# CONFIG_SENSORS_TC654 is not set
|
||||
CONFIG_SENSORS_MR75203=m
|
||||
CONFIG_SENSORS_ADCXX=m
|
||||
CONFIG_SENSORS_LM63=m
|
||||
CONFIG_SENSORS_LM70=m
|
||||
|
@ -3200,6 +3233,7 @@ CONFIG_SENSORS_W83L785TS=m
|
|||
CONFIG_SENSORS_W83L786NG=m
|
||||
CONFIG_SENSORS_W83627HF=m
|
||||
CONFIG_SENSORS_W83627EHF=m
|
||||
CONFIG_SENSORS_INTEL_M10_BMC_HWMON=m
|
||||
CONFIG_THERMAL=y
|
||||
# CONFIG_THERMAL_NETLINK is not set
|
||||
# CONFIG_THERMAL_STATISTICS is not set
|
||||
|
@ -3376,6 +3410,7 @@ CONFIG_MFD_STPMIC1=m
|
|||
CONFIG_MFD_STMFX=m
|
||||
CONFIG_MFD_KHADAS_MCU=m
|
||||
# CONFIG_RAVE_SP_CORE is not set
|
||||
CONFIG_MFD_INTEL_M10_BMC=m
|
||||
# end of Multifunction device drivers
|
||||
|
||||
CONFIG_REGULATOR=y
|
||||
|
@ -3423,8 +3458,11 @@ CONFIG_REGULATOR_PCA9450=m
|
|||
# CONFIG_REGULATOR_PV88080 is not set
|
||||
# CONFIG_REGULATOR_PV88090 is not set
|
||||
CONFIG_REGULATOR_PWM=y
|
||||
CONFIG_REGULATOR_RASPBERRYPI_TOUCHSCREEN_ATTINY=m
|
||||
CONFIG_REGULATOR_RK808=y
|
||||
CONFIG_REGULATOR_ROHM=m
|
||||
CONFIG_REGULATOR_RT4801=m
|
||||
CONFIG_REGULATOR_RTMV20=m
|
||||
# CONFIG_REGULATOR_SLG51000 is not set
|
||||
# CONFIG_REGULATOR_STPMIC1 is not set
|
||||
# CONFIG_REGULATOR_SY8106A is not set
|
||||
|
@ -4214,6 +4252,7 @@ CONFIG_DRM_VKMS=m
|
|||
# CONFIG_DRM_EXYNOS is not set
|
||||
CONFIG_DRM_ROCKCHIP=y
|
||||
# CONFIG_ROCKCHIP_ANALOGIX_DP is not set
|
||||
# CONFIG_ROCKCHIP_CDN_DP is not set
|
||||
CONFIG_ROCKCHIP_DW_HDMI=y
|
||||
# CONFIG_ROCKCHIP_DW_MIPI_DSI is not set
|
||||
# CONFIG_ROCKCHIP_INNO_HDMI is not set
|
||||
|
@ -4226,7 +4265,6 @@ CONFIG_DRM_UDL=y
|
|||
CONFIG_DRM_RCAR_LVDS=m
|
||||
# CONFIG_DRM_OMAP is not set
|
||||
# CONFIG_DRM_TILCDC is not set
|
||||
CONFIG_DRM_VIRTIO_GPU=m
|
||||
# CONFIG_DRM_FSL_DCU is not set
|
||||
# CONFIG_DRM_STM is not set
|
||||
CONFIG_DRM_PANEL=y
|
||||
|
@ -4256,6 +4294,7 @@ CONFIG_DRM_PANEL_LG_LB035Q02=m
|
|||
CONFIG_DRM_PANEL_NEC_NL8048HL11=m
|
||||
# CONFIG_DRM_PANEL_NOVATEK_NT35510 is not set
|
||||
CONFIG_DRM_PANEL_NOVATEK_NT39016=m
|
||||
CONFIG_DRM_PANEL_MANTIX_MLAF057WE51=m
|
||||
# CONFIG_DRM_PANEL_OLIMEX_LCD_OLINUXINO is not set
|
||||
CONFIG_DRM_PANEL_ORISETECH_OTM8009A=m
|
||||
# CONFIG_DRM_PANEL_OSD_OSD101T2587_53TS is not set
|
||||
|
@ -4296,6 +4335,7 @@ CONFIG_DRM_PANEL_BRIDGE=y
|
|||
CONFIG_DRM_CDNS_DSI=m
|
||||
# CONFIG_DRM_CHRONTEL_CH7033 is not set
|
||||
CONFIG_DRM_DISPLAY_CONNECTOR=y
|
||||
CONFIG_DRM_LONTIUM_LT9611=m
|
||||
# CONFIG_DRM_LVDS_CODEC is not set
|
||||
# CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW is not set
|
||||
# CONFIG_DRM_NWL_MIPI_DSI is not set
|
||||
|
@ -4307,15 +4347,18 @@ CONFIG_DRM_SIL_SII8620=m
|
|||
# CONFIG_DRM_SII9234 is not set
|
||||
CONFIG_DRM_SIMPLE_BRIDGE=y
|
||||
CONFIG_DRM_THINE_THC63LVD1024=m
|
||||
CONFIG_DRM_TOSHIBA_TC358762=m
|
||||
CONFIG_DRM_TOSHIBA_TC358764=m
|
||||
# CONFIG_DRM_TOSHIBA_TC358767 is not set
|
||||
# CONFIG_DRM_TOSHIBA_TC358768 is not set
|
||||
CONFIG_DRM_TOSHIBA_TC358775=m
|
||||
# CONFIG_DRM_TI_TFP410 is not set
|
||||
# CONFIG_DRM_TI_SN65DSI86 is not set
|
||||
# CONFIG_DRM_TI_TPD12S015 is not set
|
||||
# CONFIG_DRM_ANALOGIX_ANX6345 is not set
|
||||
# CONFIG_DRM_ANALOGIX_ANX78XX is not set
|
||||
# CONFIG_DRM_I2C_ADV7511 is not set
|
||||
CONFIG_DRM_CDNS_MHDP8546=m
|
||||
CONFIG_DRM_DW_HDMI=y
|
||||
# CONFIG_DRM_DW_HDMI_AHB_AUDIO is not set
|
||||
CONFIG_DRM_DW_HDMI_I2S_AUDIO=m
|
||||
|
@ -4386,6 +4429,7 @@ CONFIG_FB_MODE_HELPERS=y
|
|||
#
|
||||
# CONFIG_LCD_CLASS_DEVICE is not set
|
||||
CONFIG_BACKLIGHT_CLASS_DEVICE=y
|
||||
CONFIG_BACKLIGHT_KTD253=m
|
||||
CONFIG_BACKLIGHT_PWM=y
|
||||
CONFIG_BACKLIGHT_QCOM_WLED=m
|
||||
# CONFIG_BACKLIGHT_ADP8860 is not set
|
||||
|
@ -4558,6 +4602,7 @@ CONFIG_SND_SOC_CS35L36=m
|
|||
# CONFIG_SND_SOC_CS42L52 is not set
|
||||
# CONFIG_SND_SOC_CS42L56 is not set
|
||||
# CONFIG_SND_SOC_CS42L73 is not set
|
||||
CONFIG_SND_SOC_CS4234=m
|
||||
# CONFIG_SND_SOC_CS4265 is not set
|
||||
# CONFIG_SND_SOC_CS4270 is not set
|
||||
# CONFIG_SND_SOC_CS4271_I2C is not set
|
||||
|
@ -4621,6 +4666,7 @@ CONFIG_SND_SOC_SSM2305=m
|
|||
# CONFIG_SND_SOC_STI_SAS is not set
|
||||
# CONFIG_SND_SOC_TAS2552 is not set
|
||||
CONFIG_SND_SOC_TAS2562=m
|
||||
CONFIG_SND_SOC_TAS2764=m
|
||||
CONFIG_SND_SOC_TAS2770=m
|
||||
# CONFIG_SND_SOC_TAS5086 is not set
|
||||
# CONFIG_SND_SOC_TAS571X is not set
|
||||
|
@ -4725,6 +4771,7 @@ CONFIG_HID_GFRM=m
|
|||
CONFIG_HID_HOLTEK=m
|
||||
CONFIG_HOLTEK_FF=y
|
||||
CONFIG_HID_GOOGLE_HAMMER=m
|
||||
CONFIG_HID_VIVALDI=m
|
||||
CONFIG_HID_GT683R=m
|
||||
CONFIG_HID_KEYTOUCH=m
|
||||
CONFIG_HID_KYE=m
|
||||
|
@ -4831,6 +4878,7 @@ CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
|
|||
# Miscellaneous USB options
|
||||
#
|
||||
# CONFIG_USB_DEFAULT_PERSIST is not set
|
||||
# CONFIG_USB_FEW_INIT_RETRIES is not set
|
||||
# CONFIG_USB_DYNAMIC_MINORS is not set
|
||||
CONFIG_USB_OTG=y
|
||||
# CONFIG_USB_OTG_PRODUCTLIST is not set
|
||||
|
@ -5014,6 +5062,7 @@ CONFIG_USB_HUB_USB251XB=m
|
|||
#
|
||||
# USB Physical Layer drivers
|
||||
#
|
||||
CONFIG_USB_PHY=y
|
||||
# CONFIG_NOP_USB_XCEIV is not set
|
||||
# CONFIG_USB_GPIO_VBUS is not set
|
||||
# CONFIG_USB_ISP1301 is not set
|
||||
|
@ -5101,7 +5150,7 @@ CONFIG_USB_G_HID=m
|
|||
# end of USB Gadget precomposed configurations
|
||||
|
||||
# CONFIG_TYPEC is not set
|
||||
CONFIG_USB_ROLE_SWITCH=m
|
||||
CONFIG_USB_ROLE_SWITCH=y
|
||||
CONFIG_MMC=y
|
||||
CONFIG_PWRSEQ_EMMC=y
|
||||
CONFIG_PWRSEQ_SD8787=m
|
||||
|
@ -5169,6 +5218,7 @@ CONFIG_LEDS_LM3532=m
|
|||
CONFIG_LEDS_GPIO=y
|
||||
# CONFIG_LEDS_LP3944 is not set
|
||||
# CONFIG_LEDS_LP3952 is not set
|
||||
CONFIG_LEDS_LP50XX=m
|
||||
CONFIG_LEDS_LP55XX_COMMON=m
|
||||
# CONFIG_LEDS_LP5521 is not set
|
||||
# CONFIG_LEDS_LP5523 is not set
|
||||
|
@ -5278,6 +5328,7 @@ CONFIG_RTC_DRV_RX8581=m
|
|||
CONFIG_RTC_DRV_RX8025=m
|
||||
CONFIG_RTC_DRV_EM3027=m
|
||||
CONFIG_RTC_DRV_RV3028=m
|
||||
CONFIG_RTC_DRV_RV3032=m
|
||||
CONFIG_RTC_DRV_RV8803=m
|
||||
CONFIG_RTC_DRV_SD3078=m
|
||||
|
||||
|
@ -5479,9 +5530,7 @@ CONFIG_STAGING_MEDIA=y
|
|||
CONFIG_VIDEO_HANTRO=m
|
||||
CONFIG_VIDEO_HANTRO_ROCKCHIP=y
|
||||
CONFIG_VIDEO_ROCKCHIP_VDEC=m
|
||||
CONFIG_PHY_ROCKCHIP_DPHY_RX0=m
|
||||
CONFIG_VIDEO_ROCKCHIP_ISP1=m
|
||||
CONFIG_VIDEO_USBVISION=m
|
||||
|
||||
#
|
||||
# Android
|
||||
|
@ -5543,7 +5592,6 @@ CONFIG_ARCX_ANYBUS_CONTROLLER=m
|
|||
CONFIG_HMS_PROFINET=m
|
||||
CONFIG_WFX=m
|
||||
# CONFIG_GOLDFISH is not set
|
||||
CONFIG_MFD_CROS_EC=y
|
||||
CONFIG_CHROME_PLATFORMS=y
|
||||
CONFIG_CROS_EC=y
|
||||
# CONFIG_CROS_EC_I2C is not set
|
||||
|
@ -5562,7 +5610,6 @@ CONFIG_HAVE_CLK=y
|
|||
CONFIG_CLKDEV_LOOKUP=y
|
||||
CONFIG_HAVE_CLK_PREPARE=y
|
||||
CONFIG_COMMON_CLK=y
|
||||
# CONFIG_CLK_HSDK is not set
|
||||
CONFIG_COMMON_CLK_MAX9485=m
|
||||
CONFIG_COMMON_CLK_RK808=y
|
||||
# CONFIG_COMMON_CLK_SI5341 is not set
|
||||
|
@ -5578,6 +5625,18 @@ CONFIG_COMMON_CLK_SI544=m
|
|||
CONFIG_COMMON_CLK_VC5=m
|
||||
# CONFIG_COMMON_CLK_BD718XX is not set
|
||||
# CONFIG_COMMON_CLK_FIXED_MMIO is not set
|
||||
CONFIG_COMMON_CLK_ROCKCHIP=y
|
||||
CONFIG_CLK_PX30=y
|
||||
CONFIG_CLK_RV110X=y
|
||||
CONFIG_CLK_RK3036=y
|
||||
CONFIG_CLK_RK312X=y
|
||||
CONFIG_CLK_RK3188=y
|
||||
CONFIG_CLK_RK322X=y
|
||||
CONFIG_CLK_RK3288=y
|
||||
CONFIG_CLK_RK3308=y
|
||||
CONFIG_CLK_RK3328=y
|
||||
CONFIG_CLK_RK3368=y
|
||||
CONFIG_CLK_RK3399=y
|
||||
# CONFIG_HWSPINLOCK is not set
|
||||
|
||||
#
|
||||
|
@ -5664,9 +5723,11 @@ CONFIG_ROCKCHIP_IOMMU=y
|
|||
#
|
||||
# Qualcomm SoC drivers
|
||||
#
|
||||
CONFIG_QCOM_QMI_HELPERS=m
|
||||
# end of Qualcomm SoC drivers
|
||||
|
||||
CONFIG_ROCKCHIP_GRF=y
|
||||
CONFIG_ROCKCHIP_IODOMAIN=y
|
||||
CONFIG_ROCKCHIP_PM_DOMAINS=y
|
||||
# CONFIG_SOC_TI is not set
|
||||
|
||||
|
@ -5693,13 +5754,28 @@ CONFIG_DEVFREQ_GOV_USERSPACE=y
|
|||
#
|
||||
# CONFIG_ARM_RK3399_DMC_DEVFREQ is not set
|
||||
# CONFIG_PM_DEVFREQ_EVENT is not set
|
||||
# CONFIG_EXTCON is not set
|
||||
CONFIG_EXTCON=y
|
||||
|
||||
#
|
||||
# Extcon Device Drivers
|
||||
#
|
||||
CONFIG_EXTCON_ADC_JACK=m
|
||||
CONFIG_EXTCON_FSA9480=m
|
||||
CONFIG_EXTCON_GPIO=m
|
||||
CONFIG_EXTCON_MAX3355=m
|
||||
CONFIG_EXTCON_PTN5150=m
|
||||
CONFIG_EXTCON_RT8973A=m
|
||||
CONFIG_EXTCON_SM5502=m
|
||||
CONFIG_EXTCON_USB_GPIO=m
|
||||
CONFIG_EXTCON_USBC_CROS_EC=m
|
||||
CONFIG_MEMORY=y
|
||||
# CONFIG_ARM_PL172_MPMC is not set
|
||||
CONFIG_PL353_SMC=y
|
||||
CONFIG_IIO=y
|
||||
CONFIG_IIO_BUFFER=y
|
||||
CONFIG_IIO_BUFFER_CB=m
|
||||
CONFIG_IIO_BUFFER_DMA=m
|
||||
CONFIG_IIO_BUFFER_DMAENGINE=m
|
||||
# CONFIG_IIO_BUFFER_HW_CONSUMER is not set
|
||||
CONFIG_IIO_KFIFO_BUF=y
|
||||
CONFIG_IIO_TRIGGERED_BUFFER=y
|
||||
|
@ -5708,6 +5784,7 @@ CONFIG_IIO_TRIGGER=y
|
|||
CONFIG_IIO_CONSUMERS_PER_TRIGGER=2
|
||||
# CONFIG_IIO_SW_DEVICE is not set
|
||||
# CONFIG_IIO_SW_TRIGGER is not set
|
||||
CONFIG_IIO_TRIGGERED_EVENT=m
|
||||
|
||||
#
|
||||
# Accelerometers
|
||||
|
@ -5927,6 +6004,7 @@ CONFIG_TI_DAC7612=m
|
|||
# CONFIG_ADIS16130 is not set
|
||||
# CONFIG_ADIS16136 is not set
|
||||
# CONFIG_ADIS16260 is not set
|
||||
CONFIG_ADXRS290=m
|
||||
# CONFIG_ADXRS450 is not set
|
||||
# CONFIG_BMG160 is not set
|
||||
CONFIG_FXAS21002C=m
|
||||
|
@ -5958,6 +6036,7 @@ CONFIG_MAX30102=m
|
|||
# CONFIG_AM2315 is not set
|
||||
# CONFIG_DHT11 is not set
|
||||
# CONFIG_HDC100X is not set
|
||||
CONFIG_HDC2010=m
|
||||
CONFIG_HID_SENSOR_HUMIDITY=m
|
||||
# CONFIG_HTS221 is not set
|
||||
# CONFIG_HTU21 is not set
|
||||
|
@ -5998,6 +6077,7 @@ CONFIG_ADUX1020=m
|
|||
# CONFIG_AL3320A is not set
|
||||
# CONFIG_APDS9300 is not set
|
||||
# CONFIG_APDS9960 is not set
|
||||
CONFIG_AS73211=m
|
||||
# CONFIG_BH1750 is not set
|
||||
# CONFIG_BH1780 is not set
|
||||
# CONFIG_CM32181 is not set
|
||||
|
@ -6199,6 +6279,7 @@ CONFIG_RESET_CONTROLLER=y
|
|||
#
|
||||
CONFIG_GENERIC_PHY=y
|
||||
CONFIG_GENERIC_PHY_MIPI_DPHY=y
|
||||
CONFIG_USB_LGM_PHY=m
|
||||
# CONFIG_BCM_KONA_USB2_PHY is not set
|
||||
# CONFIG_PHY_CADENCE_TORRENT is not set
|
||||
CONFIG_PHY_CADENCE_DPHY=m
|
||||
|
@ -6212,8 +6293,10 @@ CONFIG_PHY_CADENCE_DPHY=m
|
|||
CONFIG_PHY_MAPPHONE_MDM6600=m
|
||||
# CONFIG_PHY_OCELOT_SERDES is not set
|
||||
CONFIG_PHY_ROCKCHIP_DP=y
|
||||
CONFIG_PHY_ROCKCHIP_DPHY_RX0=m
|
||||
CONFIG_PHY_ROCKCHIP_EMMC=y
|
||||
# CONFIG_PHY_ROCKCHIP_INNO_HDMI is not set
|
||||
CONFIG_PHY_ROCKCHIP_INNO_USB2=m
|
||||
CONFIG_PHY_ROCKCHIP_INNO_DSIDPHY=m
|
||||
# CONFIG_PHY_ROCKCHIP_PCIE is not set
|
||||
# CONFIG_PHY_ROCKCHIP_TYPEC is not set
|
||||
|
@ -6277,6 +6360,7 @@ CONFIG_PM_OPP=y
|
|||
# CONFIG_COUNTER is not set
|
||||
CONFIG_MOST=m
|
||||
CONFIG_MOST_USB_HDM=m
|
||||
CONFIG_MOST_CDEV=m
|
||||
# end of Device Drivers
|
||||
|
||||
#
|
||||
|
@ -6307,6 +6391,7 @@ CONFIG_JFS_FS=m
|
|||
# CONFIG_JFS_DEBUG is not set
|
||||
# CONFIG_JFS_STATISTICS is not set
|
||||
CONFIG_XFS_FS=y
|
||||
CONFIG_XFS_SUPPORT_V4=y
|
||||
CONFIG_XFS_QUOTA=y
|
||||
CONFIG_XFS_POSIX_ACL=y
|
||||
CONFIG_XFS_RT=y
|
||||
|
@ -6520,6 +6605,7 @@ CONFIG_NFS_FSCACHE=y
|
|||
# CONFIG_NFS_USE_LEGACY_DNS is not set
|
||||
CONFIG_NFS_USE_KERNEL_DNS=y
|
||||
CONFIG_NFS_DISABLE_UDP_SUPPORT=y
|
||||
# CONFIG_NFS_V4_2_READ_PLUS is not set
|
||||
CONFIG_NFSD=m
|
||||
CONFIG_NFSD_V2_ACL=y
|
||||
CONFIG_NFSD_V3=y
|
||||
|
@ -6712,6 +6798,7 @@ CONFIG_CRYPTO_DH=m
|
|||
CONFIG_CRYPTO_ECC=y
|
||||
CONFIG_CRYPTO_ECDH=y
|
||||
CONFIG_CRYPTO_ECRDSA=m
|
||||
CONFIG_CRYPTO_SM2=m
|
||||
CONFIG_CRYPTO_CURVE25519=m
|
||||
|
||||
#
|
||||
|
@ -6826,7 +6913,9 @@ CONFIG_CRYPTO_USER_API=m
|
|||
CONFIG_CRYPTO_USER_API_HASH=m
|
||||
CONFIG_CRYPTO_USER_API_SKCIPHER=m
|
||||
CONFIG_CRYPTO_USER_API_RNG=m
|
||||
# CONFIG_CRYPTO_USER_API_RNG_CAVP is not set
|
||||
CONFIG_CRYPTO_USER_API_AEAD=m
|
||||
CONFIG_CRYPTO_USER_API_ENABLE_OBSOLETE=y
|
||||
# CONFIG_CRYPTO_STATS is not set
|
||||
CONFIG_CRYPTO_HASH_INFO=y
|
||||
|
||||
|
@ -6962,6 +7051,7 @@ CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS=y
|
|||
CONFIG_DMA_NONCOHERENT_MMAP=y
|
||||
CONFIG_DMA_REMAP=y
|
||||
CONFIG_DMA_CMA=y
|
||||
# CONFIG_DMA_PERNUMA_CMA is not set
|
||||
|
||||
#
|
||||
# Default contiguous memory area size:
|
||||
|
@ -7124,6 +7214,7 @@ CONFIG_DEBUG_SPINLOCK=y
|
|||
# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
|
||||
# CONFIG_LOCK_TORTURE_TEST is not set
|
||||
# CONFIG_WW_MUTEX_SELFTEST is not set
|
||||
CONFIG_SCF_TORTURE_TEST=m
|
||||
# end of Lock Debugging (spinlocks, mutexes, etc...)
|
||||
|
||||
CONFIG_STACKTRACE=y
|
||||
|
@ -7146,7 +7237,7 @@ CONFIG_DEBUG_CREDENTIALS=y
|
|||
# RCU Debugging
|
||||
#
|
||||
CONFIG_TORTURE_TEST=m
|
||||
# CONFIG_RCU_PERF_TEST is not set
|
||||
# CONFIG_RCU_SCALE_TEST is not set
|
||||
# CONFIG_RCU_TORTURE_TEST is not set
|
||||
CONFIG_RCU_REF_SCALE_TEST=m
|
||||
CONFIG_RCU_CPU_STALL_TIMEOUT=60
|
||||
|
|
File diff suppressed because it is too large
Load diff
1
config/kernel/linux-rockchip-dev.config
Symbolic link
1
config/kernel/linux-rockchip-dev.config
Symbolic link
|
@ -0,0 +1 @@
|
|||
linux-rockchip-current.config
|
|
@ -26,7 +26,7 @@ case $BRANCH in
|
|||
|
||||
current)
|
||||
|
||||
KERNELBRANCH='branch:linux-5.9.y'
|
||||
KERNELBRANCH='branch:linux-5.10.y'
|
||||
|
||||
;;
|
||||
|
||||
|
|
|
@ -43,4 +43,3 @@ index a1c3cdaa..0e383595 100644
|
|||
label = "miqi:green:user";
|
||||
--
|
||||
2.11.0
|
||||
|
||||
|
|
|
@ -1,40 +0,0 @@
|
|||
From 5b99ce41a35e7ddd0d4681990613ec9195a5acc0 Mon Sep 17 00:00:00 2001
|
||||
From: =?UTF-8?q?=C5=81ukasz?= <lukasz@czak.pl>
|
||||
Date: Thu, 7 May 2020 11:54:26 +0200
|
||||
Subject: [PATCH 2/3] Use 340000 as fallback max_tmds_clock
|
||||
|
||||
If connector->display_info->max_tmds_clock is 0, fall back to 340000.
|
||||
|
||||
If it is > 0 though, shouldn't it take priority, and instead of max be
|
||||
`min(info->max_tmds_clock, 165000)`?
|
||||
---
|
||||
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 7 +++++--
|
||||
1 file changed, 5 insertions(+), 2 deletions(-)
|
||||
|
||||
diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
|
||||
index 955fc3cf4..f95cdc53a 100644
|
||||
--- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
|
||||
+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
|
||||
@@ -220,14 +220,17 @@ dw_hdmi_rockchip_mode_valid(struct drm_connector *connector,
|
||||
const struct drm_display_mode *mode)
|
||||
{
|
||||
struct drm_display_info *info = &connector->display_info;
|
||||
- int max_tmds_clock = max(info->max_tmds_clock, 165000);
|
||||
+ int max_tmds_clock = info->max_tmds_clock > 0 ?
|
||||
+ max(info->max_tmds_clock, 165000) :
|
||||
+ 340000;
|
||||
+
|
||||
int clock = mode->clock;
|
||||
|
||||
if (connector->ycbcr_420_allowed && drm_mode_is_420(info, mode) &&
|
||||
(info->color_formats & DRM_COLOR_FORMAT_YCRCB420))
|
||||
clock /= 2;
|
||||
|
||||
- if (clock > max_tmds_clock || clock > 340000)
|
||||
+ if (clock > max_tmds_clock)
|
||||
return MODE_CLOCK_HIGH;
|
||||
|
||||
return MODE_OK;
|
||||
--
|
||||
2.26.2
|
||||
|
1
patch/kernel/rockchip-dev
Symbolic link
1
patch/kernel/rockchip-dev
Symbolic link
|
@ -0,0 +1 @@
|
|||
rockchip-current
|
|
@ -1,74 +0,0 @@
|
|||
Patches act8846 regulator providing the proper reset handle and exploit
|
||||
the SIPC bit in GLB_POWER_OFF register. Mainly used to reset some rockchip
|
||||
boards.
|
||||
|
||||
Origin: <https://patchwork.kernel.org/patch/6409521/>
|
||||
|
||||
diff --git a/drivers/regulator/act8865-regulator.c b/drivers/regulator/act8865-regulator.c
|
||||
index 2ff73d7..836d10b 100644
|
||||
--- a/drivers/regulator/act8865-regulator.c
|
||||
+++ b/drivers/regulator/act8865-regulator.c
|
||||
@@ -27,6 +27,7 @@
|
||||
#include <linux/regulator/of_regulator.h>
|
||||
#include <linux/regmap.h>
|
||||
#include <dt-bindings/regulator/active-semi,8865-regulator.h>
|
||||
+#include <linux/reboot.h>
|
||||
|
||||
/*
|
||||
* ACT8600 Global Register Map.
|
||||
@@ -133,6 +134,8 @@
|
||||
#define ACT8865_VOLTAGE_NUM 64
|
||||
#define ACT8600_SUDCDC_VOLTAGE_NUM 255
|
||||
|
||||
+#define ACT8846_SIPC_MASK 0x01
|
||||
+
|
||||
struct act8865 {
|
||||
struct regmap *regmap;
|
||||
int off_reg;
|
||||
@@ -402,6 +405,22 @@ static void act8865_power_off(void)
|
||||
while (1);
|
||||
}
|
||||
|
||||
+static int act8846_power_cycle(struct notifier_block *this,
|
||||
+ unsigned long code, void *unused)
|
||||
+{
|
||||
+ struct act8865 *act8846;
|
||||
+
|
||||
+ act8846 = i2c_get_clientdata(act8865_i2c_client);
|
||||
+ regmap_write(act8846->regmap, ACT8846_GLB_OFF_CTRL, ACT8846_SIPC_MASK);
|
||||
+
|
||||
+ return NOTIFY_DONE;
|
||||
+}
|
||||
+
|
||||
+static struct notifier_block act8846_restart_handler = {
|
||||
+ .notifier_call = act8846_power_cycle,
|
||||
+ .priority = 129,
|
||||
+};
|
||||
+
|
||||
static int act8865_pmic_probe(struct i2c_client *client,
|
||||
const struct i2c_device_id *i2c_id)
|
||||
{
|
||||
@@ -484,6 +503,8 @@ static int act8865_pmic_probe(struct i2c_client *client,
|
||||
}
|
||||
|
||||
if (of_device_is_system_power_controller(dev->of_node)) {
|
||||
+ int ret;
|
||||
+
|
||||
if (!pm_power_off && (off_reg > 0)) {
|
||||
act8865_i2c_client = client;
|
||||
act8865->off_reg = off_reg;
|
||||
@@ -492,6 +513,14 @@ static int act8865_pmic_probe(struct i2c_client *client,
|
||||
} else {
|
||||
dev_err(dev, "Failed to set poweroff capability, already defined\n");
|
||||
}
|
||||
+
|
||||
+ if (type == ACT8846) {
|
||||
+ act8865_i2c_client = client;
|
||||
+ ret = register_restart_handler(&act8846_restart_handler);
|
||||
+ if (ret)
|
||||
+ pr_err("%s: cannot register restart handler, %d\n",
|
||||
+ __func__, ret);
|
||||
+ }
|
||||
}
|
||||
|
||||
/* Finally register devices */
|
|
@ -1,35 +0,0 @@
|
|||
From 604ea7fc311af2b3a41e7fe3b4fbde0ee03dfb9c Mon Sep 17 00:00:00 2001
|
||||
From: Myy Miouyouyou <myy@miouyouyou.fr>
|
||||
Date: Thu, 19 Oct 2017 21:09:50 +0200
|
||||
Subject: [PATCH 04/28] dts: rk3288: miqi: Enabling the Mali GPU node
|
||||
|
||||
Why is the MiQi the only one left without a working mali GPU node ?
|
||||
|
||||
Seriously, is there a rk3288 chipset WITHOUT a mali GPU ? Couldn't
|
||||
they enable it once in the DTSI, instead of defining it as "disabled"
|
||||
and enabling it in every DTS file ?
|
||||
|
||||
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
|
||||
---
|
||||
arch/arm/boot/dts/rk3288-miqi.dts | 5 +++++
|
||||
1 file changed, 5 insertions(+)
|
||||
|
||||
diff --git a/arch/arm/boot/dts/rk3288-miqi.dts b/arch/arm/boot/dts/rk3288-miqi.dts
|
||||
index 4d923aa6..3cd60674 100644
|
||||
--- a/arch/arm/boot/dts/rk3288-miqi.dts
|
||||
+++ b/arch/arm/boot/dts/rk3288-miqi.dts
|
||||
@@ -149,6 +149,11 @@
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
+&gpu {
|
||||
+ mali-supply = <&vdd_gpu>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
&hdmi {
|
||||
ddc-i2c-bus = <&i2c5>;
|
||||
status = "okay";
|
||||
--
|
||||
2.11.0
|
||||
|
|
@ -1,45 +0,0 @@
|
|||
From 89e5763110ca77d68a4be00cd97a638adc2401d5 Mon Sep 17 00:00:00 2001
|
||||
From: Willy Tarreau <w@1wt.eu>
|
||||
Date: Tue, 2 Aug 2016 08:31:00 +0200
|
||||
Subject: [PATCH 05/28] ARM: dts: rockchip: fix the regulator's voltage range
|
||||
on MiQi board
|
||||
|
||||
The board declared too narrow a voltage range for the CPU and GPU
|
||||
regulators, preventing it from using the full CPU frequency range.
|
||||
The regulators support 712500 to 1500000 microvolts.
|
||||
|
||||
Signed-off-by: Willy Tarreau <w@1wt.eu>
|
||||
(cherry picked from commit 95330e63a9295a2632cee8cce5db80677f01857a)
|
||||
---
|
||||
arch/arm/boot/dts/rk3288-miqi.dts | 8 ++++----
|
||||
1 file changed, 4 insertions(+), 4 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/boot/dts/rk3288-miqi.dts b/arch/arm/boot/dts/rk3288-miqi.dts
|
||||
index 3cd60674..a1c3cdaa 100644
|
||||
--- a/arch/arm/boot/dts/rk3288-miqi.dts
|
||||
+++ b/arch/arm/boot/dts/rk3288-miqi.dts
|
||||
@@ -168,8 +168,8 @@
|
||||
fcs,suspend-voltage-selector = <1>;
|
||||
reg = <0x40>;
|
||||
regulator-name = "vdd_cpu";
|
||||
- regulator-min-microvolt = <850000>;
|
||||
- regulator-max-microvolt = <1350000>;
|
||||
+ regulator-min-microvolt = <712500>;
|
||||
+ regulator-max-microvolt = <1500000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-enable-ramp-delay = <300>;
|
||||
@@ -182,8 +182,8 @@
|
||||
fcs,suspend-voltage-selector = <1>;
|
||||
reg = <0x41>;
|
||||
regulator-name = "vdd_gpu";
|
||||
- regulator-min-microvolt = <850000>;
|
||||
- regulator-max-microvolt = <1350000>;
|
||||
+ regulator-min-microvolt = <712500>;
|
||||
+ regulator-max-microvolt = <1500000>;
|
||||
regulator-always-on;
|
||||
vin-supply = <&vcc_sys>;
|
||||
};
|
||||
--
|
||||
2.11.0
|
||||
|
|
@ -1,45 +0,0 @@
|
|||
From c27e445527e949f3ef46d5326066196969c17d23 Mon Sep 17 00:00:00 2001
|
||||
From: Myy <myy@miouyouyou.fr>
|
||||
Date: Sun, 12 Mar 2017 19:43:15 +0000
|
||||
Subject: [PATCH 06/28] ARM: dts: rockchip: add the MiQi board's fan definition
|
||||
|
||||
The MiQi board is sold with an enclosure in which a fan is connected
|
||||
to the second LED output, and configured by default in "heartbeat"
|
||||
mode so that it rotates slowly and increases when the CPU load
|
||||
increases, ensuring appropriate cooling by default. This LED output
|
||||
is called "Fan" in the original kernel and connected to GPIO18
|
||||
(gpiochip 0, pin 18). Here we called it "miqi:green:fan" to stay
|
||||
consistent with the kernel's naming conventions.
|
||||
|
||||
It's worth noting that without this patch the fan doesn't work at
|
||||
all, risking to make the board overheat.
|
||||
|
||||
Fixes: 162718c (v4.7)
|
||||
Cc: Heiko Stuebner <heiko@sntech.de>
|
||||
Signed-off-by: Willy Tarreau <w@1wt.eu>
|
||||
|
||||
Signed-off-by: Myy <myy@miouyouyou.fr>
|
||||
---
|
||||
arch/arm/boot/dts/rk3288-miqi.dts | 7 +++++++
|
||||
1 file changed, 7 insertions(+)
|
||||
|
||||
diff --git a/arch/arm/boot/dts/rk3288-miqi.dts b/arch/arm/boot/dts/rk3288-miqi.dts
|
||||
index a1c3cdaa..0e383595 100644
|
||||
--- a/arch/arm/boot/dts/rk3288-miqi.dts
|
||||
+++ b/arch/arm/boot/dts/rk3288-miqi.dts
|
||||
@@ -67,6 +67,13 @@
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
+ fan {
|
||||
+ gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>;
|
||||
+ label = "miqi:green:fan";
|
||||
+ linux,default-trigger = "heartbeat";
|
||||
+ };
|
||||
+
|
||||
+
|
||||
work_led: led-0 {
|
||||
gpios = <&gpio7 RK_PA2 GPIO_ACTIVE_HIGH>;
|
||||
label = "miqi:green:user";
|
||||
--
|
||||
2.11.0
|
|
@ -1,31 +0,0 @@
|
|||
From 062488e4b8fd552c01e1104b3bc91a6f7ffe6c41 Mon Sep 17 00:00:00 2001
|
||||
From: Myy Miouyouyou <myy@miouyouyou.fr>
|
||||
Date: Thu, 19 Oct 2017 21:24:47 +0200
|
||||
Subject: [PATCH 10/28] RK3288: DTSI: rk3288.dtsi: Add missing SPI2 pinctrl
|
||||
|
||||
The spi2_cs1 pin reference is missing in the spi2 first pin control
|
||||
definition.
|
||||
|
||||
This patch is taken from the patches provided by the ARMbian team.
|
||||
|
||||
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
|
||||
---
|
||||
arch/arm/boot/dts/rk3288.dtsi | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
|
||||
index 5b789528..9ed532cc 100644
|
||||
--- a/arch/arm/boot/dts/rk3288.dtsi
|
||||
+++ b/arch/arm/boot/dts/rk3288.dtsi
|
||||
@@ -334,7 +334,7 @@
|
||||
dma-names = "tx", "rx";
|
||||
interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
|
||||
pinctrl-names = "default";
|
||||
- pinctrl-0 = <&spi2_clk &spi2_tx &spi2_rx &spi2_cs0>;
|
||||
+ pinctrl-0 = <&spi2_clk &spi2_tx &spi2_rx &spi2_cs0 &spi2_cs1>;
|
||||
reg = <0x0 0xff130000 0x0 0x1000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
--
|
||||
2.11.0
|
||||
|
|
@ -1,56 +0,0 @@
|
|||
From 7af8d2bf732cb3baab7d926ed8a7e061e7a09ad9 Mon Sep 17 00:00:00 2001
|
||||
From: Myy Miouyouyou <myy@miouyouyou.fr>
|
||||
Date: Thu, 19 Oct 2017 21:39:00 +0200
|
||||
Subject: [PATCH 13/28] ARM: DTSI: rk3288.dtsi: Adding cells addresses and
|
||||
sizes of MMC nodes
|
||||
|
||||
Imported from the Rockchip 4.4 patches.
|
||||
|
||||
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
|
||||
---
|
||||
arch/arm/boot/dts/rk3288.dtsi | 8 ++++++++
|
||||
1 file changed, 8 insertions(+)
|
||||
|
||||
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
|
||||
index be985f02..14ef8202 100644
|
||||
--- a/arch/arm/boot/dts/rk3288.dtsi
|
||||
+++ b/arch/arm/boot/dts/rk3288.dtsi
|
||||
@@ -236,6 +236,8 @@
|
||||
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
|
||||
fifo-depth = <0x100>;
|
||||
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
reg = <0x0 0xff0c0000 0x0 0x4000>;
|
||||
resets = <&cru SRST_MMC0>;
|
||||
reset-names = "reset";
|
||||
@@ -250,6 +252,8 @@
|
||||
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
|
||||
fifo-depth = <0x100>;
|
||||
interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
reg = <0x0 0xff0d0000 0x0 0x4000>;
|
||||
resets = <&cru SRST_SDIO0>;
|
||||
reset-names = "reset";
|
||||
@@ -264,6 +268,8 @@
|
||||
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
|
||||
fifo-depth = <0x100>;
|
||||
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
reg = <0x0 0xff0e0000 0x0 0x4000>;
|
||||
resets = <&cru SRST_SDIO1>;
|
||||
reset-names = "reset";
|
||||
@@ -278,6 +284,8 @@
|
||||
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
|
||||
fifo-depth = <0x100>;
|
||||
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
reg = <0x0 0xff0f0000 0x0 0x4000>;
|
||||
resets = <&cru SRST_EMMC>;
|
||||
reset-names = "reset";
|
||||
--
|
||||
2.11.0
|
||||
|
|
@ -1,27 +0,0 @@
|
|||
From ac220d592aa38b9b717d36f7bb93f7be5a08f6b3 Mon Sep 17 00:00:00 2001
|
||||
From: Myy Miouyouyou <myy@miouyouyou.fr>
|
||||
Date: Thu, 19 Oct 2017 21:43:51 +0200
|
||||
Subject: [PATCH 14/28] ARM: DTSI: rk3288.dtsi: Adding missing EDP power domain
|
||||
|
||||
Imported from Rockchip 4.4 kernel patches.
|
||||
|
||||
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
|
||||
---
|
||||
arch/arm/boot/dts/rk3288.dtsi | 1 +
|
||||
1 file changed, 1 insertion(+)
|
||||
|
||||
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
|
||||
index 14ef8202..10ecebb4 100644
|
||||
--- a/arch/arm/boot/dts/rk3288.dtsi
|
||||
+++ b/arch/arm/boot/dts/rk3288.dtsi
|
||||
@@ -1105,6 +1105,7 @@
|
||||
interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cru SCLK_EDP>, <&cru PCLK_EDP_CTRL>;
|
||||
clock-names = "dp", "pclk";
|
||||
+ power-domains = <&power RK3288_PD_VIO>;
|
||||
phys = <&edp_phy>;
|
||||
phy-names = "dp";
|
||||
resets = <&cru SRST_EDP>;
|
||||
--
|
||||
2.11.0
|
||||
|
|
@ -1,31 +0,0 @@
|
|||
From a0602b2724893de7ac9b4190a7a6bb66458da2d5 Mon Sep 17 00:00:00 2001
|
||||
From: Myy Miouyouyou <myy@miouyouyou.fr>
|
||||
Date: Thu, 19 Oct 2017 21:54:37 +0200
|
||||
Subject: [PATCH 17/28] ARM: DTSI: rk3288.dtsi: Fixed the SPDIF node address
|
||||
|
||||
Now, the typo is only in the name of the node itself, not in the
|
||||
actual registers addresses definition.
|
||||
|
||||
Still, this ought to be fixed one day !
|
||||
|
||||
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
|
||||
---
|
||||
arch/arm/boot/dts/rk3288.dtsi | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
|
||||
index 125f8835..e5d3d3c9 100644
|
||||
--- a/arch/arm/boot/dts/rk3288.dtsi
|
||||
+++ b/arch/arm/boot/dts/rk3288.dtsi
|
||||
@@ -922,7 +922,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
- spdif: sound@ff88b0000 {
|
||||
+ spdif: sound@ff8b0000 {
|
||||
compatible = "rockchip,rk3288-spdif", "rockchip,rk3066-spdif";
|
||||
reg = <0x0 0xff8b0000 0x0 0x10000>;
|
||||
#sound-dai-cells = <0>;
|
||||
--
|
||||
2.11.0
|
||||
|
|
@ -1,98 +0,0 @@
|
|||
From d5d5c53173c484a13cda62a537cbf75a5df4b0e4 Mon Sep 17 00:00:00 2001
|
||||
From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
|
||||
Date: Mon, 5 Nov 2018 21:58:56 +0100
|
||||
Subject: [PATCH] ARM: DTS: rk3288-tinker: Enabling SDIO and Wifi
|
||||
|
||||
Adding the appropriate nodes in order to exploit the WiFi capabilities
|
||||
of the board.
|
||||
Since these capabilities are provided through SDIO, and the SDIO
|
||||
nodes were not defined, these were added too.
|
||||
|
||||
These seems to depend on each other so they are added in one big
|
||||
patch.
|
||||
|
||||
Split if necessary.
|
||||
|
||||
Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
|
||||
---
|
||||
arch/arm/boot/dts/rk3288-tinker.dts | 62 +++++++++++++++++++++++++++++++++++++
|
||||
1 file changed, 62 insertions(+)
|
||||
|
||||
diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
|
||||
index 1e43527aa..d4df13bed 100644
|
||||
--- a/arch/arm/boot/dts/rk3288-tinker.dts
|
||||
+++ b/arch/arm/boot/dts/rk3288-tinker.dts
|
||||
@@ -6,8 +6,70 @@
|
||||
/dts-v1/;
|
||||
|
||||
#include "rk3288-tinker.dtsi"
|
||||
+#include <dt-bindings/clock/rockchip,rk808.h>
|
||||
|
||||
/ {
|
||||
model = "Rockchip RK3288 Asus Tinker Board";
|
||||
compatible = "asus,rk3288-tinker", "rockchip,rk3288";
|
||||
+
|
||||
+ /* This is essential to get SDIO devices working.
|
||||
+ The Wifi depends on SDIO ! */
|
||||
+ sdio_pwrseq: sdio-pwrseq {
|
||||
+ compatible = "mmc-pwrseq-simple";
|
||||
+ clocks = <&rk808 RK808_CLKOUT1>;
|
||||
+ clock-names = "ext_clock";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&chip_enable_h>, <&wifi_enable_h>;
|
||||
+
|
||||
+ /*
|
||||
+ * On the module itself this is one of these (depending
|
||||
+ * on the actual card populated):
|
||||
+ * - SDIO_RESET_L_WL_REG_ON
|
||||
+ * - PDN (power down when low)
|
||||
+ */
|
||||
+ reset-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>, <&gpio4 27 GPIO_ACTIVE_LOW>;
|
||||
+ };
|
||||
+
|
||||
+ wireless-wlan {
|
||||
+ compatible = "wlan-platdata";
|
||||
+ rockchip,grf = <&grf>;
|
||||
+ sdio_vref = <1800>;
|
||||
+ status = "okay";
|
||||
+ wifi_chip_type = "8723bs";
|
||||
+ WIFI,host_wake_irq = <&gpio4 30 GPIO_ACTIVE_HIGH>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&io_domains {
|
||||
+ wifi-supply = <&vcc_18>;
|
||||
+};
|
||||
+
|
||||
+&pinctrl {
|
||||
+ sdio-pwrseq {
|
||||
+ wifi_enable_h: wifienable-h {
|
||||
+ rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+
|
||||
+ chip_enable_h: chip-enable-h {
|
||||
+ rockchip,pins = <4 27 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&sdio0 {
|
||||
+ bus-width = <4>;
|
||||
+ cap-sd-highspeed;
|
||||
+ cap-sdio-irq;
|
||||
+ clock-frequency = <50000000>;
|
||||
+ clock-freq-min-max = <200000 50000000>;
|
||||
+ disable-wp;
|
||||
+ keep-power-in-suspend;
|
||||
+ mmc-pwrseq = <&sdio_pwrseq>;
|
||||
+ non-removable;
|
||||
+ num-slots = <1>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
|
||||
+ sd-uhs-sdr104;
|
||||
+ status = "okay";
|
||||
+ supports-sdio;
|
||||
};
|
||||
--
|
||||
2.16.4
|
||||
|
|
@ -1,62 +0,0 @@
|
|||
From 2c2e60256f2cbb2fce50a6317f85b1500efd1a6c Mon Sep 17 00:00:00 2001
|
||||
From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
|
||||
Date: Mon, 5 Nov 2018 22:03:26 +0100
|
||||
Subject: [PATCH] ARM: DTS: rk3288-tinker: Setup the Bluetooth UART pins
|
||||
|
||||
The most essential being the RTS pin, which is clearly needed to
|
||||
upload the initial configuration into the Realtek Bluetooth
|
||||
chip, and make the Bluetooth chip work.
|
||||
|
||||
Now, the Bluetooth chip also needs 3 other GPIOS to be enabled.
|
||||
I'll see how I do that through the DTS file in a near future.
|
||||
|
||||
The 3 GPIOS being :
|
||||
Bluetooth Reset : <&gpio4 29 GPIO_ACTIVE_HIGH>
|
||||
Bluetooth Wake : <&gpio4 26 GPIO_ACTIVE_HIGH>
|
||||
Bluetooth Wake_Host_IRQ : <&gpio4 31 GPIO_ACTIVE_HIGH>
|
||||
|
||||
These are currently setup manually, through scripts. But it seems that
|
||||
GPIO handling through /sys entries might not be possible in the long
|
||||
term, the replacement being libgpio.
|
||||
Anyway, if you're interesting in enabling the Bluetooth GPIO by hand,
|
||||
here are the commands :
|
||||
|
||||
cd /sys/class/gpio &&
|
||||
echo 146 > export &&
|
||||
echo 149 > export &&
|
||||
echo 151 > export &&
|
||||
echo high > gpio146/direction &&
|
||||
echo high > gpio149/direction &&
|
||||
echo high > gpio151/direction
|
||||
|
||||
Resetting the chip is done like this :
|
||||
|
||||
echo "Resetting the Bluetooth chip"
|
||||
cd /sys/class/gpio/gpio149 &&
|
||||
echo 0 > value &&
|
||||
sleep 1 &&
|
||||
echo 1 > value &&
|
||||
sleep 1
|
||||
|
||||
Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
|
||||
---
|
||||
arch/arm/boot/dts/rk3288-tinker.dts | 6 ++++++
|
||||
1 file changed, 6 insertions(+)
|
||||
|
||||
diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
|
||||
index d4df13bed..b92e59c1e 100644
|
||||
--- a/arch/arm/boot/dts/rk3288-tinker.dts
|
||||
+++ b/arch/arm/boot/dts/rk3288-tinker.dts
|
||||
@@ -73,3 +73,9 @@
|
||||
status = "okay";
|
||||
supports-sdio;
|
||||
};
|
||||
+
|
||||
+&uart0 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&uart0_xfer>, <&uart0_cts>, <&uart0_rts>;
|
||||
+};
|
||||
+
|
||||
--
|
||||
2.16.4
|
||||
|
|
@ -1,28 +0,0 @@
|
|||
From ebc29962ac27264772a4227f5abd6900cb72fa79 Mon Sep 17 00:00:00 2001
|
||||
From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
|
||||
Date: Mon, 5 Nov 2018 20:16:05 +0100
|
||||
Subject: [PATCH] ARM: DTSI: rk3288-tinker: Improving the CPU max voltage
|
||||
|
||||
Taken from the various patches provided by @TonyMac32 .
|
||||
|
||||
Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
|
||||
---
|
||||
arch/arm/boot/dts/rk3288-tinker.dtsi | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
diff --git a/arch/arm/boot/dts/rk3288-tinker.dtsi b/arch/arm/boot/dts/rk3288-tinker.dtsi
|
||||
index aa107ee41..3da1c830f 100644
|
||||
--- a/arch/arm/boot/dts/rk3288-tinker.dtsi
|
||||
+++ b/arch/arm/boot/dts/rk3288-tinker.dtsi
|
||||
@@ -164,7 +164,7 @@
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <750000>;
|
||||
- regulator-max-microvolt = <1400000>;
|
||||
+ regulator-max-microvolt = <1450000>;
|
||||
regulator-name = "vdd_arm";
|
||||
regulator-ramp-delay = <6000>;
|
||||
regulator-state-mem {
|
||||
--
|
||||
2.16.4
|
||||
|
|
@ -1,53 +0,0 @@
|
|||
From a72e0749acad92df7b854e38e97e1dc7b4799abe Mon Sep 17 00:00:00 2001
|
||||
From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
|
||||
Date: Mon, 5 Nov 2018 22:11:24 +0100
|
||||
Subject: [PATCH] ARM: DTS: rk3288-tinker: Defined the I2C interfaces
|
||||
|
||||
And all the hardware behind.
|
||||
|
||||
Taken from @TonyMac32, Butchered by @Miouyouyou .
|
||||
|
||||
Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
|
||||
---
|
||||
arch/arm/boot/dts/rk3288-tinker.dts | 25 +++++++++++++++++++++++++
|
||||
1 file changed, 25 insertions(+)
|
||||
|
||||
diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
|
||||
index b92e59c1e..96d05fc6b 100644
|
||||
--- a/arch/arm/boot/dts/rk3288-tinker.dts
|
||||
+++ b/arch/arm/boot/dts/rk3288-tinker.dts
|
||||
@@ -40,6 +40,31 @@
|
||||
};
|
||||
};
|
||||
|
||||
+&i2c1 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&i2c2 {
|
||||
+ afc0:af-controller@0 {
|
||||
+ status = "okay";
|
||||
+ compatible = "silicon touch,vm149C-v4l2-i2c-subdev";
|
||||
+ reg = <0x0 0x0c>;
|
||||
+ };
|
||||
+
|
||||
+ eeprom:m24c08@50 {
|
||||
+ compatible = "at,24c08";
|
||||
+ reg = <0x50>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&i2c3 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&i2c4 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
&io_domains {
|
||||
wifi-supply = <&vcc_18>;
|
||||
};
|
||||
--
|
||||
2.16.4
|
||||
|
|
@ -1,50 +0,0 @@
|
|||
From b24b8f83e150811ad54ee2a4843e44cd1421fafa Mon Sep 17 00:00:00 2001
|
||||
From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
|
||||
Date: Mon, 5 Nov 2018 22:15:14 +0100
|
||||
Subject: [PATCH] ARM: DTS: rk3288-tinker: Defining the SPI interface
|
||||
|
||||
Taken from, and tested by @TonyMac32 .
|
||||
|
||||
Well, the original one was tested by him but I had to adapt the
|
||||
registers definitions to the new 64-bits LPAE-compliant syntax.
|
||||
|
||||
Therefore that *might* break, along with a few other patches.
|
||||
|
||||
Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
|
||||
---
|
||||
arch/arm/boot/dts/rk3288-tinker.dts | 19 +++++++++++++++++++
|
||||
1 file changed, 19 insertions(+)
|
||||
|
||||
diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
|
||||
index 96d05fc6b..17bfea298 100644
|
||||
--- a/arch/arm/boot/dts/rk3288-tinker.dts
|
||||
+++ b/arch/arm/boot/dts/rk3288-tinker.dts
|
||||
@@ -99,6 +99,25 @@
|
||||
supports-sdio;
|
||||
};
|
||||
|
||||
+&spi2 {
|
||||
+ max-freq = <50000000>;
|
||||
+ status = "okay";
|
||||
+
|
||||
+ spidev@0 {
|
||||
+ compatible = "rockchip,spi_tinker";
|
||||
+ reg = <0x0 0>;
|
||||
+ spi-max-frequency = <50000000>;
|
||||
+ spi-cpha = <1>;
|
||||
+ };
|
||||
+
|
||||
+ spidev@1 {
|
||||
+ compatible = "rockchip,spi_tinker";
|
||||
+ reg = <0x1>;
|
||||
+ spi-max-frequency = <50000000>;
|
||||
+ spi-cpha = <1>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
&uart0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart0_xfer>, <&uart0_cts>, <&uart0_rts>;
|
||||
--
|
||||
2.16.4
|
||||
|
|
@ -1,33 +0,0 @@
|
|||
From 487db7cefc9861fdaf30579c378a98f0360690ae Mon Sep 17 00:00:00 2001
|
||||
From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
|
||||
Date: Mon, 5 Nov 2018 20:27:14 +0100
|
||||
Subject: [PATCH] ARM: DTSI: rk3288-tinker: Defining SDMMC properties
|
||||
|
||||
I never knew if these properties were required to fix the dreaded
|
||||
reboot issue...
|
||||
|
||||
Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
|
||||
---
|
||||
arch/arm/boot/dts/rk3288-tinker.dtsi | 5 +++++
|
||||
1 file changed, 5 insertions(+)
|
||||
|
||||
diff --git a/arch/arm/boot/dts/rk3288-tinker.dtsi b/arch/arm/boot/dts/rk3288-tinker.dtsi
|
||||
index dd1090728..8edd6f681 100644
|
||||
--- a/arch/arm/boot/dts/rk3288-tinker.dtsi
|
||||
+++ b/arch/arm/boot/dts/rk3288-tinker.dtsi
|
||||
@@ -436,7 +436,12 @@
|
||||
disable-wp; /* wp not hooked up */
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
|
||||
+ sd-uhs-sdr12;
|
||||
+ sd-uhs-sdr25;
|
||||
+ sd-uhs-sdr50;
|
||||
+ sd-uhs-sdr104;
|
||||
status = "okay";
|
||||
+ supports-sd;
|
||||
vmmc-supply = <&vcc33_sd>;
|
||||
vqmmc-supply = <&vccio_sd>;
|
||||
};
|
||||
--
|
||||
2.16.4
|
||||
|
|
@ -1,48 +0,0 @@
|
|||
From d3d3fe433d9038dcd1a98f4d6711c0777ed06703 Mon Sep 17 00:00:00 2001
|
||||
From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
|
||||
Date: Mon, 25 Jun 2018 17:08:32 +0200
|
||||
Subject: [PATCH 26/26] ARM: DTSI: rk3288: Set the VPU MMU power domains
|
||||
|
||||
Without that, the auto-activation of the VPU hardware IOMMU fails
|
||||
when enabling the hardware, before the "probe" phase of its device
|
||||
driver.
|
||||
|
||||
Basically, when loading a "of_platform" device driver targeting
|
||||
the VPU devices, you'll get these errors without this patch :
|
||||
|
||||
[12753.996950] rk_iommu ff9c0440.iommu: Error during raw reset. MMU_DTE_ADDR is not functioning
|
||||
[12754.007483] rk_iommu ff9c0440.iommu: Disable stall request timed out, status: 0xffffffff
|
||||
[12754.026652] rk_iommu ff9c0440.iommu: Disable paging request timed out, status: 0xffffffff
|
||||
[12754.045975] rk_iommu ff9c0440.iommu: Disable stall request timed out, status: 0xffffffff
|
||||
|
||||
When using this patch, the errors disappear.
|
||||
|
||||
This seems to be due to the IOMMU device sharing the same power domain
|
||||
than the device.
|
||||
When loading an "of_platform" driver, the kernel logic seems to try
|
||||
enabling the associated IOMMU device before letting the driver handles
|
||||
anything with the actual VPU hardware.
|
||||
It appears that setting the power domain of the VPU IOMMU nodes let the
|
||||
IOMMU driver enable the IOMMU shared power domain, and make the IOMMU
|
||||
device useable.
|
||||
|
||||
Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
|
||||
---
|
||||
arch/arm/boot/dts/rk3288.dtsi | 2 ++
|
||||
1 file changed, 2 insertions(+)
|
||||
|
||||
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
|
||||
index 45ec4e89..46e1b8e2 100644
|
||||
--- a/arch/arm/boot/dts/rk3288.dtsi
|
||||
+++ b/arch/arm/boot/dts/rk3288.dtsi
|
||||
@@ -1262,6 +1263,7 @@
|
||||
interrupt-names = "hevc_mmu";
|
||||
clocks = <&cru ACLK_HEVC>, <&cru HCLK_HEVC>;
|
||||
clock-names = "aclk", "iface";
|
||||
+ power-domains = <&power RK3288_PD_HEVC>;
|
||||
#iommu-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
--
|
||||
2.16.4
|
||||
|
|
@ -1,46 +0,0 @@
|
|||
From 4ab4f88649468dada5d609e1a6f8a71a7d5610c9 Mon Sep 17 00:00:00 2001
|
||||
From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
|
||||
Date: Sat, 29 Sep 2018 02:48:59 +0200
|
||||
Subject: [PATCH 4/6] dts: rk3288: support for dedicating npll to a vop
|
||||
|
||||
This patch is taken from Urja Rannikko ( @urjaman ) patchset here :
|
||||
https://github.com/urjaman/arch-c201/blob/master/linux-c201/0020-RK3288-HDMI-clock-hacks-combined.patch
|
||||
https://www.spinics.net/lists/arm-kernel/msg673156.html
|
||||
|
||||
The original description was :
|
||||
|
||||
Add the VOP DCLKs to the assigned clocks list so their
|
||||
parents can be set in the dts include files for
|
||||
devices that do dedicate npll to a vop.
|
||||
|
||||
https://www.spinics.net/lists/arm-kernel/msg673162.html
|
||||
|
||||
Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
|
||||
---
|
||||
arch/arm/boot/dts/rk3288.dtsi | 6 ++++--
|
||||
1 file changed, 4 insertions(+), 2 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
|
||||
index d23c7fa55..ff04aab5e 100644
|
||||
--- a/arch/arm/boot/dts/rk3288.dtsi
|
||||
+++ b/arch/arm/boot/dts/rk3288.dtsi
|
||||
@@ -867,12 +867,14 @@
|
||||
rockchip,grf = <&grf>;
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
- assigned-clocks = <&cru PLL_GPLL>, <&cru PLL_CPLL>,
|
||||
+ assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>,
|
||||
+ <&cru PLL_GPLL>, <&cru PLL_CPLL>,
|
||||
<&cru PLL_NPLL>, <&cru ACLK_CPU>,
|
||||
<&cru HCLK_CPU>, <&cru PCLK_CPU>,
|
||||
<&cru ACLK_PERI>, <&cru HCLK_PERI>,
|
||||
<&cru PCLK_PERI>;
|
||||
- assigned-clock-rates = <594000000>, <400000000>,
|
||||
+ assigned-clock-rates = <0>, <0>,
|
||||
+ <594000000>, <400000000>,
|
||||
<500000000>, <300000000>,
|
||||
<150000000>, <75000000>,
|
||||
<300000000>, <150000000>,
|
||||
--
|
||||
2.16.4
|
||||
|
|
@ -1,32 +0,0 @@
|
|||
From 9177b30ab083dbda2bede3b3d61ef71ad4b1ffe0 Mon Sep 17 00:00:00 2001
|
||||
From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
|
||||
Date: Thu, 1 Nov 2018 21:31:26 +0100
|
||||
Subject: [PATCH 2/2] arm: dts: veyron: Added a flag to disable cache flush
|
||||
during reset
|
||||
|
||||
Flushing the MMC cache of ASUS Chromebooks during initialization or
|
||||
"recovery" generates 10 minutes hangup, according to @SolidHal.
|
||||
|
||||
This is an adaptation of @SolidHal, in order to pinpoint the fix to
|
||||
Veyron Chromebooks, and avoiding issues other RK3288 boards.
|
||||
|
||||
Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
|
||||
---
|
||||
arch/arm/boot/dts/rk3288-veyron.dtsi | 1 +
|
||||
1 file changed, 1 insertion(+)
|
||||
|
||||
diff --git a/arch/arm/boot/dts/rk3288-veyron.dtsi b/arch/arm/boot/dts/rk3288-veyron.dtsi
|
||||
index 2075120cf..fa4951fd7 100644
|
||||
--- a/arch/arm/boot/dts/rk3288-veyron.dtsi
|
||||
+++ b/arch/arm/boot/dts/rk3288-veyron.dtsi
|
||||
@@ -123,6 +123,7 @@
|
||||
mmc-hs200-1_8v;
|
||||
mmc-pwrseq = <&emmc_pwrseq>;
|
||||
non-removable;
|
||||
+ no-recovery-cache-flush;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
|
||||
};
|
||||
--
|
||||
2.16.4
|
||||
|
|
@ -1,40 +0,0 @@
|
|||
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
|
||||
index 0cd88774d..07681f1f0 100644
|
||||
--- a/arch/arm/boot/dts/rk3288.dtsi
|
||||
+++ b/arch/arm/boot/dts/rk3288.dtsi
|
||||
@@ -420,8 +420,6 @@
|
||||
reg-io-width = <4>;
|
||||
clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>;
|
||||
clock-names = "baudclk", "apb_pclk";
|
||||
- dmas = <&dmac_peri 1>, <&dmac_peri 2>;
|
||||
- dma-names = "tx", "rx";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart0_xfer>;
|
||||
status = "disabled";
|
||||
@@ -435,8 +433,6 @@
|
||||
reg-io-width = <4>;
|
||||
clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>;
|
||||
clock-names = "baudclk", "apb_pclk";
|
||||
- dmas = <&dmac_peri 3>, <&dmac_peri 4>;
|
||||
- dma-names = "tx", "rx";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart1_xfer>;
|
||||
status = "disabled";
|
||||
@@ -463,8 +459,6 @@
|
||||
reg-io-width = <4>;
|
||||
clocks = <&cru SCLK_UART3>, <&cru PCLK_UART3>;
|
||||
clock-names = "baudclk", "apb_pclk";
|
||||
- dmas = <&dmac_peri 7>, <&dmac_peri 8>;
|
||||
- dma-names = "tx", "rx";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart3_xfer>;
|
||||
status = "disabled";
|
||||
@@ -478,8 +472,6 @@
|
||||
reg-io-width = <4>;
|
||||
clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>;
|
||||
clock-names = "baudclk", "apb_pclk";
|
||||
- dmas = <&dmac_peri 9>, <&dmac_peri 10>;
|
||||
- dma-names = "tx", "rx";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart4_xfer>;
|
||||
status = "disabled";
|
|
@ -1,42 +0,0 @@
|
|||
From 73258d32daf3a661281bb5c77c5e2e06c7ff714e Mon Sep 17 00:00:00 2001
|
||||
From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
|
||||
Date: Fri, 3 Jul 2020 02:02:18 +0200
|
||||
Subject: [PATCH] arm: dtsi: rk3288: add GPU 500 Mhz OPP again
|
||||
|
||||
Undoing the very bizarre mainline kernel patch,
|
||||
75481833c6dbab4c29d15452f6b4337c16f5407b
|
||||
which main purpose is to sync some 3.14 kernels hacks to
|
||||
mainline kernels, for reasons that only matter for a few Chromebooks,
|
||||
and shove it down the throat of every RK3288 user.
|
||||
|
||||
If you need to avoid the GPU going to 500 Mhz on Chromebooks,
|
||||
remove the OPP entry inside the DTS that actually matters to RK3288
|
||||
Chromebooks.
|
||||
|
||||
Meanwhile, the 600 Mhz operating point can prove to be unstable on
|
||||
some RK3288 boards, while 500 Mhz works fine.
|
||||
https://forum.armbian.com/topic/13515-panfrost-on-rk3288-and-gpu-on-600mhz-problems/
|
||||
|
||||
Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
|
||||
---
|
||||
arch/arm/boot/dts/rk3288.dtsi | 4 ++++
|
||||
1 file changed, 4 insertions(+)
|
||||
|
||||
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
|
||||
index a66412547..ef7457f79 100644
|
||||
--- a/arch/arm/boot/dts/rk3288.dtsi
|
||||
+++ b/arch/arm/boot/dts/rk3288.dtsi
|
||||
@@ -1312,6 +1312,10 @@ opp-400000000 {
|
||||
opp-hz = /bits/ 64 <400000000>;
|
||||
opp-microvolt = <1100000>;
|
||||
};
|
||||
+ opp-500000000 {
|
||||
+ opp-hz = /bits/ 64 <500000000>;
|
||||
+ opp-microvolt = <1200000>;
|
||||
+ };
|
||||
opp-600000000 {
|
||||
opp-hz = /bits/ 64 <600000000>;
|
||||
opp-microvolt = <1250000>;
|
||||
--
|
||||
2.27.0
|
||||
|
|
@ -1,50 +0,0 @@
|
|||
From e0c5a419cf5464cd02996431afa98e3b22dc6801 Mon Sep 17 00:00:00 2001
|
||||
From: Myy <myy@miouyouyou.fr>
|
||||
Date: Mon, 17 Jul 2017 23:14:48 +0000
|
||||
Subject: [PATCH] clk: rockchip: add all known operating points to the allowed
|
||||
CPU freqs
|
||||
|
||||
Patch from Willy Tarreau
|
||||
|
||||
Original commit message :
|
||||
At least 1920 MHz runs stable on the MiQi even on openssl speed -multi 4,
|
||||
which is by far the most intensive workload, and 1992/2016 work fine on
|
||||
the CS-008 until it starts to heat too much. So add all of them so that
|
||||
the device tree can simply manipulate them.
|
||||
|
||||
Signed-off-by: Myy <myy@miouyouyou.fr>
|
||||
---
|
||||
drivers/clk/rockchip/clk-rk3288.c | 17 +++++++++++++++++
|
||||
1 file changed, 17 insertions(+)
|
||||
|
||||
diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c
|
||||
index 753c649..fd2058f 100644
|
||||
--- a/drivers/clk/rockchip/clk-rk3288.c
|
||||
+++ b/drivers/clk/rockchip/clk-rk3288.c
|
||||
@@ -145,6 +145,23 @@ static struct rockchip_pll_rate_table rk3288_pll_rates[] = {
|
||||
}
|
||||
|
||||
static struct rockchip_cpuclk_rate_table rk3288_cpuclk_rates[] __initdata = {
|
||||
+ RK3288_CPUCLK_RATE(2208000000U, 1, 3, 1, 3, 3),
|
||||
+ RK3288_CPUCLK_RATE(2184000000U, 1, 3, 1, 3, 3),
|
||||
+ RK3288_CPUCLK_RATE(2160000000U, 1, 3, 1, 3, 3),
|
||||
+ RK3288_CPUCLK_RATE(2136000000, 1, 3, 1, 3, 3),
|
||||
+ RK3288_CPUCLK_RATE(2112000000, 1, 3, 1, 3, 3),
|
||||
+ RK3288_CPUCLK_RATE(2088000000, 1, 3, 1, 3, 3),
|
||||
+ RK3288_CPUCLK_RATE(2064000000, 1, 3, 1, 3, 3),
|
||||
+ RK3288_CPUCLK_RATE(2040000000, 1, 3, 1, 3, 3),
|
||||
+ RK3288_CPUCLK_RATE(2016000000, 1, 3, 1, 3, 3),
|
||||
+ RK3288_CPUCLK_RATE(1992000000, 1, 3, 1, 3, 3),
|
||||
+ RK3288_CPUCLK_RATE(1968000000, 1, 3, 1, 3, 3),
|
||||
+ RK3288_CPUCLK_RATE(1944000000, 1, 3, 1, 3, 3),
|
||||
+ RK3288_CPUCLK_RATE(1920000000, 1, 3, 1, 3, 3),
|
||||
+ RK3288_CPUCLK_RATE(1896000000, 1, 3, 1, 3, 3),
|
||||
+ RK3288_CPUCLK_RATE(1872000000, 1, 3, 1, 3, 3),
|
||||
+ RK3288_CPUCLK_RATE(1848000000, 1, 3, 1, 3, 3),
|
||||
+ RK3288_CPUCLK_RATE(1824000000, 1, 3, 1, 3, 3),
|
||||
RK3288_CPUCLK_RATE(1800000000, 1, 3, 1, 3, 3),
|
||||
RK3288_CPUCLK_RATE(1704000000, 1, 3, 1, 3, 3),
|
||||
RK3288_CPUCLK_RATE(1608000000, 1, 3, 1, 3, 3),
|
||||
--
|
||||
2.10.2
|
||||
|
|
@ -1,116 +0,0 @@
|
|||
From 302cd9b8a9f1f8a7735fabea3b9a7645dc40f9cc Mon Sep 17 00:00:00 2001
|
||||
From: Myy Miouyouyou <myy@miouyouyou.fr>
|
||||
Date: Sun, 7 Jan 2018 01:52:44 +0100
|
||||
Subject: [PATCH] drivers: mmc: dw-mci-rockchip: Handle ASUS Tinkerboard reboot
|
||||
|
||||
On ASUS Tinkerboard systems, if the SDMMC hardware is shutdown before
|
||||
rebooting, the system will be dead, as the SDMMC is the only way to
|
||||
boot anything, and the hardware doesn't power up the SDMMC hardware
|
||||
automatically when rebooting.
|
||||
|
||||
So, when using an ASUS Tinkerboard system, a new reboot handler is
|
||||
installed. This reboot handler takes care of powering the SDMMC
|
||||
hardware again before restarting the system, resolving the issue.
|
||||
|
||||
The code was inspired by the pwrseq_emmc.c, which seems to overcome
|
||||
similar effects with eMMC hardware.
|
||||
|
||||
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
|
||||
---
|
||||
drivers/mmc/host/dw_mmc-rockchip.c | 66 ++++++++++++++++++++++++++++++++++++++
|
||||
1 file changed, 66 insertions(+)
|
||||
|
||||
diff --git a/drivers/mmc/host/dw_mmc-rockchip.c b/drivers/mmc/host/dw_mmc-rockchip.c
|
||||
index a3f1c2b30..7eac1f221 100644
|
||||
--- a/drivers/mmc/host/dw_mmc-rockchip.c
|
||||
+++ b/drivers/mmc/host/dw_mmc-rockchip.c
|
||||
@@ -16,6 +16,11 @@
|
||||
#include <linux/pm_runtime.h>
|
||||
#include <linux/slab.h>
|
||||
|
||||
+#include <linux/regulator/consumer.h>
|
||||
+#include <linux/reboot.h>
|
||||
+#include <linux/delay.h>
|
||||
+#include "../core/core.h"
|
||||
+
|
||||
#include "dw_mmc.h"
|
||||
#include "dw_mmc-pltfm.h"
|
||||
|
||||
@@ -334,6 +339,66 @@ static const struct of_device_id dw_mci_rockchip_match[] = {
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, dw_mci_rockchip_match);
|
||||
|
||||
+struct dw_mci_rockchip_broken_boards_data {
|
||||
+ struct notifier_block reset_nb;
|
||||
+ struct platform_device *pdev;
|
||||
+};
|
||||
+
|
||||
+/* This reboot handler handles cases where disabling the SDMMC on
|
||||
+ * reboot will cause the hardware to be unable to start correctly
|
||||
+ * after rebooting.
|
||||
+ *
|
||||
+ * This happens with Tinkerboard systems...
|
||||
+ */
|
||||
+static int dw_mci_rockchip_broken_boards_reset_nb(
|
||||
+ struct notifier_block *this,
|
||||
+ unsigned long mode, void *cmd)
|
||||
+{
|
||||
+ struct dw_mci_rockchip_broken_boards_data const *data =
|
||||
+ container_of(this,
|
||||
+ struct dw_mci_rockchip_broken_boards_data,
|
||||
+ reset_nb);
|
||||
+ struct dw_mci *host = platform_get_drvdata(data->pdev);
|
||||
+ struct mmc_host *mmc = host->slot->mmc;
|
||||
+
|
||||
+ printk(KERN_ERR "Meow.\n");
|
||||
+
|
||||
+ mmc_power_off(mmc);
|
||||
+
|
||||
+ mdelay(20);
|
||||
+
|
||||
+ if (!IS_ERR(mmc->supply.vmmc))
|
||||
+ regulator_enable(mmc->supply.vmmc);
|
||||
+
|
||||
+ if (!IS_ERR(mmc->supply.vqmmc))
|
||||
+ regulator_set_voltage(mmc->supply.vqmmc, 3000000, 3300000);
|
||||
+
|
||||
+ printk(KERN_ERR "woeM.\n");
|
||||
+
|
||||
+ return NOTIFY_DONE;
|
||||
+}
|
||||
+
|
||||
+static void dw_mci_rockchip_register_broken_boards_reboot_handler(
|
||||
+ struct platform_device *pdev)
|
||||
+{
|
||||
+ struct dw_mci_rockchip_broken_boards_data *data;
|
||||
+
|
||||
+ if (!of_machine_is_compatible("asus,rk3288-tinker"))
|
||||
+ return;
|
||||
+
|
||||
+ data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
|
||||
+
|
||||
+ if (!data)
|
||||
+ return;
|
||||
+
|
||||
+ data->reset_nb.notifier_call =
|
||||
+ dw_mci_rockchip_broken_boards_reset_nb;
|
||||
+ data->reset_nb.priority = 255;
|
||||
+ register_restart_handler(&data->reset_nb);
|
||||
+
|
||||
+ data->pdev = pdev;
|
||||
+}
|
||||
+
|
||||
static int dw_mci_rockchip_probe(struct platform_device *pdev)
|
||||
{
|
||||
const struct dw_mci_drv_data *drv_data;
|
||||
@@ -361,6 +426,7 @@ static int dw_mci_rockchip_probe(struct platform_device *pdev)
|
||||
}
|
||||
|
||||
pm_runtime_put_autosuspend(&pdev->dev);
|
||||
+ dw_mci_rockchip_register_broken_boards_reboot_handler(pdev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
--
|
||||
2.14.1
|
||||
|
|
@ -1,74 +0,0 @@
|
|||
From e7b60b10cf3fd2f4374ab26c314383121c27fe82 Mon Sep 17 00:00:00 2001
|
||||
From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
|
||||
Date: Tue, 22 Jan 2019 21:24:37 +0100
|
||||
Subject: [PATCH] soc: rockchip: power-domain: export idle request for RKMPP
|
||||
|
||||
This function, and the added header, are required by the RKMPP driver,
|
||||
provided by Randy Li. However, I can't attest that the provided code
|
||||
is correct.
|
||||
|
||||
Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
|
||||
---
|
||||
drivers/soc/rockchip/pm_domains.c | 23 +++++++++++++++++++++++
|
||||
include/soc/rockchip/pm_domains.h | 15 +++++++++++++++
|
||||
2 files changed, 38 insertions(+)
|
||||
create mode 100644 include/soc/rockchip/pm_domains.h
|
||||
|
||||
diff --git a/drivers/soc/rockchip/pm_domains.c b/drivers/soc/rockchip/pm_domains.c
|
||||
index 847c7c482..3e2e252cb 100644
|
||||
--- a/drivers/soc/rockchip/pm_domains.c
|
||||
+++ b/drivers/soc/rockchip/pm_domains.c
|
||||
@@ -199,6 +199,29 @@ static int rockchip_pmu_set_idle_request(struct rockchip_pm_domain *pd,
|
||||
return 0;
|
||||
}
|
||||
|
||||
+int rockchip_pmu_idle_request(struct device *dev, bool idle)
|
||||
+{
|
||||
+ struct generic_pm_domain *genpd;
|
||||
+ struct rockchip_pm_domain *pd;
|
||||
+ int ret;
|
||||
+
|
||||
+ if (IS_ERR_OR_NULL(dev))
|
||||
+ return -EINVAL;
|
||||
+
|
||||
+ if (IS_ERR_OR_NULL(dev->pm_domain))
|
||||
+ return -EINVAL;
|
||||
+
|
||||
+ genpd = pd_to_genpd(dev->pm_domain);
|
||||
+ pd = to_rockchip_pd(genpd);
|
||||
+
|
||||
+ mutex_lock(&pd->pmu->mutex);
|
||||
+ ret = rockchip_pmu_set_idle_request(pd, idle);
|
||||
+ mutex_unlock(&pd->pmu->mutex);
|
||||
+
|
||||
+ return ret;
|
||||
+}
|
||||
+EXPORT_SYMBOL(rockchip_pmu_idle_request);
|
||||
+
|
||||
static int rockchip_pmu_save_qos(struct rockchip_pm_domain *pd)
|
||||
{
|
||||
int i;
|
||||
diff --git a/include/soc/rockchip/pm_domains.h b/include/soc/rockchip/pm_domains.h
|
||||
new file mode 100644
|
||||
index 000000000..720b3314e
|
||||
--- /dev/null
|
||||
+++ b/include/soc/rockchip/pm_domains.h
|
||||
@@ -0,0 +1,15 @@
|
||||
+/*
|
||||
+ * pm_domain.h - Definitions and headers related to device power domains.
|
||||
+ *
|
||||
+ * Copyright (C) 2017 Randy Li <ayaka@soulik.info>.
|
||||
+ *
|
||||
+ * This file is released under the GPLv2.
|
||||
+ */
|
||||
+
|
||||
+#ifndef _LINUX_ROCKCHIP_PM_H
|
||||
+#define _LINUX_ROCKCHIP_PM_H
|
||||
+#include <linux/device.h>
|
||||
+
|
||||
+int rockchip_pmu_idle_request(struct device *dev, bool idle);
|
||||
+
|
||||
+#endif /* _LINUX_ROCKCHIP_PM_H */
|
||||
--
|
||||
2.16.4
|
||||
|
|
@ -1,102 +0,0 @@
|
|||
FROM: Solidhal <hal@halemmerich.com>
|
||||
|
||||
This patch reverses commit 2b721118b7821107757eb1d37af4b60e877b27e7, as can bee seen here:
|
||||
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=2b721118b7821107757eb1d37af4b60e877b27e7
|
||||
|
||||
This commit caused issues on veyron speedy with ath9k and dwc2 drivers. Any ath9k device (ar9271)
|
||||
would intermittently work, most of the time ending in errors as can bee seen here:
|
||||
https://github.com/SolidHal/PrawnOS/issues/38
|
||||
This commit fixes that issue.
|
||||
This is only a temporary work around while a permenant fix is found, as this commit seems to only cause issues
|
||||
with dwc2
|
||||
|
||||
|
||||
diff --git a/drivers/net/wireless/ath/ath9k/hif_usb.c b/drivers/net/wireless/ath/ath9k/hif_usb.c
|
||||
index 3f563e02d..903851481 100644
|
||||
--- a/drivers/net/wireless/ath/ath9k/hif_usb.c
|
||||
+++ b/drivers/net/wireless/ath/ath9k/hif_usb.c
|
||||
@@ -118,10 +118,10 @@ static int hif_usb_send_regout(struct hif_device_usb *hif_dev,
|
||||
cmd->skb = skb;
|
||||
cmd->hif_dev = hif_dev;
|
||||
|
||||
- usb_fill_int_urb(urb, hif_dev->udev,
|
||||
- usb_sndintpipe(hif_dev->udev, USB_REG_OUT_PIPE),
|
||||
+ usb_fill_bulk_urb(urb, hif_dev->udev,
|
||||
+ usb_sndbulkpipe(hif_dev->udev, USB_REG_OUT_PIPE),
|
||||
skb->data, skb->len,
|
||||
- hif_usb_regout_cb, cmd, 1);
|
||||
+ hif_usb_regout_cb, cmd);
|
||||
|
||||
usb_anchor_urb(urb, &hif_dev->regout_submitted);
|
||||
ret = usb_submit_urb(urb, GFP_KERNEL);
|
||||
@@ -735,11 +735,11 @@ static void ath9k_hif_usb_reg_in_cb(struct urb *urb)
|
||||
|
||||
rx_buf->skb = nskb;
|
||||
|
||||
- usb_fill_int_urb(urb, hif_dev->udev,
|
||||
- usb_rcvintpipe(hif_dev->udev,
|
||||
+ usb_fill_bulk_urb(urb, hif_dev->udev,
|
||||
+ usb_rcvbulkpipe(hif_dev->udev,
|
||||
USB_REG_IN_PIPE),
|
||||
nskb->data, MAX_REG_IN_BUF_SIZE,
|
||||
- ath9k_hif_usb_reg_in_cb, rx_buf, 1);
|
||||
+ ath9k_hif_usb_reg_in_cb, rx_buf);
|
||||
}
|
||||
|
||||
resubmit:
|
||||
@@ -944,11 +944,11 @@ static int ath9k_hif_usb_alloc_reg_in_urbs(struct hif_device_usb *hif_dev)
|
||||
rx_buf->hif_dev = hif_dev;
|
||||
rx_buf->skb = skb;
|
||||
|
||||
- usb_fill_int_urb(urb, hif_dev->udev,
|
||||
- usb_rcvintpipe(hif_dev->udev,
|
||||
+ usb_fill_bulk_urb(urb, hif_dev->udev,
|
||||
+ usb_rcvbulkpipe(hif_dev->udev,
|
||||
USB_REG_IN_PIPE),
|
||||
skb->data, MAX_REG_IN_BUF_SIZE,
|
||||
- ath9k_hif_usb_reg_in_cb, rx_buf, 1);
|
||||
+ ath9k_hif_usb_reg_in_cb, skb);
|
||||
|
||||
/* Anchor URB */
|
||||
usb_anchor_urb(urb, &hif_dev->reg_in_submitted);
|
||||
@@ -1069,7 +1069,9 @@ static int ath9k_hif_usb_download_fw(struct hif_device_usb *hif_dev)
|
||||
|
||||
static int ath9k_hif_usb_dev_init(struct hif_device_usb *hif_dev)
|
||||
{
|
||||
- int ret;
|
||||
+ struct usb_host_interface *alt = &hif_dev->interface->altsetting[0];
|
||||
+ struct usb_endpoint_descriptor *endp;
|
||||
+ int ret, idx;
|
||||
|
||||
ret = ath9k_hif_usb_download_fw(hif_dev);
|
||||
if (ret) {
|
||||
@@ -1079,6 +1081,20 @@ static int ath9k_hif_usb_dev_init(struct hif_device_usb *hif_dev)
|
||||
return ret;
|
||||
}
|
||||
|
||||
+ /* On downloading the firmware to the target, the USB descriptor of EP4
|
||||
+ * is 'patched' to change the type of the endpoint to Bulk. This will
|
||||
+ * bring down CPU usage during the scan period.
|
||||
+ */
|
||||
+ for (idx = 0; idx < alt->desc.bNumEndpoints; idx++) {
|
||||
+ endp = &alt->endpoint[idx].desc;
|
||||
+ if ((endp->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK)
|
||||
+ == USB_ENDPOINT_XFER_INT) {
|
||||
+ endp->bmAttributes &= ~USB_ENDPOINT_XFERTYPE_MASK;
|
||||
+ endp->bmAttributes |= USB_ENDPOINT_XFER_BULK;
|
||||
+ endp->bInterval = 0;
|
||||
+ }
|
||||
+ }
|
||||
+
|
||||
/* Alloc URBs */
|
||||
ret = ath9k_hif_usb_alloc_urbs(hif_dev);
|
||||
if (ret) {
|
||||
@@ -1353,7 +1369,7 @@ static void ath9k_hif_usb_reboot(struct usb_device *udev)
|
||||
if (!buf)
|
||||
return;
|
||||
|
||||
- ret = usb_interrupt_msg(udev, usb_sndintpipe(udev, USB_REG_OUT_PIPE),
|
||||
+ ret = usb_bulk_msg(udev, usb_sndbulkpipe(udev, USB_REG_OUT_PIPE),
|
||||
buf, 4, NULL, USB_MSG_TIMEOUT);
|
||||
if (ret)
|
||||
dev_err(&udev->dev, "ath9k_htc: USB reboot failed\n");
|
|
@ -1,22 +0,0 @@
|
|||
From d4d128324b8f8a9f5c441203d94703e41fa07df3 Mon Sep 17 00:00:00 2001
|
||||
From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
|
||||
Date: Mon, 5 Nov 2018 19:57:56 +0100
|
||||
Subject: [PATCH] spi: Added support for Tinkerboard's SPI interface
|
||||
|
||||
Imported from ARMbian
|
||||
|
||||
Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
|
||||
---
|
||||
|
||||
diff --git a/drivers/spi/spidev.c b/drivers/spi/spidev.c
|
||||
index 255786f2e..3a3f2e6fd 100644
|
||||
--- a/drivers/spi/spidev.c
|
||||
+++ b/drivers/spi/spidev.c
|
||||
@@ -665,6 +665,7 @@ static const struct of_device_id spidev_dt_ids[] = {
|
||||
{ .compatible = "lwn,bk4" },
|
||||
{ .compatible = "dh,dhcom-board" },
|
||||
{ .compatible = "menlo,m53cpld" },
|
||||
+ { .compatible = "rockchip,spi_tinker" },
|
||||
{},
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, spidev_dt_ids);
|
|
@ -1,395 +0,0 @@
|
|||
diff --git a/arch/arm/boot/dts/rk3288-tinker.dtsi b/arch/arm/boot/dts/rk3288-tinker.dtsi
|
||||
index e5b7ef1a5..f88c913ff 100644
|
||||
--- a/arch/arm/boot/dts/rk3288-tinker.dtsi
|
||||
+++ b/arch/arm/boot/dts/rk3288-tinker.dtsi
|
||||
@@ -544,3 +544,6 @@
|
||||
&wdt {
|
||||
status = "okay";
|
||||
};
|
||||
+&gpiomem {
|
||||
+ status = "okay";
|
||||
+};
|
||||
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
|
||||
index f3ca55496..14bbcb192 100644
|
||||
--- a/arch/arm/boot/dts/rk3288.dtsi
|
||||
+++ b/arch/arm/boot/dts/rk3288.dtsi
|
||||
@@ -1418,6 +1418,12 @@
|
||||
interrupts = <GIC_PPI 9 0xf04>;
|
||||
};
|
||||
|
||||
+ gpiomem: rk3288-gpiomem@ff750000 {
|
||||
+ compatible = "rockchip,rk3288-gpiomem";
|
||||
+ reg = <0x0 0xff750000 0x0 0x1000>;
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+
|
||||
pinctrl: pinctrl {
|
||||
compatible = "rockchip,rk3288-pinctrl";
|
||||
rockchip,grf = <&grf>;
|
||||
|
||||
diff --git a/drivers/char/Kconfig b/drivers/char/Kconfig
|
||||
index 3143db5..9c18b74 100644
|
||||
--- a/drivers/char/Kconfig
|
||||
+++ b/drivers/char/Kconfig
|
||||
@@ -5,6 +5,7 @@
|
||||
menu "Character devices"
|
||||
|
||||
source "drivers/tty/Kconfig"
|
||||
+source "drivers/char/rockchip/Kconfig"
|
||||
|
||||
config DEVMEM
|
||||
bool "/dev/mem virtual device support"
|
||||
diff --git a/drivers/char/Makefile b/drivers/char/Makefile
|
||||
index d8a7579..290cb32 100644
|
||||
--- a/drivers/char/Makefile
|
||||
+++ b/drivers/char/Makefile
|
||||
@@ -51,6 +51,8 @@ obj-$(CONFIG_PS3_FLASH) += ps3flash.o
|
||||
obj-$(CONFIG_JS_RTC) += js-rtc.o
|
||||
js-rtc-y = rtc.o
|
||||
|
||||
+obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
|
||||
+
|
||||
obj-$(CONFIG_XILLYBUS) += xillybus/
|
||||
obj-$(CONFIG_POWERNV_OP_PANEL) += powernv-op-panel.o
|
||||
obj-$(CONFIG_ADI) += adi.o
|
||||
diff --git a/drivers/char/rockchip/Kconfig b/drivers/char/rockchip/Kconfig
|
||||
new file mode 100644
|
||||
index 0000000..6e97486
|
||||
--- /dev/null
|
||||
+++ b/drivers/char/rockchip/Kconfig
|
||||
@@ -0,0 +1,16 @@
|
||||
+#
|
||||
+# Broadcom char driver config
|
||||
+#
|
||||
+
|
||||
+menuconfig RK_CHAR_DRIVERS
|
||||
+ bool "Rockchip Char Drivers"
|
||||
+ help
|
||||
+ Rockchip's char drivers
|
||||
+
|
||||
+config RK3288_DEVGPIOMEM
|
||||
+ tristate "/dev/gpiomem rootless GPIO access via mmap() on the RK3288"
|
||||
+ default y
|
||||
+ help
|
||||
+ Provides users with root-free access to the GPIO registers
|
||||
+ on the 3288. Calling mmap(/dev/gpiomem) will map the GPIO
|
||||
+ register page to the user's pointer.
|
||||
\ No newline at end of file
|
||||
diff --git a/drivers/char/rockchip/Makefile b/drivers/char/rockchip/Makefile
|
||||
new file mode 100644
|
||||
index 0000000..2287ec2
|
||||
--- /dev/null
|
||||
+++ b/drivers/char/rockchip/Makefile
|
||||
@@ -0,0 +1 @@
|
||||
+obj-$(CONFIG_RK3288_DEVGPIOMEM)+= rk3288-gpiomem.o
|
||||
\ No newline at end of file
|
||||
diff --git a/drivers/char/rockchip/rk3288-gpiomem.c b/drivers/char/rockchip/rk3288-gpiomem.c
|
||||
new file mode 100644
|
||||
index 0000000..984471c
|
||||
--- /dev/null
|
||||
+++ b/drivers/char/rockchip/rk3288-gpiomem.c
|
||||
@@ -0,0 +1,303 @@
|
||||
+/**
|
||||
+ * GPIO memory device driver
|
||||
+ *
|
||||
+ * Creates a chardev /dev/gpiomem which will provide user access to
|
||||
+ * the rk3288's GPIO registers when it is mmap()'d.
|
||||
+ * No longer need root for user GPIO access, but without relaxing permissions
|
||||
+ * on /dev/mem.
|
||||
+ *
|
||||
+ * Written by Luke Wren <luke@raspberrypi.org>
|
||||
+ * Copyright (c) 2015, Raspberry Pi (Trading) Ltd.
|
||||
+ *
|
||||
+ * Redistribution and use in source and binary forms, with or without
|
||||
+ * modification, are permitted provided that the following conditions
|
||||
+ * are met:
|
||||
+ * 1. Redistributions of source code must retain the above copyright
|
||||
+ * notice, this list of conditions, and the following disclaimer,
|
||||
+ * without modification.
|
||||
+ * 2. Redistributions in binary form must reproduce the above copyright
|
||||
+ * notice, this list of conditions and the following disclaimer in the
|
||||
+ * documentation and/or other materials provided with the distribution.
|
||||
+ * 3. The names of the above-listed copyright holders may not be used
|
||||
+ * to endorse or promote products derived from this software without
|
||||
+ * specific prior written permission.
|
||||
+ *
|
||||
+ * ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
+ * GNU General Public License ("GPL") version 2, as published by the Free
|
||||
+ * Software Foundation.
|
||||
+ *
|
||||
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
|
||||
+ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
|
||||
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
|
||||
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
||||
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
|
||||
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
|
||||
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
|
||||
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
||||
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
+ */
|
||||
+
|
||||
+#include <linux/kernel.h>
|
||||
+#include <linux/module.h>
|
||||
+#include <linux/of.h>
|
||||
+#include <linux/platform_device.h>
|
||||
+#include <linux/mm.h>
|
||||
+#include <linux/slab.h>
|
||||
+#include <linux/cdev.h>
|
||||
+#include <linux/pagemap.h>
|
||||
+#include <linux/io.h>
|
||||
+
|
||||
+#define DEVICE_NAME "rk3288-gpiomem"
|
||||
+#define DRIVER_NAME "gpiomem-rk3288"
|
||||
+#define DEVICE_MINOR 0
|
||||
+
|
||||
+struct rk3288_gpiomem_instance {
|
||||
+ unsigned long gpio_regs_phys;
|
||||
+ struct device *dev;
|
||||
+};
|
||||
+
|
||||
+static struct cdev rk3288_gpiomem_cdev;
|
||||
+static dev_t rk3288_gpiomem_devid;
|
||||
+static struct class *rk3288_gpiomem_class;
|
||||
+static struct device *rk3288_gpiomem_dev;
|
||||
+static struct rk3288_gpiomem_instance *inst;
|
||||
+
|
||||
+
|
||||
+/****************************************************************************
|
||||
+*
|
||||
+* GPIO mem chardev file ops
|
||||
+*
|
||||
+***************************************************************************/
|
||||
+
|
||||
+static int rk3288_gpiomem_open(struct inode *inode, struct file *file)
|
||||
+{
|
||||
+ int dev = iminor(inode);
|
||||
+ int ret = 0;
|
||||
+
|
||||
+ if (dev != DEVICE_MINOR) {
|
||||
+ dev_err(inst->dev, "Unknown minor device: %d", dev);
|
||||
+ ret = -ENXIO;
|
||||
+ }
|
||||
+ return ret;
|
||||
+}
|
||||
+
|
||||
+static int rk3288_gpiomem_release(struct inode *inode, struct file *file)
|
||||
+{
|
||||
+ int dev = iminor(inode);
|
||||
+ int ret = 0;
|
||||
+
|
||||
+ if (dev != DEVICE_MINOR) {
|
||||
+ dev_err(inst->dev, "Unknown minor device %d", dev);
|
||||
+ ret = -ENXIO;
|
||||
+ }
|
||||
+ return ret;
|
||||
+}
|
||||
+
|
||||
+static const struct vm_operations_struct rk3288_gpiomem_vm_ops = {
|
||||
+#ifdef CONFIG_HAVE_IOREMAP_PROT
|
||||
+ .access = generic_access_phys
|
||||
+#endif
|
||||
+};
|
||||
+static int address_is_allowed(unsigned long pfn, unsigned long size)
|
||||
+{
|
||||
+ unsigned long address = pfn << PAGE_SHIFT;
|
||||
+
|
||||
+ dev_info(inst->dev, "address_is_allowed.pfn: 0x%08lx", address);
|
||||
+
|
||||
+ switch(address) {
|
||||
+
|
||||
+ case 0xff750000:
|
||||
+ case 0xff760000:
|
||||
+ case 0xff780000:
|
||||
+ case 0xff790000:
|
||||
+ case 0xff7a0000:
|
||||
+ case 0xff7b0000:
|
||||
+ case 0xff7c0000:
|
||||
+ case 0xff7d0000:
|
||||
+ case 0xff7e0000:
|
||||
+ case 0xff7f0000:
|
||||
+ case 0xff7f2000:
|
||||
+ case 0xff770000:
|
||||
+ case 0xff730000:
|
||||
+ case 0xff680000:
|
||||
+ dev_info(inst->dev, "address_is_allowed.return 1");
|
||||
+ return 1;
|
||||
+ break;
|
||||
+ default :
|
||||
+ dev_info(inst->dev, "address_is_allowed.return 0");
|
||||
+ return 0;
|
||||
+ }
|
||||
+}
|
||||
+
|
||||
+static int rk3288_gpiomem_mmap(struct file *file, struct vm_area_struct *vma)
|
||||
+{
|
||||
+
|
||||
+ size_t size;
|
||||
+
|
||||
+ size = vma->vm_end - vma->vm_start;
|
||||
+
|
||||
+
|
||||
+ if (!address_is_allowed(vma->vm_pgoff, size))
|
||||
+ return -EPERM;
|
||||
+
|
||||
+ vma->vm_page_prot = phys_mem_access_prot(file, vma->vm_pgoff,
|
||||
+ size,
|
||||
+ vma->vm_page_prot);
|
||||
+
|
||||
+ vma->vm_ops = &rk3288_gpiomem_vm_ops;
|
||||
+
|
||||
+ /* Remap-pfn-range will mark the range VM_IO */
|
||||
+ if (remap_pfn_range(vma,
|
||||
+ vma->vm_start,
|
||||
+ vma->vm_pgoff,
|
||||
+ size,
|
||||
+ vma->vm_page_prot)) {
|
||||
+ return -EAGAIN;
|
||||
+ }
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static const struct file_operations
|
||||
+rk3288_gpiomem_fops = {
|
||||
+ .owner = THIS_MODULE,
|
||||
+ .open = rk3288_gpiomem_open,
|
||||
+ .release = rk3288_gpiomem_release,
|
||||
+ .mmap = rk3288_gpiomem_mmap,
|
||||
+};
|
||||
+
|
||||
+static int rk3288_gpiomem_dev_uevent(struct device *dev, struct kobj_uevent_env *env)
|
||||
+{
|
||||
+ add_uevent_var(env, "DEVMODE=%#o", 0666);
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+ /****************************************************************************
|
||||
+*
|
||||
+* Probe and remove functions
|
||||
+*
|
||||
+***************************************************************************/
|
||||
+
|
||||
+
|
||||
+static int rk3288_gpiomem_probe(struct platform_device *pdev)
|
||||
+{
|
||||
+ int err;
|
||||
+ void *ptr_err;
|
||||
+ struct device *dev = &pdev->dev;
|
||||
+ struct resource *ioresource;
|
||||
+
|
||||
+ /* Allocate buffers and instance data */
|
||||
+
|
||||
+ inst = kzalloc(sizeof(struct rk3288_gpiomem_instance), GFP_KERNEL);
|
||||
+
|
||||
+ if (!inst) {
|
||||
+ err = -ENOMEM;
|
||||
+ goto failed_inst_alloc;
|
||||
+ }
|
||||
+
|
||||
+ inst->dev = dev;
|
||||
+
|
||||
+ ioresource = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
+ if (ioresource) {
|
||||
+ inst->gpio_regs_phys = ioresource->start;
|
||||
+ } else {
|
||||
+ dev_err(inst->dev, "failed to get IO resource");
|
||||
+ err = -ENOENT;
|
||||
+ goto failed_get_resource;
|
||||
+ }
|
||||
+
|
||||
+ /* Create character device entries */
|
||||
+
|
||||
+ err = alloc_chrdev_region(&rk3288_gpiomem_devid,
|
||||
+ DEVICE_MINOR, 1, DEVICE_NAME);
|
||||
+ if (err != 0) {
|
||||
+ dev_err(inst->dev, "unable to allocate device number");
|
||||
+ goto failed_alloc_chrdev;
|
||||
+ }
|
||||
+ cdev_init(&rk3288_gpiomem_cdev, &rk3288_gpiomem_fops);
|
||||
+ rk3288_gpiomem_cdev.owner = THIS_MODULE;
|
||||
+ err = cdev_add(&rk3288_gpiomem_cdev, rk3288_gpiomem_devid, 1);
|
||||
+ if (err != 0) {
|
||||
+ dev_err(inst->dev, "unable to register device");
|
||||
+ goto failed_cdev_add;
|
||||
+ }
|
||||
+
|
||||
+ /* Create sysfs entries */
|
||||
+
|
||||
+ rk3288_gpiomem_class = class_create(THIS_MODULE, DEVICE_NAME);
|
||||
+ ptr_err = rk3288_gpiomem_class;
|
||||
+ if (IS_ERR(ptr_err))
|
||||
+ goto failed_class_create;
|
||||
+ rk3288_gpiomem_class->dev_uevent = rk3288_gpiomem_dev_uevent;
|
||||
+ rk3288_gpiomem_dev = device_create(rk3288_gpiomem_class, NULL,
|
||||
+ rk3288_gpiomem_devid, NULL,
|
||||
+ "gpiomem");
|
||||
+ ptr_err = rk3288_gpiomem_dev;
|
||||
+ if (IS_ERR(ptr_err))
|
||||
+ goto failed_device_create;
|
||||
+
|
||||
+ dev_info(inst->dev, "Initialised: Registers at 0x%08lx",
|
||||
+ inst->gpio_regs_phys);
|
||||
+
|
||||
+ return 0;
|
||||
+
|
||||
+failed_device_create:
|
||||
+ class_destroy(rk3288_gpiomem_class);
|
||||
+failed_class_create:
|
||||
+ cdev_del(&rk3288_gpiomem_cdev);
|
||||
+ err = PTR_ERR(ptr_err);
|
||||
+failed_cdev_add:
|
||||
+ unregister_chrdev_region(rk3288_gpiomem_devid, 1);
|
||||
+failed_alloc_chrdev:
|
||||
+failed_get_resource:
|
||||
+ kfree(inst);
|
||||
+failed_inst_alloc:
|
||||
+ dev_err(inst->dev, "could not load rk3288_gpiomem");
|
||||
+ return err;
|
||||
+}
|
||||
+
|
||||
+static int rk3288_gpiomem_remove(struct platform_device *pdev)
|
||||
+{
|
||||
+ struct device *dev = inst->dev;
|
||||
+
|
||||
+ kfree(inst);
|
||||
+ device_destroy(rk3288_gpiomem_class, rk3288_gpiomem_devid);
|
||||
+ class_destroy(rk3288_gpiomem_class);
|
||||
+ cdev_del(&rk3288_gpiomem_cdev);
|
||||
+ unregister_chrdev_region(rk3288_gpiomem_devid, 1);
|
||||
+
|
||||
+ dev_info(dev, "GPIO mem driver removed - OK");
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+ /****************************************************************************
|
||||
+*
|
||||
+* Register the driver with device tree
|
||||
+*
|
||||
+***************************************************************************/
|
||||
+
|
||||
+static const struct of_device_id rk3288_gpiomem_of_match[] = {
|
||||
+ {.compatible = "rockchip,rk3288-gpiomem",},
|
||||
+ { /* sentinel */ },
|
||||
+};
|
||||
+
|
||||
+MODULE_DEVICE_TABLE(of, rk3288_gpiomem_of_match);
|
||||
+
|
||||
+static struct platform_driver rk3288_gpiomem_driver = {
|
||||
+ .probe = rk3288_gpiomem_probe,
|
||||
+ .remove = rk3288_gpiomem_remove,
|
||||
+ .driver = {
|
||||
+ .name = DRIVER_NAME,
|
||||
+ .owner = THIS_MODULE,
|
||||
+ .of_match_table = rk3288_gpiomem_of_match,
|
||||
+ },
|
||||
+};
|
||||
+
|
||||
+module_platform_driver(rk3288_gpiomem_driver);
|
||||
+
|
||||
+MODULE_ALIAS("platform:gpiomem-rk3288");
|
||||
+MODULE_LICENSE("GPL");
|
||||
+MODULE_DESCRIPTION("gpiomem driver for accessing GPIO from userspace");
|
||||
+MODULE_AUTHOR("Luke Wren <luke@raspberrypi.org>");
|
||||
\ No newline at end of file
|
|
@ -1,32 +0,0 @@
|
|||
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
|
||||
index bc3601a..37ae378 100644
|
||||
--- a/arch/arm/boot/dts/rk3288.dtsi
|
||||
+++ b/arch/arm/boot/dts/rk3288.dtsi
|
||||
@@ -467,13 +467,6 @@
|
||||
};
|
||||
|
||||
thermal-zones {
|
||||
- reserve_thermal: reserve_thermal {
|
||||
- polling-delay-passive = <1000>; /* milliseconds */
|
||||
- polling-delay = <5000>; /* milliseconds */
|
||||
-
|
||||
- thermal-sensors = <&tsadc 0>;
|
||||
- };
|
||||
-
|
||||
cpu_thermal: cpu_thermal {
|
||||
polling-delay-passive = <100>; /* milliseconds */
|
||||
polling-delay = <5000>; /* milliseconds */
|
||||
@@ -539,6 +532,13 @@
|
||||
};
|
||||
};
|
||||
};
|
||||
+
|
||||
+ reserve_thermal: reserve_thermal {
|
||||
+ polling-delay-passive = <1000>; /* milliseconds */
|
||||
+ polling-delay = <5000>; /* milliseconds */
|
||||
+
|
||||
+ thermal-sensors = <&tsadc 0>;
|
||||
+ };
|
||||
};
|
||||
|
||||
tsadc: tsadc@ff280000 {
|
|
@ -1,19 +0,0 @@
|
|||
diff --git a/sound/usb/card.c b/sound/usb/card.c
|
||||
index 2bfe4e80a..cea93aaf5 100644
|
||||
--- a/sound/usb/card.c
|
||||
+++ b/sound/usb/card.c
|
||||
@@ -382,6 +382,14 @@ static void usb_audio_make_shortname(struct usb_device *dev,
|
||||
}
|
||||
|
||||
strim(card->shortname);
|
||||
+
|
||||
+ /* Tinker Board ALC4040 CODEC */
|
||||
+
|
||||
+ if(USB_ID_VENDOR(chip->usb_id) == 0x0bda &&
|
||||
+ USB_ID_PRODUCT(chip->usb_id) == 0x481a) {
|
||||
+ strlcat(card->shortname, " OnBoard", sizeof(card->shortname));
|
||||
+ }
|
||||
+
|
||||
}
|
||||
|
||||
static void usb_audio_make_longname(struct usb_device *dev,
|
|
@ -1,61 +0,0 @@
|
|||
From 79384275ec5653e0856f7fe8d44f21fe7e06daab Mon Sep 17 00:00:00 2001
|
||||
From: Jonas Karlman <jonas@kwiboo.se>
|
||||
Date: Sun, 3 May 2020 16:51:31 +0000
|
||||
Subject: [PATCH 05/14] drm/rockchip: vop: filter modes outside 0.5% pixel
|
||||
clock tolerance
|
||||
|
||||
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
|
||||
---
|
||||
drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 29 +++++++++++++++++++++
|
||||
1 file changed, 29 insertions(+)
|
||||
|
||||
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
|
||||
index d04b3492b..8c9dfeac1 100644
|
||||
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
|
||||
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
|
||||
@@ -1036,6 +1036,34 @@ static void vop_crtc_disable_vblank(struct drm_crtc *crtc)
|
||||
spin_unlock_irqrestore(&vop->irq_lock, flags);
|
||||
}
|
||||
|
||||
+/*
|
||||
+ * The VESA DMT standard specifies a 0.5% pixel clock frequency tolerance.
|
||||
+ * The CVT spec reuses that tolerance in its examples.
|
||||
+ */
|
||||
+#define CLOCK_TOLERANCE_PER_MILLE 5
|
||||
+
|
||||
+static enum drm_mode_status vop_crtc_mode_valid(struct drm_crtc *crtc,
|
||||
+ const struct drm_display_mode *mode)
|
||||
+{
|
||||
+ struct vop *vop = to_vop(crtc);
|
||||
+ long rounded_rate;
|
||||
+ long lowest, highest;
|
||||
+
|
||||
+ rounded_rate = clk_round_rate(vop->dclk, mode->clock * 1000 + 999);
|
||||
+ if (rounded_rate < 0)
|
||||
+ return MODE_NOCLOCK;
|
||||
+
|
||||
+ lowest = mode->clock * (1000 - CLOCK_TOLERANCE_PER_MILLE);
|
||||
+ if (rounded_rate < lowest)
|
||||
+ return MODE_CLOCK_LOW;
|
||||
+
|
||||
+ highest = mode->clock * (1000 + CLOCK_TOLERANCE_PER_MILLE);
|
||||
+ if (rounded_rate > highest)
|
||||
+ return MODE_CLOCK_HIGH;
|
||||
+
|
||||
+ return MODE_OK;
|
||||
+}
|
||||
+
|
||||
static bool vop_crtc_mode_fixup(struct drm_crtc *crtc,
|
||||
const struct drm_display_mode *mode,
|
||||
struct drm_display_mode *adjusted_mode)
|
||||
@@ -1377,6 +1405,7 @@ static void vop_crtc_atomic_flush(struct drm_crtc *crtc,
|
||||
}
|
||||
|
||||
static const struct drm_crtc_helper_funcs vop_crtc_helper_funcs = {
|
||||
+ .mode_valid = vop_crtc_mode_valid,
|
||||
.mode_fixup = vop_crtc_mode_fixup,
|
||||
.atomic_check = vop_crtc_atomic_check,
|
||||
.atomic_begin = vop_crtc_atomic_begin,
|
||||
--
|
||||
2.26.2
|
||||
|
|
@ -1,46 +0,0 @@
|
|||
From 435bdc2bdfd2bd37e96b42c7c972ce271e06d90c Mon Sep 17 00:00:00 2001
|
||||
From: Douglas Anderson <dianders@chromium.org>
|
||||
Date: Mon, 11 Jul 2016 19:05:36 +0800
|
||||
Subject: [PATCH 06/14] drm/rockchip: dw_hdmi: Set cur_ctr to 0 always
|
||||
|
||||
Jitter was improved by lowering the MPLL bandwidth to account for high
|
||||
frequency noise in the rk3288 PLL. In each case MPLL bandwidth was
|
||||
lowered only enough to get us a comfortable margin. We believe that
|
||||
lowering the bandwidth like this is safe given sufficient testing.
|
||||
|
||||
Signed-off-by: Douglas Anderson <dianders@chromium.org>
|
||||
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
|
||||
---
|
||||
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 16 ++--------------
|
||||
1 file changed, 2 insertions(+), 14 deletions(-)
|
||||
|
||||
diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
|
||||
index 7f56d8c34..7d7ee5b26 100644
|
||||
--- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
|
||||
+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
|
||||
@@ -159,20 +159,8 @@ static const struct dw_hdmi_mpll_config rockchip_mpll_cfg[] = {
|
||||
static const struct dw_hdmi_curr_ctrl rockchip_cur_ctr[] = {
|
||||
/* pixelclk bpp8 bpp10 bpp12 */
|
||||
{
|
||||
- 40000000, { 0x0018, 0x0018, 0x0018 },
|
||||
- }, {
|
||||
- 65000000, { 0x0028, 0x0028, 0x0028 },
|
||||
- }, {
|
||||
- 66000000, { 0x0038, 0x0038, 0x0038 },
|
||||
- }, {
|
||||
- 74250000, { 0x0028, 0x0038, 0x0038 },
|
||||
- }, {
|
||||
- 83500000, { 0x0028, 0x0038, 0x0038 },
|
||||
- }, {
|
||||
- 146250000, { 0x0038, 0x0038, 0x0038 },
|
||||
- }, {
|
||||
- 148500000, { 0x0000, 0x0038, 0x0038 },
|
||||
- }, {
|
||||
+ 600000000, { 0x0000, 0x0000, 0x0000 },
|
||||
+ }, {
|
||||
~0UL, { 0x0000, 0x0000, 0x0000},
|
||||
}
|
||||
};
|
||||
--
|
||||
2.26.2
|
||||
|
|
@ -1,56 +0,0 @@
|
|||
From 63d794d460040c24526b2263af24421087721e35 Mon Sep 17 00:00:00 2001
|
||||
From: Yakir Yang <ykk@rock-chips.com>
|
||||
Date: Mon, 11 Jul 2016 19:05:39 +0800
|
||||
Subject: [PATCH 07/14] drm/rockchip: dw_hdmi: adjust cklvl & txlvl for RF/EMI
|
||||
|
||||
Dut to the high HDMI signal voltage driver, Mickey have meet
|
||||
a serious RF/EMI problem, so we decided to reduce HDMI signal
|
||||
voltage to a proper value.
|
||||
|
||||
The default params for phy is cklvl = 20 & txlvl = 13 (RF/EMI failed)
|
||||
ck: lvl = 13, term=100, vlo = 2.71, vhi=3.14, vswing = 0.43
|
||||
tx: lvl = 20, term=100, vlo = 2.81, vhi=3.16, vswing = 0.35
|
||||
|
||||
1. We decided to reduce voltage value to lower, but VSwing still
|
||||
keep high, RF/EMI have been improved but still failed.
|
||||
ck: lvl = 6, term=100, vlo = 2.61, vhi=3.11, vswing = 0.50
|
||||
tx: lvl = 6, term=100, vlo = 2.61, vhi=3.11, vswing = 0.50
|
||||
|
||||
2. We try to keep voltage value and vswing both lower, then RF/EMI
|
||||
test all passed ;)
|
||||
ck: lvl = 11, term= 66, vlo = 2.68, vhi=3.09, vswing = 0.40
|
||||
tx: lvl = 11, term= 66, vlo = 2.68, vhi=3.09, vswing = 0.40
|
||||
When we back to run HDMI different test and single-end test, we see
|
||||
different test passed, but signle-end test failed. The oscilloscope
|
||||
show that simgle-end clock's VL value is 1.78v (which remind LowLimit
|
||||
should not lower then 2.6v).
|
||||
|
||||
3. That's to say there are some different between PHY document and
|
||||
measure value. And according to experiment 2 results, we need to
|
||||
higher clock voltage and lower data voltage, then we can keep RF/EMI
|
||||
satisfied and single-end & differen test passed.
|
||||
ck: lvl = 9, term=100, vlo = 2.65, vhi=3.12, vswing = 0.47
|
||||
tx: lvl = 16, term=100, vlo = 2.75, vhi=3.15, vswing = 0.39
|
||||
|
||||
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
|
||||
Reviewed-by: Douglas Anderson <dianders@chromium.org>
|
||||
---
|
||||
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
|
||||
index 7d7ee5b26..3cd86070f 100644
|
||||
--- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
|
||||
+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
|
||||
@@ -168,7 +168,7 @@ static const struct dw_hdmi_curr_ctrl rockchip_cur_ctr[] = {
|
||||
static const struct dw_hdmi_phy_config rockchip_phy_config[] = {
|
||||
/*pixelclk symbol term vlev*/
|
||||
{ 74250000, 0x8009, 0x0004, 0x0272},
|
||||
- { 148500000, 0x802b, 0x0004, 0x028d},
|
||||
+ { 165000000, 0x802b, 0x0004, 0x0209},
|
||||
{ 297000000, 0x8039, 0x0005, 0x028d},
|
||||
{ ~0UL, 0x0000, 0x0000, 0x0000}
|
||||
};
|
||||
--
|
||||
2.26.2
|
||||
|
|
@ -1,190 +0,0 @@
|
|||
From 0a07a7ed53b37c7a53df3e14ab29d366522d2439 Mon Sep 17 00:00:00 2001
|
||||
From: Douglas Anderson <dianders@chromium.org>
|
||||
Date: Mon, 11 Jul 2016 19:05:42 +0800
|
||||
Subject: [PATCH 08/14] drm/rockchip: dw_hdmi: Use auto-generated tables
|
||||
MIME-Version: 1.0
|
||||
Content-Type: text/plain; charset=UTF-8
|
||||
Content-Transfer-Encoding: 8bit
|
||||
|
||||
The previous tables for mpll_cfg and curr_ctrl were created using the
|
||||
20-pages of example settings provided by the PHY vendor. Those
|
||||
example settings weren't particularly dense, so there were places
|
||||
where we were guessing what the settings would be for 10-bit and
|
||||
12-bit (not that we use those anyway). It was also always a lot of
|
||||
extra work every time we wanted to add a new clock rate since we had
|
||||
to cross-reference several tables.
|
||||
|
||||
In <http://crosreview.com/285855> I've gone through the work to figure
|
||||
out how to generate this table automatically. Let's now use the
|
||||
automatically generated table and then we'll never need to look at it
|
||||
again.
|
||||
|
||||
We only support 8-bit mode right now and only support a small number
|
||||
of clock rates and and I've verified that the only 8-bit rate that was
|
||||
affected was 148.5. That mode appears to have been wrong in the old
|
||||
table.
|
||||
|
||||
Signed-off-by: Douglas Anderson <dianders@chromium.org>
|
||||
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
|
||||
Reviewed-by: Stéphane Marchesin <marcheu@chromium.org>
|
||||
---
|
||||
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 130 +++++++++++---------
|
||||
1 file changed, 69 insertions(+), 61 deletions(-)
|
||||
|
||||
diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
|
||||
index 3cd86070f..c0f67309b 100644
|
||||
--- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
|
||||
+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
|
||||
@@ -78,80 +78,88 @@ struct rockchip_hdmi {
|
||||
|
||||
static const struct dw_hdmi_mpll_config rockchip_mpll_cfg[] = {
|
||||
{
|
||||
- 27000000, {
|
||||
- { 0x00b3, 0x0000},
|
||||
- { 0x2153, 0x0000},
|
||||
- { 0x40f3, 0x0000}
|
||||
+ 30666000, {
|
||||
+ { 0x00b3, 0x0000 },
|
||||
+ { 0x2153, 0x0000 },
|
||||
+ { 0x40f3, 0x0000 },
|
||||
},
|
||||
- }, {
|
||||
- 36000000, {
|
||||
- { 0x00b3, 0x0000},
|
||||
- { 0x2153, 0x0000},
|
||||
- { 0x40f3, 0x0000}
|
||||
+ }, {
|
||||
+ 36800000, {
|
||||
+ { 0x00b3, 0x0000 },
|
||||
+ { 0x2153, 0x0000 },
|
||||
+ { 0x40a2, 0x0001 },
|
||||
},
|
||||
- }, {
|
||||
- 40000000, {
|
||||
- { 0x00b3, 0x0000},
|
||||
- { 0x2153, 0x0000},
|
||||
- { 0x40f3, 0x0000}
|
||||
+ }, {
|
||||
+ 46000000, {
|
||||
+ { 0x00b3, 0x0000 },
|
||||
+ { 0x2142, 0x0001 },
|
||||
+ { 0x40a2, 0x0001 },
|
||||
},
|
||||
- }, {
|
||||
- 54000000, {
|
||||
- { 0x0072, 0x0001},
|
||||
- { 0x2142, 0x0001},
|
||||
- { 0x40a2, 0x0001},
|
||||
+ }, {
|
||||
+ 61333000, {
|
||||
+ { 0x0072, 0x0001 },
|
||||
+ { 0x2142, 0x0001 },
|
||||
+ { 0x40a2, 0x0001 },
|
||||
},
|
||||
- }, {
|
||||
- 65000000, {
|
||||
- { 0x0072, 0x0001},
|
||||
- { 0x2142, 0x0001},
|
||||
- { 0x40a2, 0x0001},
|
||||
+ }, {
|
||||
+ 73600000, {
|
||||
+ { 0x0072, 0x0001 },
|
||||
+ { 0x2142, 0x0001 },
|
||||
+ { 0x4061, 0x0002 },
|
||||
},
|
||||
- }, {
|
||||
- 66000000, {
|
||||
- { 0x013e, 0x0003},
|
||||
- { 0x217e, 0x0002},
|
||||
- { 0x4061, 0x0002}
|
||||
+ }, {
|
||||
+ 92000000, {
|
||||
+ { 0x0072, 0x0001 },
|
||||
+ { 0x2145, 0x0002 },
|
||||
+ { 0x4061, 0x0002 },
|
||||
+ },
|
||||
+ }, {
|
||||
+ 122666000, {
|
||||
+ { 0x0051, 0x0002 },
|
||||
+ { 0x2145, 0x0002 },
|
||||
+ { 0x4061, 0x0002 },
|
||||
},
|
||||
- }, {
|
||||
- 74250000, {
|
||||
- { 0x0072, 0x0001},
|
||||
- { 0x2145, 0x0002},
|
||||
- { 0x4061, 0x0002}
|
||||
+ }, {
|
||||
+ 147200000, {
|
||||
+ { 0x0051, 0x0002 },
|
||||
+ { 0x2145, 0x0002 },
|
||||
+ { 0x4064, 0x0003 },
|
||||
},
|
||||
- }, {
|
||||
- 83500000, {
|
||||
- { 0x0072, 0x0001},
|
||||
+ }, {
|
||||
+ 184000000, {
|
||||
+ { 0x0051, 0x0002 },
|
||||
+ { 0x214c, 0x0003 },
|
||||
+ { 0x4064, 0x0003 },
|
||||
},
|
||||
- }, {
|
||||
- 108000000, {
|
||||
- { 0x0051, 0x0002},
|
||||
- { 0x2145, 0x0002},
|
||||
- { 0x4061, 0x0002}
|
||||
+ }, {
|
||||
+ 226666000, {
|
||||
+ { 0x0040, 0x0003 },
|
||||
+ { 0x214c, 0x0003 },
|
||||
+ { 0x4064, 0x0003 },
|
||||
},
|
||||
- }, {
|
||||
- 106500000, {
|
||||
- { 0x0051, 0x0002},
|
||||
- { 0x2145, 0x0002},
|
||||
- { 0x4061, 0x0002}
|
||||
+ }, {
|
||||
+ 272000000, {
|
||||
+ { 0x0040, 0x0003 },
|
||||
+ { 0x214c, 0x0003 },
|
||||
+ { 0x5a64, 0x0003 },
|
||||
},
|
||||
- }, {
|
||||
- 146250000, {
|
||||
- { 0x0051, 0x0002},
|
||||
- { 0x2145, 0x0002},
|
||||
- { 0x4061, 0x0002}
|
||||
+ }, {
|
||||
+ 340000000, {
|
||||
+ { 0x0040, 0x0003 },
|
||||
+ { 0x3b4c, 0x0003 },
|
||||
+ { 0x5a64, 0x0003 },
|
||||
},
|
||||
- }, {
|
||||
- 148500000, {
|
||||
- { 0x0051, 0x0003},
|
||||
- { 0x214c, 0x0003},
|
||||
- { 0x4064, 0x0003}
|
||||
+ }, {
|
||||
+ 600000000, {
|
||||
+ { 0x1a40, 0x0003 },
|
||||
+ { 0x3b4c, 0x0003 },
|
||||
+ { 0x5a64, 0x0003 },
|
||||
},
|
||||
- }, {
|
||||
+ }, {
|
||||
~0UL, {
|
||||
- { 0x00a0, 0x000a },
|
||||
- { 0x2001, 0x000f },
|
||||
- { 0x4002, 0x000f },
|
||||
+ { 0x0000, 0x0000 },
|
||||
+ { 0x0000, 0x0000 },
|
||||
+ { 0x0000, 0x0000 },
|
||||
},
|
||||
}
|
||||
};
|
||||
--
|
||||
2.26.2
|
||||
|
|
@ -1,29 +0,0 @@
|
|||
From f9ffd1aedee369f956201abfd1349e00a27f1870 Mon Sep 17 00:00:00 2001
|
||||
From: Nickey Yang <nickey.yang@rock-chips.com>
|
||||
Date: Mon, 13 Feb 2017 15:40:29 +0800
|
||||
Subject: [PATCH 09/14] drm/rockchip: dw_hdmi: add default 594Mhz clk for
|
||||
4K@60hz
|
||||
|
||||
add 594Mhz configuration parameters in rockchip_phy_config
|
||||
|
||||
Change-Id: Iaa335cdd90059817fd9892877e574f8b84f2b5dc
|
||||
Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
|
||||
---
|
||||
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 1 +
|
||||
1 file changed, 1 insertion(+)
|
||||
|
||||
diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
|
||||
index c0f67309b..1a047f9d0 100644
|
||||
--- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
|
||||
+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
|
||||
@@ -178,6 +178,7 @@ static const struct dw_hdmi_phy_config rockchip_phy_config[] = {
|
||||
{ 74250000, 0x8009, 0x0004, 0x0272},
|
||||
{ 165000000, 0x802b, 0x0004, 0x0209},
|
||||
{ 297000000, 0x8039, 0x0005, 0x028d},
|
||||
+ { 594000000, 0x8039, 0x0000, 0x019d},
|
||||
{ ~0UL, 0x0000, 0x0000, 0x0000}
|
||||
};
|
||||
|
||||
--
|
||||
2.26.2
|
||||
|
|
@ -1,50 +0,0 @@
|
|||
From f83d188f49bd11d085c3f4160b208cb8194daff4 Mon Sep 17 00:00:00 2001
|
||||
From: Jonas Karlman <jonas@kwiboo.se>
|
||||
Date: Wed, 8 Jan 2020 21:07:52 +0000
|
||||
Subject: [PATCH] drm/rockchip: dw-hdmi: limit tmds to 340mhz
|
||||
|
||||
RK3228/RK3328 does not provide a stable hdmi signal at TMDS rates
|
||||
above 371.25MHz (340MHz pixel clock).
|
||||
|
||||
Limit the pixel clock rate to 340MHz to provide a stable signal.
|
||||
Also limit the pixel clock to the display reported max tmds clock.
|
||||
|
||||
This also enables use of pixel clocks up to 340MHz on RK3288/RK3399.
|
||||
And limit resolution to 3840x2160
|
||||
|
||||
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
|
||||
---
|
||||
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 16 ++++------------
|
||||
1 file changed, 4 insertions(+), 12 deletions(-)
|
||||
|
||||
diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
|
||||
index b5d2cdaa24fa..5f7ab8e6bb72 100644
|
||||
--- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
|
||||
+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
|
||||
@@ -221,19 +221,11 @@ dw_hdmi_rockchip_mode_valid(struct dw_hdmi *hdmi, void *data,
|
||||
const struct drm_display_info *info,
|
||||
const struct drm_display_mode *mode)
|
||||
{
|
||||
- const struct dw_hdmi_mpll_config *mpll_cfg = rockchip_mpll_cfg;
|
||||
- int pclk = mode->clock * 1000;
|
||||
- bool valid = false;
|
||||
- int i;
|
||||
+ if (mode->clock > 340000 ||
|
||||
+ (info->max_tmds_clock && mode->clock > info->max_tmds_clock))
|
||||
+ return MODE_CLOCK_HIGH;
|
||||
|
||||
- for (i = 0; mpll_cfg[i].mpixelclock != (~0UL); i++) {
|
||||
- if (pclk == mpll_cfg[i].mpixelclock) {
|
||||
- valid = true;
|
||||
- break;
|
||||
- }
|
||||
- }
|
||||
-
|
||||
- return (valid) ? MODE_OK : MODE_BAD;
|
||||
+ return drm_mode_validate_size(mode, 3840, 2160);
|
||||
}
|
||||
|
||||
static void dw_hdmi_rockchip_encoder_disable(struct drm_encoder *encoder)
|
||||
--
|
||||
2.26.2
|
||||
|
|
@ -1,30 +0,0 @@
|
|||
From 6d23cb2bd0c027ed562ece6a9ead8c9a5cfbcb47 Mon Sep 17 00:00:00 2001
|
||||
From: Jonas Karlman <jonas@kwiboo.se>
|
||||
Date: Sun, 3 May 2020 16:54:05 +0000
|
||||
Subject: [PATCH 11/14] HACK: drm/rockchip: vop: limit resolution to 3840x2160
|
||||
|
||||
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
|
||||
---
|
||||
drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 6 ++++++
|
||||
1 file changed, 6 insertions(+)
|
||||
|
||||
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
|
||||
index 8c9dfeac1..dd5438e7b 100644
|
||||
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
|
||||
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
|
||||
@@ -1049,6 +1049,12 @@ static enum drm_mode_status vop_crtc_mode_valid(struct drm_crtc *crtc,
|
||||
long rounded_rate;
|
||||
long lowest, highest;
|
||||
|
||||
+ if (mode->hdisplay > 3840)
|
||||
+ return MODE_VIRTUAL_X;
|
||||
+
|
||||
+ if (mode->vdisplay > 2160)
|
||||
+ return MODE_VIRTUAL_Y;
|
||||
+
|
||||
rounded_rate = clk_round_rate(vop->dclk, mode->clock * 1000 + 999);
|
||||
if (rounded_rate < 0)
|
||||
return MODE_NOCLOCK;
|
||||
--
|
||||
2.26.2
|
||||
|
|
@ -1,50 +0,0 @@
|
|||
From f12f665a30838e00faef29dcab92dcd799cb5275 Mon Sep 17 00:00:00 2001
|
||||
From: Nickey Yang <nickey.yang@rock-chips.com>
|
||||
Date: Mon, 17 Jul 2017 16:35:34 +0800
|
||||
Subject: [PATCH 12/14] MINIARM: set npll be used for hdmi only
|
||||
|
||||
Change-Id: I8bebfb2cfb68e3dad172e5547d3886526ad5e912
|
||||
Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
|
||||
---
|
||||
arch/arm/boot/dts/rk3288.dtsi | 2 ++
|
||||
drivers/clk/rockchip/clk-rk3288.c | 4 ++--
|
||||
2 files changed, 4 insertions(+), 2 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
|
||||
index 9beb66216..42e3075b5 100644
|
||||
--- a/arch/arm/boot/dts/rk3288.dtsi
|
||||
+++ b/arch/arm/boot/dts/rk3288.dtsi
|
||||
@@ -1031,6 +1031,8 @@ vopb: vop@ff930000 {
|
||||
resets = <&cru SRST_LCDC0_AXI>, <&cru SRST_LCDC0_AHB>, <&cru SRST_LCDC0_DCLK>;
|
||||
reset-names = "axi", "ahb", "dclk";
|
||||
iommus = <&vopb_mmu>;
|
||||
+ assigned-clocks = <&cru DCLK_VOP0>;
|
||||
+ assigned-clock-parents = <&cru PLL_NPLL>;
|
||||
status = "disabled";
|
||||
|
||||
vopb_out: port {
|
||||
diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c
|
||||
index cc2a177bb..799207a2b 100644
|
||||
--- a/drivers/clk/rockchip/clk-rk3288.c
|
||||
+++ b/drivers/clk/rockchip/clk-rk3288.c
|
||||
@@ -226,7 +226,7 @@ static struct rockchip_pll_clock rk3288_pll_clks[] __initdata = {
|
||||
[gpll] = PLL(pll_rk3066, PLL_GPLL, "gpll", mux_pll_p, 0, RK3288_PLL_CON(12),
|
||||
RK3288_MODE_CON, 12, 8, ROCKCHIP_PLL_SYNC_RATE, rk3288_pll_rates),
|
||||
[npll] = PLL(pll_rk3066, PLL_NPLL, "npll", mux_pll_p, 0, RK3288_PLL_CON(16),
|
||||
- RK3288_MODE_CON, 14, 9, ROCKCHIP_PLL_SYNC_RATE, rk3288_pll_rates),
|
||||
+ RK3288_MODE_CON, 14, 9, 0, rk3288_pll_rates),
|
||||
};
|
||||
|
||||
static struct clk_div_table div_hclk_cpu_t[] = {
|
||||
@@ -438,7 +438,7 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = {
|
||||
RK3288_CLKSEL_CON(30), 14, 2, MFLAGS, 8, 5, DFLAGS,
|
||||
RK3288_CLKGATE_CON(3), 4, GFLAGS),
|
||||
|
||||
- COMPOSITE(DCLK_VOP0, "dclk_vop0", mux_pll_src_cpll_gpll_npll_p, 0,
|
||||
+ COMPOSITE(DCLK_VOP0, "dclk_vop0", mux_pll_src_cpll_gpll_npll_p, CLK_SET_RATE_NO_REPARENT | CLK_SET_RATE_PARENT,
|
||||
RK3288_CLKSEL_CON(27), 0, 2, MFLAGS, 8, 8, DFLAGS,
|
||||
RK3288_CLKGATE_CON(3), 1, GFLAGS),
|
||||
COMPOSITE(DCLK_VOP1, "dclk_vop1", mux_pll_src_cpll_gpll_npll_p, 0,
|
||||
--
|
||||
2.26.2
|
||||
|
|
@ -1,57 +0,0 @@
|
|||
From 1b9b5dc919e9c66df1de9e502561394230d301a5 Mon Sep 17 00:00:00 2001
|
||||
From: Jonas Karlman <jonas@kwiboo.se>
|
||||
Date: Sat, 4 Aug 2018 14:51:14 +0200
|
||||
Subject: [PATCH 13/14] clk: rockchip: rk3288: use npll table to to improve
|
||||
HDMI compatibility
|
||||
|
||||
Based on https://github.com/TinkerBoard/debian_kernel/commit/3d90870530b8a2901681f7b7fa598ee7381e49f3
|
||||
|
||||
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
|
||||
---
|
||||
drivers/clk/rockchip/clk-rk3288.c | 23 ++++++++++++++++++++++-
|
||||
1 file changed, 22 insertions(+), 1 deletion(-)
|
||||
|
||||
diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c
|
||||
index 799207a2b..6fa79d1db 100644
|
||||
--- a/drivers/clk/rockchip/clk-rk3288.c
|
||||
+++ b/drivers/clk/rockchip/clk-rk3288.c
|
||||
@@ -116,6 +116,27 @@ static struct rockchip_pll_rate_table rk3288_pll_rates[] = {
|
||||
{ /* sentinel */ },
|
||||
};
|
||||
|
||||
+static struct rockchip_pll_rate_table rk3288_npll_rates[] = {
|
||||
+ RK3066_PLL_RATE_NB(594000000, 1, 99, 4, 32),
|
||||
+ RK3066_PLL_RATE_NB(585000000, 6, 585, 4, 32),
|
||||
+ RK3066_PLL_RATE_NB(432000000, 3, 216, 4, 32),
|
||||
+ RK3066_PLL_RATE_NB(426000000, 3, 213, 4, 32),
|
||||
+ RK3066_PLL_RATE_NB(400000000, 1, 100, 6, 32),
|
||||
+ RK3066_PLL_RATE_NB(342000000, 3, 171, 4, 32),
|
||||
+ RK3066_PLL_RATE_NB(297000000, 2, 198, 8, 16),
|
||||
+ RK3066_PLL_RATE_NB(270000000, 1, 135, 12, 32),
|
||||
+ RK3066_PLL_RATE_NB(260000000, 1, 130, 12, 32),
|
||||
+ RK3066_PLL_RATE_NB(148500000, 1, 99, 16, 32),
|
||||
+ RK3066_PLL_RATE(148352000, 13, 1125, 14),
|
||||
+ RK3066_PLL_RATE_NB(146250000, 6, 585, 16, 32),
|
||||
+ RK3066_PLL_RATE_NB(108000000, 1, 54, 12, 32),
|
||||
+ RK3066_PLL_RATE_NB(106500000, 4, 213, 12, 32),
|
||||
+ RK3066_PLL_RATE_NB(85500000, 4, 171, 12, 32),
|
||||
+ RK3066_PLL_RATE_NB(74250000, 4, 198, 16, 32),
|
||||
+ RK3066_PLL_RATE(74176000, 26, 1125, 14),
|
||||
+ { /* sentinel */ },
|
||||
+};
|
||||
+
|
||||
#define RK3288_DIV_ACLK_CORE_M0_MASK 0xf
|
||||
#define RK3288_DIV_ACLK_CORE_M0_SHIFT 0
|
||||
#define RK3288_DIV_ACLK_CORE_MP_MASK 0xf
|
||||
@@ -226,7 +247,7 @@ static struct rockchip_pll_clock rk3288_pll_clks[] __initdata = {
|
||||
[gpll] = PLL(pll_rk3066, PLL_GPLL, "gpll", mux_pll_p, 0, RK3288_PLL_CON(12),
|
||||
RK3288_MODE_CON, 12, 8, ROCKCHIP_PLL_SYNC_RATE, rk3288_pll_rates),
|
||||
[npll] = PLL(pll_rk3066, PLL_NPLL, "npll", mux_pll_p, 0, RK3288_PLL_CON(16),
|
||||
- RK3288_MODE_CON, 14, 9, 0, rk3288_pll_rates),
|
||||
+ RK3288_MODE_CON, 14, 9, 0, rk3288_npll_rates),
|
||||
};
|
||||
|
||||
static struct clk_div_table div_hclk_cpu_t[] = {
|
||||
--
|
||||
2.26.2
|
||||
|
|
@ -1,54 +0,0 @@
|
|||
From 8a24dd1ffe1bfd3186ef3fbda721d29e318a1ce2 Mon Sep 17 00:00:00 2001
|
||||
From: Jonas Karlman <jonas@kwiboo.se>
|
||||
Date: Sun, 28 Oct 2018 21:43:01 +0100
|
||||
Subject: [PATCH 14/14] clk: rockchip: rk3288: add more npll clocks
|
||||
|
||||
Fixes 2560x1440@60Hz, 1600x1200@60Hz, 1920x1200@60Hz, 1680x1050@60Hz and 1440x900@60Hz modes on my monitor
|
||||
|
||||
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
|
||||
---
|
||||
drivers/clk/rockchip/clk-rk3288.c | 16 ++++++++++++++++
|
||||
1 file changed, 16 insertions(+)
|
||||
|
||||
diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c
|
||||
index 6fa79d1db..98dcbf2e0 100644
|
||||
--- a/drivers/clk/rockchip/clk-rk3288.c
|
||||
+++ b/drivers/clk/rockchip/clk-rk3288.c
|
||||
@@ -122,18 +122,34 @@ static struct rockchip_pll_rate_table rk3288_npll_rates[] = {
|
||||
RK3066_PLL_RATE_NB(432000000, 3, 216, 4, 32),
|
||||
RK3066_PLL_RATE_NB(426000000, 3, 213, 4, 32),
|
||||
RK3066_PLL_RATE_NB(400000000, 1, 100, 6, 32),
|
||||
+ RK3066_PLL_RATE(348500000, 8, 697, 6),
|
||||
RK3066_PLL_RATE_NB(342000000, 3, 171, 4, 32),
|
||||
RK3066_PLL_RATE_NB(297000000, 2, 198, 8, 16),
|
||||
RK3066_PLL_RATE_NB(270000000, 1, 135, 12, 32),
|
||||
RK3066_PLL_RATE_NB(260000000, 1, 130, 12, 32),
|
||||
+ RK3066_PLL_RATE(241500000, 2, 161, 8),
|
||||
+ RK3066_PLL_RATE(162000000, 1, 81, 12),
|
||||
+ RK3066_PLL_RATE(154000000, 6, 539, 14),
|
||||
RK3066_PLL_RATE_NB(148500000, 1, 99, 16, 32),
|
||||
RK3066_PLL_RATE(148352000, 13, 1125, 14),
|
||||
RK3066_PLL_RATE_NB(146250000, 6, 585, 16, 32),
|
||||
+ RK3066_PLL_RATE(121750000, 6, 487, 16),
|
||||
+ RK3066_PLL_RATE(119000000, 3, 238, 16),
|
||||
RK3066_PLL_RATE_NB(108000000, 1, 54, 12, 32),
|
||||
RK3066_PLL_RATE_NB(106500000, 4, 213, 12, 32),
|
||||
+ RK3066_PLL_RATE(101000000, 3, 202, 16),
|
||||
+ RK3066_PLL_RATE(88750000, 6, 355, 16),
|
||||
RK3066_PLL_RATE_NB(85500000, 4, 171, 12, 32),
|
||||
+ RK3066_PLL_RATE(83500000, 3, 167, 16),
|
||||
+ RK3066_PLL_RATE(79500000, 1, 53, 16),
|
||||
RK3066_PLL_RATE_NB(74250000, 4, 198, 16, 32),
|
||||
RK3066_PLL_RATE(74176000, 26, 1125, 14),
|
||||
+ RK3066_PLL_RATE(72000000, 1, 48, 16),
|
||||
+ RK3066_PLL_RATE(71000000, 3, 142, 16),
|
||||
+ RK3066_PLL_RATE(68250000, 2, 91, 16),
|
||||
+ RK3066_PLL_RATE(65000000, 3, 130, 16),
|
||||
+ RK3066_PLL_RATE(40000000, 3, 80, 16),
|
||||
+ RK3066_PLL_RATE(33750000, 2, 45, 16),
|
||||
{ /* sentinel */ },
|
||||
};
|
||||
|
||||
--
|
||||
2.26.2
|
||||
|
|
@ -1,26 +0,0 @@
|
|||
From e7662fd8ce2e0fe50d7b1c65cb893fd33c3c6f99 Mon Sep 17 00:00:00 2001
|
||||
From: =?UTF-8?q?=C5=81ukasz?= <lukasz@czak.pl>
|
||||
Date: Thu, 7 May 2020 13:41:00 +0200
|
||||
Subject: [PATCH 3/3] FIXME: Don't use vop_crtc_mode_valid
|
||||
|
||||
DSI screen mode is filtered out by clock tolerance check.
|
||||
---
|
||||
drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
|
||||
index 1c0424bba..0a50b230d 100644
|
||||
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
|
||||
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
|
||||
@@ -1411,7 +1411,7 @@ static void vop_crtc_atomic_flush(struct drm_crtc *crtc,
|
||||
}
|
||||
|
||||
static const struct drm_crtc_helper_funcs vop_crtc_helper_funcs = {
|
||||
- .mode_valid = vop_crtc_mode_valid,
|
||||
+ /* .mode_valid = vop_crtc_mode_valid, */
|
||||
.mode_fixup = vop_crtc_mode_fixup,
|
||||
.atomic_check = vop_crtc_atomic_check,
|
||||
.atomic_begin = vop_crtc_atomic_begin,
|
||||
--
|
||||
2.26.2
|
||||
|
|
@ -1,80 +0,0 @@
|
|||
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
|
||||
index 58bd91539..9c0dac199 100644
|
||||
--- a/arch/arm/boot/dts/rk3288.dtsi
|
||||
+++ b/arch/arm/boot/dts/rk3288.dtsi
|
||||
@@ -153,6 +153,75 @@
|
||||
opp-hz = /bits/ 64 <1608000000>;
|
||||
opp-microvolt = <1350000>;
|
||||
};
|
||||
+ opp@1704000000 {
|
||||
+ opp-hz = /bits/ 64 <1704000000>;
|
||||
+ opp-microvolt = <1350000>;
|
||||
+ };
|
||||
+ opp@1800000000 {
|
||||
+ opp-hz = /bits/ 64 <1800000000>;
|
||||
+ opp-microvolt = <1400000>;
|
||||
+ };
|
||||
+ /* boot-only frequencies below */
|
||||
+ opp@1896000000 {
|
||||
+ opp-hz = /bits/ 64 <1896000000>;
|
||||
+ opp-microvolt = <1425000>;
|
||||
+ turbo-mode;
|
||||
+ };
|
||||
+ opp@1920000000 {
|
||||
+ opp-hz = /bits/ 64 <1920000000>;
|
||||
+ opp-microvolt = <1425000>;
|
||||
+ turbo-mode;
|
||||
+ };
|
||||
+ opp@1992000000 {
|
||||
+ opp-hz = /bits/ 64 <1992000000>;
|
||||
+ opp-microvolt = <1450000>;
|
||||
+ turbo-mode;
|
||||
+ };
|
||||
+ opp@2016000000 {
|
||||
+ opp-hz = /bits/ 64 <2016000000>;
|
||||
+ opp-microvolt = <1475000>;
|
||||
+ turbo-mode;
|
||||
+ };
|
||||
+ opp@2040000000 {
|
||||
+ opp-hz = /bits/ 64 <2040000000>;
|
||||
+ opp-microvolt = <1475000>;
|
||||
+ turbo-mode;
|
||||
+ };
|
||||
+ opp@2064000000 {
|
||||
+ opp-hz = /bits/ 64 <2064000000>;
|
||||
+ opp-microvolt = <1475000>;
|
||||
+ turbo-mode;
|
||||
+ };
|
||||
+ opp@2088000000 {
|
||||
+ opp-hz = /bits/ 64 <2088000000>;
|
||||
+ opp-microvolt = <1500000>;
|
||||
+ turbo-mode;
|
||||
+ };
|
||||
+ opp@2112000000 {
|
||||
+ opp-hz = /bits/ 64 <2112000000>;
|
||||
+ opp-microvolt = <1500000>;
|
||||
+ turbo-mode;
|
||||
+ };
|
||||
+ opp@2136000000 {
|
||||
+ opp-hz = /bits/ 64 <2136000000>;
|
||||
+ opp-microvolt = <1500000>;
|
||||
+ turbo-mode;
|
||||
+ };
|
||||
+ opp@2160000000 {
|
||||
+ opp-hz = /bits/ 64 <2160000000>;
|
||||
+ opp-microvolt = <1500000>;
|
||||
+ turbo-mode;
|
||||
+ };
|
||||
+ opp@2184000000 {
|
||||
+ opp-hz = /bits/ 64 <2184000000>;
|
||||
+ opp-microvolt = <1500000>;
|
||||
+ turbo-mode;
|
||||
+ };
|
||||
+ opp@2208000000 {
|
||||
+ opp-hz = /bits/ 64 <2208000000>;
|
||||
+ opp-microvolt = <1500000>;
|
||||
+ turbo-mode;
|
||||
+ };
|
||||
};
|
||||
|
||||
amba {
|
|
@ -1,25 +0,0 @@
|
|||
diff --git a/arch/arm/boot/dts/rk3288-tinker.dtsi b/arch/arm/boot/dts/rk3288-tinker.dtsi
|
||||
index f88c913ff..7f04ccbdf 100644
|
||||
--- a/arch/arm/boot/dts/rk3288-tinker.dtsi
|
||||
+++ b/arch/arm/boot/dts/rk3288-tinker.dtsi
|
||||
@@ -547,3 +547,20 @@
|
||||
&gpiomem {
|
||||
status = "okay";
|
||||
};
|
||||
+
|
||||
+&emmc {
|
||||
+ bus-width = <8>;
|
||||
+ cap-mmc-highspeed;
|
||||
+ non-removable;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>;
|
||||
+ max-frequency = <150000000>;
|
||||
+ mmc-hs200-1_8v;
|
||||
+ mmc-ddr-1_8v;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&hdmi {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&hdmi_cec_c0>;
|
||||
+};
|
|
@ -1,23 +0,0 @@
|
|||
diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c
|
||||
index a907d7b06..ec71996c7 100644
|
||||
--- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c
|
||||
+++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c
|
||||
@@ -619,13 +619,17 @@ BRCMF_FW_DEF(4354, "brcmfmac4354-sdio");
|
||||
BRCMF_FW_DEF(4356, "brcmfmac4356-sdio");
|
||||
BRCMF_FW_DEF(4373, "brcmfmac4373-sdio");
|
||||
|
||||
+/* AMPAK */
|
||||
+BRCMF_FW_DEF(AP6330, "brcmfmac-ap6330-sdio");
|
||||
+
|
||||
static const struct brcmf_firmware_mapping brcmf_sdio_fwnames[] = {
|
||||
BRCMF_FW_ENTRY(BRCM_CC_43143_CHIP_ID, 0xFFFFFFFF, 43143),
|
||||
BRCMF_FW_ENTRY(BRCM_CC_43241_CHIP_ID, 0x0000001F, 43241B0),
|
||||
BRCMF_FW_ENTRY(BRCM_CC_43241_CHIP_ID, 0x00000020, 43241B4),
|
||||
BRCMF_FW_ENTRY(BRCM_CC_43241_CHIP_ID, 0xFFFFFFC0, 43241B5),
|
||||
BRCMF_FW_ENTRY(BRCM_CC_4329_CHIP_ID, 0xFFFFFFFF, 4329),
|
||||
- BRCMF_FW_ENTRY(BRCM_CC_4330_CHIP_ID, 0xFFFFFFFF, 4330),
|
||||
+ BRCMF_FW_ENTRY(BRCM_CC_4330_CHIP_ID, 0xFFFFFFEF, 4330),
|
||||
+ BRCMF_FW_ENTRY(BRCM_CC_4330_CHIP_ID, 0x10, AP6330),
|
||||
BRCMF_FW_ENTRY(BRCM_CC_4334_CHIP_ID, 0xFFFFFFFF, 4334),
|
||||
BRCMF_FW_ENTRY(BRCM_CC_43340_CHIP_ID, 0xFFFFFFFF, 43340),
|
||||
BRCMF_FW_ENTRY(BRCM_CC_43341_CHIP_ID, 0xFFFFFFFF, 43340),
|
|
@ -1,83 +0,0 @@
|
|||
diff --git a/arch/arm/boot/.gitignore b/arch/arm/boot/.gitignore
|
||||
index 3c79f859..4e5c1d59 100644
|
||||
--- a/arch/arm/boot/.gitignore
|
||||
+++ b/arch/arm/boot/.gitignore
|
||||
@@ -3,3 +3,5 @@ zImage
|
||||
xipImage
|
||||
bootpImage
|
||||
uImage
|
||||
+*.dtb*
|
||||
+*.scr
|
||||
diff --git a/scripts/Makefile.dtbinst b/scripts/Makefile.dtbinst
|
||||
index 50d580d77..94bd15617 100644
|
||||
--- a/scripts/Makefile.dtbinst
|
||||
+++ b/scripts/Makefile.dtbinst
|
||||
@@ -18,9 +18,12 @@ include scripts/Kbuild.include
|
||||
include $(src)/Makefile
|
||||
|
||||
dtbs := $(addprefix $(dst)/, $(dtb-y) $(if $(CONFIG_OF_ALL_DTBS),$(dtb-)))
|
||||
+dtbos := $(addprefix $(dst)/, $(dtbo-y))
|
||||
+scrs := $(addprefix $(dst)/, $(scr-y))
|
||||
+readmes := $(addprefix $(dst)/, $(dtbotxt-y))
|
||||
subdirs := $(addprefix $(obj)/, $(subdir-y) $(subdir-m))
|
||||
|
||||
-__dtbs_install: $(dtbs) $(subdirs)
|
||||
+__dtbs_install: $(dtbs) $(dtbos) $(scrs) $(readmes) $(subdirs)
|
||||
@:
|
||||
|
||||
quiet_cmd_dtb_install = INSTALL $@
|
||||
@@ -29,6 +32,15 @@ quiet_cmd_dtb_install = INSTALL $@
|
||||
$(dst)/%.dtb: $(obj)/%.dtb
|
||||
$(call cmd,dtb_install)
|
||||
|
||||
+$(dst)/%.dtbo: $(obj)/%.dtbo
|
||||
+ $(call cmd,dtb_install)
|
||||
+
|
||||
+$(dst)/%.scr: $(obj)/%.scr
|
||||
+ $(call cmd,dtb_install)
|
||||
+
|
||||
+$(dst)/README.rockchip-overlays: $(src)/README.rockchip-overlays
|
||||
+ $(call cmd,dtb_install)
|
||||
+
|
||||
PHONY += $(subdirs)
|
||||
$(subdirs):
|
||||
$(Q)$(MAKE) $(dtbinst)=$@ dst=$(patsubst $(obj)/%,$(dst)/%,$@)
|
||||
diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
|
||||
index 58c05e5d..2b95dda9 100644
|
||||
--- a/scripts/Makefile.lib
|
||||
+++ b/scripts/Makefile.lib
|
||||
@@ -278,6 +278,9 @@ cmd_gzip = (cat $(filter-out FORCE,$^) | gzip -n -f -9 > $@) || \
|
||||
# ---------------------------------------------------------------------------
|
||||
DTC ?= $(objtree)/scripts/dtc/dtc
|
||||
|
||||
+# Overlay support
|
||||
+DTC_FLAGS += -@ -Wno-unit_address_format -Wno-simple_bus_reg
|
||||
+
|
||||
# Disable noisy checks by default
|
||||
ifeq ($(KBUILD_ENABLE_EXTRA_GCC_CHECKS),)
|
||||
DTC_FLAGS += -Wno-unit_address_vs_reg \
|
||||
@@ -324,6 +327,23 @@ cmd_dtc = mkdir -p $(dir ${dtc-tmp}) ; \
|
||||
$(obj)/%.dtb: $(src)/%.dts FORCE
|
||||
$(call if_changed_dep,dtc)
|
||||
|
||||
+quiet_cmd_dtco = DTCO $@
|
||||
+cmd_dtco = mkdir -p $(dir ${dtc-tmp}) ; \
|
||||
+ $(CPP) $(dtc_cpp_flags) -x assembler-with-cpp -o $(dtc-tmp) $< ; \
|
||||
+ $(DTC) -O dtb -o $@ -b 0 \
|
||||
+ -i $(dir $<) $(DTC_FLAGS) \
|
||||
+ -d $(depfile).dtc.tmp $(dtc-tmp) ; \
|
||||
+ cat $(depfile).pre.tmp $(depfile).dtc.tmp > $(depfile)
|
||||
+
|
||||
+$(obj)/%.dtbo: $(src)/%.dts FORCE
|
||||
+ $(call if_changed_dep,dtco)
|
||||
+
|
||||
+quiet_cmd_scr = MKIMAGE $@
|
||||
+cmd_scr = mkimage -C none -A $(ARCH) -T script -d $< $@
|
||||
+
|
||||
+$(obj)/%.scr: $(src)/%.scr-cmd FORCE
|
||||
+ $(call if_changed,scr)
|
||||
+
|
||||
dtc-tmp = $(subst $(comma),_,$(dot-target).dts.tmp)
|
||||
|
||||
# Bzip2
|
||||
|
|
@ -1,13 +0,0 @@
|
|||
diff --git a/arch/arm/boot/dts/rk3288-tinker.dtsi b/arch/arm/boot/dts/rk3288-tinker.dtsi
|
||||
index 01be2bca9..5439e29e0 100644
|
||||
--- a/arch/arm/boot/dts/rk3288-tinker.dtsi
|
||||
+++ b/arch/arm/boot/dts/rk3288-tinker.dtsi
|
||||
@@ -64,7 +64,7 @@
|
||||
sound {
|
||||
compatible = "simple-audio-card";
|
||||
simple-audio-card,format = "i2s";
|
||||
- simple-audio-card,name = "rockchip,tinker-codec";
|
||||
+ simple-audio-card,name = "DW-I2S-HDMI";
|
||||
simple-audio-card,mclk-fs = <512>;
|
||||
|
||||
simple-audio-card,codec {
|
|
@ -1,19 +0,0 @@
|
|||
diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c
|
||||
index 5bd58b95d..48ebe081f 100644
|
||||
--- a/drivers/mmc/core/core.c
|
||||
+++ b/drivers/mmc/core/core.c
|
||||
@@ -1684,6 +1684,14 @@ void mmc_power_off(struct mmc_host *host)
|
||||
if (host->ios.power_mode == MMC_POWER_OFF)
|
||||
return;
|
||||
|
||||
+ mmc_set_initial_signal_voltage(host);
|
||||
+
|
||||
+ /*
|
||||
+ * This delay should be sufficient to allow the power supply
|
||||
+ * to reach the minimum voltage.
|
||||
+ */
|
||||
+ mmc_delay(host->ios.power_delay_ms);
|
||||
+
|
||||
mmc_pwrseq_power_off(host);
|
||||
|
||||
host->ios.clock = 0;
|
|
@ -1,22 +0,0 @@
|
|||
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
|
||||
index a98dee2ae..d3cef7033 100644
|
||||
--- a/arch/arm/boot/dts/Makefile
|
||||
+++ b/arch/arm/boot/dts/Makefile
|
||||
@@ -916,17 +916,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
|
||||
rk3288-rock2-square.dtb \
|
||||
rk3288-tinker.dtb \
|
||||
rk3288-tinker-s.dtb \
|
||||
- rk3288-veyron-brain.dtb \
|
||||
- rk3288-veyron-fievel.dtb \
|
||||
- rk3288-veyron-jaq.dtb \
|
||||
- rk3288-veyron-jerry.dtb \
|
||||
- rk3288-veyron-mickey.dtb \
|
||||
- rk3288-veyron-mighty.dtb \
|
||||
- rk3288-veyron-minnie.dtb \
|
||||
- rk3288-veyron-pinky.dtb \
|
||||
- rk3288-veyron-speedy.dtb \
|
||||
- rk3288-veyron-tiger.dtb \
|
||||
rk3288-vyasa.dtb
|
||||
dtb-$(CONFIG_ARCH_S3C24XX) += \
|
||||
s3c2416-smdk2416.dtb
|
||||
dtb-$(CONFIG_ARCH_S3C64XX) += \
|
|
@ -1,62 +0,0 @@
|
|||
diff --git a/drivers/net/wireless/rtl8811cu/include/rtw_security.h b/drivers/net/wireless/rtl8811cu/include/rtw_security.h
|
||||
index ac8432e..5f74fb7 100755
|
||||
--- a/drivers/net/wireless/rtl8811cu/include/rtw_security.h
|
||||
+++ b/drivers/net/wireless/rtl8811cu/include/rtw_security.h
|
||||
@@ -249,7 +249,7 @@ struct security_priv {
|
||||
#define SEC_IS_BIP_KEY_INSTALLED(sec) _FALSE
|
||||
#endif
|
||||
|
||||
-struct sha256_state {
|
||||
+struct rtl_sha256_state {
|
||||
u64 length;
|
||||
u32 state[8], curlen;
|
||||
u8 buf[64];
|
||||
diff --git a/drivers/net/wireless/rtl8811cu/core/rtw_security.c b/drivers/net/wireless/rtl8811cu/core/rtw_security.c
|
||||
index b537a26..f8c42f4 100755
|
||||
--- a/drivers/net/wireless/rtl8811cu/core/rtw_security.c
|
||||
+++ b/drivers/net/wireless/rtl8811cu/core/rtw_security.c
|
||||
@@ -2133,7 +2133,7 @@ BIP_exit:
|
||||
#ifndef PLATFORM_FREEBSD
|
||||
#if defined(CONFIG_TDLS)
|
||||
/* compress 512-bits */
|
||||
-static int sha256_compress(struct sha256_state *md, unsigned char *buf)
|
||||
+static int sha256_compress(struct rtl_sha256_state *md, unsigned char *buf)
|
||||
{
|
||||
u32 S[8], W[64], t0, t1;
|
||||
u32 t;
|
||||
@@ -2181,7 +2181,7 @@ static int sha256_compress(struct sha256_state *md, unsigned char *buf)
|
||||
}
|
||||
|
||||
/* Initialize the hash state */
|
||||
-static void sha256_init(struct sha256_state *md)
|
||||
+static void sha256_init(struct rtl_sha256_state *md)
|
||||
{
|
||||
md->curlen = 0;
|
||||
md->length = 0;
|
||||
@@ -2202,7 +2202,7 @@ static void sha256_init(struct sha256_state *md)
|
||||
@param inlen The length of the data (octets)
|
||||
@return CRYPT_OK if successful
|
||||
*/
|
||||
-static int sha256_process(struct sha256_state *md, unsigned char *in,
|
||||
+static int sha256_process(struct rtl_sha256_state *md, unsigned char *in,
|
||||
unsigned long inlen)
|
||||
{
|
||||
unsigned long n;
|
||||
@@ -2243,7 +2243,7 @@ static int sha256_process(struct sha256_state *md, unsigned char *in,
|
||||
@param out [out] The destination of the hash (32 bytes)
|
||||
@return CRYPT_OK if successful
|
||||
*/
|
||||
-static int sha256_done(struct sha256_state *md, unsigned char *out)
|
||||
+static int sha256_done(struct rtl_sha256_state *md, unsigned char *out)
|
||||
{
|
||||
int i;
|
||||
|
||||
@@ -2293,7 +2293,7 @@ static int sha256_done(struct sha256_state *md, unsigned char *out)
|
||||
static int sha256_vector(size_t num_elem, u8 *addr[], size_t *len,
|
||||
u8 *mac)
|
||||
{
|
||||
- struct sha256_state ctx;
|
||||
+ struct rtl_sha256_state ctx;
|
||||
size_t i;
|
||||
|
||||
sha256_init(&ctx);
|
|
@ -1,59 +0,0 @@
|
|||
diff --git a/drivers/net/wireless/rtl8811cu/os_dep/linux/ioctl_cfg80211.c b/drivers/net/wireless/rtl8811cu/os_dep/linux/ioctl_cfg80211.c
|
||||
index c0df148..9bff924 100755
|
||||
--- a/drivers/net/wireless/rtl8811cu/os_dep/linux/ioctl_cfg80211.c
|
||||
+++ b/drivers/net/wireless/rtl8811cu/os_dep/linux/ioctl_cfg80211.c
|
||||
@@ -7143,6 +7143,33 @@ exit:
|
||||
return ret;
|
||||
}
|
||||
|
||||
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 8, 0))
|
||||
+
|
||||
+static void
|
||||
+cfg80211_rtw_update_mgmt_frame_registrations(struct wiphy *wiphy,
|
||||
+ struct wireless_dev *wdev,
|
||||
+ struct mgmt_frame_regs *upd)
|
||||
+{
|
||||
+ struct net_device *ndev = wdev_to_ndev(wdev);
|
||||
+ struct rtw_wdev_priv *pwdev_priv;
|
||||
+ _adapter *adapter;
|
||||
+
|
||||
+ if (ndev == NULL)
|
||||
+ return;
|
||||
+
|
||||
+ adapter = (_adapter *)rtw_netdev_priv(ndev);
|
||||
+ pwdev_priv = adapter_wdev_data(adapter);
|
||||
+
|
||||
+#ifdef CONFIG_DEBUG_CFG80211
|
||||
+ RTW_INFO(FUNC_ADPT_FMT" stypes:%x\n", FUNC_ADPT_ARG(adapter),
|
||||
+ upd->interface_stypes);
|
||||
+#endif
|
||||
+
|
||||
+ /* not implemented, see bellow */
|
||||
+}
|
||||
+
|
||||
+#else
|
||||
+
|
||||
static void cfg80211_rtw_mgmt_frame_register(struct wiphy *wiphy,
|
||||
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0))
|
||||
struct wireless_dev *wdev,
|
||||
@@ -7187,6 +7214,8 @@ exit:
|
||||
return;
|
||||
}
|
||||
|
||||
+#endif
|
||||
+
|
||||
#if defined(CONFIG_TDLS) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 2, 0))
|
||||
static int cfg80211_rtw_tdls_mgmt(struct wiphy *wiphy,
|
||||
struct net_device *ndev,
|
||||
@@ -9457,7 +9486,11 @@ static struct cfg80211_ops rtw_cfg80211_ops = {
|
||||
|
||||
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE)
|
||||
.mgmt_tx = cfg80211_rtw_mgmt_tx,
|
||||
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 8, 0))
|
||||
+ .update_mgmt_frame_registrations = cfg80211_rtw_update_mgmt_frame_registrations,
|
||||
+#else
|
||||
.mgmt_frame_register = cfg80211_rtw_mgmt_frame_register,
|
||||
+#endif
|
||||
#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 34) && LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35))
|
||||
.action = cfg80211_rtw_mgmt_tx,
|
||||
#endif
|
File diff suppressed because it is too large
Load diff
|
@ -1,13 +0,0 @@
|
|||
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
|
||||
index 37a3de760..6bcfceede 100644
|
||||
--- a/arch/arm/boot/dts/Makefile
|
||||
+++ b/arch/arm/boot/dts/Makefile
|
||||
@@ -832,6 +832,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
|
||||
rk3188-radxarock.dtb \
|
||||
rk3228-evb.dtb \
|
||||
rk3229-evb.dtb \
|
||||
+ rk3288-xt-q8l-v10.dtb \
|
||||
rk3229-xms6.dtb \
|
||||
rk3288-evb-act8846.dtb \
|
||||
rk3288-evb-rk808.dtb \
|
||||
|
|
@ -1,103 +0,0 @@
|
|||
diff --git a/drivers/media/rc/keymaps/rc-xt-q8l-v10.c b/drivers/media/rc/keymaps/rc-xt-q8l-v10.c
|
||||
index e69de29..19c7d9e 100644
|
||||
--- /dev/null
|
||||
+++ b/drivers/media/rc/keymaps/rc-xt-q8l-v10.c
|
||||
@@ -0,0 +1,76 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0+
|
||||
+// rc-xt-q8l-v10.c - Keytable for xt-q8l-v10 tv box remote controller
|
||||
+//
|
||||
+// keymap imported from ir-keymaps.c
|
||||
+//
|
||||
+// Copyright (c) 2018 Paolo Sabatino
|
||||
+
|
||||
+#include <media/rc-map.h>
|
||||
+#include <linux/module.h>
|
||||
+
|
||||
+/*
|
||||
+
|
||||
+*/
|
||||
+
|
||||
+static struct rc_map_table xt_q8l_v10[] = {
|
||||
+
|
||||
+ { 0xcc1d11, KEY_ENTER },
|
||||
+ { 0xcc1d00, KEY_POWER },
|
||||
+ { 0xcc1d15, KEY_PLAYPAUSE },
|
||||
+ { 0xcc1d16, KEY_STOP },
|
||||
+ { 0xcc1d06, KEY_PREVIOUSSONG },
|
||||
+ { 0xcc1d0a, KEY_NEXTSONG },
|
||||
+ { 0xcc1d41, KEY_1 },
|
||||
+ { 0xcc1d45, KEY_2 },
|
||||
+ { 0xcc1d4d, KEY_3 },
|
||||
+ { 0xcc1d42, KEY_4 },
|
||||
+ { 0xcc1d46, KEY_5 },
|
||||
+ { 0xcc1d4e, KEY_6 },
|
||||
+ { 0xcc1d43, KEY_7 },
|
||||
+ { 0xcc1d47, KEY_8 },
|
||||
+ { 0xcc1d4f, KEY_9 },
|
||||
+ { 0xcc1d49, KEY_0 },
|
||||
+ { 0xcc1d4a, KEY_BACKSPACE },
|
||||
+ { 0xcc1d48, KEY_F6 },
|
||||
+ { 0xcc1d03, KEY_HOME },
|
||||
+ { 0xcc1d0f, KEY_BACK },
|
||||
+ { 0xcc1d40, KEY_MENU },
|
||||
+ { 0xcc1d4c, KEY_TEXT },
|
||||
+ { 0xcc1d10, KEY_LEFT },
|
||||
+ { 0xcc1d12, KEY_RIGHT },
|
||||
+ { 0xcc1d44, KEY_DOWN },
|
||||
+ { 0xcc1d07, KEY_UP },
|
||||
+ { 0xcc1d02, KEY_VOLUMEDOWN },
|
||||
+ { 0xcc1d0c, KEY_MUTE },
|
||||
+ { 0xcc1d0e, KEY_VOLUMEUP },
|
||||
+ { 0xcc1d01, KEY_F1 },
|
||||
+ { 0xcc1d05, KEY_F2 },
|
||||
+ { 0xcc1d09, KEY_F3 },
|
||||
+ { 0xcc1d0d, KEY_F4 },
|
||||
+
|
||||
+};
|
||||
+
|
||||
+static struct rc_map_list xt_q8l_v10_map = {
|
||||
+ .map = {
|
||||
+ .scan = xt_q8l_v10,
|
||||
+ .size = ARRAY_SIZE(xt_q8l_v10),
|
||||
+ .rc_proto = RC_PROTO_NEC, /* Legacy IR type */
|
||||
+ .name = RC_MAP_XT_Q8L_V10,
|
||||
+ }
|
||||
+};
|
||||
+
|
||||
+static int __init init_rc_map_xt_q8l_v10(void)
|
||||
+{
|
||||
+ return rc_map_register(&xt_q8l_v10_map);
|
||||
+}
|
||||
+
|
||||
+static void __exit exit_rc_map_xt_q8l_v10(void)
|
||||
+{
|
||||
+ rc_map_unregister(&xt_q8l_v10_map);
|
||||
+}
|
||||
+
|
||||
+module_init(init_rc_map_xt_q8l_v10)
|
||||
+module_exit(exit_rc_map_xt_q8l_v10)
|
||||
+
|
||||
+MODULE_LICENSE("GPL");
|
||||
+MODULE_AUTHOR("Paolo Sabatino");
|
||||
diff --git a/include/media/rc-map.h b/include/media/rc-map.h
|
||||
index d621acadf..ad7abdb97 100644
|
||||
--- a/include/media/rc-map.h
|
||||
+++ b/include/media/rc-map.h
|
||||
@@ -278,6 +278,7 @@ struct rc_map *rc_map_get(const char *name);
|
||||
#define RC_MAP_WINFAST_USBII_DELUXE "rc-winfast-usbii-deluxe"
|
||||
#define RC_MAP_X96MAX "rc-x96max"
|
||||
#define RC_MAP_XBOX_DVD "rc-xbox-dvd"
|
||||
+#define RC_MAP_XT_Q8L_V10 "rc-xt-q8l-v10"
|
||||
#define RC_MAP_ZX_IRDEC "rc-zx-irdec"
|
||||
|
||||
/*
|
||||
diff --git a/drivers/media/rc/keymaps/Makefile b/drivers/media/rc/keymaps/Makefile
|
||||
index 5b1399af6..ec9ce1206 100644
|
||||
--- a/drivers/media/rc/keymaps/Makefile
|
||||
+++ b/drivers/media/rc/keymaps/Makefile
|
||||
@@ -117,4 +117,5 @@ obj-$(CONFIG_RC_MAP) += rc-adstech-dvb-t-pci.o \
|
||||
rc-winfast-usbii-deluxe.o \
|
||||
rc-su3000.o \
|
||||
rc-xbox-dvd.o \
|
||||
+ rc-xt-q8l-v10.o \
|
||||
rc-x96max.o \
|
Loading…
Add table
Reference in a new issue