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[rockchip64-dev] rockpi: Add 5.3 upstream DTS patches (#1424)
* [rockchip64-dev] rockpi: Add 5.3 upstream DTS patches * Support Bluetooth / WIFI Akash Gajjar <akash@openedev.com>45fa7c3838
.patch * Support Audio over HDMI Ezequiel Garcia <ezequiel@collabora.com>549dcdafe7
.patch * [rockchip64-dev] rockpi: Remove upstreamed patches 5.1 contains rockpi support * [rockchip64-dev] Uboot: Add patch for correct naming
This commit is contained in:
parent
c55f6ea8bc
commit
6d46d8f69d
5 changed files with 239 additions and 1009 deletions
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@ -1,946 +0,0 @@
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diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
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index 49042c4..191829b 100644
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--- a/arch/arm64/boot/dts/rockchip/Makefile
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+++ b/arch/arm64/boot/dts/rockchip/Makefile
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@@ -17,6 +17,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-kevin.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-puma-haikou.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock960.dtb
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+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpi4b.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire-excavator.dtb
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diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rockpi4b.dts b/arch/arm64/boot/dts/rockchip/rk3399-rockpi4b.dts
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new file mode 100644
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index 000000000..c3c38266f
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--- /dev/null
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+++ b/arch/arm64/boot/dts/rockchip/rk3399-rockpi4b.dts
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@@ -0,0 +1,928 @@
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+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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+/*
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+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd.
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+ * Copyright (c) 2018 Akash Gajjar <Akash_Gajjar@mentor.com>
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+ */
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+
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+/dts-v1/;
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+#include <dt-bindings/input/linux-event-codes.h>
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+#include <dt-bindings/pwm/pwm.h>
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+#include "rk3399.dtsi"
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+#include "rk3399-opp.dtsi"
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+
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+/ {
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+ model = "RockPi-4B";
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+ compatible = "radxa,rockpi-4b", "rockchip,rk3399";
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+
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+ chosen {
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+ bootargs = "mmc_cmdqueue=0 earlycon=uart8250,mmio32,0xff1a0000";
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+ stdout-path = "serial2:1500000n8";
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+ };
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+
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+ clkin_gmac: external-gmac-clock {
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+ compatible = "fixed-clock";
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+ clock-frequency = <125000000>;
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+ clock-output-names = "clkin_gmac";
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+ #clock-cells = <0>;
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+ };
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+
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+ dc_12v: dc-12v {
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+ compatible = "regulator-fixed";
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+ regulator-name = "dc_12v";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <12000000>;
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+ regulator-max-microvolt = <12000000>;
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+ };
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+
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+ vcc_sys: vcc-sys {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc_sys";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ vin-supply = <&dc_12v>;
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+ };
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+
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+ vcc3v3_pcie: vcc3v3-pcie-regulator {
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+ compatible = "regulator-fixed";
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+ enable-active-high;
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+ gpio = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pcie_pwr_en>;
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+ regulator-name = "vcc3v3_pcie";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ vin-supply = <&vcc_sys>;
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+ };
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+
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+ vcc3v3_sys: vcc3v3-sys {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc3v3_sys";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ vin-supply = <&vcc_sys>;
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+ };
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+ vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc1v8_s3";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+ vin-supply = <&vcc_1v8>;
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+ };
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+
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+ /* Actually 3 regulators (host0, 1, 2) controlled by the same gpio */
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+ vcc5v0_host: vcc5v0-host-regulator {
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+ compatible = "regulator-fixed";
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+ enable-active-high;
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+ gpio = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&vcc5v0_host_en>;
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+ regulator-name = "vcc5v0_host";
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+ regulator-always-on;
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+ vin-supply = <&vcc_sys>;
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+ };
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+
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+ vcc5v0_typec: vcc5v0-typec-regulator {
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+ compatible = "regulator-fixed";
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+ enable-active-high;
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+ gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&vcc5v0_typec_en>;
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+ regulator-name = "vcc5v0_typec";
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+ regulator-always-on;
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+ vin-supply = <&vcc_sys>;
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+ };
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+
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+ vcc_lan: vcc3v3-phy-regulator {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc_lan";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+
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+ vdd_log: vdd-log {
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+ compatible = "pwm-regulator";
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+ pwms = <&pwm2 0 25000 1>;
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+ pwm-supply = <&vcc_sys>;
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+ regulator-name = "vdd_log";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <800000>;
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+ regulator-max-microvolt = <1400000>;
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+ };
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+
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+ gpio-keys {
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+ compatible = "gpio-keys";
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+ autorepeat;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pwrbtn>;
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+
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+ power {
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+ debounce-interval = <100>;
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+ gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
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+ label = "GPIO Key Power";
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+ linux,code = <KEY_POWER>;
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+ wakeup-source;
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+ };
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+ };
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+
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+ leds {
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+ compatible = "gpio-leds";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&power_led_gpio>, <&status_led_gpio>;
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+
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+ power-status {
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+ label = "power";
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+ gpios = <&gpio3 28 GPIO_ACTIVE_HIGH>;
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+ linux,default-trigger = "default-on";
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+ };
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+
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+ system-status {
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+ label = "status";
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+ gpios = <&gpio3 29 GPIO_ACTIVE_HIGH>;
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+ linux,default-trigger = "heartbeat";
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+ };
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+ };
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+
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+ es8316-sound {
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+ status = "okay";
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+ compatible = "simple-audio-card";
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+ simple-audio-card,name = "rockchip,es8316-codec";
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+ simple-audio-card,format = "i2s";
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+ simple-audio-card,mclk-fs = <256>;
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+ simple-audio-card,widgets =
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+ "Microphone", "Mic Jack",
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+ "Headphone", "Headphone Jack";
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+ simple-audio-card,routing =
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+ "Mic Jack", "MICBIAS1",
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+ "IN1P", "Mic Jack",
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+ "Headphone Jack", "HPOL",
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+ "Headphone Jack", "HPOR";
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+
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+ simple-audio-card,cpu {
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+ sound-dai = <&i2s0>;
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+ };
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+
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+ simple-audio-card,codec {
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+ sound-dai = <&es8316>;
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+ };
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+ };
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+
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+ sdio_pwrseq: sdio-pwrseq {
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+ compatible = "mmc-pwrseq-simple";
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+ clocks = <&rk808 1>;
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+ clock-names = "ext_clock";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&wifi_pwr>, <&wifi_enable_h>;
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+
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+ /*
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+ * On the module itself this is one of these (depending
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+ * on the actual card populated):
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+ * - SDIO_RESET_L_WL_REG_ON
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+ * - PDN (power down when low)
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+ */
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+ reset-gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_LOW>, <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
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+ };
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+
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+ wireless-wlan {
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+ compatible = "wlan-platdata";
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+ rockchip,grf = <&grf>;
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+ wifi_chip_type = "ap6256";
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+ sdio_vref = <1800>;
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+ WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>; /* GPIO0_A3 */
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+ status = "okay";
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+ };
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+
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+ fan0: pwm-fan {
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+ compatible = "pwm-fan";
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+ pwms = <&pwm1 0 10000 0>;
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+ cooling-min-state = <0>;
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+ cooling-max-state = <3>;
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+ #cooling-cells = <2>;
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+ cooling-levels = <0 102 170 230>;
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+ };
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+
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+};
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+
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+&cpu_l0 {
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+ cpu-supply = <&vdd_cpu_l>;
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+};
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+
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+&cpu_l1 {
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+ cpu-supply = <&vdd_cpu_l>;
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+};
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+
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+&cpu_l2 {
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+ cpu-supply = <&vdd_cpu_l>;
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+};
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+
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+&cpu_l3 {
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+ cpu-supply = <&vdd_cpu_l>;
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+};
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+
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+&cpu_b0 {
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+ cpu-supply = <&vdd_cpu_b>;
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+};
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+
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+&cpu_b1 {
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+ cpu-supply = <&vdd_cpu_b>;
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+};
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+
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+&cpu_alert0 {
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+ temperature = <80000>;
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+};
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+
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+&cpu_alert1 {
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+ temperature = <95000>;
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+};
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+
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+&cpu_crit {
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+ temperature = <100000>;
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+};
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+
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+&cooling_maps {
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+ map2 {
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+ trip = <&cpu_alert0>;
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+ cooling-device = <&fan0 0 1>;
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+ };
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+ map3 {
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+ trip = <&cpu_alert1>;
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+ cooling-device = <&fan0 1 2>;
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+ };
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+ map4 {
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+ trip = <&cpu_crit>;
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+ cooling-device = <&fan0 2 3>;
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+ };
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+};
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+
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+&emmc_phy {
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+ status = "okay";
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+};
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+
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+&gmac {
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+ assigned-clocks = <&cru SCLK_RMII_SRC>;
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+ assigned-clock-parents = <&clkin_gmac>;
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+ clock_in_out = "input";
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+ phy-supply = <&vcc_lan>;
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+ phy-mode = "rgmii";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&rgmii_pins>;
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+ snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
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+ snps,reset-active-low;
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+ snps,reset-delays-us = <0 10000 50000>;
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+ tx_delay = <0x28>;
|
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+ rx_delay = <0x20>;
|
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+ status = "okay";
|
||||
+};
|
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+
|
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+&hdmi {
|
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+ ddc-i2c-bus = <&i2c3>;
|
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+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&hdmi_cec>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
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+&i2c0 {
|
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+ clock-frequency = <400000>;
|
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+ i2c-scl-rising-time-ns = <168>;
|
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+ i2c-scl-falling-time-ns = <4>;
|
||||
+ status = "okay";
|
||||
+
|
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+ rk808: pmic@1b {
|
||||
+ compatible = "rockchip,rk808";
|
||||
+ reg = <0x1b>;
|
||||
+ interrupt-parent = <&gpio1>;
|
||||
+ interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
|
||||
+ #clock-cells = <1>;
|
||||
+ clock-output-names = "xin32k", "rk808-clkout2";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pmic_int_l>;
|
||||
+ rockchip,system-power-controller;
|
||||
+ wakeup-source;
|
||||
+
|
||||
+ vcc1-supply = <&vcc_sys>;
|
||||
+ vcc2-supply = <&vcc_sys>;
|
||||
+ vcc3-supply = <&vcc_sys>;
|
||||
+ vcc4-supply = <&vcc_sys>;
|
||||
+ vcc6-supply = <&vcc_sys>;
|
||||
+ vcc7-supply = <&vcc_sys>;
|
||||
+ vcc8-supply = <&vcc3v3_sys>;
|
||||
+ vcc9-supply = <&vcc_sys>;
|
||||
+ vcc10-supply = <&vcc_sys>;
|
||||
+ vcc11-supply = <&vcc_sys>;
|
||||
+ vcc12-supply = <&vcc3v3_sys>;
|
||||
+ vddio-supply = <&vcc_1v8>;
|
||||
+
|
||||
+ regulators {
|
||||
+ vdd_center: DCDC_REG1 {
|
||||
+ regulator-name = "vdd_center";
|
||||
+ regulator-min-microvolt = <750000>;
|
||||
+ regulator-max-microvolt = <1350000>;
|
||||
+ regulator-ramp-delay = <6001>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vdd_cpu_l: DCDC_REG2 {
|
||||
+ regulator-name = "vdd_cpu_l";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <750000>;
|
||||
+ regulator-max-microvolt = <1350000>;
|
||||
+ regulator-ramp-delay = <6001>;
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc_ddr: DCDC_REG3 {
|
||||
+ regulator-name = "vcc_ddr";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc_1v8: DCDC_REG4 {
|
||||
+ regulator-name = "vcc_1v8";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ regulator-suspend-microvolt = <1800000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc1v8_dvp: LDO_REG1 {
|
||||
+ regulator-name = "vcc1v8_codec";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ regulator-suspend-microvolt = <1800000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc1v8_hdmi: LDO_REG2 {
|
||||
+ regulator-name = "vcc1v8_hdmi";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ regulator-suspend-microvolt = <1800000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcca_1v8: LDO_REG3 {
|
||||
+ regulator-name = "vcca_1v8";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ regulator-suspend-microvolt = <1800000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc_sd: LDO_REG4 {
|
||||
+ regulator-name = "vcc_sd";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <3000000>;
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ regulator-suspend-microvolt = <3000000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcca3v0_sd: LDO_REG5 {
|
||||
+ regulator-name = "vcca3v0_sd";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <3000000>;
|
||||
+ regulator-max-microvolt = <3000000>;
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ regulator-suspend-microvolt = <3000000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc_1v5: LDO_REG6 {
|
||||
+ regulator-name = "vcc_1v5";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <1500000>;
|
||||
+ regulator-max-microvolt = <1500000>;
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ regulator-suspend-microvolt = <1500000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc0v9_hdmi: LDO_REG7 {
|
||||
+ regulator-name = "vcc0v9_hdmi";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <900000>;
|
||||
+ regulator-max-microvolt = <900000>;
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ regulator-suspend-microvolt = <900000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc_3v0: LDO_REG8 {
|
||||
+ regulator-name = "vcc_3v0";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <3000000>;
|
||||
+ regulator-max-microvolt = <3000000>;
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ regulator-suspend-microvolt = <3000000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc_cam: SWITCH_REG1 {
|
||||
+ regulator-name = "vcc_cam";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc_mipi: SWITCH_REG2 {
|
||||
+ regulator-name = "vcc_mipi";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vdd_cpu_b: regulator@40 {
|
||||
+ compatible = "silergy,syr827";
|
||||
+ reg = <0x40>;
|
||||
+ fcs,suspend-voltage-selector = <1>;
|
||||
+ regulator-compatible = "fan53555-reg";
|
||||
+ pinctrl-0 = <&vsel1_gpio>;
|
||||
+ vsel-gpios = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>;
|
||||
+ regulator-name = "vdd_cpu_b";
|
||||
+ regulator-min-microvolt = <712500>;
|
||||
+ regulator-max-microvolt = <1500000>;
|
||||
+ regulator-ramp-delay = <1000>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ vin-supply = <&vcc_sys>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vdd_gpu: regulator@41 {
|
||||
+ compatible = "silergy,syr828";
|
||||
+ reg = <0x41>;
|
||||
+ regulator-compatible = "fan53555-reg";
|
||||
+ pinctrl-0 = <&vsel2_gpio>;
|
||||
+ vsel-gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_HIGH>;
|
||||
+ fcs,suspend-voltage-selector = <1>;
|
||||
+ regulator-name = "vdd_gpu";
|
||||
+ regulator-min-microvolt = <712500>;
|
||||
+ regulator-max-microvolt = <1500000>;
|
||||
+ regulator-ramp-delay = <1000>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ vin-supply = <&vcc_sys>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&i2c1 {
|
||||
+ i2c-scl-rising-time-ns = <300>;
|
||||
+ i2c-scl-falling-time-ns = <15>;
|
||||
+ status = "okay";
|
||||
+
|
||||
+ es8316: es8316@10 {
|
||||
+ #sound-dai-cells = <0>;
|
||||
+ compatible = "everest,es8316";
|
||||
+ reg = <0x10>;
|
||||
+ clocks = <&cru SCLK_I2S_8CH_OUT>;
|
||||
+ clock-names = "mclk";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&i2s_8ch_mclk>;
|
||||
+ hp-det-gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_LOW>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&i2c3 {
|
||||
+ i2c-scl-rising-time-ns = <450>;
|
||||
+ i2c-scl-falling-time-ns = <15>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&i2c4 {
|
||||
+ i2c-scl-rising-time-ns = <600>;
|
||||
+ i2c-scl-falling-time-ns = <20>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&i2s0 {
|
||||
+ rockchip,playback-channels = <8>;
|
||||
+ rockchip,capture-channels = <8>;
|
||||
+ #sound-dai-cells = <0>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&i2s1 {
|
||||
+ rockchip,playback-channels = <2>;
|
||||
+ rockchip,capture-channels = <2>;
|
||||
+ #sound-dai-cells = <0>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&i2s2 {
|
||||
+ #sound-dai-cells = <0>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&io_domains {
|
||||
+ status = "okay";
|
||||
+
|
||||
+ bt656-supply = <&vcc_3v0>;
|
||||
+ audio-supply = <&vcc_3v0>;
|
||||
+ sdmmc-supply = <&vcc_sd>;
|
||||
+ gpio1830-supply = <&vcc_3v0>;
|
||||
+};
|
||||
+
|
||||
+&pcie_phy {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&pcie0 {
|
||||
+ ep-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>;
|
||||
+ num-lanes = <4>;
|
||||
+ max-link-speed = <2>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pcie_clkreqn_cpm>;
|
||||
+ vpcie3v3-supply = <&vcc3v3_pcie>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&pmu_io_domains {
|
||||
+ pmu1830-supply = <&vcc_3v0>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&pinctrl {
|
||||
+ buttons {
|
||||
+ pwrbtn: pwrbtn {
|
||||
+ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ sdio0 {
|
||||
+ sdio0_bus1: sdio0-bus1 {
|
||||
+ rockchip,pins =
|
||||
+ <2 20 RK_FUNC_1 &pcfg_pull_up_20ma>;
|
||||
+ };
|
||||
+
|
||||
+ sdio0_bus4: sdio0-bus4 {
|
||||
+ rockchip,pins =
|
||||
+ <2 20 RK_FUNC_1 &pcfg_pull_up_20ma>,
|
||||
+ <2 21 RK_FUNC_1 &pcfg_pull_up_20ma>,
|
||||
+ <2 22 RK_FUNC_1 &pcfg_pull_up_20ma>,
|
||||
+ <2 23 RK_FUNC_1 &pcfg_pull_up_20ma>;
|
||||
+ };
|
||||
+
|
||||
+ sdio0_cmd: sdio0-cmd {
|
||||
+ rockchip,pins =
|
||||
+ <2 24 RK_FUNC_1 &pcfg_pull_up_20ma>;
|
||||
+ };
|
||||
+
|
||||
+ sdio0_clk: sdio0-clk {
|
||||
+ rockchip,pins =
|
||||
+ <2 25 RK_FUNC_1 &pcfg_pull_none_20ma>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ fusb302x {
|
||||
+ fusb0_int: fusb0-int {
|
||||
+ rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ leds {
|
||||
+ power_led_gpio: power_led_gpio {
|
||||
+ rockchip,pins = <3 28 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+
|
||||
+ status_led_gpio: status_led_gpio {
|
||||
+ rockchip,pins = <3 29 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ lcd-panel {
|
||||
+ lcd_panel_reset: lcd-panel-reset {
|
||||
+ rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ pcie {
|
||||
+ pcie_pwr_en: pcie-pwr-en {
|
||||
+ rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+
|
||||
+ pcie_3g_drv: pcie-3g-drv {
|
||||
+ rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ pmic {
|
||||
+ pmic_int_l: pmic-int-l {
|
||||
+ rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
+ };
|
||||
+
|
||||
+ vsel1_gpio: vsel1-gpio {
|
||||
+ rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
|
||||
+ };
|
||||
+
|
||||
+ vsel2_gpio: vsel2-gpio {
|
||||
+ rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ sd {
|
||||
+ sdmmc0_pwr_h: sdmmc0-pwr-h {
|
||||
+ rockchip,pins =
|
||||
+ <RK_GPIO0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ sdio-pwrseq {
|
||||
+ wifi_enable_h: wifi-enable-h {
|
||||
+ rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ wifi_pwr: wifi-pwr {
|
||||
+ rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ wifi_host_wake_l: wifi-host-wake-l {
|
||||
+ rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ usb-typec {
|
||||
+ vcc5v0_typec_en: vcc5v0_typec_en {
|
||||
+ rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ rt5640 {
|
||||
+ rt5640_hpcon: rt5640-hpcon {
|
||||
+ rockchip,pins = <4 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ usb2 {
|
||||
+ vcc5v0_host_en: vcc5v0-host-en {
|
||||
+ rockchip,pins = <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ i2s0 {
|
||||
+ i2s_8ch_mclk: i2s-8ch-mclk {
|
||||
+ rockchip,pins = <4 0 RK_FUNC_1 &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&pwm0 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&pwm1 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&pwm2 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&saradc {
|
||||
+ vref-supply = <&vcca1v8_s3>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&sdmmc {
|
||||
+ bus-width = <4>;
|
||||
+ cap-mmc-highspeed;
|
||||
+ cap-sd-highspeed;
|
||||
+ disable-wp;
|
||||
+ sd-uhs-sdr104;
|
||||
+ max-frequency = <150000000>;
|
||||
+ vqmmc-supply = <&vcc_sd>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&sdio0 {
|
||||
+// clock-frequency = <50000000>;
|
||||
+// clock-freq-min-max = <200000 50000000>;
|
||||
+ max-frequency = <20000000>;
|
||||
+ bus-width = <4>;
|
||||
+// vmmc-supply = <&vcc3v0_sd>;
|
||||
+// vqmmc-supply = <&vcc_sdio>;
|
||||
+ mmc-pwrseq = <&sdio_pwrseq>;
|
||||
+ supports-sdio;
|
||||
+ disable-wp;
|
||||
+ cap-sd-highspeed;
|
||||
+ cap-sdio-irq;
|
||||
+ keep-power-in-suspend;
|
||||
+ non-removable;
|
||||
+ num-slots = <1>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
|
||||
+ sd-uhs-sdr104;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&sdhci {
|
||||
+ bus-width = <8>;
|
||||
+ //mmc-hs400-1_8v;
|
||||
+ //mmc-hs200-1_8v;
|
||||
+ //mmc-hs400-enhanced-strobe;
|
||||
+ keep-power-in-suspend;
|
||||
+ supports-emmc;
|
||||
+ non-removable;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&tcphy0 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&tcphy1 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&tsadc {
|
||||
+ /* tshut mode 0:CRU 1:GPIO */
|
||||
+ rockchip,hw-tshut-mode = <1>;
|
||||
+ /* tshut polarity 0:LOW 1:HIGH */
|
||||
+ rockchip,hw-tshut-polarity = <1>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&u2phy0 {
|
||||
+ status = "okay";
|
||||
+
|
||||
+ u2phy0_otg: otg-port {
|
||||
+ status = "okay";
|
||||
+ };
|
||||
+
|
||||
+ u2phy0_host: host-port {
|
||||
+ phy-supply = <&vcc5v0_host>;
|
||||
+ status = "okay";
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&u2phy1 {
|
||||
+ status = "okay";
|
||||
+
|
||||
+ u2phy1_otg: otg-port {
|
||||
+ status = "okay";
|
||||
+ };
|
||||
+
|
||||
+ u2phy1_host: host-port {
|
||||
+ phy-supply = <&vcc5v0_host>;
|
||||
+ status = "okay";
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&uart0 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&uart0_xfer &uart0_cts>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&uart2 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb_host0_ehci {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb_host0_ohci {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb_host1_ehci {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb_host1_ohci {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usbdrd3_0 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usbdrd_dwc3_0 {
|
||||
+ status = "okay";
|
||||
+ dr_mode = "host";
|
||||
+};
|
||||
+
|
||||
+&usbdrd3_1 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usbdrd_dwc3_1 {
|
||||
+ status = "okay";
|
||||
+ dr_mode = "host";
|
||||
+};
|
||||
+
|
||||
+&vopb {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&vopb_mmu {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&vopl {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&vopl_mmu {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&spi1 {
|
||||
+ status = "disabled";
|
||||
+ max-freq = <10000000>;
|
||||
+
|
||||
+ spiflash: spi-flash@0 {
|
||||
+ #address-cells = <0x1>;
|
||||
+ #size-cells = <1>;
|
||||
+ compatible = "jedec,spi-nor";
|
||||
+ reg = <0x0>;
|
||||
+ spi-max-frequency = <10000000>;
|
||||
+ status = "okay";
|
||||
+ m25p,fast-read;
|
||||
+
|
||||
+ partitions {
|
||||
+ compatible = "fixed-partitions";
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <1>;
|
||||
+
|
||||
+ loader@8000 {
|
||||
+ label = "loader";
|
||||
+ reg = <0x0 0x3F8000>;
|
||||
+ };
|
||||
+
|
||||
+ env@3f8000 {
|
||||
+ label = "env";
|
||||
+ reg = <0x3F8000 0x8000>;
|
||||
+ };
|
||||
+
|
||||
+ vendor@7c0000 {
|
||||
+ label = "vendor";
|
||||
+ reg = <0x7C0000 0x40000>;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+};
|
|
@ -0,0 +1,30 @@
|
|||
From 549dcdafe793000fbe38914a1f231d3c6034a6ec Mon Sep 17 00:00:00 2001
|
||||
From: Ezequiel Garcia <ezequiel@collabora.com>
|
||||
Date: Fri, 7 Jun 2019 21:35:01 -0300
|
||||
Subject: [PATCH] arm64: dts: rockchip: Enable HDMI audio on Rock Pi
|
||||
|
||||
This commit enables the hdmi-sound device needed to have
|
||||
audio over HDMI on the Rock Pi board.
|
||||
|
||||
Fixes: 1b5715c602fda ("arm64: dts: rockchip: add ROCK Pi 4 DTS support")
|
||||
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
|
||||
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
|
||||
---
|
||||
arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts | 4 ++++
|
||||
1 file changed, 4 insertions(+)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts
|
||||
index 55e74f4d5cd0f..1ae1ebd4efdd0 100644
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts
|
||||
@@ -178,6 +178,10 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
+&hdmi_sound {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
&i2c0 {
|
||||
clock-frequency = <400000>;
|
||||
i2c-scl-rising-time-ns = <168>;
|
|
@ -0,0 +1,156 @@
|
|||
From 45fa7c3838715b34ccea661e4b7b261d91668b17 Mon Sep 17 00:00:00 2001
|
||||
From: Akash Gajjar <akash@openedev.com>
|
||||
Date: Wed, 29 May 2019 00:16:58 +0530
|
||||
Subject: [PATCH] arm64: dts: rockchip: add WiFi+BT support on ROCK Pi4 board
|
||||
|
||||
Rock Pi 4 has a on board AP6256 WiFi/BT Module. enable wifi and bluetooth
|
||||
support on Rock Pi 4 board.
|
||||
|
||||
Signed-off-by: Akash Gajjar <akash@openedev.com>
|
||||
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
|
||||
---
|
||||
.../boot/dts/rockchip/rk3399-rock-pi-4.dts | 97 +++++++++++++++++++
|
||||
1 file changed, 97 insertions(+)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts
|
||||
index e030627159c6b..55e74f4d5cd0f 100644
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts
|
||||
@@ -25,6 +25,15 @@
|
||||
#clock-cells = <0>;
|
||||
};
|
||||
|
||||
+ sdio_pwrseq: sdio-pwrseq {
|
||||
+ compatible = "mmc-pwrseq-simple";
|
||||
+ clocks = <&rk808 1>;
|
||||
+ clock-names = "ext_clock";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&wifi_enable_h>;
|
||||
+ reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
|
||||
+ };
|
||||
+
|
||||
vcc12v_dcin: dc-12v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc12v_dcin";
|
||||
@@ -451,12 +460,46 @@
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
+ bt {
|
||||
+ bt_enable_h: bt-enable-h {
|
||||
+ rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+
|
||||
+ bt_host_wake_l: bt-host-wake-l {
|
||||
+ rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+
|
||||
+ bt_wake_l: bt-wake-l {
|
||||
+ rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
pcie {
|
||||
pcie_pwr_en: pcie-pwr-en {
|
||||
rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
+ sdio0 {
|
||||
+ sdio0_bus4: sdio0-bus4 {
|
||||
+ rockchip,pins =
|
||||
+ <2 20 RK_FUNC_1 &pcfg_pull_up_20ma>,
|
||||
+ <2 21 RK_FUNC_1 &pcfg_pull_up_20ma>,
|
||||
+ <2 22 RK_FUNC_1 &pcfg_pull_up_20ma>,
|
||||
+ <2 23 RK_FUNC_1 &pcfg_pull_up_20ma>;
|
||||
+ };
|
||||
+
|
||||
+ sdio0_cmd: sdio0-cmd {
|
||||
+ rockchip,pins =
|
||||
+ <2 24 RK_FUNC_1 &pcfg_pull_up_20ma>;
|
||||
+ };
|
||||
+
|
||||
+ sdio0_clk: sdio0-clk {
|
||||
+ rockchip,pins =
|
||||
+ <2 25 RK_FUNC_1 &pcfg_pull_none_20ma>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
pmic {
|
||||
pmic_int_l: pmic-int-l {
|
||||
rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
@@ -482,6 +525,17 @@
|
||||
rockchip,pins = <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
+
|
||||
+ wifi {
|
||||
+ wifi_enable_h: wifi-enable-h {
|
||||
+ rockchip,pins =
|
||||
+ <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+
|
||||
+ wifi_host_wake_l: wifi-host-wake-l {
|
||||
+ rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
};
|
||||
|
||||
&pwm2 {
|
||||
@@ -494,6 +548,32 @@
|
||||
vref-supply = <&vcc_1v8>;
|
||||
};
|
||||
|
||||
+&sdio0 {
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
+ bus-width = <4>;
|
||||
+ clock-frequency = <50000000>;
|
||||
+ cap-sdio-irq;
|
||||
+ cap-sd-highspeed;
|
||||
+ keep-power-in-suspend;
|
||||
+ mmc-pwrseq = <&sdio_pwrseq>;
|
||||
+ non-removable;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
|
||||
+ sd-uhs-sdr104;
|
||||
+ status = "okay";
|
||||
+
|
||||
+ brcmf: wifi@1 {
|
||||
+ compatible = "brcm,bcm4329-fmac";
|
||||
+ reg = <1>;
|
||||
+ interrupt-parent = <&gpio0>;
|
||||
+ interrupts = <RK_PA3 GPIO_ACTIVE_HIGH>;
|
||||
+ interrupt-names = "host-wake";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&wifi_host_wake_l>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
&sdmmc {
|
||||
bus-width = <4>;
|
||||
cap-mmc-highspeed;
|
||||
@@ -557,6 +637,23 @@
|
||||
};
|
||||
};
|
||||
|
||||
+&uart0 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
|
||||
+ status = "okay";
|
||||
+
|
||||
+ bluetooth {
|
||||
+ compatible = "brcm,bcm43438-bt";
|
||||
+ clocks = <&rk808 1>;
|
||||
+ clock-names = "ext_clock";
|
||||
+ device-wakeup-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>;
|
||||
+ host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
|
||||
+ shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
&uart2 {
|
||||
status = "okay";
|
||||
};
|
|
@ -1,63 +0,0 @@
|
|||
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rockpi4b.dts b/arch/arm64/boot/dts/rockchip/rk3399-rockpi4b.dts
|
||||
index 9d6c4003f..7f10da2a8 100644
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3399-rockpi4b.dts
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3399-rockpi4b.dts
|
||||
@@ -284,7 +284,7 @@
|
||||
snps,reset-active-low;
|
||||
snps,reset-delays-us = <0 10000 50000>;
|
||||
tx_delay = <0x28>;
|
||||
- rx_delay = <0x20>;
|
||||
+ rx_delay = <0x11>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
@@ -511,10 +511,9 @@
|
||||
vdd_gpu: regulator@41 {
|
||||
compatible = "silergy,syr828";
|
||||
reg = <0x41>;
|
||||
- regulator-compatible = "fan53555-reg";
|
||||
- pinctrl-0 = <&vsel2_gpio>;
|
||||
- vsel-gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_HIGH>;
|
||||
fcs,suspend-voltage-selector = <1>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&vsel2_gpio>;
|
||||
regulator-name = "vdd_gpu";
|
||||
regulator-min-microvolt = <712500>;
|
||||
regulator-max-microvolt = <1500000>;
|
||||
@@ -661,17 +660,13 @@
|
||||
|
||||
pcie {
|
||||
pcie_pwr_en: pcie-pwr-en {
|
||||
- rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
- };
|
||||
-
|
||||
- pcie_3g_drv: pcie-3g-drv {
|
||||
- rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
+ rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
pmic {
|
||||
pmic_int_l: pmic-int-l {
|
||||
- rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
+ rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
};
|
||||
|
||||
vsel1_gpio: vsel1-gpio {
|
||||
@@ -725,6 +720,8 @@
|
||||
rockchip,pins = <4 0 RK_FUNC_1 &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
+
|
||||
+
|
||||
};
|
||||
|
||||
&pwm0 {
|
||||
@@ -748,6 +745,7 @@
|
||||
bus-width = <4>;
|
||||
cap-mmc-highspeed;
|
||||
cap-sd-highspeed;
|
||||
+ cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
|
||||
disable-wp;
|
||||
sd-uhs-sdr104;
|
||||
max-frequency = <150000000>;
|
|
@ -0,0 +1,53 @@
|
|||
From 91bf3be540a2f3f1bc329cd560fc40448903da01 Mon Sep 17 00:00:00 2001
|
||||
From: =?UTF-8?q?Manuel=20R=C3=BCger?= <manuel@rueg.eu>
|
||||
Date: Tue, 25 Jun 2019 10:45:46 +0200
|
||||
Subject: [PATCH] ayufan: rockpi: Match upstream naming
|
||||
|
||||
|
||||
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
|
||||
index 2fdb32a8ce..be19c6fdff 100644
|
||||
--- a/arch/arm/dts/Makefile
|
||||
+++ b/arch/arm/dts/Makefile
|
||||
@@ -57,7 +57,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
|
||||
rk3399-puma-ddr1333.dtb \
|
||||
rk3399-puma-ddr1600.dtb \
|
||||
rk3399-puma-ddr1866.dtb \
|
||||
- rk3399-rockpi4b.dtb \
|
||||
+ rk3399-rock-pi-4.dtb \
|
||||
rk3399-rockpro64.dtb \
|
||||
rv1108-evb.dtb
|
||||
dtb-$(CONFIG_ARCH_MESON) += \
|
||||
diff --git a/arch/arm/dts/rk3399-rockpi4b.dts b/arch/arm/dts/rk3399-rock-pi-4.dts
|
||||
similarity index 99%
|
||||
rename from arch/arm/dts/rk3399-rockpi4b.dts
|
||||
rename to arch/arm/dts/rk3399-rock-pi-4.dts
|
||||
index 5574e9bcec..e860ab7149 100644
|
||||
--- a/arch/arm/dts/rk3399-rockpi4b.dts
|
||||
+++ b/arch/arm/dts/rk3399-rock-pi-4.dts
|
||||
@@ -10,8 +10,8 @@
|
||||
#include "rk3399.dtsi"
|
||||
|
||||
/ {
|
||||
- model = "RockPi-4B";
|
||||
- compatible = "radxa,rockpi-4b", "rockchip,rk3399";
|
||||
+ model = "Radxa ROCK Pi 4";
|
||||
+ compatible = "radxa,rockpi4", "rockchip,rk3399";
|
||||
|
||||
chosen {
|
||||
stdout-path = &uart2;
|
||||
diff --git a/configs/rockpi4b-rk3399_defconfig b/configs/rockpi4b-rk3399_defconfig
|
||||
index 61435d304f..a332654be1 100644
|
||||
--- a/configs/rockpi4b-rk3399_defconfig
|
||||
+++ b/configs/rockpi4b-rk3399_defconfig
|
||||
@@ -9,7 +9,7 @@ CONFIG_TARGET_ROCKPRO64_RK3399=y
|
||||
CONFIG_SPL_SPI_FLASH_SUPPORT=y
|
||||
CONFIG_SPL_SPI_SUPPORT=y
|
||||
CONFIG_SPL_STACK_R_ADDR=0x600000
|
||||
-CONFIG_DEFAULT_DEVICE_TREE="rk3399-rockpi4b"
|
||||
+CONFIG_DEFAULT_DEVICE_TREE="rk3399-rock-pi-4"
|
||||
CONFIG_DEBUG_UART=y
|
||||
CONFIG_FIT=y
|
||||
CONFIG_SPL_LOAD_FIT=y
|
||||
--
|
||||
2.22.0
|
||||
|
Loading…
Add table
Reference in a new issue