mirror of
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[ add orangepi rk3399 ] Board boots, wifi and net works, can be installed on eMMC but various troubles at this point. It's dirty DT copy from stock kernel. Need further rework ...
This commit is contained in:
Igor Pecovnik
parent
60a968b26e
commit
7e38968709
2 changed files with 818 additions and 1 deletions
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@ -23,7 +23,7 @@ done
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KERNELID=$(uname -r)
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if [ $(echo $BOARD_NAME | wc -c) -ge 18 ]; then
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if [ $(echo $BOARD_NAME | wc -c) -ge 17 ]; then
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TERM=linux toilet -f standard -F metal $(echo $BOARD_NAME | sed 's/Orange Pi/OPi/' | sed 's/Nanopi/NPi/')
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else
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TERM=linux toilet -f standard -F metal $BOARD_NAME
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817
patch/kernel/rk3399-default/xunlong-orangepi-rk3399.patch
Normal file
817
patch/kernel/rk3399-default/xunlong-orangepi-rk3399.patch
Normal file
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@ -0,0 +1,817 @@
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diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
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index 40168e41..7463daa3 100644
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--- a/arch/arm64/boot/dts/rockchip/Makefile
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+++ b/arch/arm64/boot/dts/rockchip/Makefile
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@@ -1,6 +1,7 @@
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ifeq ($(CONFIG_MACH_NANOPI4),y)
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dtb-$(CONFIG_ARCH_ROCKCHIP) += \
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+ rk3399-orangepi.dtb \
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rk3399-nanopi4-rev00.dtb \
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rk3399-nanopi4-rev01.dtb \
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rk3399-nanopi4-rev04.dtb \
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diff --git a/arch/arm64/boot/dts/rockchip/rk3399-excavator-sapphire.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-excavator-sapphire.dtsi
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index c406e54b..dbe01123 100644
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--- a/arch/arm64/boot/dts/rockchip/rk3399-excavator-sapphire.dtsi
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+++ b/arch/arm64/boot/dts/rockchip/rk3399-excavator-sapphire.dtsi
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@@ -103,7 +103,7 @@
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wireless-wlan {
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compatible = "wlan-platdata";
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rockchip,grf = <&grf>;
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- wifi_chip_type = "ap6354";
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+ wifi_chip_type = "ap6356s";
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sdio_vref = <1800>;
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WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>; /* GPIO0_a3 */
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status = "okay";
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@@ -126,37 +126,6 @@
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};
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};
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-&dfi {
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- status = "okay";
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-};
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-
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-&dmc {
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- status = "okay";
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- center-supply = <&vdd_center>;
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- upthreshold = <40>;
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- downdifferential = <20>;
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- system-status-freq = <
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- /*system status freq(KHz)*/
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- SYS_STATUS_NORMAL 800000
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- SYS_STATUS_REBOOT 528000
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- SYS_STATUS_SUSPEND 200000
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- SYS_STATUS_VIDEO_1080P 200000
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- SYS_STATUS_VIDEO_4K 600000
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- SYS_STATUS_VIDEO_4K_10B 800000
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- SYS_STATUS_PERFORMANCE 800000
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- SYS_STATUS_BOOST 400000
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- SYS_STATUS_DUALVIEW 600000
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- SYS_STATUS_ISP 600000
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- >;
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- vop-bw-dmc-freq = <
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- /* min_bw(MB/s) max_bw(MB/s) freq(KHz) */
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- 0 577 200000
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- 578 1701 300000
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- 1702 99999 400000
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- >;
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- auto-min-freq = <200000>;
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-};
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-
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&spdif {
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status = "okay";
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pinctrl-0 = <&spdif_bus>;
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diff --git a/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts b/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts
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new file mode 100644
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index 00000000..299fbd53
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--- /dev/null
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+++ b/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts
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@@ -0,0 +1,694 @@
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+/*
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+ * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
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+ *
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+ * This file is dual-licensed: you can use it either under the terms
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+ * of the GPL or the X11 license, at your option. Note that this dual
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+ * licensing only applies to this file, and not this project as a
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+ * whole.
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+ *
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+ * a) This file is free software; you can redistribute it and/or
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+ * modify it under the terms of the GNU General Public License as
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+ * published by the Free Software Foundation; either version 2 of the
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+ * License, or (at your option) any later version.
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+ *
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+ * This file is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ *
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+ * Or, alternatively,
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+ *
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+ * b) Permission is hereby granted, free of charge, to any person
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+ * obtaining a copy of this software and associated documentation
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+ * files (the "Software"), to deal in the Software without
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+ * restriction, including without limitation the rights to use,
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+ * copy, modify, merge, publish, distribute, sublicense, and/or
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+ * sell copies of the Software, and to permit persons to whom the
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+ * Software is furnished to do so, subject to the following
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+ * conditions:
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+ *
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+ * The above copyright notice and this permission notice shall be
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+ * included in all copies or substantial portions of the Software.
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+ *
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+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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+ * OTHER DEALINGS IN THE SOFTWARE.
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+ */
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+
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+/dts-v1/;
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+
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+#include "rk3399-excavator-sapphire.dtsi"
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+#include "rk3399-linux.dtsi"
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+#include <dt-bindings/input/input.h>
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+#include <dt-bindings/sensor-dev.h>
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+//#include <generated/autoconf.h>
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+#include "../../../../../include/generated/autoconf.h"
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+
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+/ {
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+ model = "Rockchip RK3399 Excavator Board (Linux Opensource)";
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+ compatible = "rockchip,rk3399-excavator-linux", "rockchip,rk3399";
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+
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+ fiq_debugger: fiq-debugger {
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+ compatible = "rockchip,fiq-debugger";
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+ rockchip,serial-id = <2>;
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+ rockchip,signal-irq = <182>;
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+ rockchip,wake-irq = <0>;
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+ rockchip,irq-mode-enable = <1>; /* If enable uart uses irq instead of fiq */
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+ rockchip,baudrate = <1500000>; /* Only 115200 and 1500000 */
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&uart2c_xfer>;
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+ };
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+
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+ edp_panel: edp-panel {
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+ status = "disabled";
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+ compatible = "lg,lp079qx1-sp0v", "panel-simple";
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+ backlight = <&backlight>;
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+ power-supply = <&vcc3v3_s0>;
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+ enable-gpios = <&gpio4 30 GPIO_ACTIVE_HIGH>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&lcd_panel_reset>;
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+
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+ ports {
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+ panel_in_edp: endpoint {
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+ remote-endpoint = <&edp_out_panel>;
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+ };
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+ };
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+ };
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+ hall_sensor: hall-mh248 {
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+ compatible = "hall-mh248";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&mh248_irq_gpio>;
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+ irq-gpio = <&gpio0 13 IRQ_TYPE_EDGE_BOTH>; //GPIO0_B5
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+ hall-active = <1>;
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+ status = "okay";
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+ };
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+
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+ hdmi_codec: hdmi-codec {
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+ compatible = "simple-audio-card";
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+ simple-audio-card,format = "i2s";
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+ simple-audio-card,mclk-fs = <256>;
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+ simple-audio-card,name = "HDMI-CODEC";
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+
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+ simple-audio-card,cpu {
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+ sound-dai = <&i2s2>;
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+ };
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+
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+ simple-audio-card,codec {
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+ sound-dai = <&hdmi>;
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+ };
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+ };
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+
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+ gpio-keys {
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+ compatible = "gpio-keys";
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ autorepeat;
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+
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pwrbtn>;
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+
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+ button@0 {
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+ gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
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+ linux,code = <KEY_POWER>;
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+ label = "GPIO Key Power";
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+ linux,input-type = <1>;
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+ gpio-key,wakeup = <1>;
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+ debounce-interval = <100>;
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+ };
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+ };
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+
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+ vccadc_ref: vccadc-ref {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc1v8_sys";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+ };
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+
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+ vcc3v3_pcie: vcc3v3-pcie-regulator {
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+ compatible = "regulator-fixed";
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+ enable-active-high;
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+ regulator-always-on;
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+ regulator-boot-on;
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+ gpio = <&gpio0 2 GPIO_ACTIVE_HIGH>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pcie_drv>;
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+ regulator-name = "vcc3v3_pcie";
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+ };
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+
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+ adc-keys {
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+ compatible = "adc-keys";
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+ io-channels = <&saradc 1>;
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+ io-channel-names = "buttons";
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+ poll-interval = <100>;
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+ keyup-threshold-microvolt = <1800000>;
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+
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+ button-up {
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+ label = "Volume Up";
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+ linux,code = <KEY_VOLUMEUP>;
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+ press-threshold-microvolt = <100000>;
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+ };
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+
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+ button-down {
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+ label = "Volume Down";
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+ linux,code = <KEY_VOLUMEDOWN>;
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+ press-threshold-microvolt = <300000>;
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+ };
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+
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+ back {
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+ label = "Back";
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+ linux,code = <KEY_BACK>;
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+ press-threshold-microvolt = <985000>;
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+ };
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+
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+ menu {
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+ label = "Menu";
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+ linux,code = <KEY_MENU>;
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+ press-threshold-microvolt = <1314000>;
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+ };
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+ };
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+};
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+
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+&cif_isp0 {
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+#ifdef CONFIG_VIDEO_TC358749XBG
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+ rockchip,camera-modules-attached = <&camera1>;
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+#else
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+ rockchip,camera-modules-attached = <&camera0>;
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+#endif
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+
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+// <&camera0 &camera1 &camera2 &camera3>;
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+ status = "okay";
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+};
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+
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+&isp0_mmu {
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+ status = "okay";
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+};
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+
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+&cif_isp1 {
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+ rockchip,camera-modules-attached = <&camera1>;
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+ status = "disable";
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+};
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+
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+&isp1_mmu {
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+ status = "disabled";
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+};
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+
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+&saradc {
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+ vref-supply = <&vccadc_ref>;
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+};
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+
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+&vpu {
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+ status = "okay";
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+ /* 0 means ion, 1 means drm */
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+ //allocator = <0>;
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+};
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+
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+&rkvdec {
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+ status = "okay";
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+ /* 0 means ion, 1 means drm */
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+ //allocator = <0>;
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+};
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+
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+&backlight {
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+ status = "okay";
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+// enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
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+// enable-gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
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+};
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+
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+&display_subsystem {
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+ status = "okay";
|
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+};
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+
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+&route_edp {
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+ status = "disabled";
|
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+};
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+
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+&route_dsi {
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+ status = "disabled";
|
||||
+};
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+&edp {
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+ status = "disabled";
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+
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+ ports {
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||||
+ edp_out: port@1 {
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+ reg = <1>;
|
||||
+ #address-cells = <1>;
|
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+ #size-cells = <0>;
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+
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+ edp_out_panel: endpoint@0 {
|
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+ reg = <0>;
|
||||
+ remote-endpoint = <&panel_in_edp>;
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||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+};
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||||
+
|
||||
+&pwm3 {
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||||
+ status = "okay";
|
||||
+ interrupts = <0 61 4 0>;
|
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+ compatible = "rockchip,remotectl-pwm";
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||||
+ remote_pwm_id = <3>;
|
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+ handle_cpu_id = <0>;
|
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+ ir_key1 {
|
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+ rockchip,usercode = <0xfb04>;
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+ rockchip,key_table =
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+ <0xa3 KEY_ENTER>,
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+ <0xe4 388>,
|
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+ <0xf5 KEY_BACK>,
|
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+ <0xbb KEY_UP>,
|
||||
+ <0xe2 KEY_DOWN>,
|
||||
+ <0xe3 KEY_LEFT>,
|
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+ <0xb7 KEY_RIGHT>,
|
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+ <0xe0 KEY_HOME>,
|
||||
+ <0xba KEY_VOLUMEUP>,
|
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+ <0xda KEY_VOLUMEUP>,
|
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+ <0xe6 KEY_VOLUMEDOWN>,
|
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+ <0xdb KEY_VOLUMEDOWN>,
|
||||
+ <0xbc KEY_SEARCH>,
|
||||
+ <0xb2 KEY_POWER>,
|
||||
+ <0xe5 KEY_POWER>,
|
||||
+ <0xde KEY_POWER>,
|
||||
+ <0xdc KEY_MUTE>,
|
||||
+ <0xa2 KEY_MENU>,
|
||||
+ <0xec KEY_1>,
|
||||
+ <0xef KEY_2>,
|
||||
+ <0xee KEY_3>,
|
||||
+ <0xf0 KEY_4>,
|
||||
+ <0xf3 KEY_5>,
|
||||
+ <0xf2 KEY_6>,
|
||||
+ <0xf4 KEY_7>,
|
||||
+ <0xf7 KEY_8>,
|
||||
+ <0xf6 KEY_9>,
|
||||
+ <0xb8 KEY_0>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&hdmi {
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
+ #sound-dai-cells = <0>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&i2c1 {
|
||||
+ status = "okay";
|
||||
+
|
||||
+/* gsl3673: gsl3673@40 {
|
||||
+ compatible = "GSL,GSL3673";
|
||||
+ reg = <0x40>;
|
||||
+ screen_max_x = <1536>;
|
||||
+ screen_max_y = <2048>;
|
||||
+ irq_gpio_number = <&gpio1 20 IRQ_TYPE_LEVEL_LOW>;
|
||||
+ rst_gpio_number = <&gpio4 22 GPIO_ACTIVE_HIGH>;
|
||||
+ };
|
||||
+*/
|
||||
+//TouchScreen Gt9xx 8 inch & 10 inch
|
||||
+ gt9xx: gt9xx@14 {
|
||||
+ compatible = "goodix,gt9xx";
|
||||
+ reg = <0x14>;
|
||||
+ touch-gpio = <&gpio1 20 IRQ_TYPE_LEVEL_LOW>;
|
||||
+ reset-gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
|
||||
+ max-x = <800>;
|
||||
+ max-y = <1280>;
|
||||
+ tp-size = <101>; // <911> for 8 inch // <101> for 10 inch
|
||||
+ status = "okay";
|
||||
+ };
|
||||
+ camera0: camera-module@10 {
|
||||
+ status = "disable";
|
||||
+ compatible = "omnivision,ov13850-v4l2-i2c-subdev";
|
||||
+ reg = < 0x10 >;
|
||||
+ device_type = "v4l2-i2c-subdev";
|
||||
+ clocks = <&cru SCLK_CIF_OUT>;
|
||||
+ clock-names = "clk_cif_out";
|
||||
+ pinctrl-names = "rockchip,camera_default","rockchip,camera_sleep";
|
||||
+ pinctrl-0 = <&cam0_default_pins>;
|
||||
+ pinctrl-1 = <&cam0_sleep_pins>;
|
||||
+ rockchip,pd-gpio = <&gpio2 4 GPIO_ACTIVE_LOW>;
|
||||
+ rockchip,pwr-gpio = <&gpio1 4 GPIO_ACTIVE_HIGH>;
|
||||
+ /* mipi switch control */
|
||||
+ rockchip,rst-gpio = <&gpio0 8 GPIO_ACTIVE_LOW>;
|
||||
+ rockchip,camera-module-mclk-name = "clk_cif_out";
|
||||
+ rockchip,camera-module-facing = "front";
|
||||
+ rockchip,camera-module-name = "cmk-cb0695-fv1";
|
||||
+ rockchip,camera-module-len-name = "lg9569a2";
|
||||
+ rockchip,camera-module-fov-h = "66.0";
|
||||
+ rockchip,camera-module-fov-v = "50.1";
|
||||
+ rockchip,camera-module-orientation = <0>;
|
||||
+ rockchip,camera-module-iq-flip = <0>;
|
||||
+ rockchip,camera-module-iq-mirror = <0>;
|
||||
+ rockchip,camera-module-flip = <1>;
|
||||
+ rockchip,camera-module-mirror = <0>;
|
||||
+
|
||||
+ rockchip,camera-module-defrect0 = <2112 1568 0 0 2112 1568>;
|
||||
+ rockchip,camera-module-defrect1 = <4224 3136 0 0 4224 3136>;
|
||||
+ rockchip,camera-module-defrect3 = <3264 2448 0 0 3264 2448>;
|
||||
+ rockchip,camera-module-flash-support = <0>;
|
||||
+ rockchip,camera-module-mipi-dphy-index = <0>;
|
||||
+ };
|
||||
+
|
||||
+ camera1: camera-module@1 {
|
||||
+#ifdef CONFIG_VIDEO_TC358749XBG
|
||||
+ status = "okay";
|
||||
+#else
|
||||
+ status = "disable";
|
||||
+#endif
|
||||
+ compatible = "toshiba,tc358749xbg-v4l2-i2c-subdev";
|
||||
+ reg = < 0x0f >;
|
||||
+ device_type = "v4l2-i2c-subdev";
|
||||
+
|
||||
+ clocks = <&cru SCLK_CIF_OUT>;
|
||||
+ clock-names = "clk_cif_out";
|
||||
+
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&hdmiin_gpios>;
|
||||
+
|
||||
+ //rockchip,pwr-gpio = <&gpio2 6 GPIO_ACTIVE_HIGH>;
|
||||
+ //rckchip,pwr-snd-gpio = <&gpio2 9 GPIO_ACTIVE_HIGH>;
|
||||
+ //rockchip,pwr-trd-gpio = <&gpio2 5 GPIO_ACTIVE_HIGH>;
|
||||
+ //rockchip,rst-gpio = <&gpio2 7 GPIO_ACTIVE_HIGH>;
|
||||
+ power-gpios = <&gpio2 6 GPIO_ACTIVE_HIGH>;
|
||||
+ power18-gpios = <&gpio2 9 GPIO_ACTIVE_HIGH>;
|
||||
+ power33-gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>;
|
||||
+ csi-ctl-gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>;
|
||||
+ stanby-gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>;
|
||||
+ reset-gpios = <&gpio2 7 GPIO_ACTIVE_HIGH>;
|
||||
+ int-gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>;
|
||||
+
|
||||
+ rockchip,camera-module-mclk-name = "clk_cif_out";
|
||||
+ rockchip,camera-module-mipi-dphy-index = <0>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&i2c4 {
|
||||
+ status = "okay";
|
||||
+
|
||||
+ cm32181@10 {
|
||||
+ status = "okay";
|
||||
+ compatible = "capella,cm32181";
|
||||
+ reg = <0x10>;
|
||||
+ };
|
||||
+
|
||||
+ ak09911@0c {
|
||||
+ status = "okay";
|
||||
+ compatible = "ak,ak09911";
|
||||
+ reg = <0x0c>;
|
||||
+ type = <SENSOR_TYPE_COMPASS>;
|
||||
+ poll_delay_ms = <30>;
|
||||
+ layout = <3>;
|
||||
+ };
|
||||
+
|
||||
+ lsm6ds3_gyro@6a {
|
||||
+ status = "okay";
|
||||
+ compatible = "lsm6ds3_gyro";
|
||||
+ reg = <0x6a>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&lsm6ds3_irq_gpio>;
|
||||
+ irq-gpio = <&gpio1 24 IRQ_TYPE_EDGE_RISING>;
|
||||
+ type = <SENSOR_TYPE_GYROSCOPE>;
|
||||
+ irq_enable = <1>;
|
||||
+ power-off-in-suspend = <1>;
|
||||
+ poll_delay_ms = <30>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&i2s2 {
|
||||
+ #sound-dai-cells = <0>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&vopb {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&vopb_mmu {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&vopl {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&vopl_mmu {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&pinctrl {
|
||||
+ buttons {
|
||||
+ pwrbtn: pwrbtn {
|
||||
+ rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ lsm6ds3_gyro {
|
||||
+ lsm6ds3_irq_gpio: lsm6ds3-irq-gpio {
|
||||
+ rockchip,pins = <1 24 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ hallsensor {
|
||||
+ mh248_irq_gpio: mh248-irq-gpio {
|
||||
+ rockchip,pins = <0 13 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ pcie {
|
||||
+ pcie_drv: pcie-drv {
|
||||
+ rockchip,pins =
|
||||
+ <0 2 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ lcd-panel {
|
||||
+ lcd_panel_reset: lcd-panel-reset {
|
||||
+ rockchip,pins = <4 30 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ hdmiin {
|
||||
+ hdmiin_gpios: hdmiin-gpios {
|
||||
+ rockchip,pins =
|
||||
+ <2 5 RK_FUNC_GPIO &pcfg_pull_none>,
|
||||
+ <2 6 RK_FUNC_GPIO &pcfg_pull_none>,
|
||||
+ <2 7 RK_FUNC_GPIO &pcfg_pull_none>,
|
||||
+ <2 8 RK_FUNC_GPIO &pcfg_pull_none>,
|
||||
+ <2 9 RK_FUNC_GPIO &pcfg_pull_none>,
|
||||
+ <2 12 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+
|
||||
+&dsi {
|
||||
+#ifdef CONFIG_ROCKCHIP_DW_MIPI_DSI
|
||||
+ status = "okay";
|
||||
+#else
|
||||
+ status = "disable";
|
||||
+#endif
|
||||
+ panel@0 {
|
||||
+#ifdef CONFIG_DRM_PANEL_SIMPLE
|
||||
+ status = "okay";
|
||||
+#else
|
||||
+ status = "disable";
|
||||
+#endif
|
||||
+ compatible = "simple-panel-dsi";
|
||||
+ reg = <0>;
|
||||
+ backlight = <&backlight>;
|
||||
+ enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
|
||||
+ reset-gpios = <&gpio4 30 GPIO_ACTIVE_LOW>;
|
||||
+
|
||||
+ reset-delay-ms = <5>;
|
||||
+ init-delay-ms = <200>;
|
||||
+ prepare-delay-ms = <15>;
|
||||
+// enable-delay-ms = <10>;
|
||||
+// disable-delay-ms = <20>;
|
||||
+// unprepare-delay-ms = <0>;
|
||||
+
|
||||
+
|
||||
+// dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
|
||||
+ dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_MODE_LPM)>;
|
||||
+ dsi,format = <MIPI_DSI_FMT_RGB888>;
|
||||
+ bus-format = <0x100a>;
|
||||
+ dsi,lanes = <4>;
|
||||
+
|
||||
+ panel-init-sequence = [
|
||||
+/* 15 00 02 53 24
|
||||
+ 39 1e 03 f0 5a 5a
|
||||
+ 05 78 01 11
|
||||
+ 05 1e 01 29
|
||||
+ 39 00 04 c3 40 00 28
|
||||
+ 15 00 02 50 77
|
||||
+ 15 00 02 e1 66
|
||||
+ 15 00 02 dc 67
|
||||
+ 15 00 02 d3 c8
|
||||
+ 15 00 02 50 00
|
||||
+ 15 00 02 f0 5a
|
||||
+ 15 78 02 f5 80*/
|
||||
+
|
||||
+ 39 00 06 f0 55 aa 52 08 00
|
||||
+ 39 00 03 b1 68 01
|
||||
+ 39 00 02 b6 08
|
||||
+ 39 00 04 b8 01 02 08
|
||||
+ 39 00 03 bb 44 44
|
||||
+ 39 00 03 bc 00 00
|
||||
+ 39 00 06 bd 02 68 10 10 00
|
||||
+ 39 00 02 c8 80
|
||||
+ 39 00 06 f0 55 aa 52 08 01
|
||||
+ 39 00 03 b3 4f 4f
|
||||
+ 39 00 03 b4 10 10
|
||||
+ 39 00 03 b5 05 05
|
||||
+ 39 00 03 b9 35 35
|
||||
+ 39 00 04 ba ba 25 25
|
||||
+ 39 00 03 bc 68 00
|
||||
+ 39 00 03 bd 68 00
|
||||
+ 39 00 02 be 30
|
||||
+ 39 00 02 c0 0c
|
||||
+ 39 00 02 ca 00
|
||||
+ 39 00 06 f0 55 aa 52 08 02
|
||||
+ 39 00 02 ee 01
|
||||
+ 39 00 11 b0 00 00 00 0f 00 2a 00 40 00 54 00 76 00 93 00 c5
|
||||
+ 39 00 11 b1 00 f0 01 32 01 66 01 bb 01 ff 02 01 02 42 02 85
|
||||
+ 39 00 11 b2 02 af 02 e0 03 05 03 35 03 54 03 84 03 a0 03 c4
|
||||
+ 39 00 05 b3 03 f2 03 ff
|
||||
+ 39 00 06 f0 55 aa 52 08 03
|
||||
+ 39 00 03 b0 00 00
|
||||
+ 39 00 03 b1 00 00
|
||||
+ 39 00 06 b2 08 00 17 00 00
|
||||
+ 39 00 06 b6 05 00 00 00 00
|
||||
+ 39 00 06 ba 53 00 a0 00 00
|
||||
+ 39 00 06 bb 53 00 a0 00 00
|
||||
+ 39 00 05 c0 00 00 00 00
|
||||
+ 39 00 05 c1 00 00 00 00
|
||||
+ 39 00 02 c4 60
|
||||
+ 39 00 02 c5 c0
|
||||
+ 39 00 06 f0 55 aa 52 08 05
|
||||
+ 39 00 03 b0 17 06
|
||||
+ 39 00 03 b1 17 06
|
||||
+ 39 00 03 b2 17 06
|
||||
+ 39 00 03 b3 17 06
|
||||
+ 39 00 03 b4 17 06
|
||||
+ 39 00 03 b5 17 06
|
||||
+ 39 00 02 b8 0c
|
||||
+ 39 00 02 b9 00
|
||||
+ 39 00 02 ba 00
|
||||
+ 39 00 02 bb 0a
|
||||
+ 39 00 02 bc 02
|
||||
+ 39 00 06 bd 03 01 01 03 03
|
||||
+ 39 00 02 c0 07
|
||||
+ 39 00 02 c4 a2
|
||||
+ 39 00 03 c8 03 20
|
||||
+ 39 00 03 c9 01 21
|
||||
+ 39 00 04 cc 00 00 01
|
||||
+ 39 00 04 cd 00 00 01
|
||||
+ 39 00 06 d1 00 04 fc 07 14
|
||||
+ 39 00 06 d2 10 05 00 03 16
|
||||
+ 39 00 02 e5 06
|
||||
+ 39 00 02 e6 06
|
||||
+ 39 00 02 e7 06
|
||||
+ 39 00 02 e8 06
|
||||
+ 39 00 02 e9 06
|
||||
+ 39 00 02 ea 06
|
||||
+ 39 00 02 ed 30
|
||||
+ 39 00 06 f0 55 aa 52 08 06
|
||||
+ 39 00 03 b0 17 11
|
||||
+ 39 00 03 b1 16 10
|
||||
+ 39 00 03 b2 12 18
|
||||
+ 39 00 03 b3 13 19
|
||||
+ 39 00 03 b4 00 31
|
||||
+ 39 00 03 b5 31 34
|
||||
+ 39 00 03 b6 34 29
|
||||
+ 39 00 03 b7 2a 33
|
||||
+ 39 00 03 b8 2e 2d
|
||||
+ 39 00 03 b9 08 34
|
||||
+ 39 00 03 ba 34 08
|
||||
+ 39 00 03 bb 2d 2e
|
||||
+ 39 00 03 bc 34 2a
|
||||
+ 39 00 03 bd 29 34
|
||||
+ 39 00 03 be 13 03
|
||||
+ 39 00 03 bf 31 00
|
||||
+ 39 00 03 c0 19 13
|
||||
+ 39 00 03 c1 18 12
|
||||
+ 39 00 03 c2 10 16
|
||||
+ 39 00 03 c3 11 17
|
||||
+ 39 00 03 e5 34 34
|
||||
+ 39 00 03 c4 12 18
|
||||
+ 39 00 03 c5 13 19
|
||||
+ 39 00 03 c6 17 11
|
||||
+ 39 00 03 c7 16 10
|
||||
+ 39 00 03 c8 08 31
|
||||
+ 39 00 03 c9 31 34
|
||||
+ 39 00 03 ca 34 29
|
||||
+ 39 00 03 cb 2a 33
|
||||
+ 39 00 03 cc 2d 2e
|
||||
+ 39 00 03 cd 00 34
|
||||
+ 39 00 03 ce 34 00
|
||||
+ 39 00 03 cf 2e 2d
|
||||
+ 39 00 03 d0 34 2a
|
||||
+ 39 00 03 d1 29 2a
|
||||
+ 39 00 03 d2 34 31
|
||||
+ 39 00 03 d3 31 08
|
||||
+ 39 00 03 d4 10 16
|
||||
+ 39 00 03 d5 11 17
|
||||
+ 39 00 03 d6 19 13
|
||||
+ 39 00 03 d7 18 12
|
||||
+ 39 00 03 e6 34 34
|
||||
+ 39 00 06 d8 00 00 00 00 00
|
||||
+ 39 00 06 d9 00 00 00 00 00
|
||||
+ 39 00 02 e7 00
|
||||
+ 05 78 01 11
|
||||
+ 05 14 01 29
|
||||
+ 39 00 02 35 00
|
||||
+ 39 14 06 f0 55 aa 52 08 01
|
||||
+ ];
|
||||
+
|
||||
+ panel-exit-sequence = [
|
||||
+ 05 00 01 28
|
||||
+ 05 78 01 10
|
||||
+ ];
|
||||
+/*
|
||||
+ power_ctr: power_ctr {
|
||||
+ rockchip,debug = <0>;
|
||||
+ lcd_en: lcd-en {
|
||||
+ rockchip,power_type = <0>;
|
||||
+ gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
|
||||
+ rockchip,delay = <10>;
|
||||
+ };
|
||||
+ lcd_rst: lcd-rst {
|
||||
+ rockchip,power_type = <0>;
|
||||
+ gpios = <&gpio4 30 GPIO_ACTIVE_HIGH>;
|
||||
+ rockchip,delay = <5>;
|
||||
+ };
|
||||
+ };
|
||||
+*/
|
||||
+ display-timings {
|
||||
+ native-mode = <&timing0>;
|
||||
+
|
||||
+ timing0: timing0 {
|
||||
+ clock-frequency = <74000000>;
|
||||
+ screen-type = <7>;
|
||||
+ out-face = <0>;
|
||||
+ hactive = <800>;
|
||||
+ vactive = <1280>;
|
||||
+ hback-porch = <59>;
|
||||
+ hfront-porch = <16>;
|
||||
+ vback-porch = <3>;
|
||||
+ vfront-porch = <8>;
|
||||
+ hsync-len = <5>;
|
||||
+ vsync-len = <5>;
|
||||
+ hsync-active = <0>;
|
||||
+ vsync-active = <0>;
|
||||
+ de-active = <0>;
|
||||
+ pixelclk-active = <0>;
|
||||
+ swap-rb = <0>;
|
||||
+ swap-rg = <0>;
|
||||
+ swap-gb = <0>;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi
|
||||
index 3d76b973..cfd08f03 100644
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi
|
||||
@@ -188,21 +188,8 @@
|
||||
|
||||
/* for rockchip boot on */
|
||||
rockchip,pwm_id= <2>;
|
||||
- rockchip,pwm_voltage = <900000>;
|
||||
+ rockchip,pwm_voltage = <1000000>;
|
||||
};
|
||||
-
|
||||
- xin32k: xin32k {
|
||||
- compatible = "fixed-clock";
|
||||
- clock-frequency = <32768>;
|
||||
- clock-output-names = "xin32k";
|
||||
- #clock-cells = <0>;
|
||||
- };
|
||||
-};
|
||||
-
|
||||
-&cdn_dp {
|
||||
- status = "okay";
|
||||
- extcon = <&fusb0>;
|
||||
- phys = <&tcphy0_dp>;
|
||||
};
|
||||
|
||||
&cpu_l0 {
|
||||
@@ -312,7 +299,7 @@
|
||||
rockchip,system-power-controller;
|
||||
wakeup-source;
|
||||
#clock-cells = <1>;
|
||||
- clock-output-names = "rk808-clkout1", "rk808-clkout2";
|
||||
+ clock-output-names = "xin32k", "rk808-clkout2";
|
||||
|
||||
vcc1-supply = <&vcc3v3_sys>;
|
||||
vcc2-supply = <&vcc3v3_sys>;
|
||||
@@ -529,7 +516,7 @@
|
||||
};
|
||||
|
||||
&pcie0 {
|
||||
- ep-gpios = <&gpio2 RK_PA4 GPIO_ACTIVE_HIGH>;
|
||||
+ ep-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
|
||||
num-lanes = <4>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pcie_clkreqn>;
|
||||
@@ -547,8 +534,6 @@
|
||||
|
||||
&pwm2 {
|
||||
status = "okay";
|
||||
- pinctrl-names = "active";
|
||||
- pinctrl-0 = <&pwm2_pin_pull_down>;
|
||||
};
|
||||
|
||||
&sdhci {
|
||||
Loading…
Add table
Reference in a new issue