From 80eec3f2eab1e26f7b547dd3d02b45539c1b4954 Mon Sep 17 00:00:00 2001 From: Karabek Date: Tue, 5 Jun 2018 09:46:44 +0200 Subject: [PATCH] H3 Nanopi Air: Update small update ... --- .../sunxi-dev/wifi-nanopi-neo-air.patch | 84 +++++++++++++++++++ 1 file changed, 84 insertions(+) create mode 100644 patch/kernel/sunxi-dev/wifi-nanopi-neo-air.patch diff --git a/patch/kernel/sunxi-dev/wifi-nanopi-neo-air.patch b/patch/kernel/sunxi-dev/wifi-nanopi-neo-air.patch new file mode 100644 index 000000000..69b627b7b --- /dev/null +++ b/patch/kernel/sunxi-dev/wifi-nanopi-neo-air.patch @@ -0,0 +1,84 @@ +diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-neo-air.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-neo-air.dts +index 1925ae4..4ddd7b8 100644 +--- a/arch/arm/boot/dts/sun8i-h3-nanopi-neo-air.dts ++++ b/arch/arm/boot/dts/sun8i-h3-nanopi-neo-air.dts +@@ -47,7 +47,7 @@ + #include + + / { +- model = "FriendlyARM NanoPi NEO Air"; ++ model = "FriendlyElec NanoPi NEO Air"; + compatible = "friendlyarm,nanopi-neo-air", "allwinner,sun8i-h3"; + + aliases { +@@ -58,6 +58,13 @@ + stdout-path = "serial0:115200n8"; + }; + ++ wifi_pwrseq: wifi_pwrseq { ++ compatible = "mmc-pwrseq-simple"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&wifi_en_neoair>; ++ reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */ ++ }; ++ + leds { + compatible = "gpio-leds"; + +@@ -85,6 +92,42 @@ + status = "okay"; + }; + ++&mmc1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mmc1_pins>; ++ vmmc-supply = <®_vcc3v3>; ++ vqmmc-supply = <®_vcc3v3>; ++ mmc-pwrseq = <&wifi_pwrseq>; ++ bus-width = <4>; ++ non-removable; ++ status = "okay"; ++ ++ brcmf: bcrmf@1 { ++ reg = <1>; ++ compatible = "brcm,bcm4329-fmac"; ++ interrupt-parent = <&pio>; ++ interrupts = <6 10 IRQ_TYPE_LEVEL_LOW>; /* PG10 / EINT10 */ ++ interrupt-names = "host-wake"; ++ }; ++}; ++ ++&mmc2 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mmc2_8bit_pins>; ++ vmmc-supply = <®_vcc3v3>; ++ bus-width = <8>; ++ non-removable; ++ cap-mmc-hw-reset; ++ status = "okay"; ++}; ++ ++&mmc2_8bit_pins { ++ /* Increase drive strength for DDR modes */ ++ drive-strength = <40>; ++ /* eMMC is missing pull-ups */ ++ bias-pull-up; ++}; ++ + &ohci0 { + status = "okay"; + }; +@@ -97,6 +140,13 @@ + status = "okay"; + }; + ++&r_pio { ++ wifi_en_neoair: wifi_en_pin@0 { ++ allwinner,pins = "PL7"; ++ allwinner,function = "gpio_out"; ++ }; ++}; ++ + &uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins_a>;