GitHub-Mirror/build
2
0
Fork 0
mirror of https://github.com/Fishwaldo/build.git synced 2025-07-10 23:19:01 +00:00
Code Issues Projects Releases Packages Wiki Activity Actions

refreshed mvebu with quilt (#2419)

Browse source 
* mvebu-dev: refresh all patches with quilt

Cleaned up based on kernel 5.9.12.

Signed-off-by: Rosen Penev <rosenp@gmail.com>

* mvebu-current: refresh patches with quilt

Based on kernel version 5.9.12

Signed-off-by: Rosen Penev <rosenp@gmail.com>

* mvebu-legacy: refresh patches with quilt

Based on kernel 4.19.161

Signed-off-by: Rosen Penev <rosenp@gmail.com>

* mvebu-legacy: remove custom helios4 dts file

This is already added upstream. No need to have it here.

Continued refreshing the other patches.

Signed-off-by: Rosen Penev <rosenp@gmail.com>
This commit is contained in:
Rosen Penev 2020-12-10 02:47:33 -08:00 • committed by GitHub
parent 4947f95b46
commit aa3d60f57e
No known key found for this signature in database
GPG key ID: 4AEE18F83AFDEB23
47 changed files with 387 additions and 1219 deletions
Download patch file Download diff file Expand all files Collapse all files

7
patch/kernel/mvebu-current/0001-cpuidle-mvebu-indicate-failure-to-enter-deeper-sleep.patch
View file

@ -25,11 +25,9 @@ Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
drivers/cpuidle/cpuidle-mvebu-v7.c | 6 +++++- drivers/cpuidle/cpuidle-mvebu-v7.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-) 1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/cpuidle/cpuidle-mvebu-v7.c b/drivers/cpuidle/cpuidle-mvebu-v7.c
index 01a856971f05..18ded9e7cb34 100644
--- a/drivers/cpuidle/cpuidle-mvebu-v7.c --- a/drivers/cpuidle/cpuidle-mvebu-v7.c
+++ b/drivers/cpuidle/cpuidle-mvebu-v7.c +++ b/drivers/cpuidle/cpuidle-mvebu-v7.c
@@ -39,8 +39,12 @@ static int mvebu_v7_enter_idle(struct cpuidle_device *dev, @@ -39,8 +39,12 @@ static int mvebu_v7_enter_idle(struct cp
ret = mvebu_v7_cpu_suspend(deepidle); ret = mvebu_v7_cpu_suspend(deepidle);
cpu_pm_exit(); cpu_pm_exit();
@ -43,6 +41,3 @@ index 01a856971f05..18ded9e7cb34 100644
return index; return index;
} }
--
2.1.0

145
patch/kernel/mvebu-current/40-pci-add-irq-change-handler-sspl.patch
View file

@ -12,11 +12,9 @@ Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
drivers/pci/pcie/portdrv_core.c | 2 + drivers/pci/pcie/portdrv_core.c | 2 +
5 files changed, 180 insertions(+), 34 deletions(-) 5 files changed, 180 insertions(+), 34 deletions(-)
diff --git a/drivers/pci/controller/pci-mvebu.c b/drivers/pci/controller/pci-mvebu.c
index c39978b750ec..b4fb20835573 100644
--- a/drivers/pci/controller/pci-mvebu.c --- a/drivers/pci/controller/pci-mvebu.c
+++ b/drivers/pci/controller/pci-mvebu.c +++ b/drivers/pci/controller/pci-mvebu.c
@@ -53,7 +53,14 @@ @@ -53,13 +53,26 @@
PCIE_CONF_ADDR_EN) PCIE_CONF_ADDR_EN)
#define PCIE_CONF_DATA_OFF 0x18fc #define PCIE_CONF_DATA_OFF 0x18fc
#define PCIE_MASK_OFF 0x1910 #define PCIE_MASK_OFF 0x1910
@ -31,7 +29,19 @@ index c39978b750ec..b4fb20835573 100644
#define PCIE_CTRL_OFF 0x1a00 #define PCIE_CTRL_OFF 0x1a00
#define PCIE_CTRL_X1_MODE 0x0001 #define PCIE_CTRL_X1_MODE 0x0001
#define PCIE_STAT_OFF 0x1a04 #define PCIE_STAT_OFF 0x1a04
@@ -432,6 +439,54 @@ static void mvebu_pcie_handle_membase_change(struct mvebu_pcie_port *port) #define PCIE_STAT_BUS 0xff00
#define PCIE_STAT_DEV 0x1f0000
#define PCIE_STAT_LINK_DOWN BIT(0)
+#define PCIE_SSPL 0x1a0c
+#define PCIE_SSPL_MSGEN BIT(14)
+#define PCIE_SSPL_SPLS(x) (((x) & 3) << 8)
+#define PCIE_SSPL_SPLS_VAL(x) (((x) >> 8) & 3)
+#define PCIE_SSPL_SPLV(x) ((x) & 0xff)
+#define PCIE_SSPL_SPLV_VAL(x) ((x) & 0xff)
#define PCIE_RC_RTSTA 0x1a14
#define PCIE_DEBUG_CTRL 0x1a60
#define PCIE_DEBUG_SOFT_RESET BIT(20)
@@ -432,6 +445,54 @@ static void mvebu_pcie_handle_membase_ch
&port->memwin); &port->memwin);
} }
@ -86,7 +96,22 @@ index c39978b750ec..b4fb20835573 100644
static pci_bridge_emul_read_status_t static pci_bridge_emul_read_status_t
mvebu_pci_bridge_emul_pcie_conf_read(struct pci_bridge_emul *bridge, mvebu_pci_bridge_emul_pcie_conf_read(struct pci_bridge_emul *bridge,
int reg, u32 *value) int reg, u32 *value)
@@ -477,6 +532,30 @@ mvebu_pci_bridge_emul_pcie_conf_read(struct pci_bridge_emul *bridge, @@ -462,6 +523,14 @@ mvebu_pci_bridge_emul_pcie_conf_read(str
*value = mvebu_readl(port, PCIE_CAP_PCIEXP + PCI_EXP_LNKCTL);
break;
+ case PCI_EXP_SLTCAP:
+ {
+ u32 tmp = mvebu_readl(port, PCIE_SSPL);
+ *value = PCIE_SSPL_SPLS_VAL(tmp) << 15 |
+ PCIE_SSPL_SPLV_VAL(tmp) << 7;
+ break;
+ }
+
case PCI_EXP_SLTCTL:
*value = PCI_EXP_SLTSTA_PDS << 16;
break;
@@ -477,6 +546,30 @@ mvebu_pci_bridge_emul_pcie_conf_read(str
return PCI_BRIDGE_EMUL_HANDLED; return PCI_BRIDGE_EMUL_HANDLED;
} }
@ -117,7 +142,7 @@ index c39978b750ec..b4fb20835573 100644
static void static void
mvebu_pci_bridge_emul_base_conf_write(struct pci_bridge_emul *bridge, mvebu_pci_bridge_emul_base_conf_write(struct pci_bridge_emul *bridge,
int reg, u32 old, u32 new, u32 mask) int reg, u32 old, u32 new, u32 mask)
@@ -494,7 +573,8 @@ mvebu_pci_bridge_emul_base_conf_write(struct pci_bridge_emul *bridge, @@ -494,7 +587,8 @@ mvebu_pci_bridge_emul_base_conf_write(st
mvebu_pcie_handle_iobase_change(port); mvebu_pcie_handle_iobase_change(port);
if ((old ^ new) & PCI_COMMAND_MEMORY) if ((old ^ new) & PCI_COMMAND_MEMORY)
mvebu_pcie_handle_membase_change(port); mvebu_pcie_handle_membase_change(port);
@ -127,7 +152,7 @@ index c39978b750ec..b4fb20835573 100644
break; break;
} }
@@ -517,6 +597,11 @@ mvebu_pci_bridge_emul_base_conf_write(struct pci_bridge_emul *bridge, @@ -517,6 +611,11 @@ mvebu_pci_bridge_emul_base_conf_write(st
mvebu_pcie_handle_iobase_change(port); mvebu_pcie_handle_iobase_change(port);
break; break;
@ -139,7 +164,7 @@ index c39978b750ec..b4fb20835573 100644
case PCI_PRIMARY_BUS: case PCI_PRIMARY_BUS:
mvebu_pcie_set_local_bus_nr(port, conf->secondary_bus); mvebu_pcie_set_local_bus_nr(port, conf->secondary_bus);
break; break;
@@ -534,6 +619,10 @@ mvebu_pci_bridge_emul_pcie_conf_write(struct pci_bridge_emul *bridge, @@ -534,6 +633,10 @@ mvebu_pci_bridge_emul_pcie_conf_write(st
switch (reg) { switch (reg) {
case PCI_EXP_DEVCTL: case PCI_EXP_DEVCTL:
@ -150,7 +175,19 @@ index c39978b750ec..b4fb20835573 100644
/* /*
* Armada370 data says these bits must always * Armada370 data says these bits must always
* be zero when in root complex mode. * be zero when in root complex mode.
@@ -559,6 +648,25 @@ mvebu_pci_bridge_emul_pcie_conf_write(struct pci_bridge_emul *bridge, @@ -556,9 +659,37 @@ mvebu_pci_bridge_emul_pcie_conf_write(st
mvebu_writel(port, new, PCIE_CAP_PCIEXP + PCI_EXP_LNKCTL);
break;
+ case PCI_EXP_SLTCAP:
+ {
+ u32 sspl = PCIE_SSPL_SPLV((new & PCI_EXP_SLTCAP_SPLV) >> 7) |
+ PCIE_SSPL_SPLS((new & PCI_EXP_SLTCAP_SPLS) >> 15) |
+ PCIE_SSPL_MSGEN;
+ mvebu_writel(port, sspl, PCIE_SSPL);
+ break;
+ }
+
case PCI_EXP_RTSTA: case PCI_EXP_RTSTA:
mvebu_writel(port, new, PCIE_RC_RTSTA); mvebu_writel(port, new, PCIE_RC_RTSTA);
break; break;
@ -176,7 +213,7 @@ index c39978b750ec..b4fb20835573 100644
} }
} }
@@ -566,6 +674,8 @@ static struct pci_bridge_emul_ops mvebu_pci_bridge_emul_ops = { @@ -566,6 +697,8 @@ static struct pci_bridge_emul_ops mvebu_
.write_base = mvebu_pci_bridge_emul_base_conf_write, .write_base = mvebu_pci_bridge_emul_base_conf_write,
.read_pcie = mvebu_pci_bridge_emul_pcie_conf_read, .read_pcie = mvebu_pci_bridge_emul_pcie_conf_read,
.write_pcie = mvebu_pci_bridge_emul_pcie_conf_write, .write_pcie = mvebu_pci_bridge_emul_pcie_conf_write,
@ -185,11 +222,9 @@ index c39978b750ec..b4fb20835573 100644
}; };
/* /*
diff --git a/drivers/pci/pci-bridge-emul.c b/drivers/pci/pci-bridge-emul.c
index ccf26d12ec61..c124b7ff1e22 100644
--- a/drivers/pci/pci-bridge-emul.c --- a/drivers/pci/pci-bridge-emul.c
+++ b/drivers/pci/pci-bridge-emul.c +++ b/drivers/pci/pci-bridge-emul.c
@@ -151,6 +151,7 @@ static const struct pci_bridge_reg_behavior pci_regs_behavior[] = { @@ -151,6 +151,7 @@ static const struct pci_bridge_reg_behav
.rw = (GENMASK(7, 0) | .rw = (GENMASK(7, 0) |
((PCI_BRIDGE_CTL_PARITY | ((PCI_BRIDGE_CTL_PARITY |
PCI_BRIDGE_CTL_SERR | PCI_BRIDGE_CTL_SERR |
@ -197,7 +232,7 @@ index ccf26d12ec61..c124b7ff1e22 100644
PCI_BRIDGE_CTL_ISA | PCI_BRIDGE_CTL_ISA |
PCI_BRIDGE_CTL_VGA | PCI_BRIDGE_CTL_VGA |
PCI_BRIDGE_CTL_MASTER_ABORT | PCI_BRIDGE_CTL_MASTER_ABORT |
@@ -264,6 +265,7 @@ int pci_bridge_emul_init(struct pci_bridge_emul *bridge, @@ -264,6 +265,7 @@ int pci_bridge_emul_init(struct pci_brid
bridge->conf.header_type = PCI_HEADER_TYPE_BRIDGE; bridge->conf.header_type = PCI_HEADER_TYPE_BRIDGE;
bridge->conf.cache_line_size = 0x10; bridge->conf.cache_line_size = 0x10;
bridge->conf.status = cpu_to_le16(PCI_STATUS_CAP_LIST); bridge->conf.status = cpu_to_le16(PCI_STATUS_CAP_LIST);
@ -205,7 +240,7 @@ index ccf26d12ec61..c124b7ff1e22 100644
bridge->pci_regs_behavior = kmemdup(pci_regs_behavior, bridge->pci_regs_behavior = kmemdup(pci_regs_behavior,
sizeof(pci_regs_behavior), sizeof(pci_regs_behavior),
GFP_KERNEL); GFP_KERNEL);
@@ -321,25 +323,26 @@ int pci_bridge_emul_conf_read(struct pci_bridge_emul *bridge, int where, @@ -321,25 +323,26 @@ int pci_bridge_emul_conf_read(struct pci
__le32 *cfgspace; __le32 *cfgspace;
const struct pci_bridge_reg_behavior *behavior; const struct pci_bridge_reg_behavior *behavior;
@ -244,7 +279,7 @@ index ccf26d12ec61..c124b7ff1e22 100644
} }
if (read_op) if (read_op)
@@ -347,15 +350,20 @@ int pci_bridge_emul_conf_read(struct pci_bridge_emul *bridge, int where, @@ -347,15 +350,20 @@ int pci_bridge_emul_conf_read(struct pci
else else
ret = PCI_BRIDGE_EMUL_NOT_HANDLED; ret = PCI_BRIDGE_EMUL_NOT_HANDLED;
@ -269,7 +304,7 @@ index ccf26d12ec61..c124b7ff1e22 100644
if (size == 1) if (size == 1)
*value = (*value >> (8 * (where & 3))) & 0xff; *value = (*value >> (8 * (where & 3))) & 0xff;
@@ -382,12 +390,6 @@ int pci_bridge_emul_conf_write(struct pci_bridge_emul *bridge, int where, @@ -382,12 +390,6 @@ int pci_bridge_emul_conf_write(struct pc
__le32 *cfgspace; __le32 *cfgspace;
const struct pci_bridge_reg_behavior *behavior; const struct pci_bridge_reg_behavior *behavior;
@ -282,7 +317,7 @@ index ccf26d12ec61..c124b7ff1e22 100644
shift = (where & 0x3) * 8; shift = (where & 0x3) * 8;
if (size == 4) if (size == 4)
@@ -403,27 +405,42 @@ int pci_bridge_emul_conf_write(struct pci_bridge_emul *bridge, int where, @@ -403,27 +405,42 @@ int pci_bridge_emul_conf_write(struct pc
if (ret != PCIBIOS_SUCCESSFUL) if (ret != PCIBIOS_SUCCESSFUL)
return ret; return ret;
@ -336,8 +371,6 @@ index ccf26d12ec61..c124b7ff1e22 100644
if (write_op) if (write_op)
write_op(bridge, reg, old, new, mask); write_op(bridge, reg, old, new, mask);
diff --git a/drivers/pci/pci-bridge-emul.h b/drivers/pci/pci-bridge-emul.h
index b31883022a8e..5f64560aaa26 100644
--- a/drivers/pci/pci-bridge-emul.h --- a/drivers/pci/pci-bridge-emul.h
+++ b/drivers/pci/pci-bridge-emul.h +++ b/drivers/pci/pci-bridge-emul.h
@@ -90,6 +90,14 @@ struct pci_bridge_emul_ops { @@ -90,6 +90,14 @@ struct pci_bridge_emul_ops {
@ -369,11 +402,9 @@ index b31883022a8e..5f64560aaa26 100644
}; };
struct pci_bridge_reg_behavior; struct pci_bridge_reg_behavior;
diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c
index 253c30cc1967..3edbe276e626 100644
--- a/drivers/pci/pcie/aspm.c --- a/drivers/pci/pcie/aspm.c
+++ b/drivers/pci/pcie/aspm.c +++ b/drivers/pci/pcie/aspm.c
@@ -576,6 +576,8 @@ static void pcie_aspm_cap_init(struct pcie_link_state *link, int blacklist) @@ -576,6 +576,8 @@ static void pcie_aspm_cap_init(struct pc
*/ */
pcie_get_aspm_reg(parent, &upreg); pcie_get_aspm_reg(parent, &upreg);
pcie_get_aspm_reg(child, &dwreg); pcie_get_aspm_reg(child, &dwreg);
@ -382,11 +413,9 @@ index 253c30cc1967..3edbe276e626 100644
/* /*
* Setup L0s state * Setup L0s state
diff --git a/drivers/pci/pcie/portdrv_core.c b/drivers/pci/pcie/portdrv_core.c
index 50a9522ab07d..105ebc7a7987 100644
--- a/drivers/pci/pcie/portdrv_core.c --- a/drivers/pci/pcie/portdrv_core.c
+++ b/drivers/pci/pcie/portdrv_core.c +++ b/drivers/pci/pcie/portdrv_core.c
@@ -325,6 +325,7 @@ int pcie_port_device_register(struct pci_dev *dev) @@ -325,6 +325,7 @@ int pcie_port_device_register(struct pci
/* Get and check PCI Express port services */ /* Get and check PCI Express port services */
capabilities = get_port_device_capability(dev); capabilities = get_port_device_capability(dev);
@ -394,7 +423,7 @@ index 50a9522ab07d..105ebc7a7987 100644
if (!capabilities) if (!capabilities)
return 0; return 0;
@@ -337,6 +338,7 @@ int pcie_port_device_register(struct pci_dev *dev) @@ -337,6 +338,7 @@ int pcie_port_device_register(struct pci
* if that is to be used. * if that is to be used.
*/ */
status = pcie_init_service_irqs(dev, irqs, capabilities); status = pcie_init_service_irqs(dev, irqs, capabilities);
@ -402,65 +431,3 @@ index 50a9522ab07d..105ebc7a7987 100644
if (status) { if (status) {
capabilities &= PCIE_PORT_SERVICE_HP; capabilities &= PCIE_PORT_SERVICE_HP;
if (!capabilities) if (!capabilities)
--
cgit v1.2.1
From 9b1aafd0f620776f8d15f3ee872d3d5a69a468db Mon Sep 17 00:00:00 2001
From: Russell King <rmk+kernel@arm.linux.org.uk>
Date: Tue, 29 Nov 2016 10:13:48 +0000
Subject: implement slot capabilities (SSPL)
---
drivers/pci/controller/pci-mvebu.c | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/drivers/pci/controller/pci-mvebu.c b/drivers/pci/controller/pci-mvebu.c
index b4fb20835573..060226d11588 100644
--- a/drivers/pci/controller/pci-mvebu.c
+++ b/drivers/pci/controller/pci-mvebu.c
@@ -67,6 +67,12 @@
#define PCIE_STAT_BUS 0xff00
#define PCIE_STAT_DEV 0x1f0000
#define PCIE_STAT_LINK_DOWN BIT(0)
+#define PCIE_SSPL 0x1a0c
+#define PCIE_SSPL_MSGEN BIT(14)
+#define PCIE_SSPL_SPLS(x) (((x) & 3) << 8)
+#define PCIE_SSPL_SPLS_VAL(x) (((x) >> 8) & 3)
+#define PCIE_SSPL_SPLV(x) ((x) & 0xff)
+#define PCIE_SSPL_SPLV_VAL(x) ((x) & 0xff)
#define PCIE_RC_RTSTA 0x1a14
#define PCIE_DEBUG_CTRL 0x1a60
#define PCIE_DEBUG_SOFT_RESET BIT(20)
@@ -517,6 +523,14 @@ mvebu_pci_bridge_emul_pcie_conf_read(struct pci_bridge_emul *bridge,
*value = mvebu_readl(port, PCIE_CAP_PCIEXP + PCI_EXP_LNKCTL);
break;
+ case PCI_EXP_SLTCAP:
+ {
+ u32 tmp = mvebu_readl(port, PCIE_SSPL);
+ *value = PCIE_SSPL_SPLS_VAL(tmp) << 15 |
+ PCIE_SSPL_SPLV_VAL(tmp) << 7;
+ break;
+ }
+
case PCI_EXP_SLTCTL:
*value = PCI_EXP_SLTSTA_PDS << 16;
break;
@@ -645,6 +659,15 @@ mvebu_pci_bridge_emul_pcie_conf_write(struct pci_bridge_emul *bridge,
mvebu_writel(port, new, PCIE_CAP_PCIEXP + PCI_EXP_LNKCTL);
break;
+ case PCI_EXP_SLTCAP:
+ {
+ u32 sspl = PCIE_SSPL_SPLV((new & PCI_EXP_SLTCAP_SPLV) >> 7) |
+ PCIE_SSPL_SPLS((new & PCI_EXP_SLTCAP_SPLS) >> 15) |
+ PCIE_SSPL_MSGEN;
+ mvebu_writel(port, sspl, PCIE_SSPL);
+ break;
+ }
+
case PCI_EXP_RTSTA:
mvebu_writel(port, new, PCIE_RC_RTSTA);
break;
--
cgit v1.2.1

6
patch/kernel/mvebu-current/402-sfp-display-SFP-module-information.patch
View file

@ -7,7 +7,7 @@ Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
--- ---
--- a/drivers/net/phy/sfp.c --- a/drivers/net/phy/sfp.c
+++ b/drivers/net/phy/sfp.c +++ b/drivers/net/phy/sfp.c
@@ -531,6 +531,185 @@ static unsigned int sfp_check(void *buf, size_t len) @@ -531,6 +531,185 @@ static unsigned int sfp_check(void *buf,
return check; return check;
} }
@ -193,7 +193,7 @@ Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
/* hwmon */ /* hwmon */
#if IS_ENABLED(CONFIG_HWMON) #if IS_ENABLED(CONFIG_HWMON)
static umode_t sfp_hwmon_is_visible(const void *data, static umode_t sfp_hwmon_is_visible(const void *data,
@@ -1670,6 +1849,7 @@ static int sfp_sm_mod_probe(struct sfp *sfp) @@ -1670,6 +1849,7 @@ static int sfp_sm_mod_probe(struct sfp *
struct sfp_eeprom_id id; struct sfp_eeprom_id id;
bool cotsworks_sfbg; bool cotsworks_sfbg;
bool cotsworks; bool cotsworks;
@ -201,7 +201,7 @@ Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
u8 check; u8 check;
int ret; int ret;
@@ -1744,6 +1926,73 @@ static int sfp_sm_mod_probe(struct sfp *sfp) @@ -1744,6 +1924,73 @@ static int sfp_sm_mod_probe(struct sfp *
(int)sizeof(id.ext.vendor_sn), id.ext.vendor_sn, (int)sizeof(id.ext.vendor_sn), id.ext.vendor_sn,
(int)sizeof(id.ext.datecode), id.ext.datecode); (int)sizeof(id.ext.datecode), id.ext.datecode);

4
patch/kernel/mvebu-current/91-01-libata-add-ledtrig-support.patch
View file

@ -106,11 +106,11 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
+ for (i = 0; i < host->n_ports; i++) { + for (i = 0; i < host->n_ports; i++) {
+ if (unlikely(!host->ports[i]->ledtrig)) + if (unlikely(!host->ports[i]->ledtrig))
+ continue; + continue;
+
+ snprintf(host->ports[i]->ledtrig_name, + snprintf(host->ports[i]->ledtrig_name,
+ sizeof(host->ports[i]->ledtrig_name), "ata%u", + sizeof(host->ports[i]->ledtrig_name), "ata%u",
+ host->ports[i]->print_id); + host->ports[i]->print_id);
+
+ host->ports[i]->ledtrig->name = host->ports[i]->ledtrig_name; + host->ports[i]->ledtrig->name = host->ports[i]->ledtrig_name;
+ +
+ if (led_trigger_register(host->ports[i]->ledtrig)) { + if (led_trigger_register(host->ports[i]->ledtrig)) {

9
patch/kernel/mvebu-current/91-02-Enable-ATA-port-LED-trigger.patch
View file

@ -8,11 +8,9 @@ Subject: Enable ATA port LED trigger
arch/arm/mach-mvebu/Kconfig | 1 + arch/arm/mach-mvebu/Kconfig | 1 +
2 files changed, 2 insertions(+) 2 files changed, 2 insertions(+)
diff --git a/arch/arm/configs/mvebu_v7_defconfig b/arch/arm/configs/mvebu_v7_defconfig
index cf363ab..19449d3 100644
--- a/arch/arm/configs/mvebu_v7_defconfig --- a/arch/arm/configs/mvebu_v7_defconfig
+++ b/arch/arm/configs/mvebu_v7_defconfig +++ b/arch/arm/configs/mvebu_v7_defconfig
@@ -58,6 +58,7 @@ CONFIG_MTD_SPI_NOR=y @@ -58,6 +58,7 @@ CONFIG_MTD_UBI=y
CONFIG_EEPROM_AT24=y CONFIG_EEPROM_AT24=y
CONFIG_BLK_DEV_SD=y CONFIG_BLK_DEV_SD=y
CONFIG_ATA=y CONFIG_ATA=y
@ -20,8 +18,6 @@ index cf363ab..19449d3 100644
CONFIG_SATA_AHCI=y CONFIG_SATA_AHCI=y
CONFIG_AHCI_MVEBU=y CONFIG_AHCI_MVEBU=y
CONFIG_SATA_MV=y CONFIG_SATA_MV=y
diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
index 053ea9d..aa1f389 100644
--- a/arch/arm/mach-mvebu/Kconfig --- a/arch/arm/mach-mvebu/Kconfig
+++ b/arch/arm/mach-mvebu/Kconfig +++ b/arch/arm/mach-mvebu/Kconfig
@@ -56,6 +56,7 @@ config MACH_ARMADA_375 @@ -56,6 +56,7 @@ config MACH_ARMADA_375
@ -32,6 +28,3 @@ index 053ea9d..aa1f389 100644
select ARM_ERRATA_720789 select ARM_ERRATA_720789
select PL310_ERRATA_753970 select PL310_ERRATA_753970
select ARM_GIC select ARM_GIC
--
2.7.4

16
patch/kernel/mvebu-current/92-mvebu-gpio-add_wake_on_gpio_support.patch
View file

@ -17,11 +17,10 @@
struct irq_domain *domain; struct irq_domain *domain;
int soc_variant; int soc_variant;
@@ -600,6 +601,33 @@ static void mvebu_gpio_irq_handler(struct irq_desc *desc) @@ -601,6 +602,33 @@ static void mvebu_gpio_irq_handler(struc
chained_irq_exit(chip, desc);
} }
+/* /*
+ * Set interrupt number "irq" in the GPIO as a wake-up source. + * Set interrupt number "irq" in the GPIO as a wake-up source.
+ * While system is running, all registered GPIO interrupts need to have + * While system is running, all registered GPIO interrupts need to have
+ * wake-up enabled. When system is suspended, only selected GPIO interrupts + * wake-up enabled. When system is suspended, only selected GPIO interrupts
@ -48,10 +47,11 @@
+ return 0; + return 0;
+} +}
+ +
/* +/*
* Functions implementing the pwm_chip methods * Functions implementing the pwm_chip methods
*/ */
@@ -1211,7 +1239,7 @@ static int mvebu_gpio_probe(struct platform_device *pdev) static struct mvebu_pwm *to_mvebu_pwm(struct pwm_chip *chip)
@@ -1211,7 +1239,7 @@ static int mvebu_gpio_probe(struct platf
err = irq_alloc_domain_generic_chips( err = irq_alloc_domain_generic_chips(
mvchip->domain, ngpios, 2, np->name, handle_level_irq, mvchip->domain, ngpios, 2, np->name, handle_level_irq,
@ -60,7 +60,7 @@
if (err) { if (err) {
dev_err(&pdev->dev, "couldn't allocate irq chips %s (DT).\n", dev_err(&pdev->dev, "couldn't allocate irq chips %s (DT).\n",
mvchip->chip.label); mvchip->chip.label);
@@ -1229,6 +1257,8 @@ static int mvebu_gpio_probe(struct platform_device *pdev) @@ -1229,6 +1257,8 @@ static int mvebu_gpio_probe(struct platf
ct->chip.irq_mask = mvebu_gpio_level_irq_mask; ct->chip.irq_mask = mvebu_gpio_level_irq_mask;
ct->chip.irq_unmask = mvebu_gpio_level_irq_unmask; ct->chip.irq_unmask = mvebu_gpio_level_irq_unmask;
ct->chip.irq_set_type = mvebu_gpio_irq_set_type; ct->chip.irq_set_type = mvebu_gpio_irq_set_type;
@ -69,7 +69,7 @@
ct->chip.name = mvchip->chip.label; ct->chip.name = mvchip->chip.label;
ct = &gc->chip_types[1]; ct = &gc->chip_types[1];
@@ -1237,6 +1267,8 @@ static int mvebu_gpio_probe(struct platform_device *pdev) @@ -1237,6 +1267,8 @@ static int mvebu_gpio_probe(struct platf
ct->chip.irq_mask = mvebu_gpio_edge_irq_mask; ct->chip.irq_mask = mvebu_gpio_edge_irq_mask;
ct->chip.irq_unmask = mvebu_gpio_edge_irq_unmask; ct->chip.irq_unmask = mvebu_gpio_edge_irq_unmask;
ct->chip.irq_set_type = mvebu_gpio_irq_set_type; ct->chip.irq_set_type = mvebu_gpio_irq_set_type;
@ -78,7 +78,7 @@
ct->handler = handle_edge_irq; ct->handler = handle_edge_irq;
ct->chip.name = mvchip->chip.label; ct->chip.name = mvchip->chip.label;
@@ -1252,6 +1284,7 @@ static int mvebu_gpio_probe(struct platform_device *pdev) @@ -1252,6 +1284,7 @@ static int mvebu_gpio_probe(struct platf
continue; continue;
irq_set_chained_handler_and_data(irq, mvebu_gpio_irq_handler, irq_set_chained_handler_and_data(irq, mvebu_gpio_irq_handler,
mvchip); mvchip);

6
patch/kernel/mvebu-current/92-mvebu-gpio-remove-hardcoded-timer-assignment-2.patch
View file

@ -1,6 +1,6 @@
--- a/drivers/gpio/gpio-mvebu.c --- a/drivers/gpio/gpio-mvebu.c
+++ b/drivers/gpio/gpio-mvebu.c +++ b/drivers/gpio/gpio-mvebu.c
@@ -662,39 +662,81 @@ static int mvebu_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm) @@ -641,39 +641,81 @@ static int mvebu_pwm_request(struct pwm_
struct mvebu_pwm *mvpwm = to_mvebu_pwm(chip); struct mvebu_pwm *mvpwm = to_mvebu_pwm(chip);
struct mvebu_gpio_chip *mvchip = mvpwm->mvchip; struct mvebu_gpio_chip *mvchip = mvpwm->mvchip;
struct gpio_desc *desc; struct gpio_desc *desc;
@ -97,7 +97,7 @@
} }
static void mvebu_pwm_get_state(struct pwm_chip *chip, static void mvebu_pwm_get_state(struct pwm_chip *chip,
@@ -749,13 +791,15 @@ static void mvebu_pwm_get_state(struct pwm_chip *chip, @@ -721,19 +763,21 @@ static void mvebu_pwm_get_state(struct p
else else
state->enabled = false; state->enabled = false;
@ -114,8 +114,6 @@
struct mvebu_gpio_chip *mvchip = mvpwm->mvchip; struct mvebu_gpio_chip *mvchip = mvpwm->mvchip;
unsigned long long val; unsigned long long val;
unsigned long flags; unsigned long flags;
@@ -761,7 +805,7 @@ static int mvebu_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
unsigned long flags;
unsigned int on, off; unsigned int on, off;
- val = (unsigned long long) mvpwm->clk_rate * state->duty_cycle; - val = (unsigned long long) mvpwm->clk_rate * state->duty_cycle;

31
patch/kernel/mvebu-current/92-mvebu-gpio-remove-hardcoded-timer-assignment.patch
View file

@ -46,7 +46,7 @@
struct mvebu_gpio_chip { struct mvebu_gpio_chip {
struct gpio_chip chip; struct gpio_chip chip;
struct regmap *regs; struct regmap *regs;
@@ -283,12 +304,12 @@ mvebu_gpio_write_level_mask(struct mvebu_gpio_chip *mvchip, u32 val) @@ -283,12 +304,12 @@ mvebu_gpio_write_level_mask(struct mvebu
* Functions returning addresses of individual registers for a given * Functions returning addresses of individual registers for a given
* PWM controller. * PWM controller.
*/ */
@ -61,7 +61,7 @@
{ {
return mvpwm->membase + PWM_BLINK_OFF_DURATION_OFF; return mvpwm->membase + PWM_BLINK_OFF_DURATION_OFF;
} }
@@ -681,17 +702,24 @@ static void mvebu_pwm_get_state(struct pwm_chip *chip, @@ -723,17 +744,24 @@ static void mvebu_pwm_get_state(struct p
struct pwm_state *state) { struct pwm_state *state) {
struct mvebu_pwm *mvpwm = to_mvebu_pwm(chip); struct mvebu_pwm *mvpwm = to_mvebu_pwm(chip);
@ -89,7 +89,7 @@
if (val > UINT_MAX) if (val > UINT_MAX)
state->duty_cycle = UINT_MAX; state->duty_cycle = UINT_MAX;
else if (val) else if (val)
@@ -700,9 +728,9 @@ static void mvebu_pwm_get_state(struct pwm_chip *chip, @@ -742,9 +770,9 @@ static void mvebu_pwm_get_state(struct p
state->duty_cycle = 1; state->duty_cycle = 1;
val = (unsigned long long) val = (unsigned long long)
@ -101,7 +101,7 @@
if (val < state->duty_cycle) { if (val < state->duty_cycle) {
state->period = 1; state->period = 1;
} else { } else {
@@ -742,7 +770,7 @@ static int mvebu_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, @@ -786,7 +814,7 @@ static int mvebu_pwm_apply(struct pwm_ch
else else
on = 1; on = 1;
@ -110,7 +110,7 @@
(state->period - state->duty_cycle); (state->period - state->duty_cycle);
do_div(val, NSEC_PER_SEC); do_div(val, NSEC_PER_SEC);
if (val > UINT_MAX) if (val > UINT_MAX)
@@ -752,16 +780,16 @@ static int mvebu_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, @@ -796,16 +824,16 @@ static int mvebu_pwm_apply(struct pwm_ch
else else
off = 1; off = 1;
@ -131,7 +131,7 @@
return 0; return 0;
} }
@@ -780,10 +808,10 @@ static void __maybe_unused mvebu_pwm_suspend(struct mvebu_gpio_chip *mvchip) @@ -824,10 +852,10 @@ static void __maybe_unused mvebu_pwm_sus
regmap_read(mvchip->regs, GPIO_BLINK_CNT_SELECT_OFF + mvchip->offset, regmap_read(mvchip->regs, GPIO_BLINK_CNT_SELECT_OFF + mvchip->offset,
&mvpwm->blink_select); &mvpwm->blink_select);
@ -146,7 +146,7 @@
} }
static void __maybe_unused mvebu_pwm_resume(struct mvebu_gpio_chip *mvchip) static void __maybe_unused mvebu_pwm_resume(struct mvebu_gpio_chip *mvchip)
@@ -792,10 +820,10 @@ static void __maybe_unused mvebu_pwm_resume(struct mvebu_gpio_chip *mvchip) @@ -836,10 +864,10 @@ static void __maybe_unused mvebu_pwm_res
regmap_write(mvchip->regs, GPIO_BLINK_CNT_SELECT_OFF + mvchip->offset, regmap_write(mvchip->regs, GPIO_BLINK_CNT_SELECT_OFF + mvchip->offset,
mvpwm->blink_select); mvpwm->blink_select);
@ -161,7 +161,7 @@
} }
static int mvebu_pwm_probe(struct platform_device *pdev, static int mvebu_pwm_probe(struct platform_device *pdev,
@@ -805,6 +833,7 @@ static int mvebu_pwm_probe(struct platform_device *pdev, @@ -849,6 +877,7 @@ static int mvebu_pwm_probe(struct platfo
struct device *dev = &pdev->dev; struct device *dev = &pdev->dev;
struct mvebu_pwm *mvpwm; struct mvebu_pwm *mvpwm;
u32 set; u32 set;
@ -169,7 +169,7 @@
if (!of_device_is_compatible(mvchip->chip.of_node, if (!of_device_is_compatible(mvchip->chip.of_node,
"marvell,armada-370-gpio")) "marvell,armada-370-gpio"))
@@ -826,12 +855,15 @@ static int mvebu_pwm_probe(struct platform_device *pdev, @@ -870,12 +899,15 @@ static int mvebu_pwm_probe(struct platfo
* Use set A for lines of GPIO chip with id 0, B for GPIO chip * Use set A for lines of GPIO chip with id 0, B for GPIO chip
* with id 1. Don't allow further GPIO chips to be used for PWM. * with id 1. Don't allow further GPIO chips to be used for PWM.
*/ */
@ -188,20 +188,21 @@
regmap_write(mvchip->regs, regmap_write(mvchip->regs,
GPIO_BLINK_CNT_SELECT_OFF + mvchip->offset, set); GPIO_BLINK_CNT_SELECT_OFF + mvchip->offset, set);
@@ -841,15 +873,13 @@ static int mvebu_pwm_probe(struct platform_device *pdev, @@ -885,15 +917,13 @@ static int mvebu_pwm_probe(struct platfo
mvchip->mvpwm = mvpwm; mvchip->mvpwm = mvpwm;
mvpwm->mvchip = mvchip; mvpwm->mvchip = mvchip;
- mvpwm->membase = devm_platform_ioremap_resource_byname(pdev, "pwm"); - mvpwm->membase = devm_platform_ioremap_resource_byname(pdev, "pwm");
- if (IS_ERR(mvpwm->membase)) - if (IS_ERR(mvpwm->membase))
- return PTR_ERR(mvpwm->membase); - return PTR_ERR(mvpwm->membase);
+ mvpwm->controller.membase = devm_platform_ioremap_resource_byname(pdev, "pwm"); -
+ if (IS_ERR(mvpwm->controller.membase))
+ return PTR_ERR(mvpwm->controller.membase);
- mvpwm->clk_rate = clk_get_rate(mvchip->clk); - mvpwm->clk_rate = clk_get_rate(mvchip->clk);
- if (!mvpwm->clk_rate) { - if (!mvpwm->clk_rate) {
- dev_err(dev, "failed to get clock rate\n"); - dev_err(dev, "failed to get clock rate\n");
+ mvpwm->controller.membase = devm_platform_ioremap_resource_byname(pdev, "pwm");
+ if (IS_ERR(mvpwm->controller.membase))
+ return PTR_ERR(mvpwm->controller.membase);
+
+ mvpwm->controller.clk_rate = clk_get_rate(mvchip->clk); + mvpwm->controller.clk_rate = clk_get_rate(mvchip->clk);
+ if (!mvpwm->controller.clk_rate) + if (!mvpwm->controller.clk_rate)
return -EINVAL; return -EINVAL;
@ -209,7 +210,7 @@
mvpwm->chip.dev = dev; mvpwm->chip.dev = dev;
mvpwm->chip.ops = &mvebu_pwm_ops; mvpwm->chip.ops = &mvebu_pwm_ops;
@@ -862,7 +892,9 @@ static int mvebu_pwm_probe(struct platform_device *pdev, @@ -906,7 +936,9 @@ static int mvebu_pwm_probe(struct platfo
*/ */
mvpwm->chip.base = -1; mvpwm->chip.base = -1;

2
patch/kernel/mvebu-current/94-helios4-dts-add-wake-on-lan-support.patch
View file

@ -1,6 +1,6 @@
--- a/arch/arm/boot/dts/armada-388-helios4.dts --- a/arch/arm/boot/dts/armada-388-helios4.dts
+++ b/arch/arm/boot/dts/armada-388-helios4.dts +++ b/arch/arm/boot/dts/armada-388-helios4.dts
@@ -96,6 +96,18 @@ @@ -84,6 +84,18 @@
}; };
}; };

8
patch/kernel/mvebu-current/95-helios4-dts-assign-pinctrl-to-fan-and-led.patch
View file

@ -1,6 +1,6 @@
--- a/arch/arm/boot/dts/armada-388-helios4.dts --- a/arch/arm/boot/dts/armada-388-helios4.dts
+++ b/arch/arm/boot/dts/armada-388-helios4.dts +++ b/arch/arm/boot/dts/armada-388-helios4.dts
@@ -70,6 +70,9 @@ reg_5p0v_usb: regulator-5v-usb { @@ -70,6 +70,9 @@
system-leds { system-leds {
compatible = "gpio-leds"; compatible = "gpio-leds";
@ -10,7 +10,7 @@
status-led { status-led {
label = "helios4:green:status"; label = "helios4:green:status";
gpios = <&gpio0 24 GPIO_ACTIVE_LOW>; gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
@@ -110,6 +113,9 @@ wol { @@ -98,6 +101,9 @@
io-leds { io-leds {
compatible = "gpio-leds"; compatible = "gpio-leds";
@ -20,7 +20,7 @@
sata1-led { sata1-led {
label = "helios4:green:ata1"; label = "helios4:green:ata1";
gpios = <&gpio1 17 GPIO_ACTIVE_LOW>; gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
@@ -145,11 +151,15 @@ usb-led { @@ -133,11 +139,15 @@
fan1: j10-pwm { fan1: j10-pwm {
compatible = "pwm-fan"; compatible = "pwm-fan";
pwms = <&gpio1 9 40000>; /* Target freq:25 kHz */ pwms = <&gpio1 9 40000>; /* Target freq:25 kHz */
@ -36,7 +36,7 @@
}; };
usb2_phy: usb2-phy { usb2_phy: usb2-phy {
@@ -310,16 +320,23 @@ helios_sdhci_pins: helios-sdhci-pins { @@ -298,16 +308,23 @@
"mpp39", "mpp40"; "mpp39", "mpp40";
marvell,function = "sd0"; marvell,function = "sd0";
}; };

2
patch/kernel/mvebu-current/general-increasing_DMA_block_memory_allocation_to_2048.patch
View file

@ -1,6 +1,6 @@
--- a/arch/arm/mm/dma-mapping.c --- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c +++ b/arch/arm/mm/dma-mapping.c
@@ -314,7 +314,7 @@ static void *__alloc_remap_buffer(struct device *dev, size_t size, gfp_t gfp, @@ -314,7 +314,7 @@ static void *__alloc_remap_buffer(struct
pgprot_t prot, struct page **ret_page, pgprot_t prot, struct page **ret_page,
const void *caller, bool want_vaddr); const void *caller, bool want_vaddr);

8
patch/kernel/mvebu-current/omit_VFP_emulation_exceptions_kernel_mode.patch
View file

@ -32,8 +32,6 @@ Reviewed-by: Linus Walleij <(address hidden)>
Reviewed-by: Nick Desaulniers <(address hidden)> Reviewed-by: Nick Desaulniers <(address hidden)>
--- ---
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index c4220f51fcf3..0ea8529a4872 100644
--- a/arch/arm/kernel/entry-armv.S --- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S +++ b/arch/arm/kernel/entry-armv.S
@@ -252,31 +252,10 @@ __und_svc: @@ -252,31 +252,10 @@ __und_svc:
@ -70,8 +68,6 @@ index c4220f51fcf3..0ea8529a4872 100644
mov r0, sp @ struct pt_regs *regs mov r0, sp @ struct pt_regs *regs
bl __und_fault bl __und_fault
diff --git a/arch/arm/vfp/vfphw.S b/arch/arm/vfp/vfphw.S
index 4fcff9f59947..d5837bf05a9a 100644
--- a/arch/arm/vfp/vfphw.S --- a/arch/arm/vfp/vfphw.S
+++ b/arch/arm/vfp/vfphw.S +++ b/arch/arm/vfp/vfphw.S
@@ -79,11 +79,6 @@ ENTRY(vfp_support_entry) @@ -79,11 +79,6 @@ ENTRY(vfp_support_entry)
@ -86,8 +82,6 @@ index 4fcff9f59947..d5837bf05a9a 100644
VFPFMRX r1, FPEXC @ Is the VFP enabled? VFPFMRX r1, FPEXC @ Is the VFP enabled?
DBGSTR1 "fpexc %08x", r1 DBGSTR1 "fpexc %08x", r1
tst r1, #FPEXC_EN tst r1, #FPEXC_EN
diff --git a/arch/arm/vfp/vfpmodule.c b/arch/arm/vfp/vfpmodule.c
index 8c9e7f9f0277..c3b6451c18bd 100644
--- a/arch/arm/vfp/vfpmodule.c --- a/arch/arm/vfp/vfpmodule.c
+++ b/arch/arm/vfp/vfpmodule.c +++ b/arch/arm/vfp/vfpmodule.c
@@ -23,6 +23,7 @@ @@ -23,6 +23,7 @@
@ -98,7 +92,7 @@ index 8c9e7f9f0277..c3b6451c18bd 100644
#include <asm/vfp.h> #include <asm/vfp.h>
#include "vfpinstr.h" #include "vfpinstr.h"
@@ -642,7 +643,9 @@ static int vfp_starting_cpu(unsigned int unused) @@ -642,7 +643,9 @@ static int vfp_starting_cpu(unsigned int
return 0; return 0;
} }

12
patch/kernel/mvebu-current/unlock_atheros_regulatory_restrictions.patch
View file

@ -1,6 +1,6 @@
--- a/drivers/net/wireless/ath/regd.c --- a/drivers/net/wireless/ath/regd.c
+++ b/drivers/net/wireless/ath/regd.c +++ b/drivers/net/wireless/ath/regd.c
@@ -50,12 +50,9 @@ static int __ath_regd_init(struct ath_regulatory *reg); @@ -50,12 +50,9 @@ static int __ath_regd_init(struct ath_re
#define ATH_5GHZ_5725_5850 REG_RULE(5725-10, 5850+10, 80, 0, 30,\ #define ATH_5GHZ_5725_5850 REG_RULE(5725-10, 5850+10, 80, 0, 30,\
NL80211_RRF_NO_IR) NL80211_RRF_NO_IR)
@ -15,7 +15,7 @@
/* This one skips what we call "mid band" */ /* This one skips what we call "mid band" */
#define ATH_5GHZ_NO_MIDBAND ATH_5GHZ_5150_5350, \ #define ATH_5GHZ_NO_MIDBAND ATH_5GHZ_5150_5350, \
@@ -77,9 +74,8 @@ static const struct ieee80211_regdomain ath_world_regdom_63_65 = { @@ -77,9 +74,8 @@ static const struct ieee80211_regdomain
.n_reg_rules = 4, .n_reg_rules = 4,
.alpha2 = "99", .alpha2 = "99",
.reg_rules = { .reg_rules = {
@ -27,7 +27,7 @@
} }
}; };
@@ -88,8 +84,8 @@ static const struct ieee80211_regdomain ath_world_regdom_64 = { @@ -88,8 +84,8 @@ static const struct ieee80211_regdomain
.n_reg_rules = 3, .n_reg_rules = 3,
.alpha2 = "99", .alpha2 = "99",
.reg_rules = { .reg_rules = {
@ -38,7 +38,7 @@
} }
}; };
@@ -98,7 +94,7 @@ static const struct ieee80211_regdomain ath_world_regdom_66_69 = { @@ -98,7 +94,7 @@ static const struct ieee80211_regdomain
.n_reg_rules = 3, .n_reg_rules = 3,
.alpha2 = "99", .alpha2 = "99",
.reg_rules = { .reg_rules = {
@ -47,7 +47,7 @@
ATH_5GHZ_ALL, ATH_5GHZ_ALL,
} }
}; };
@@ -108,8 +104,7 @@ static const struct ieee80211_regdomain ath_world_regdom_67_68_6A_6C = { @@ -108,8 +104,7 @@ static const struct ieee80211_regdomain
.n_reg_rules = 4, .n_reg_rules = 4,
.alpha2 = "99", .alpha2 = "99",
.reg_rules = { .reg_rules = {
@ -57,7 +57,7 @@
ATH_5GHZ_ALL, ATH_5GHZ_ALL,
} }
}; };
@@ -258,9 +253,7 @@ static bool ath_is_radar_freq(u16 center_freq, @@ -258,9 +253,7 @@ static bool ath_is_radar_freq(u16 center
struct ath_regulatory *reg) struct ath_regulatory *reg)
{ {

5
patch/kernel/mvebu-current/use-1000BaseX-clearfog-switch.patch
View file

@ -11,8 +11,6 @@ Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
arch/arm/boot/dts/armada-388-clearfog.dts | 10 ++-------- arch/arm/boot/dts/armada-388-clearfog.dts | 10 ++--------
1 file changed, 2 insertions(+), 8 deletions(-) 1 file changed, 2 insertions(+), 8 deletions(-)
diff --git a/arch/arm/boot/dts/armada-388-clearfog.dts b/arch/arm/boot/dts/armada-388-clearfog.dts
index 441958a39991..4fdfff9acf05 100644
--- a/arch/arm/boot/dts/armada-388-clearfog.dts --- a/arch/arm/boot/dts/armada-388-clearfog.dts
+++ b/arch/arm/boot/dts/armada-388-clearfog.dts +++ b/arch/arm/boot/dts/armada-388-clearfog.dts
@@ -47,10 +47,8 @@ @@ -47,10 +47,8 @@
@ -39,6 +37,3 @@ index 441958a39991..4fdfff9acf05 100644
}; };
port@6 { port@6 {
--
cgit v1.2.1

7
patch/kernel/mvebu-dev/0001-cpuidle-mvebu-indicate-failure-to-enter-deeper-sleep.patch
View file

@ -25,11 +25,9 @@ Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
drivers/cpuidle/cpuidle-mvebu-v7.c | 6 +++++- drivers/cpuidle/cpuidle-mvebu-v7.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-) 1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/cpuidle/cpuidle-mvebu-v7.c b/drivers/cpuidle/cpuidle-mvebu-v7.c
index 01a856971f05..18ded9e7cb34 100644
--- a/drivers/cpuidle/cpuidle-mvebu-v7.c --- a/drivers/cpuidle/cpuidle-mvebu-v7.c
+++ b/drivers/cpuidle/cpuidle-mvebu-v7.c +++ b/drivers/cpuidle/cpuidle-mvebu-v7.c
@@ -39,8 +39,12 @@ static int mvebu_v7_enter_idle(struct cpuidle_device *dev, @@ -39,8 +39,12 @@ static int mvebu_v7_enter_idle(struct cp
ret = mvebu_v7_cpu_suspend(deepidle); ret = mvebu_v7_cpu_suspend(deepidle);
cpu_pm_exit(); cpu_pm_exit();
@ -43,6 +41,3 @@ index 01a856971f05..18ded9e7cb34 100644
return index; return index;
} }
--
2.1.0

145
patch/kernel/mvebu-dev/40-pci-add-irq-change-handler-sspl.patch
View file

@ -12,11 +12,9 @@ Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
drivers/pci/pcie/portdrv_core.c | 2 + drivers/pci/pcie/portdrv_core.c | 2 +
5 files changed, 180 insertions(+), 34 deletions(-) 5 files changed, 180 insertions(+), 34 deletions(-)
diff --git a/drivers/pci/controller/pci-mvebu.c b/drivers/pci/controller/pci-mvebu.c
index c39978b750ec..b4fb20835573 100644
--- a/drivers/pci/controller/pci-mvebu.c --- a/drivers/pci/controller/pci-mvebu.c
+++ b/drivers/pci/controller/pci-mvebu.c +++ b/drivers/pci/controller/pci-mvebu.c
@@ -53,7 +53,14 @@ @@ -53,13 +53,26 @@
PCIE_CONF_ADDR_EN) PCIE_CONF_ADDR_EN)
#define PCIE_CONF_DATA_OFF 0x18fc #define PCIE_CONF_DATA_OFF 0x18fc
#define PCIE_MASK_OFF 0x1910 #define PCIE_MASK_OFF 0x1910
@ -31,7 +29,19 @@ index c39978b750ec..b4fb20835573 100644
#define PCIE_CTRL_OFF 0x1a00 #define PCIE_CTRL_OFF 0x1a00
#define PCIE_CTRL_X1_MODE 0x0001 #define PCIE_CTRL_X1_MODE 0x0001
#define PCIE_STAT_OFF 0x1a04 #define PCIE_STAT_OFF 0x1a04
@@ -432,6 +439,54 @@ static void mvebu_pcie_handle_membase_change(struct mvebu_pcie_port *port) #define PCIE_STAT_BUS 0xff00
#define PCIE_STAT_DEV 0x1f0000
#define PCIE_STAT_LINK_DOWN BIT(0)
+#define PCIE_SSPL 0x1a0c
+#define PCIE_SSPL_MSGEN BIT(14)
+#define PCIE_SSPL_SPLS(x) (((x) & 3) << 8)
+#define PCIE_SSPL_SPLS_VAL(x) (((x) >> 8) & 3)
+#define PCIE_SSPL_SPLV(x) ((x) & 0xff)
+#define PCIE_SSPL_SPLV_VAL(x) ((x) & 0xff)
#define PCIE_RC_RTSTA 0x1a14
#define PCIE_DEBUG_CTRL 0x1a60
#define PCIE_DEBUG_SOFT_RESET BIT(20)
@@ -432,6 +445,54 @@ static void mvebu_pcie_handle_membase_ch
&port->memwin); &port->memwin);
} }
@ -86,7 +96,22 @@ index c39978b750ec..b4fb20835573 100644
static pci_bridge_emul_read_status_t static pci_bridge_emul_read_status_t
mvebu_pci_bridge_emul_pcie_conf_read(struct pci_bridge_emul *bridge, mvebu_pci_bridge_emul_pcie_conf_read(struct pci_bridge_emul *bridge,
int reg, u32 *value) int reg, u32 *value)
@@ -477,6 +532,30 @@ mvebu_pci_bridge_emul_pcie_conf_read(struct pci_bridge_emul *bridge, @@ -462,6 +523,14 @@ mvebu_pci_bridge_emul_pcie_conf_read(str
*value = mvebu_readl(port, PCIE_CAP_PCIEXP + PCI_EXP_LNKCTL);
break;
+ case PCI_EXP_SLTCAP:
+ {
+ u32 tmp = mvebu_readl(port, PCIE_SSPL);
+ *value = PCIE_SSPL_SPLS_VAL(tmp) << 15 |
+ PCIE_SSPL_SPLV_VAL(tmp) << 7;
+ break;
+ }
+
case PCI_EXP_SLTCTL:
*value = PCI_EXP_SLTSTA_PDS << 16;
break;
@@ -477,6 +546,30 @@ mvebu_pci_bridge_emul_pcie_conf_read(str
return PCI_BRIDGE_EMUL_HANDLED; return PCI_BRIDGE_EMUL_HANDLED;
} }
@ -117,7 +142,7 @@ index c39978b750ec..b4fb20835573 100644
static void static void
mvebu_pci_bridge_emul_base_conf_write(struct pci_bridge_emul *bridge, mvebu_pci_bridge_emul_base_conf_write(struct pci_bridge_emul *bridge,
int reg, u32 old, u32 new, u32 mask) int reg, u32 old, u32 new, u32 mask)
@@ -494,7 +573,8 @@ mvebu_pci_bridge_emul_base_conf_write(struct pci_bridge_emul *bridge, @@ -494,7 +587,8 @@ mvebu_pci_bridge_emul_base_conf_write(st
mvebu_pcie_handle_iobase_change(port); mvebu_pcie_handle_iobase_change(port);
if ((old ^ new) & PCI_COMMAND_MEMORY) if ((old ^ new) & PCI_COMMAND_MEMORY)
mvebu_pcie_handle_membase_change(port); mvebu_pcie_handle_membase_change(port);
@ -127,7 +152,7 @@ index c39978b750ec..b4fb20835573 100644
break; break;
} }
@@ -517,6 +597,11 @@ mvebu_pci_bridge_emul_base_conf_write(struct pci_bridge_emul *bridge, @@ -517,6 +611,11 @@ mvebu_pci_bridge_emul_base_conf_write(st
mvebu_pcie_handle_iobase_change(port); mvebu_pcie_handle_iobase_change(port);
break; break;
@ -139,7 +164,7 @@ index c39978b750ec..b4fb20835573 100644
case PCI_PRIMARY_BUS: case PCI_PRIMARY_BUS:
mvebu_pcie_set_local_bus_nr(port, conf->secondary_bus); mvebu_pcie_set_local_bus_nr(port, conf->secondary_bus);
break; break;
@@ -534,6 +619,10 @@ mvebu_pci_bridge_emul_pcie_conf_write(struct pci_bridge_emul *bridge, @@ -534,6 +633,10 @@ mvebu_pci_bridge_emul_pcie_conf_write(st
switch (reg) { switch (reg) {
case PCI_EXP_DEVCTL: case PCI_EXP_DEVCTL:
@ -150,7 +175,19 @@ index c39978b750ec..b4fb20835573 100644
/* /*
* Armada370 data says these bits must always * Armada370 data says these bits must always
* be zero when in root complex mode. * be zero when in root complex mode.
@@ -559,6 +648,25 @@ mvebu_pci_bridge_emul_pcie_conf_write(struct pci_bridge_emul *bridge, @@ -556,9 +659,37 @@ mvebu_pci_bridge_emul_pcie_conf_write(st
mvebu_writel(port, new, PCIE_CAP_PCIEXP + PCI_EXP_LNKCTL);
break;
+ case PCI_EXP_SLTCAP:
+ {
+ u32 sspl = PCIE_SSPL_SPLV((new & PCI_EXP_SLTCAP_SPLV) >> 7) |
+ PCIE_SSPL_SPLS((new & PCI_EXP_SLTCAP_SPLS) >> 15) |
+ PCIE_SSPL_MSGEN;
+ mvebu_writel(port, sspl, PCIE_SSPL);
+ break;
+ }
+
case PCI_EXP_RTSTA: case PCI_EXP_RTSTA:
mvebu_writel(port, new, PCIE_RC_RTSTA); mvebu_writel(port, new, PCIE_RC_RTSTA);
break; break;
@ -176,7 +213,7 @@ index c39978b750ec..b4fb20835573 100644
} }
} }
@@ -566,6 +674,8 @@ static struct pci_bridge_emul_ops mvebu_pci_bridge_emul_ops = { @@ -566,6 +697,8 @@ static struct pci_bridge_emul_ops mvebu_
.write_base = mvebu_pci_bridge_emul_base_conf_write, .write_base = mvebu_pci_bridge_emul_base_conf_write,
.read_pcie = mvebu_pci_bridge_emul_pcie_conf_read, .read_pcie = mvebu_pci_bridge_emul_pcie_conf_read,
.write_pcie = mvebu_pci_bridge_emul_pcie_conf_write, .write_pcie = mvebu_pci_bridge_emul_pcie_conf_write,
@ -185,11 +222,9 @@ index c39978b750ec..b4fb20835573 100644
}; };
/* /*
diff --git a/drivers/pci/pci-bridge-emul.c b/drivers/pci/pci-bridge-emul.c
index ccf26d12ec61..c124b7ff1e22 100644
--- a/drivers/pci/pci-bridge-emul.c --- a/drivers/pci/pci-bridge-emul.c
+++ b/drivers/pci/pci-bridge-emul.c +++ b/drivers/pci/pci-bridge-emul.c
@@ -151,6 +151,7 @@ static const struct pci_bridge_reg_behavior pci_regs_behavior[] = { @@ -151,6 +151,7 @@ static const struct pci_bridge_reg_behav
.rw = (GENMASK(7, 0) | .rw = (GENMASK(7, 0) |
((PCI_BRIDGE_CTL_PARITY | ((PCI_BRIDGE_CTL_PARITY |
PCI_BRIDGE_CTL_SERR | PCI_BRIDGE_CTL_SERR |
@ -197,7 +232,7 @@ index ccf26d12ec61..c124b7ff1e22 100644
PCI_BRIDGE_CTL_ISA | PCI_BRIDGE_CTL_ISA |
PCI_BRIDGE_CTL_VGA | PCI_BRIDGE_CTL_VGA |
PCI_BRIDGE_CTL_MASTER_ABORT | PCI_BRIDGE_CTL_MASTER_ABORT |
@@ -264,6 +265,7 @@ int pci_bridge_emul_init(struct pci_bridge_emul *bridge, @@ -264,6 +265,7 @@ int pci_bridge_emul_init(struct pci_brid
bridge->conf.header_type = PCI_HEADER_TYPE_BRIDGE; bridge->conf.header_type = PCI_HEADER_TYPE_BRIDGE;
bridge->conf.cache_line_size = 0x10; bridge->conf.cache_line_size = 0x10;
bridge->conf.status = cpu_to_le16(PCI_STATUS_CAP_LIST); bridge->conf.status = cpu_to_le16(PCI_STATUS_CAP_LIST);
@ -205,7 +240,7 @@ index ccf26d12ec61..c124b7ff1e22 100644
bridge->pci_regs_behavior = kmemdup(pci_regs_behavior, bridge->pci_regs_behavior = kmemdup(pci_regs_behavior,
sizeof(pci_regs_behavior), sizeof(pci_regs_behavior),
GFP_KERNEL); GFP_KERNEL);
@@ -321,25 +323,26 @@ int pci_bridge_emul_conf_read(struct pci_bridge_emul *bridge, int where, @@ -321,25 +323,26 @@ int pci_bridge_emul_conf_read(struct pci
__le32 *cfgspace; __le32 *cfgspace;
const struct pci_bridge_reg_behavior *behavior; const struct pci_bridge_reg_behavior *behavior;
@ -244,7 +279,7 @@ index ccf26d12ec61..c124b7ff1e22 100644
} }
if (read_op) if (read_op)
@@ -347,15 +350,20 @@ int pci_bridge_emul_conf_read(struct pci_bridge_emul *bridge, int where, @@ -347,15 +350,20 @@ int pci_bridge_emul_conf_read(struct pci
else else
ret = PCI_BRIDGE_EMUL_NOT_HANDLED; ret = PCI_BRIDGE_EMUL_NOT_HANDLED;
@ -269,7 +304,7 @@ index ccf26d12ec61..c124b7ff1e22 100644
if (size == 1) if (size == 1)
*value = (*value >> (8 * (where & 3))) & 0xff; *value = (*value >> (8 * (where & 3))) & 0xff;
@@ -382,12 +390,6 @@ int pci_bridge_emul_conf_write(struct pci_bridge_emul *bridge, int where, @@ -382,12 +390,6 @@ int pci_bridge_emul_conf_write(struct pc
__le32 *cfgspace; __le32 *cfgspace;
const struct pci_bridge_reg_behavior *behavior; const struct pci_bridge_reg_behavior *behavior;
@ -282,7 +317,7 @@ index ccf26d12ec61..c124b7ff1e22 100644
shift = (where & 0x3) * 8; shift = (where & 0x3) * 8;
if (size == 4) if (size == 4)
@@ -403,27 +405,42 @@ int pci_bridge_emul_conf_write(struct pci_bridge_emul *bridge, int where, @@ -403,27 +405,42 @@ int pci_bridge_emul_conf_write(struct pc
if (ret != PCIBIOS_SUCCESSFUL) if (ret != PCIBIOS_SUCCESSFUL)
return ret; return ret;
@ -336,8 +371,6 @@ index ccf26d12ec61..c124b7ff1e22 100644
if (write_op) if (write_op)
write_op(bridge, reg, old, new, mask); write_op(bridge, reg, old, new, mask);
diff --git a/drivers/pci/pci-bridge-emul.h b/drivers/pci/pci-bridge-emul.h
index b31883022a8e..5f64560aaa26 100644
--- a/drivers/pci/pci-bridge-emul.h --- a/drivers/pci/pci-bridge-emul.h
+++ b/drivers/pci/pci-bridge-emul.h +++ b/drivers/pci/pci-bridge-emul.h
@@ -90,6 +90,14 @@ struct pci_bridge_emul_ops { @@ -90,6 +90,14 @@ struct pci_bridge_emul_ops {
@ -369,11 +402,9 @@ index b31883022a8e..5f64560aaa26 100644
}; };
struct pci_bridge_reg_behavior; struct pci_bridge_reg_behavior;
diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c
index 253c30cc1967..3edbe276e626 100644
--- a/drivers/pci/pcie/aspm.c --- a/drivers/pci/pcie/aspm.c
+++ b/drivers/pci/pcie/aspm.c +++ b/drivers/pci/pcie/aspm.c
@@ -576,6 +576,8 @@ static void pcie_aspm_cap_init(struct pcie_link_state *link, int blacklist) @@ -576,6 +576,8 @@ static void pcie_aspm_cap_init(struct pc
*/ */
pcie_get_aspm_reg(parent, &upreg); pcie_get_aspm_reg(parent, &upreg);
pcie_get_aspm_reg(child, &dwreg); pcie_get_aspm_reg(child, &dwreg);
@ -382,11 +413,9 @@ index 253c30cc1967..3edbe276e626 100644
/* /*
* Setup L0s state * Setup L0s state
diff --git a/drivers/pci/pcie/portdrv_core.c b/drivers/pci/pcie/portdrv_core.c
index 50a9522ab07d..105ebc7a7987 100644
--- a/drivers/pci/pcie/portdrv_core.c --- a/drivers/pci/pcie/portdrv_core.c
+++ b/drivers/pci/pcie/portdrv_core.c +++ b/drivers/pci/pcie/portdrv_core.c
@@ -325,6 +325,7 @@ int pcie_port_device_register(struct pci_dev *dev) @@ -325,6 +325,7 @@ int pcie_port_device_register(struct pci
/* Get and check PCI Express port services */ /* Get and check PCI Express port services */
capabilities = get_port_device_capability(dev); capabilities = get_port_device_capability(dev);
@ -394,7 +423,7 @@ index 50a9522ab07d..105ebc7a7987 100644
if (!capabilities) if (!capabilities)
return 0; return 0;
@@ -337,6 +338,7 @@ int pcie_port_device_register(struct pci_dev *dev) @@ -337,6 +338,7 @@ int pcie_port_device_register(struct pci
* if that is to be used. * if that is to be used.
*/ */
status = pcie_init_service_irqs(dev, irqs, capabilities); status = pcie_init_service_irqs(dev, irqs, capabilities);
@ -402,65 +431,3 @@ index 50a9522ab07d..105ebc7a7987 100644
if (status) { if (status) {
capabilities &= PCIE_PORT_SERVICE_HP; capabilities &= PCIE_PORT_SERVICE_HP;
if (!capabilities) if (!capabilities)
--
cgit v1.2.1
From 9b1aafd0f620776f8d15f3ee872d3d5a69a468db Mon Sep 17 00:00:00 2001
From: Russell King <rmk+kernel@arm.linux.org.uk>
Date: Tue, 29 Nov 2016 10:13:48 +0000
Subject: implement slot capabilities (SSPL)
---
drivers/pci/controller/pci-mvebu.c | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/drivers/pci/controller/pci-mvebu.c b/drivers/pci/controller/pci-mvebu.c
index b4fb20835573..060226d11588 100644
--- a/drivers/pci/controller/pci-mvebu.c
+++ b/drivers/pci/controller/pci-mvebu.c
@@ -67,6 +67,12 @@
#define PCIE_STAT_BUS 0xff00
#define PCIE_STAT_DEV 0x1f0000
#define PCIE_STAT_LINK_DOWN BIT(0)
+#define PCIE_SSPL 0x1a0c
+#define PCIE_SSPL_MSGEN BIT(14)
+#define PCIE_SSPL_SPLS(x) (((x) & 3) << 8)
+#define PCIE_SSPL_SPLS_VAL(x) (((x) >> 8) & 3)
+#define PCIE_SSPL_SPLV(x) ((x) & 0xff)
+#define PCIE_SSPL_SPLV_VAL(x) ((x) & 0xff)
#define PCIE_RC_RTSTA 0x1a14
#define PCIE_DEBUG_CTRL 0x1a60
#define PCIE_DEBUG_SOFT_RESET BIT(20)
@@ -517,6 +523,14 @@ mvebu_pci_bridge_emul_pcie_conf_read(struct pci_bridge_emul *bridge,
*value = mvebu_readl(port, PCIE_CAP_PCIEXP + PCI_EXP_LNKCTL);
break;
+ case PCI_EXP_SLTCAP:
+ {
+ u32 tmp = mvebu_readl(port, PCIE_SSPL);
+ *value = PCIE_SSPL_SPLS_VAL(tmp) << 15 |
+ PCIE_SSPL_SPLV_VAL(tmp) << 7;
+ break;
+ }
+
case PCI_EXP_SLTCTL:
*value = PCI_EXP_SLTSTA_PDS << 16;
break;
@@ -645,6 +659,15 @@ mvebu_pci_bridge_emul_pcie_conf_write(struct pci_bridge_emul *bridge,
mvebu_writel(port, new, PCIE_CAP_PCIEXP + PCI_EXP_LNKCTL);
break;
+ case PCI_EXP_SLTCAP:
+ {
+ u32 sspl = PCIE_SSPL_SPLV((new & PCI_EXP_SLTCAP_SPLV) >> 7) |
+ PCIE_SSPL_SPLS((new & PCI_EXP_SLTCAP_SPLS) >> 15) |
+ PCIE_SSPL_MSGEN;
+ mvebu_writel(port, sspl, PCIE_SSPL);
+ break;
+ }
+
case PCI_EXP_RTSTA:
mvebu_writel(port, new, PCIE_RC_RTSTA);
break;
--
cgit v1.2.1

6
patch/kernel/mvebu-dev/402-sfp-display-SFP-module-information.patch
View file

@ -7,7 +7,7 @@ Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
--- ---
--- a/drivers/net/phy/sfp.c --- a/drivers/net/phy/sfp.c
+++ b/drivers/net/phy/sfp.c +++ b/drivers/net/phy/sfp.c
@@ -531,6 +531,185 @@ static unsigned int sfp_check(void *buf, size_t len) @@ -531,6 +531,185 @@ static unsigned int sfp_check(void *buf,
return check; return check;
} }
@ -193,7 +193,7 @@ Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
/* hwmon */ /* hwmon */
#if IS_ENABLED(CONFIG_HWMON) #if IS_ENABLED(CONFIG_HWMON)
static umode_t sfp_hwmon_is_visible(const void *data, static umode_t sfp_hwmon_is_visible(const void *data,
@@ -1670,6 +1849,7 @@ static int sfp_sm_mod_probe(struct sfp *sfp) @@ -1670,6 +1849,7 @@ static int sfp_sm_mod_probe(struct sfp *
struct sfp_eeprom_id id; struct sfp_eeprom_id id;
bool cotsworks_sfbg; bool cotsworks_sfbg;
bool cotsworks; bool cotsworks;
@ -201,7 +201,7 @@ Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
u8 check; u8 check;
int ret; int ret;
@@ -1744,6 +1926,73 @@ static int sfp_sm_mod_probe(struct sfp *sfp) @@ -1744,6 +1924,73 @@ static int sfp_sm_mod_probe(struct sfp *
(int)sizeof(id.ext.vendor_sn), id.ext.vendor_sn, (int)sizeof(id.ext.vendor_sn), id.ext.vendor_sn,
(int)sizeof(id.ext.datecode), id.ext.datecode); (int)sizeof(id.ext.datecode), id.ext.datecode);

4
patch/kernel/mvebu-dev/91-01-libata-add-ledtrig-support.patch
View file

@ -106,11 +106,11 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
+ for (i = 0; i < host->n_ports; i++) { + for (i = 0; i < host->n_ports; i++) {
+ if (unlikely(!host->ports[i]->ledtrig)) + if (unlikely(!host->ports[i]->ledtrig))
+ continue; + continue;
+
+ snprintf(host->ports[i]->ledtrig_name, + snprintf(host->ports[i]->ledtrig_name,
+ sizeof(host->ports[i]->ledtrig_name), "ata%u", + sizeof(host->ports[i]->ledtrig_name), "ata%u",
+ host->ports[i]->print_id); + host->ports[i]->print_id);
+
+ host->ports[i]->ledtrig->name = host->ports[i]->ledtrig_name; + host->ports[i]->ledtrig->name = host->ports[i]->ledtrig_name;
+ +
+ if (led_trigger_register(host->ports[i]->ledtrig)) { + if (led_trigger_register(host->ports[i]->ledtrig)) {

9
patch/kernel/mvebu-dev/91-02-Enable-ATA-port-LED-trigger.patch
View file

@ -8,11 +8,9 @@ Subject: Enable ATA port LED trigger
arch/arm/mach-mvebu/Kconfig | 1 + arch/arm/mach-mvebu/Kconfig | 1 +
2 files changed, 2 insertions(+) 2 files changed, 2 insertions(+)
diff --git a/arch/arm/configs/mvebu_v7_defconfig b/arch/arm/configs/mvebu_v7_defconfig
index cf363ab..19449d3 100644
--- a/arch/arm/configs/mvebu_v7_defconfig --- a/arch/arm/configs/mvebu_v7_defconfig
+++ b/arch/arm/configs/mvebu_v7_defconfig +++ b/arch/arm/configs/mvebu_v7_defconfig
@@ -58,6 +58,7 @@ CONFIG_MTD_SPI_NOR=y @@ -58,6 +58,7 @@ CONFIG_MTD_UBI=y
CONFIG_EEPROM_AT24=y CONFIG_EEPROM_AT24=y
CONFIG_BLK_DEV_SD=y CONFIG_BLK_DEV_SD=y
CONFIG_ATA=y CONFIG_ATA=y
@ -20,8 +18,6 @@ index cf363ab..19449d3 100644
CONFIG_SATA_AHCI=y CONFIG_SATA_AHCI=y
CONFIG_AHCI_MVEBU=y CONFIG_AHCI_MVEBU=y
CONFIG_SATA_MV=y CONFIG_SATA_MV=y
diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
index 053ea9d..aa1f389 100644
--- a/arch/arm/mach-mvebu/Kconfig --- a/arch/arm/mach-mvebu/Kconfig
+++ b/arch/arm/mach-mvebu/Kconfig +++ b/arch/arm/mach-mvebu/Kconfig
@@ -56,6 +56,7 @@ config MACH_ARMADA_375 @@ -56,6 +56,7 @@ config MACH_ARMADA_375
@ -32,6 +28,3 @@ index 053ea9d..aa1f389 100644
select ARM_ERRATA_720789 select ARM_ERRATA_720789
select PL310_ERRATA_753970 select PL310_ERRATA_753970
select ARM_GIC select ARM_GIC
--
2.7.4

16
patch/kernel/mvebu-dev/92-mvebu-gpio-add_wake_on_gpio_support.patch
View file

@ -17,11 +17,10 @@
struct irq_domain *domain; struct irq_domain *domain;
int soc_variant; int soc_variant;
@@ -600,6 +601,33 @@ static void mvebu_gpio_irq_handler(struct irq_desc *desc) @@ -601,6 +602,33 @@ static void mvebu_gpio_irq_handler(struc
chained_irq_exit(chip, desc);
} }
+/* /*
+ * Set interrupt number "irq" in the GPIO as a wake-up source. + * Set interrupt number "irq" in the GPIO as a wake-up source.
+ * While system is running, all registered GPIO interrupts need to have + * While system is running, all registered GPIO interrupts need to have
+ * wake-up enabled. When system is suspended, only selected GPIO interrupts + * wake-up enabled. When system is suspended, only selected GPIO interrupts
@ -48,10 +47,11 @@
+ return 0; + return 0;
+} +}
+ +
/* +/*
* Functions implementing the pwm_chip methods * Functions implementing the pwm_chip methods
*/ */
@@ -1211,7 +1239,7 @@ static int mvebu_gpio_probe(struct platform_device *pdev) static struct mvebu_pwm *to_mvebu_pwm(struct pwm_chip *chip)
@@ -1211,7 +1239,7 @@ static int mvebu_gpio_probe(struct platf
err = irq_alloc_domain_generic_chips( err = irq_alloc_domain_generic_chips(
mvchip->domain, ngpios, 2, np->name, handle_level_irq, mvchip->domain, ngpios, 2, np->name, handle_level_irq,
@ -60,7 +60,7 @@
if (err) { if (err) {
dev_err(&pdev->dev, "couldn't allocate irq chips %s (DT).\n", dev_err(&pdev->dev, "couldn't allocate irq chips %s (DT).\n",
mvchip->chip.label); mvchip->chip.label);
@@ -1229,6 +1257,8 @@ static int mvebu_gpio_probe(struct platform_device *pdev) @@ -1229,6 +1257,8 @@ static int mvebu_gpio_probe(struct platf
ct->chip.irq_mask = mvebu_gpio_level_irq_mask; ct->chip.irq_mask = mvebu_gpio_level_irq_mask;
ct->chip.irq_unmask = mvebu_gpio_level_irq_unmask; ct->chip.irq_unmask = mvebu_gpio_level_irq_unmask;
ct->chip.irq_set_type = mvebu_gpio_irq_set_type; ct->chip.irq_set_type = mvebu_gpio_irq_set_type;
@ -69,7 +69,7 @@
ct->chip.name = mvchip->chip.label; ct->chip.name = mvchip->chip.label;
ct = &gc->chip_types[1]; ct = &gc->chip_types[1];
@@ -1237,6 +1267,8 @@ static int mvebu_gpio_probe(struct platform_device *pdev) @@ -1237,6 +1267,8 @@ static int mvebu_gpio_probe(struct platf
ct->chip.irq_mask = mvebu_gpio_edge_irq_mask; ct->chip.irq_mask = mvebu_gpio_edge_irq_mask;
ct->chip.irq_unmask = mvebu_gpio_edge_irq_unmask; ct->chip.irq_unmask = mvebu_gpio_edge_irq_unmask;
ct->chip.irq_set_type = mvebu_gpio_irq_set_type; ct->chip.irq_set_type = mvebu_gpio_irq_set_type;
@ -78,7 +78,7 @@
ct->handler = handle_edge_irq; ct->handler = handle_edge_irq;
ct->chip.name = mvchip->chip.label; ct->chip.name = mvchip->chip.label;
@@ -1252,6 +1284,7 @@ static int mvebu_gpio_probe(struct platform_device *pdev) @@ -1252,6 +1284,7 @@ static int mvebu_gpio_probe(struct platf
continue; continue;
irq_set_chained_handler_and_data(irq, mvebu_gpio_irq_handler, irq_set_chained_handler_and_data(irq, mvebu_gpio_irq_handler,
mvchip); mvchip);

6
patch/kernel/mvebu-dev/92-mvebu-gpio-remove-hardcoded-timer-assignment-2.patch
View file

@ -1,6 +1,6 @@
--- a/drivers/gpio/gpio-mvebu.c --- a/drivers/gpio/gpio-mvebu.c
+++ b/drivers/gpio/gpio-mvebu.c +++ b/drivers/gpio/gpio-mvebu.c
@@ -662,39 +662,81 @@ static int mvebu_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm) @@ -641,39 +641,81 @@ static int mvebu_pwm_request(struct pwm_
struct mvebu_pwm *mvpwm = to_mvebu_pwm(chip); struct mvebu_pwm *mvpwm = to_mvebu_pwm(chip);
struct mvebu_gpio_chip *mvchip = mvpwm->mvchip; struct mvebu_gpio_chip *mvchip = mvpwm->mvchip;
struct gpio_desc *desc; struct gpio_desc *desc;
@ -97,7 +97,7 @@
} }
static void mvebu_pwm_get_state(struct pwm_chip *chip, static void mvebu_pwm_get_state(struct pwm_chip *chip,
@@ -749,13 +791,15 @@ static void mvebu_pwm_get_state(struct pwm_chip *chip, @@ -721,19 +763,21 @@ static void mvebu_pwm_get_state(struct p
else else
state->enabled = false; state->enabled = false;
@ -114,8 +114,6 @@
struct mvebu_gpio_chip *mvchip = mvpwm->mvchip; struct mvebu_gpio_chip *mvchip = mvpwm->mvchip;
unsigned long long val; unsigned long long val;
unsigned long flags; unsigned long flags;
@@ -761,7 +805,7 @@ static int mvebu_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
unsigned long flags;
unsigned int on, off; unsigned int on, off;
- val = (unsigned long long) mvpwm->clk_rate * state->duty_cycle; - val = (unsigned long long) mvpwm->clk_rate * state->duty_cycle;

31
patch/kernel/mvebu-dev/92-mvebu-gpio-remove-hardcoded-timer-assignment.patch
View file

@ -46,7 +46,7 @@
struct mvebu_gpio_chip { struct mvebu_gpio_chip {
struct gpio_chip chip; struct gpio_chip chip;
struct regmap *regs; struct regmap *regs;
@@ -283,12 +304,12 @@ mvebu_gpio_write_level_mask(struct mvebu_gpio_chip *mvchip, u32 val) @@ -283,12 +304,12 @@ mvebu_gpio_write_level_mask(struct mvebu
* Functions returning addresses of individual registers for a given * Functions returning addresses of individual registers for a given
* PWM controller. * PWM controller.
*/ */
@ -61,7 +61,7 @@
{ {
return mvpwm->membase + PWM_BLINK_OFF_DURATION_OFF; return mvpwm->membase + PWM_BLINK_OFF_DURATION_OFF;
} }
@@ -681,17 +702,24 @@ static void mvebu_pwm_get_state(struct pwm_chip *chip, @@ -723,17 +744,24 @@ static void mvebu_pwm_get_state(struct p
struct pwm_state *state) { struct pwm_state *state) {
struct mvebu_pwm *mvpwm = to_mvebu_pwm(chip); struct mvebu_pwm *mvpwm = to_mvebu_pwm(chip);
@ -89,7 +89,7 @@
if (val > UINT_MAX) if (val > UINT_MAX)
state->duty_cycle = UINT_MAX; state->duty_cycle = UINT_MAX;
else if (val) else if (val)
@@ -700,9 +728,9 @@ static void mvebu_pwm_get_state(struct pwm_chip *chip, @@ -742,9 +770,9 @@ static void mvebu_pwm_get_state(struct p
state->duty_cycle = 1; state->duty_cycle = 1;
val = (unsigned long long) val = (unsigned long long)
@ -101,7 +101,7 @@
if (val < state->duty_cycle) { if (val < state->duty_cycle) {
state->period = 1; state->period = 1;
} else { } else {
@@ -742,7 +770,7 @@ static int mvebu_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, @@ -786,7 +814,7 @@ static int mvebu_pwm_apply(struct pwm_ch
else else
on = 1; on = 1;
@ -110,7 +110,7 @@
(state->period - state->duty_cycle); (state->period - state->duty_cycle);
do_div(val, NSEC_PER_SEC); do_div(val, NSEC_PER_SEC);
if (val > UINT_MAX) if (val > UINT_MAX)
@@ -752,16 +780,16 @@ static int mvebu_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, @@ -796,16 +824,16 @@ static int mvebu_pwm_apply(struct pwm_ch
else else
off = 1; off = 1;
@ -131,7 +131,7 @@
return 0; return 0;
} }
@@ -780,10 +808,10 @@ static void __maybe_unused mvebu_pwm_suspend(struct mvebu_gpio_chip *mvchip) @@ -824,10 +852,10 @@ static void __maybe_unused mvebu_pwm_sus
regmap_read(mvchip->regs, GPIO_BLINK_CNT_SELECT_OFF + mvchip->offset, regmap_read(mvchip->regs, GPIO_BLINK_CNT_SELECT_OFF + mvchip->offset,
&mvpwm->blink_select); &mvpwm->blink_select);
@ -146,7 +146,7 @@
} }
static void __maybe_unused mvebu_pwm_resume(struct mvebu_gpio_chip *mvchip) static void __maybe_unused mvebu_pwm_resume(struct mvebu_gpio_chip *mvchip)
@@ -792,10 +820,10 @@ static void __maybe_unused mvebu_pwm_resume(struct mvebu_gpio_chip *mvchip) @@ -836,10 +864,10 @@ static void __maybe_unused mvebu_pwm_res
regmap_write(mvchip->regs, GPIO_BLINK_CNT_SELECT_OFF + mvchip->offset, regmap_write(mvchip->regs, GPIO_BLINK_CNT_SELECT_OFF + mvchip->offset,
mvpwm->blink_select); mvpwm->blink_select);
@ -161,7 +161,7 @@
} }
static int mvebu_pwm_probe(struct platform_device *pdev, static int mvebu_pwm_probe(struct platform_device *pdev,
@@ -805,6 +833,7 @@ static int mvebu_pwm_probe(struct platform_device *pdev, @@ -849,6 +877,7 @@ static int mvebu_pwm_probe(struct platfo
struct device *dev = &pdev->dev; struct device *dev = &pdev->dev;
struct mvebu_pwm *mvpwm; struct mvebu_pwm *mvpwm;
u32 set; u32 set;
@ -169,7 +169,7 @@
if (!of_device_is_compatible(mvchip->chip.of_node, if (!of_device_is_compatible(mvchip->chip.of_node,
"marvell,armada-370-gpio")) "marvell,armada-370-gpio"))
@@ -826,12 +855,15 @@ static int mvebu_pwm_probe(struct platform_device *pdev, @@ -870,12 +899,15 @@ static int mvebu_pwm_probe(struct platfo
* Use set A for lines of GPIO chip with id 0, B for GPIO chip * Use set A for lines of GPIO chip with id 0, B for GPIO chip
* with id 1. Don't allow further GPIO chips to be used for PWM. * with id 1. Don't allow further GPIO chips to be used for PWM.
*/ */
@ -188,20 +188,21 @@
regmap_write(mvchip->regs, regmap_write(mvchip->regs,
GPIO_BLINK_CNT_SELECT_OFF + mvchip->offset, set); GPIO_BLINK_CNT_SELECT_OFF + mvchip->offset, set);
@@ -841,15 +873,13 @@ static int mvebu_pwm_probe(struct platform_device *pdev, @@ -885,15 +917,13 @@ static int mvebu_pwm_probe(struct platfo
mvchip->mvpwm = mvpwm; mvchip->mvpwm = mvpwm;
mvpwm->mvchip = mvchip; mvpwm->mvchip = mvchip;
- mvpwm->membase = devm_platform_ioremap_resource_byname(pdev, "pwm"); - mvpwm->membase = devm_platform_ioremap_resource_byname(pdev, "pwm");
- if (IS_ERR(mvpwm->membase)) - if (IS_ERR(mvpwm->membase))
- return PTR_ERR(mvpwm->membase); - return PTR_ERR(mvpwm->membase);
+ mvpwm->controller.membase = devm_platform_ioremap_resource_byname(pdev, "pwm"); -
+ if (IS_ERR(mvpwm->controller.membase))
+ return PTR_ERR(mvpwm->controller.membase);
- mvpwm->clk_rate = clk_get_rate(mvchip->clk); - mvpwm->clk_rate = clk_get_rate(mvchip->clk);
- if (!mvpwm->clk_rate) { - if (!mvpwm->clk_rate) {
- dev_err(dev, "failed to get clock rate\n"); - dev_err(dev, "failed to get clock rate\n");
+ mvpwm->controller.membase = devm_platform_ioremap_resource_byname(pdev, "pwm");
+ if (IS_ERR(mvpwm->controller.membase))
+ return PTR_ERR(mvpwm->controller.membase);
+
+ mvpwm->controller.clk_rate = clk_get_rate(mvchip->clk); + mvpwm->controller.clk_rate = clk_get_rate(mvchip->clk);
+ if (!mvpwm->controller.clk_rate) + if (!mvpwm->controller.clk_rate)
return -EINVAL; return -EINVAL;
@ -209,7 +210,7 @@
mvpwm->chip.dev = dev; mvpwm->chip.dev = dev;
mvpwm->chip.ops = &mvebu_pwm_ops; mvpwm->chip.ops = &mvebu_pwm_ops;
@@ -862,7 +892,9 @@ static int mvebu_pwm_probe(struct platform_device *pdev, @@ -906,7 +936,9 @@ static int mvebu_pwm_probe(struct platfo
*/ */
mvpwm->chip.base = -1; mvpwm->chip.base = -1;

2
patch/kernel/mvebu-dev/94-helios4-dts-add-wake-on-lan-support.patch
View file

@ -1,6 +1,6 @@
--- a/arch/arm/boot/dts/armada-388-helios4.dts --- a/arch/arm/boot/dts/armada-388-helios4.dts
+++ b/arch/arm/boot/dts/armada-388-helios4.dts +++ b/arch/arm/boot/dts/armada-388-helios4.dts
@@ -96,6 +96,18 @@ @@ -84,6 +84,18 @@
}; };
}; };

8
patch/kernel/mvebu-dev/95-helios4-dts-assign-pinctrl-to-fan-and-led.patch
View file

@ -1,6 +1,6 @@
--- a/arch/arm/boot/dts/armada-388-helios4.dts --- a/arch/arm/boot/dts/armada-388-helios4.dts
+++ b/arch/arm/boot/dts/armada-388-helios4.dts +++ b/arch/arm/boot/dts/armada-388-helios4.dts
@@ -70,6 +70,9 @@ reg_5p0v_usb: regulator-5v-usb { @@ -70,6 +70,9 @@
system-leds { system-leds {
compatible = "gpio-leds"; compatible = "gpio-leds";
@ -10,7 +10,7 @@
status-led { status-led {
label = "helios4:green:status"; label = "helios4:green:status";
gpios = <&gpio0 24 GPIO_ACTIVE_LOW>; gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
@@ -110,6 +113,9 @@ wol { @@ -98,6 +101,9 @@
io-leds { io-leds {
compatible = "gpio-leds"; compatible = "gpio-leds";
@ -20,7 +20,7 @@
sata1-led { sata1-led {
label = "helios4:green:ata1"; label = "helios4:green:ata1";
gpios = <&gpio1 17 GPIO_ACTIVE_LOW>; gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
@@ -145,11 +151,15 @@ usb-led { @@ -133,11 +139,15 @@
fan1: j10-pwm { fan1: j10-pwm {
compatible = "pwm-fan"; compatible = "pwm-fan";
pwms = <&gpio1 9 40000>; /* Target freq:25 kHz */ pwms = <&gpio1 9 40000>; /* Target freq:25 kHz */
@ -36,7 +36,7 @@
}; };
usb2_phy: usb2-phy { usb2_phy: usb2-phy {
@@ -310,16 +320,23 @@ helios_sdhci_pins: helios-sdhci-pins { @@ -298,16 +308,23 @@
"mpp39", "mpp40"; "mpp39", "mpp40";
marvell,function = "sd0"; marvell,function = "sd0";
}; };

2
patch/kernel/mvebu-dev/general-increasing_DMA_block_memory_allocation_to_2048.patch
View file

@ -1,6 +1,6 @@
--- a/arch/arm/mm/dma-mapping.c --- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c +++ b/arch/arm/mm/dma-mapping.c
@@ -314,7 +314,7 @@ static void *__alloc_remap_buffer(struct device *dev, size_t size, gfp_t gfp, @@ -314,7 +314,7 @@ static void *__alloc_remap_buffer(struct
pgprot_t prot, struct page **ret_page, pgprot_t prot, struct page **ret_page,
const void *caller, bool want_vaddr); const void *caller, bool want_vaddr);

8
patch/kernel/mvebu-dev/omit_VFP_emulation_exceptions_kernel_mode.patch
View file

@ -32,8 +32,6 @@ Reviewed-by: Linus Walleij <(address hidden)>
Reviewed-by: Nick Desaulniers <(address hidden)> Reviewed-by: Nick Desaulniers <(address hidden)>
--- ---
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index c4220f51fcf3..0ea8529a4872 100644
--- a/arch/arm/kernel/entry-armv.S --- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S +++ b/arch/arm/kernel/entry-armv.S
@@ -252,31 +252,10 @@ __und_svc: @@ -252,31 +252,10 @@ __und_svc:
@ -70,8 +68,6 @@ index c4220f51fcf3..0ea8529a4872 100644
mov r0, sp @ struct pt_regs *regs mov r0, sp @ struct pt_regs *regs
bl __und_fault bl __und_fault
diff --git a/arch/arm/vfp/vfphw.S b/arch/arm/vfp/vfphw.S
index 4fcff9f59947..d5837bf05a9a 100644
--- a/arch/arm/vfp/vfphw.S --- a/arch/arm/vfp/vfphw.S
+++ b/arch/arm/vfp/vfphw.S +++ b/arch/arm/vfp/vfphw.S
@@ -79,11 +79,6 @@ ENTRY(vfp_support_entry) @@ -79,11 +79,6 @@ ENTRY(vfp_support_entry)
@ -86,8 +82,6 @@ index 4fcff9f59947..d5837bf05a9a 100644
VFPFMRX r1, FPEXC @ Is the VFP enabled? VFPFMRX r1, FPEXC @ Is the VFP enabled?
DBGSTR1 "fpexc %08x", r1 DBGSTR1 "fpexc %08x", r1
tst r1, #FPEXC_EN tst r1, #FPEXC_EN
diff --git a/arch/arm/vfp/vfpmodule.c b/arch/arm/vfp/vfpmodule.c
index 8c9e7f9f0277..c3b6451c18bd 100644
--- a/arch/arm/vfp/vfpmodule.c --- a/arch/arm/vfp/vfpmodule.c
+++ b/arch/arm/vfp/vfpmodule.c +++ b/arch/arm/vfp/vfpmodule.c
@@ -23,6 +23,7 @@ @@ -23,6 +23,7 @@
@ -98,7 +92,7 @@ index 8c9e7f9f0277..c3b6451c18bd 100644
#include <asm/vfp.h> #include <asm/vfp.h>
#include "vfpinstr.h" #include "vfpinstr.h"
@@ -642,7 +643,9 @@ static int vfp_starting_cpu(unsigned int unused) @@ -642,7 +643,9 @@ static int vfp_starting_cpu(unsigned int
return 0; return 0;
} }

12
patch/kernel/mvebu-dev/unlock_atheros_regulatory_restrictions.patch
View file

@ -1,6 +1,6 @@
--- a/drivers/net/wireless/ath/regd.c --- a/drivers/net/wireless/ath/regd.c
+++ b/drivers/net/wireless/ath/regd.c +++ b/drivers/net/wireless/ath/regd.c
@@ -50,12 +50,9 @@ static int __ath_regd_init(struct ath_regulatory *reg); @@ -50,12 +50,9 @@ static int __ath_regd_init(struct ath_re
#define ATH_5GHZ_5725_5850 REG_RULE(5725-10, 5850+10, 80, 0, 30,\ #define ATH_5GHZ_5725_5850 REG_RULE(5725-10, 5850+10, 80, 0, 30,\
NL80211_RRF_NO_IR) NL80211_RRF_NO_IR)
@ -15,7 +15,7 @@
/* This one skips what we call "mid band" */ /* This one skips what we call "mid band" */
#define ATH_5GHZ_NO_MIDBAND ATH_5GHZ_5150_5350, \ #define ATH_5GHZ_NO_MIDBAND ATH_5GHZ_5150_5350, \
@@ -77,9 +74,8 @@ static const struct ieee80211_regdomain ath_world_regdom_63_65 = { @@ -77,9 +74,8 @@ static const struct ieee80211_regdomain
.n_reg_rules = 4, .n_reg_rules = 4,
.alpha2 = "99", .alpha2 = "99",
.reg_rules = { .reg_rules = {
@ -27,7 +27,7 @@
} }
}; };
@@ -88,8 +84,8 @@ static const struct ieee80211_regdomain ath_world_regdom_64 = { @@ -88,8 +84,8 @@ static const struct ieee80211_regdomain
.n_reg_rules = 3, .n_reg_rules = 3,
.alpha2 = "99", .alpha2 = "99",
.reg_rules = { .reg_rules = {
@ -38,7 +38,7 @@
} }
}; };
@@ -98,7 +94,7 @@ static const struct ieee80211_regdomain ath_world_regdom_66_69 = { @@ -98,7 +94,7 @@ static const struct ieee80211_regdomain
.n_reg_rules = 3, .n_reg_rules = 3,
.alpha2 = "99", .alpha2 = "99",
.reg_rules = { .reg_rules = {
@ -47,7 +47,7 @@
ATH_5GHZ_ALL, ATH_5GHZ_ALL,
} }
}; };
@@ -108,8 +104,7 @@ static const struct ieee80211_regdomain ath_world_regdom_67_68_6A_6C = { @@ -108,8 +104,7 @@ static const struct ieee80211_regdomain
.n_reg_rules = 4, .n_reg_rules = 4,
.alpha2 = "99", .alpha2 = "99",
.reg_rules = { .reg_rules = {
@ -57,7 +57,7 @@
ATH_5GHZ_ALL, ATH_5GHZ_ALL,
} }
}; };
@@ -258,9 +253,7 @@ static bool ath_is_radar_freq(u16 center_freq, @@ -258,9 +253,7 @@ static bool ath_is_radar_freq(u16 center
struct ath_regulatory *reg) struct ath_regulatory *reg)
{ {

5
patch/kernel/mvebu-dev/use-1000BaseX-clearfog-switch.patch
View file

@ -11,8 +11,6 @@ Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
arch/arm/boot/dts/armada-388-clearfog.dts | 10 ++-------- arch/arm/boot/dts/armada-388-clearfog.dts | 10 ++--------
1 file changed, 2 insertions(+), 8 deletions(-) 1 file changed, 2 insertions(+), 8 deletions(-)
diff --git a/arch/arm/boot/dts/armada-388-clearfog.dts b/arch/arm/boot/dts/armada-388-clearfog.dts
index 441958a39991..4fdfff9acf05 100644
--- a/arch/arm/boot/dts/armada-388-clearfog.dts --- a/arch/arm/boot/dts/armada-388-clearfog.dts
+++ b/arch/arm/boot/dts/armada-388-clearfog.dts +++ b/arch/arm/boot/dts/armada-388-clearfog.dts
@@ -47,10 +47,8 @@ @@ -47,10 +47,8 @@
@ -39,6 +37,3 @@ index 441958a39991..4fdfff9acf05 100644
}; };
port@6 { port@6 {
--
cgit v1.2.1

7
patch/kernel/mvebu-legacy/0001-cpuidle-mvebu-indicate-failure-to-enter-deeper-sleep.patch
View file

@ -25,11 +25,9 @@ Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
drivers/cpuidle/cpuidle-mvebu-v7.c | 6 +++++- drivers/cpuidle/cpuidle-mvebu-v7.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-) 1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/cpuidle/cpuidle-mvebu-v7.c b/drivers/cpuidle/cpuidle-mvebu-v7.c
index 01a856971f05..18ded9e7cb34 100644
--- a/drivers/cpuidle/cpuidle-mvebu-v7.c --- a/drivers/cpuidle/cpuidle-mvebu-v7.c
+++ b/drivers/cpuidle/cpuidle-mvebu-v7.c +++ b/drivers/cpuidle/cpuidle-mvebu-v7.c
@@ -39,8 +39,12 @@ static int mvebu_v7_enter_idle(struct cpuidle_device *dev, @@ -39,8 +39,12 @@ static int mvebu_v7_enter_idle(struct cp
ret = mvebu_v7_cpu_suspend(deepidle); ret = mvebu_v7_cpu_suspend(deepidle);
cpu_pm_exit(); cpu_pm_exit();
@ -43,6 +41,3 @@ index 01a856971f05..18ded9e7cb34 100644
return index; return index;
} }
--
2.1.0

11
patch/kernel/mvebu-legacy/0008-phy-marvell-88E1512-add-flow-control-support.patch
View file

@ -14,19 +14,14 @@ Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
drivers/net/phy/marvell.c | 2 +- drivers/net/phy/marvell.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-) 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c
index 5de8d5827536..9a5329bfd0fd 100644
--- a/drivers/net/phy/marvell.c --- a/drivers/net/phy/marvell.c
+++ b/drivers/net/phy/marvell.c +++ b/drivers/net/phy/marvell.c
@@ -1142,7 +1142,7 @@ static struct phy_driver marvell_drivers[] = { @@ -2245,7 +2245,7 @@ static struct phy_driver marvell_drivers
.phy_id = MARVELL_PHY_ID_88E1510, .phy_id = MARVELL_PHY_ID_88E1510,
.phy_id_mask = MARVELL_PHY_ID_MASK, .phy_id_mask = MARVELL_PHY_ID_MASK,
.name = "Marvell 88E1510", .name = "Marvell 88E1510",
- .features = PHY_GBIT_FEATURES | SUPPORTED_FIBRE, - .features = PHY_GBIT_FEATURES | SUPPORTED_FIBRE,
+ .features = PHY_GBIT_FEATURES | SUPPORTED_FIBRE | SUPPORTED_Pause, + .features = PHY_GBIT_FEATURES | SUPPORTED_FIBRE | SUPPORTED_Pause,
.flags = PHY_HAS_INTERRUPT, .flags = PHY_HAS_INTERRUPT,
.config_aneg = &m88e1510_config_aneg, .probe = &m88e1510_probe,
.read_status = &marvell_read_status, .config_init = &m88e1510_config_init,
--
2.1.0

54
patch/kernel/mvebu-legacy/0040-updates-pci.patch
View file

@ -1,8 +1,6 @@
diff --git a/drivers/pci/controller/pci-mvebu.c b/drivers/pci/controller/pci-mvebu.c
index 53b79c5..7980be0 100644
--- a/drivers/pci/controller/pci-mvebu.c --- a/drivers/pci/controller/pci-mvebu.c
+++ b/drivers/pci/controller/pci-mvebu.c +++ b/drivers/pci/controller/pci-mvebu.c
@@ -51,7 +51,14 @@ @@ -52,7 +52,14 @@
PCIE_CONF_ADDR_EN) PCIE_CONF_ADDR_EN)
#define PCIE_CONF_DATA_OFF 0x18fc #define PCIE_CONF_DATA_OFF 0x18fc
#define PCIE_MASK_OFF 0x1910 #define PCIE_MASK_OFF 0x1910
@ -17,10 +15,10 @@ index 53b79c5..7980be0 100644
#define PCIE_CTRL_OFF 0x1a00 #define PCIE_CTRL_OFF 0x1a00
#define PCIE_CTRL_X1_MODE 0x0001 #define PCIE_CTRL_X1_MODE 0x0001
#define PCIE_STAT_OFF 0x1a04 #define PCIE_STAT_OFF 0x1a04
@@ -455,6 +462,54 @@ static void mvebu_pcie_handle_membase_change(struct mvebu_pcie_port *port) @@ -476,6 +483,54 @@ static void mvebu_pcie_handle_membase_ch
MVEBU_MBUS_NO_REMAP); &port->memwin);
} }
+static void mvebu_pcie_handle_irq_change(struct mvebu_pcie_port *port) +static void mvebu_pcie_handle_irq_change(struct mvebu_pcie_port *port)
+{ +{
+ u32 reg, old; + u32 reg, old;
@ -72,27 +70,27 @@ index 53b79c5..7980be0 100644
/* /*
* Initialize the configuration space of the PCI-to-PCI bridge * Initialize the configuration space of the PCI-to-PCI bridge
* associated with the given PCIe interface. * associated with the given PCIe interface.
@@ -478,6 +533,7 @@ static void mvebu_sw_pci_bridge_init(struct mvebu_pcie_port *port) @@ -499,6 +554,7 @@ static void mvebu_sw_pci_bridge_init(str
/* Add capabilities */ /* Add capabilities */
bridge->status = PCI_STATUS_CAP_LIST; bridge->status = PCI_STATUS_CAP_LIST;
+ bridge->bridgectrl = PCI_BRIDGE_CTL_SERR; + bridge->bridgectrl = PCI_BRIDGE_CTL_SERR;
} }
/* /*
@@ -550,7 +606,7 @@ static int mvebu_sw_pci_bridge_read(struct mvebu_pcie_port *port, @@ -571,7 +627,7 @@ static int mvebu_sw_pci_bridge_read(stru
case PCI_INTERRUPT_LINE: case PCI_INTERRUPT_LINE:
/* LINE PIN MIN_GNT MAX_LAT */ /* LINE PIN MIN_GNT MAX_LAT */
- *value = 0; - *value = 0;
+ *value = bridge->bridgectrl << 16; + *value = bridge->bridgectrl << 16;
break; break;
case PCISWCAP_EXP_LIST_ID: case PCISWCAP_EXP_LIST_ID:
@@ -599,6 +655,16 @@ static int mvebu_sw_pci_bridge_read(struct mvebu_pcie_port *port, @@ -620,6 +676,16 @@ static int mvebu_sw_pci_bridge_read(stru
*value = mvebu_readl(port, PCIE_RC_RTSTA); *value = mvebu_readl(port, PCIE_RC_RTSTA);
break; break;
+ case 0x100 ... 0x128: + case 0x100 ... 0x128:
+ *value = mvebu_readl(port, where & ~3); + *value = mvebu_readl(port, where & ~3);
+ break; + break;
@ -106,26 +104,26 @@ index 53b79c5..7980be0 100644
/* PCIe requires the v2 fields to be hard-wired to zero */ /* PCIe requires the v2 fields to be hard-wired to zero */
case PCISWCAP_EXP_DEVCAP2: case PCISWCAP_EXP_DEVCAP2:
case PCISWCAP_EXP_DEVCTL2: case PCISWCAP_EXP_DEVCTL2:
@@ -629,7 +695,7 @@ static int mvebu_sw_pci_bridge_write(struct mvebu_pcie_port *port, @@ -650,7 +716,7 @@ static int mvebu_sw_pci_bridge_write(str
unsigned int where, int size, u32 value) unsigned int where, int size, u32 value)
{ {
struct mvebu_sw_pci_bridge *bridge = &port->bridge; struct mvebu_sw_pci_bridge *bridge = &port->bridge;
- u32 mask, reg; - u32 mask, reg;
+ u32 mask, reg, old; + u32 mask, reg, old;
int err; int err;
if (size == 4) if (size == 4)
@@ -649,8 +715,7 @@ static int mvebu_sw_pci_bridge_write(struct mvebu_pcie_port *port, @@ -670,8 +736,7 @@ static int mvebu_sw_pci_bridge_write(str
switch (where & ~3) { switch (where & ~3) {
case PCI_COMMAND: case PCI_COMMAND:
- { - {
- u32 old = bridge->command; - u32 old = bridge->command;
+ old = bridge->command; + old = bridge->command;
if (!mvebu_has_ioport(port)) if (!mvebu_has_ioport(port))
value &= ~PCI_COMMAND_IO; value &= ~PCI_COMMAND_IO;
@@ -660,8 +725,9 @@ static int mvebu_sw_pci_bridge_write(struct mvebu_pcie_port *port, @@ -681,8 +746,9 @@ static int mvebu_sw_pci_bridge_write(str
mvebu_pcie_handle_iobase_change(port); mvebu_pcie_handle_iobase_change(port);
if ((old ^ bridge->command) & PCI_COMMAND_MEMORY) if ((old ^ bridge->command) & PCI_COMMAND_MEMORY)
mvebu_pcie_handle_membase_change(port); mvebu_pcie_handle_membase_change(port);
@ -133,13 +131,13 @@ index 53b79c5..7980be0 100644
+ mvebu_pcie_handle_irq_change(port); + mvebu_pcie_handle_irq_change(port);
break; break;
- } - }
case PCI_BASE_ADDRESS_0 ... PCI_BASE_ADDRESS_1: case PCI_BASE_ADDRESS_0 ... PCI_BASE_ADDRESS_1:
bridge->bar[((where & ~3) - PCI_BASE_ADDRESS_0) / 4] = value; bridge->bar[((where & ~3) - PCI_BASE_ADDRESS_0) / 4] = value;
@@ -690,6 +756,17 @@ static int mvebu_sw_pci_bridge_write(struct mvebu_pcie_port *port, @@ -711,6 +777,17 @@ static int mvebu_sw_pci_bridge_write(str
mvebu_pcie_handle_iobase_change(port); mvebu_pcie_handle_iobase_change(port);
break; break;
+ case PCI_INTERRUPT_LINE: + case PCI_INTERRUPT_LINE:
+ value >>= 16; + value >>= 16;
+ old = bridge->bridgectrl; + old = bridge->bridgectrl;
@ -154,9 +152,9 @@ index 53b79c5..7980be0 100644
case PCI_PRIMARY_BUS: case PCI_PRIMARY_BUS:
bridge->primary_bus = value & 0xff; bridge->primary_bus = value & 0xff;
bridge->secondary_bus = (value >> 8) & 0xff; bridge->secondary_bus = (value >> 8) & 0xff;
@@ -699,6 +776,14 @@ static int mvebu_sw_pci_bridge_write(struct mvebu_pcie_port *port, @@ -720,6 +797,14 @@ static int mvebu_sw_pci_bridge_write(str
break; break;
case PCISWCAP_EXP_DEVCTL: case PCISWCAP_EXP_DEVCTL:
+ old = bridge->pcie_devctl; + old = bridge->pcie_devctl;
+ bridge->pcie_devctl = value & (PCI_EXP_DEVCTL_FERE | + bridge->pcie_devctl = value & (PCI_EXP_DEVCTL_FERE |
@ -169,10 +167,10 @@ index 53b79c5..7980be0 100644
/* /*
* Armada370 data says these bits must always * Armada370 data says these bits must always
* be zero when in root complex mode. * be zero when in root complex mode.
@@ -739,10 +824,24 @@ static int mvebu_sw_pci_bridge_write(struct mvebu_pcie_port *port, @@ -761,10 +846,24 @@ static int mvebu_sw_pci_bridge_write(str
mvebu_writel(port, value, PCIE_CAP_PCIEXP + PCI_EXP_LNKCTL); mvebu_writel(port, value, PCIE_CAP_PCIEXP + PCI_EXP_LNKCTL);
break; break;
+ case PCISWCAP_EXP_RTCTL: + case PCISWCAP_EXP_RTCTL:
+ old = bridge->pcie_rtctl; + old = bridge->pcie_rtctl;
+ bridge->pcie_rtctl = value & (PCI_EXP_RTCTL_SECEE | + bridge->pcie_rtctl = value & (PCI_EXP_RTCTL_SECEE |
@ -186,7 +184,7 @@ index 53b79c5..7980be0 100644
case PCISWCAP_EXP_RTSTA: case PCISWCAP_EXP_RTSTA:
mvebu_writel(port, value, PCIE_RC_RTSTA); mvebu_writel(port, value, PCIE_RC_RTSTA);
break; break;
+ case 0x100 ... 0x128: + case 0x100 ... 0x128:
+ mvebu_writel(port, value, where & ~3); + mvebu_writel(port, value, where & ~3);
+ break; + break;

21
patch/kernel/mvebu-legacy/0041-implement-slot-capabilities-SSPL.patch
View file

@ -7,11 +7,9 @@ Subject: [PATCH] implement slot capabilities (SSPL)
drivers/pci/controller/pci-mvebu.c | 22 ++++++++++++++++++++-- drivers/pci/controller/pci-mvebu.c | 22 ++++++++++++++++++++--
1 file changed, 20 insertions(+), 2 deletions(-) 1 file changed, 20 insertions(+), 2 deletions(-)
diff --git a/drivers/pci/controller/pci-mvebu.c b/drivers/pci/controller/pci-mvebu.c
index 7980be0..0e9b820 100644
--- a/drivers/pci/controller/pci-mvebu.c --- a/drivers/pci/controller/pci-mvebu.c
+++ b/drivers/pci/controller/pci-mvebu.c +++ b/drivers/pci/controller/pci-mvebu.c
@@ -65,6 +65,12 @@ @@ -66,6 +66,12 @@
#define PCIE_STAT_BUS 0xff00 #define PCIE_STAT_BUS 0xff00
#define PCIE_STAT_DEV 0x1f0000 #define PCIE_STAT_DEV 0x1f0000
#define PCIE_STAT_LINK_DOWN BIT(0) #define PCIE_STAT_LINK_DOWN BIT(0)
@ -24,17 +22,17 @@ index 7980be0..0e9b820 100644
#define PCIE_RC_RTSTA 0x1a14 #define PCIE_RC_RTSTA 0x1a14
#define PCIE_DEBUG_CTRL 0x1a60 #define PCIE_DEBUG_CTRL 0x1a60
#define PCIE_DEBUG_SOFT_RESET BIT(20) #define PCIE_DEBUG_SOFT_RESET BIT(20)
@@ -119,7 +125,6 @@ struct mvebu_sw_pci_bridge { @@ -120,7 +126,6 @@ struct mvebu_sw_pci_bridge {
u16 bridgectrl; u16 bridgectrl;
/* PCI express capability */ /* PCI express capability */
- u32 pcie_sltcap; - u32 pcie_sltcap;
u16 pcie_devctl; u16 pcie_devctl;
u16 pcie_rtctl; u16 pcie_rtctl;
}; };
@@ -640,8 +645,12 @@ static int mvebu_sw_pci_bridge_read(struct mvebu_pcie_port *port, @@ -661,8 +666,12 @@ static int mvebu_sw_pci_bridge_read(stru
break; break;
case PCISWCAP_EXP_SLTCAP: case PCISWCAP_EXP_SLTCAP:
- *value = bridge->pcie_sltcap; - *value = bridge->pcie_sltcap;
+ { + {
@ -43,13 +41,13 @@ index 7980be0..0e9b820 100644
+ PCIE_SSPL_SPLV_VAL(tmp) << 7; + PCIE_SSPL_SPLV_VAL(tmp) << 7;
break; break;
+ } + }
case PCISWCAP_EXP_SLTCTL: case PCISWCAP_EXP_SLTCTL:
*value = PCI_EXP_SLTSTA_PDS << 16; *value = PCI_EXP_SLTSTA_PDS << 16;
@@ -824,6 +833,15 @@ static int mvebu_sw_pci_bridge_write(struct mvebu_pcie_port *port, @@ -846,6 +855,15 @@ static int mvebu_sw_pci_bridge_write(str
mvebu_writel(port, value, PCIE_CAP_PCIEXP + PCI_EXP_LNKCTL); mvebu_writel(port, value, PCIE_CAP_PCIEXP + PCI_EXP_LNKCTL);
break; break;
+ case PCISWCAP_EXP_SLTCAP: + case PCISWCAP_EXP_SLTCAP:
+ { + {
+ u32 sspl = PCIE_SSPL_SPLV((value & PCI_EXP_SLTCAP_SPLV) >> 7) | + u32 sspl = PCIE_SSPL_SPLV((value & PCI_EXP_SLTCAP_SPLV) >> 7) |
@ -62,6 +60,3 @@ index 7980be0..0e9b820 100644
case PCISWCAP_EXP_RTCTL: case PCISWCAP_EXP_RTCTL:
old = bridge->pcie_rtctl; old = bridge->pcie_rtctl;
bridge->pcie_rtctl = value & (PCI_EXP_RTCTL_SECEE | bridge->pcie_rtctl = value & (PCI_EXP_RTCTL_SECEE |
--
1.9.1

10
patch/kernel/mvebu-legacy/0044-gpio-report-all-gpios-in-debugfs.patch
View file

@ -8,11 +8,9 @@ Subject: [PATCH] gpio: report all gpios in debugfs
drivers/gpio/gpiolib.c | 3 ++- drivers/gpio/gpiolib.c | 3 ++-
2 files changed, 4 insertions(+), 3 deletions(-) 2 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/gpio/gpio-mvebu.c b/drivers/gpio/gpio-mvebu.c
index d428b97..fe172b7 100644
--- a/drivers/gpio/gpio-mvebu.c --- a/drivers/gpio/gpio-mvebu.c
+++ b/drivers/gpio/gpio-mvebu.c +++ b/drivers/gpio/gpio-mvebu.c
@@ -514,8 +514,8 @@ static void mvebu_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip) @@ -855,8 +855,8 @@ static void mvebu_gpio_dbg_show(struct s
bool is_out; bool is_out;
label = gpiochip_is_requested(chip, i); label = gpiochip_is_requested(chip, i);
@ -21,13 +19,11 @@ index d428b97..fe172b7 100644
+// if (!label) +// if (!label)
+// continue; +// continue;
msk = 1 << i; msk = BIT(i);
is_out = !(io_conf & msk); is_out = !(io_conf & msk);
diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c
index b747c76..d61fb66
--- a/drivers/gpio/gpiolib.c --- a/drivers/gpio/gpiolib.c
+++ b/drivers/gpio/gpiolib.c +++ b/drivers/gpio/gpiolib.c
@@ -2895,14 +2895,14 @@ static void gpiolib_dbg_show(struct seq_file *s, struct gpio_device *gdev) @@ -4357,14 +4357,14 @@ static void gpiolib_dbg_show(struct seq_
int is_irq; int is_irq;
for (i = 0; i < gdev->ngpio; i++, gpio++, gdesc++) { for (i = 0; i < gdev->ngpio; i++, gpio++, gdesc++) {

2
patch/kernel/mvebu-legacy/102-revert_i2c_delay.patch
View file

@ -1,6 +1,6 @@
--- a/arch/arm/boot/dts/armada-xp.dtsi --- a/arch/arm/boot/dts/armada-xp.dtsi
+++ b/arch/arm/boot/dts/armada-xp.dtsi +++ b/arch/arm/boot/dts/armada-xp.dtsi
@@ -274,12 +274,10 @@ @@ -237,12 +237,10 @@
}; };
&i2c0 { &i2c0 {

6
patch/kernel/mvebu-legacy/402-sfp-display-SFP-module-information.patch
View file

@ -7,7 +7,7 @@ Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
--- ---
--- a/drivers/net/phy/sfp.c --- a/drivers/net/phy/sfp.c
+++ b/drivers/net/phy/sfp.c +++ b/drivers/net/phy/sfp.c
@@ -403,6 +403,185 @@ static unsigned int sfp_check(void *buf, size_t len) @@ -403,6 +403,185 @@ static unsigned int sfp_check(void *buf,
return check; return check;
} }
@ -193,7 +193,7 @@ Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
/* hwmon */ /* hwmon */
#if IS_ENABLED(CONFIG_HWMON) #if IS_ENABLED(CONFIG_HWMON)
static umode_t sfp_hwmon_is_visible(const void *data, static umode_t sfp_hwmon_is_visible(const void *data,
@@ -1388,6 +1567,7 @@ static int sfp_sm_mod_probe(struct sfp *sfp) @@ -1376,6 +1555,7 @@ static int sfp_sm_mod_probe(struct sfp *
/* SFP module inserted - read I2C data */ /* SFP module inserted - read I2C data */
struct sfp_eeprom_id id; struct sfp_eeprom_id id;
bool cotsworks; bool cotsworks;
@ -201,7 +201,7 @@ Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
u8 check; u8 check;
int ret; int ret;
@@ -1450,6 +1630,73 @@ static int sfp_sm_mod_probe(struct sfp *sfp) @@ -1438,6 +1618,73 @@ static int sfp_sm_mod_probe(struct sfp *
(int)sizeof(id.ext.vendor_sn), id.ext.vendor_sn, (int)sizeof(id.ext.vendor_sn), id.ext.vendor_sn,
(int)sizeof(id.ext.datecode), id.ext.datecode); (int)sizeof(id.ext.datecode), id.ext.datecode);

2
patch/kernel/mvebu-legacy/412-ARM-dts-armada388-clearfog-emmc-on-clearfog-base.patch
View file

@ -12,7 +12,7 @@ Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
--- a/arch/arm/boot/dts/armada-388-clearfog-base.dts --- a/arch/arm/boot/dts/armada-388-clearfog-base.dts
+++ b/arch/arm/boot/dts/armada-388-clearfog-base.dts +++ b/arch/arm/boot/dts/armada-388-clearfog-base.dts
@@ -48,6 +48,7 @@ @@ -7,6 +7,7 @@
/dts-v1/; /dts-v1/;
#include "armada-388-clearfog.dtsi" #include "armada-388-clearfog.dtsi"

12
patch/kernel/mvebu-legacy/450-reprobe_sfp_phy.patch
View file

@ -13,7 +13,7 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
--- a/drivers/net/phy/sfp.c --- a/drivers/net/phy/sfp.c
+++ b/drivers/net/phy/sfp.c +++ b/drivers/net/phy/sfp.c
@@ -488,7 +488,7 @@ static void sfp_sm_phy_detach(struct sfp @@ -1374,7 +1374,7 @@ static void sfp_sm_phy_detach(struct sfp
sfp->mod_phy = NULL; sfp->mod_phy = NULL;
} }
@ -22,7 +22,7 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
{ {
struct phy_device *phy; struct phy_device *phy;
int err; int err;
@@ -498,11 +498,11 @@ static void sfp_sm_probe_phy(struct sfp @@ -1384,11 +1384,11 @@ static void sfp_sm_probe_phy(struct sfp
phy = mdiobus_scan(sfp->i2c_mii, SFP_PHY_ADDR); phy = mdiobus_scan(sfp->i2c_mii, SFP_PHY_ADDR);
if (phy == ERR_PTR(-ENODEV)) { if (phy == ERR_PTR(-ENODEV)) {
dev_info(sfp->dev, "no PHY detected\n"); dev_info(sfp->dev, "no PHY detected\n");
@ -36,7 +36,7 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
} }
err = sfp_add_phy(sfp->sfp_bus, phy); err = sfp_add_phy(sfp->sfp_bus, phy);
@@ -510,11 +510,13 @@ static void sfp_sm_probe_phy(struct sfp @@ -1396,11 +1396,13 @@ static void sfp_sm_probe_phy(struct sfp
phy_device_remove(phy); phy_device_remove(phy);
phy_device_free(phy); phy_device_free(phy);
dev_err(sfp->dev, "sfp_add_phy failed: %d\n", err); dev_err(sfp->dev, "sfp_add_phy failed: %d\n", err);
@ -51,7 +51,7 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
} }
static void sfp_sm_link_up(struct sfp *sfp) static void sfp_sm_link_up(struct sfp *sfp)
@@ -560,14 +562,9 @@ static void sfp_sm_fault(struct sfp *sfp @@ -1464,14 +1466,9 @@ static void sfp_sm_fault(struct sfp *sfp
static void sfp_sm_mod_init(struct sfp *sfp) static void sfp_sm_mod_init(struct sfp *sfp)
{ {
@ -68,7 +68,7 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
/* Setting the serdes link mode is guesswork: there's no /* Setting the serdes link mode is guesswork: there's no
* field in the EEPROM which indicates what mode should * field in the EEPROM which indicates what mode should
@@ -581,7 +578,22 @@ static void sfp_sm_mod_init(struct sfp * @@ -1485,7 +1482,22 @@ static void sfp_sm_mod_init(struct sfp *
if (sfp->id.base.e1000_base_t || if (sfp->id.base.e1000_base_t ||
sfp->id.base.e100_base_lx || sfp->id.base.e100_base_lx ||
sfp->id.base.e100_base_fx) sfp->id.base.e100_base_fx)
@ -91,4 +91,4 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+ sfp_sm_next(sfp, SFP_S_TX_DISABLE, 0); + sfp_sm_next(sfp, SFP_S_TX_DISABLE, 0);
} }
static int sfp_sm_mod_probe(struct sfp *sfp) static int sfp_sm_mod_hpower(struct sfp *sfp)

27
patch/kernel/mvebu-legacy/91-01-libata-add-ledtrig-support.patch
View file

@ -20,8 +20,6 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
include/linux/libata.h | 7 ++++++ include/linux/libata.h | 7 ++++++
3 files changed, 79 insertions(+) 3 files changed, 79 insertions(+)
diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig
index 6aaa3f8..4e24b64 100644
--- a/drivers/ata/Kconfig --- a/drivers/ata/Kconfig
+++ b/drivers/ata/Kconfig +++ b/drivers/ata/Kconfig
@@ -46,6 +46,22 @@ config ATA_VERBOSE_ERROR @@ -46,6 +46,22 @@ config ATA_VERBOSE_ERROR
@ -47,11 +45,9 @@ index 6aaa3f8..4e24b64 100644
config ATA_ACPI config ATA_ACPI
bool "ATA ACPI Support" bool "ATA ACPI Support"
depends on ACPI depends on ACPI
diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c
index b0b77b6..1400f4d 100644
--- a/drivers/ata/libata-core.c --- a/drivers/ata/libata-core.c
+++ b/drivers/ata/libata-core.c +++ b/drivers/ata/libata-core.c
@@ -728,6 +728,7 @@ u64 ata_tf_read_block(struct ata_taskfile *tf, struct ata_device *dev) @@ -730,6 +730,7 @@ u64 ata_tf_read_block(const struct ata_t
return block; return block;
} }
@ -59,7 +55,7 @@ index b0b77b6..1400f4d 100644
/** /**
* ata_build_rw_tf - Build ATA taskfile for given read/write request * ata_build_rw_tf - Build ATA taskfile for given read/write request
* @tf: Target ATA taskfile * @tf: Target ATA taskfile
@@ -4757,6 +4758,30 @@ void swap_buf_le16(u16 *buf, unsigned int buf_words) @@ -5112,6 +5113,30 @@ void swap_buf_le16(u16 *buf, unsigned in
} }
/** /**
@ -90,7 +86,7 @@ index b0b77b6..1400f4d 100644
* ata_qc_new_init - Request an available ATA command, and initialize it * ata_qc_new_init - Request an available ATA command, and initialize it
* @dev: Device from whom we request an available command structure * @dev: Device from whom we request an available command structure
* @tag: tag * @tag: tag
@@ -4780,6 +4805,9 @@ struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev, int tag) @@ -5135,6 +5160,9 @@ struct ata_queued_cmd *ata_qc_new_init(s
if (tag < 0) if (tag < 0)
return NULL; return NULL;
} }
@ -99,8 +95,8 @@ index b0b77b6..1400f4d 100644
+#endif +#endif
qc = __ata_qc_from_tag(ap, tag); qc = __ata_qc_from_tag(ap, tag);
qc->tag = tag; qc->tag = qc->hw_tag = tag;
@@ -5677,6 +5705,9 @@ struct ata_port *ata_port_alloc(struct ata_host *host) @@ -6071,6 +6099,9 @@ struct ata_port *ata_port_alloc(struct a
ap->stats.unhandled_irq = 1; ap->stats.unhandled_irq = 1;
ap->stats.idle_irq = 1; ap->stats.idle_irq = 1;
#endif #endif
@ -110,7 +106,7 @@ index b0b77b6..1400f4d 100644
ata_sff_port_init(ap); ata_sff_port_init(ap);
return ap; return ap;
@@ -5698,6 +5729,12 @@ static void ata_host_release(struct device *gendev, void *res) @@ -6106,6 +6137,12 @@ static void ata_host_release(struct kref
kfree(ap->pmp_link); kfree(ap->pmp_link);
kfree(ap->slave_link); kfree(ap->slave_link);
@ -123,7 +119,7 @@ index b0b77b6..1400f4d 100644
kfree(ap); kfree(ap);
host->ports[i] = NULL; host->ports[i] = NULL;
} }
@@ -6145,6 +6182,25 @@ int ata_host_register(struct ata_host *host, struct scsi_host_template *sht) @@ -6570,6 +6607,25 @@ int ata_host_register(struct ata_host *h
host->ports[i]->local_port_no = i + 1; host->ports[i]->local_port_no = i + 1;
} }
@ -149,11 +145,9 @@ index b0b77b6..1400f4d 100644
/* Create associated sysfs transport objects */ /* Create associated sysfs transport objects */
for (i = 0; i < host->n_ports; i++) { for (i = 0; i < host->n_ports; i++) {
rc = ata_tport_add(host->dev,host->ports[i]); rc = ata_tport_add(host->dev,host->ports[i]);
diff --git a/include/linux/libata.h b/include/linux/libata.h
index b20a275..50eeee3 100644
--- a/include/linux/libata.h --- a/include/linux/libata.h
+++ b/include/linux/libata.h +++ b/include/linux/libata.h
@@ -38,6 +38,7 @@ @@ -39,6 +39,7 @@
#include <linux/cdrom.h> #include <linux/cdrom.h>
#include <linux/sched.h> #include <linux/sched.h>
#include <linux/async.h> #include <linux/async.h>
@ -161,7 +155,7 @@ index b20a275..50eeee3 100644
/* /*
* Define if arch has non-standard setup. This is a _PCI_ standard * Define if arch has non-standard setup. This is a _PCI_ standard
@@ -877,6 +878,12 @@ struct ata_port { @@ -898,6 +899,12 @@ struct ata_port {
#ifdef CONFIG_ATA_ACPI #ifdef CONFIG_ATA_ACPI
struct ata_acpi_gtm __acpi_init_gtm; /* use ata_acpi_init_gtm() */ struct ata_acpi_gtm __acpi_init_gtm; /* use ata_acpi_init_gtm() */
#endif #endif
@ -174,6 +168,3 @@ index b20a275..50eeee3 100644
/* owned by EH */ /* owned by EH */
u8 sector_buf[ATA_SECT_SIZE] ____cacheline_aligned; u8 sector_buf[ATA_SECT_SIZE] ____cacheline_aligned;
}; };
--
2.7.4

13
patch/kernel/mvebu-legacy/91-02-Enable-ATA-port-LED-trigger.patch
View file

@ -8,11 +8,9 @@ Subject: Enable ATA port LED trigger
arch/arm/mach-mvebu/Kconfig | 1 + arch/arm/mach-mvebu/Kconfig | 1 +
2 files changed, 2 insertions(+) 2 files changed, 2 insertions(+)
diff --git a/arch/arm/configs/mvebu_v7_defconfig b/arch/arm/configs/mvebu_v7_defconfig
index cf363ab..19449d3 100644
--- a/arch/arm/configs/mvebu_v7_defconfig --- a/arch/arm/configs/mvebu_v7_defconfig
+++ b/arch/arm/configs/mvebu_v7_defconfig +++ b/arch/arm/configs/mvebu_v7_defconfig
@@ -61,6 +61,7 @@ CONFIG_MTD_SPI_NOR=y @@ -59,6 +59,7 @@ CONFIG_MTD_UBI=y
CONFIG_EEPROM_AT24=y CONFIG_EEPROM_AT24=y
CONFIG_BLK_DEV_SD=y CONFIG_BLK_DEV_SD=y
CONFIG_ATA=y CONFIG_ATA=y
@ -20,18 +18,13 @@ index cf363ab..19449d3 100644
CONFIG_SATA_AHCI=y CONFIG_SATA_AHCI=y
CONFIG_AHCI_MVEBU=y CONFIG_AHCI_MVEBU=y
CONFIG_SATA_MV=y CONFIG_SATA_MV=y
diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
index 053ea9d..aa1f389 100644
--- a/arch/arm/mach-mvebu/Kconfig --- a/arch/arm/mach-mvebu/Kconfig
+++ b/arch/arm/mach-mvebu/Kconfig +++ b/arch/arm/mach-mvebu/Kconfig
@@ -57,6 +57,7 @@ config MACH_ARMADA_375 @@ -56,6 +56,7 @@ config MACH_ARMADA_375
config MACH_ARMADA_38X config MACH_ARMADA_38X
bool "Marvell Armada 380/385 boards" bool "Marvell Armada 380/385 boards"
depends on ARCH_MULTI_V7 depends on ARCH_MULTI_V7
+ select ARCH_WANT_LIBATA_LEDS + select ARCH_WANT_LIBATA_LEDS
select ARM_ERRATA_720789 select ARM_ERRATA_720789
select ARM_ERRATA_753970 select PL310_ERRATA_753970
select ARM_GIC select ARM_GIC
--
2.7.4

26
patch/kernel/mvebu-legacy/92-mvebu-gpio-add_wake_on_gpio_support.patch
View file

@ -1,16 +1,14 @@
diff --git a/drivers/gpio/gpio-mvebu.c b/drivers/gpio/gpio-mvebu.c
index 661c5a38f..a25d61d54 100644
--- a/drivers/gpio/gpio-mvebu.c --- a/drivers/gpio/gpio-mvebu.c
+++ b/drivers/gpio/gpio-mvebu.c +++ b/drivers/gpio/gpio-mvebu.c
@@ -38,6 +38,7 @@ @@ -39,6 +39,7 @@
#include <linux/err.h> #include <linux/gpio/driver.h>
#include <linux/gpio.h> #include <linux/gpio/consumer.h>
#include <linux/init.h> #include <linux/init.h>
+#include <linux/interrupt.h> +#include <linux/interrupt.h>
#include <linux/io.h> #include <linux/io.h>
#include <linux/irq.h> #include <linux/irq.h>
#include <linux/irqchip/chained_irq.h> #include <linux/irqchip/chained_irq.h>
@@ -133,7 +134,7 @@ struct mvebu_gpio_chip { @@ -111,7 +112,7 @@ struct mvebu_gpio_chip {
struct regmap *regs; struct regmap *regs;
u32 offset; u32 offset;
struct regmap *percpu_regs; struct regmap *percpu_regs;
@ -19,11 +17,10 @@ index 661c5a38f..a25d61d54 100644
struct irq_domain *domain; struct irq_domain *domain;
int soc_variant; int soc_variant;
@@ -608,6 +609,33 @@ static void mvebu_gpio_irq_handler(struct irq_desc *desc) @@ -587,6 +588,33 @@ static void mvebu_gpio_irq_handler(struc
chained_irq_exit(chip, desc);
} }
+/* /*
+ * Set interrupt number "irq" in the GPIO as a wake-up source. + * Set interrupt number "irq" in the GPIO as a wake-up source.
+ * While system is running, all registered GPIO interrupts need to have + * While system is running, all registered GPIO interrupts need to have
+ * wake-up enabled. When system is suspended, only selected GPIO interrupts + * wake-up enabled. When system is suspended, only selected GPIO interrupts
@ -50,10 +47,11 @@ index 661c5a38f..a25d61d54 100644
+ return 0; + return 0;
+} +}
+ +
/* +/*
* Functions implementing the pwm_chip methods * Functions implementing the pwm_chip methods
*/ */
@@ -1277,7 +1305,7 @@ static int mvebu_gpio_probe(struct platform_device *pdev) static struct mvebu_pwm *to_mvebu_pwm(struct pwm_chip *chip)
@@ -1205,7 +1233,7 @@ static int mvebu_gpio_probe(struct platf
err = irq_alloc_domain_generic_chips( err = irq_alloc_domain_generic_chips(
mvchip->domain, ngpios, 2, np->name, handle_level_irq, mvchip->domain, ngpios, 2, np->name, handle_level_irq,
@ -62,7 +60,7 @@ index 661c5a38f..a25d61d54 100644
if (err) { if (err) {
dev_err(&pdev->dev, "couldn't allocate irq chips %s (DT).\n", dev_err(&pdev->dev, "couldn't allocate irq chips %s (DT).\n",
mvchip->chip.label); mvchip->chip.label);
@@ -1295,6 +1323,8 @@ static int mvebu_gpio_probe(struct platform_device *pdev) @@ -1223,6 +1251,8 @@ static int mvebu_gpio_probe(struct platf
ct->chip.irq_mask = mvebu_gpio_level_irq_mask; ct->chip.irq_mask = mvebu_gpio_level_irq_mask;
ct->chip.irq_unmask = mvebu_gpio_level_irq_unmask; ct->chip.irq_unmask = mvebu_gpio_level_irq_unmask;
ct->chip.irq_set_type = mvebu_gpio_irq_set_type; ct->chip.irq_set_type = mvebu_gpio_irq_set_type;
@ -71,7 +69,7 @@ index 661c5a38f..a25d61d54 100644
ct->chip.name = mvchip->chip.label; ct->chip.name = mvchip->chip.label;
ct = &gc->chip_types[1]; ct = &gc->chip_types[1];
@@ -1303,6 +1333,8 @@ static int mvebu_gpio_probe(struct platform_device *pdev) @@ -1231,6 +1261,8 @@ static int mvebu_gpio_probe(struct platf
ct->chip.irq_mask = mvebu_gpio_edge_irq_mask; ct->chip.irq_mask = mvebu_gpio_edge_irq_mask;
ct->chip.irq_unmask = mvebu_gpio_edge_irq_unmask; ct->chip.irq_unmask = mvebu_gpio_edge_irq_unmask;
ct->chip.irq_set_type = mvebu_gpio_irq_set_type; ct->chip.irq_set_type = mvebu_gpio_irq_set_type;
@ -80,7 +78,7 @@ index 661c5a38f..a25d61d54 100644
ct->handler = handle_edge_irq; ct->handler = handle_edge_irq;
ct->chip.name = mvchip->chip.label; ct->chip.name = mvchip->chip.label;
@@ -1318,6 +1350,7 @@ static int mvebu_gpio_probe(struct platform_device *pdev) @@ -1246,6 +1278,7 @@ static int mvebu_gpio_probe(struct platf
continue; continue;
irq_set_chained_handler_and_data(irq, mvebu_gpio_irq_handler, irq_set_chained_handler_and_data(irq, mvebu_gpio_irq_handler,
mvchip); mvchip);

51
patch/kernel/mvebu-legacy/92-mvebu-gpio-remove-hardcoded-timer-assignment.patch
View file

@ -1,8 +1,6 @@
diff --git a/drivers/gpio/gpio-mvebu.c b/drivers/gpio/gpio-mvebu.c
index adc768f908f1..a2bd264ee92c 100644
--- a/drivers/gpio/gpio-mvebu.c --- a/drivers/gpio/gpio-mvebu.c
+++ b/drivers/gpio/gpio-mvebu.c +++ b/drivers/gpio/gpio-mvebu.c
@@ -92,20 +92,41 @@ @@ -93,20 +93,41 @@
#define MVEBU_MAX_GPIO_PER_BANK 32 #define MVEBU_MAX_GPIO_PER_BANK 32
@ -48,7 +46,7 @@ index adc768f908f1..a2bd264ee92c 100644
struct mvebu_gpio_chip { struct mvebu_gpio_chip {
struct gpio_chip chip; struct gpio_chip chip;
struct regmap *regs; struct regmap *regs;
@@ -282,12 +303,12 @@ mvebu_gpio_write_level_mask(struct mvebu_gpio_chip *mvchip, u32 val) @@ -283,12 +304,12 @@ mvebu_gpio_write_level_mask(struct mvebu
* Functions returning addresses of individual registers for a given * Functions returning addresses of individual registers for a given
* PWM controller. * PWM controller.
*/ */
@ -63,7 +61,7 @@ index adc768f908f1..a2bd264ee92c 100644
{ {
return mvpwm->membase + PWM_BLINK_OFF_DURATION_OFF; return mvpwm->membase + PWM_BLINK_OFF_DURATION_OFF;
} }
@@ -599,43 +620,76 @@ static int mvebu_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm) @@ -627,43 +648,76 @@ static int mvebu_pwm_request(struct pwm_
struct mvebu_pwm *mvpwm = to_mvebu_pwm(chip); struct mvebu_pwm *mvpwm = to_mvebu_pwm(chip);
struct mvebu_gpio_chip *mvchip = mvpwm->mvchip; struct mvebu_gpio_chip *mvchip = mvpwm->mvchip;
struct gpio_desc *desc; struct gpio_desc *desc;
@ -88,18 +86,18 @@ index adc768f908f1..a2bd264ee92c 100644
+ &mvchip->blink_en_reg); + &mvchip->blink_en_reg);
+ if (pwm->chip_data || (mvchip->blink_en_reg & BIT(pwm->hwpwm))) + if (pwm->chip_data || (mvchip->blink_en_reg & BIT(pwm->hwpwm)))
+ return -EBUSY; + return -EBUSY;
+
+ desc = gpiochip_request_own_desc(&mvchip->chip, pwm->hwpwm, "mvebu-pwm");
+ if (IS_ERR(desc)) {
+ ret = PTR_ERR(desc);
+ goto out;
+ }
- ret = gpiod_direction_output(desc, 0); - ret = gpiod_direction_output(desc, 0);
- if (ret) { - if (ret) {
- gpiochip_free_own_desc(desc); - gpiochip_free_own_desc(desc);
- goto out; - goto out;
- } - }
+ desc = gpiochip_request_own_desc(&mvchip->chip, pwm->hwpwm, "mvebu-pwm");
+ if (IS_ERR(desc)) {
+ ret = PTR_ERR(desc);
+ goto out;
+ }
+
+ ret = gpiod_direction_output(desc, 0); + ret = gpiod_direction_output(desc, 0);
+ if (ret) { + if (ret) {
+ gpiochip_free_own_desc(desc); + gpiochip_free_own_desc(desc);
@ -161,7 +159,7 @@ index adc768f908f1..a2bd264ee92c 100644
} }
static void mvebu_pwm_get_state(struct pwm_chip *chip, static void mvebu_pwm_get_state(struct pwm_chip *chip,
@@ -643,17 +697,24 @@ static void mvebu_pwm_get_state(struct pwm_chip *chip, @@ -671,17 +725,24 @@ static void mvebu_pwm_get_state(struct p
struct pwm_state *state) { struct pwm_state *state) {
struct mvebu_pwm *mvpwm = to_mvebu_pwm(chip); struct mvebu_pwm *mvpwm = to_mvebu_pwm(chip);
@ -189,7 +187,7 @@ index adc768f908f1..a2bd264ee92c 100644
if (val > UINT_MAX) if (val > UINT_MAX)
state->duty_cycle = UINT_MAX; state->duty_cycle = UINT_MAX;
else if (val) else if (val)
@@ -662,9 +723,9 @@ static void mvebu_pwm_get_state(struct pwm_chip *chip, @@ -690,9 +751,9 @@ static void mvebu_pwm_get_state(struct p
state->duty_cycle = 1; state->duty_cycle = 1;
val = (unsigned long long) val = (unsigned long long)
@ -201,7 +199,7 @@ index adc768f908f1..a2bd264ee92c 100644
if (val < state->duty_cycle) { if (val < state->duty_cycle) {
state->period = 1; state->period = 1;
} else { } else {
@@ -683,19 +744,21 @@ static void mvebu_pwm_get_state(struct pwm_chip *chip, @@ -711,19 +772,21 @@ static void mvebu_pwm_get_state(struct p
else else
state->enabled = false; state->enabled = false;
@ -225,7 +223,7 @@ index adc768f908f1..a2bd264ee92c 100644
do_div(val, NSEC_PER_SEC); do_div(val, NSEC_PER_SEC);
if (val > UINT_MAX) if (val > UINT_MAX)
return -EINVAL; return -EINVAL;
@@ -704,7 +767,7 @@ static int mvebu_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, @@ -732,7 +795,7 @@ static int mvebu_pwm_apply(struct pwm_ch
else else
on = 1; on = 1;
@ -234,7 +232,7 @@ index adc768f908f1..a2bd264ee92c 100644
(state->period - state->duty_cycle); (state->period - state->duty_cycle);
do_div(val, NSEC_PER_SEC); do_div(val, NSEC_PER_SEC);
if (val > UINT_MAX) if (val > UINT_MAX)
@@ -714,16 +777,16 @@ static int mvebu_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, @@ -742,16 +805,16 @@ static int mvebu_pwm_apply(struct pwm_ch
else else
off = 1; off = 1;
@ -255,7 +253,7 @@ index adc768f908f1..a2bd264ee92c 100644
return 0; return 0;
} }
@@ -742,10 +805,10 @@ static void __maybe_unused mvebu_pwm_suspend(struct mvebu_gpio_chip *mvchip) @@ -770,10 +833,10 @@ static void __maybe_unused mvebu_pwm_sus
regmap_read(mvchip->regs, GPIO_BLINK_CNT_SELECT_OFF + mvchip->offset, regmap_read(mvchip->regs, GPIO_BLINK_CNT_SELECT_OFF + mvchip->offset,
&mvpwm->blink_select); &mvpwm->blink_select);
@ -270,7 +268,7 @@ index adc768f908f1..a2bd264ee92c 100644
} }
static void __maybe_unused mvebu_pwm_resume(struct mvebu_gpio_chip *mvchip) static void __maybe_unused mvebu_pwm_resume(struct mvebu_gpio_chip *mvchip)
@@ -754,10 +817,10 @@ static void __maybe_unused mvebu_pwm_resume(struct mvebu_gpio_chip *mvchip) @@ -782,10 +845,10 @@ static void __maybe_unused mvebu_pwm_res
regmap_write(mvchip->regs, GPIO_BLINK_CNT_SELECT_OFF + mvchip->offset, regmap_write(mvchip->regs, GPIO_BLINK_CNT_SELECT_OFF + mvchip->offset,
mvpwm->blink_select); mvpwm->blink_select);
@ -285,7 +283,7 @@ index adc768f908f1..a2bd264ee92c 100644
} }
static int mvebu_pwm_probe(struct platform_device *pdev, static int mvebu_pwm_probe(struct platform_device *pdev,
@@ -768,6 +831,7 @@ static int mvebu_pwm_probe(struct platform_device *pdev, @@ -796,6 +859,7 @@ static int mvebu_pwm_probe(struct platfo
struct mvebu_pwm *mvpwm; struct mvebu_pwm *mvpwm;
struct resource *res; struct resource *res;
u32 set; u32 set;
@ -293,7 +291,7 @@ index adc768f908f1..a2bd264ee92c 100644
if (!of_device_is_compatible(mvchip->chip.of_node, if (!of_device_is_compatible(mvchip->chip.of_node,
"marvell,armada-370-gpio")) "marvell,armada-370-gpio"))
@@ -790,12 +854,15 @@ static int mvebu_pwm_probe(struct platform_device *pdev, @@ -818,12 +882,15 @@ static int mvebu_pwm_probe(struct platfo
* Use set A for lines of GPIO chip with id 0, B for GPIO chip * Use set A for lines of GPIO chip with id 0, B for GPIO chip
* with id 1. Don't allow further GPIO chips to be used for PWM. * with id 1. Don't allow further GPIO chips to be used for PWM.
*/ */
@ -312,20 +310,21 @@ index adc768f908f1..a2bd264ee92c 100644
regmap_write(mvchip->regs, regmap_write(mvchip->regs,
GPIO_BLINK_CNT_SELECT_OFF + mvchip->offset, set); GPIO_BLINK_CNT_SELECT_OFF + mvchip->offset, set);
@@ -805,15 +872,13 @@ static int mvebu_pwm_probe(struct platform_device *pdev, @@ -833,15 +900,13 @@ static int mvebu_pwm_probe(struct platfo
mvchip->mvpwm = mvpwm; mvchip->mvpwm = mvpwm;
mvpwm->mvchip = mvchip; mvpwm->mvchip = mvchip;
- mvpwm->membase = devm_ioremap_resource(dev, res); - mvpwm->membase = devm_ioremap_resource(dev, res);
- if (IS_ERR(mvpwm->membase)) - if (IS_ERR(mvpwm->membase))
- return PTR_ERR(mvpwm->membase); - return PTR_ERR(mvpwm->membase);
+ mvpwm->controller.membase = devm_ioremap_resource(dev, res); -
+ if (IS_ERR(mvpwm->controller.membase))
+ return PTR_ERR(mvpwm->controller.membase);
- mvpwm->clk_rate = clk_get_rate(mvchip->clk); - mvpwm->clk_rate = clk_get_rate(mvchip->clk);
- if (!mvpwm->clk_rate) { - if (!mvpwm->clk_rate) {
- dev_err(dev, "failed to get clock rate\n"); - dev_err(dev, "failed to get clock rate\n");
+ mvpwm->controller.membase = devm_ioremap_resource(dev, res);
+ if (IS_ERR(mvpwm->controller.membase))
+ return PTR_ERR(mvpwm->controller.membase);
+
+ mvpwm->controller.clk_rate = clk_get_rate(mvchip->clk); + mvpwm->controller.clk_rate = clk_get_rate(mvchip->clk);
+ if (!mvpwm->controller.clk_rate) + if (!mvpwm->controller.clk_rate)
return -EINVAL; return -EINVAL;
@ -333,7 +332,7 @@ index adc768f908f1..a2bd264ee92c 100644
mvpwm->chip.dev = dev; mvpwm->chip.dev = dev;
mvpwm->chip.ops = &mvebu_pwm_ops; mvpwm->chip.ops = &mvebu_pwm_ops;
@@ -826,7 +891,9 @@ static int mvebu_pwm_probe(struct platform_device *pdev, @@ -854,7 +919,9 @@ static int mvebu_pwm_probe(struct platfo
*/ */
mvpwm->chip.base = -1; mvpwm->chip.base = -1;

314
patch/kernel/mvebu-legacy/93-helios4-device-tree.patch
View file

@ -1,314 +0,0 @@
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 4b17f35..c6b6038 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -1020,6 +1020,7 @@ dtb-$(CONFIG_MACH_ARMADA_38X) += \
armada-388-clearfog.dtb \
armada-388-clearfog-base.dtb \
armada-388-clearfog-pro.dtb \
+ armada-388-helios4.dtb \
armada-388-db.dtb \
armada-388-gp.dtb \
armada-388-rd.dtb
diff --git a/arch/arm/boot/dts/armada-388-helios4.dts b/arch/arm/boot/dts/armada-388-helios4.dts
new file mode 100644
index 0000000..93d0132
--- /dev/null
+++ b/arch/arm/boot/dts/armada-388-helios4.dts
@@ -0,0 +1,295 @@
+/*
+ * Device Tree file for Helios4
+ * based on SolidRun Clearfog revision A1 rev 2.0 (88F6828)
+ *
+ * Copyright (C) 2017 Kobol.io
+ *
+ */
+
+/dts-v1/;
+#include "armada-388.dtsi"
+#include "armada-38x-solidrun-microsom.dtsi"
+
+/ {
+ model = "Helios4";
+ compatible = "marvell,armada388",
+ "marvell,armada385", "marvell,armada380";
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x80000000>; /* 2 GB */
+ };
+
+ aliases {
+ /* So that mvebu u-boot can update the MAC addresses */
+ ethernet1 = &eth0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ reg_12v: regulator-12v {
+ compatible = "regulator-fixed";
+ regulator-name = "power_brick_12V";
+ regulator-min-microvolt = <12000000>;
+ regulator-max-microvolt = <12000000>;
+ regulator-always-on;
+ };
+
+ reg_3p3v: regulator-3p3v {
+ compatible = "regulator-fixed";
+ regulator-name = "3P3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ vin-supply = <&reg_12v>;
+ };
+
+ reg_5p0v_hdd: regulator-5v-hdd {
+ compatible = "regulator-fixed";
+ regulator-name = "5V_HDD";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ vin-supply = <&reg_12v>;
+ };
+
+ reg_5p0v_usb: regulator-5v-usb {
+ compatible = "regulator-fixed";
+ regulator-name = "USB-PWR";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-boot-on;
+ regulator-always-on;
+ enable-active-high;
+ gpio = <&expander0 6 GPIO_ACTIVE_HIGH>;
+ vin-supply = <&reg_12v>;
+ };
+
+ system-leds {
+ compatible = "gpio-leds";
+ status-led {
+ label = "helios4:green:status";
+ gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "heartbeat";
+ default-state = "on";
+ };
+
+ fault-led {
+ label = "helios4:red:fault";
+ gpios = <&gpio0 25 GPIO_ACTIVE_LOW>;
+ default-state = "keep";
+ };
+ };
+
+ io-leds {
+ compatible = "gpio-leds";
+ sata1-led {
+ label = "helios4:green:ata1";
+ gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "ata1";
+ default-state = "off";
+ };
+ sata2-led {
+ label = "helios4:green:ata2";
+ gpios = <&gpio1 18 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "ata2";
+ default-state = "off";
+ };
+ sata3-led {
+ label = "helios4:green:ata3";
+ gpios = <&gpio1 20 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "ata3";
+ default-state = "off";
+ };
+ sata4-led {
+ label = "helios4:green:ata4";
+ gpios = <&gpio1 21 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "ata4";
+ default-state = "off";
+ };
+ usb-led {
+ label = "helios4:green:usb";
+ gpios = <&gpio1 22 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "usb-host";
+ default-state = "off";
+ };
+ };
+
+ fan1: j10-pwm {
+ compatible = "pwm-fan";
+ pwms = <&gpio1 9 40000>; /* Target freq:25 kHz */
+ };
+
+ fan2: j17-pwm {
+ compatible = "pwm-fan";
+ pwms = <&gpio1 23 40000>; /* Target freq:25 kHz */
+ };
+
+ usb2_phy: usb2-phy {
+ compatible = "usb-nop-xceiv";
+ vbus-regulator = <&reg_5p0v_usb>;
+ };
+
+ usb3_phy: usb3-phy {
+ compatible = "usb-nop-xceiv";
+ //vbus-regulator = <&reg_5p0v_usb>;
+ };
+
+ soc {
+ internal-regs {
+ sata@a8000 {
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ sata0: sata-port@0 {
+ reg = <0>;
+ };
+
+ sata1: sata-port@1 {
+ reg = <1>;
+ };
+ };
+
+ sata@e0000 {
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ sata2: sata-port@0 {
+ reg = <0>;
+ };
+
+ sata3: sata-port@1 {
+ reg = <1>;
+ };
+ };
+
+ sdhci@d8000 {
+ bus-width = <4>;
+ cd-gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
+ no-1-8-v;
+ pinctrl-0 = <&microsom_sdhci_pins
+ &helios_sdhci_cd_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+ vmmc = <&reg_3p3v>;
+ wp-inverted;
+ };
+
+ usb@58000 {
+ //vcc-supply = <&reg_5p0v_usb>;
+ usb-phy = <&usb2_phy>;
+ status = "okay";
+ };
+
+ usb3@f0000 {
+ status = "okay";
+ };
+
+ usb3@f8000 {
+ status = "okay";
+ };
+ };
+ };
+};
+
+&i2c0 {
+ clock-frequency = <400000>;
+ pinctrl-0 = <&i2c0_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+
+ /*
+ * PCA9655 GPIO expander, up to 1MHz clock.
+ * 0-Board Revision bit 0 #
+ * 1-Board Revision bit 1 #
+ * 5-USB3 overcurrent
+ * 6-USB3 power
+ */
+ expander0: gpio-expander@20 {
+ /*
+ * This is how it should be:
+ * compatible = "onnn,pca9655", "nxp,pca9555";
+ * but you can't do this because of the way I2C works.
+ */
+ compatible = "nxp,pca9555";
+ gpio-controller;
+ #gpio-cells = <2>;
+ reg = <0x20>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pca0_pins>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <23 IRQ_TYPE_EDGE_FALLING>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+
+ board_rev_bit_0 {
+ gpio-hog;
+ gpios = <0 GPIO_ACTIVE_LOW>;
+ input;
+ line-name = "board-rev-0";
+ };
+ board_rev_bit_1 {
+ gpio-hog;
+ gpios = <1 GPIO_ACTIVE_LOW>;
+ input;
+ line-name = "board-rev-1";
+ };
+ usb3_ilimit {
+ gpio-hog;
+ gpios = <5 GPIO_ACTIVE_HIGH>;
+ input;
+ line-name = "usb-overcurrent-status";
+ };
+ };
+
+ temp_sensor: temp@4c {
+ compatible = "ti,lm75";
+ reg = <0x4c>;
+ vcc-supply = <&reg_3p3v>;
+ };
+};
+
+&i2c1 {
+ /*
+ * External I2C Bus for user peripheral
+ */
+ clock-frequency = <400000>;
+ pinctrl-0 = <&helios_i2c1_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
+&pinctrl {
+ pca0_pins: pca0_pins {
+ marvell,pins = "mpp23";
+ marvell,function = "gpio";
+ };
+ microsom_phy0_int_pins: microsom-phy0-int-pins {
+ marvell,pins = "mpp18";
+ marvell,function = "gpio";
+ };
+ helios_i2c1_pins: i2c1-pins {
+ marvell,pins = "mpp26", "mpp27";
+ marvell,function = "i2c1";
+ };
+ helios_sdhci_cd_pins: helios-sdhci-cd-pins {
+ marvell,pins = "mpp20";
+ marvell,function = "gpio";
+ };
+ helios_led_pins: helios-led-pins {
+ marvell,pins = "mpp24", "mpp25",
+ "mpp49", "mpp50",
+ "mpp52", "mpp53",
+ "mpp54";
+ marvell,function = "gpio";
+ };
+ helios_fan_pins: helios-fan-pins {
+ marvell,pins = "mpp41", "mpp43",
+ "mpp48", "mpp55";
+ marvell,function = "gpio";
+ };
+};

2
patch/kernel/mvebu-legacy/94-helios4-dts-add-wake-on-lan-support.patch
View file

@ -1,5 +1,3 @@
diff --git a/arch/arm/boot/dts/armada-388-helios4.dts b/arch/arm/boot/dts/armada-388-helios4.dts
index 705adfa8c..d5afbfc53 100644
--- a/arch/arm/boot/dts/armada-388-helios4.dts --- a/arch/arm/boot/dts/armada-388-helios4.dts
+++ b/arch/arm/boot/dts/armada-388-helios4.dts +++ b/arch/arm/boot/dts/armada-388-helios4.dts
@@ -84,6 +84,18 @@ @@ -84,6 +84,18 @@

4
patch/kernel/mvebu-legacy/compile-dtb-with-symbol-support.patch
View file

@ -1,8 +1,6 @@
diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
index 61e596650..fdb066e51 100644
--- a/scripts/Makefile.lib --- a/scripts/Makefile.lib
+++ b/scripts/Makefile.lib +++ b/scripts/Makefile.lib
@@ -244,6 +244,9 @@ cmd_gzip = (cat $(filter-out FORCE,$^) | gzip -n -f -9 > $@) || \ @@ -244,6 +244,9 @@ cmd_gzip = (cat $(filter-out FORCE,$^) |
# --------------------------------------------------------------------------- # ---------------------------------------------------------------------------
DTC ?= $(objtree)/scripts/dtc/dtc DTC ?= $(objtree)/scripts/dtc/dtc

2
patch/kernel/mvebu-legacy/dts-disable-spi-flash-on-a388-microsom.patch
View file

@ -1,5 +1,3 @@
diff --git a/arch/arm/boot/dts/armada-38x-solidrun-microsom.dtsi b/arch/arm/boot/dts/armada-38x-solidrun-microsom.dtsi
index 3a7f9c1ac..e04790639 100644
--- a/arch/arm/boot/dts/armada-38x-solidrun-microsom.dtsi --- a/arch/arm/boot/dts/armada-38x-solidrun-microsom.dtsi
+++ b/arch/arm/boot/dts/armada-38x-solidrun-microsom.dtsi +++ b/arch/arm/boot/dts/armada-38x-solidrun-microsom.dtsi
@@ -94,6 +94,7 @@ @@ -94,6 +94,7 @@

499
patch/kernel/mvebu-legacy/general-aufs4.19-20181029.patch
View file

File diff suppressed because it is too large Load diff

21
patch/kernel/mvebu-legacy/general-increasing_DMA_block_memory_allocation_to_2048.patch
View file

@ -1,27 +1,22 @@
diff --git a/arch/arm64/mm/dma-mapping.c b/arch/arm64/mm/dma-mapping.c
index 3216e09..21bce28
--- a/arch/arm64/mm/dma-mapping.c --- a/arch/arm64/mm/dma-mapping.c
+++ b/arch/arm64/mm/dma-mapping.c +++ b/arch/arm64/mm/dma-mapping.c
@@ -44,7 +44,7 @@ static pgprot_t __get_dma_pgprot(unsigned long attrs, pgprot_t prot, @@ -44,7 +44,7 @@ static pgprot_t __get_dma_pgprot(unsigne
static struct gen_pool *atomic_pool; static struct gen_pool *atomic_pool __ro_after_init;
-#define DEFAULT_DMA_COHERENT_POOL_SIZE SZ_256K -#define DEFAULT_DMA_COHERENT_POOL_SIZE SZ_256K
+#define DEFAULT_DMA_COHERENT_POOL_SIZE SZ_2M +#define DEFAULT_DMA_COHERENT_POOL_SIZE SZ_2M
static size_t atomic_pool_size __initdata = DEFAULT_DMA_COHERENT_POOL_SIZE; static size_t atomic_pool_size __initdata = DEFAULT_DMA_COHERENT_POOL_SIZE;
static int __init early_coherent_pool(char *p) static int __init early_coherent_pool(char *p)
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
index ada8eb2..8df220f
--- a/arch/arm/mm/dma-mapping.c --- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c +++ b/arch/arm/mm/dma-mapping.c
@@ -381,7 +381,7 @@ static void __dma_free_remap(void *cpu_addr, size_t size) @@ -381,7 +381,7 @@ static void __dma_free_remap(void *cpu_a
VM_ARM_DMA_CONSISTENT | VM_USERMAP); VM_ARM_DMA_CONSISTENT | VM_USERMAP);
} }
-#define DEFAULT_DMA_COHERENT_POOL_SIZE SZ_256K -#define DEFAULT_DMA_COHERENT_POOL_SIZE SZ_256K
+#define DEFAULT_DMA_COHERENT_POOL_SIZE SZ_2M +#define DEFAULT_DMA_COHERENT_POOL_SIZE SZ_2M
static struct gen_pool *atomic_pool __ro_after_init; static struct gen_pool *atomic_pool __ro_after_init;
static size_t atomic_pool_size __initdata = DEFAULT_DMA_COHERENT_POOL_SIZE; static size_t atomic_pool_size __initdata = DEFAULT_DMA_COHERENT_POOL_SIZE;