From ad07dbb90016661524b64a287051a26b3b6fdeeb Mon Sep 17 00:00:00 2001 From: Tony Date: Tue, 5 Jun 2018 16:41:44 -0400 Subject: [PATCH] Meson64 Le Potato Mainline u-boot (#998) Le Potato and NanoPi K2 now both use 2018.03 mainline U-boot. --- config/boards/lepotato.conf | 2 +- config/boards/nanopik2-s905.csc | 2 +- config/sources/meson64.conf | 82 ++- ...1020_GXBB_memory_allocation_meson_GX.patch | 17 - ...on-by-zero-in-meson_mmc_config_clock.patch | 35 ++ .../u-boot-meson64/1000-add-K2-WIP.patch | 544 ++++++++++++++++++ ...boot-meson64-support-old-bootscripts.patch | 19 + 7 files changed, 680 insertions(+), 21 deletions(-) delete mode 100644 patch/kernel/meson64-default/1020_GXBB_memory_allocation_meson_GX.patch create mode 100644 patch/u-boot/u-boot-meson64/0001-mmc-avoid-division-by-zero-in-meson_mmc_config_clock.patch create mode 100644 patch/u-boot/u-boot-meson64/1000-add-K2-WIP.patch create mode 100644 patch/u-boot/u-boot-meson64/u-boot-meson64-support-old-bootscripts.patch diff --git a/config/boards/lepotato.conf b/config/boards/lepotato.conf index da72e2e06..ecdbaedb3 100644 --- a/config/boards/lepotato.conf +++ b/config/boards/lepotato.conf @@ -1,7 +1,7 @@ # S905x Le potato quad core 2Gb SoC eMMC BOARD_NAME="Le potato" BOARDFAMILY="meson64" -BOOTCONFIG="odroid-c2_defconfig" +BOOTCONFIG="libretech-cc_defconfig" # MODULES="" MODULES_NEXT="" diff --git a/config/boards/nanopik2-s905.csc b/config/boards/nanopik2-s905.csc index 77d6ff3da..497e7d8df 100644 --- a/config/boards/nanopik2-s905.csc +++ b/config/boards/nanopik2-s905.csc @@ -1,7 +1,7 @@ # S905 K2 quad core BOARD_NAME="Nanopi K2" BOARDFAMILY="meson64" -BOOTCONFIG="odroid-c2_defconfig" +BOOTCONFIG="nanopi-k2_defconfig" # MODULES="" MODULES_NEXT="" diff --git a/config/sources/meson64.conf b/config/sources/meson64.conf index cf58edbfd..4386205c4 100644 --- a/config/sources/meson64.conf +++ b/config/sources/meson64.conf @@ -1,9 +1,9 @@ BOOTSOURCE=$MAINLINE_UBOOT_SOURCE BOOTDIR=$MAINLINE_UBOOT_DIR -BOOTBRANCH='tag:v2017.09' +BOOTBRANCH='tag:v2018.03' UBOOT_USE_GCC='> 7.0' -UBOOT_TARGET_MAP="u-boot-dtb.img;;$SRC/packages/blobs/meson/u-boot-${BOARD}.bin:u-boot.bin u-boot-dtb.img" +UBOOT_TARGET_MAP="u-boot-dtb.img;;u-boot.bin.sd.bin:u-boot.bin u-boot-dtb.img" BOOTSCRIPT="boot-meson64-${BOARD}.cmd:boot.cmd" ARCH=arm64 @@ -39,6 +39,84 @@ CPUMIN=500000 CPUMAX=1536000 GOVERNOR=ondemand +uboot_custom_postprocess() +{ + if [[ $BOARD == lepotato ]]; then + local t=$SRC/cache/sources/odroidc2-blobs/ + mv u-boot.bin bl33.bin + + $t/blx_fix.sh $t/gxl/bl30.bin \ + $t/gxl/zero_tmp \ + $t/gxl/bl30_zero.bin \ + $t/gxl/bl301.bin \ + $t/gxl/bl301_zero.bin \ + $t/gxl/bl30_new.bin bl30 + + $t/acs_tool.pyc $t/gxl/bl2.bin \ + $t/gxl/bl2_acs.bin \ + $t/gxl/acs.bin 0 + + $t/blx_fix.sh $t/gxl/bl2_acs.bin \ + $t/gxl/zero_tmp \ + $t/gxl/bl2_zero.bin \ + $t/gxl/bl21.bin \ + $t/gxl/bl21_zero.bin \ + $t/gxl/bl2_new.bin bl2 + + $t/gxl/aml_encrypt_gxl --bl3enc --input $t/gxl/bl30_new.bin + $t/gxl/aml_encrypt_gxl --bl3enc --input $t/gxl/bl31.img + $t/gxl/aml_encrypt_gxl --bl3enc --input bl33.bin + + $t/gxl/aml_encrypt_gxl --bl2sig --input $t/gxl/bl2_new.bin \ + --output bl2.n.bin.sig + + $t/gxl/aml_encrypt_gxl --bootmk \ + --output u-boot.bin \ + --bl2 bl2.n.bin.sig \ + --bl30 $t/gxl/bl30_new.bin.enc \ + --bl31 $t/gxl/bl31.img.enc \ + --bl33 bl33.bin.enc + + fi + + if [[ $BOARD == nanopik2-s905 ]]; then + local t=$SRC/cache/sources/odroidc2-blobs/ + mv u-boot.bin bl33.bin + + $t/blx_fix.sh $t/k2/bl30.bin \ + $t/k2/zero_tmp \ + $t/k2/bl30_zero.bin \ + $t/k2/bl301.bin \ + $t/k2/bl301_zero.bin \ + $t/k2/bl30_new.bin bl30 + + $t/k2/fip_create --bl30 $t/k2/bl30_new.bin \ + --bl31 $t/k2/bl31.img \ + --bl33 bl33.bin \ + $t/k2/fip.bin + + $t/k2/fip_create --dump $t/k2/fip.bin + + $t/acs_tool.pyc $t/k2/bl2.bin \ + $t/k2/bl2_acs.bin \ + $t/k2/acs.bin 0 + + $t/blx_fix.sh $t/k2/bl2_acs.bin \ + $t/k2/zero_tmp \ + $t/k2/bl2_zero.bin \ + $t/k2/bl21.bin \ + $t/k2/bl21_zero.bin \ + $t/k2/bl2_new.bin bl2 + + cat $t/k2/bl2_new.bin $t/k2/fip.bin > boot_new.bin + + $t/k2/aml_encrypt_gxb --bootsig \ + --input boot_new.bin \ + --output u-boot.bin + + fi +} + write_uboot_platform() { dd if=$1/u-boot.bin of=$2 bs=1 count=442 conv=fsync > /dev/null 2>&1 diff --git a/patch/kernel/meson64-default/1020_GXBB_memory_allocation_meson_GX.patch b/patch/kernel/meson64-default/1020_GXBB_memory_allocation_meson_GX.patch deleted file mode 100644 index 7778f98f5..000000000 --- a/patch/kernel/meson64-default/1020_GXBB_memory_allocation_meson_GX.patch +++ /dev/null @@ -1,17 +0,0 @@ -diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi -index f175db8..cb642e9 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi -+++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi -@@ -72,6 +72,12 @@ - no-map; - }; - -+ /* Alternate 3 MiB reserved for ARM Trusted Firmware (BL31) */ -+ secmon_reserved_alt: secmon@05000000 { -+ reg = <0x0 0x05000000 0x0 0x300000>; -+ no-map; -+ }; -+ - linux,cma { - compatible = "shared-dma-pool"; - reusable; diff --git a/patch/u-boot/u-boot-meson64/0001-mmc-avoid-division-by-zero-in-meson_mmc_config_clock.patch b/patch/u-boot/u-boot-meson64/0001-mmc-avoid-division-by-zero-in-meson_mmc_config_clock.patch new file mode 100644 index 000000000..47f5d0bda --- /dev/null +++ b/patch/u-boot/u-boot-meson64/0001-mmc-avoid-division-by-zero-in-meson_mmc_config_clock.patch @@ -0,0 +1,35 @@ +From 7f0a669b9b283d14927c2ac89d05e2d24dd31ecb Mon Sep 17 00:00:00 2001 +From: Heinrich Schuchardt +Date: Sat, 17 Mar 2018 12:24:44 +0100 +Subject: [PATCH 1/1] mmc: avoid division by zero in meson_mmc_config_clock + +The Odroid C2 fails to read from mmc with U-Boot v2018.03. +The change avoids a division by zero. + +The fix was suggested by Jaehoon in +https://lists.denx.de/pipermail/u-boot/2018-January/318577.html + +Reported-by: Vagrant Cascadian +Suggested-by: Jaehoon Chung +Signed-off-by: Heinrich Schuchardt +--- + drivers/mmc/meson_gx_mmc.c | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/drivers/mmc/meson_gx_mmc.c b/drivers/mmc/meson_gx_mmc.c +index a2cd5d3a44..454593eec4 100644 +--- a/drivers/mmc/meson_gx_mmc.c ++++ b/drivers/mmc/meson_gx_mmc.c +@@ -35,6 +35,9 @@ static void meson_mmc_config_clock(struct mmc *mmc) + uint32_t meson_mmc_clk = 0; + unsigned int clk, clk_src, clk_div; + ++ if (!mmc->clock) ++ return; ++ + /* 1GHz / CLK_MAX_DIV = 15,9 MHz */ + if (mmc->clock > 16000000) { + clk = SD_EMMC_CLKSRC_DIV2; +-- +2.14.2 + diff --git a/patch/u-boot/u-boot-meson64/1000-add-K2-WIP.patch b/patch/u-boot/u-boot-meson64/1000-add-K2-WIP.patch new file mode 100644 index 000000000..9b892b79a --- /dev/null +++ b/patch/u-boot/u-boot-meson64/1000-add-K2-WIP.patch @@ -0,0 +1,544 @@ +diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile +index 20a4c37..b1fcedc 100644 +--- a/arch/arm/dts/Makefile ++++ b/arch/arm/dts/Makefile +@@ -56,6 +56,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \ + rv1108-evb.dtb + dtb-$(CONFIG_ARCH_MESON) += \ + meson-gxbb-odroidc2.dtb \ ++ meson-gxbb-nanopi-k2.dtb \ + meson-gxl-s905x-p212.dtb \ + meson-gxl-s905x-libretech-cc.dtb \ + meson-gxl-s905x-khadas-vim.dtb +diff --git a/arch/arm/dts/meson-gxbb-nanopi-k2.dts b/arch/arm/dts/meson-gxbb-nanopi-k2.dts +new file mode 100644 +index 0000000..078a37c +--- /dev/null ++++ b/arch/arm/dts/meson-gxbb-nanopi-k2.dts +@@ -0,0 +1,330 @@ ++/* ++ * Copyright (c) 2017 Andreas Färber ++ * ++ * This file is dual-licensed: you can use it either under the terms ++ * of the GPL or the X11 license, at your option. Note that this dual ++ * licensing only applies to this file, and not this project as a ++ * whole. ++ * ++ * a) This library is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of the ++ * License, or (at your option) any later version. ++ * ++ * This library is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * Or, alternatively, ++ * ++ * b) Permission is hereby granted, free of charge, to any person ++ * obtaining a copy of this software and associated documentation ++ * files (the "Software"), to deal in the Software without ++ * restriction, including without limitation the rights to use, ++ * copy, modify, merge, publish, distribute, sublicense, and/or ++ * sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following ++ * conditions: ++ * ++ * The above copyright notice and this permission notice shall be ++ * included in all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, ++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES ++ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND ++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT ++ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, ++ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING ++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR ++ * OTHER DEALINGS IN THE SOFTWARE. ++ * ++ * SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++ */ ++ ++/dts-v1/; ++ ++#include "meson-gxbb.dtsi" ++#include ++ ++/ { ++ compatible = "friendlyarm,nanopi-k2", "amlogic,meson-gxbb"; ++ model = "FriendlyElec NanoPi-K2"; ++ ++ aliases { ++ serial0 = &uart_AO; ++ }; ++ ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ ++ memory@0 { ++ device_type = "memory"; ++ reg = <0x0 0x0 0x0 0x80000000>; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ ++ stat { ++ label = "nanopi-k2:blue:stat"; ++ gpios = <&gpio_ao GPIOAO_13 GPIO_ACTIVE_HIGH>; ++ default-state = "on"; ++ panic-indicator; ++ }; ++ }; ++ ++ vdd_5v: regulator-vdd-5v { ++ compatible = "regulator-fixed"; ++ regulator-name = "VDD_5V"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ }; ++ ++ vddio_ao18: regulator-vddio-ao18 { ++ compatible = "regulator-fixed"; ++ regulator-name = "VDDIO_AO18"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ }; ++ ++ vddio_ao3v3: regulator-vddio-ao3v3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "VDDIO_AO3.3V"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ }; ++ ++ vddio_tf: regulator-vddio-tf { ++ compatible = "regulator-gpio"; ++ ++ regulator-name = "VDDIO_TF"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ ++ gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>; ++ gpios-states = <0>; ++ ++ states = <3300000 0>, ++ <1800000 1>; ++ ++ regulator-settling-time-up-us = <100>; ++ regulator-settling-time-down-us = <5000>; ++ }; ++ ++ wifi_32k: wifi-32k { ++ compatible = "pwm-clock"; ++ #clock-cells = <0>; ++ clock-frequency = <32768>; ++ pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */ ++ }; ++ ++ sdio_pwrseq: sdio-pwrseq { ++ compatible = "mmc-pwrseq-simple"; ++ reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>; ++ clocks = <&wifi_32k>; ++ clock-names = "ext_clock"; ++ }; ++ ++ vcc1v8: regulator-vcc1v8 { ++ compatible = "regulator-fixed"; ++ regulator-name = "VCC1.8V"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ }; ++ ++ vcc3v3: regulator-vcc3v3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "VCC3.3V"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ }; ++ ++ emmc_pwrseq: emmc-pwrseq { ++ compatible = "mmc-pwrseq-emmc"; ++ reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>; ++ }; ++}; ++ ++ðmac { ++ status = "okay"; ++ pinctrl-0 = <ð_rgmii_pins>; ++ pinctrl-names = "default"; ++ ++ phy-handle = <ð_phy0>; ++ phy-mode = "rgmii"; ++ ++ amlogic,tx-delay-ns = <2>; ++ ++ snps,reset-gpio = <&gpio GPIOZ_14 0>; ++ snps,reset-delays-us = <0 10000 1000000>; ++ snps,reset-active-low; ++ ++ mdio { ++ compatible = "snps,dwmac-mdio"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ eth_phy0: ethernet-phy@0 { ++ /* Realtek RTL8211F (0x001cc916) */ ++ reg = <0>; ++ }; ++ }; ++}; ++ ++&ir { ++ status = "okay"; ++ pinctrl-0 = <&remote_input_ao_pins>; ++ pinctrl-names = "default"; ++}; ++ ++&pinctrl_aobus { ++ gpio-line-names = "UART TX", "UART RX", "Power Control", "Power Key In", ++ "VCCK En", "CON1 Header Pin31", ++ "I2S Header Pin6", "IR In", "I2S Header Pin7", ++ "I2S Header Pin3", "I2S Header Pin4", ++ "I2S Header Pin5", "HDMI CEC", "SYS LED"; ++}; ++ ++&pinctrl_periphs { ++ gpio-line-names = /* Bank GPIOZ */ ++ "Eth MDIO", "Eth MDC", "Eth RGMII RX Clk", ++ "Eth RX DV", "Eth RX D0", "Eth RX D1", "Eth RX D2", ++ "Eth RX D3", "Eth RGMII TX Clk", "Eth TX En", ++ "Eth TX D0", "Eth TX D1", "Eth TX D2", "Eth TX D3", ++ "Eth PHY nRESET", "Eth PHY Intc", ++ /* Bank GPIOH */ ++ "HDMI HPD", "HDMI DDC SDA", "HDMI DDC SCL", ++ "CON1 Header Pin33", ++ /* Bank BOOT */ ++ "eMMC D0", "eMMC D1", "eMMC D2", "eMMC D3", "eMMC D4", ++ "eMMC D5", "eMMC D6", "eMMC D7", "eMMC Clk", ++ "eMMC Reset", "eMMC CMD", ++ "", "", "", "", "eMMC DS", ++ "", "", ++ /* Bank CARD */ ++ "SDCard D1", "SDCard D0", "SDCard CLK", "SDCard CMD", ++ "SDCard D3", "SDCard D2", "SDCard Det", ++ /* Bank GPIODV */ ++ "", "", "", "", "", "", "", "", "", "", "", "", "", ++ "", "", "", "", "", "", "", "", "", "", "", ++ "I2C A SDA", "I2C A SCK", "I2C B SDA", "I2C B SCK", ++ "VDDEE Regulator", "VCCK Regulator", ++ /* Bank GPIOY */ ++ "CON1 Header Pin7", "CON1 Header Pin11", ++ "CON1 Header Pin13", "CON1 Header Pin15", ++ "CON1 Header Pin18", "CON1 Header Pin19", ++ "CON1 Header Pin22", "CON1 Header Pin21", ++ "CON1 Header Pin24", "CON1 Header Pin23", ++ "CON1 Header Pin26", "CON1 Header Pin29", ++ "CON1 Header Pin32", "CON1 Header Pin8", ++ "CON1 Header Pin10", "CON1 Header Pin16", ++ "CON1 Header Pin12", ++ /* Bank GPIOX */ ++ "WIFI SDIO D0", "WIFI SDIO D1", "WIFI SDIO D2", ++ "WIFI SDIO D3", "WIFI SDIO CLK", "WIFI SDIO CMD", ++ "WIFI Power Enable", "WIFI WAKE HOST", ++ "Bluetooth PCM DOUT", "Bluetooth PCM DIN", ++ "Bluetooth PCM SYNC", "Bluetooth PCM CLK", ++ "Bluetooth UART TX", "Bluetooth UART RX", ++ "Bluetooth UART CTS", "Bluetooth UART RTS", ++ "", "", "", "WIFI 32K", "Bluetooth Enable", ++ "Bluetooth WAKE HOST", ++ /* Bank GPIOCLK */ ++ "", "CON1 Header Pin35", "", "", ++ /* GPIO_TEST_N */ ++ ""; ++}; ++ ++&pwm_ef { ++ status = "okay"; ++ pinctrl-0 = <&pwm_e_pins>; ++ pinctrl-names = "default"; ++ clocks = <&clkc CLKID_FCLK_DIV4>; ++ clock-names = "clkin0"; ++}; ++ ++&saradc { ++ status = "okay"; ++ vref-supply = <&vddio_ao18>; ++}; ++ ++/* SD */ ++&sd_emmc_b { ++ status = "okay"; ++ pinctrl-0 = <&sdcard_pins>; ++ pinctrl-names = "default"; ++ ++ bus-width = <4>; ++ cap-sd-highspeed; ++ sd-uhs-sdr12; ++ sd-uhs-sdr25; ++ sd-uhs-sdr50; ++ sd-uhs-sdr104; ++ max-frequency = <200000000>; ++ disable-wp; ++ ++ cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_HIGH>; ++ cd-inverted; ++ ++ vmmc-supply = <&vddio_ao3v3>; ++ vqmmc-supply = <&vddio_tf>; ++}; ++ ++/* eMMC */ ++&sd_emmc_c { ++ status = "disabled"; ++ pinctrl-0 = <&emmc_pins>; ++ pinctrl-names = "default"; ++ ++ bus-width = <8>; ++ max-frequency = <200000000>; ++ non-removable; ++ disable-wp; ++ cap-mmc-highspeed; ++ mmc-ddr-1_8v; ++ mmc-hs200-1_8v; ++ ++ mmc-pwrseq = <&emmc_pwrseq>; ++ vmmc-supply = <&vcc3v3>; ++ vqmmc-supply = <&vcc1v8>; ++}; ++ ++/* DBG_UART */ ++&uart_AO { ++ status = "okay"; ++ pinctrl-0 = <&uart_ao_a_pins>; ++ pinctrl-names = "default"; ++}; ++ ++/* Bluetooth on AP6212 */ ++&uart_A { ++ status = "disabled"; ++ pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>; ++ pinctrl-names = "default"; ++}; ++ ++/* 40-pin CON1 */ ++&uart_C { ++ status = "disabled"; ++ pinctrl-0 = <&uart_c_pins>; ++ pinctrl-names = "default"; ++}; ++ ++&usb0_phy { ++ status = "okay"; ++ phy-supply = <&vdd_5v>; ++}; ++ ++&usb1_phy { ++ status = "okay"; ++}; ++ ++&usb0 { ++ status = "okay"; ++}; ++ ++&usb1 { ++ status = "okay"; ++}; +diff --git a/arch/arm/mach-meson/Kconfig b/arch/arm/mach-meson/Kconfig +index 0350787..32d86b2 100644 +--- a/arch/arm/mach-meson/Kconfig ++++ b/arch/arm/mach-meson/Kconfig +@@ -26,7 +26,12 @@ config TARGET_ODROID_C2 + ODROID-C2 is a single board computer based on Meson GXBaby + with 2 GiB of RAM, Gigabit Ethernet, HDMI, 4 USB, micro-SD + slot, eMMC, IR receiver and a 40-pin GPIO header. +- ++config TARGET_NANOPI_K2 ++ bool "NANOPI_K2" ++ help ++ NANOPI K2 is a single board computer based on Meson GXBaby ++ with 2 GiB of RAM, Gigabit Ethernet, AP6212 Wifi, HDMI, 4 USB, ++ micro-SD slot, eMMC, IR receiver and a 40-pin GPIO header. + endif + + if MESON_GXL +@@ -62,6 +67,8 @@ config SYS_MALLOC_F_LEN + + source "board/amlogic/odroid-c2/Kconfig" + ++source "board/amlogic/nanopi-k2/Kconfig" ++ + source "board/amlogic/p212/Kconfig" + + source "board/amlogic/libretech-cc/Kconfig" +diff --git a/board/amlogic/nanopi-k2/Kconfig b/board/amlogic/nanopi-k2/Kconfig +new file mode 100644 +index 0000000..374bda2 +--- /dev/null ++++ b/board/amlogic/nanopi-k2/Kconfig +@@ -0,0 +1,12 @@ ++if TARGET_NANOPI_K2 ++ ++config SYS_BOARD ++ default "nanopi-k2" ++ ++config SYS_VENDOR ++ default "amlogic" ++ ++config SYS_CONFIG_NAME ++ default "nanopi-k2" ++ ++endif +diff --git a/board/amlogic/nanopi-k2/Makefile b/board/amlogic/nanopi-k2/Makefile +new file mode 100644 +index 0000000..d3e7a08 +--- /dev/null ++++ b/board/amlogic/nanopi-k2/Makefile +@@ -0,0 +1,7 @@ ++# ++# (C) Copyright 2018 Thomas McKahan ++# ++# SPDX-License-Identifier: GPL-2.0+ ++# ++ ++obj-y := nanopi-k2.o +diff --git a/board/amlogic/nanopi-k2/nanopi-k2.c b/board/amlogic/nanopi-k2/nanopi-k2.c +new file mode 100644 +index 0000000..8a2b5c7 +--- /dev/null ++++ b/board/amlogic/nanopi-k2/nanopi-k2.c +@@ -0,0 +1,64 @@ ++/* ++ * (C) Copyright 2018 Thomas McKahan ++ * ++ * SPDX-License-Identifier: GPL-2.0+ ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define EFUSE_SN_OFFSET 20 ++#define EFUSE_SN_SIZE 16 ++#define EFUSE_MAC_OFFSET 52 ++#define EFUSE_MAC_SIZE 6 ++ ++int board_init(void) ++{ ++ return 0; ++} ++ ++int misc_init_r(void) ++{ ++ u8 mac_addr[EFUSE_MAC_SIZE]; ++ char serial[EFUSE_SN_SIZE]; ++ ssize_t len; ++ ++ meson_gx_eth_init(PHY_INTERFACE_MODE_RGMII, 0); ++ ++ /* Enable power and clock gate */ ++ setbits_le32(GXBB_GCLK_MPEG_0, GXBB_GCLK_MPEG_0_I2C); ++ ++ /* Reset PHY on GPIOZ_14 */ ++ clrbits_le32(GXBB_GPIO_EN(3), BIT(14)); ++ clrbits_le32(GXBB_GPIO_OUT(3), BIT(14)); ++ mdelay(10); ++ setbits_le32(GXBB_GPIO_OUT(3), BIT(14)); ++ ++ if (!eth_env_get_enetaddr("ethaddr", mac_addr)) { ++ len = meson_sm_read_efuse(EFUSE_MAC_OFFSET, ++ mac_addr, EFUSE_MAC_SIZE); ++ if (len == EFUSE_MAC_SIZE && is_valid_ethaddr(mac_addr)) ++ eth_env_set_enetaddr("ethaddr", mac_addr); ++ } ++ ++ if (!env_get("serial#")) { ++ len = meson_sm_read_efuse(EFUSE_SN_OFFSET, serial, ++ EFUSE_SN_SIZE); ++ if (len == EFUSE_SN_SIZE) ++ env_set("serial#", serial); ++ } ++ ++ return 0; ++} ++ ++int ft_board_setup(void *blob, bd_t *bd) ++{ ++ meson_gx_init_reserved_memory(blob); ++ ++ return 0; ++} +diff --git a/configs/nanopi-k2_defconfig b/configs/nanopi-k2_defconfig +new file mode 100644 +index 0000000..1ff1bff +--- /dev/null ++++ b/configs/nanopi-k2_defconfig +@@ -0,0 +1,36 @@ ++CONFIG_ARM=y ++CONFIG_ARCH_MESON=y ++CONFIG_SYS_TEXT_BASE=0x01000000 ++CONFIG_MESON_GXBB=y ++CONFIG_TARGET_NANOPI_K2=y ++CONFIG_IDENT_STRING=" nanopi-k2" ++CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-nanopi-k2" ++CONFIG_DEBUG_UART=y ++CONFIG_OF_BOARD_SETUP=y ++# CONFIG_DISPLAY_CPUINFO is not set ++# CONFIG_DISPLAY_BOARDINFO is not set ++# CONFIG_CMD_BDI is not set ++# CONFIG_CMD_IMI is not set ++CONFIG_CMD_GPIO=y ++CONFIG_CMD_I2C=y ++# CONFIG_CMD_LOADS is not set ++CONFIG_CMD_MMC=y ++# CONFIG_CMD_SETEXPR is not set ++CONFIG_OF_CONTROL=y ++CONFIG_NET_RANDOM_ETHADDR=y ++CONFIG_DM_GPIO=y ++CONFIG_DM_I2C=y ++CONFIG_SYS_I2C_MESON=y ++CONFIG_DM_MMC=y ++CONFIG_MMC_MESON_GX=y ++CONFIG_DM_ETH=y ++CONFIG_ETH_DESIGNWARE=y ++CONFIG_PINCTRL=y ++CONFIG_PINCTRL_MESON_GXBB=y ++CONFIG_DEBUG_UART_MESON=y ++CONFIG_DEBUG_UART_BASE=0xc81004c0 ++CONFIG_DEBUG_UART_CLOCK=24000000 ++CONFIG_DEBUG_UART_ANNOUNCE=y ++CONFIG_DEBUG_UART_SKIP_INIT=y ++CONFIG_MESON_SERIAL=y ++CONFIG_OF_LIBFDT_OVERLAY=y +diff --git a/include/configs/nanopi-k2.h b/include/configs/nanopi-k2.h +new file mode 100644 +index 0000000..471ebfb +--- /dev/null ++++ b/include/configs/nanopi-k2.h +@@ -0,0 +1,20 @@ ++/* ++ * Configuration for ODROID-C2 ++ * (C) Copyright 2016 Beniamino Galvani ++ * ++ * SPDX-License-Identifier: GPL-2.0+ ++ */ ++ ++#ifndef __CONFIG_H ++#define __CONFIG_H ++ ++#define CONFIG_MISC_INIT_R ++ ++/* Serial setup */ ++#define CONFIG_CONS_INDEX 0 ++ ++#define MESON_FDTFILE_SETTING "fdtfile=amlogic/meson-gxbb-nanopi-k2.dtb\0" ++ ++#include ++ ++#endif /* __CONFIG_H */ diff --git a/patch/u-boot/u-boot-meson64/u-boot-meson64-support-old-bootscripts.patch b/patch/u-boot/u-boot-meson64/u-boot-meson64-support-old-bootscripts.patch new file mode 100644 index 000000000..3eca9fa7a --- /dev/null +++ b/patch/u-boot/u-boot-meson64/u-boot-meson64-support-old-bootscripts.patch @@ -0,0 +1,19 @@ +diff --git a/include/configs/meson-gxbb-common.h b/include/configs/meson-gxbb-common.h +index 5794bc0..6f45a5c 100644 +--- a/include/configs/meson-gxbb-common.h ++++ b/include/configs/meson-gxbb-common.h +@@ -35,10 +35,14 @@ + + #define CONFIG_EXTRA_ENV_SETTINGS \ + "fdt_addr_r=0x01000000\0" \ ++ "dtb_mem_addr=0x01000000\0" \ + "scriptaddr=0x1f000000\0" \ + "kernel_addr_r=0x01080000\0" \ + "pxefile_addr_r=0x01080000\0" \ ++ "loadaddr=0x01080000\0" \ + "ramdisk_addr_r=0x13000000\0" \ ++ "initrd_start=0x13000000\0" \ ++ "bloader=ext4load mmc 0:1\0" \ + MESON_FDTFILE_SETTING \ + BOOTENV +