diff --git a/patch/kernel/rockchip-default/xx_ fix_reboot_issue_tinkerboard.patch b/patch/kernel/rockchip-default/xx_ fix_reboot_issue_tinkerboard.patch
new file mode 100644
index 000000000..cddcfe13d
--- /dev/null
+++ b/patch/kernel/rockchip-default/xx_ fix_reboot_issue_tinkerboard.patch	
@@ -0,0 +1,135 @@
+diff --git a/arch/arm/boot/dts/rk3288-miniarm.dts b/arch/arm/boot/dts/rk3288-miniarm.dts
+index 85da76e..b683d97 100644
+--- a/arch/arm/boot/dts/rk3288-miniarm.dts
++++ b/arch/arm/boot/dts/rk3288-miniarm.dts
+@@ -268,12 +268,12 @@
+ 		vcc4-supply = <&vcc_sys>;
+ 		vcc6-supply = <&vcc_sys>;
+ 		vcc7-supply = <&vcc_sys>;
+-		vcc8-supply = <&vcc_18>;
++		vcc8-supply = <&vcc_io>;
+ 		vcc9-supply = <&vcc_io>;
+ 		vcc10-supply = <&vcc_io>;
+ 		vcc11-supply = <&vcc_sys>;
+ 		vcc12-supply = <&vcc_io>;
+-		vddio-supply = <&vcc18_ldo1>;
++		vddio-supply = <&vcc_io>;
+ 
+ 		regulators {
+ 			vdd_cpu: DCDC_REG1 {
+@@ -418,7 +418,6 @@
+ 			};
+ 
+ 			vcc33_sd: SWITCH_REG1 {
+-				regulator-always-on;
+ 				regulator-boot-on;
+ 				regulator-name = "vcc33_sd";
+ 				regulator-state-mem {
+@@ -507,7 +506,7 @@
+ 	pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
+ 	status = "okay";
+ 	supports-sd;
+-	vmmc-supply = <&vcc_sd>;
++	vmmc-supply = <&vcc33_sd>;
+ 	vqmmc-supply = <&vccio_sd>;
+ };
+ 
+diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c
+index 07469dc..adff1a3 100644
+--- a/drivers/clk/rockchip/clk-rk3288.c
++++ b/drivers/clk/rockchip/clk-rk3288.c
+@@ -291,13 +291,13 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = {
+ 	COMPOSITE_NOMUX(0, "aclk_core_mp", "armclk", CLK_IGNORE_UNUSED,
+ 			RK3288_CLKSEL_CON(0), 4, 4, DFLAGS | CLK_DIVIDER_READ_ONLY,
+ 			RK3288_CLKGATE_CON(12), 6, GFLAGS),
+-	COMPOSITE_NOMUX(0, "atclk", "armclk", 0,
++	COMPOSITE_NOMUX(0, "atclk", "armclk", CLK_IGNORE_UNUSED,
+ 			RK3288_CLKSEL_CON(37), 4, 5, DFLAGS | CLK_DIVIDER_READ_ONLY,
+ 			RK3288_CLKGATE_CON(12), 7, GFLAGS),
+ 	COMPOSITE_NOMUX(0, "pclk_dbg_pre", "armclk", CLK_IGNORE_UNUSED,
+ 			RK3288_CLKSEL_CON(37), 9, 5, DFLAGS | CLK_DIVIDER_READ_ONLY,
+ 			RK3288_CLKGATE_CON(12), 8, GFLAGS),
+-	GATE(0, "pclk_dbg", "pclk_dbg_pre", 0,
++	GATE(0, "pclk_dbg", "pclk_dbg_pre", CLK_IGNORE_UNUSED,
+ 			RK3288_CLKGATE_CON(12), 9, GFLAGS),
+ 	GATE(0, "cs_dbg", "pclk_dbg_pre", CLK_IGNORE_UNUSED,
+ 			RK3288_CLKGATE_CON(12), 10, GFLAGS),
+@@ -627,7 +627,7 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = {
+ 	INVERTER(SCLK_HSADC, "sclk_hsadc", "sclk_hsadc_out",
+ 			RK3288_CLKSEL_CON(22), 7, IFLAGS),
+ 
+-	GATE(0, "jtag", "ext_jtag", 0,
++	GATE(0, "jtag", "ext_jtag", CLK_IGNORE_UNUSED,
+ 			RK3288_CLKGATE_CON(4), 14, GFLAGS),
+ 
+ 	COMPOSITE_NODIV(SCLK_USBPHY480M_SRC, "usbphy480m_src", mux_usbphy480m_p, 0,
+@@ -636,7 +636,7 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = {
+ 	COMPOSITE_NODIV(SCLK_HSICPHY480M, "sclk_hsicphy480m", mux_hsicphy480m_p, 0,
+ 			RK3288_CLKSEL_CON(29), 0, 2, MFLAGS,
+ 			RK3288_CLKGATE_CON(3), 6, GFLAGS),
+-	GATE(0, "hsicphy12m_xin12m", "xin12m", 0,
++	GATE(0, "hsicphy12m_xin12m", "xin12m", CLK_IGNORE_UNUSED,
+ 			RK3288_CLKGATE_CON(13), 9, GFLAGS),
+ 	DIV(0, "hsicphy12m_usbphy", "sclk_hsicphy480m", 0,
+ 			RK3288_CLKSEL_CON(11), 8, 6, DFLAGS),
+@@ -809,7 +809,15 @@ static const char *const rk3288_critical_clocks[] __initconst = {
+ 	"aclk_cpu",
+ 	"aclk_peri",
+ 	"hclk_peri",
+-	"pclk_pd_pmu",
++	"pclk_alive_niu",
++ 	"pclk_pd_pmu",
++ 	"pclk_pmu_niu",
++	"pclk_core_niu",
++	"pclk_ddrupctl0",
++	"pclk_publ0",
++	"pclk_ddrupctl1",
++	"pclk_publ1",
++	"pmu_hclk_otg0"
+ };
+ 
+ static void __iomem *rk3288_cru_base;
+diff --git a/drivers/mmc/host/dw_mmc-rockchip.c b/drivers/mmc/host/dw_mmc-rockchip.c
+index 29e3ae9..7f35aa4 100644
+--- a/drivers/mmc/host/dw_mmc-rockchip.c
++++ b/drivers/mmc/host/dw_mmc-rockchip.c
+@@ -13,7 +13,9 @@
+ #include <linux/mmc/host.h>
+ #include <linux/mmc/dw_mmc.h>
+ #include <linux/of_address.h>
++#include <linux/regulator/consumer.h>
+ #include <linux/slab.h>
++#include <linux/delay.h>
+ 
+ #include "dw_mmc.h"
+ #include "dw_mmc-pltfm.h"
+@@ -285,6 +287,21 @@ static int dw_mci_rockchip_probe(struct platform_device *pdev)
+ 	return dw_mci_pltfm_register(pdev, drv_data);
+ }
+ 
++static void dw_mci_rockchip_platfm_shutdown(struct platform_device *pdev)
++{
++	struct dw_mci *host = platform_get_drvdata(pdev);
++	struct mmc_host *mmc = host->cur_slot->mmc;
++	int ret;
++
++	mdelay(20);
++
++	if (!IS_ERR(mmc->supply.vmmc))
++		ret = regulator_enable(mmc->supply.vmmc);
++
++	if (!IS_ERR(mmc->supply.vqmmc))
++		regulator_set_voltage(mmc->supply.vqmmc, 3000000, 3300000);
++}
++
+ #ifdef CONFIG_PM_SLEEP
+ static int dw_mci_rockchip_suspend(struct device *dev)
+ {
+@@ -308,6 +325,7 @@ static SIMPLE_DEV_PM_OPS(dw_mci_rockchip_pmops,
+ static struct platform_driver dw_mci_rockchip_pltfm_driver = {
+ 	.probe		= dw_mci_rockchip_probe,
+ 	.remove		= dw_mci_pltfm_remove,
++ 	.shutdown	= dw_mci_rockchip_platfm_shutdown,
+ 	.driver		= {
+ 		.name		= "dwmmc_rockchip",
+ 		.of_match_table	= dw_mci_rockchip_match,