mirror of
https://github.com/Fishwaldo/build.git
synced 2025-03-17 20:31:25 +00:00
Merge branch 'master' into desktop
This commit is contained in:
Igor Pecovnik
commit
b1fcf618b6
23 changed files with 542 additions and 505 deletions
|
|
@ -1,12 +1,13 @@
|
|||
#
|
||||
# Automatically generated file; DO NOT EDIT.
|
||||
# Linux/arm64 5.9.12 Kernel Configuration
|
||||
# Linux/arm64 5.10.6 Kernel Configuration
|
||||
#
|
||||
CONFIG_CC_VERSION_TEXT="aarch64-linux-gnu-gcc (GNU Toolchain for the A-profile Architecture 8.3-2019.03 (arm-rel-8.36)) 8.3.0"
|
||||
CONFIG_CC_IS_GCC=y
|
||||
CONFIG_GCC_VERSION=80300
|
||||
CONFIG_LD_VERSION=232000000
|
||||
CONFIG_CLANG_VERSION=0
|
||||
CONFIG_LLD_VERSION=0
|
||||
CONFIG_CC_CAN_LINK=y
|
||||
CONFIG_CC_CAN_LINK_STATIC=y
|
||||
CONFIG_CC_HAS_ASM_GOTO=y
|
||||
|
|
@ -50,6 +51,7 @@ CONFIG_GENERIC_IRQ_CHIP=y
|
|||
CONFIG_IRQ_DOMAIN=y
|
||||
CONFIG_IRQ_SIM=y
|
||||
CONFIG_IRQ_DOMAIN_HIERARCHY=y
|
||||
CONFIG_GENERIC_IRQ_IPI=y
|
||||
CONFIG_GENERIC_MSI_IRQ=y
|
||||
CONFIG_GENERIC_MSI_IRQ_DOMAIN=y
|
||||
CONFIG_IRQ_MSI_IOMMU=y
|
||||
|
|
@ -183,6 +185,7 @@ CONFIG_RD_ZSTD=y
|
|||
CONFIG_BOOT_CONFIG=y
|
||||
CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y
|
||||
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
|
||||
CONFIG_LD_ORPHAN_WARN=y
|
||||
CONFIG_SYSCTL=y
|
||||
CONFIG_HAVE_UID16=y
|
||||
CONFIG_SYSCTL_EXCEPTION_TRACE=y
|
||||
|
|
@ -219,6 +222,8 @@ CONFIG_BPF_SYSCALL=y
|
|||
CONFIG_ARCH_WANT_DEFAULT_BPF_JIT=y
|
||||
# CONFIG_BPF_JIT_ALWAYS_ON is not set
|
||||
CONFIG_BPF_JIT_DEFAULT_ON=y
|
||||
CONFIG_USERMODE_DRIVER=y
|
||||
# CONFIG_BPF_PRELOAD is not set
|
||||
# CONFIG_USERFAULTFD is not set
|
||||
CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y
|
||||
CONFIG_RSEQ=y
|
||||
|
|
@ -255,7 +260,8 @@ CONFIG_ARM64=y
|
|||
CONFIG_64BIT=y
|
||||
CONFIG_MMU=y
|
||||
CONFIG_ARM64_PAGE_SHIFT=12
|
||||
CONFIG_ARM64_CONT_SHIFT=4
|
||||
CONFIG_ARM64_CONT_PTE_SHIFT=4
|
||||
CONFIG_ARM64_CONT_PMD_SHIFT=4
|
||||
CONFIG_ARCH_MMAP_RND_BITS_MIN=18
|
||||
CONFIG_ARCH_MMAP_RND_BITS_MAX=33
|
||||
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11
|
||||
|
|
@ -317,6 +323,7 @@ CONFIG_ARCH_S32=y
|
|||
# CONFIG_ARCH_THUNDER2 is not set
|
||||
# CONFIG_ARCH_UNIPHIER is not set
|
||||
# CONFIG_ARCH_VEXPRESS is not set
|
||||
# CONFIG_ARCH_VISCONTI is not set
|
||||
# CONFIG_ARCH_XGENE is not set
|
||||
# CONFIG_ARCH_ZX is not set
|
||||
# CONFIG_ARCH_ZYNQMP is not set
|
||||
|
|
@ -348,6 +355,7 @@ CONFIG_ARM64_WORKAROUND_REPEAT_TLBI=y
|
|||
CONFIG_ARM64_ERRATUM_1286807=y
|
||||
CONFIG_ARM64_ERRATUM_1463225=y
|
||||
CONFIG_ARM64_ERRATUM_1542419=y
|
||||
CONFIG_ARM64_ERRATUM_1508412=y
|
||||
CONFIG_CAVIUM_ERRATUM_22375=y
|
||||
CONFIG_CAVIUM_ERRATUM_23144=y
|
||||
CONFIG_CAVIUM_ERRATUM_23154=y
|
||||
|
|
@ -399,7 +407,6 @@ CONFIG_SYS_SUPPORTS_HUGETLBFS=y
|
|||
CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y
|
||||
CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y
|
||||
CONFIG_ARCH_ENABLE_SPLIT_PMD_PTLOCK=y
|
||||
CONFIG_SECCOMP=y
|
||||
CONFIG_PARAVIRT=y
|
||||
# CONFIG_PARAVIRT_TIME_ACCOUNTING is not set
|
||||
CONFIG_KEXEC=y
|
||||
|
|
@ -409,8 +416,6 @@ CONFIG_XEN_DOM0=y
|
|||
CONFIG_XEN=y
|
||||
CONFIG_FORCE_MAX_ZONEORDER=11
|
||||
CONFIG_UNMAP_KERNEL_AT_EL0=y
|
||||
CONFIG_HARDEN_BRANCH_PREDICTOR=y
|
||||
CONFIG_ARM64_SSBD=y
|
||||
CONFIG_RODATA_FULL_DEFAULT_ENABLED=y
|
||||
# CONFIG_ARM64_SW_TTBR0_PAN is not set
|
||||
CONFIG_ARM64_TAGGED_ADDR_ABI=y
|
||||
|
|
@ -482,6 +487,7 @@ CONFIG_DMI=y
|
|||
|
||||
CONFIG_SYSVIPC_COMPAT=y
|
||||
CONFIG_ARCH_ENABLE_HUGEPAGE_MIGRATION=y
|
||||
CONFIG_ARCH_ENABLE_THP_MIGRATION=y
|
||||
|
||||
#
|
||||
# Power management options
|
||||
|
|
@ -580,13 +586,15 @@ CONFIG_ROCKCHIP_SIP=y
|
|||
#
|
||||
# EFI (Extensible Firmware Interface) Support
|
||||
#
|
||||
# CONFIG_EFI_VARS is not set
|
||||
CONFIG_EFI_ESRT=y
|
||||
CONFIG_EFI_VARS_PSTORE=y
|
||||
# CONFIG_EFI_VARS_PSTORE_DEFAULT_DISABLE is not set
|
||||
CONFIG_EFI_PARAMS_FROM_FDT=y
|
||||
CONFIG_EFI_RUNTIME_WRAPPERS=y
|
||||
CONFIG_EFI_GENERIC_STUB=y
|
||||
CONFIG_EFI_ARMSTUB_DTB_LOADER=y
|
||||
CONFIG_EFI_GENERIC_STUB_INITRD_CMDLINE_LOADER=y
|
||||
# CONFIG_EFI_BOOTLOADER_CONTROL is not set
|
||||
CONFIG_EFI_CAPSULE_LOADER=y
|
||||
# CONFIG_EFI_TEST is not set
|
||||
# CONFIG_RESET_ATTACK_MITIGATION is not set
|
||||
|
|
@ -625,7 +633,6 @@ CONFIG_KVM_GENERIC_DIRTYLOG_READ_PROTECT=y
|
|||
CONFIG_HAVE_KVM_IRQ_BYPASS=y
|
||||
CONFIG_HAVE_KVM_VCPU_RUN_PID_CHANGE=y
|
||||
CONFIG_KVM_ARM_PMU=y
|
||||
CONFIG_KVM_INDIRECT_VECTORS=y
|
||||
CONFIG_ARM64_CRYPTO=y
|
||||
CONFIG_CRYPTO_SHA256_ARM64=y
|
||||
CONFIG_CRYPTO_SHA512_ARM64=y
|
||||
|
|
@ -652,6 +659,7 @@ CONFIG_CRYPTO_AES_ARM64_BS=y
|
|||
#
|
||||
CONFIG_CRASH_CORE=y
|
||||
CONFIG_KEXEC_CORE=y
|
||||
CONFIG_SET_FS=y
|
||||
# CONFIG_KPROBES is not set
|
||||
CONFIG_JUMP_LABEL=y
|
||||
# CONFIG_STATIC_KEYS_SELFTEST is not set
|
||||
|
|
@ -686,7 +694,9 @@ CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y
|
|||
CONFIG_HAVE_CMPXCHG_LOCAL=y
|
||||
CONFIG_HAVE_CMPXCHG_DOUBLE=y
|
||||
CONFIG_ARCH_WANT_COMPAT_IPC_PARSE_VERSION=y
|
||||
CONFIG_HAVE_ARCH_SECCOMP=y
|
||||
CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
|
||||
CONFIG_SECCOMP=y
|
||||
CONFIG_SECCOMP_FILTER=y
|
||||
CONFIG_HAVE_ARCH_STACKLEAK=y
|
||||
CONFIG_HAVE_STACKPROTECTOR=y
|
||||
|
|
@ -695,6 +705,7 @@ CONFIG_STACKPROTECTOR_STRONG=y
|
|||
CONFIG_HAVE_CONTEXT_TRACKING=y
|
||||
CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
|
||||
CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
|
||||
CONFIG_HAVE_MOVE_PMD=y
|
||||
CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y
|
||||
CONFIG_HAVE_ARCH_HUGE_VMAP=y
|
||||
CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
|
||||
|
|
@ -720,6 +731,7 @@ CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y
|
|||
CONFIG_ARCH_USE_MEMREMAP_PROT=y
|
||||
# CONFIG_LOCK_EVENT_COUNTS is not set
|
||||
CONFIG_ARCH_HAS_RELR=y
|
||||
CONFIG_ARCH_WANT_LD_ORPHAN_WARN=y
|
||||
|
||||
#
|
||||
# GCOV-based kernel profiling
|
||||
|
|
@ -882,7 +894,6 @@ CONFIG_ZPOOL=y
|
|||
CONFIG_ZBUD=y
|
||||
CONFIG_Z3FOLD=y
|
||||
CONFIG_ZSMALLOC=y
|
||||
# CONFIG_ZSMALLOC_PGTABLE_MAPPING is not set
|
||||
# CONFIG_ZSMALLOC_STAT is not set
|
||||
CONFIG_GENERIC_EARLY_IOREMAP=y
|
||||
# CONFIG_DEFERRED_STRUCT_PAGE_INIT is not set
|
||||
|
|
@ -1650,6 +1661,7 @@ CONFIG_CAN_RAW=m
|
|||
CONFIG_CAN_BCM=m
|
||||
CONFIG_CAN_GW=m
|
||||
CONFIG_CAN_J1939=m
|
||||
# CONFIG_CAN_ISOTP is not set
|
||||
|
||||
#
|
||||
# CAN Device Drivers
|
||||
|
|
@ -1690,6 +1702,7 @@ CONFIG_CAN_SOFTING=m
|
|||
#
|
||||
CONFIG_CAN_HI311X=m
|
||||
CONFIG_CAN_MCP251X=m
|
||||
# CONFIG_CAN_MCP251XFD is not set
|
||||
# end of CAN SPI interfaces
|
||||
|
||||
#
|
||||
|
|
@ -1907,6 +1920,11 @@ CONFIG_PCI_IOV=y
|
|||
# CONFIG_PCI_PRI is not set
|
||||
# CONFIG_PCI_PASID is not set
|
||||
CONFIG_PCI_LABEL=y
|
||||
# CONFIG_PCIE_BUS_TUNE_OFF is not set
|
||||
CONFIG_PCIE_BUS_DEFAULT=y
|
||||
# CONFIG_PCIE_BUS_SAFE is not set
|
||||
# CONFIG_PCIE_BUS_PERFORMANCE is not set
|
||||
# CONFIG_PCIE_BUS_PEER2PEER is not set
|
||||
CONFIG_HOTPLUG_PCI=y
|
||||
# CONFIG_HOTPLUG_PCI_CPCI is not set
|
||||
# CONFIG_HOTPLUG_PCI_SHPC is not set
|
||||
|
|
@ -2023,6 +2041,7 @@ CONFIG_SUN50I_DE2_BUS=y
|
|||
CONFIG_SUNXI_RSB=m
|
||||
CONFIG_VEXPRESS_CONFIG=y
|
||||
CONFIG_MHI_BUS=m
|
||||
# CONFIG_MHI_BUS_DEBUG is not set
|
||||
# end of Bus devices
|
||||
|
||||
CONFIG_CONNECTOR=m
|
||||
|
|
@ -2114,6 +2133,11 @@ CONFIG_MTD_COMPLEX_MAPPINGS=y
|
|||
# CONFIG_MTD_ONENAND is not set
|
||||
# CONFIG_MTD_RAW_NAND is not set
|
||||
# CONFIG_MTD_SPI_NAND is not set
|
||||
|
||||
#
|
||||
# ECC engine support
|
||||
#
|
||||
# end of ECC engine support
|
||||
# end of NAND
|
||||
|
||||
#
|
||||
|
|
@ -2137,7 +2161,6 @@ CONFIG_OF_DYNAMIC=y
|
|||
CONFIG_OF_ADDRESS=y
|
||||
CONFIG_OF_IRQ=y
|
||||
CONFIG_OF_NET=y
|
||||
CONFIG_OF_MDIO=y
|
||||
CONFIG_OF_RESERVED_MEM=y
|
||||
CONFIG_OF_RESOLVE=y
|
||||
CONFIG_OF_OVERLAY=y
|
||||
|
|
@ -2214,6 +2237,7 @@ CONFIG_SRAM=y
|
|||
CONFIG_XILINX_SDFEC=m
|
||||
CONFIG_MISC_RTSX=m
|
||||
# CONFIG_PVPANIC is not set
|
||||
# CONFIG_HISI_HIKEY_USB is not set
|
||||
# CONFIG_C2PORT is not set
|
||||
|
||||
#
|
||||
|
|
@ -2242,13 +2266,6 @@ CONFIG_CB710_DEBUG_ASSUMPTIONS=y
|
|||
# CONFIG_SENSORS_LIS3_SPI is not set
|
||||
# CONFIG_SENSORS_LIS3_I2C is not set
|
||||
# CONFIG_ALTERA_STAPL is not set
|
||||
|
||||
#
|
||||
# Intel MIC & related support
|
||||
#
|
||||
# CONFIG_VOP_BUS is not set
|
||||
# end of Intel MIC & related support
|
||||
|
||||
CONFIG_GENWQE=m
|
||||
CONFIG_GENWQE_PLATFORM_ERROR_RECOVERY=0
|
||||
# CONFIG_ECHO is not set
|
||||
|
|
@ -2310,7 +2327,6 @@ CONFIG_ISCSI_TCP=m
|
|||
# CONFIG_SCSI_AIC79XX is not set
|
||||
# CONFIG_SCSI_AIC94XX is not set
|
||||
CONFIG_SCSI_HISI_SAS=y
|
||||
# CONFIG_SCSI_HISI_SAS_PCI is not set
|
||||
# CONFIG_SCSI_MVSAS is not set
|
||||
# CONFIG_SCSI_MVUMI is not set
|
||||
# CONFIG_SCSI_ADVANSYS is not set
|
||||
|
|
@ -2599,6 +2615,7 @@ CONFIG_NET_DSA_MICROCHIP_KSZ8795_SPI=m
|
|||
CONFIG_NET_DSA_MV88E6XXX=m
|
||||
CONFIG_NET_DSA_MV88E6XXX_GLOBAL2=y
|
||||
# CONFIG_NET_DSA_MV88E6XXX_PTP is not set
|
||||
# CONFIG_NET_DSA_MSCC_SEVILLE is not set
|
||||
CONFIG_NET_DSA_AR9331=m
|
||||
CONFIG_NET_DSA_SJA1105=m
|
||||
# CONFIG_NET_DSA_SJA1105_PTP is not set
|
||||
|
|
@ -2737,6 +2754,7 @@ CONFIG_OCTEONTX2_MBOX=m
|
|||
# CONFIG_OCTEONTX2_AF is not set
|
||||
CONFIG_OCTEONTX2_PF=m
|
||||
CONFIG_OCTEONTX2_VF=m
|
||||
# CONFIG_PRESTERA is not set
|
||||
CONFIG_NET_VENDOR_MELLANOX=y
|
||||
# CONFIG_MLX4_EN is not set
|
||||
# CONFIG_MLX5_CORE is not set
|
||||
|
|
@ -2826,6 +2844,7 @@ CONFIG_DWMAC_MESON=m
|
|||
CONFIG_DWMAC_ROCKCHIP=m
|
||||
CONFIG_DWMAC_SUNXI=m
|
||||
CONFIG_DWMAC_SUN8I=m
|
||||
# CONFIG_DWMAC_INTEL_PLAT is not set
|
||||
# CONFIG_STMMAC_PCI is not set
|
||||
CONFIG_NET_VENDOR_SUN=y
|
||||
# CONFIG_HAPPYMEAL is not set
|
||||
|
|
@ -2850,63 +2869,36 @@ CONFIG_XILINX_AXI_EMAC=m
|
|||
CONFIG_XILINX_LL_TEMAC=m
|
||||
# CONFIG_FDDI is not set
|
||||
# CONFIG_HIPPI is not set
|
||||
CONFIG_MDIO_DEVICE=y
|
||||
CONFIG_MDIO_BUS=y
|
||||
CONFIG_MDIO_DEVRES=y
|
||||
CONFIG_MDIO_BCM_UNIMAC=m
|
||||
CONFIG_MDIO_BITBANG=y
|
||||
CONFIG_MDIO_BUS_MUX=y
|
||||
# CONFIG_MDIO_BUS_MUX_GPIO is not set
|
||||
CONFIG_MDIO_BUS_MUX_MESON_G12A=m
|
||||
CONFIG_MDIO_BUS_MUX_MMIOREG=y
|
||||
CONFIG_MDIO_BUS_MUX_MULTIPLEXER=m
|
||||
CONFIG_MDIO_CAVIUM=y
|
||||
# CONFIG_MDIO_GPIO is not set
|
||||
# CONFIG_MDIO_HISI_FEMAC is not set
|
||||
CONFIG_MDIO_I2C=m
|
||||
# CONFIG_MDIO_IPQ4019 is not set
|
||||
CONFIG_MDIO_IPQ8064=m
|
||||
CONFIG_MDIO_MSCC_MIIM=m
|
||||
CONFIG_MDIO_MVUSB=m
|
||||
# CONFIG_MDIO_OCTEON is not set
|
||||
CONFIG_MDIO_SUN4I=m
|
||||
CONFIG_MDIO_THUNDER=y
|
||||
CONFIG_MDIO_XPCS=m
|
||||
CONFIG_PHYLINK=y
|
||||
CONFIG_PHYLIB=y
|
||||
CONFIG_SWPHY=y
|
||||
CONFIG_LED_TRIGGER_PHY=y
|
||||
CONFIG_FIXED_PHY=y
|
||||
CONFIG_SFP=m
|
||||
|
||||
#
|
||||
# MII PHY device drivers
|
||||
#
|
||||
CONFIG_SFP=m
|
||||
CONFIG_ADIN_PHY=m
|
||||
CONFIG_AMD_PHY=m
|
||||
CONFIG_MESON_GXL_PHY=m
|
||||
CONFIG_ADIN_PHY=m
|
||||
CONFIG_AQUANTIA_PHY=m
|
||||
CONFIG_AX88796B_PHY=m
|
||||
CONFIG_BCM7XXX_PHY=m
|
||||
CONFIG_BCM87XX_PHY=m
|
||||
CONFIG_BCM_NET_PHYLIB=m
|
||||
CONFIG_BROADCOM_PHY=m
|
||||
# CONFIG_BCM54140_PHY is not set
|
||||
CONFIG_BCM7XXX_PHY=m
|
||||
CONFIG_BCM84881_PHY=m
|
||||
CONFIG_BCM87XX_PHY=m
|
||||
CONFIG_BCM_NET_PHYLIB=m
|
||||
CONFIG_CICADA_PHY=m
|
||||
# CONFIG_CORTINA_PHY is not set
|
||||
CONFIG_DAVICOM_PHY=m
|
||||
# CONFIG_DP83822_PHY is not set
|
||||
CONFIG_DP83TC811_PHY=m
|
||||
CONFIG_DP83848_PHY=m
|
||||
# CONFIG_DP83867_PHY is not set
|
||||
CONFIG_DP83869_PHY=m
|
||||
CONFIG_FIXED_PHY=y
|
||||
CONFIG_ICPLUS_PHY=m
|
||||
CONFIG_LXT_PHY=m
|
||||
# CONFIG_INTEL_XWAY_PHY is not set
|
||||
CONFIG_LSI_ET1011C_PHY=m
|
||||
CONFIG_LXT_PHY=m
|
||||
CONFIG_MARVELL_PHY=m
|
||||
CONFIG_MARVELL_10G_PHY=m
|
||||
CONFIG_MESON_GXL_PHY=m
|
||||
CONFIG_MICREL_PHY=y
|
||||
CONFIG_MICROCHIP_PHY=m
|
||||
CONFIG_MICROCHIP_T1_PHY=m
|
||||
|
|
@ -2918,12 +2910,50 @@ CONFIG_QSEMI_PHY=m
|
|||
CONFIG_REALTEK_PHY=m
|
||||
# CONFIG_RENESAS_PHY is not set
|
||||
CONFIG_ROCKCHIP_PHY=y
|
||||
# CONFIG_SMSC_PHY is not set
|
||||
CONFIG_SMSC_PHY=m
|
||||
# CONFIG_STE10XP is not set
|
||||
# CONFIG_TERANETICS_PHY is not set
|
||||
# CONFIG_DP83822_PHY is not set
|
||||
CONFIG_DP83TC811_PHY=m
|
||||
CONFIG_DP83848_PHY=m
|
||||
# CONFIG_DP83867_PHY is not set
|
||||
CONFIG_DP83869_PHY=m
|
||||
CONFIG_VITESSE_PHY=m
|
||||
# CONFIG_XILINX_GMII2RGMII is not set
|
||||
# CONFIG_MICREL_KS8995MA is not set
|
||||
CONFIG_MDIO_DEVICE=y
|
||||
CONFIG_MDIO_BUS=y
|
||||
CONFIG_OF_MDIO=y
|
||||
CONFIG_MDIO_DEVRES=y
|
||||
CONFIG_MDIO_SUN4I=m
|
||||
CONFIG_MDIO_BITBANG=y
|
||||
CONFIG_MDIO_BCM_UNIMAC=m
|
||||
CONFIG_MDIO_CAVIUM=y
|
||||
# CONFIG_MDIO_GPIO is not set
|
||||
# CONFIG_MDIO_HISI_FEMAC is not set
|
||||
CONFIG_MDIO_I2C=m
|
||||
CONFIG_MDIO_MVUSB=m
|
||||
CONFIG_MDIO_MSCC_MIIM=m
|
||||
# CONFIG_MDIO_OCTEON is not set
|
||||
# CONFIG_MDIO_IPQ4019 is not set
|
||||
CONFIG_MDIO_IPQ8064=m
|
||||
CONFIG_MDIO_THUNDER=y
|
||||
|
||||
#
|
||||
# MDIO Multiplexers
|
||||
#
|
||||
CONFIG_MDIO_BUS_MUX=y
|
||||
CONFIG_MDIO_BUS_MUX_MESON_G12A=m
|
||||
# CONFIG_MDIO_BUS_MUX_GPIO is not set
|
||||
CONFIG_MDIO_BUS_MUX_MULTIPLEXER=m
|
||||
CONFIG_MDIO_BUS_MUX_MMIOREG=y
|
||||
|
||||
#
|
||||
# PCS device drivers
|
||||
#
|
||||
CONFIG_PCS_XPCS=m
|
||||
# end of PCS device drivers
|
||||
|
||||
CONFIG_PPP=m
|
||||
CONFIG_PPP_BSDCOMP=m
|
||||
CONFIG_PPP_DEFLATE=m
|
||||
|
|
@ -3034,6 +3064,7 @@ CONFIG_ATH10K_USB=m
|
|||
# CONFIG_ATH10K_DEBUGFS is not set
|
||||
# CONFIG_ATH10K_TRACING is not set
|
||||
# CONFIG_WCN36XX is not set
|
||||
# CONFIG_ATH11K is not set
|
||||
CONFIG_WLAN_VENDOR_ATMEL=y
|
||||
CONFIG_ATMEL=m
|
||||
CONFIG_PCI_ATMEL=m
|
||||
|
|
@ -3203,7 +3234,6 @@ CONFIG_WILINK_PLATFORM_DATA=y
|
|||
CONFIG_RTL8723DU=m
|
||||
CONFIG_RTL8723DS=m
|
||||
CONFIG_RTL8822BU=m
|
||||
CONFIG_RTL8188EU=m
|
||||
CONFIG_RTL8821CU=m
|
||||
CONFIG_88XXAU=m
|
||||
# CONFIG_RTL8192EU is not set
|
||||
|
|
@ -3333,6 +3363,7 @@ CONFIG_MOUSE_PS2_SMBUS=y
|
|||
CONFIG_INPUT_JOYSTICK=y
|
||||
# CONFIG_JOYSTICK_ANALOG is not set
|
||||
# CONFIG_JOYSTICK_A3D is not set
|
||||
# CONFIG_JOYSTICK_ADC is not set
|
||||
# CONFIG_JOYSTICK_ADI is not set
|
||||
# CONFIG_JOYSTICK_COBRA is not set
|
||||
# CONFIG_JOYSTICK_GF2K is not set
|
||||
|
|
@ -3460,6 +3491,7 @@ CONFIG_TOUCHSCREEN_ZET6223=m
|
|||
CONFIG_TOUCHSCREEN_ZFORCE=m
|
||||
CONFIG_TOUCHSCREEN_ROHM_BU21023=m
|
||||
CONFIG_TOUCHSCREEN_IQS5XX=m
|
||||
# CONFIG_TOUCHSCREEN_ZINITIX is not set
|
||||
CONFIG_INPUT_MISC=y
|
||||
# CONFIG_INPUT_AD714X is not set
|
||||
# CONFIG_INPUT_ATMEL_CAPTOUCH is not set
|
||||
|
|
@ -3504,6 +3536,7 @@ CONFIG_RMI4_F11=y
|
|||
CONFIG_RMI4_F12=y
|
||||
CONFIG_RMI4_F30=y
|
||||
# CONFIG_RMI4_F34 is not set
|
||||
# CONFIG_RMI4_F3A is not set
|
||||
# CONFIG_RMI4_F54 is not set
|
||||
# CONFIG_RMI4_F55 is not set
|
||||
|
||||
|
|
@ -3639,6 +3672,7 @@ CONFIG_HW_RANDOM=m
|
|||
CONFIG_HW_RANDOM_MESON=m
|
||||
CONFIG_HW_RANDOM_CAVIUM=m
|
||||
# CONFIG_HW_RANDOM_CCTRNG is not set
|
||||
# CONFIG_HW_RANDOM_XIPHERA is not set
|
||||
# CONFIG_APPLICOM is not set
|
||||
CONFIG_DEVMEM=y
|
||||
# CONFIG_RAW_DRIVER is not set
|
||||
|
|
@ -3739,6 +3773,7 @@ CONFIG_I2C_CROS_EC_TUNNEL=y
|
|||
CONFIG_I2C_STUB=m
|
||||
CONFIG_I2C_SLAVE=y
|
||||
CONFIG_I2C_SLAVE_EEPROM=m
|
||||
# CONFIG_I2C_SLAVE_TESTUNIT is not set
|
||||
# CONFIG_I2C_DEBUG_CORE is not set
|
||||
# CONFIG_I2C_DEBUG_ALGO is not set
|
||||
# CONFIG_I2C_DEBUG_BUS is not set
|
||||
|
|
@ -3843,6 +3878,12 @@ CONFIG_PINCTRL_STMFX=m
|
|||
CONFIG_PINCTRL_MAX77620=y
|
||||
CONFIG_PINCTRL_RK805=y
|
||||
# CONFIG_PINCTRL_OCELOT is not set
|
||||
|
||||
#
|
||||
# Renesas pinctrl drivers
|
||||
#
|
||||
# end of Renesas pinctrl drivers
|
||||
|
||||
CONFIG_PINCTRL_SUNXI=y
|
||||
# CONFIG_PINCTRL_SUN4I_A10 is not set
|
||||
CONFIG_PINCTRL_SUN5I=y
|
||||
|
|
@ -3860,6 +3901,8 @@ CONFIG_PINCTRL_SUN9I_A80=y
|
|||
CONFIG_PINCTRL_SUN9I_A80_R=y
|
||||
CONFIG_PINCTRL_SUN50I_A64=y
|
||||
CONFIG_PINCTRL_SUN50I_A64_R=y
|
||||
CONFIG_PINCTRL_SUN50I_A100=y
|
||||
CONFIG_PINCTRL_SUN50I_A100_R=y
|
||||
CONFIG_PINCTRL_SUN50I_H5=y
|
||||
CONFIG_PINCTRL_SUN50I_H6=y
|
||||
CONFIG_PINCTRL_SUN50I_H6_R=y
|
||||
|
|
@ -3877,6 +3920,8 @@ CONFIG_OF_GPIO=y
|
|||
CONFIG_GPIOLIB_IRQCHIP=y
|
||||
# CONFIG_DEBUG_GPIO is not set
|
||||
CONFIG_GPIO_SYSFS=y
|
||||
CONFIG_GPIO_CDEV=y
|
||||
CONFIG_GPIO_CDEV_V1=y
|
||||
CONFIG_GPIO_GENERIC=y
|
||||
CONFIG_GPIO_MAX730X=m
|
||||
|
||||
|
|
@ -3996,9 +4041,6 @@ CONFIG_W1_SLAVE_DS28E04=m
|
|||
CONFIG_W1_SLAVE_DS28E17=m
|
||||
# end of 1-wire Slaves
|
||||
|
||||
CONFIG_POWER_AVS=y
|
||||
CONFIG_QCOM_CPR=m
|
||||
CONFIG_ROCKCHIP_IODOMAIN=y
|
||||
CONFIG_POWER_RESET=y
|
||||
# CONFIG_POWER_RESET_AS3722 is not set
|
||||
CONFIG_POWER_RESET_BRCMSTB=y
|
||||
|
|
@ -4024,7 +4066,6 @@ CONFIG_BATTERY_DS2760=m
|
|||
CONFIG_BATTERY_DS2780=m
|
||||
CONFIG_BATTERY_DS2781=m
|
||||
CONFIG_BATTERY_DS2782=m
|
||||
CONFIG_BATTERY_LEGO_EV3=m
|
||||
CONFIG_BATTERY_SBS=m
|
||||
CONFIG_CHARGER_SBS=m
|
||||
CONFIG_MANAGER_SBS=m
|
||||
|
|
@ -4053,6 +4094,7 @@ CONFIG_CHARGER_MAX77650=m
|
|||
# CONFIG_CHARGER_BQ24735 is not set
|
||||
# CONFIG_CHARGER_BQ2515X is not set
|
||||
# CONFIG_CHARGER_BQ25890 is not set
|
||||
# CONFIG_CHARGER_BQ25980 is not set
|
||||
# CONFIG_CHARGER_SMB347 is not set
|
||||
# CONFIG_BATTERY_GAUGE_LTC2941 is not set
|
||||
CONFIG_BATTERY_RT5033=m
|
||||
|
|
@ -4061,6 +4103,7 @@ CONFIG_BATTERY_RT5033=m
|
|||
CONFIG_CHARGER_UCS1002=m
|
||||
CONFIG_CHARGER_BD70528=m
|
||||
# CONFIG_CHARGER_BD99954 is not set
|
||||
# CONFIG_RN5T618_POWER is not set
|
||||
CONFIG_HWMON=y
|
||||
CONFIG_HWMON_VID=m
|
||||
# CONFIG_HWMON_DEBUG_CHIP is not set
|
||||
|
|
@ -4137,6 +4180,7 @@ CONFIG_SENSORS_MAX6697=m
|
|||
CONFIG_SENSORS_MAX31790=m
|
||||
CONFIG_SENSORS_MCP3021=m
|
||||
CONFIG_SENSORS_TC654=m
|
||||
# CONFIG_SENSORS_MR75203 is not set
|
||||
CONFIG_SENSORS_ADCXX=m
|
||||
CONFIG_SENSORS_LM63=m
|
||||
CONFIG_SENSORS_LM70=m
|
||||
|
|
@ -4167,6 +4211,7 @@ CONFIG_SENSORS_OCC=m
|
|||
CONFIG_SENSORS_PCF8591=m
|
||||
CONFIG_PMBUS=m
|
||||
CONFIG_SENSORS_PMBUS=m
|
||||
# CONFIG_SENSORS_ADM1266 is not set
|
||||
CONFIG_SENSORS_ADM1275=m
|
||||
CONFIG_SENSORS_BEL_PFE=m
|
||||
CONFIG_SENSORS_IBM_CFFPS=m
|
||||
|
|
@ -4186,6 +4231,7 @@ CONFIG_SENSORS_MAX20751=m
|
|||
CONFIG_SENSORS_MAX31785=m
|
||||
CONFIG_SENSORS_MAX34440=m
|
||||
CONFIG_SENSORS_MAX8688=m
|
||||
# CONFIG_SENSORS_MP2975 is not set
|
||||
CONFIG_SENSORS_PXE1610=m
|
||||
CONFIG_SENSORS_TPS40422=m
|
||||
CONFIG_SENSORS_TPS53679=m
|
||||
|
|
@ -4452,6 +4498,7 @@ CONFIG_MFD_STMFX=m
|
|||
# CONFIG_MFD_KHADAS_MCU is not set
|
||||
CONFIG_MFD_VEXPRESS_SYSREG=y
|
||||
CONFIG_RAVE_SP_CORE=m
|
||||
# CONFIG_MFD_INTEL_M10_BMC is not set
|
||||
# end of Multifunction device drivers
|
||||
|
||||
CONFIG_REGULATOR=y
|
||||
|
|
@ -4504,11 +4551,14 @@ CONFIG_REGULATOR_MPQ7920=m
|
|||
CONFIG_REGULATOR_PWM=y
|
||||
CONFIG_REGULATOR_QCOM_SPMI=y
|
||||
# CONFIG_REGULATOR_QCOM_USB_VBUS is not set
|
||||
# CONFIG_REGULATOR_RASPBERRYPI_TOUCHSCREEN_ATTINY is not set
|
||||
CONFIG_REGULATOR_RC5T583=m
|
||||
CONFIG_REGULATOR_RK808=y
|
||||
CONFIG_REGULATOR_RN5T618=m
|
||||
CONFIG_REGULATOR_ROHM=m
|
||||
# CONFIG_REGULATOR_RT4801 is not set
|
||||
CONFIG_REGULATOR_RT5033=m
|
||||
# CONFIG_REGULATOR_RTMV20 is not set
|
||||
# CONFIG_REGULATOR_S2MPA01 is not set
|
||||
CONFIG_REGULATOR_S2MPS11=y
|
||||
# CONFIG_REGULATOR_S5M8767 is not set
|
||||
|
|
@ -4858,6 +4908,7 @@ CONFIG_SDR_PLATFORM_DRIVERS=y
|
|||
#
|
||||
CONFIG_SMS_SDIO_DRV=m
|
||||
# CONFIG_V4L_TEST_DRIVERS is not set
|
||||
# CONFIG_DVB_TEST_DRIVERS is not set
|
||||
# end of Media drivers
|
||||
|
||||
#
|
||||
|
|
@ -5341,7 +5392,6 @@ CONFIG_ROCKCHIP_LVDS=y
|
|||
# CONFIG_DRM_MGAG200 is not set
|
||||
# CONFIG_DRM_RCAR_DW_HDMI is not set
|
||||
CONFIG_DRM_RCAR_LVDS=m
|
||||
CONFIG_DRM_RCAR_WRITEBACK=y
|
||||
CONFIG_DRM_SUN4I=m
|
||||
CONFIG_DRM_SUN4I_HDMI=m
|
||||
CONFIG_DRM_SUN4I_HDMI_CEC=y
|
||||
|
|
@ -5380,6 +5430,7 @@ CONFIG_DRM_PANEL_LG_LB035Q02=m
|
|||
CONFIG_DRM_PANEL_NEC_NL8048HL11=m
|
||||
CONFIG_DRM_PANEL_NOVATEK_NT35510=m
|
||||
CONFIG_DRM_PANEL_NOVATEK_NT39016=m
|
||||
# CONFIG_DRM_PANEL_MANTIX_MLAF057WE51 is not set
|
||||
CONFIG_DRM_PANEL_OLIMEX_LCD_OLINUXINO=m
|
||||
CONFIG_DRM_PANEL_ORISETECH_OTM8009A=m
|
||||
# CONFIG_DRM_PANEL_OSD_OSD101T2587_53TS is not set
|
||||
|
|
@ -5420,6 +5471,7 @@ CONFIG_DRM_PANEL_BRIDGE=y
|
|||
CONFIG_DRM_CDNS_DSI=m
|
||||
# CONFIG_DRM_CHRONTEL_CH7033 is not set
|
||||
CONFIG_DRM_DISPLAY_CONNECTOR=m
|
||||
# CONFIG_DRM_LONTIUM_LT9611 is not set
|
||||
CONFIG_DRM_LVDS_CODEC=m
|
||||
# CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW is not set
|
||||
# CONFIG_DRM_NWL_MIPI_DSI is not set
|
||||
|
|
@ -5431,9 +5483,11 @@ CONFIG_DRM_PARADE_PS8640=m
|
|||
CONFIG_DRM_SII9234=m
|
||||
# CONFIG_DRM_SIMPLE_BRIDGE is not set
|
||||
CONFIG_DRM_THINE_THC63LVD1024=m
|
||||
# CONFIG_DRM_TOSHIBA_TC358762 is not set
|
||||
CONFIG_DRM_TOSHIBA_TC358764=m
|
||||
# CONFIG_DRM_TOSHIBA_TC358767 is not set
|
||||
CONFIG_DRM_TOSHIBA_TC358768=m
|
||||
# CONFIG_DRM_TOSHIBA_TC358775 is not set
|
||||
# CONFIG_DRM_TI_TFP410 is not set
|
||||
# CONFIG_DRM_TI_SN65DSI86 is not set
|
||||
CONFIG_DRM_TI_TPD12S015=m
|
||||
|
|
@ -5443,6 +5497,7 @@ CONFIG_DRM_ANALOGIX_DP=m
|
|||
CONFIG_DRM_I2C_ADV7511=m
|
||||
# CONFIG_DRM_I2C_ADV7511_AUDIO is not set
|
||||
CONFIG_DRM_I2C_ADV7511_CEC=y
|
||||
# CONFIG_DRM_CDNS_MHDP8546 is not set
|
||||
CONFIG_DRM_DW_HDMI=m
|
||||
# CONFIG_DRM_DW_HDMI_AHB_AUDIO is not set
|
||||
CONFIG_DRM_DW_HDMI_I2S_AUDIO=m
|
||||
|
|
@ -5562,6 +5617,7 @@ CONFIG_LCD_CLASS_DEVICE=m
|
|||
# CONFIG_LCD_HX8357 is not set
|
||||
CONFIG_LCD_OTM3225A=m
|
||||
CONFIG_BACKLIGHT_CLASS_DEVICE=y
|
||||
# CONFIG_BACKLIGHT_KTD253 is not set
|
||||
CONFIG_BACKLIGHT_LM3533=m
|
||||
CONFIG_BACKLIGHT_PWM=m
|
||||
CONFIG_BACKLIGHT_QCOM_WLED=m
|
||||
|
|
@ -5761,7 +5817,6 @@ CONFIG_SND_SOC_FSL_MICFIL=m
|
|||
|
||||
# CONFIG_SND_I2S_HI6210_I2S is not set
|
||||
# CONFIG_SND_SOC_IMG is not set
|
||||
# CONFIG_SND_SOC_INTEL_KEEMBAY is not set
|
||||
# CONFIG_SND_SOC_MTK_BTCVSD is not set
|
||||
|
||||
#
|
||||
|
|
@ -5856,6 +5911,7 @@ CONFIG_SND_SOC_CS35L36=m
|
|||
# CONFIG_SND_SOC_CS42L52 is not set
|
||||
# CONFIG_SND_SOC_CS42L56 is not set
|
||||
# CONFIG_SND_SOC_CS42L73 is not set
|
||||
# CONFIG_SND_SOC_CS4234 is not set
|
||||
# CONFIG_SND_SOC_CS4265 is not set
|
||||
# CONFIG_SND_SOC_CS4270 is not set
|
||||
# CONFIG_SND_SOC_CS4271_I2C is not set
|
||||
|
|
@ -5930,6 +5986,7 @@ CONFIG_SND_SOC_STA350=m
|
|||
CONFIG_SND_SOC_STI_SAS=m
|
||||
CONFIG_SND_SOC_TAS2552=m
|
||||
CONFIG_SND_SOC_TAS2562=m
|
||||
# CONFIG_SND_SOC_TAS2764 is not set
|
||||
CONFIG_SND_SOC_TAS2770=m
|
||||
CONFIG_SND_SOC_TAS5086=m
|
||||
CONFIG_SND_SOC_TAS571X=m
|
||||
|
|
@ -6040,6 +6097,7 @@ CONFIG_HID_GLORIOUS=m
|
|||
CONFIG_HID_HOLTEK=m
|
||||
CONFIG_HOLTEK_FF=y
|
||||
CONFIG_HID_GOOGLE_HAMMER=m
|
||||
# CONFIG_HID_VIVALDI is not set
|
||||
CONFIG_HID_GT683R=m
|
||||
CONFIG_HID_KEYTOUCH=m
|
||||
CONFIG_HID_KYE=m
|
||||
|
|
@ -6148,6 +6206,7 @@ CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
|
|||
# Miscellaneous USB options
|
||||
#
|
||||
CONFIG_USB_DEFAULT_PERSIST=y
|
||||
# CONFIG_USB_FEW_INIT_RETRIES is not set
|
||||
# CONFIG_USB_DYNAMIC_MINORS is not set
|
||||
CONFIG_USB_OTG=y
|
||||
# CONFIG_USB_OTG_PRODUCTLIST is not set
|
||||
|
|
@ -6347,7 +6406,6 @@ CONFIG_USB_FTDI_ELAN=m
|
|||
CONFIG_USB_APPLEDISPLAY=m
|
||||
CONFIG_APPLE_MFI_FASTCHARGE=m
|
||||
CONFIG_USB_SISUSBVGA=m
|
||||
# CONFIG_USB_SISUSBVGA_CON is not set
|
||||
CONFIG_USB_LD=m
|
||||
CONFIG_USB_TRANCEVIBRATOR=m
|
||||
CONFIG_USB_IOWARRIOR=m
|
||||
|
|
@ -6491,11 +6549,13 @@ CONFIG_TYPEC=m
|
|||
CONFIG_TYPEC_TCPM=m
|
||||
CONFIG_TYPEC_TCPCI=m
|
||||
CONFIG_TYPEC_RT1711H=m
|
||||
# CONFIG_TYPEC_TCPCI_MAXIM is not set
|
||||
CONFIG_TYPEC_FUSB302=m
|
||||
CONFIG_TYPEC_UCSI=m
|
||||
CONFIG_UCSI_CCG=m
|
||||
CONFIG_TYPEC_HD3SS3220=m
|
||||
CONFIG_TYPEC_TPS6598X=m
|
||||
# CONFIG_TYPEC_STUSB160X is not set
|
||||
|
||||
#
|
||||
# USB Type-C Multiplexer/DeMultiplexer Switch support
|
||||
|
|
@ -6590,6 +6650,7 @@ CONFIG_LEDS_LM3692X=m
|
|||
CONFIG_LEDS_GPIO=y
|
||||
# CONFIG_LEDS_LP3944 is not set
|
||||
# CONFIG_LEDS_LP3952 is not set
|
||||
# CONFIG_LEDS_LP50XX is not set
|
||||
# CONFIG_LEDS_LP55XX_COMMON is not set
|
||||
# CONFIG_LEDS_LP8860 is not set
|
||||
# CONFIG_LEDS_PCA955X is not set
|
||||
|
|
@ -6707,6 +6768,7 @@ CONFIG_RTC_DRV_RX8581=m
|
|||
CONFIG_RTC_DRV_RX8025=m
|
||||
CONFIG_RTC_DRV_EM3027=m
|
||||
CONFIG_RTC_DRV_RV3028=m
|
||||
# CONFIG_RTC_DRV_RV3032 is not set
|
||||
CONFIG_RTC_DRV_RV8803=m
|
||||
CONFIG_RTC_DRV_S5M=m
|
||||
CONFIG_RTC_DRV_SD3078=m
|
||||
|
|
@ -6857,6 +6919,7 @@ CONFIG_VIRTIO_BALLOON=y
|
|||
CONFIG_VIRTIO_INPUT=m
|
||||
CONFIG_VIRTIO_MMIO=y
|
||||
# CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES is not set
|
||||
CONFIG_VIRTIO_DMA_SHARED_BUFFER=m
|
||||
CONFIG_VDPA=m
|
||||
CONFIG_VDPA_SIM=m
|
||||
CONFIG_IFCVF=m
|
||||
|
|
@ -6981,9 +7044,8 @@ CONFIG_VIDEO_MESON_VDEC=m
|
|||
CONFIG_VIDEO_ROCKCHIP_VDEC=m
|
||||
CONFIG_VIDEO_SUNXI=y
|
||||
CONFIG_VIDEO_SUNXI_CEDRUS=m
|
||||
CONFIG_PHY_ROCKCHIP_DPHY_RX0=m
|
||||
# CONFIG_VIDEO_ZORAN is not set
|
||||
CONFIG_VIDEO_ROCKCHIP_ISP1=m
|
||||
CONFIG_VIDEO_USBVISION=m
|
||||
|
||||
#
|
||||
# Android
|
||||
|
|
@ -7046,8 +7108,9 @@ CONFIG_HMS_ANYBUSS_BUS=m
|
|||
# CONFIG_KPC2000 is not set
|
||||
# CONFIG_QLGE is not set
|
||||
CONFIG_WFX=m
|
||||
# CONFIG_SPMI_HISI3670 is not set
|
||||
# CONFIG_MFD_HI6421_SPMI is not set
|
||||
# CONFIG_GOLDFISH is not set
|
||||
CONFIG_MFD_CROS_EC=y
|
||||
CONFIG_CHROME_PLATFORMS=y
|
||||
CONFIG_CROS_EC=y
|
||||
# CONFIG_CROS_EC_I2C is not set
|
||||
|
|
@ -7066,7 +7129,6 @@ CONFIG_HAVE_CLK=y
|
|||
CONFIG_CLKDEV_LOOKUP=y
|
||||
CONFIG_HAVE_CLK_PREPARE=y
|
||||
CONFIG_COMMON_CLK=y
|
||||
# CONFIG_CLK_HSDK is not set
|
||||
# CONFIG_COMMON_CLK_MAX77686 is not set
|
||||
# CONFIG_COMMON_CLK_MAX9485 is not set
|
||||
CONFIG_COMMON_CLK_RK808=y
|
||||
|
|
@ -7086,6 +7148,10 @@ CONFIG_COMMON_CLK_PWM=y
|
|||
# CONFIG_COMMON_CLK_VC5 is not set
|
||||
CONFIG_COMMON_CLK_BD718XX=m
|
||||
# CONFIG_COMMON_CLK_FIXED_MMIO is not set
|
||||
|
||||
#
|
||||
# Clock support for Amlogic platforms
|
||||
#
|
||||
CONFIG_COMMON_CLK_MESON_REGMAP=y
|
||||
CONFIG_COMMON_CLK_MESON_DUALDIV=y
|
||||
CONFIG_COMMON_CLK_MESON_MPLL=y
|
||||
|
|
@ -7100,6 +7166,19 @@ CONFIG_COMMON_CLK_GXBB=y
|
|||
CONFIG_COMMON_CLK_AXG=y
|
||||
CONFIG_COMMON_CLK_AXG_AUDIO=m
|
||||
CONFIG_COMMON_CLK_G12A=y
|
||||
# end of Clock support for Amlogic platforms
|
||||
|
||||
CONFIG_COMMON_CLK_ROCKCHIP=y
|
||||
CONFIG_CLK_PX30=y
|
||||
CONFIG_CLK_RV110X=y
|
||||
CONFIG_CLK_RK3036=y
|
||||
CONFIG_CLK_RK312X=y
|
||||
CONFIG_CLK_RK3188=y
|
||||
CONFIG_CLK_RK322X=y
|
||||
CONFIG_CLK_RK3308=y
|
||||
CONFIG_CLK_RK3328=y
|
||||
CONFIG_CLK_RK3368=y
|
||||
CONFIG_CLK_RK3399=y
|
||||
CONFIG_CLK_SUNXI=y
|
||||
CONFIG_CLK_SUNXI_CLOCKS=y
|
||||
CONFIG_CLK_SUNXI_PRCM_SUN6I=y
|
||||
|
|
@ -7107,6 +7186,8 @@ CONFIG_CLK_SUNXI_PRCM_SUN8I=y
|
|||
CONFIG_CLK_SUNXI_PRCM_SUN9I=y
|
||||
CONFIG_SUNXI_CCU=y
|
||||
CONFIG_SUN50I_A64_CCU=y
|
||||
CONFIG_SUN50I_A100_CCU=y
|
||||
CONFIG_SUN50I_A100_R_CCU=y
|
||||
CONFIG_SUN50I_H6_CCU=y
|
||||
CONFIG_SUN50I_H6_R_CCU=y
|
||||
CONFIG_SUN8I_A83T_CCU=y
|
||||
|
|
@ -7163,6 +7244,7 @@ CONFIG_ARM_SMMU=y
|
|||
# CONFIG_ARM_SMMU_LEGACY_DT_BINDINGS is not set
|
||||
CONFIG_ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT=y
|
||||
CONFIG_ARM_SMMU_V3=y
|
||||
# CONFIG_ARM_SMMU_V3_SVA is not set
|
||||
# CONFIG_VIRTIO_IOMMU is not set
|
||||
|
||||
#
|
||||
|
|
@ -7225,6 +7307,7 @@ CONFIG_SOC_BRCMSTB=y
|
|||
# end of Qualcomm SoC drivers
|
||||
|
||||
CONFIG_ROCKCHIP_GRF=y
|
||||
CONFIG_ROCKCHIP_IODOMAIN=y
|
||||
CONFIG_ROCKCHIP_PM_DOMAINS=y
|
||||
# CONFIG_ROCKCHIP_SUSPEND_MODE is not set
|
||||
CONFIG_SUNXI_SRAM=y
|
||||
|
|
@ -7275,6 +7358,8 @@ CONFIG_EXTCON_USB_GPIO=y
|
|||
CONFIG_IIO=y
|
||||
CONFIG_IIO_BUFFER=y
|
||||
CONFIG_IIO_BUFFER_CB=m
|
||||
# CONFIG_IIO_BUFFER_DMA is not set
|
||||
# CONFIG_IIO_BUFFER_DMAENGINE is not set
|
||||
# CONFIG_IIO_BUFFER_HW_CONSUMER is not set
|
||||
CONFIG_IIO_KFIFO_BUF=y
|
||||
CONFIG_IIO_TRIGGERED_BUFFER=y
|
||||
|
|
@ -7283,6 +7368,7 @@ CONFIG_IIO_TRIGGER=y
|
|||
CONFIG_IIO_CONSUMERS_PER_TRIGGER=2
|
||||
CONFIG_IIO_SW_DEVICE=m
|
||||
CONFIG_IIO_SW_TRIGGER=m
|
||||
# CONFIG_IIO_TRIGGERED_EVENT is not set
|
||||
|
||||
#
|
||||
# Accelerometers
|
||||
|
|
@ -7528,6 +7614,7 @@ CONFIG_ADIS16080=m
|
|||
CONFIG_ADIS16130=m
|
||||
CONFIG_ADIS16136=m
|
||||
CONFIG_ADIS16260=m
|
||||
# CONFIG_ADXRS290 is not set
|
||||
CONFIG_ADXRS450=m
|
||||
CONFIG_BMG160=m
|
||||
CONFIG_BMG160_I2C=m
|
||||
|
|
@ -7564,6 +7651,7 @@ CONFIG_ITG3200=m
|
|||
CONFIG_AM2315=m
|
||||
CONFIG_DHT11=m
|
||||
CONFIG_HDC100X=m
|
||||
# CONFIG_HDC2010 is not set
|
||||
CONFIG_HID_SENSOR_HUMIDITY=m
|
||||
CONFIG_HTS221=m
|
||||
CONFIG_HTS221_I2C=m
|
||||
|
|
@ -7605,6 +7693,7 @@ CONFIG_AL3010=m
|
|||
CONFIG_AL3320A=m
|
||||
CONFIG_APDS9300=m
|
||||
CONFIG_APDS9960=m
|
||||
# CONFIG_AS73211 is not set
|
||||
CONFIG_BH1750=m
|
||||
CONFIG_BH1780=m
|
||||
CONFIG_CM32181=m
|
||||
|
|
@ -7836,6 +7925,7 @@ CONFIG_RESET_SUNXI=y
|
|||
CONFIG_GENERIC_PHY=y
|
||||
CONFIG_GENERIC_PHY_MIPI_DPHY=y
|
||||
CONFIG_PHY_XGENE=y
|
||||
# CONFIG_USB_LGM_PHY is not set
|
||||
CONFIG_PHY_SUN4I_USB=m
|
||||
CONFIG_PHY_SUN6I_MIPI_DPHY=m
|
||||
CONFIG_PHY_SUN9I_USB=m
|
||||
|
|
@ -7861,6 +7951,7 @@ CONFIG_PHY_MAPPHONE_MDM6600=m
|
|||
# CONFIG_PHY_QCOM_USB_HS is not set
|
||||
# CONFIG_PHY_QCOM_USB_HSIC is not set
|
||||
CONFIG_PHY_ROCKCHIP_DP=y
|
||||
CONFIG_PHY_ROCKCHIP_DPHY_RX0=m
|
||||
CONFIG_PHY_ROCKCHIP_EMMC=y
|
||||
CONFIG_PHY_ROCKCHIP_INNO_HDMI=y
|
||||
CONFIG_PHY_ROCKCHIP_INNO_USB2=y
|
||||
|
|
@ -7883,6 +7974,7 @@ CONFIG_ARM_CCI_PMU=m
|
|||
# CONFIG_ARM_CCI400_PMU is not set
|
||||
# CONFIG_ARM_CCI5xx_PMU is not set
|
||||
# CONFIG_ARM_CCN is not set
|
||||
# CONFIG_ARM_CMN is not set
|
||||
CONFIG_ARM_PMU=y
|
||||
# CONFIG_ARM_DSU_PMU is not set
|
||||
# CONFIG_ARM_SPE_PMU is not set
|
||||
|
|
@ -7940,6 +8032,7 @@ CONFIG_FTM_QUADDEC=m
|
|||
# CONFIG_MICROCHIP_TCB_CAPTURE is not set
|
||||
CONFIG_MOST=m
|
||||
# CONFIG_MOST_USB_HDM is not set
|
||||
# CONFIG_MOST_CDEV is not set
|
||||
# end of Device Drivers
|
||||
|
||||
#
|
||||
|
|
@ -7975,6 +8068,7 @@ CONFIG_JFS_SECURITY=y
|
|||
# CONFIG_JFS_DEBUG is not set
|
||||
CONFIG_JFS_STATISTICS=y
|
||||
CONFIG_XFS_FS=m
|
||||
CONFIG_XFS_SUPPORT_V4=y
|
||||
CONFIG_XFS_QUOTA=y
|
||||
CONFIG_XFS_POSIX_ACL=y
|
||||
CONFIG_XFS_RT=y
|
||||
|
|
@ -8209,6 +8303,7 @@ CONFIG_NFS_FSCACHE=y
|
|||
CONFIG_NFS_USE_KERNEL_DNS=y
|
||||
CONFIG_NFS_DEBUG=y
|
||||
CONFIG_NFS_DISABLE_UDP_SUPPORT=y
|
||||
CONFIG_NFS_V4_2_READ_PLUS=y
|
||||
CONFIG_NFSD=m
|
||||
CONFIG_NFSD_V2_ACL=y
|
||||
CONFIG_NFSD_V3=y
|
||||
|
|
@ -8449,6 +8544,7 @@ CONFIG_CRYPTO_DH=y
|
|||
CONFIG_CRYPTO_ECC=y
|
||||
CONFIG_CRYPTO_ECDH=y
|
||||
CONFIG_CRYPTO_ECRDSA=m
|
||||
# CONFIG_CRYPTO_SM2 is not set
|
||||
CONFIG_CRYPTO_CURVE25519=m
|
||||
|
||||
#
|
||||
|
|
@ -8547,7 +8643,7 @@ CONFIG_CRYPTO_LZO=y
|
|||
CONFIG_CRYPTO_842=m
|
||||
CONFIG_CRYPTO_LZ4=m
|
||||
CONFIG_CRYPTO_LZ4HC=m
|
||||
CONFIG_CRYPTO_ZSTD=m
|
||||
CONFIG_CRYPTO_ZSTD=y
|
||||
|
||||
#
|
||||
# Random Number Generation
|
||||
|
|
@ -8563,7 +8659,9 @@ CONFIG_CRYPTO_USER_API=m
|
|||
CONFIG_CRYPTO_USER_API_HASH=m
|
||||
CONFIG_CRYPTO_USER_API_SKCIPHER=m
|
||||
CONFIG_CRYPTO_USER_API_RNG=m
|
||||
# CONFIG_CRYPTO_USER_API_RNG_CAVP is not set
|
||||
CONFIG_CRYPTO_USER_API_AEAD=m
|
||||
CONFIG_CRYPTO_USER_API_ENABLE_OBSOLETE=y
|
||||
CONFIG_CRYPTO_STATS=y
|
||||
CONFIG_CRYPTO_HASH_INFO=y
|
||||
|
||||
|
|
@ -8592,8 +8690,13 @@ CONFIG_CRYPTO_DEV_SUN4I_SS=m
|
|||
# CONFIG_CRYPTO_DEV_SUN4I_SS_PRNG is not set
|
||||
CONFIG_CRYPTO_DEV_SUN8I_CE=m
|
||||
# CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG is not set
|
||||
# CONFIG_CRYPTO_DEV_SUN8I_CE_HASH is not set
|
||||
# CONFIG_CRYPTO_DEV_SUN8I_CE_PRNG is not set
|
||||
# CONFIG_CRYPTO_DEV_SUN8I_CE_TRNG is not set
|
||||
CONFIG_CRYPTO_DEV_SUN8I_SS=m
|
||||
# CONFIG_CRYPTO_DEV_SUN8I_SS_DEBUG is not set
|
||||
# CONFIG_CRYPTO_DEV_SUN8I_SS_PRNG is not set
|
||||
# CONFIG_CRYPTO_DEV_SUN8I_SS_HASH is not set
|
||||
CONFIG_CRYPTO_DEV_ATMEL_I2C=m
|
||||
CONFIG_CRYPTO_DEV_ATMEL_ECC=m
|
||||
CONFIG_CRYPTO_DEV_ATMEL_SHA204A=m
|
||||
|
|
@ -8730,6 +8833,7 @@ CONFIG_DMA_COHERENT_POOL=y
|
|||
CONFIG_DMA_REMAP=y
|
||||
CONFIG_DMA_DIRECT_REMAP=y
|
||||
CONFIG_DMA_CMA=y
|
||||
CONFIG_DMA_PERNUMA_CMA=y
|
||||
|
||||
#
|
||||
# Default contiguous memory area size:
|
||||
|
|
@ -8773,8 +8877,10 @@ CONFIG_FONT_6x10=y
|
|||
# CONFIG_FONT_SUN8x16 is not set
|
||||
# CONFIG_FONT_SUN12x22 is not set
|
||||
CONFIG_FONT_TER16x32=y
|
||||
# CONFIG_FONT_6x8 is not set
|
||||
CONFIG_SG_SPLIT=y
|
||||
CONFIG_SG_POOL=y
|
||||
CONFIG_ARCH_STACKWALK=y
|
||||
CONFIG_SBITMAP=y
|
||||
# CONFIG_STRING_SELFTEST is not set
|
||||
# end of Library routines
|
||||
|
|
@ -8910,6 +9016,8 @@ CONFIG_LOCK_DEBUGGING_SUPPORT=y
|
|||
# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
|
||||
# CONFIG_LOCK_TORTURE_TEST is not set
|
||||
# CONFIG_WW_MUTEX_SELFTEST is not set
|
||||
# CONFIG_SCF_TORTURE_TEST is not set
|
||||
# CONFIG_CSD_LOCK_WAIT_DEBUG is not set
|
||||
# end of Lock Debugging (spinlocks, mutexes, etc...)
|
||||
|
||||
CONFIG_STACKTRACE=y
|
||||
|
|
@ -8933,7 +9041,7 @@ CONFIG_HAVE_DEBUG_BUGVERBOSE=y
|
|||
# RCU Debugging
|
||||
#
|
||||
CONFIG_TORTURE_TEST=m
|
||||
CONFIG_RCU_PERF_TEST=m
|
||||
# CONFIG_RCU_SCALE_TEST is not set
|
||||
CONFIG_RCU_TORTURE_TEST=m
|
||||
# CONFIG_RCU_REF_SCALE_TEST is not set
|
||||
CONFIG_RCU_CPU_STALL_TIMEOUT=60
|
||||
|
|
@ -9029,7 +9137,6 @@ CONFIG_TEST_STRSCPY=m
|
|||
# CONFIG_TEST_KSTRTOX is not set
|
||||
# CONFIG_TEST_PRINTF is not set
|
||||
# CONFIG_TEST_BITMAP is not set
|
||||
# CONFIG_TEST_BITFIELD is not set
|
||||
# CONFIG_TEST_UUID is not set
|
||||
CONFIG_TEST_XARRAY=m
|
||||
# CONFIG_TEST_OVERFLOW is not set
|
||||
|
|
@ -9045,6 +9152,7 @@ CONFIG_TEST_BLACKHOLE_DEV=m
|
|||
# CONFIG_FIND_BIT_BENCHMARK is not set
|
||||
# CONFIG_TEST_FIRMWARE is not set
|
||||
# CONFIG_TEST_SYSCTL is not set
|
||||
# CONFIG_BITFIELD_KUNIT is not set
|
||||
# CONFIG_SYSCTL_KUNIT_TEST is not set
|
||||
# CONFIG_LIST_KUNIT_TEST is not set
|
||||
# CONFIG_LINEAR_RANGES_TEST is not set
|
||||
|
|
|
|||
|
|
@ -2519,7 +2519,7 @@ CONFIG_TCM_IBLOCK=m
|
|||
CONFIG_TCM_FILEIO=m
|
||||
CONFIG_TCM_PSCSI=m
|
||||
CONFIG_TCM_USER2=m
|
||||
# CONFIG_LOOPBACK_TARGET is not set
|
||||
CONFIG_LOOPBACK_TARGET=m
|
||||
CONFIG_ISCSI_TARGET=m
|
||||
# CONFIG_FUSION is not set
|
||||
|
||||
|
|
@ -3499,7 +3499,7 @@ CONFIG_INPUT_MISC=y
|
|||
# CONFIG_INPUT_E3X0_BUTTON is not set
|
||||
CONFIG_INPUT_MAX77650_ONKEY=m
|
||||
# CONFIG_INPUT_MMA8450 is not set
|
||||
# CONFIG_INPUT_GPIO_BEEPER is not set
|
||||
CONFIG_INPUT_GPIO_BEEPER=m
|
||||
CONFIG_INPUT_GPIO_DECODER=m
|
||||
CONFIG_INPUT_GPIO_VIBRA=m
|
||||
# CONFIG_INPUT_ATI_REMOTE2 is not set
|
||||
|
|
@ -3956,8 +3956,8 @@ CONFIG_GPIO_ADNP=m
|
|||
CONFIG_GPIO_GW_PLD=m
|
||||
CONFIG_GPIO_MAX7300=m
|
||||
CONFIG_GPIO_MAX732X=m
|
||||
CONFIG_GPIO_PCA953X=m
|
||||
# CONFIG_GPIO_PCA953X_IRQ is not set
|
||||
CONFIG_GPIO_PCA953X=y
|
||||
CONFIG_GPIO_PCA953X_IRQ=y
|
||||
# CONFIG_GPIO_PCA9570 is not set
|
||||
CONFIG_GPIO_PCF857X=m
|
||||
CONFIG_GPIO_TPIC2810=m
|
||||
|
|
@ -4058,7 +4058,7 @@ CONFIG_POWER_SUPPLY=y
|
|||
# CONFIG_POWER_SUPPLY_DEBUG is not set
|
||||
CONFIG_POWER_SUPPLY_HWMON=y
|
||||
# CONFIG_PDA_POWER is not set
|
||||
# CONFIG_GENERIC_ADC_BATTERY is not set
|
||||
CONFIG_GENERIC_ADC_BATTERY=m
|
||||
# CONFIG_TEST_POWER is not set
|
||||
CONFIG_CHARGER_ADP5061=m
|
||||
CONFIG_BATTERY_CW2015=m
|
||||
|
|
@ -6489,6 +6489,7 @@ CONFIG_USB_F_UVC=m
|
|||
CONFIG_USB_F_MIDI=m
|
||||
CONFIG_USB_F_HID=m
|
||||
CONFIG_USB_F_PRINTER=m
|
||||
CONFIG_USB_F_TCM=m
|
||||
CONFIG_USB_CONFIGFS=m
|
||||
CONFIG_USB_CONFIGFS_SERIAL=y
|
||||
CONFIG_USB_CONFIGFS_ACM=y
|
||||
|
|
@ -6509,7 +6510,7 @@ CONFIG_USB_CONFIGFS_F_MIDI=y
|
|||
CONFIG_USB_CONFIGFS_F_HID=y
|
||||
CONFIG_USB_CONFIGFS_F_UVC=y
|
||||
CONFIG_USB_CONFIGFS_F_PRINTER=y
|
||||
# CONFIG_USB_CONFIGFS_F_TCM is not set
|
||||
CONFIG_USB_CONFIGFS_F_TCM=y
|
||||
|
||||
#
|
||||
# USB Gadget precomposed configurations
|
||||
|
|
@ -6528,7 +6529,7 @@ CONFIG_USB_FUNCTIONFS_ETH=y
|
|||
CONFIG_USB_FUNCTIONFS_RNDIS=y
|
||||
CONFIG_USB_FUNCTIONFS_GENERIC=y
|
||||
CONFIG_USB_MASS_STORAGE=m
|
||||
# CONFIG_USB_GADGET_TARGET is not set
|
||||
CONFIG_USB_GADGET_TARGET=m
|
||||
CONFIG_USB_G_SERIAL=m
|
||||
CONFIG_USB_MIDI_GADGET=m
|
||||
CONFIG_USB_G_PRINTER=m
|
||||
|
|
@ -6927,7 +6928,7 @@ CONFIG_VHOST_RING=m
|
|||
CONFIG_VHOST=m
|
||||
CONFIG_VHOST_MENU=y
|
||||
CONFIG_VHOST_NET=m
|
||||
# CONFIG_VHOST_SCSI is not set
|
||||
CONFIG_VHOST_SCSI=m
|
||||
# CONFIG_VHOST_VSOCK is not set
|
||||
CONFIG_VHOST_VDPA=m
|
||||
# CONFIG_VHOST_CROSS_ENDIAN_LEGACY is not set
|
||||
|
|
@ -6954,7 +6955,7 @@ CONFIG_XEN_GRANT_DEV_ALLOC=y
|
|||
CONFIG_SWIOTLB_XEN=y
|
||||
# CONFIG_XEN_PVCALLS_FRONTEND is not set
|
||||
# CONFIG_XEN_PVCALLS_BACKEND is not set
|
||||
# CONFIG_XEN_SCSI_BACKEND is not set
|
||||
CONFIG_XEN_SCSI_BACKEND=m
|
||||
CONFIG_XEN_PRIVCMD=y
|
||||
CONFIG_XEN_EFI=y
|
||||
CONFIG_XEN_AUTO_XLATE=y
|
||||
|
|
@ -7990,7 +7991,7 @@ CONFIG_RAS=y
|
|||
|
||||
# CONFIG_LIBNVDIMM is not set
|
||||
CONFIG_DAX=y
|
||||
# CONFIG_DEV_DAX is not set
|
||||
CONFIG_DEV_DAX=m
|
||||
CONFIG_NVMEM=y
|
||||
CONFIG_NVMEM_SYSFS=y
|
||||
CONFIG_NVMEM_SPMI_SDAM=m
|
||||
|
|
|
|||
|
|
@ -92,7 +92,7 @@ case $BRANCH in
|
|||
current)
|
||||
|
||||
KERNELPATCHDIR='rockchip64-'$BRANCH
|
||||
KERNELBRANCH="branch:linux-5.9.y"
|
||||
KERNELBRANCH="branch:linux-5.10.y"
|
||||
LINUXFAMILY=rockchip64
|
||||
LINUXCONFIG='linux-rockchip64-'$BRANCH
|
||||
|
||||
|
|
|
|||
|
|
@ -1,75 +0,0 @@
|
|||
ROCKPi 4 has 3 variants of hardware platforms called
|
||||
RockPI 4A, 4B, and 4C.
|
||||
|
||||
- ROCKPi 4A has no Wif/BT.
|
||||
- ROCKPi 4B has AP6256 Wifi/BT, PoE.
|
||||
- ROCKPi 4C has AP6256 Wifi/BT, PoE, miniDP, USB Host enabled
|
||||
GPIO pin change compared to 4B, 4C
|
||||
|
||||
So move common nodes, properties into dtsi file and include
|
||||
on respective variant dts files.
|
||||
|
||||
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
|
||||
---
|
||||
Changes for v3:
|
||||
- none
|
||||
Changes for v2:
|
||||
- update commit message
|
||||
- add radxa,rockpi4a
|
||||
|
||||
arch/arm64/boot/dts/rockchip/Makefile | 2 +-
|
||||
.../{rk3399-rock-pi-4.dts => rk3399-rock-pi-4.dtsi} | 3 ---
|
||||
arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4a.dts | 13 +++++++++++++
|
||||
3 files changed, 14 insertions(+), 4 deletions(-)
|
||||
rename arch/arm64/boot/dts/rockchip/{rk3399-rock-pi-4.dts => rk3399-rock-pi-4.dtsi} (99%)
|
||||
create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4a.dts
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
|
||||
index b87b1f773083..42f9e1861461 100644
|
||||
--- a/arch/arm64/boot/dts/rockchip/Makefile
|
||||
+++ b/arch/arm64/boot/dts/rockchip/Makefile
|
||||
@@ -33,7 +33,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-pinebook-pro.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-puma-haikou.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc-mezzanine.dtb
|
||||
-dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4.dtb
|
||||
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4a.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock960.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64-v2.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64.dtb
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi
|
||||
similarity index 99%
|
||||
rename from arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts
|
||||
rename to arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi
|
||||
index 60f98a3e19d8..e163f438f836 100644
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi
|
||||
@@ -11,9 +11,6 @@
|
||||
#include "rk3399-opp.dtsi"
|
||||
|
||||
/ {
|
||||
- model = "Radxa ROCK Pi 4";
|
||||
- compatible = "radxa,rockpi4", "rockchip,rk3399";
|
||||
-
|
||||
chosen {
|
||||
stdout-path = "serial2:1500000n8";
|
||||
};
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4a.dts b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4a.dts
|
||||
new file mode 100644
|
||||
index 000000000000..89f2af5e111d
|
||||
--- /dev/null
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4a.dts
|
||||
@@ -0,0 +1,13 @@
|
||||
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
+/*
|
||||
+ * Copyright (c) 2019 Akash Gajjar <Akash_Gajjar@mentor.com>
|
||||
+ * Copyright (c) 2019 Pragnesh Patel <Pragnesh_Patel@mentor.com>
|
||||
+ */
|
||||
+
|
||||
+/dts-v1/;
|
||||
+#include "rk3399-rock-pi-4.dtsi"
|
||||
+
|
||||
+/ {
|
||||
+ model = "Radxa ROCK Pi 4A";
|
||||
+ compatible = "radxa,rockpi4a", "radxa,rockpi4", "rockchip,rk3399";
|
||||
+};
|
||||
|
|
@ -1,118 +0,0 @@
|
|||
RockPI 4B has AP6256 Wifi/BT, so enable them in 4B dts
|
||||
instead of enable in common dtsi.
|
||||
|
||||
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
|
||||
---
|
||||
Changes for v3:
|
||||
- none
|
||||
Changes for v2:
|
||||
- update commit message
|
||||
- add radxa,rockpi4b
|
||||
|
||||
arch/arm64/boot/dts/rockchip/Makefile | 1 +
|
||||
.../boot/dts/rockchip/rk3399-rock-pi-4.dtsi | 23 ----------
|
||||
.../boot/dts/rockchip/rk3399-rock-pi-4b.dts | 42 +++++++++++++++++++
|
||||
3 files changed, 43 insertions(+), 23 deletions(-)
|
||||
create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4b.dts
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
|
||||
index 42f9e1861461..8832d05c2571 100644
|
||||
--- a/arch/arm64/boot/dts/rockchip/Makefile
|
||||
+++ b/arch/arm64/boot/dts/rockchip/Makefile
|
||||
@@ -34,6 +34,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-puma-haikou.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc-mezzanine.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4a.dtb
|
||||
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4b.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock960.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64-v2.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64.dtb
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi
|
||||
index e163f438f836..678a336010bf 100644
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi
|
||||
@@ -584,17 +584,6 @@ &sdio0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
|
||||
sd-uhs-sdr104;
|
||||
- status = "okay";
|
||||
-
|
||||
- brcmf: wifi@1 {
|
||||
- compatible = "brcm,bcm4329-fmac";
|
||||
- reg = <1>;
|
||||
- interrupt-parent = <&gpio0>;
|
||||
- interrupts = <RK_PA3 GPIO_ACTIVE_HIGH>;
|
||||
- interrupt-names = "host-wake";
|
||||
- pinctrl-names = "default";
|
||||
- pinctrl-0 = <&wifi_host_wake_l>;
|
||||
- };
|
||||
};
|
||||
|
||||
&sdmmc {
|
||||
@@ -663,18 +652,6 @@ u2phy1_host: host-port {
|
||||
&uart0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
|
||||
- status = "okay";
|
||||
-
|
||||
- bluetooth {
|
||||
- compatible = "brcm,bcm43438-bt";
|
||||
- clocks = <&rk808 1>;
|
||||
- clock-names = "ext_clock";
|
||||
- device-wakeup-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>;
|
||||
- host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
|
||||
- shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
|
||||
- pinctrl-names = "default";
|
||||
- pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>;
|
||||
- };
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4b.dts b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4b.dts
|
||||
new file mode 100644
|
||||
index 000000000000..f0055ce2fda0
|
||||
--- /dev/null
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4b.dts
|
||||
@@ -0,0 +1,42 @@
|
||||
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
+/*
|
||||
+ * Copyright (c) 2019 Akash Gajjar <Akash_Gajjar@mentor.com>
|
||||
+ * Copyright (c) 2019 Pragnesh Patel <Pragnesh_Patel@mentor.com>
|
||||
+ */
|
||||
+
|
||||
+/dts-v1/;
|
||||
+#include "rk3399-rock-pi-4.dtsi"
|
||||
+
|
||||
+/ {
|
||||
+ model = "Radxa ROCK Pi 4B";
|
||||
+ compatible = "radxa,rockpi4b", "radxa,rockpi4", "rockchip,rk3399";
|
||||
+};
|
||||
+
|
||||
+&sdio0 {
|
||||
+ status = "okay";
|
||||
+
|
||||
+ brcmf: wifi@1 {
|
||||
+ compatible = "brcm,bcm4329-fmac";
|
||||
+ reg = <1>;
|
||||
+ interrupt-parent = <&gpio0>;
|
||||
+ interrupts = <RK_PA3 GPIO_ACTIVE_HIGH>;
|
||||
+ interrupt-names = "host-wake";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&wifi_host_wake_l>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&uart0 {
|
||||
+ status = "okay";
|
||||
+
|
||||
+ bluetooth {
|
||||
+ compatible = "brcm,bcm43438-bt";
|
||||
+ clocks = <&rk808 1>;
|
||||
+ clock-names = "ext_clock";
|
||||
+ device-wakeup-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>;
|
||||
+ host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
|
||||
+ shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>;
|
||||
+ };
|
||||
+};
|
||||
|
|
@ -1,88 +0,0 @@
|
|||
Rock PI 4C has AP6256 Wifi/BT, PoE, miniDP, USB Host enabled
|
||||
GPIO pin change compared to 4B, 4A.
|
||||
|
||||
So, add or enable difference nodes/properties in 4C dts
|
||||
by including common dtsi.
|
||||
|
||||
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
|
||||
---
|
||||
Changes for v3:
|
||||
- none
|
||||
Changes for v2:
|
||||
- update commit message
|
||||
- add radxa,rockpi4c
|
||||
|
||||
arch/arm64/boot/dts/rockchip/Makefile | 1 +
|
||||
.../boot/dts/rockchip/rk3399-rock-pi-4c.dts | 51 +++++++++++++++++++
|
||||
2 files changed, 52 insertions(+)
|
||||
create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4c.dts
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
|
||||
index 8832d05c2571..02cdb3c4a6c1 100644
|
||||
--- a/arch/arm64/boot/dts/rockchip/Makefile
|
||||
+++ b/arch/arm64/boot/dts/rockchip/Makefile
|
||||
@@ -35,6 +35,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc-mezzanine.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4a.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4b.dtb
|
||||
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4c.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock960.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64-v2.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64.dtb
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4c.dts b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4c.dts
|
||||
new file mode 100644
|
||||
index 000000000000..4c7ebb1c5d2d
|
||||
--- /dev/null
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4c.dts
|
||||
@@ -0,0 +1,51 @@
|
||||
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
+/*
|
||||
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
|
||||
+ * Copyright (c) 2019 Radxa Limited
|
||||
+ * Copyright (c) 2019 Amarula Solutions(India)
|
||||
+ */
|
||||
+
|
||||
+/dts-v1/;
|
||||
+#include "rk3399-rock-pi-4.dtsi"
|
||||
+
|
||||
+/ {
|
||||
+ model = "Radxa ROCK Pi 4C";
|
||||
+ compatible = "radxa,rockpi4c", "radxa,rockpi4", "rockchip,rk3399";
|
||||
+};
|
||||
+
|
||||
+&sdio0 {
|
||||
+ status = "okay";
|
||||
+
|
||||
+ brcmf: wifi@1 {
|
||||
+ compatible = "brcm,bcm4329-fmac";
|
||||
+ reg = <1>;
|
||||
+ interrupt-parent = <&gpio0>;
|
||||
+ interrupts = <RK_PA3 GPIO_ACTIVE_HIGH>;
|
||||
+ interrupt-names = "host-wake";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&wifi_host_wake_l>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&uart0 {
|
||||
+ status = "okay";
|
||||
+
|
||||
+ bluetooth {
|
||||
+ compatible = "brcm,bcm43438-bt";
|
||||
+ clocks = <&rk808 1>;
|
||||
+ clock-names = "ext_clock";
|
||||
+ device-wakeup-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>;
|
||||
+ host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
|
||||
+ shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&vcc5v0_host {
|
||||
+ gpio = <&gpio3 RK_PD6 GPIO_ACTIVE_HIGH>;
|
||||
+};
|
||||
+
|
||||
+&vcc5v0_host_en {
|
||||
+ rockchip,pins = <3 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+};
|
||||
|
|
@ -211,6 +211,6 @@ index 000000000..bf0a625fe
|
|||
+ pinctl-0 = <&uart1_xfer>;
|
||||
+};
|
||||
+
|
||||
--
|
||||
--
|
||||
Created with Armbian build tools https://github.com/armbian/build
|
||||
|
||||
|
|
|
|||
|
|
@ -212,9 +212,9 @@ index 82b19ebd7838..6f00b17afc15 100644
|
|||
#include <linux/debugfs.h>
|
||||
#include <linux/device.h>
|
||||
+#include <linux/extcon-provider.h>
|
||||
#include <linux/hrtimer.h>
|
||||
#include <linux/jiffies.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/module.h>
|
||||
@@ -322,6 +323,11 @@ struct tcpm_port {
|
||||
/* port belongs to a self powered device */
|
||||
bool self_powered;
|
||||
|
|
|
|||
|
|
@ -491,22 +491,10 @@ index 7486f6e4e613..d46a267ea309 100644
|
|||
/**
|
||||
* regulator_suspend - prepare regulators for system wide suspend
|
||||
* @dev: ``&struct device`` pointer that is passed to _regulator_suspend()
|
||||
@@ -5278,10 +5286,34 @@ static int regulator_suspend(struct device *dev)
|
||||
{
|
||||
struct regulator_dev *rdev = dev_to_rdev(dev);
|
||||
suspend_state_t state = pm_suspend_target_state;
|
||||
+ struct regulator_state *rstate;
|
||||
int ret;
|
||||
@@ -5430,6 +5438,21 @@ static int regulator_suspend(struct device *dev)
|
||||
|
||||
regulator_lock(rdev);
|
||||
ret = suspend_set_state(rdev, state);
|
||||
+ if (ret) {
|
||||
+ goto out;
|
||||
+ }
|
||||
+
|
||||
+ rstate = regulator_get_suspend_state(rdev, state);
|
||||
+ if (rstate == NULL)
|
||||
+ goto out;
|
||||
ret = __suspend_set_state(rdev, rstate);
|
||||
+
|
||||
+ if (rstate->enabled == ENABLE_IN_SUSPEND && can_enable(rdev)) {
|
||||
+ if (!rdev->desc->ops->set_suspend_enable) {
|
||||
|
|
@ -521,18 +509,16 @@ index 7486f6e4e613..d46a267ea309 100644
|
|||
+ ret = _regulator_do_disable(rdev);
|
||||
+ }
|
||||
+ }
|
||||
+out:
|
||||
+
|
||||
regulator_unlock(rdev);
|
||||
|
||||
return ret;
|
||||
@@ -5300,10 +5332,19 @@ static int regulator_resume(struct device *dev)
|
||||
@@ -5452,9 +5475,19 @@ static int regulator_resume(struct device *dev)
|
||||
|
||||
regulator_lock(rdev);
|
||||
|
||||
- if (rdev->desc->ops->resume &&
|
||||
- (rstate->enabled == ENABLE_IN_SUSPEND ||
|
||||
- rstate->enabled == DISABLE_IN_SUSPEND))
|
||||
- if (rstate->enabled == ENABLE_IN_SUSPEND ||
|
||||
- rstate->enabled == DISABLE_IN_SUSPEND)
|
||||
- ret = rdev->desc->ops->resume(rdev);
|
||||
+ if (rstate->enabled == ENABLE_IN_SUSPEND || rstate->enabled == DISABLE_IN_SUSPEND) {
|
||||
+ if (rdev->desc->ops->resume) {
|
||||
|
|
|
|||
|
|
@ -50,10 +50,10 @@ diff --git a/drivers/bluetooth/hci_serdev.c b/drivers/bluetooth/hci_serdev.c
|
|||
index 4652896d4990..043c585b34a7 100644
|
||||
--- a/drivers/bluetooth/hci_serdev.c
|
||||
+++ b/drivers/bluetooth/hci_serdev.c
|
||||
@@ -364,5 +364,7 @@ void hci_uart_unregister_device(struct hci_uart *hu)
|
||||
|
||||
hu->proto->close(hu);
|
||||
serdev_device_close(hu->serdev);
|
||||
@@ -395,5 +395,7 @@ void hci_uart_unregister_device(struct hci_uart *hu)
|
||||
clear_bit(HCI_UART_PROTO_READY, &hu->flags);
|
||||
serdev_device_close(hu->serdev);
|
||||
}
|
||||
+
|
||||
+clear_bit(HCI_UART_REGISTERED, &hu->flags);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,12 +0,0 @@
|
|||
diff --git a/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts b/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts
|
||||
index f300f3d0f..f4b6799a8 100644
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts
|
||||
@@ -345,6 +345,7 @@
|
||||
};
|
||||
|
||||
&usb20_otg {
|
||||
+ dr_mode = "host";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
|
@ -1,70 +0,0 @@
|
|||
Added sys_12v regulator for header supplied voltage
|
||||
|
||||
Additionally switched all outputs from dc_12v to it to allow
|
||||
booting of the boards without USB-C.
|
||||
|
||||
Signed-off-by: Piotr Szczepanik <piter75@gmail.com>
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-roc-pc-mezzanine.dts b/arch/arm64/boot/dts/rockchip/rk3399-roc-pc-mezzanine.dts
|
||||
index 2acb3d500..5a7a5dab3 100644
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3399-roc-pc-mezzanine.dts
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3399-roc-pc-mezzanine.dts
|
||||
@@ -22,7 +22,7 @@
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
- vin-supply = <&dc_12v>;
|
||||
+ vin-supply = <&sys_12v>;
|
||||
};
|
||||
|
||||
vcc3v3_pcie: vcc3v3-pcie {
|
||||
@@ -34,7 +34,7 @@
|
||||
pinctrl-0 = <&vcc3v3_pcie_en>;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
- vin-supply = <&dc_12v>;
|
||||
+ vin-supply = <&sys_12v>;
|
||||
};
|
||||
};
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi
|
||||
index 057c938be..40c25e6f6 100644
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi
|
||||
@@ -101,6 +101,15 @@
|
||||
reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
+ sys_12v: sys_12v {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "sys_12v";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <12000000>;
|
||||
+ regulator-max-microvolt = <12000000>;
|
||||
+ };
|
||||
+
|
||||
vcc_vbus_typec0: vcc-vbus-typec0 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc_vbus_typec0";
|
||||
@@ -141,7 +150,7 @@
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
- vin-supply = <&dc_12v>;
|
||||
+ vin-supply = <&sys_12v>;
|
||||
};
|
||||
|
||||
vcca_0v9: vcca-0v9 {
|
||||
@@ -186,7 +195,7 @@
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
- vin-supply = <&dc_12v>;
|
||||
+ vin-supply = <&sys_12v>;
|
||||
};
|
||||
|
||||
vdd_log: vdd-log {
|
||||
--
|
||||
2.17.1
|
||||
|
||||
|
|
@ -1,4 +1,4 @@
|
|||
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi
|
||||
index 1ae1ebd4e..2f84397d5 100644
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi
|
||||
|
|
|
|||
|
|
@ -5,7 +5,6 @@ Subject: [PATCH] Add DT link for backward compatibility
|
|||
|
||||
Signed-off-by: Igor Pecovnik <igor.pecovnik@gmail.com>
|
||||
---
|
||||
arch/arm64/boot/dts/rockchip/Makefile | 1 +
|
||||
arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts | 1 +
|
||||
2 files changed, 2 insertions(+)
|
||||
create mode 120000 arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts
|
||||
|
|
|
|||
|
|
@ -291,7 +291,7 @@ index 61c984f10d8e..e6125ebfe5a9 100644
|
|||
if (i2s->is_master_mode) {
|
||||
mclk_rate = clk_get_rate(i2s->mclk);
|
||||
- bclk_rate = 2 * 32 * params_rate(params);
|
||||
- if (bclk_rate && mclk_rate % bclk_rate)
|
||||
- if (bclk_rate == 0 || mclk_rate % bclk_rate)
|
||||
+ bclk_rate = i2s->bclk_fs * params_rate(params);
|
||||
+ if (!bclk_rate)
|
||||
return -EINVAL;
|
||||
|
|
|
|||
|
|
@ -1,24 +0,0 @@
|
|||
From 3f90a9ef2e8d7e647572b2f2f2f54dce20c654c5 Mon Sep 17 00:00:00 2001
|
||||
From: ashthespy <ashthespy@gmail.com>
|
||||
Date: Mon, 3 Feb 2020 21:29:44 +0100
|
||||
Subject: [PATCH 23/23] ASoC: rockchip: i2s: add compatible for rk3308
|
||||
|
||||
---
|
||||
sound/soc/rockchip/rockchip_i2s.c | 1 +
|
||||
1 files changed, 1 insertions(+)
|
||||
|
||||
diff --git a/sound/soc/rockchip/rockchip_i2s.c b/sound/soc/rockchip/rockchip_i2s.c
|
||||
index e6125ebfe5a9..dcee123b0939 100644
|
||||
--- a/sound/soc/rockchip/rockchip_i2s.c
|
||||
+++ b/sound/soc/rockchip/rockchip_i2s.c
|
||||
@@ -598,6 +598,7 @@ static const struct of_device_id rockchip_i2s_match[] = {
|
||||
{ .compatible = "rockchip,rk3066-i2s", },
|
||||
{ .compatible = "rockchip,rk3128-i2s", },
|
||||
{ .compatible = "rockchip,rk3188-i2s", },
|
||||
+ { .compatible = "rockchip,rk3308-i2s", },
|
||||
{ .compatible = "rockchip,rk3288-i2s", },
|
||||
{ .compatible = "rockchip,rk3308-i2s", },
|
||||
{ .compatible = "rockchip,rk3328-i2s", },
|
||||
--
|
||||
2.25.1
|
||||
|
||||
|
|
@ -23,7 +23,7 @@ Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
|
|||
1 file changed, 8 insertions(+)
|
||||
|
||||
diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c
|
||||
index 8ccae6452..3d0494bdb 100644
|
||||
index d42037f0f..019dc3555 100644
|
||||
--- a/drivers/mmc/core/core.c
|
||||
+++ b/drivers/mmc/core/core.c
|
||||
@@ -1349,6 +1349,14 @@ void mmc_power_off(struct mmc_host *host)
|
||||
|
|
|
|||
|
|
@ -27,8 +27,8 @@ index 7b66e2743a4f..f0cfed84d60d 100644
|
|||
continue;
|
||||
|
||||
if (dpb[i].flags & V4L2_H264_DPB_ENTRY_FLAG_LONG_TERM ||
|
||||
- dpb[i].frame_num < sl_params->frame_num) {
|
||||
+ dpb[i].frame_num <= sl_params->frame_num) {
|
||||
- dpb[i].frame_num < dec_params->frame_num) {
|
||||
+ dpb[i].frame_num <= dec_params->frame_num) {
|
||||
p[i] = dpb[i].frame_num;
|
||||
continue;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -802,7 +802,7 @@ index 000000000000..9e3c87019ada
|
|||
+ return PTR_ERR(data->dmc_clk);
|
||||
+ }
|
||||
+
|
||||
+ data->edev = devfreq_event_get_edev_by_phandle(dev, 0);
|
||||
+ data->edev = devfreq_event_get_edev_by_phandle(dev, "devfreq-events", 0);
|
||||
+ if (IS_ERR(data->edev))
|
||||
+ return -EPROBE_DEFER;
|
||||
+
|
||||
|
|
|
|||
|
|
@ -6,7 +6,7 @@ index a1041ec3e..cc5855eda 100644
|
|||
*/
|
||||
|
||||
/dts-v1/;
|
||||
+#include "rk3328-dram-default-timing.dtsi"
|
||||
+#include "rk3328-dram-renegade-timing.dtsi"
|
||||
#include "rk3328.dtsi"
|
||||
|
||||
/ {
|
||||
|
|
@ -31,7 +31,7 @@ index a1041ec3e..cc5855eda 100644
|
|||
+ ddr_timing = <&ddr_timing>;
|
||||
+ upthreshold = <40>;
|
||||
+ downdifferential = <20>;
|
||||
+ auto-min-freq = <786000>;
|
||||
+ auto-min-freq = <840000>;
|
||||
+ auto-freq-en = <0>;
|
||||
+ #cooling-cells = <2>;
|
||||
+ status = "okay";
|
||||
|
|
@ -79,8 +79,8 @@ index a1041ec3e..cc5855eda 100644
|
|||
+ opp-microvolt-L0 = <1100000>;
|
||||
+ opp-microvolt-L1 = <1075000>;
|
||||
+ };
|
||||
+ opp-1056000000 {
|
||||
+ opp-hz = /bits/ 64 <1056000000>;
|
||||
+ opp-1068000000 {
|
||||
+ opp-hz = /bits/ 64 <1068000000>;
|
||||
+ opp-microvolt = <1175000>;
|
||||
+ opp-microvolt-L0 = <1175000>;
|
||||
+ opp-microvolt-L1 = <1150000>;
|
||||
|
|
|
|||
|
|
@ -0,0 +1,331 @@
|
|||
From 036c59ebd2265236880bb156e995af55249726b1 Mon Sep 17 00:00:00 2001
|
||||
From: tonymac32 <tonymckahan@gmail.com>
|
||||
Date: Wed, 7 Oct 2020 23:39:54 -0400
|
||||
Subject: [PATCH] board-rk3328-roc-cc-adjust-DMC-opps
|
||||
|
||||
Signed-off-by: tonymac32 <tonymckahan@gmail.com>
|
||||
---
|
||||
.../rockchip/rk3328-dram-renegade-timing.dtsi | 311 ++++++++++++++++++
|
||||
1 file changed, 311 insertions(+), 0 deletion(-)
|
||||
create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-dram-renegade-timing.dtsi
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/rk3328-dram-renegade-timing.dtsi b/arch/arm64/boot/dts/rockchip/rk3328-dram-renegade-timing.dtsi
|
||||
new file mode 100644
|
||||
index 000000000..303428153
|
||||
--- /dev/null
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3328-dram-renegade-timing.dtsi
|
||||
@@ -0,0 +1,311 @@
|
||||
+/*
|
||||
+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
|
||||
+ *
|
||||
+ * This file is dual-licensed: you can use it either under the terms
|
||||
+ * of the GPL or the X11 license, at your option. Note that this dual
|
||||
+ * licensing only applies to this file, and not this project as a
|
||||
+ * whole.
|
||||
+ *
|
||||
+ * a) This library is free software; you can redistribute it and/or
|
||||
+ * modify it under the terms of the GNU General Public License as
|
||||
+ * published by the Free Software Foundation; either version 2 of the
|
||||
+ * License, or (at your option) any later version.
|
||||
+ *
|
||||
+ * This library is distributed in the hope that it will be useful,
|
||||
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
+ * GNU General Public License for more details.
|
||||
+ *
|
||||
+ * Or, alternatively,
|
||||
+ *
|
||||
+ * b) Permission is hereby granted, free of charge, to any person
|
||||
+ * obtaining a copy of this software and associated documentation
|
||||
+ * files (the "Software"), to deal in the Software without
|
||||
+ * restriction, including without limitation the rights to use,
|
||||
+ * copy, modify, merge, publish, distribute, sublicense, and/or
|
||||
+ * sell copies of the Software, and to permit persons to whom the
|
||||
+ * Software is furnished to do so, subject to the following
|
||||
+ * conditions:
|
||||
+ *
|
||||
+ * The above copyright notice and this permission notice shall be
|
||||
+ * included in all copies or substantial portions of the Software.
|
||||
+ *
|
||||
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
|
||||
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
|
||||
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
+ * OTHER DEALINGS IN THE SOFTWARE.
|
||||
+ */
|
||||
+#include <dt-bindings/clock/rockchip-ddr.h>
|
||||
+#include <dt-bindings/memory/rk3328-dram.h>
|
||||
+
|
||||
+/ {
|
||||
+ ddr_timing: ddr_timing {
|
||||
+ compatible = "rockchip,ddr-timing";
|
||||
+ ddr3_speed_bin = <DDR3_DEFAULT>;
|
||||
+ ddr4_speed_bin = <DDR4_DEFAULT>;
|
||||
+ pd_idle = <0>;
|
||||
+ sr_idle = <0>;
|
||||
+ sr_mc_gate_idle = <0>;
|
||||
+ srpd_lite_idle = <0>;
|
||||
+ standby_idle = <0>;
|
||||
+
|
||||
+ auto_pd_dis_freq = <1066>;
|
||||
+ auto_sr_dis_freq = <800>;
|
||||
+ ddr3_dll_dis_freq = <300>;
|
||||
+ ddr4_dll_dis_freq = <625>;
|
||||
+ phy_dll_dis_freq = <400>;
|
||||
+
|
||||
+ ddr3_odt_dis_freq = <100>;
|
||||
+ phy_ddr3_odt_dis_freq = <100>;
|
||||
+ ddr3_drv = <DDR3_DS_40ohm>;
|
||||
+ ddr3_odt = <DDR3_ODT_120ohm>;
|
||||
+ phy_ddr3_ca_drv = <PHY_DDR3_RON_RTT_34ohm>;
|
||||
+ phy_ddr3_ck_drv = <PHY_DDR3_RON_RTT_45ohm>;
|
||||
+ phy_ddr3_dq_drv = <PHY_DDR3_RON_RTT_34ohm>;
|
||||
+ phy_ddr3_odt = <PHY_DDR3_RON_RTT_225ohm>;
|
||||
+
|
||||
+ lpddr3_odt_dis_freq = <666>;
|
||||
+ phy_lpddr3_odt_dis_freq = <666>;
|
||||
+ lpddr3_drv = <LP3_DS_40ohm>;
|
||||
+ lpddr3_odt = <LP3_ODT_240ohm>;
|
||||
+ phy_lpddr3_ca_drv = <PHY_DDR4_LPDDR3_RON_RTT_34ohm>;
|
||||
+ phy_lpddr3_ck_drv = <PHY_DDR4_LPDDR3_RON_RTT_43ohm>;
|
||||
+ phy_lpddr3_dq_drv = <PHY_DDR4_LPDDR3_RON_RTT_34ohm>;
|
||||
+ phy_lpddr3_odt = <PHY_DDR4_LPDDR3_RON_RTT_240ohm>;
|
||||
+
|
||||
+ lpddr4_odt_dis_freq = <800>;
|
||||
+ phy_lpddr4_odt_dis_freq = <800>;
|
||||
+ lpddr4_drv = <LP4_PDDS_60ohm>;
|
||||
+ lpddr4_dq_odt = <LP4_DQ_ODT_40ohm>;
|
||||
+ lpddr4_ca_odt = <LP4_CA_ODT_40ohm>;
|
||||
+ phy_lpddr4_ca_drv = <PHY_DDR4_LPDDR3_RON_RTT_40ohm>;
|
||||
+ phy_lpddr4_ck_cs_drv = <PHY_DDR4_LPDDR3_RON_RTT_80ohm>;
|
||||
+ phy_lpddr4_dq_drv = <PHY_DDR4_LPDDR3_RON_RTT_80ohm>;
|
||||
+ phy_lpddr4_odt = <PHY_DDR4_LPDDR3_RON_RTT_60ohm>;
|
||||
+
|
||||
+ ddr4_odt_dis_freq = <666>;
|
||||
+ phy_ddr4_odt_dis_freq = <666>;
|
||||
+ ddr4_drv = <DDR4_DS_34ohm>;
|
||||
+ ddr4_odt = <DDR4_RTT_NOM_240ohm>;
|
||||
+ phy_ddr4_ca_drv = <PHY_DDR4_LPDDR3_RON_RTT_34ohm>;
|
||||
+ phy_ddr4_ck_drv = <PHY_DDR4_LPDDR3_RON_RTT_43ohm>;
|
||||
+ phy_ddr4_dq_drv = <PHY_DDR4_LPDDR3_RON_RTT_34ohm>;
|
||||
+ phy_ddr4_odt = <PHY_DDR4_LPDDR3_RON_RTT_240ohm>;
|
||||
+
|
||||
+ /* CA de-skew, one step is 47.8ps, range 0-15 */
|
||||
+ ddr3a1_ddr4a9_de-skew = <0>;
|
||||
+ ddr3a0_ddr4a10_de-skew = <0>;
|
||||
+ ddr3a3_ddr4a6_de-skew = <1>;
|
||||
+ ddr3a2_ddr4a4_de-skew = <1>;
|
||||
+ ddr3a5_ddr4a8_de-skew = <0>;
|
||||
+ ddr3a4_ddr4a5_de-skew = <2>;
|
||||
+ ddr3a7_ddr4a11_de-skew = <0>;
|
||||
+ ddr3a6_ddr4a7_de-skew = <2>;
|
||||
+ ddr3a9_ddr4a0_de-skew = <1>;
|
||||
+ ddr3a8_ddr4a13_de-skew = <0>;
|
||||
+ ddr3a11_ddr4a3_de-skew = <2>;
|
||||
+ ddr3a10_ddr4cs0_de-skew = <0>;
|
||||
+ ddr3a13_ddr4a2_de-skew = <1>;
|
||||
+ ddr3a12_ddr4ba1_de-skew = <0>;
|
||||
+ ddr3a15_ddr4odt0_de-skew = <0>;
|
||||
+ ddr3a14_ddr4a1_de-skew = <1>;
|
||||
+ ddr3ba1_ddr4a15_de-skew = <0>;
|
||||
+ ddr3ba0_ddr4bg0_de-skew = <0>;
|
||||
+ ddr3ras_ddr4cke_de-skew = <0>;
|
||||
+ ddr3ba2_ddr4ba0_de-skew = <1>;
|
||||
+ ddr3we_ddr4bg1_de-skew = <1>;
|
||||
+ ddr3cas_ddr4a12_de-skew = <0>;
|
||||
+ ddr3ckn_ddr4ckn_de-skew = <5>;
|
||||
+ ddr3ckp_ddr4ckp_de-skew = <5>;
|
||||
+ ddr3cke_ddr4a16_de-skew = <1>;
|
||||
+ ddr3odt0_ddr4a14_de-skew = <0>;
|
||||
+ ddr3cs0_ddr4act_de-skew = <1>;
|
||||
+ ddr3reset_ddr4reset_de-skew = <0>;
|
||||
+ ddr3cs1_ddr4cs1_de-skew = <0>;
|
||||
+ ddr3odt1_ddr4odt1_de-skew = <0>;
|
||||
+
|
||||
+ /* DATA de-skew
|
||||
+ * RX one step is 25.1ps, range 0-15
|
||||
+ * TX one step is 47.8ps, range 0-15
|
||||
+ */
|
||||
+ cs0_dm0_rx_de-skew = <7>;
|
||||
+ cs0_dm0_tx_de-skew = <8>;
|
||||
+ cs0_dq0_rx_de-skew = <7>;
|
||||
+ cs0_dq0_tx_de-skew = <8>;
|
||||
+ cs0_dq1_rx_de-skew = <7>;
|
||||
+ cs0_dq1_tx_de-skew = <8>;
|
||||
+ cs0_dq2_rx_de-skew = <7>;
|
||||
+ cs0_dq2_tx_de-skew = <8>;
|
||||
+ cs0_dq3_rx_de-skew = <7>;
|
||||
+ cs0_dq3_tx_de-skew = <8>;
|
||||
+ cs0_dq4_rx_de-skew = <7>;
|
||||
+ cs0_dq4_tx_de-skew = <8>;
|
||||
+ cs0_dq5_rx_de-skew = <7>;
|
||||
+ cs0_dq5_tx_de-skew = <8>;
|
||||
+ cs0_dq6_rx_de-skew = <7>;
|
||||
+ cs0_dq6_tx_de-skew = <8>;
|
||||
+ cs0_dq7_rx_de-skew = <7>;
|
||||
+ cs0_dq7_tx_de-skew = <8>;
|
||||
+ cs0_dqs0_rx_de-skew = <6>;
|
||||
+ cs0_dqs0p_tx_de-skew = <9>;
|
||||
+ cs0_dqs0n_tx_de-skew = <9>;
|
||||
+
|
||||
+ cs0_dm1_rx_de-skew = <7>;
|
||||
+ cs0_dm1_tx_de-skew = <7>;
|
||||
+ cs0_dq8_rx_de-skew = <7>;
|
||||
+ cs0_dq8_tx_de-skew = <8>;
|
||||
+ cs0_dq9_rx_de-skew = <7>;
|
||||
+ cs0_dq9_tx_de-skew = <7>;
|
||||
+ cs0_dq10_rx_de-skew = <7>;
|
||||
+ cs0_dq10_tx_de-skew = <8>;
|
||||
+ cs0_dq11_rx_de-skew = <7>;
|
||||
+ cs0_dq11_tx_de-skew = <7>;
|
||||
+ cs0_dq12_rx_de-skew = <7>;
|
||||
+ cs0_dq12_tx_de-skew = <8>;
|
||||
+ cs0_dq13_rx_de-skew = <7>;
|
||||
+ cs0_dq13_tx_de-skew = <7>;
|
||||
+ cs0_dq14_rx_de-skew = <7>;
|
||||
+ cs0_dq14_tx_de-skew = <8>;
|
||||
+ cs0_dq15_rx_de-skew = <7>;
|
||||
+ cs0_dq15_tx_de-skew = <7>;
|
||||
+ cs0_dqs1_rx_de-skew = <7>;
|
||||
+ cs0_dqs1p_tx_de-skew = <9>;
|
||||
+ cs0_dqs1n_tx_de-skew = <9>;
|
||||
+
|
||||
+ cs0_dm2_rx_de-skew = <7>;
|
||||
+ cs0_dm2_tx_de-skew = <8>;
|
||||
+ cs0_dq16_rx_de-skew = <7>;
|
||||
+ cs0_dq16_tx_de-skew = <8>;
|
||||
+ cs0_dq17_rx_de-skew = <7>;
|
||||
+ cs0_dq17_tx_de-skew = <8>;
|
||||
+ cs0_dq18_rx_de-skew = <7>;
|
||||
+ cs0_dq18_tx_de-skew = <8>;
|
||||
+ cs0_dq19_rx_de-skew = <7>;
|
||||
+ cs0_dq19_tx_de-skew = <8>;
|
||||
+ cs0_dq20_rx_de-skew = <7>;
|
||||
+ cs0_dq20_tx_de-skew = <8>;
|
||||
+ cs0_dq21_rx_de-skew = <7>;
|
||||
+ cs0_dq21_tx_de-skew = <8>;
|
||||
+ cs0_dq22_rx_de-skew = <7>;
|
||||
+ cs0_dq22_tx_de-skew = <8>;
|
||||
+ cs0_dq23_rx_de-skew = <7>;
|
||||
+ cs0_dq23_tx_de-skew = <8>;
|
||||
+ cs0_dqs2_rx_de-skew = <6>;
|
||||
+ cs0_dqs2p_tx_de-skew = <9>;
|
||||
+ cs0_dqs2n_tx_de-skew = <9>;
|
||||
+
|
||||
+ cs0_dm3_rx_de-skew = <7>;
|
||||
+ cs0_dm3_tx_de-skew = <7>;
|
||||
+ cs0_dq24_rx_de-skew = <7>;
|
||||
+ cs0_dq24_tx_de-skew = <8>;
|
||||
+ cs0_dq25_rx_de-skew = <7>;
|
||||
+ cs0_dq25_tx_de-skew = <7>;
|
||||
+ cs0_dq26_rx_de-skew = <7>;
|
||||
+ cs0_dq26_tx_de-skew = <7>;
|
||||
+ cs0_dq27_rx_de-skew = <7>;
|
||||
+ cs0_dq27_tx_de-skew = <7>;
|
||||
+ cs0_dq28_rx_de-skew = <7>;
|
||||
+ cs0_dq28_tx_de-skew = <7>;
|
||||
+ cs0_dq29_rx_de-skew = <7>;
|
||||
+ cs0_dq29_tx_de-skew = <7>;
|
||||
+ cs0_dq30_rx_de-skew = <7>;
|
||||
+ cs0_dq30_tx_de-skew = <7>;
|
||||
+ cs0_dq31_rx_de-skew = <7>;
|
||||
+ cs0_dq31_tx_de-skew = <7>;
|
||||
+ cs0_dqs3_rx_de-skew = <7>;
|
||||
+ cs0_dqs3p_tx_de-skew = <9>;
|
||||
+ cs0_dqs3n_tx_de-skew = <9>;
|
||||
+
|
||||
+ cs1_dm0_rx_de-skew = <7>;
|
||||
+ cs1_dm0_tx_de-skew = <8>;
|
||||
+ cs1_dq0_rx_de-skew = <7>;
|
||||
+ cs1_dq0_tx_de-skew = <8>;
|
||||
+ cs1_dq1_rx_de-skew = <7>;
|
||||
+ cs1_dq1_tx_de-skew = <8>;
|
||||
+ cs1_dq2_rx_de-skew = <7>;
|
||||
+ cs1_dq2_tx_de-skew = <8>;
|
||||
+ cs1_dq3_rx_de-skew = <7>;
|
||||
+ cs1_dq3_tx_de-skew = <8>;
|
||||
+ cs1_dq4_rx_de-skew = <7>;
|
||||
+ cs1_dq4_tx_de-skew = <8>;
|
||||
+ cs1_dq5_rx_de-skew = <7>;
|
||||
+ cs1_dq5_tx_de-skew = <8>;
|
||||
+ cs1_dq6_rx_de-skew = <7>;
|
||||
+ cs1_dq6_tx_de-skew = <8>;
|
||||
+ cs1_dq7_rx_de-skew = <7>;
|
||||
+ cs1_dq7_tx_de-skew = <8>;
|
||||
+ cs1_dqs0_rx_de-skew = <6>;
|
||||
+ cs1_dqs0p_tx_de-skew = <9>;
|
||||
+ cs1_dqs0n_tx_de-skew = <9>;
|
||||
+
|
||||
+ cs1_dm1_rx_de-skew = <7>;
|
||||
+ cs1_dm1_tx_de-skew = <7>;
|
||||
+ cs1_dq8_rx_de-skew = <7>;
|
||||
+ cs1_dq8_tx_de-skew = <8>;
|
||||
+ cs1_dq9_rx_de-skew = <7>;
|
||||
+ cs1_dq9_tx_de-skew = <7>;
|
||||
+ cs1_dq10_rx_de-skew = <7>;
|
||||
+ cs1_dq10_tx_de-skew = <8>;
|
||||
+ cs1_dq11_rx_de-skew = <7>;
|
||||
+ cs1_dq11_tx_de-skew = <7>;
|
||||
+ cs1_dq12_rx_de-skew = <7>;
|
||||
+ cs1_dq12_tx_de-skew = <8>;
|
||||
+ cs1_dq13_rx_de-skew = <7>;
|
||||
+ cs1_dq13_tx_de-skew = <7>;
|
||||
+ cs1_dq14_rx_de-skew = <7>;
|
||||
+ cs1_dq14_tx_de-skew = <8>;
|
||||
+ cs1_dq15_rx_de-skew = <7>;
|
||||
+ cs1_dq15_tx_de-skew = <7>;
|
||||
+ cs1_dqs1_rx_de-skew = <7>;
|
||||
+ cs1_dqs1p_tx_de-skew = <9>;
|
||||
+ cs1_dqs1n_tx_de-skew = <9>;
|
||||
+
|
||||
+ cs1_dm2_rx_de-skew = <7>;
|
||||
+ cs1_dm2_tx_de-skew = <8>;
|
||||
+ cs1_dq16_rx_de-skew = <7>;
|
||||
+ cs1_dq16_tx_de-skew = <8>;
|
||||
+ cs1_dq17_rx_de-skew = <7>;
|
||||
+ cs1_dq17_tx_de-skew = <8>;
|
||||
+ cs1_dq18_rx_de-skew = <7>;
|
||||
+ cs1_dq18_tx_de-skew = <8>;
|
||||
+ cs1_dq19_rx_de-skew = <7>;
|
||||
+ cs1_dq19_tx_de-skew = <8>;
|
||||
+ cs1_dq20_rx_de-skew = <7>;
|
||||
+ cs1_dq20_tx_de-skew = <8>;
|
||||
+ cs1_dq21_rx_de-skew = <7>;
|
||||
+ cs1_dq21_tx_de-skew = <8>;
|
||||
+ cs1_dq22_rx_de-skew = <7>;
|
||||
+ cs1_dq22_tx_de-skew = <8>;
|
||||
+ cs1_dq23_rx_de-skew = <7>;
|
||||
+ cs1_dq23_tx_de-skew = <8>;
|
||||
+ cs1_dqs2_rx_de-skew = <6>;
|
||||
+ cs1_dqs2p_tx_de-skew = <9>;
|
||||
+ cs1_dqs2n_tx_de-skew = <9>;
|
||||
+
|
||||
+ cs1_dm3_rx_de-skew = <7>;
|
||||
+ cs1_dm3_tx_de-skew = <7>;
|
||||
+ cs1_dq24_rx_de-skew = <7>;
|
||||
+ cs1_dq24_tx_de-skew = <8>;
|
||||
+ cs1_dq25_rx_de-skew = <7>;
|
||||
+ cs1_dq25_tx_de-skew = <7>;
|
||||
+ cs1_dq26_rx_de-skew = <7>;
|
||||
+ cs1_dq26_tx_de-skew = <7>;
|
||||
+ cs1_dq27_rx_de-skew = <7>;
|
||||
+ cs1_dq27_tx_de-skew = <7>;
|
||||
+ cs1_dq28_rx_de-skew = <7>;
|
||||
+ cs1_dq28_tx_de-skew = <7>;
|
||||
+ cs1_dq29_rx_de-skew = <7>;
|
||||
+ cs1_dq29_tx_de-skew = <7>;
|
||||
+ cs1_dq30_rx_de-skew = <7>;
|
||||
+ cs1_dq30_tx_de-skew = <7>;
|
||||
+ cs1_dq31_rx_de-skew = <7>;
|
||||
+ cs1_dq31_tx_de-skew = <7>;
|
||||
+ cs1_dqs3_rx_de-skew = <7>;
|
||||
+ cs1_dqs3p_tx_de-skew = <9>;
|
||||
+ cs1_dqs3n_tx_de-skew = <9>;
|
||||
+ };
|
||||
+};
|
||||
--
|
||||
Created with Armbian build tools https://github.com/armbian/build
|
||||
|
||||
|
|
@ -1,5 +1,4 @@
|
|||
This fixes reboot issues coused by vcc_sdio being disabled on reboot.
|
||||
Additionaly there are kernel panics when rebooting with sd-uhs-sdr104.
|
||||
|
||||
Signed-off-by: Piotr Szczepanik <piter75@gmail.com>
|
||||
|
||||
|
|
|
|||
|
|
@ -114,7 +114,7 @@ index f4b6799a8..a1041ec3e 100644
|
|||
- regulator-min-microvolt = <712500>;
|
||||
- regulator-max-microvolt = <1450000>;
|
||||
+ regulator-min-microvolt = <900000>;
|
||||
+ regulator-max-microvolt = <1150000>;
|
||||
+ regulator-max-microvolt = <1175000>;
|
||||
+ regulator-ramp-delay = <12500>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
|
|
@ -126,7 +126,7 @@ index f4b6799a8..a1041ec3e 100644
|
|||
- regulator-min-microvolt = <712500>;
|
||||
- regulator-max-microvolt = <1450000>;
|
||||
+ regulator-min-microvolt = <950000>;
|
||||
+ regulator-max-microvolt = <1350000>;
|
||||
+ regulator-max-microvolt = <1450000>;
|
||||
+ regulator-ramp-delay = <12500>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue