Merge branch 'master' into desktop

2025-03-16 11:51:36 +00:00 · 2020-12-27 01:55:58 +01:00 · 2020-12-27 01:55:58 +01:00 · b3dc314f09
commit b3dc314f09
parent afbb7e4c17 5fce5229f2
33 changed files with 15945 additions and 14166 deletions
--- a/config/boards/orangepi-r1.conf
+++ b/config/boards/orangepi-r1.conf
@ -4,7 +4,7 @@ BOARDFAMILY="sun8i"
 BOOTCONFIG="orangepi_r1_defconfig"
 DEFAULT_OVERLAYS="usbhost2 usbhost3"
 MODULES="g_serial"
-MODULES_BLACKLIST="lima"
+MODULES_BLACKLIST="lima sunxi_cedrus"
 BUILD_DESKTOP="no"
 DEFAULT_CONSOLE="serial"
 SERIALCON="ttyS0,ttyGS0"
--- a/config/boards/orangepizero.conf
+++ b/config/boards/orangepizero.conf
@ -3,7 +3,7 @@ BOARD_NAME="Orange Pi Zero"
 BOARDFAMILY="sun8i"
 BOOTCONFIG="orangepi_zero_defconfig"
 MODULES_CURRENT="g_serial"
-MODULES_BLACKLIST="lima"
+MODULES_BLACKLIST="lima sunxi_cedrus"
 DEFAULT_OVERLAYS="usbhost2 usbhost3"
 DEFAULT_CONSOLE="serial"
 BUILD_DESKTOP="no"
--- a/config/boards/rock64.conf
+++ b/config/boards/rock64.conf
--- a/config/kernel/linux-rk322x-dev.config
+++ b/config/kernel/linux-rk322x-dev.config
@ -1,12 +1,13 @@
 #
 # Automatically generated file; DO NOT EDIT.
-# Linux/arm 5.9.0 Kernel Configuration
+# Linux/arm 5.10.2 Kernel Configuration
 #
-CONFIG_CC_VERSION_TEXT="arm-none-linux-gnueabihf-gcc (GNU Toolchain for the A-profile Architecture 9.2-2019.12 (arm-9.10)) 9.2.1 20191025"
+CONFIG_CC_VERSION_TEXT="arm-linux-gnueabihf-gcc (GNU Toolchain for the A-profile Architecture 8.3-2019.03 (arm-rel-8.36)) 8.3.0"
 CONFIG_CC_IS_GCC=y
-CONFIG_GCC_VERSION=90201
-CONFIG_LD_VERSION=233010000
+CONFIG_GCC_VERSION=80300
+CONFIG_LD_VERSION=232000000
 CONFIG_CLANG_VERSION=0
+CONFIG_LLD_VERSION=0
 CONFIG_CC_CAN_LINK=y
 CONFIG_CC_CAN_LINK_STATIC=y
 CONFIG_CC_HAS_ASM_GOTO=y
@ -58,6 +59,7 @@ CONFIG_HARDIRQS_SW_RESEND=y
 CONFIG_GENERIC_IRQ_CHIP=y
 CONFIG_IRQ_DOMAIN=y
 CONFIG_IRQ_DOMAIN_HIERARCHY=y
+CONFIG_GENERIC_IRQ_IPI=y
 CONFIG_HANDLE_DOMAIN_IRQ=y
 CONFIG_IRQ_FORCED_THREADING=y
 CONFIG_SPARSE_IRQ=y
@ -174,6 +176,7 @@ CONFIG_RD_ZSTD=y
 # CONFIG_BOOT_CONFIG is not set
 CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_LD_ORPHAN_WARN=y
 CONFIG_SYSCTL=y
 CONFIG_HAVE_UID16=y
 CONFIG_BPF=y
@ -459,7 +462,6 @@ CONFIG_ARCH_WANT_GENERAL_HUGETLB=y
 CONFIG_FORCE_MAX_ZONEORDER=11
 CONFIG_ALIGNMENT_TRAP=y
 # CONFIG_UACCESS_WITH_MEMCPY is not set
-CONFIG_SECCOMP=y
 # CONFIG_PARAVIRT is not set
 # CONFIG_PARAVIRT_TIME_ACCOUNTING is not set
 # CONFIG_XEN is not set
@ -619,6 +621,7 @@ CONFIG_AS_VFP_VMRS_FPINST=y
 #
 # General architecture-dependent options
 #
+CONFIG_SET_FS=y
 # CONFIG_OPROFILE is not set
 CONFIG_HAVE_OPROFILE=y
 # CONFIG_KPROBES is not set
@ -645,7 +648,9 @@ CONFIG_HAVE_PERF_REGS=y
 CONFIG_HAVE_PERF_USER_STACK_DUMP=y
 CONFIG_HAVE_ARCH_JUMP_LABEL=y
 CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
+CONFIG_HAVE_ARCH_SECCOMP=y
 CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
+CONFIG_SECCOMP=y
 CONFIG_SECCOMP_FILTER=y
 CONFIG_HAVE_STACKPROTECTOR=y
 CONFIG_STACKPROTECTOR=y
@ -672,6 +677,7 @@ CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y
 CONFIG_STRICT_MODULE_RWX=y
 CONFIG_ARCH_HAS_PHYS_TO_DMA=y
 # CONFIG_LOCK_EVENT_COUNTS is not set
+CONFIG_ARCH_WANT_LD_ORPHAN_WARN=y

 #
 # GCOV-based kernel profiling
@ -701,8 +707,9 @@ CONFIG_BLOCK=y
 CONFIG_BLK_SCSI_REQUEST=y
 CONFIG_BLK_CGROUP_RWSTAT=y
 CONFIG_BLK_DEV_BSG=y
-# CONFIG_BLK_DEV_BSGLIB is not set
-# CONFIG_BLK_DEV_INTEGRITY is not set
+CONFIG_BLK_DEV_BSGLIB=y
+CONFIG_BLK_DEV_INTEGRITY=y
+CONFIG_BLK_DEV_INTEGRITY_T10=y
 # CONFIG_BLK_DEV_ZONED is not set
 CONFIG_BLK_DEV_THROTTLING=y
 # CONFIG_BLK_DEV_THROTTLING_LOW is not set
@ -820,7 +827,6 @@ CONFIG_ZPOOL=y
 CONFIG_ZBUD=y
 CONFIG_Z3FOLD=y
 CONFIG_ZSMALLOC=y
-# CONFIG_ZSMALLOC_PGTABLE_MAPPING is not set
 # CONFIG_ZSMALLOC_STAT is not set
 CONFIG_GENERIC_EARLY_IOREMAP=y
 CONFIG_IDLE_PAGE_TRACKING=y
@ -1556,6 +1562,7 @@ CONFIG_CAN_RAW=m
 CONFIG_CAN_BCM=m
 CONFIG_CAN_GW=m
 CONFIG_CAN_J1939=m
+# CONFIG_CAN_ISOTP is not set

 #
 # CAN Device Drivers
@ -1589,6 +1596,7 @@ CONFIG_CAN_SOFTING=m
 #
 CONFIG_CAN_HI311X=m
 CONFIG_CAN_MCP251X=y
+# CONFIG_CAN_MCP251XFD is not set
 # end of CAN SPI interfaces

 #
@ -1809,7 +1817,6 @@ CONFIG_OF_DYNAMIC=y
 CONFIG_OF_ADDRESS=y
 CONFIG_OF_IRQ=y
 CONFIG_OF_NET=y
-CONFIG_OF_MDIO=y
 CONFIG_OF_RESERVED_MEM=y
 CONFIG_OF_RESOLVE=y
 CONFIG_OF_OVERLAY=y
@ -1863,6 +1870,7 @@ CONFIG_VIRTIO_BLK=m
 # CONFIG_XILINX_SDFEC is not set
 CONFIG_MISC_RTSX=m
 # CONFIG_PVPANIC is not set
+# CONFIG_HISI_HIKEY_USB is not set
 # CONFIG_C2PORT is not set

 #
@ -1887,13 +1895,6 @@ CONFIG_EEPROM_93CX6=m
 # CONFIG_SENSORS_LIS3_SPI is not set
 # CONFIG_SENSORS_LIS3_I2C is not set
 # CONFIG_ALTERA_STAPL is not set
-
-#
-# Intel MIC & related support
-#
-# CONFIG_VOP_BUS is not set
-# end of Intel MIC & related support
-
 # CONFIG_ECHO is not set
 CONFIG_MISC_RTSX_USB=m
 # CONFIG_UACCE is not set
@ -1984,6 +1985,12 @@ CONFIG_DM_VERITY=y
 # CONFIG_DM_SWITCH is not set
 # CONFIG_DM_LOG_WRITES is not set
 # CONFIG_DM_INTEGRITY is not set
+CONFIG_TARGET_CORE=m
+CONFIG_TCM_IBLOCK=m
+CONFIG_TCM_FILEIO=m
+CONFIG_TCM_PSCSI=m
+# CONFIG_LOOPBACK_TARGET is not set
+CONFIG_ISCSI_TARGET=m
 CONFIG_NETDEVICES=y
 CONFIG_MII=y
 CONFIG_NET_CORE=y
@ -2036,6 +2043,7 @@ CONFIG_NET_DSA_MICROCHIP_KSZ8795_SPI=m
 CONFIG_NET_DSA_MV88E6XXX=m
 CONFIG_NET_DSA_MV88E6XXX_GLOBAL2=y
 # CONFIG_NET_DSA_MV88E6XXX_PTP is not set
+# CONFIG_NET_DSA_MSCC_SEVILLE is not set
 # CONFIG_NET_DSA_AR9331 is not set
 CONFIG_NET_DSA_SJA1105=m
 # CONFIG_NET_DSA_SJA1105_PTP is not set
@ -2100,59 +2108,40 @@ CONFIG_STMMAC_PLATFORM=y
 # CONFIG_DWMAC_DWC_QOS_ETH is not set
 CONFIG_DWMAC_GENERIC=y
 CONFIG_DWMAC_ROCKCHIP=y
+# CONFIG_DWMAC_INTEL_PLAT is not set
 # CONFIG_NET_VENDOR_SYNOPSYS is not set
 # CONFIG_NET_VENDOR_VIA is not set
 # CONFIG_NET_VENDOR_WIZNET is not set
 CONFIG_NET_VENDOR_XILINX=y
 # CONFIG_XILINX_AXI_EMAC is not set
 # CONFIG_XILINX_LL_TEMAC is not set
-CONFIG_MDIO_DEVICE=y
-CONFIG_MDIO_BUS=y
-CONFIG_MDIO_DEVRES=y
-CONFIG_MDIO_BCM_UNIMAC=m
-# CONFIG_MDIO_BITBANG is not set
-CONFIG_MDIO_BUS_MUX=m
-# CONFIG_MDIO_BUS_MUX_GPIO is not set
-# CONFIG_MDIO_BUS_MUX_MMIOREG is not set
-CONFIG_MDIO_BUS_MUX_MULTIPLEXER=m
-# CONFIG_MDIO_HISI_FEMAC is not set
-# CONFIG_MDIO_IPQ4019 is not set
-# CONFIG_MDIO_IPQ8064 is not set
-CONFIG_MDIO_MSCC_MIIM=m
-# CONFIG_MDIO_MVUSB is not set
-CONFIG_MDIO_XPCS=y
 CONFIG_PHYLINK=y
 CONFIG_PHYLIB=y
 CONFIG_SWPHY=y
 CONFIG_LED_TRIGGER_PHY=y
+CONFIG_FIXED_PHY=y
+# CONFIG_SFP is not set

 #
 # MII PHY device drivers
 #
-# CONFIG_SFP is not set
-CONFIG_ADIN_PHY=m
 # CONFIG_AMD_PHY is not set
+CONFIG_ADIN_PHY=m
 # CONFIG_AQUANTIA_PHY is not set
 CONFIG_AX88796B_PHY=m
-CONFIG_BCM7XXX_PHY=m
-# CONFIG_BCM87XX_PHY is not set
-CONFIG_BCM_NET_PHYLIB=m
 # CONFIG_BROADCOM_PHY is not set
 # CONFIG_BCM54140_PHY is not set
+CONFIG_BCM7XXX_PHY=m
 # CONFIG_BCM84881_PHY is not set
+# CONFIG_BCM87XX_PHY is not set
+CONFIG_BCM_NET_PHYLIB=m
 # CONFIG_CICADA_PHY is not set
 # CONFIG_CORTINA_PHY is not set
 # CONFIG_DAVICOM_PHY is not set
-# CONFIG_DP83822_PHY is not set
-CONFIG_DP83TC811_PHY=m
-# CONFIG_DP83848_PHY is not set
-# CONFIG_DP83867_PHY is not set
-# CONFIG_DP83869_PHY is not set
-CONFIG_FIXED_PHY=y
 # CONFIG_ICPLUS_PHY is not set
+# CONFIG_LXT_PHY is not set
 # CONFIG_INTEL_XWAY_PHY is not set
 # CONFIG_LSI_ET1011C_PHY is not set
-# CONFIG_LXT_PHY is not set
 # CONFIG_MARVELL_PHY is not set
 # CONFIG_MARVELL_10G_PHY is not set
 # CONFIG_MICREL_PHY is not set
@ -2166,12 +2155,43 @@ CONFIG_MICROCHIP_T1_PHY=m
 CONFIG_REALTEK_PHY=m
 # CONFIG_RENESAS_PHY is not set
 CONFIG_ROCKCHIP_PHY=y
-# CONFIG_SMSC_PHY is not set
+CONFIG_SMSC_PHY=m
 # CONFIG_STE10XP is not set
 # CONFIG_TERANETICS_PHY is not set
+# CONFIG_DP83822_PHY is not set
+CONFIG_DP83TC811_PHY=m
+# CONFIG_DP83848_PHY is not set
+# CONFIG_DP83867_PHY is not set
+# CONFIG_DP83869_PHY is not set
 CONFIG_VITESSE_PHY=m
 # CONFIG_XILINX_GMII2RGMII is not set
 # CONFIG_MICREL_KS8995MA is not set
+CONFIG_MDIO_DEVICE=y
+CONFIG_MDIO_BUS=y
+CONFIG_OF_MDIO=y
+CONFIG_MDIO_DEVRES=y
+# CONFIG_MDIO_BITBANG is not set
+CONFIG_MDIO_BCM_UNIMAC=m
+# CONFIG_MDIO_HISI_FEMAC is not set
+# CONFIG_MDIO_MVUSB is not set
+CONFIG_MDIO_MSCC_MIIM=m
+# CONFIG_MDIO_IPQ4019 is not set
+# CONFIG_MDIO_IPQ8064 is not set
+
+#
+# MDIO Multiplexers
+#
+CONFIG_MDIO_BUS_MUX=m
+# CONFIG_MDIO_BUS_MUX_GPIO is not set
+CONFIG_MDIO_BUS_MUX_MULTIPLEXER=m
+# CONFIG_MDIO_BUS_MUX_MMIOREG is not set
+
+#
+# PCS device drivers
+#
+CONFIG_PCS_XPCS=y
+# end of PCS device drivers
+
 CONFIG_PPP=m
 CONFIG_PPP_BSDCOMP=m
 CONFIG_PPP_DEFLATE=m
@ -2269,6 +2289,7 @@ CONFIG_ATH10K_USB=m
 # CONFIG_ATH10K_TRACING is not set
 CONFIG_WCN36XX=m
 # CONFIG_WCN36XX_DEBUGFS is not set
+# CONFIG_ATH11K is not set
 CONFIG_WLAN_VENDOR_ATMEL=y
 CONFIG_AT76C50X_USB=m
 CONFIG_WLAN_VENDOR_BROADCOM=y
@ -2452,6 +2473,7 @@ CONFIG_MOUSE_ELAN_I2C_I2C=y
 CONFIG_INPUT_JOYSTICK=y
 # CONFIG_JOYSTICK_ANALOG is not set
 # CONFIG_JOYSTICK_A3D is not set
+# CONFIG_JOYSTICK_ADC is not set
 # CONFIG_JOYSTICK_ADI is not set
 # CONFIG_JOYSTICK_COBRA is not set
 # CONFIG_JOYSTICK_GF2K is not set
@ -2572,6 +2594,7 @@ CONFIG_TOUCHSCREEN_ZET6223=m
 # CONFIG_TOUCHSCREEN_ZFORCE is not set
 # CONFIG_TOUCHSCREEN_ROHM_BU21023 is not set
 CONFIG_TOUCHSCREEN_IQS5XX=m
+# CONFIG_TOUCHSCREEN_ZINITIX is not set
 CONFIG_INPUT_MISC=y
 # CONFIG_INPUT_AD714X is not set
 # CONFIG_INPUT_ATMEL_CAPTOUCH is not set
@ -2615,6 +2638,7 @@ CONFIG_RMI4_F11=y
 CONFIG_RMI4_F12=y
 CONFIG_RMI4_F30=y
 # CONFIG_RMI4_F34 is not set
+# CONFIG_RMI4_F3A is not set
 # CONFIG_RMI4_F54 is not set
 # CONFIG_RMI4_F55 is not set

@ -2717,6 +2741,7 @@ CONFIG_HW_RANDOM=y
 CONFIG_HW_RANDOM_VIRTIO=m
 CONFIG_HW_RANDOM_OPTEE=m
 # CONFIG_HW_RANDOM_CCTRNG is not set
+# CONFIG_HW_RANDOM_XIPHERA is not set
 CONFIG_DEVMEM=y
 # CONFIG_DEVKMEM is not set
 # CONFIG_RAW_DRIVER is not set
@ -2798,6 +2823,7 @@ CONFIG_I2C_RK3X=y
 CONFIG_I2C_STUB=m
 CONFIG_I2C_SLAVE=y
 # CONFIG_I2C_SLAVE_EEPROM is not set
+# CONFIG_I2C_SLAVE_TESTUNIT is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
@ -2883,6 +2909,12 @@ CONFIG_PINCTRL_ROCKCHIP=y
 # CONFIG_PINCTRL_STMFX is not set
 # CONFIG_PINCTRL_RK805 is not set
 # CONFIG_PINCTRL_OCELOT is not set
+
+#
+# Renesas pinctrl drivers
+#
+# end of Renesas pinctrl drivers
+
 CONFIG_PINCTRL_MADERA=m
 CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
 CONFIG_GPIOLIB=y
@ -2891,6 +2923,8 @@ CONFIG_OF_GPIO=y
 CONFIG_GPIOLIB_IRQCHIP=y
 CONFIG_DEBUG_GPIO=y
 CONFIG_GPIO_SYSFS=y
+CONFIG_GPIO_CDEV=y
+CONFIG_GPIO_CDEV_V1=y
 CONFIG_GPIO_GENERIC=y

 #
@ -2995,9 +3029,6 @@ CONFIG_W1_SLAVE_DS2781=m
 # CONFIG_W1_SLAVE_DS28E17 is not set
 # end of 1-wire Slaves

-CONFIG_POWER_AVS=y
-# CONFIG_QCOM_CPR is not set
-CONFIG_ROCKCHIP_IODOMAIN=y
 CONFIG_POWER_RESET=y
 # CONFIG_POWER_RESET_BRCMKONA is not set
 # CONFIG_POWER_RESET_BRCMSTB is not set
@ -3024,7 +3055,6 @@ CONFIG_POWER_SUPPLY_HWMON=y
 # CONFIG_BATTERY_DS2780 is not set
 # CONFIG_BATTERY_DS2781 is not set
 # CONFIG_BATTERY_DS2782 is not set
-# CONFIG_BATTERY_LEGO_EV3 is not set
 CONFIG_BATTERY_SBS=y
 # CONFIG_CHARGER_SBS is not set
 # CONFIG_MANAGER_SBS is not set
@ -3045,6 +3075,7 @@ CONFIG_CHARGER_GPIO=m
 # CONFIG_CHARGER_BQ24735 is not set
 # CONFIG_CHARGER_BQ2515X is not set
 # CONFIG_CHARGER_BQ25890 is not set
+# CONFIG_CHARGER_BQ25980 is not set
 # CONFIG_CHARGER_SMB347 is not set
 # CONFIG_BATTERY_GAUGE_LTC2941 is not set
 # CONFIG_CHARGER_RT9455 is not set
@ -3120,6 +3151,7 @@ CONFIG_SENSORS_GPIO_FAN=y
 # CONFIG_SENSORS_MAX31790 is not set
 # CONFIG_SENSORS_MCP3021 is not set
 # CONFIG_SENSORS_TC654 is not set
+# CONFIG_SENSORS_MR75203 is not set
 # CONFIG_SENSORS_ADCXX is not set
 # CONFIG_SENSORS_LM63 is not set
 # CONFIG_SENSORS_LM70 is not set
@ -3316,6 +3348,7 @@ CONFIG_MFD_RK808=y
 # CONFIG_MFD_RN5T618 is not set
 # CONFIG_MFD_SEC_CORE is not set
 # CONFIG_MFD_SI476X_CORE is not set
+# CONFIG_MFD_SL28CPLD is not set
 # CONFIG_MFD_SM501 is not set
 # CONFIG_MFD_SKY81452 is not set
 # CONFIG_ABX500_CORE is not set
@ -3364,6 +3397,7 @@ CONFIG_MFD_STPMIC1=m
 CONFIG_MFD_STMFX=m
 # CONFIG_MFD_KHADAS_MCU is not set
 # CONFIG_RAVE_SP_CORE is not set
+# CONFIG_MFD_INTEL_M10_BMC is not set
 # end of Multifunction device drivers

 CONFIG_REGULATOR=y
@ -3410,7 +3444,10 @@ CONFIG_REGULATOR_GPIO=y
 # CONFIG_REGULATOR_PV88080 is not set
 # CONFIG_REGULATOR_PV88090 is not set
 CONFIG_REGULATOR_PWM=y
+# CONFIG_REGULATOR_RASPBERRYPI_TOUCHSCREEN_ATTINY is not set
 CONFIG_REGULATOR_RK808=y
+# CONFIG_REGULATOR_RT4801 is not set
+# CONFIG_REGULATOR_RTMV20 is not set
 # CONFIG_REGULATOR_SLG51000 is not set
 # CONFIG_REGULATOR_STPMIC1 is not set
 # CONFIG_REGULATOR_SY8106A is not set
@ -3714,6 +3751,7 @@ CONFIG_VIDEO_XILINX_TPG=m
 CONFIG_VIDEO_XILINX_VTC=m
 CONFIG_V4L_MEM2MEM_DRIVERS=y
 # CONFIG_VIDEO_MEM2MEM_DEINTERLACE is not set
+CONFIG_VIDEO_ROCKCHIP_IEP=m
 CONFIG_VIDEO_ROCKCHIP_RGA=m
 CONFIG_DVB_PLATFORM_DRIVERS=y
 CONFIG_DVB_C8SECTPFE=m
@ -4183,7 +4221,6 @@ CONFIG_DRM_UDL=y
 # CONFIG_DRM_RCAR_LVDS is not set
 # CONFIG_DRM_OMAP is not set
 # CONFIG_DRM_TILCDC is not set
-# CONFIG_DRM_VIRTIO_GPU is not set
 # CONFIG_DRM_FSL_DCU is not set
 # CONFIG_DRM_STM is not set
 CONFIG_DRM_PANEL=y
@ -4222,6 +4259,7 @@ CONFIG_DRM_PANEL_BRIDGE=y
 # CONFIG_DRM_CDNS_DSI is not set
 # CONFIG_DRM_CHRONTEL_CH7033 is not set
 CONFIG_DRM_DISPLAY_CONNECTOR=m
+# CONFIG_DRM_LONTIUM_LT9611 is not set
 # CONFIG_DRM_ITE_IT66121 is not set
 # CONFIG_DRM_LVDS_CODEC is not set
 # CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW is not set
@ -4234,15 +4272,18 @@ CONFIG_DRM_DISPLAY_CONNECTOR=m
 # CONFIG_DRM_SII9234 is not set
 CONFIG_DRM_SIMPLE_BRIDGE=m
 # CONFIG_DRM_THINE_THC63LVD1024 is not set
+# CONFIG_DRM_TOSHIBA_TC358762 is not set
 # CONFIG_DRM_TOSHIBA_TC358764 is not set
 # CONFIG_DRM_TOSHIBA_TC358767 is not set
 # CONFIG_DRM_TOSHIBA_TC358768 is not set
+# CONFIG_DRM_TOSHIBA_TC358775 is not set
 # CONFIG_DRM_TI_TFP410 is not set
 # CONFIG_DRM_TI_SN65DSI86 is not set
 # CONFIG_DRM_TI_TPD12S015 is not set
 # CONFIG_DRM_ANALOGIX_ANX6345 is not set
 # CONFIG_DRM_ANALOGIX_ANX78XX is not set
 # CONFIG_DRM_I2C_ADV7511 is not set
+# CONFIG_DRM_CDNS_MHDP8546 is not set
 CONFIG_DRM_DW_HDMI=y
 # CONFIG_DRM_DW_HDMI_AHB_AUDIO is not set
 CONFIG_DRM_DW_HDMI_I2S_AUDIO=m
@ -4312,6 +4353,7 @@ CONFIG_FB_MODE_HELPERS=y
 #
 # CONFIG_LCD_CLASS_DEVICE is not set
 CONFIG_BACKLIGHT_CLASS_DEVICE=y
+# CONFIG_BACKLIGHT_KTD253 is not set
 CONFIG_BACKLIGHT_PWM=y
 # CONFIG_BACKLIGHT_QCOM_WLED is not set
 # CONFIG_BACKLIGHT_ADP8860 is not set
@ -4482,6 +4524,7 @@ CONFIG_SND_SOC_CS35L36=m
 # CONFIG_SND_SOC_CS42L52 is not set
 # CONFIG_SND_SOC_CS42L56 is not set
 # CONFIG_SND_SOC_CS42L73 is not set
+# CONFIG_SND_SOC_CS4234 is not set
 # CONFIG_SND_SOC_CS4265 is not set
 # CONFIG_SND_SOC_CS4270 is not set
 # CONFIG_SND_SOC_CS4271_I2C is not set
@ -4544,6 +4587,7 @@ CONFIG_SND_SOC_SSM2305=m
 # CONFIG_SND_SOC_STI_SAS is not set
 # CONFIG_SND_SOC_TAS2552 is not set
 # CONFIG_SND_SOC_TAS2562 is not set
+# CONFIG_SND_SOC_TAS2764 is not set
 # CONFIG_SND_SOC_TAS2770 is not set
 # CONFIG_SND_SOC_TAS5086 is not set
 # CONFIG_SND_SOC_TAS571X is not set
@ -4647,6 +4691,7 @@ CONFIG_HID_GFRM=m
 # CONFIG_HID_GLORIOUS is not set
 CONFIG_HID_HOLTEK=m
 CONFIG_HOLTEK_FF=y
+# CONFIG_HID_VIVALDI is not set
 CONFIG_HID_GT683R=m
 CONFIG_HID_KEYTOUCH=m
 CONFIG_HID_KYE=m
@ -4753,6 +4798,7 @@ CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
 # Miscellaneous USB options
 #
 # CONFIG_USB_DEFAULT_PERSIST is not set
+# CONFIG_USB_FEW_INIT_RETRIES is not set
 # CONFIG_USB_DYNAMIC_MINORS is not set
 CONFIG_USB_OTG=y
 # CONFIG_USB_OTG_PRODUCTLIST is not set
@ -4999,6 +5045,7 @@ CONFIG_USB_CONFIGFS_F_FS=y
 # CONFIG_USB_CONFIGFS_F_HID is not set
 # CONFIG_USB_CONFIGFS_F_UVC is not set
 # CONFIG_USB_CONFIGFS_F_PRINTER is not set
+# CONFIG_USB_CONFIGFS_F_TCM is not set

 #
 # USB Gadget precomposed configurations
@ -5010,6 +5057,7 @@ CONFIG_USB_CONFIGFS_F_FS=y
 CONFIG_USB_GADGETFS=m
 # CONFIG_USB_FUNCTIONFS is not set
 CONFIG_USB_MASS_STORAGE=m
+# CONFIG_USB_GADGET_TARGET is not set
 CONFIG_USB_G_SERIAL=m
 # CONFIG_USB_MIDI_GADGET is not set
 # CONFIG_USB_G_PRINTER is not set
@ -5023,7 +5071,7 @@ CONFIG_USB_G_HID=m
 # end of USB Gadget precomposed configurations

 # CONFIG_TYPEC is not set
-CONFIG_USB_ROLE_SWITCH=m
+CONFIG_USB_ROLE_SWITCH=y
 CONFIG_MMC=y
 CONFIG_PWRSEQ_EMMC=y
 CONFIG_PWRSEQ_SD8787=m
@ -5079,6 +5127,7 @@ CONFIG_LEDS_LM3532=m
 CONFIG_LEDS_GPIO=y
 # CONFIG_LEDS_LP3944 is not set
 # CONFIG_LEDS_LP3952 is not set
+# CONFIG_LEDS_LP50XX is not set
 # CONFIG_LEDS_LP55XX_COMMON is not set
 # CONFIG_LEDS_LP8860 is not set
 # CONFIG_LEDS_PCA955X is not set
@ -5184,6 +5233,7 @@ CONFIG_RTC_DRV_RX8581=m
 CONFIG_RTC_DRV_RX8025=m
 CONFIG_RTC_DRV_EM3027=m
 CONFIG_RTC_DRV_RV3028=m
+# CONFIG_RTC_DRV_RV3032 is not set
 CONFIG_RTC_DRV_RV8803=m
 CONFIG_RTC_DRV_SD3078=m

@ -5302,6 +5352,7 @@ CONFIG_VIRTIO=m
 # CONFIG_VDPA is not set
 CONFIG_VHOST_MENU=y
 # CONFIG_VHOST_NET is not set
+# CONFIG_VHOST_SCSI is not set
 # CONFIG_VHOST_CROSS_ENDIAN_LEGACY is not set

 #
@ -5381,9 +5432,7 @@ CONFIG_STAGING_MEDIA=y
 CONFIG_VIDEO_HANTRO=m
 CONFIG_VIDEO_HANTRO_ROCKCHIP=y
 CONFIG_VIDEO_ROCKCHIP_VDEC=m
-# CONFIG_PHY_ROCKCHIP_DPHY_RX0 is not set
 # CONFIG_VIDEO_ROCKCHIP_ISP1 is not set
-CONFIG_VIDEO_USBVISION=m

 #
 # Android
@ -5445,14 +5494,12 @@ CONFIG_ARCX_ANYBUS_CONTROLLER=m
 CONFIG_HMS_PROFINET=m
 # CONFIG_WFX is not set
 # CONFIG_GOLDFISH is not set
-# CONFIG_MFD_CROS_EC is not set
 # CONFIG_CHROME_PLATFORMS is not set
 # CONFIG_MELLANOX_PLATFORM is not set
 CONFIG_HAVE_CLK=y
 CONFIG_CLKDEV_LOOKUP=y
 CONFIG_HAVE_CLK_PREPARE=y
 CONFIG_COMMON_CLK=y
-# CONFIG_CLK_HSDK is not set
 CONFIG_COMMON_CLK_MAX9485=m
 CONFIG_COMMON_CLK_RK808=y
 # CONFIG_COMMON_CLK_SI5341 is not set
@ -5469,17 +5516,12 @@ CONFIG_COMMON_CLK_VC5=m
 # CONFIG_COMMON_CLK_BD718XX is not set
 # CONFIG_COMMON_CLK_FIXED_MMIO is not set
 CONFIG_COMMON_CLK_ROCKCHIP=y
-# CONFIG_CLK_PX30 is not set
 # CONFIG_CLK_RV110X is not set
 # CONFIG_CLK_RK3036 is not set
 # CONFIG_CLK_RK312X is not set
 # CONFIG_CLK_RK3188 is not set
 CONFIG_CLK_RK322X=y
 # CONFIG_CLK_RK3288 is not set
-# CONFIG_CLK_RK3308 is not set
-# CONFIG_CLK_RK3328 is not set
-# CONFIG_CLK_RK3368 is not set
-# CONFIG_CLK_RK3399 is not set
 # CONFIG_HWSPINLOCK is not set

 #
@ -5576,6 +5618,7 @@ CONFIG_ROCKCHIP_IOMMU=y
 # end of Qualcomm SoC drivers

 CONFIG_ROCKCHIP_GRF=y
+CONFIG_ROCKCHIP_IODOMAIN=y
 CONFIG_ROCKCHIP_PM_DOMAINS=y
 # CONFIG_SOC_TI is not set

@ -5621,6 +5664,8 @@ CONFIG_PL353_SMC=y
 CONFIG_IIO=y
 CONFIG_IIO_BUFFER=y
 CONFIG_IIO_BUFFER_CB=m
+# CONFIG_IIO_BUFFER_DMA is not set
+# CONFIG_IIO_BUFFER_DMAENGINE is not set
 # CONFIG_IIO_BUFFER_HW_CONSUMER is not set
 CONFIG_IIO_KFIFO_BUF=y
 CONFIG_IIO_TRIGGERED_BUFFER=y
@ -5629,6 +5674,7 @@ CONFIG_IIO_TRIGGER=y
 CONFIG_IIO_CONSUMERS_PER_TRIGGER=2
 # CONFIG_IIO_SW_DEVICE is not set
 # CONFIG_IIO_SW_TRIGGER is not set
+# CONFIG_IIO_TRIGGERED_EVENT is not set

 #
 # Accelerometers
@ -5844,6 +5890,7 @@ CONFIG_TI_DAC7612=m
 # CONFIG_ADIS16130 is not set
 # CONFIG_ADIS16136 is not set
 # CONFIG_ADIS16260 is not set
+# CONFIG_ADXRS290 is not set
 # CONFIG_ADXRS450 is not set
 # CONFIG_BMG160 is not set
 CONFIG_FXAS21002C=m
@ -5875,6 +5922,7 @@ CONFIG_MAX30102=m
 # CONFIG_AM2315 is not set
 # CONFIG_DHT11 is not set
 # CONFIG_HDC100X is not set
+# CONFIG_HDC2010 is not set
 CONFIG_HID_SENSOR_HUMIDITY=m
 # CONFIG_HTS221 is not set
 # CONFIG_HTU21 is not set
@ -5913,6 +5961,7 @@ CONFIG_IIO_ADIS_LIB_BUFFER=y
 # CONFIG_AL3320A is not set
 # CONFIG_APDS9300 is not set
 # CONFIG_APDS9960 is not set
+# CONFIG_AS73211 is not set
 # CONFIG_BH1750 is not set
 # CONFIG_BH1780 is not set
 # CONFIG_CM32181 is not set
@ -6112,6 +6161,7 @@ CONFIG_RESET_CONTROLLER=y
 # PHY Subsystem
 #
 CONFIG_GENERIC_PHY=y
+# CONFIG_USB_LGM_PHY is not set
 # CONFIG_BCM_KONA_USB2_PHY is not set
 # CONFIG_PHY_CADENCE_TORRENT is not set
 # CONFIG_PHY_CADENCE_DPHY is not set
@ -6125,6 +6175,7 @@ CONFIG_GENERIC_PHY=y
 # CONFIG_PHY_MAPPHONE_MDM6600 is not set
 # CONFIG_PHY_OCELOT_SERDES is not set
 CONFIG_PHY_ROCKCHIP_DP=y
+# CONFIG_PHY_ROCKCHIP_DPHY_RX0 is not set
 CONFIG_PHY_ROCKCHIP_EMMC=y
 CONFIG_PHY_ROCKCHIP_INNO_HDMI=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
@ -6199,6 +6250,7 @@ CONFIG_PM_OPP=y
 # CONFIG_COUNTER is not set
 CONFIG_MOST=m
 # CONFIG_MOST_USB_HDM is not set
+# CONFIG_MOST_CDEV is not set
 # end of Device Drivers

 #
@ -6229,6 +6281,7 @@ CONFIG_JFS_FS=m
 # CONFIG_JFS_DEBUG is not set
 # CONFIG_JFS_STATISTICS is not set
 CONFIG_XFS_FS=y
+CONFIG_XFS_SUPPORT_V4=y
 CONFIG_XFS_QUOTA=y
 CONFIG_XFS_POSIX_ACL=y
 CONFIG_XFS_RT=y
@ -6413,6 +6466,7 @@ CONFIG_NFS_FSCACHE=y
 # CONFIG_NFS_USE_LEGACY_DNS is not set
 CONFIG_NFS_USE_KERNEL_DNS=y
 CONFIG_NFS_DISABLE_UDP_SUPPORT=y
+# CONFIG_NFS_V4_2_READ_PLUS is not set
 CONFIG_NFSD=m
 CONFIG_NFSD_V2_ACL=y
 CONFIG_NFSD_V3=y
@ -6605,6 +6659,7 @@ CONFIG_CRYPTO_DH=m
 CONFIG_CRYPTO_ECC=y
 CONFIG_CRYPTO_ECDH=y
 CONFIG_CRYPTO_ECRDSA=m
+# CONFIG_CRYPTO_SM2 is not set
 CONFIG_CRYPTO_CURVE25519=m

 #
@ -6719,7 +6774,9 @@ CONFIG_CRYPTO_USER_API=m
 CONFIG_CRYPTO_USER_API_HASH=m
 CONFIG_CRYPTO_USER_API_SKCIPHER=m
 CONFIG_CRYPTO_USER_API_RNG=m
+# CONFIG_CRYPTO_USER_API_RNG_CAVP is not set
 CONFIG_CRYPTO_USER_API_AEAD=m
+CONFIG_CRYPTO_USER_API_ENABLE_OBSOLETE=y
 # CONFIG_CRYPTO_STATS is not set
 CONFIG_CRYPTO_HASH_INFO=y

@ -6854,6 +6911,7 @@ CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS=y
 CONFIG_DMA_NONCOHERENT_MMAP=y
 CONFIG_DMA_REMAP=y
 CONFIG_DMA_CMA=y
+# CONFIG_DMA_PERNUMA_CMA is not set

 #
 # Default contiguous memory area size:
@ -7015,6 +7073,7 @@ CONFIG_DEBUG_SPINLOCK=y
 # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
 # CONFIG_LOCK_TORTURE_TEST is not set
 # CONFIG_WW_MUTEX_SELFTEST is not set
+# CONFIG_SCF_TORTURE_TEST is not set
 # end of Lock Debugging (spinlocks, mutexes, etc...)

 CONFIG_STACKTRACE=y
@ -7036,7 +7095,7 @@ CONFIG_DEBUG_CREDENTIALS=y
 #
 # RCU Debugging
 #
-# CONFIG_RCU_PERF_TEST is not set
+# CONFIG_RCU_SCALE_TEST is not set
 # CONFIG_RCU_TORTURE_TEST is not set
 # CONFIG_RCU_REF_SCALE_TEST is not set
 CONFIG_RCU_CPU_STALL_TIMEOUT=60
@ -7122,12 +7181,3 @@ CONFIG_CC_HAS_SANCOV_TRACE_PC=y
 # CONFIG_MEMTEST is not set
 # end of Kernel Testing and Coverage
 # end of Kernel hacking
-
-## LinuxIO - iSCSI Target modules
-CONFIG_TARGET_CORE=m
-CONFIG_ISCSI_TARGET=m
-CONFIG_TCM_IBLOCK=m
-CONFIG_TCM_FILEIO=m
-CONFIG_TCM_PSCSI=m
-CONFIG_TCM_USER2=m
-
--- a/config/kernel/linux-rockchip-dev.config
+++ b/config/kernel/linux-rockchip-dev.config
--- a/config/kernel/linux-sunxi-dev.config
+++ b/config/kernel/linux-sunxi-dev.config
@ -1,6 +1,6 @@
 #
 # Automatically generated file; DO NOT EDIT.
-# Linux/arm 5.10.2 Kernel Configuration
+# Linux/arm 5.10.3 Kernel Configuration
 #
 CONFIG_CC_VERSION_TEXT="arm-linux-gnueabihf-gcc (GNU Toolchain for the A-profile Architecture 8.3-2019.03 (arm-rel-8.36)) 8.3.0"
 CONFIG_CC_IS_GCC=y
--- a/config/kernel/linux-sunxi64-dev.config
+++ b/config/kernel/linux-sunxi64-dev.config
@ -1,6 +1,6 @@
 #
 # Automatically generated file; DO NOT EDIT.
-# Linux/arm64 5.10.2 Kernel Configuration
+# Linux/arm64 5.10.3 Kernel Configuration
 #
 CONFIG_CC_VERSION_TEXT="aarch64-linux-gnu-gcc (GNU Toolchain for the A-profile Architecture 8.3-2019.03 (arm-rel-8.36)) 8.3.0"
 CONFIG_CC_IS_GCC=y
--- a/config/sources/families/rk322x.conf
+++ b/config/sources/families/rk322x.conf
@ -26,7 +26,7 @@ case $BRANCH in

 	dev)

-		KERNELBRANCH='branch:linux-5.9.y'
+		KERNELBRANCH='branch:linux-5.10.y'

 	;;

--- a/config/sources/families/rockchip.conf
+++ b/config/sources/families/rockchip.conf
@ -32,7 +32,7 @@ case $BRANCH in

 	dev)

-		KERNELBRANCH='branch:linux-5.8.y'
+		KERNELBRANCH='branch:linux-5.10.y'

 	;;

--- a/lib/debootstrap.sh
+++ b/lib/debootstrap.sh
@ -705,7 +705,7 @@ create_image()
 			else
 			FINALDEST=$DEST/images/"${BOARD}"/archive
 		fi
-		install -d -o nobody -g nogroup -m 775 ${FINALDEST}/${BOARD}/{archive,nightly}
+		install -d -o nobody -g nogroup -m 775 ${FINALDEST}
 	fi


--- a/patch/kernel/rk322x-current/general-add-overlays.patch
+++ b/patch/kernel/rk322x-current/general-add-overlays.patch
@ -1,9 +1,9 @@
 diff --git a/arch/arm/boot/dts/overlay/Makefile b/arch/arm/boot/dts/overlay/Makefile
-new file mode 100644
-index 000000000..f024e8db0
+new file mode 100755
+index 000000000..20b3b57f4
 --- /dev/null
 +++ b/arch/arm/boot/dts/overlay/Makefile
-@@ -0,0 +1,20 @@
+@@ -0,0 +1,21 @@
 +# SPDX-License-Identifier: GPL-2.0
 +dtbo-$(CONFIG_ARCH_ROCKCHIP) += \
 +	rk322x-emmc.dtbo	\
@ -11,7 +11,8 @@ index 000000000..f024e8db0
 +	rk322x-emmc-nand.dtbo	\
 +	rk322x-led-conf1.dtbo	\
 +	rk322x-led-conf2.dtbo	\
-+	rk322x-cpu-hs.dtbo
+	rk322x-cpu-hs.dtbo	\
+	rk322x-wlan-alt-wiring.dtbo
 +
 +scr-$(CONFIG_ARCH_ROCKCHIP) += \
 +       rk322x-fixup.scr
@ -25,11 +26,11 @@ index 000000000..f024e8db0
 +clean-files    := *.dtbo *.scr
 +
 diff --git a/arch/arm/boot/dts/overlay/README.rk322x-overlays b/arch/arm/boot/dts/overlay/README.rk322x-overlays
-new file mode 100644
-index 000000000..d5bc7f3d5
+new file mode 100755
+index 000000000..96d3fc8bb
 --- /dev/null
 +++ b/arch/arm/boot/dts/overlay/README.rk322x-overlays
-@@ -0,0 +1,51 @@
+@@ -0,0 +1,57 @@
 +This document describes overlays provided in the kernel packages
 +For generic Armbian overlays documentation please see
 +https://docs.armbian.com/User-Guide_Allwinner_overlays/
@ -48,6 +49,7 @@ index 000000000..d5bc7f3d5
 +- rk322x-led1-high
 +- rk322x-led2-low
 +- rk322x-led2-high
+- rk322x-wlan-alt-wiring
 +
 +### Overlay details:
 +
@ -81,8 +83,13 @@ index 000000000..d5bc7f3d5
 +(ie: gpio and active low/high) of the onboard leds. Each board manufacturer
 +usually choose a different GPIO for the auxiliary led, but the main "working"
 +led is always wired to the same gpio (although it may be active high or low)
+
+### rk322x-alt-wiring
+
+Some boards have different SDIO wiring setup for wifi chips. This overlay
+enables the different pin controller wiring and power enable
 diff --git a/arch/arm/boot/dts/overlay/rk322x-cpu-hs.dts b/arch/arm/boot/dts/overlay/rk322x-cpu-hs.dts
-new file mode 100644
+new file mode 100755
 index 000000000..1c2fc79e1
 --- /dev/null
 +++ b/arch/arm/boot/dts/overlay/rk322x-cpu-hs.dts
@ -116,7 +123,7 @@ index 000000000..1c2fc79e1
 +
 +};
 diff --git a/arch/arm/boot/dts/overlay/rk322x-emmc-nand.dts b/arch/arm/boot/dts/overlay/rk322x-emmc-nand.dts
-new file mode 100644
+new file mode 100755
 index 000000000..9b273bf75
 --- /dev/null
 +++ b/arch/arm/boot/dts/overlay/rk322x-emmc-nand.dts
@ -144,7 +151,7 @@ index 000000000..9b273bf75
 +
 +};
 diff --git a/arch/arm/boot/dts/overlay/rk322x-emmc.dts b/arch/arm/boot/dts/overlay/rk322x-emmc.dts
-new file mode 100644
+new file mode 100755
 index 000000000..10b2f0f0d
 --- /dev/null
 +++ b/arch/arm/boot/dts/overlay/rk322x-emmc.dts
@ -174,7 +181,7 @@ index 000000000..10b2f0f0d
 +
 +};
 diff --git a/arch/arm/boot/dts/overlay/rk322x-fixup.scr-cmd b/arch/arm/boot/dts/overlay/rk322x-fixup.scr-cmd
-new file mode 100644
+new file mode 100755
 index 000000000..d4c39e20a
 --- /dev/null
 +++ b/arch/arm/boot/dts/overlay/rk322x-fixup.scr-cmd
@ -184,7 +191,7 @@ index 000000000..d4c39e20a
 +# using u-boot scripting, environment variables and "fdt" command
 +
 diff --git a/arch/arm/boot/dts/overlay/rk322x-led-conf1.dts b/arch/arm/boot/dts/overlay/rk322x-led-conf1.dts
-new file mode 100644
+new file mode 100755
 index 000000000..508e477f7
 --- /dev/null
 +++ b/arch/arm/boot/dts/overlay/rk322x-led-conf1.dts
@ -247,7 +254,7 @@ index 000000000..508e477f7
 +
 +};
 diff --git a/arch/arm/boot/dts/overlay/rk322x-led-conf2.dts b/arch/arm/boot/dts/overlay/rk322x-led-conf2.dts
-new file mode 100644
+new file mode 100755
 index 000000000..153f71565
 --- /dev/null
 +++ b/arch/arm/boot/dts/overlay/rk322x-led-conf2.dts
@ -310,7 +317,7 @@ index 000000000..153f71565
 +
 +};
 diff --git a/arch/arm/boot/dts/overlay/rk322x-nand.dts b/arch/arm/boot/dts/overlay/rk322x-nand.dts
-new file mode 100644
+new file mode 100755
 index 000000000..2a939ab49
 --- /dev/null
 +++ b/arch/arm/boot/dts/overlay/rk322x-nand.dts
@ -337,3 +344,76 @@ index 000000000..2a939ab49
 +	};
 +
 +};
+diff --git a/arch/arm/boot/dts/overlay/rk322x-wlan-alt-wiring.dts b/arch/arm/boot/dts/overlay/rk322x-wlan-alt-wiring.dts
+new file mode 100755
+index 000000000..b63611295
+--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-wlan-alt-wiring.dts
+@@ -0,0 +1,67 @@
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+
+/ {
+
+	fragment@0 {
+		target = <&pinctrl>;
+		__overlay__ {
+
+			pcfg_pull_none_drv_4ma: pcfg-pull-none-drv-4ma {
+				bias-disable;
+				drive-strength = <0x04>;
+			};
+
+			pcfg_pull_up_drv_4ma: pcfg-pull-up-drv-4ma {
+				bias-pull-up;
+				drive-strength = <0x04>;
+			};
+
+			sdio {
+				sdio_clk: sdio-clk {
+					rockchip,pins = <1 0 1 &pcfg_pull_none_drv_4ma>;
+				};
+
+				sdio_cmd: sdio-cmd {
+					rockchip,pins = <0 3 2 &pcfg_pull_up_drv_4ma>;
+				};
+
+				sdio_bus4: sdio-bus4 {
+					rockchip,pins = <1 1 1 &pcfg_pull_up_drv_4ma>,
+							<1 2 1 &pcfg_pull_up_drv_4ma>,
+							<1 4 1 &pcfg_pull_up_drv_4ma>,
+							<1 5 1 &pcfg_pull_up_drv_4ma>;
+				};
+			};
+
+		};
+
+	};
+
+	fragment@1 {
+		target = <&sdio_pwrseq>;
+		__overlay__ {
+			reset-gpios = <&gpio2 RK_PD5 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+	fragment@2 {
+		target = <&wifi_enable_h>;
+		__overlay__ {
+			rockchip,pins = <2 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	fragment@3 {
+		target = <&sdio>;
+		__overlay__ {
+			pinctrl-names = "default";
+			pinctrl-0 = <&sdio_clk &sdio_cmd &sdio_bus4>;
+		};
+
+	};
+
+};
--- a/patch/kernel/rk322x-dev/01-linux-0001-rockchip-from-5.10.patch
+++ b/patch/kernel/rk322x-dev/01-linux-0001-rockchip-from-5.10.patch
--- a/patch/kernel/rk322x-dev/01-linux-0001-rockchip-from-5.11.patch
+++ b/patch/kernel/rk322x-dev/01-linux-0001-rockchip-from-5.11.patch
--- a/patch/kernel/rk322x-dev/01-linux-1000-rockchip-soc-from-list.patch
+++ b/patch/kernel/rk322x-dev/01-linux-1000-rockchip-soc-from-list.patch
--- a/patch/kernel/rk322x-dev/01-linux-1003-rockchip-v4l-next-from-list.patch
+++ b/patch/kernel/rk322x-dev/01-linux-1003-rockchip-v4l-next-from-list.patch
--- a/patch/kernel/rk322x-dev/01-linux-0011-v4l2-from-5.10.patch
+++ b/patch/kernel/rk322x-dev/01-linux-0011-v4l2-from-5.10.patch
--- a/patch/kernel/rk322x-dev/01-linux-0020-drm-from-5.11.patch
+++ b/patch/kernel/rk322x-dev/01-linux-0020-drm-from-5.11.patch
@ -1,4 +1,4 @@
-From 0898302e2ab75165acf8ad43726e67f3f0f6ab32 Mon Sep 17 00:00:00 2001
+From b9335b9a01fc5eadeec6c50a81e68a9e9799de2d Mon Sep 17 00:00:00 2001
 From: Thomas Zimmermann <tzimmermann@suse.de>
 Date: Wed, 23 Sep 2020 12:21:51 +0200
 Subject: [PATCH] drm/rockchip: Convert to drm_gem_object_funcs
@ -82,7 +82,7 @@ index 62e5d0970525..1cf4631461c9 100644
  */
 void rockchip_gem_free_object(struct drm_gem_object *obj)

-From 411c1e880514d8903890c1fe67c4b532d8f0c21c Mon Sep 17 00:00:00 2001
+From ba7e8c9f9c79119c569466b08b58a3b20aa0dca9 Mon Sep 17 00:00:00 2001
 From: Thomas Zimmermann <tzimmermann@suse.de>
 Date: Mon, 28 Sep 2020 10:16:43 +0200
 Subject: [PATCH] drm/rockchip: Include <drm/drm_gem_cma_helper> for
@ -125,7 +125,7 @@ index 1cf4631461c9..7d5ebb10323b 100644
 #include <drm/drm_vma_manager.h>
 

-From 4ddb01c2866cd57b134d739e9e88e00dc88453ae Mon Sep 17 00:00:00 2001
+From 40175ca66971e6bde3e4c3e466616da07711271d Mon Sep 17 00:00:00 2001
 From: Qinglang Miao <miaoqinglang@huawei.com>
 Date: Mon, 21 Sep 2020 21:10:19 +0800
 Subject: [PATCH] drm/panfrost: simplify the return expression of
@ -169,7 +169,7 @@ index e6896733838a..ea8d31863c50 100644
 
 static void panfrost_reset_fini(struct panfrost_device *pfdev)

-From b75473ce0e84aa528eef4f805c95fc5e2f6f766a Mon Sep 17 00:00:00 2001
+From 7e4d1ac491e3ac8b8b03d74129ef9521cdf479ef Mon Sep 17 00:00:00 2001
 From: Qinglang Miao <miaoqinglang@huawei.com>
 Date: Mon, 21 Sep 2020 21:10:21 +0800
 Subject: [PATCH] drm/panfrost: simplify the return expression of
@ -211,7 +211,7 @@ index 8ab025d0035f..913eaa6d0bc6 100644
 
 static void panfrost_devfreq_reset(struct panfrost_devfreq *pfdevfreq)

-From f3f98ffb76cdbf06f0549ce904007a7725b76c6f Mon Sep 17 00:00:00 2001
+From 7efe8c0d9576db34e4d5427d5a939a20f4afe96f Mon Sep 17 00:00:00 2001
 From: Rikard Falkeborn <rikard.falkeborn@gmail.com>
 Date: Sun, 4 Oct 2020 22:06:53 +0200
 Subject: [PATCH] drm: bridge: dw-hdmi: Constify dw_hdmi_i2s_ops
@ -242,7 +242,7 @@ index 9fef6413741d..feb04f127b55 100644
 	.audio_startup  = dw_hdmi_i2s_audio_startup,
 	.audio_shutdown	= dw_hdmi_i2s_audio_shutdown,

-From 5855d31b6f0e36aea731afe3b8dff3c470efa46b Mon Sep 17 00:00:00 2001
+From 4fc54b12725fbdf5a002517d7350f3778a6f65f3 Mon Sep 17 00:00:00 2001
 From: Boris Brezillon <boris.brezillon@collabora.com>
 Date: Fri, 2 Oct 2020 14:25:06 +0200
 Subject: [PATCH] drm/panfrost: Fix job timeout handling
@ -276,7 +276,7 @@ Signed-off-by: Steven Price <steven.price@arm.com>
 Link: https://patchwork.freedesktop.org/patch/msgid/20201002122506.1374183-1-boris.brezillon@collabora.com
 (cherry picked from commit 1a11a88cfd9a97e13be8bc880c4795f9844fbbec)
 ---
- drivers/gpu/drm/panfrost/panfrost_job.c | 62 ++++++++++++++++++++++++++++-----
+ drivers/gpu/drm/panfrost/panfrost_job.c | 62 +++++++++++++++++++++----
 1 file changed, 53 insertions(+), 9 deletions(-)

 diff --git a/drivers/gpu/drm/panfrost/panfrost_job.c b/drivers/gpu/drm/panfrost/panfrost_job.c
--- a/patch/kernel/rk322x-dev/01-linux-0021-drm-from-5.10.patch
+++ b/patch/kernel/rk322x-dev/01-linux-0021-drm-from-5.10.patch
--- a/patch/kernel/rk322x-dev/01-linux-0021-drm-from-list.patch
+++ b/patch/kernel/rk322x-dev/01-linux-0021-drm-from-list.patch
--- a/patch/kernel/rk322x-dev/01-linux-1001-rockchip-soc-wip.patch
+++ b/patch/kernel/rk322x-dev/01-linux-1001-rockchip-soc-wip.patch
--- a/patch/kernel/rk322x-dev/01-linux-1002-rockchip-drm-wip.patch
+++ b/patch/kernel/rk322x-dev/01-linux-1002-rockchip-drm-wip.patch
--- a/patch/kernel/rk322x-dev/01-linux-1004-rockchip-v4l-wip.patch
+++ b/patch/kernel/rk322x-dev/01-linux-1004-rockchip-v4l-wip.patch
--- a/patch/kernel/rk322x-dev/01-linux-9000-rk322x-box-DTs.patch
+++ b/patch/kernel/rk322x-dev/01-linux-9000-rk322x-box-DTs.patch
@ -1,4 +1,4 @@
-From d9e3ab544074c0a780bce1b2a165f7b1147cb473 Mon Sep 17 00:00:00 2001
+From 0a4705dcfadb06b21b05b92cdd23a7cf61b27d85 Mon Sep 17 00:00:00 2001
 From: Alex Bee <knaerzche@gmail.com>
 Date: Sun, 16 Aug 2020 23:03:12 +0200
 Subject: [PATCH] WIP: ARM: dts: add RK322x box device trees
@ -6,16 +6,16 @@ Subject: [PATCH] WIP: ARM: dts: add RK322x box device trees
 Signed-off-by: Alex Bee <knaerzche@gmail.com>
 ---
 arch/arm/boot/dts/Makefile                |   4 +
- arch/arm/boot/dts/rk3228a-box-h96mini.dts | 115 ++++++++
+ arch/arm/boot/dts/rk3228a-box-h96mini.dts | 115 +++++++++
 arch/arm/boot/dts/rk3228a-box.dts         |  47 ++++
 arch/arm/boot/dts/rk3228a-box.dtsi        |  12 +
- arch/arm/boot/dts/rk3229-box-a95xr1.dts   |  57 ++++
+ arch/arm/boot/dts/rk3229-box-a95xr1.dts   |  57 +++++
 arch/arm/boot/dts/rk3229-box.dts          |  50 ++++
 arch/arm/boot/dts/rk3229-box.dtsi         |  13 +
 arch/arm/boot/dts/rk3229-cpu-opp.dtsi     |  50 ++++
- arch/arm/boot/dts/rk322x-box-dcdc.dtsi    | 163 +++++++++++
- arch/arm/boot/dts/rk322x-box.dtsi         | 316 ++++++++++++++++++++++
- 10 files changed, 827 insertions(+)
+ arch/arm/boot/dts/rk322x-box-dcdc.dtsi    | 163 +++++++++++++
+ arch/arm/boot/dts/rk322x-box.dtsi         | 282 ++++++++++++++++++++++
+ 10 files changed, 793 insertions(+)
 create mode 100644 arch/arm/boot/dts/rk3228a-box-h96mini.dts
 create mode 100644 arch/arm/boot/dts/rk3228a-box.dts
 create mode 100644 arch/arm/boot/dts/rk3228a-box.dtsi
@ -27,10 +27,10 @@ Signed-off-by: Alex Bee <knaerzche@gmail.com>
 create mode 100644 arch/arm/boot/dts/rk322x-box.dtsi

 diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
-index 4572db3fa5ae..76e3f8916e86 100644
+index ce66ffd5a1bb..4841972313e8 100644
 --- a/arch/arm/boot/dts/Makefile
 +++ b/arch/arm/boot/dts/Makefile
-@@ -969,7 +969,11 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
+@@ -981,7 +981,11 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
 	rk3188-bqedison2qc.dtb \
 	rk3188-px3-evb.dtb \
 	rk3188-radxarock.dtb \
@ -599,10 +599,10 @@ index 000000000000..34273f3ff9ae
 +};
 diff --git a/arch/arm/boot/dts/rk322x-box.dtsi b/arch/arm/boot/dts/rk322x-box.dtsi
 new file mode 100644
-index 000000000000..b65f99b08366
+index 000000000000..ef5fa28d8ee9
 --- /dev/null
 +++ b/arch/arm/boot/dts/rk322x-box.dtsi
-@@ -0,0 +1,316 @@
+@@ -0,0 +1,282 @@
 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 +
 +/dts-v1/;
@ -653,17 +653,6 @@ index 000000000000..b65f99b08366
 +		reg = <0x60000000 0x40000000>;
 +	};
 +
-+	reserved-memory {
-+		#address-cells = <1>;
-+		#size-cells = <1>;
-+		ranges;
-+
-+		trust_reserved: trust@68400000 {
-+			reg = <0x68400000 0xe00000>;
-+			no-map;
-+		};
-+	};
-+
 +	sdio_pwrseq: sdio-pwrseq {
 +		compatible = "mmc-pwrseq-simple";
 +		pinctrl-names = "default";
@ -690,29 +679,6 @@ index 000000000000..b65f99b08366
 +	};
 +};
 +
-+&cpu0_opp_table {
-+
-+	opp-408000000 {
-+		opp-microvolt = <950000 950000 1275000>;
-+	};
-+
-+	opp-600000000 {
-+		opp-microvolt = <975000 975000 1275000>;
-+	};
-+
-+	opp-816000000 {
-+		opp-microvolt = <1000000 1000000 1275000>;
-+	};
-+
-+	opp-1008000000 {
-+		opp-microvolt = <1175000 1175000 1275000>;
-+	};
-+
-+	opp-1200000000 {
-+		opp-microvolt = <1275000 1275000 1275000>;
-+	};
-+};
-+
 +&cru {
 +	assigned-clocks = <&cru PLL_GPLL>, <&cru ARMCLK>,
 +			  <&cru PLL_CPLL>, <&cru ACLK_PERI>,
--- a/patch/kernel/rk322x-dev/01-linux-9001-rk3188-rbox-DTs.patch
+++ b/patch/kernel/rk322x-dev/01-linux-9001-rk3188-rbox-DTs.patch
@ -0,0 +1,799 @@
+From 4f148f80254628f7c246ca0d38c4dbef18594ca1 Mon Sep 17 00:00:00 2001
+From: Alex Bee <knaerzche@gmail.com>
+Date: Sun, 16 Aug 2020 23:13:44 +0200
+Subject: [PATCH] ARM: dts: add RK3188T rbox devicetrees
+
+Signed-off-by: Alex Bee <knaerzche@gmail.com>
+---
+ arch/arm/boot/dts/rk3188-rbox-cs918.dts | 144 ++++++++
+ arch/arm/boot/dts/rk3188-rbox-cs968.dts | 170 +++++++++
+ arch/arm/boot/dts/rk3188-rbox.dtsi      | 452 ++++++++++++++++++++++++
+ 3 files changed, 766 insertions(+)
+ create mode 100644 arch/arm/boot/dts/rk3188-rbox-cs918.dts
+ create mode 100644 arch/arm/boot/dts/rk3188-rbox-cs968.dts
+ create mode 100644 arch/arm/boot/dts/rk3188-rbox.dtsi
+
+diff --git a/arch/arm/boot/dts/rk3188-rbox-cs918.dts b/arch/arm/boot/dts/rk3188-rbox-cs918.dts
+new file mode 100644
+index 000000000000..bc701e41e010
+--- /dev/null
+++ b/arch/arm/boot/dts/rk3188-rbox-cs918.dts
+@@ -0,0 +1,144 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2020 Alex Bee <knaerzche@gmail.com>
+ */
+
+/dts-v1/;
+#include <dt-bindings/input/input.h>
+#include "rk3188-rbox.dtsi"
+
+/ {
+	model = "RK3188T CS918";
+
+	memory@60000000 {
+		device_type = "memory";
+		reg = <0x60000000 0x80000000>;
+	};
+
+	ext_rmii: ext-rmii {
+		compatible = "fixed-clock";
+		clock-frequency = <50000000>;
+		clock-output-names = "ext_rmii";
+		#clock-cells = <0>;
+	};
+
+	gpio-keys {
+		pinctrl-names = "default";
+		pinctrl-0 = <&pwr_key &usb_int>;
+		compatible = "gpio-keys";
+		autorepeat;
+
+		power {
+			gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_POWER>;
+			label = "GPIO Key Power";
+			linux,input-type = <1>;
+			wakeup-source;
+			debounce-interval = <100>;
+		};
+
+		wake_on_usb: wake-on-usb {
+			label = "Wake-on-USB";
+			gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WAKEUP>;
+			wakeup-source;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		sleep {
+			label = "red";
+			gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>;
+			default-state = "off";
+		};
+	};
+
+	vcc_otg: usb-otg-regulator {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		gpio = <&gpio3 RK_PD7 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&otg_vbus_drv>, <&usb_wifi_power>;
+		regulator-name = "otg-vbus";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+	};
+};
+
+&emac {
+	assigned-clocks = <&cru SCLK_MAC>;
+	assigned-clock-parents = <&ext_rmii>;
+	pinctrl-0 = <&emac_xfer_ext>, <&emac_mdio>, <&phy_int>;
+	pinctrl-names = "default";
+	phy = <&phy0>;
+	phy-supply = <&vcc_rmii>;
+	status = "okay";
+
+	phy0: ethernet-phy@0 {
+		reg = <0x0>;
+		/* Interrupt is not connected */
+	};
+};
+
+&nfc {
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	nand@0 {
+		reg = <0>;
+		label = "rk-nand";
+		nand-bus-width = <8>;
+		nand-ecc-mode = "hw";
+		nand-ecc-step-size = <1024>;
+		nand-ecc-strength = <40>;
+		nand-is-boot-medium;
+		rockchip,boot-blks = <8>;
+		rockchip,boot-ecc-strength = <40>;
+	};
+};
+
+&pinctrl {
+	emac {
+		emac_xfer_ext: emac-xfer-ext {
+			rockchip,pins = <3 RK_PC0 2 &pcfg_pull_up>, /* tx_en */
+					<3 RK_PC1 2 &pcfg_pull_up>, /* txd1 */
+					<3 RK_PC2 2 &pcfg_pull_up>, /* txd0 */
+					<3 RK_PC3 2 &pcfg_pull_up>, /* rxd0 */
+					<3 RK_PC4 2 &pcfg_pull_up>, /* rxd1 */
+					<3 RK_PC5 3 &pcfg_pull_down>, /* mac_clk_ext */
+					<3 RK_PC6 2 &pcfg_pull_down>, /* rx_err */
+					<3 RK_PC7 2 &pcfg_pull_down>; /* crs_dvalid */
+		};
+	};
+
+	keys {
+		pwr_key: pwr-key {
+			rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+	};
+
+	rtl8201f  {
+		phy_int: phy-int {
+			rockchip,pins = <3 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+	};
+
+	usb {
+		usb_int: usb-int {
+			rockchip,pins = <0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+		otg_vbus_drv: otg-vbus-drv {
+			rockchip,pins = <3 RK_PD7 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+		usb_wifi_power: usb-wifi-power {
+			rockchip,pins = <3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+
+	};
+};
+
+&usbphy0 {
+	vbus-supply = <&vcc_otg>;
+};
+diff --git a/arch/arm/boot/dts/rk3188-rbox-cs968.dts b/arch/arm/boot/dts/rk3188-rbox-cs968.dts
+new file mode 100644
+index 000000000000..a08e368d72dc
+--- /dev/null
+++ b/arch/arm/boot/dts/rk3188-rbox-cs968.dts
+@@ -0,0 +1,170 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2020 Alex Bee <knaerzche@gmail.com>
+ */
+
+/dts-v1/;
+#include <dt-bindings/input/input.h>
+#include "rk3188-rbox.dtsi"
+
+/ {
+	model = "RK3188T CS968";
+
+	memory@60000000 {
+                device_type = "memory";
+                reg = <0x60000000 0x80000000>;
+        };
+
+	gpio-keys {
+		pinctrl-names = "default";
+		pinctrl-0 = <&usb_int>;
+		compatible = "gpio-keys";
+		autorepeat;
+
+
+		wake_on_usb: wake-on-usb {
+			label = "Wake-on-USB";
+			gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WAKEUP>;
+			wakeup-source;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		blue {
+			label = "blue";
+			gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
+			default-state = "on";
+		};
+
+		sleep {
+			label = "red";
+			gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+		};
+	};
+
+
+	sdio_pwrseq: sdio-pwrseq {
+		compatible = "mmc-pwrseq-simple";
+		clocks = <&pcf8563>;
+		clock-names = "ext_clock";
+		pinctrl-names = "default";
+		pinctrl-0 = <&wifi_reg_on>;
+		reset-gpios = <&gpio3 RK_PD0 GPIO_ACTIVE_LOW>;
+	};
+
+	vcc_otg: usb-otg-regulator {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		gpio = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&otg_vbus_drv>;
+		regulator-name = "otg-vbus";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+	};
+
+};
+
+&mmc1 {
+	bus-width = <4>;
+	clock-frequency = <25000000>;
+	mmc-pwrseq = <&sdio_pwrseq>;
+	non-removable;
+	pinctrl-names = "default";
+	pinctrl-0 = <&sd1_clk>, <&sd1_cmd>,
+		    <&sd1_bus4>;
+	vmmc-supply = <&vcc_io>;
+	vqmmc-supply = <&vccio_wl>;
+	cap-sd-highspeed;
+	status = "okay";
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	brcmf: wifi@1 {
+		reg = <0x1>;
+		compatible = "brcm,bcm4329-fmac";
+		interrupt-parent = <&gpio3>;
+		interrupts = <RK_PD2 GPIO_ACTIVE_HIGH>;
+		interrupt-names = "host-wake";
+		pinctrl-names = "default";
+		pinctrl-0 = <&wifi_host_wake>;
+	};
+};
+
+&nfc {
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	nand@0 {
+		reg = <0>;
+		label = "rk-nand";
+		nand-bus-width = <8>;
+		nand-ecc-mode = "hw";
+		nand-ecc-step-size = <1024>;
+		nand-ecc-strength = <40>;
+		nand-is-boot-medium;
+		rockchip,boot-blks = <8>;
+		rockchip,boot-ecc-strength = <40>;
+	};
+};
+
+&pinctrl {
+	ap6210 {
+		bt_host_wake: bt-host-wake {
+			rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+
+		bt_reg_on: bt-reg-on {
+			rockchip,pins = <3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+
+		/* pin hog to pull the reset high */
+		bt_rst: bt-rst {
+			rockchip,pins = <3 RK_PD1 RK_FUNC_GPIO &pcfg_output_high>;
+		};
+
+		bt_wake: bt-wake {
+			rockchip,pins = <3 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+
+		wifi_host_wake: wifi-host-wake {
+			rockchip,pins = <3 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+
+		wifi_reg_on: wifi-reg-on {
+			rockchip,pins = <3 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	usb {
+		usb_int: usb-int {
+			rockchip,pins = <0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+		otg_vbus_drv: otg-vbus-drv {
+			rockchip,pins = <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+};
+
+&uart0 {
+	pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
+	uart-has-rtscts;
+	status = "okay";
+
+	bluetooth {
+		compatible = "brcm,bcm43438-bt";
+		device-wakeup-gpios = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>;
+		host-wakeup-gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
+		shutdown-gpios = <&gpio3 RK_PC7 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&bt_host_wake &bt_reg_on &bt_rst &bt_wake>;
+	};
+};
+
+&usbphy0 {
+        vbus-supply = <&vcc_otg>;
+};
+diff --git a/arch/arm/boot/dts/rk3188-rbox.dtsi b/arch/arm/boot/dts/rk3188-rbox.dtsi
+new file mode 100644
+index 000000000000..7dcd4d2f19e6
+--- /dev/null
+++ b/arch/arm/boot/dts/rk3188-rbox.dtsi
+@@ -0,0 +1,452 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2020 Alex Bee <knaerzche@gmail.com>
+ */
+
+/dts-v1/;
+#include <dt-bindings/input/input.h>
+#include "rk3188.dtsi"
+
+/ {
+	hdmi-out {
+		compatible = "hdmi-connector";
+		type = "c";
+
+		port {
+			hdmi_con_out: endpoint {
+				remote-endpoint = <&it66121_out>;
+			};
+		};
+	};
+
+	hdmi-sound {
+                compatible = "simple-audio-card";
+                simple-audio-card,name = "HDMI";
+                simple-audio-card,format = "i2s";
+                simple-audio-card,mclk-fs = <128>;
+
+                simple-audio-card,cpu {
+                        sound-dai = <&i2s0>;
+                };
+
+                simple-audio-card,codec {
+                        sound-dai = <&it66121>;
+                };
+        };
+
+	ir_recv: gpio-ir-receiver {
+		compatible = "gpio-ir-receiver";
+		gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&ir_recv_pin>;
+	};
+
+	spdif-sound {
+		compatible = "simple-audio-card";
+		simple-audio-card,name = "SPDIF";
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		simple-audio-card,dai-link@0 {
+			reg = <0>;
+			cpu {
+				sound-dai = <&spdif>;
+			};
+			codec {
+				sound-dai = <&spdif_dit>;
+			};
+		};
+	};
+
+	spdif_dit: spdif-dit {
+		compatible = "linux,spdif-dit";
+		#sound-dai-cells = <0>;
+	};
+
+
+	vcc_host: usb-host-regulator {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		gpio = <&gpio0 RK_PA3 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&host_vbus_drv>;
+		regulator-name = "host-pwr";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+	};
+
+	vcc_sd0: sdmmc-regulator {
+		compatible = "regulator-fixed";
+		regulator-name = "sdmmc-supply";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_LOW>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&sdmmc_pwr>;
+		startup-delay-us = <100000>;
+		vin-supply = <&vcc_io>;
+	};
+
+	vsys: vsys-regulator {
+		compatible = "regulator-fixed";
+		regulator-name = "vsys";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-boot-on;
+	};
+};
+
+&cpu0 {
+	cpu-supply = <&vdd_arm>;
+};
+
+&cpu1 {
+	cpu-supply = <&vdd_arm>;
+};
+
+&cpu2 {
+	cpu-supply = <&vdd_arm>;
+};
+
+&cpu3 {
+	cpu-supply = <&vdd_arm>;
+};
+
+&cru {
+
+	assigned-clocks = <&cru PLL_GPLL>, <&cru PLL_CPLL>,
+			  <&cru ACLK_CPU>,
+			  <&cru HCLK_CPU>, <&cru PCLK_CPU>,
+			  <&cru ACLK_PERI>, <&cru HCLK_PERI>,
+			  <&cru PCLK_PERI>, <&cru ACLK_LCDC0>,
+			  <&cru ACLK_LCDC1>;
+	assigned-clock-rates = <594000000>, <600000000>,
+			       <297000000>,
+			       <148500000>, <74250000>,
+			       <297000000>, <148500000>,
+			       <74250000>, <297000000>,
+			       <297000000>;
+};
+
+&gpu {
+	assigned-clocks = <&cru ACLK_GPU>;
+	assigned-clock-rates = <200000000>;
+	assigned-clocks-parent = <&cru PLL_CPLL>;
+	mali-supply = <&vdd_log>;
+	status = "okay";
+};
+
+/*
+ * since vdd_log also supplies other SoC components which
+ * do not have a devfreq driver (yet), we have to make sure,
+ * voltage is at least 1050000 mV
+ */
+
+&gpu_opp_table {
+	opp-133000000 {
+		opp-microvolt = <1050000>;
+	};
+	opp-200000000 {
+		opp-microvolt = <1050000>;
+	};
+	opp-266000000 {
+		opp-microvolt = <1050000>;
+	};
+};
+
+&i2c1 {
+	clock-frequency = <400000>;
+	status = "okay";
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	pcf8563: rtc@51 {
+		compatible = "nxp,pcf8563";
+		reg = <0x51>;
+		interrupt-parent = <&gpio0>;
+		interrupts = <RK_PB5 IRQ_TYPE_EDGE_FALLING>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&rtc_int>;
+		#clock-cells = <0>;
+		clock-output-names = "xin32k";
+	};
+
+	act8846: act8846@5a {
+		compatible = "active-semi,act8846";
+		reg = <0x5a>;
+		status = "okay";
+		system-power-controller;
+
+		pinctrl-names = "default";
+		pinctrl-0 = <&dvs0_ctl &pmic_int &power_on>;
+
+		vp1-supply = <&vsys>;
+		vp2-supply = <&vsys>;
+		vp3-supply = <&vsys>;
+		vp4-supply = <&vsys>;
+		inl1-supply = <&vcc_io>;
+		inl2-supply = <&vsys>;
+		inl3-supply = <&vsys>;
+
+		regulators {
+			vcc_ddr: REG1 {
+				regulator-name = "VCC_DDR";
+				regulator-min-microvolt = <1200000>;
+				regulator-max-microvolt = <1200000>;
+				regulator-always-on;
+			};
+
+			vdd_log: REG2 {
+				regulator-name = "VDD_LOG";
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <1250000>;
+				regulator-always-on;
+			};
+
+			vdd_arm: REG3 {
+				regulator-name = "VDD_ARM";
+				regulator-min-microvolt = <875000>;
+				regulator-max-microvolt = <1350000>;
+				regulator-always-on;
+			};
+
+			vcc_io: REG4 {
+				regulator-name = "VCC_IO";
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-always-on;
+			};
+
+			vdd_10: REG5 {
+				regulator-name = "VDD_10";
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <1000000>;
+				regulator-always-on;
+			};
+
+			vdd_hdmi: REG6 {
+				regulator-name = "VDD_HDMI";
+				regulator-min-microvolt = <1200000>;
+				regulator-max-microvolt = <1200000>;
+				regulator-always-on;
+			};
+
+			vcc18: REG7 {
+				regulator-name = "VCC_18";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-always-on;
+			};
+
+			vcca_33: REG8 {
+				regulator-name = "VCCA_33";
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-always-on;
+			};
+
+			vcc_rmii: REG9 {
+				regulator-name = "VCC_RMII";
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+			};
+
+			vccio_wl: REG10 {
+				regulator-name = "VCCIO_WL";
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+			};
+
+			vcc_18: REG11 {
+				regulator-name = "VCC18_IO";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-always-on;
+			};
+
+			vcc28: REG12 {
+				regulator-name = "VCC_28";
+				regulator-min-microvolt = <2800000>;
+				regulator-max-microvolt = <2800000>;
+				regulator-always-on;
+			};
+		};
+	};
+};
+
+&i2c2 {
+	clock-frequency = <400000>;
+	status = "okay";
+
+	it66121: it-66121@4c {
+		compatible = "ite,it66121fn";
+		pinctrl-names = "default";
+		pinctrl-0 = <&hdmi_rst &it66121_int>;
+		vcn33-supply = <&vcca_33>;
+		vcn18-supply = <&vcc_18>;
+		vrf12-supply = <&vdd_hdmi>;
+		reset-gpios = <&gpio2 RK_PB2 GPIO_ACTIVE_HIGH>;
+		interrupt-parent = <&gpio2>;
+		interrupts = <RK_PD6 IRQ_TYPE_EDGE_FALLING>;
+		reg = <0x4c>;
+		#sound-dai-cells = <0>;
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <0>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				it66121_in: endpoint@0 {
+					reg = <0>;
+					remote-endpoint = <&vop1_out_rgb24>;
+				};
+			};
+
+			port@1 {
+				reg = <1>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				it66121_out: endpoint@0 {
+					reg = <0>;
+					remote-endpoint = <&hdmi_con_out>;
+				};
+			};
+		};
+	};
+};
+
+&i2s0 {
+	status = "okay";
+};
+
+&mmc0 {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&sd0_clk>, <&sd0_cmd>,
+		    <&sd0_cd>, <&sd0_bus4>;
+	vmmc-supply = <&vcc_sd0>;
+	bus-width = <4>;
+	cap-mmc-highspeed;
+	cap-sd-highspeed;
+};
+
+&pinctrl {
+	pcfg_output_high: pcfg-output-high {
+		output-high;
+	};
+
+	pcfg_output_low: pcfg-output-low {
+		output-low;
+	};
+
+	pcfg_pull_default: pcfg_pull_default {
+		bias-pull-pin-default;
+	};
+
+	pcfg_pull_none_12ma: pcfg-pull-none-12ma {
+		bias-disable;
+		drive-strength = <12>;
+	};
+
+	act8846 {
+		dvs0_ctl: act8846-dvs0-ctl {
+			rockchip,pins = <3 RK_PD3 RK_FUNC_GPIO &pcfg_output_low>;
+		};
+
+		pmic_int: pmic-int {
+			rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+	};
+
+	keys {
+		pwr_hold: pwr-hold {
+			rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+	};
+
+	hdmi {
+		it66121_int: hdmi-int {
+			rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+		hdmi_rst: hdmi-rst {
+			rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	ir-receiver {
+		ir_recv_pin: ir-recv-pin {
+			rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	pcf8563 {
+		rtc_int: rtc-int {
+			rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+	};
+
+	power {
+		power_on: power-on {
+			rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+	};
+
+	sd0 {
+		sdmmc_pwr: sdmmc-pwr {
+			rockchip,pins = <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	usb {
+		host_vbus_drv: host-vbus-drv {
+			rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+};
+
+&spdif {
+	status = "okay";
+};
+
+&uart2 {
+	status = "okay";
+};
+
+&usbphy {
+	status = "okay";
+};
+
+&usbphy1 {
+	vbus-supply = <&vcc_host>;
+};
+
+&usb_otg {
+        status = "okay";
+};
+
+&usb_host {
+	status = "okay";
+};
+
+&vop1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&lcdc1_dclk &lcdc1_den &lcdc1_hsync
+		     &lcdc1_vsync &lcdc1_rgb24>;
+	status = "okay";
+};
+
+&vop1_out {
+	vop1_out_rgb24: endpoint@0 {
+		reg = <0>;
+		remote-endpoint = <&it66121_in>;
+	};
+};
+
+&wdt {
+	status = "okay";
+};
--- a/patch/kernel/rk322x-dev/01-linux-9002-rk3066a-rbox-DTs.patch
+++ b/patch/kernel/rk322x-dev/01-linux-9002-rk3066a-rbox-DTs.patch
--- a/patch/kernel/rk322x-dev/general-add-overlays.patch
+++ b/patch/kernel/rk322x-dev/general-add-overlays.patch
@ -1,9 +1,9 @@
 diff --git a/arch/arm/boot/dts/overlay/Makefile b/arch/arm/boot/dts/overlay/Makefile
-new file mode 100644
-index 000000000..f024e8db0
+new file mode 100755
+index 000000000..20b3b57f4
 --- /dev/null
 +++ b/arch/arm/boot/dts/overlay/Makefile
-@@ -0,0 +1,20 @@
+@@ -0,0 +1,21 @@
 +# SPDX-License-Identifier: GPL-2.0
 +dtbo-$(CONFIG_ARCH_ROCKCHIP) += \
 +	rk322x-emmc.dtbo	\
@ -11,7 +11,8 @@ index 000000000..f024e8db0
 +	rk322x-emmc-nand.dtbo	\
 +	rk322x-led-conf1.dtbo	\
 +	rk322x-led-conf2.dtbo	\
-+	rk322x-cpu-hs.dtbo
+	rk322x-cpu-hs.dtbo	\
+	rk322x-wlan-alt-wiring.dtbo
 +
 +scr-$(CONFIG_ARCH_ROCKCHIP) += \
 +       rk322x-fixup.scr
@ -25,11 +26,11 @@ index 000000000..f024e8db0
 +clean-files    := *.dtbo *.scr
 +
 diff --git a/arch/arm/boot/dts/overlay/README.rk322x-overlays b/arch/arm/boot/dts/overlay/README.rk322x-overlays
-new file mode 100644
-index 000000000..d5bc7f3d5
+new file mode 100755
+index 000000000..96d3fc8bb
 --- /dev/null
 +++ b/arch/arm/boot/dts/overlay/README.rk322x-overlays
-@@ -0,0 +1,51 @@
+@@ -0,0 +1,57 @@
 +This document describes overlays provided in the kernel packages
 +For generic Armbian overlays documentation please see
 +https://docs.armbian.com/User-Guide_Allwinner_overlays/
@ -48,6 +49,7 @@ index 000000000..d5bc7f3d5
 +- rk322x-led1-high
 +- rk322x-led2-low
 +- rk322x-led2-high
+- rk322x-wlan-alt-wiring
 +
 +### Overlay details:
 +
@ -81,8 +83,13 @@ index 000000000..d5bc7f3d5
 +(ie: gpio and active low/high) of the onboard leds. Each board manufacturer
 +usually choose a different GPIO for the auxiliary led, but the main "working"
 +led is always wired to the same gpio (although it may be active high or low)
+
+### rk322x-alt-wiring
+
+Some boards have different SDIO wiring setup for wifi chips. This overlay
+enables the different pin controller wiring and power enable
 diff --git a/arch/arm/boot/dts/overlay/rk322x-cpu-hs.dts b/arch/arm/boot/dts/overlay/rk322x-cpu-hs.dts
-new file mode 100644
+new file mode 100755
 index 000000000..1c2fc79e1
 --- /dev/null
 +++ b/arch/arm/boot/dts/overlay/rk322x-cpu-hs.dts
@ -116,7 +123,7 @@ index 000000000..1c2fc79e1
 +
 +};
 diff --git a/arch/arm/boot/dts/overlay/rk322x-emmc-nand.dts b/arch/arm/boot/dts/overlay/rk322x-emmc-nand.dts
-new file mode 100644
+new file mode 100755
 index 000000000..9b273bf75
 --- /dev/null
 +++ b/arch/arm/boot/dts/overlay/rk322x-emmc-nand.dts
@ -144,7 +151,7 @@ index 000000000..9b273bf75
 +
 +};
 diff --git a/arch/arm/boot/dts/overlay/rk322x-emmc.dts b/arch/arm/boot/dts/overlay/rk322x-emmc.dts
-new file mode 100644
+new file mode 100755
 index 000000000..10b2f0f0d
 --- /dev/null
 +++ b/arch/arm/boot/dts/overlay/rk322x-emmc.dts
@ -174,7 +181,7 @@ index 000000000..10b2f0f0d
 +
 +};
 diff --git a/arch/arm/boot/dts/overlay/rk322x-fixup.scr-cmd b/arch/arm/boot/dts/overlay/rk322x-fixup.scr-cmd
-new file mode 100644
+new file mode 100755
 index 000000000..d4c39e20a
 --- /dev/null
 +++ b/arch/arm/boot/dts/overlay/rk322x-fixup.scr-cmd
@ -184,7 +191,7 @@ index 000000000..d4c39e20a
 +# using u-boot scripting, environment variables and "fdt" command
 +
 diff --git a/arch/arm/boot/dts/overlay/rk322x-led-conf1.dts b/arch/arm/boot/dts/overlay/rk322x-led-conf1.dts
-new file mode 100644
+new file mode 100755
 index 000000000..508e477f7
 --- /dev/null
 +++ b/arch/arm/boot/dts/overlay/rk322x-led-conf1.dts
@ -247,7 +254,7 @@ index 000000000..508e477f7
 +
 +};
 diff --git a/arch/arm/boot/dts/overlay/rk322x-led-conf2.dts b/arch/arm/boot/dts/overlay/rk322x-led-conf2.dts
-new file mode 100644
+new file mode 100755
 index 000000000..153f71565
 --- /dev/null
 +++ b/arch/arm/boot/dts/overlay/rk322x-led-conf2.dts
@ -310,7 +317,7 @@ index 000000000..153f71565
 +
 +};
 diff --git a/arch/arm/boot/dts/overlay/rk322x-nand.dts b/arch/arm/boot/dts/overlay/rk322x-nand.dts
-new file mode 100644
+new file mode 100755
 index 000000000..2a939ab49
 --- /dev/null
 +++ b/arch/arm/boot/dts/overlay/rk322x-nand.dts
@ -337,3 +344,76 @@ index 000000000..2a939ab49
 +	};
 +
 +};
+diff --git a/arch/arm/boot/dts/overlay/rk322x-wlan-alt-wiring.dts b/arch/arm/boot/dts/overlay/rk322x-wlan-alt-wiring.dts
+new file mode 100755
+index 000000000..b63611295
+--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-wlan-alt-wiring.dts
+@@ -0,0 +1,67 @@
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+
+/ {
+
+	fragment@0 {
+		target = <&pinctrl>;
+		__overlay__ {
+
+			pcfg_pull_none_drv_4ma: pcfg-pull-none-drv-4ma {
+				bias-disable;
+				drive-strength = <0x04>;
+			};
+
+			pcfg_pull_up_drv_4ma: pcfg-pull-up-drv-4ma {
+				bias-pull-up;
+				drive-strength = <0x04>;
+			};
+
+			sdio {
+				sdio_clk: sdio-clk {
+					rockchip,pins = <1 0 1 &pcfg_pull_none_drv_4ma>;
+				};
+
+				sdio_cmd: sdio-cmd {
+					rockchip,pins = <0 3 2 &pcfg_pull_up_drv_4ma>;
+				};
+
+				sdio_bus4: sdio-bus4 {
+					rockchip,pins = <1 1 1 &pcfg_pull_up_drv_4ma>,
+							<1 2 1 &pcfg_pull_up_drv_4ma>,
+							<1 4 1 &pcfg_pull_up_drv_4ma>,
+							<1 5 1 &pcfg_pull_up_drv_4ma>;
+				};
+			};
+
+		};
+
+	};
+
+	fragment@1 {
+		target = <&sdio_pwrseq>;
+		__overlay__ {
+			reset-gpios = <&gpio2 RK_PD5 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+	fragment@2 {
+		target = <&wifi_enable_h>;
+		__overlay__ {
+			rockchip,pins = <2 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	fragment@3 {
+		target = <&sdio>;
+		__overlay__ {
+			pinctrl-names = "default";
+			pinctrl-0 = <&sdio_clk &sdio_cmd &sdio_bus4>;
+		};
+
+	};
+
+};
--- a/patch/kernel/rk322x-legacy/general-add-overlays.patch
+++ b/patch/kernel/rk322x-legacy/general-add-overlays.patch
@ -1,9 +1,9 @@
 diff --git a/arch/arm/boot/dts/overlay/Makefile b/arch/arm/boot/dts/overlay/Makefile
-new file mode 100644
-index 000000000..78a81340d
+new file mode 100755
+index 00000000..3bee64ab
 --- /dev/null
 +++ b/arch/arm/boot/dts/overlay/Makefile
-@@ -0,0 +1,24 @@
+@@ -0,0 +1,25 @@
 +# SPDX-License-Identifier: GPL-2.0
 +dtbo-$(CONFIG_ARCH_ROCKCHIP) += \
 +	rk322x-emmc.dtbo	\
@ -15,7 +15,8 @@ index 000000000..78a81340d
 +	rk322x-bluetooth.dtbo	\
 +	rk322x-wlan-ssv6051.dtbo \
 +	rk322x-cpu-hs-lv.dtbo   \
-+	rk322x-wlan-esp8089.dtbo
+	rk322x-wlan-esp8089.dtbo \
+	rk322x-wlan-alt-wiring.dtbo
 +
 +scr-$(CONFIG_ARCH_ROCKCHIP) += \
 +       rk322x-fixup.scr
@ -29,11 +30,11 @@ index 000000000..78a81340d
 +clean-files    := *.dtbo *.scr
 +
 diff --git a/arch/arm/boot/dts/overlay/README.rk322x-overlays b/arch/arm/boot/dts/overlay/README.rk322x-overlays
-new file mode 100644
-index 000000000..4cdaad5e3
+new file mode 100755
+index 00000000..6a7af7c4
 --- /dev/null
 +++ b/arch/arm/boot/dts/overlay/README.rk322x-overlays
-@@ -0,0 +1,73 @@
+@@ -0,0 +1,78 @@
 +This document describes overlays provided in the kernel packages
 +For generic Armbian overlays documentation please see
 +https://docs.armbian.com/User-Guide_Allwinner_overlays/
@ -52,6 +53,7 @@ index 000000000..4cdaad5e3
 +- rk322x-bluetooth
 +- rk322x-wlan-*
 +- rk322x-cpu-hs-lv
+- rk322x-wlan-alt-wiring
 +
 +### Overlay details:
 +
@ -107,9 +109,13 @@ index 000000000..4cdaad5e3
 +and logic voltages. May work on non-high leakage cpus, providing significant
 +power consumption saving and less heat production, but may reduce stability.
 +
+### rk322x-alt-wiring
+
+Some boards have different SDIO wiring setup for wifi chips. This overlay
+enables the different pin controller wiring and power enable
 diff --git a/arch/arm/boot/dts/overlay/rk322x-bluetooth.dts b/arch/arm/boot/dts/overlay/rk322x-bluetooth.dts
-new file mode 100644
-index 000000000..5698b14ba
+new file mode 100755
+index 00000000..5698b14b
 --- /dev/null
 +++ b/arch/arm/boot/dts/overlay/rk322x-bluetooth.dts
@@ -0,0 +1,39 @@
@ -153,8 +159,8 @@ index 000000000..5698b14ba
 +
 +};
 diff --git a/arch/arm/boot/dts/overlay/rk322x-cpu-hs-lv.dts b/arch/arm/boot/dts/overlay/rk322x-cpu-hs-lv.dts
-new file mode 100644
-index 000000000..4cde11782
+new file mode 100755
+index 00000000..4cde1178
 --- /dev/null
 +++ b/arch/arm/boot/dts/overlay/rk322x-cpu-hs-lv.dts
@@ -0,0 +1,113 @@
@ -272,8 +278,8 @@ index 000000000..4cde11782
 +
 +};
 diff --git a/arch/arm/boot/dts/overlay/rk322x-cpu-hs.dts b/arch/arm/boot/dts/overlay/rk322x-cpu-hs.dts
-new file mode 100644
-index 000000000..1c2fc79e1
+new file mode 100755
+index 00000000..1c2fc79e
 --- /dev/null
 +++ b/arch/arm/boot/dts/overlay/rk322x-cpu-hs.dts
@@ -0,0 +1,28 @@
@ -306,8 +312,8 @@ index 000000000..1c2fc79e1
 +
 +};
 diff --git a/arch/arm/boot/dts/overlay/rk322x-emmc-nand.dts b/arch/arm/boot/dts/overlay/rk322x-emmc-nand.dts
-new file mode 100644
-index 000000000..b451da657
+new file mode 100755
+index 00000000..b451da65
 --- /dev/null
 +++ b/arch/arm/boot/dts/overlay/rk322x-emmc-nand.dts
@@ -0,0 +1,22 @@
@ -334,8 +340,8 @@ index 000000000..b451da657
 +
 +};
 diff --git a/arch/arm/boot/dts/overlay/rk322x-emmc.dts b/arch/arm/boot/dts/overlay/rk322x-emmc.dts
-new file mode 100644
-index 000000000..f3b262ef7
+new file mode 100755
+index 00000000..f3b262ef
 --- /dev/null
 +++ b/arch/arm/boot/dts/overlay/rk322x-emmc.dts
@@ -0,0 +1,24 @@
@ -364,8 +370,8 @@ index 000000000..f3b262ef7
 +
 +};
 diff --git a/arch/arm/boot/dts/overlay/rk322x-fixup.scr-cmd b/arch/arm/boot/dts/overlay/rk322x-fixup.scr-cmd
-new file mode 100644
-index 000000000..d4c39e20a
+new file mode 100755
+index 00000000..d4c39e20
 --- /dev/null
 +++ b/arch/arm/boot/dts/overlay/rk322x-fixup.scr-cmd
@@ -0,0 +1,4 @@
@ -374,8 +380,8 @@ index 000000000..d4c39e20a
 +# using u-boot scripting, environment variables and "fdt" command
 +
 diff --git a/arch/arm/boot/dts/overlay/rk322x-led-conf1.dts b/arch/arm/boot/dts/overlay/rk322x-led-conf1.dts
-new file mode 100644
-index 000000000..f30f21a8f
+new file mode 100755
+index 00000000..f30f21a8
 --- /dev/null
 +++ b/arch/arm/boot/dts/overlay/rk322x-led-conf1.dts
@@ -0,0 +1,57 @@
@ -437,8 +443,8 @@ index 000000000..f30f21a8f
 +
 +};
 diff --git a/arch/arm/boot/dts/overlay/rk322x-led-conf2.dts b/arch/arm/boot/dts/overlay/rk322x-led-conf2.dts
-new file mode 100644
-index 000000000..153f71565
+new file mode 100755
+index 00000000..153f7156
 --- /dev/null
 +++ b/arch/arm/boot/dts/overlay/rk322x-led-conf2.dts
@@ -0,0 +1,57 @@
@ -500,8 +506,8 @@ index 000000000..153f71565
 +
 +};
 diff --git a/arch/arm/boot/dts/overlay/rk322x-nand.dts b/arch/arm/boot/dts/overlay/rk322x-nand.dts
-new file mode 100644
-index 000000000..5675f5b3d
+new file mode 100755
+index 00000000..5675f5b3
 --- /dev/null
 +++ b/arch/arm/boot/dts/overlay/rk322x-nand.dts
@@ -0,0 +1,22 @@
@ -527,9 +533,81 @@ index 000000000..5675f5b3d
 +	};
 +
 +};
-diff --git a/arch/arm/boot/dts/overlay/rk322x-wlan-esp8089.dts b/arch/arm/boot/dts/overlay/rk322x-wlan-esp8089.dts
+diff --git a/arch/arm/boot/dts/overlay/rk322x-wlan-alt-wiring.dts b/arch/arm/boot/dts/overlay/rk322x-wlan-alt-wiring.dts
 new file mode 100644
-index 000000000..76c13a6b1
+index 00000000..dadc3a9d
+--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-wlan-alt-wiring.dts
+@@ -0,0 +1,66 @@
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+
+/ {
+
+	fragment@0 {
+		target = <&pinctrl>;
+		__overlay__ {
+
+			pcfg_pull_none_drv_4ma: pcfg-pull-none-drv-4ma {
+				bias-disable;
+				drive-strength = <0x04>;
+			};
+
+			pcfg_pull_up_drv_4ma: pcfg-pull-up-drv-4ma {
+				bias-pull-up;
+				drive-strength = <0x04>;
+			};
+
+			sdio {
+				sdio_clk: sdio-clk {
+					rockchip,pins = <1 0 1 &pcfg_pull_none_drv_4ma>;
+				};
+
+				sdio_cmd: sdio-cmd {
+					rockchip,pins = <0 3 2 &pcfg_pull_up_drv_4ma>;
+				};
+
+				sdio_bus4: sdio-bus4 {
+					rockchip,pins = <1 1 1 &pcfg_pull_up_drv_4ma>,
+							<1 2 1 &pcfg_pull_up_drv_4ma>,
+							<1 4 1 &pcfg_pull_up_drv_4ma>,
+							<1 5 1 &pcfg_pull_up_drv_4ma>;
+				};
+			};
+
+		};
+
+	};
+	
+	fragment@1 {
+		target = <&sdio_pwrseq>;
+		__overlay__ {
+			reset-gpios = <&gpio2 RK_PD5 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+	fragment@2 {
+		target = <&wifi_enable_h>;
+		__overlay__ {
+			rockchip,pins = <2 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	fragment@3 {
+		target = <&sdio>;
+		__overlay__ {
+			pinctrl-names = "default";
+			pinctrl-0 = <&sdio_clk>, <&sdio_cmd>, <&sdio_bus4>;
+		};
+	};
+
+};
+diff --git a/arch/arm/boot/dts/overlay/rk322x-wlan-esp8089.dts b/arch/arm/boot/dts/overlay/rk322x-wlan-esp8089.dts
+new file mode 100755
+index 00000000..76c13a6b
 --- /dev/null
 +++ b/arch/arm/boot/dts/overlay/rk322x-wlan-esp8089.dts
@@ -0,0 +1,38 @@
@ -572,8 +650,8 @@ index 000000000..76c13a6b1
 +
 +};
 diff --git a/arch/arm/boot/dts/overlay/rk322x-wlan-ssv6051.dts b/arch/arm/boot/dts/overlay/rk322x-wlan-ssv6051.dts
-new file mode 100644
-index 000000000..47644f6e8
+new file mode 100755
+index 00000000..47644f6e
 --- /dev/null
 +++ b/arch/arm/boot/dts/overlay/rk322x-wlan-ssv6051.dts
@@ -0,0 +1,24 @@
--- a/patch/kernel/rockchip-dev/1026-arm-dtsi-rk3288-add-GPU-500-Mhz-OPP.patch
+++ b/patch/kernel/rockchip-dev/1026-arm-dtsi-rk3288-add-GPU-500-Mhz-OPP.patch
@ -0,0 +1,42 @@
+From 73258d32daf3a661281bb5c77c5e2e06c7ff714e Mon Sep 17 00:00:00 2001
+From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
+Date: Fri, 3 Jul 2020 02:02:18 +0200
+Subject: [PATCH] arm: dtsi: rk3288: add GPU 500 Mhz OPP again
+
+Undoing the very bizarre mainline kernel patch,
+75481833c6dbab4c29d15452f6b4337c16f5407b
+which main purpose is to sync some 3.14 kernels hacks to
+mainline kernels, for reasons that only matter for a few Chromebooks,
+and shove it down the throat of every RK3288 user.
+
+If you need to avoid the GPU going to 500 Mhz on Chromebooks,
+remove the OPP entry inside the DTS that actually matters to RK3288
+Chromebooks.
+
+Meanwhile, the 600 Mhz operating point can prove to be unstable on
+some RK3288 boards, while 500 Mhz works fine.
+https://forum.armbian.com/topic/13515-panfrost-on-rk3288-and-gpu-on-600mhz-problems/
+
+Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
+---
+ arch/arm/boot/dts/rk3288.dtsi | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
+index a66412547..ef7457f79 100644
+--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
+@@ -1312,6 +1312,10 @@ opp-400000000 {
+ 			opp-hz = /bits/ 64 <400000000>;
+ 			opp-microvolt = <1100000>;
+ 		};
+		opp-500000000 {
+			opp-hz = /bits/ 64 <500000000>;
+			opp-microvolt = <1200000>;
+		};
+ 		opp-600000000 {
+ 			opp-hz = /bits/ 64 <600000000>;
+ 			opp-microvolt = <1250000>;
+-- 
+2.27.0
+
--- a/patch/kernel/rockchip-dev/4005-drm-rockchip-dw_hdmi-Set-cur_ctr-to-0-always.patch
+++ b/patch/kernel/rockchip-dev/4005-drm-rockchip-dw_hdmi-Set-cur_ctr-to-0-always.patch
@ -37,7 +37,7 @@ index 7f56d8c34..7d7ee5b26 100644
 -		148500000, { 0x0000, 0x0038, 0x0038 },
 -	}, {
 +		600000000, { 0x0000, 0x0000, 0x0000 },
-+	},  {
+	}, {
 		~0UL,      { 0x0000, 0x0000, 0x0000},
 	}
 };
--- a/patch/kernel/rockchip-dev/4009-drm-rockchip-dw-hdmi-limit-tmds-to-340mhz.patch
+++ b/patch/kernel/rockchip-dev/4009-drm-rockchip-dw-hdmi-limit-tmds-to-340mhz.patch
@ -1,48 +1,50 @@
-From 13fe05c1a6a0b7b81d7c6768eef9fbc618b75f30 Mon Sep 17 00:00:00 2001
+From f83d188f49bd11d085c3f4160b208cb8194daff4 Mon Sep 17 00:00:00 2001
 From: Jonas Karlman <jonas@kwiboo.se>
-Date: Sun, 3 May 2020 17:09:41 +0000
-Subject: [PATCH 10/14] drm/rockchip: dw-hdmi: limit tmds to 340mhz
+Date: Wed, 8 Jan 2020 21:07:52 +0000
+Subject: [PATCH] drm/rockchip: dw-hdmi: limit tmds to 340mhz
+
+RK3228/RK3328 does not provide a stable hdmi signal at TMDS rates
+above 371.25MHz (340MHz pixel clock).
+
+Limit the pixel clock rate to 340MHz to provide a stable signal.
+Also limit the pixel clock to the display reported max tmds clock.
+
+This also enables use of pixel clocks up to 340MHz on RK3288/RK3399.
+And limit resolution to 3840x2160

 Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
 ---
- drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 23 ++++++++++-----------
- 1 file changed, 11 insertions(+), 12 deletions(-)
+ drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 16 ++++------------
+ 1 file changed, 4 insertions(+), 12 deletions(-)

 diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
-index 1a047f9d0..955fc3cf4 100644
+index b5d2cdaa24fa..5f7ab8e6bb72 100644
 --- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
 +++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
-@@ -219,19 +219,18 @@ static enum drm_mode_status
- dw_hdmi_rockchip_mode_valid(struct drm_connector *connector,
+@@ -221,19 +221,11 @@ dw_hdmi_rockchip_mode_valid(struct dw_hdmi *hdmi, void *data,
+ 			    const struct drm_display_info *info,
 			    const struct drm_display_mode *mode)
 {
 -	const struct dw_hdmi_mpll_config *mpll_cfg = rockchip_mpll_cfg;
 -	int pclk = mode->clock * 1000;
 -	bool valid = false;
 -	int i;
-
+	if (mode->clock > 340000 ||
+	    (info->max_tmds_clock && mode->clock > info->max_tmds_clock))
+		return MODE_CLOCK_HIGH;
+ 
 -	for (i = 0; mpll_cfg[i].mpixelclock != (~0UL); i++) {
 -		if (pclk == mpll_cfg[i].mpixelclock) {
 -			valid = true;
 -			break;
 -		}
 -	}
-+	struct drm_display_info *info = &connector->display_info;
-+	int max_tmds_clock = max(info->max_tmds_clock, 165000);
-+	int clock = mode->clock;
-+
-+	if (connector->ycbcr_420_allowed && drm_mode_is_420(info, mode) &&
-+	    (info->color_formats & DRM_COLOR_FORMAT_YCRCB420))
-+		clock /= 2;
-+
-+	if (clock > max_tmds_clock || clock > 340000)
-+		return MODE_CLOCK_HIGH;
- 
+-
 -	return (valid) ? MODE_OK : MODE_BAD;
-+	return MODE_OK;
+	return drm_mode_validate_size(mode, 3840, 2160);
 }
 
- static const struct drm_encoder_funcs dw_hdmi_rockchip_encoder_funcs = {
+ static void dw_hdmi_rockchip_encoder_disable(struct drm_encoder *encoder)
 -- 
 2.26.2

--- a/patch/kernel/rockchip-dev/4014-Use-340000-as-fallback-max_tmds_clock.patch
+++ b/patch/kernel/rockchip-dev/4014-Use-340000-as-fallback-max_tmds_clock.patch
@ -1,40 +0,0 @@
-From 5b99ce41a35e7ddd0d4681990613ec9195a5acc0 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?=C5=81ukasz?= <lukasz@czak.pl>
-Date: Thu, 7 May 2020 11:54:26 +0200
-Subject: [PATCH 2/3] Use 340000 as fallback max_tmds_clock
-
-If connector->display_info->max_tmds_clock is 0, fall back to 340000.
-
-If it is > 0 though, shouldn't it take priority, and instead of max be
-`min(info->max_tmds_clock, 165000)`?
---
- drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 7 +++++--
- 1 file changed, 5 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
-index 955fc3cf4..f95cdc53a 100644
--- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
-+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
-@@ -220,14 +220,17 @@ dw_hdmi_rockchip_mode_valid(struct drm_connector *connector,
- 			    const struct drm_display_mode *mode)
- {
- 	struct drm_display_info *info = &connector->display_info;
-	int max_tmds_clock = max(info->max_tmds_clock, 165000);
-+	int max_tmds_clock = info->max_tmds_clock > 0 ?
-+				     max(info->max_tmds_clock, 165000) :
-+				     340000;
-+
- 	int clock = mode->clock;
- 
- 	if (connector->ycbcr_420_allowed && drm_mode_is_420(info, mode) &&
- 	    (info->color_formats & DRM_COLOR_FORMAT_YCRCB420))
- 		clock /= 2;
- 
-	if (clock > max_tmds_clock || clock > 340000)
-+	if (clock > max_tmds_clock)
- 		return MODE_CLOCK_HIGH;
- 
- 	return MODE_OK;
-- 
-2.26.2
-
--- a/patch/kernel/rockchip-dev/general-add-overlay-compilation-support.patch
+++ b/patch/kernel/rockchip-dev/general-add-overlay-compilation-support.patch
@ -0,0 +1,83 @@
+diff --git a/arch/arm/boot/.gitignore b/arch/arm/boot/.gitignore
+index 3c79f859..4e5c1d59 100644
+--- a/arch/arm/boot/.gitignore
+++ b/arch/arm/boot/.gitignore
+@@ -3,3 +3,5 @@ zImage
+ xipImage
+ bootpImage
+ uImage
+*.dtb*
+*.scr
+diff --git a/scripts/Makefile.dtbinst b/scripts/Makefile.dtbinst
+index 50d580d77..94bd15617 100644
+--- a/scripts/Makefile.dtbinst
+++ b/scripts/Makefile.dtbinst
+@@ -18,9 +18,12 @@ include scripts/Kbuild.include
+ include $(src)/Makefile
+ 
+ dtbs    := $(addprefix $(dst)/, $(dtb-y) $(if $(CONFIG_OF_ALL_DTBS),$(dtb-)))
+dtbos   := $(addprefix $(dst)/, $(dtbo-y))
+scrs    := $(addprefix $(dst)/, $(scr-y))
+readmes := $(addprefix $(dst)/, $(dtbotxt-y))
+ subdirs := $(addprefix $(obj)/, $(subdir-y) $(subdir-m))
+ 
+-__dtbs_install: $(dtbs) $(subdirs)
+__dtbs_install: $(dtbs) $(dtbos) $(scrs) $(readmes) $(subdirs)
+ 	@:
+ 
+ quiet_cmd_dtb_install = INSTALL $@
+@@ -29,6 +32,15 @@ quiet_cmd_dtb_install = INSTALL $@
+ $(dst)/%.dtb: $(obj)/%.dtb
+ 	$(call cmd,dtb_install)
+ 
+$(dst)/%.dtbo: $(obj)/%.dtbo
+	$(call cmd,dtb_install)
+
+$(dst)/%.scr: $(obj)/%.scr
+	$(call cmd,dtb_install)
+
+$(dst)/README.rockchip-overlays: $(src)/README.rockchip-overlays
+	$(call cmd,dtb_install)
+
+ PHONY += $(subdirs)
+ $(subdirs):
+ 	$(Q)$(MAKE) $(dtbinst)=$@ dst=$(patsubst $(obj)/%,$(dst)/%,$@)
+diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
+index 58c05e5d..2b95dda9 100644
+--- a/scripts/Makefile.lib
+++ b/scripts/Makefile.lib
+@@ -278,6 +278,9 @@ cmd_gzip = (cat $(filter-out FORCE,$^) | gzip -n -f -9 > $@) || \
+ # ---------------------------------------------------------------------------
+ DTC ?= $(objtree)/scripts/dtc/dtc
+
+# Overlay support
+DTC_FLAGS += -@ -Wno-unit_address_format -Wno-simple_bus_reg
+
+ # Disable noisy checks by default
+ ifeq ($(KBUILD_ENABLE_EXTRA_GCC_CHECKS),)
+ DTC_FLAGS += -Wno-unit_address_vs_reg \
+@@ -324,6 +327,23 @@ cmd_dtc = mkdir -p $(dir ${dtc-tmp}) ; \
+ $(obj)/%.dtb: $(src)/%.dts FORCE
+ 	$(call if_changed_dep,dtc)
+
+quiet_cmd_dtco = DTCO    $@
+cmd_dtco = mkdir -p $(dir ${dtc-tmp}) ; \
+	$(CPP) $(dtc_cpp_flags) -x assembler-with-cpp -o $(dtc-tmp) $< ; \
+	$(DTC) -O dtb -o $@ -b 0 \
+		-i $(dir $<) $(DTC_FLAGS) \
+		-d $(depfile).dtc.tmp $(dtc-tmp) ; \
+	cat $(depfile).pre.tmp $(depfile).dtc.tmp > $(depfile)
+
+$(obj)/%.dtbo: $(src)/%.dts FORCE
+	$(call if_changed_dep,dtco)
+
+quiet_cmd_scr = MKIMAGE $@
+cmd_scr = mkimage -C none -A $(ARCH) -T script -d $< $@
+
+$(obj)/%.scr: $(src)/%.scr-cmd FORCE
+	$(call if_changed,scr)
+
+ dtc-tmp = $(subst $(comma),_,$(dot-target).dts.tmp)
+
+ # Bzip2
+
--- a/patch/kernel/sunxi-dev/patch-5.10.2-3.patch
+++ b/patch/kernel/sunxi-dev/patch-5.10.2-3.patch