Update Odroid XU4 DEV config and add more patches from Hardkernel repo

Boot test succesful.
This commit is contained in:
Igor Pecovnik 2020-08-05 18:34:01 +02:00
parent d567344278
commit b4e23b5b6a
18 changed files with 1945 additions and 1 deletions

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@ -1,6 +1,6 @@
#
# Automatically generated file; DO NOT EDIT.
# Linux/arm 5.7.12 Kernel Configuration
# Linux/arm 5.7.13 Kernel Configuration
#
#
@ -2722,6 +2722,7 @@ CONFIG_TCG_TIS_I2C_INFINEON=y
# CONFIG_TCG_TIS_ST33ZP24_I2C is not set
# CONFIG_TCG_TIS_ST33ZP24_SPI is not set
# CONFIG_XILLYBUS is not set
CONFIG_EXYNOS_GPIOMEM=m
# end of Character devices
# CONFIG_RANDOM_TRUST_BOOTLOADER is not set
@ -5413,6 +5414,7 @@ CONFIG_EXTCON_MAX8997=y
# CONFIG_EXTCON_USB_GPIO is not set
# CONFIG_EXTCON_USBC_CROS_EC is not set
CONFIG_MEMORY=y
CONFIG_DDR=y
# CONFIG_ARM_PL172_MPMC is not set
CONFIG_PL353_SMC=y
CONFIG_SAMSUNG_MC=y

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@ -0,0 +1,96 @@
From 67e2aaf62f442d689c08a7853e3232e33d47f4fa Mon Sep 17 00:00:00 2001
From: Brian Kim <brian.kim@hardkernel.com>
Date: Thu, 5 Jan 2017 19:05:44 +0900
Subject: [PATCH 35/74] ODROID-XU4: drm/exynos/hdmi: add 'HPD' and 'vout' as
boot parameters
Change-Id: Ia3c94b0ee99e761a774ac63398ca86477b703b8c
Signed-off-by: Brian Kim <brian.kim@hardkernel.com>
Signed-off-by: memeka <mihailescu2m@gmail.com>
Signed-off-by: Dongjin Kim <tobetter@gmail.com>
Signed-off-by: memeka <mihailescu2m@gmail.com>
---
drivers/gpu/drm/exynos/exynos_hdmi.c | 39 +++++++++++++++++++++++++++-
1 file changed, 38 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c b/drivers/gpu/drm/exynos/exynos_hdmi.c
index 95dd399aa9cc..a7688ade485a 100644
--- a/drivers/gpu/drm/exynos/exynos_hdmi.c
+++ b/drivers/gpu/drm/exynos/exynos_hdmi.c
@@ -145,6 +145,33 @@ struct hdmi_context {
bool powered;
};
+static bool gdvi_mode = false;
+static bool gEnableHPD = true;
+
+static int __init dvi_force_enable(char *str)
+{
+ if (!strcmp(str, "dvi")) {
+ gdvi_mode = true;
+ pr_info("hdmi: using DVI mode\n");
+ } else {
+ gdvi_mode = false;
+ pr_info("hdmi: using HDMI mode\n");
+ }
+
+ return 0;
+}
+__setup("vout=", dvi_force_enable);
+
+static int __init hdmi_hpd_enable(char *str)
+{
+ if (!strcmp(str, "false")) {
+ gEnableHPD = false;
+ }
+
+ return 0;
+}
+__setup("HPD=", hdmi_hpd_enable);
+
static inline struct hdmi_context *encoder_to_hdmi(struct drm_encoder *e)
{
return container_of(e, struct hdmi_context, encoder);
@@ -845,6 +872,9 @@ static enum drm_connector_status hdmi_detect(struct drm_connector *connector,
{
struct hdmi_context *hdata = connector_to_hdmi(connector);
+ if (!gEnableHPD)
+ return connector_status_connected;
+
if (gpiod_get_value(hdata->hpd_gpio))
return connector_status_connected;
@@ -884,7 +914,10 @@ static int hdmi_get_modes(struct drm_connector *connector)
if (!edid)
return -ENODEV;
- hdata->dvi_mode = !drm_detect_hdmi_monitor(edid);
+ if (gdvi_mode)
+ hdata->dvi_mode = true;
+ else
+ hdata->dvi_mode = !drm_detect_hdmi_monitor(edid);
DRM_DEV_DEBUG_KMS(hdata->dev, "%s : width[%d] x height[%d]\n",
(hdata->dvi_mode ? "dvi monitor" : "hdmi monitor"),
edid->width_cm, edid->height_cm);
@@ -1580,6 +1613,9 @@ static int hdmi_audio_hw_params(struct device *dev, void *data,
{
struct hdmi_context *hdata = dev_get_drvdata(dev);
+ if (hdata->dvi_mode)
+ return 0;
+
if (daifmt->fmt != HDMI_I2S || daifmt->bit_clk_inv ||
daifmt->frame_clk_inv || daifmt->bit_clk_master ||
daifmt->frame_clk_master) {
@@ -1957,6 +1993,7 @@ static int hdmi_probe(struct platform_device *pdev)
platform_set_drvdata(pdev, hdata);
hdata->dev = dev;
+ hdata->dvi_mode = gdvi_mode;
mutex_init(&hdata->mutex);
--
2.25.1

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@ -0,0 +1,36 @@
From ce1b7b7a8a9445c4c3eb326656a83abb61f0dff9 Mon Sep 17 00:00:00 2001
From: Sylwester Nawrocki <s.nawrocki@samsung.com>
Date: Tue, 10 Sep 2019 14:36:18 +0200
Subject: [PATCH 49/74] ODROID-XU4: ARM: dts: Add samsung,asv-bin property for
odroidxu3-lite
The Exynos5422 SoC used on Odroid XU3 Lite boards belongs to
a special ASV bin but this information cannot be read from the
CHIPID block registers. Add samsung,asv-bin property for XU3
Lite to ensure the ASV bin is properly determined.
Change-Id: I6e977b9cf0829be7ffff5aa84d7ee6b3e65b49cd
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: memeka <mihailescu2m@gmail.com>
---
arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts b/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts
index 98feecad5489..140d81374bfa 100644
--- a/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts
+++ b/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts
@@ -88,6 +88,10 @@ &cpu3_cooling_map4 {
<&cpu7 3 12>;
};
+&chipid {
+ samsung,asv-bin = <2>;
+};
+
&pwm {
/*
* PWM 0 -- fan
--
2.25.1

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@ -0,0 +1,35 @@
From 53adad99d7de354d90ac115104078ed05c62e792 Mon Sep 17 00:00:00 2001
From: Yang Deokgyu <secugyu@gmail.com>
Date: Thu, 7 Nov 2019 10:58:33 +0900
Subject: [PATCH 56/74] ODROID-XU4: dts: Add i2c-1, i2c-5 nodes
Signed-off-by: Yang Deokgyu <secugyu@gmail.com>
Change-Id: Ibd89677ca9dcc165b305488b9c1e106f4e53eba6
---
arch/arm/boot/dts/exynos5422-odroidxu4.dts | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5422-odroidxu4.dts b/arch/arm/boot/dts/exynos5422-odroidxu4.dts
index 892d389d6d09..220a84465eca 100644
--- a/arch/arm/boot/dts/exynos5422-odroidxu4.dts
+++ b/arch/arm/boot/dts/exynos5422-odroidxu4.dts
@@ -96,3 +96,16 @@ &pwm {
&usbdrd_dwc3_1 {
dr_mode = "host";
};
+
+/* i2c@12C70000 */
+&i2c_1 {
+ status = "okay";
+ samsung,i2c-max-bus-freq = <400000>;
+};
+
+/* i2c@12cb0000 */
+&hsi2c_5 {
+ status = "okay";
+ samsung,hs-mode;
+ clock-frequency = <400000>;
+};
--
2.25.1

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@ -0,0 +1,63 @@
From 2589aa252fa84b554366b8caee1c53c74245681a Mon Sep 17 00:00:00 2001
From: Yang Deokgyu <secugyu@gmail.com>
Date: Thu, 14 Nov 2019 13:45:22 +0900
Subject: [PATCH 57/74] ODROID-XU4: Add support for SPI1 on the 40 pin header
Signed-off-by: Yang Deokgyu <secugyu@gmail.com>
Change-Id: I0b1d16b0f445838509eeb0cc8093239fa1805605
---
arch/arm/boot/dts/exynos5422-odroidxu4.dts | 20 ++++++++++++++++++++
drivers/spi/spidev.c | 2 ++
2 files changed, 22 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5422-odroidxu4.dts b/arch/arm/boot/dts/exynos5422-odroidxu4.dts
index 220a84465eca..a2b9a892c7df 100644
--- a/arch/arm/boot/dts/exynos5422-odroidxu4.dts
+++ b/arch/arm/boot/dts/exynos5422-odroidxu4.dts
@@ -11,6 +11,7 @@
/dts-v1/;
#include <dt-bindings/sound/samsung-i2s.h>
#include "exynos5422-odroidxu3-common.dtsi"
+#include <dt-bindings/gpio/gpio.h>
/ {
model = "Hardkernel Odroid XU4";
@@ -109,3 +110,22 @@ &hsi2c_5 {
samsung,hs-mode;
clock-frequency = <400000>;
};
+
+&spi_1 {
+ status = "okay";
+ samsung,spi-src-clk = <0>;
+ num-cs = <2>;
+ cs-gpios = <&gpa2 5 GPIO_ACTIVE_HIGH>, <&gpx2 1 GPIO_ACTIVE_HIGH>;
+
+ spidev: spidev@0 {
+ status = "okay";
+ reg = <0>;
+ compatible = "odroid,spidev";
+ spi-max-frequency = <1000000>;
+
+ controller-data {
+ cs-gpio = <&gpa2 5 GPIO_ACTIVE_HIGH>;
+ samsung,spi-feedback-delay = <0>;
+ };
+ };
+};
diff --git a/drivers/spi/spidev.c b/drivers/spi/spidev.c
index 59e07675ef86..05ffdb14d959 100644
--- a/drivers/spi/spidev.c
+++ b/drivers/spi/spidev.c
@@ -677,6 +677,8 @@ static const struct of_device_id spidev_dt_ids[] = {
{ .compatible = "lwn,bk4" },
{ .compatible = "dh,dhcom-board" },
{ .compatible = "menlo,m53cpld" },
+ /* ODROID Modification */
+ { .compatible = "odroid,spidev" },
{},
};
MODULE_DEVICE_TABLE(of, spidev_dt_ids);
--
2.25.1

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@ -0,0 +1,343 @@
From 142f4b164d0911c7484eec5ab9080a438adc13f6 Mon Sep 17 00:00:00 2001
From: Brian Kim <brian.kim@hardkernel.com>
Date: Tue, 10 Jan 2017 11:31:52 +0900
Subject: [PATCH 58/74] ODROID-XU4: char: exynos: add /dev/gpiomem device for
rootless user GPIO access
Signed-off-by: memeka <mihailescu2m@gmail.com>
Signed-off-by: Yang Deokgyu <secugyu@gmail.com>
Change-Id: Ia6b9596501223037ee3be3587d720f74a2494380
---
.../boot/dts/exynos5422-odroidxu3-common.dtsi | 7 +
drivers/char/Kconfig | 9 +
drivers/char/Makefile | 1 +
drivers/char/exynos-gpiomem.c | 270 ++++++++++++++++++
4 files changed, 287 insertions(+)
create mode 100644 drivers/char/exynos-gpiomem.c
diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
index 5da2d81e3be2..ad8c85d1b7ae 100644
--- a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
+++ b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
@@ -34,6 +34,13 @@ power_key {
};
};
+ gpiomem {
+ compatible = "samsung,exynos-gpiomem";
+ reg = <0x13400000 0x1000>,
+ <0x14010000 0x1000>;
+ status = "okay";
+ };
+
emmc_pwrseq: pwrseq {
pinctrl-0 = <&emmc_nrst_pin>;
pinctrl-names = "default";
diff --git a/drivers/char/Kconfig b/drivers/char/Kconfig
index 98c3a5d8003e..f9a7cc524543 100644
--- a/drivers/char/Kconfig
+++ b/drivers/char/Kconfig
@@ -470,6 +470,15 @@ config ADI
and SSM (Silicon Secured Memory). Intended consumers of this
driver include crash and makedumpfile.
+config EXYNOS_GPIOMEM
+ tristate "/dev/gpiomem rootless GPIO access via mmap() on the EXYNOS"
+ default m
+ help
+ Provides users with root-free access to the GPIO registers
+ on EXYNOS. Calling mmap(/dev/gpiomem) will map the GPIO register
+ page to the user's pointer. This drvier can allow to access gpio
+ memory area in user account.
+
endmenu
config RANDOM_TRUST_CPU
diff --git a/drivers/char/Makefile b/drivers/char/Makefile
index ffce287ef415..923df22cf799 100644
--- a/drivers/char/Makefile
+++ b/drivers/char/Makefile
@@ -47,3 +47,4 @@ obj-$(CONFIG_PS3_FLASH) += ps3flash.o
obj-$(CONFIG_XILLYBUS) += xillybus/
obj-$(CONFIG_POWERNV_OP_PANEL) += powernv-op-panel.o
obj-$(CONFIG_ADI) += adi.o
+obj-$(CONFIG_EXYNOS_GPIOMEM) += exynos-gpiomem.o
diff --git a/drivers/char/exynos-gpiomem.c b/drivers/char/exynos-gpiomem.c
new file mode 100644
index 000000000000..5dd684d48ffc
--- /dev/null
+++ b/drivers/char/exynos-gpiomem.c
@@ -0,0 +1,270 @@
+/*
+ * linux/drivers/char/exynos-gpiomem.c
+ *
+ * GPIO memory device driver
+ *
+ * Creates a chardev /dev/gpiomem which will provide user access to
+ * the EXYNOS's GPIO registers when it is mmap()'d.
+ * No longer need root for user GPIO access, but without relaxing permissions
+ * on /dev/mem.
+ *
+ * Copyright (c) 2017 Hardkernel Co., Ltd.
+ *
+ * This driver is based on bcm2835-gpiomem.c in Raspberrypi's linux kernel 4.4:
+ * Written by Luke Wren <luke@raspberrypi.org>
+ * Copyright (c) 2015, Raspberry Pi (Trading) Ltd.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions, and the following disclaimer,
+ * without modification.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. The names of the above-listed copyright holders may not be used
+ * to endorse or promote products derived from this software without
+ * specific prior written permission.
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") version 2, as published by the Free
+ * Software Foundation.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
+ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/mm.h>
+#include <linux/slab.h>
+#include <linux/cdev.h>
+#include <linux/pagemap.h>
+#include <linux/io.h>
+#include <linux/of.h>
+#include <asm/io.h>
+
+#define DEVICE_NAME "exynos-gpiomem"
+#define DRIVER_NAME "gpiomem-exynos"
+#define DEVICE_MINOR 0
+
+struct exynos_gpiomem_instance {
+ unsigned long gpio_regs_phys[32];
+ int gpio_area_count;
+ struct device *dev;
+};
+
+static struct cdev exynos_gpiomem_cdev;
+static dev_t exynos_gpiomem_devid;
+static struct class *exynos_gpiomem_class;
+static struct device *exynos_gpiomem_dev;
+static struct exynos_gpiomem_instance *inst;
+
+static int exynos_gpiomem_open(struct inode *inode, struct file *file)
+{
+ int dev = iminor(inode);
+ int ret = 0;
+
+ dev_info(inst->dev, "gpiomem device opened.");
+
+ if (dev != DEVICE_MINOR) {
+ dev_err(inst->dev, "Unknown minor device: %d", dev);
+ ret = -ENXIO;
+ }
+ return ret;
+}
+
+static int exynos_gpiomem_release(struct inode *inode, struct file *file)
+{
+ int dev = iminor(inode);
+ int ret = 0;
+
+ if (dev != DEVICE_MINOR) {
+ dev_err(inst->dev, "Unknown minor device %d", dev);
+ ret = -ENXIO;
+ }
+ return ret;
+}
+
+static const struct vm_operations_struct exynos_gpiomem_vm_ops = {
+#ifdef CONFIG_HAVE_IOREMAP_PROT
+ .access = generic_access_phys
+#endif
+};
+
+static int exynos_gpiomem_mmap(struct file *file, struct vm_area_struct *vma)
+{
+ int gpio_area = 0;
+
+ while (gpio_area < inst->gpio_area_count) {
+ if ((inst->gpio_regs_phys[gpio_area] >> PAGE_SHIFT) == vma->vm_pgoff)
+ goto found;
+
+ gpio_area++;
+ }
+
+ return -EACCES;
+
+found:
+ vma->vm_page_prot = phys_mem_access_prot(file, vma->vm_pgoff,
+ PAGE_SIZE,
+ vma->vm_page_prot);
+
+ vma->vm_ops = &exynos_gpiomem_vm_ops;
+
+ if (remap_pfn_range(vma, vma->vm_start,
+ vma->vm_pgoff,
+ PAGE_SIZE,
+ vma->vm_page_prot)) {
+ return -EAGAIN;
+ }
+
+ return 0;
+}
+
+static const struct file_operations
+exynos_gpiomem_fops = {
+ .owner = THIS_MODULE,
+ .open = exynos_gpiomem_open,
+ .release = exynos_gpiomem_release,
+ .mmap = exynos_gpiomem_mmap,
+};
+
+static int exynos_gpiomem_probe(struct platform_device *pdev)
+{
+ int err = 0;
+ struct device *dev = &pdev->dev;
+ struct device_node *np = dev->of_node;
+ struct resource *res = NULL;
+ int i = 0;
+
+ /* Allocate buffers and instance data */
+ inst = kzalloc(sizeof(struct exynos_gpiomem_instance), GFP_KERNEL);
+
+ if (!inst) {
+ err = -ENOMEM;
+ goto failed_inst_alloc;
+ }
+
+ inst->dev = dev;
+
+ inst->gpio_area_count = of_property_count_elems_of_size(np, "reg",
+ sizeof(u32)) / 2;
+
+ if (inst->gpio_area_count > 32 || inst->gpio_area_count <= 0) {
+ dev_err(inst->dev, "failed to get gpio register area.");
+ err = -EINVAL;
+ goto failed_inst_alloc;
+ }
+
+ dev_info(inst->dev, "Initialised: GPIO register area is %d",
+ inst->gpio_area_count);
+
+ for (i = 0; i < inst->gpio_area_count; ++i) {
+ res = platform_get_resource(pdev, IORESOURCE_MEM, i);
+ if (res) {
+ inst->gpio_regs_phys[i] = res->start;
+ } else {
+ dev_err(inst->dev, "failed to get IO resource");
+ err = -ENOENT;
+ goto failed_get_resource;
+ }
+ }
+
+ /* Create character device entries */
+ err = alloc_chrdev_region(&exynos_gpiomem_devid,
+ DEVICE_MINOR, 1, DEVICE_NAME);
+ if (err != 0) {
+ dev_err(inst->dev, "unable to allocate device number");
+ goto failed_alloc_chrdev;
+ }
+ cdev_init(&exynos_gpiomem_cdev, &exynos_gpiomem_fops);
+ exynos_gpiomem_cdev.owner = THIS_MODULE;
+ err = cdev_add(&exynos_gpiomem_cdev, exynos_gpiomem_devid, 1);
+ if (err != 0) {
+ dev_err(inst->dev, "unable to register device");
+ goto failed_cdev_add;
+ }
+
+ /* Create sysfs entries */
+ exynos_gpiomem_class = class_create(THIS_MODULE, DEVICE_NAME);
+ err = IS_ERR(exynos_gpiomem_class);
+ if (err)
+ goto failed_class_create;
+
+ exynos_gpiomem_dev = device_create(exynos_gpiomem_class, NULL,
+ exynos_gpiomem_devid, NULL,
+ "gpiomem");
+ err = IS_ERR(exynos_gpiomem_dev);
+ if (err)
+ goto failed_device_create;
+
+ for (i = 0; i < inst->gpio_area_count; ++i) {
+ dev_info(inst->dev, "Initialised: Registers at 0x%08lx",
+ inst->gpio_regs_phys[i]);
+ }
+
+ return 0;
+
+failed_device_create:
+ class_destroy(exynos_gpiomem_class);
+failed_class_create:
+ cdev_del(&exynos_gpiomem_cdev);
+failed_cdev_add:
+ unregister_chrdev_region(exynos_gpiomem_devid, 1);
+failed_alloc_chrdev:
+failed_get_resource:
+ kfree(inst);
+failed_inst_alloc:
+ dev_err(inst->dev, "could not load exynos_gpiomem");
+ return err;
+}
+
+static int exynos_gpiomem_remove(struct platform_device *pdev)
+{
+ struct device *dev = inst->dev;
+
+ kfree(inst);
+ device_destroy(exynos_gpiomem_class, exynos_gpiomem_devid);
+ class_destroy(exynos_gpiomem_class);
+ cdev_del(&exynos_gpiomem_cdev);
+ unregister_chrdev_region(exynos_gpiomem_devid, 1);
+
+ dev_info(dev, "GPIO mem driver removed - OK");
+ return 0;
+}
+
+static const struct of_device_id exynos_gpiomem_of_match[] = {
+ {.compatible = "samsung,exynos-gpiomem",},
+ { },
+};
+MODULE_DEVICE_TABLE(of, exynos_gpiomem_of_match);
+
+static struct platform_driver exynos_gpiomem_driver = {
+ .driver = {
+ .name = DRIVER_NAME,
+ .owner = THIS_MODULE,
+ .of_match_table = exynos_gpiomem_of_match,
+ },
+ .probe = exynos_gpiomem_probe,
+ .remove = exynos_gpiomem_remove,
+};
+
+module_platform_driver(exynos_gpiomem_driver);
+
+MODULE_ALIAS("platform:gpiomem-exynos");
+MODULE_DESCRIPTION("EXYNOS gpiomem driver for accessing GPIO from userspace");
+MODULE_AUTHOR("Brian Kim <brian.kim@hardkernel.com>");
+MODULE_LICENSE("GPL");
--
2.25.1

View file

@ -0,0 +1,51 @@
From e9b41b4e5bccc576e2be993c47cd9500337b7653 Mon Sep 17 00:00:00 2001
From: Dongjin Kim <tobetter@gmail.com>
Date: Thu, 9 Nov 2017 22:09:37 -0500
Subject: [PATCH 61/74] ODROID-XU4: ARM: exynos: add machine description for
ODROID-XU3/4
Change-Id: Ice75e06366f107f761504512a84fb92affffb124
Signed-off-by: Dongjin Kim <tobetter@gmail.com>
---
arch/arm/mach-exynos/exynos.c | 28 ++++++++++++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
index 7a8d1555db40..c79e7f0e5b53 100644
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -204,3 +204,31 @@ DT_MACHINE_START(EXYNOS_DT, "Samsung Exynos (Flattened Device Tree)")
.dt_compat = exynos_dt_compat,
.dt_fixup = exynos_dt_fixup,
MACHINE_END
+
+#define ODROID_MACHINE_START(name, compat) \
+ DT_MACHINE_START(EXYNOS5422_ODROID_##name, "ODROID-"#name) \
+ .l2c_aux_val = 0x3c400001, \
+ .l2c_aux_mask = 0xc20fffff, \
+ .smp = smp_ops(exynos_smp_ops), \
+ .map_io = exynos_init_io, \
+ .init_early = exynos_firmware_init, \
+ .init_irq = exynos_init_irq, \
+ .init_machine = exynos_dt_machine_init, \
+ .init_late = exynos_init_late, \
+ .dt_compat = compat, \
+ .dt_fixup = exynos_dt_fixup, \
+ MACHINE_END
+
+static char const *const exynos5422_odroidxu3_dt_compat[] __initconst = {
+ "hardkernel,odroid-xu3",
+ "hardkernel,odroid-xu3-lite",
+ NULL,
+};
+
+static char const *const exynos5422_odroidxu4_dt_compat[] __initconst = {
+ "hardkernel,odroid-xu4",
+ NULL,
+};
+
+ODROID_MACHINE_START(XU3, exynos5422_odroidxu3_dt_compat)
+ODROID_MACHINE_START(XU4, exynos5422_odroidxu4_dt_compat)
--
2.25.1

View file

@ -0,0 +1,27 @@
From 8af58504ae1199d205df1b9245ff7d752cb4208c Mon Sep 17 00:00:00 2001
From: Yang Deokgyu <secugyu@gmail.com>
Date: Thu, 5 Dec 2019 10:09:00 +0900
Subject: [PATCH 62/74] ODROID-XU4: arm/exynos: No need to use enynos_init_late
Signed-off-by: Yang Deokgyu <secugyu@gmail.com>
Change-Id: I7d141a655c23bf364753be9831b4428ee3aa6711
---
arch/arm/mach-exynos/exynos.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
index c79e7f0e5b53..1b6564b5ed15 100644
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -214,7 +214,7 @@ MACHINE_END
.init_early = exynos_firmware_init, \
.init_irq = exynos_init_irq, \
.init_machine = exynos_dt_machine_init, \
- .init_late = exynos_init_late, \
+ .init_late = exynos_pm_init, \
.dt_compat = compat, \
.dt_fixup = exynos_dt_fixup, \
MACHINE_END
--
2.25.1

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@ -0,0 +1,30 @@
From 193fe398d702cf892e9efbace2e19790aa7ce86e Mon Sep 17 00:00:00 2001
From: Yang Deokgyu <secugyu@gmail.com>
Date: Thu, 5 Dec 2019 10:13:54 +0900
Subject: [PATCH 63/74] ODROID-XU4: arm/exynos: Add vendor name Hardkernel to
its H/W information
Because the other devices we provided have vendor name in /proc/cpuinfo.
Signed-off-by: Yang Deokgyu <secugyu@gmail.com>
Change-Id: I81a553ea8f662016b702cbb5e543ba7a769e8d0f
---
arch/arm/mach-exynos/exynos.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
index 1b6564b5ed15..4100b3ea0536 100644
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -206,7 +206,7 @@ DT_MACHINE_START(EXYNOS_DT, "Samsung Exynos (Flattened Device Tree)")
MACHINE_END
#define ODROID_MACHINE_START(name, compat) \
- DT_MACHINE_START(EXYNOS5422_ODROID_##name, "ODROID-"#name) \
+ DT_MACHINE_START(EXYNOS5422_ODROID_##name, "Hardkernel ODROID-"#name) \
.l2c_aux_val = 0x3c400001, \
.l2c_aux_mask = 0xc20fffff, \
.smp = smp_ops(exynos_smp_ops), \
--
2.25.1

View file

@ -0,0 +1,28 @@
From a47b5b54f6643c36c76da469dab694325da878d7 Mon Sep 17 00:00:00 2001
From: Yang Deokgyu <secugyu@gmail.com>
Date: Tue, 22 Oct 2019 15:17:19 +0900
Subject: [PATCH 64/74] ODROID-XU4: char/exynos-gpiomem: Remove unnecessary
kernel logs noticed when every time it opens
Change-Id: If35e49c6d96b960f0ff1a997b2126c2c6378fdad
Signed-off-by: Yang Deokgyu <secugyu@gmail.com>
---
drivers/char/exynos-gpiomem.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/char/exynos-gpiomem.c b/drivers/char/exynos-gpiomem.c
index 5dd684d48ffc..03ea4344346a 100644
--- a/drivers/char/exynos-gpiomem.c
+++ b/drivers/char/exynos-gpiomem.c
@@ -77,8 +77,6 @@ static int exynos_gpiomem_open(struct inode *inode, struct file *file)
int dev = iminor(inode);
int ret = 0;
- dev_info(inst->dev, "gpiomem device opened.");
-
if (dev != DEVICE_MINOR) {
dev_err(inst->dev, "Unknown minor device: %d", dev);
ret = -ENXIO;
--
2.25.1

View file

@ -0,0 +1,350 @@
From 0999489c314cd8bef7ecd4f56a98350be9b0d7b4 Mon Sep 17 00:00:00 2001
From: Yang Deokgyu <secugyu@gmail.com>
Date: Mon, 18 Nov 2019 12:10:34 +0900
Subject: [PATCH 65/74] ODROID-XU4: drivers/fbtft: Add fb_hktft35 module for
Hardkernel 3.5 inch TFT LCD
No longer use flexfb, fbtft_device that is deprecated since kernel 5.4.
Signed-off-by: Yang Deokgyu <secugyu@gmail.com>
Change-Id: Iae252c64b91b2eabe97eb3aace12d7c4b98801c5
---
drivers/staging/fbtft/Kconfig | 7 +
drivers/staging/fbtft/Makefile | 1 +
drivers/staging/fbtft/fb_hktft35.c | 300 +++++++++++++++++++++++++++++
3 files changed, 308 insertions(+)
create mode 100644 drivers/staging/fbtft/fb_hktft35.c
diff --git a/drivers/staging/fbtft/Kconfig b/drivers/staging/fbtft/Kconfig
index dad1ddcd7b0c..b6cd416ebb26 100644
--- a/drivers/staging/fbtft/Kconfig
+++ b/drivers/staging/fbtft/Kconfig
@@ -206,3 +206,10 @@ config FB_TFT_WATTEROTT
depends on FB_TFT
help
Generic Framebuffer support for WATTEROTT
+
+config FB_TFT_HKTFT35
+ tristate "FB driver for the Hardkernel 3.5 inch TFT LCD"
+ depends on FB_TFT
+ help
+ Generic Framebuffer support for the Hardkernel 3.5 inch TFT LCD
+ that uses the ILI9488 LCD Controller
diff --git a/drivers/staging/fbtft/Makefile b/drivers/staging/fbtft/Makefile
index e87193f7df14..3d41175663ed 100644
--- a/drivers/staging/fbtft/Makefile
+++ b/drivers/staging/fbtft/Makefile
@@ -37,3 +37,4 @@ obj-$(CONFIG_FB_TFT_UC1611) += fb_uc1611.o
obj-$(CONFIG_FB_TFT_UC1701) += fb_uc1701.o
obj-$(CONFIG_FB_TFT_UPD161704) += fb_upd161704.o
obj-$(CONFIG_FB_TFT_WATTEROTT) += fb_watterott.o
+obj-$(CONFIG_FB_TFT_HKTFT35) += fb_hktft35.o
diff --git a/drivers/staging/fbtft/fb_hktft35.c b/drivers/staging/fbtft/fb_hktft35.c
new file mode 100644
index 000000000000..2389343492d4
--- /dev/null
+++ b/drivers/staging/fbtft/fb_hktft35.c
@@ -0,0 +1,300 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * FB driver for the Hardkernel 3.5 inch TFT LCD
+ * that uses the ILI9488 LCD Controller
+ *
+ * Copyright (C) 2019 Yang Deokgyu
+ *
+ * Based on fb_ili9340.c by Noralf Tronnes
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/vmalloc.h>
+#include <linux/gpio/consumer.h>
+#include <linux/backlight.h>
+#include <linux/delay.h>
+
+#include "fbtft.h"
+
+#define DRVNAME "fb_hktft35"
+#define WIDTH 320
+#define HEIGHT 480
+
+#define ODROIDXU3_GPX1_REG 0x13400C24
+#define ODROIDXU3_GPX2_REG 0x13400C44
+#define ODROIDXU3_GPA2_REG 0x14010044
+
+#define ODROID_TFT35_MACTL_MV 0x20
+#define ODROID_TFT35_MACTL_MX 0x40
+#define ODROID_TFT35_MACTL_MY 0x80
+
+union reg_bitfield {
+ unsigned int wvalue;
+ struct {
+ unsigned int bit0 : 1;
+ unsigned int bit1 : 1;
+ unsigned int bit2 : 1;
+ unsigned int bit3 : 1;
+ unsigned int bit4 : 1;
+ unsigned int bit5 : 1;
+ unsigned int bit6 : 1;
+ unsigned int bit7 : 1;
+ unsigned int bit8_bit31 : 24;
+ } bits;
+};
+
+volatile void __iomem *reg_gpx1;
+volatile void __iomem *reg_gpx2;
+volatile void __iomem *reg_gpa2;
+
+/* this init sequence matches Hardkernel 3.5 inch TFT LCD */
+static const s16 default_init_sequence[] = {
+ -1, 0xB0,0x00,
+ -1, 0x11,
+ -2, 120,
+ -1, 0x3A,0x55,
+ -1, 0xC2,0x33,
+ -1, 0xC5,0x00,0x1E,0x80,
+ -1, 0x36,0x28,
+ -1, 0xB1,0xB0,
+ -1, 0xE0,0x00,0x04,0x0E,0x08,0x17,0x0A,0x40,0x79,0x4D,0x07,0x0E,0x0A,0x1A,0x1D,0x0F,
+ -1, 0xE1,0x00,0x1B,0x1F,0x02,0x10,0x05,0x32,0x34,0x43,0x02,0x0A,0x09,0x33,0x37,0x0F,
+ -1, 0x11,
+ -1, 0x29,
+ -3
+};
+
+static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye)
+{
+ fbtft_par_dbg(DEBUG_SET_ADDR_WIN, par,
+ "%s(xs=%d, ys=%d, xe=%d, ye=%d)\n", __func__, xs, ys, xe, ye);
+
+ /* Column address */
+ write_reg(par, 0x2A, xs >> 8, xs & 0xFF, xe >> 8, xe & 0xFF);
+
+ /* Row adress */
+ write_reg(par, 0x2B, ys >> 8, ys & 0xFF, ye >> 8, ye & 0xFF);
+
+ /* Memory write */
+ write_reg(par, 0x2C);
+}
+
+static int set_var(struct fbtft_par *par)
+{
+ u8 val;
+
+ switch (par->info->var.rotate) {
+ case 270:
+ val = ODROID_TFT35_MACTL_MV;
+ break;
+ case 180:
+ val = ODROID_TFT35_MACTL_MY;
+ break;
+ case 90:
+ val = ODROID_TFT35_MACTL_MV | ODROID_TFT35_MACTL_MX | ODROID_TFT35_MACTL_MY;
+ break;
+ default:
+ val = ODROID_TFT35_MACTL_MX;
+ break;
+ }
+ /* Memory Access Control */
+ write_reg(par, 0x36, val | (par->bgr << 3));
+ return 0;
+}
+
+static int fbtft_backlight_get_brightness(struct backlight_device *bd)
+{
+ return bd->props.brightness;
+}
+
+static int fbtft_backlight_update_status(struct backlight_device *bd)
+{
+ struct fbtft_par *par = bl_get_data(bd);
+ bool polarity = par->polarity;
+
+ fbtft_par_dbg(DEBUG_BACKLIGHT, par,
+ "%s: polarity=%d, power=%d, fb_blank=%d\n",
+ __func__, polarity, bd->props.power, bd->props.fb_blank);
+
+ if ((bd->props.power == FB_BLANK_UNBLANK) &&
+ (bd->props.fb_blank == FB_BLANK_UNBLANK))
+ gpiod_set_value(par->gpio.led[0], polarity);
+ else
+ gpiod_set_value(par->gpio.led[0], !polarity);
+
+ return 0;
+}
+
+static const struct backlight_ops fbtft_bl_ops = {
+ .get_brightness = fbtft_backlight_get_brightness,
+ .update_status = fbtft_backlight_update_status,
+};
+
+static void register_backlight(struct fbtft_par *par)
+{
+ struct backlight_device *bd;
+ struct backlight_properties bl_props = { 0, };
+
+ if (!par->gpio.led[0]) {
+ fbtft_par_dbg(DEBUG_BACKLIGHT, par,
+ "%s(): led pin not set, exiting.\n", __func__);
+ return;
+ }
+
+ bl_props.type = BACKLIGHT_RAW;
+ /* Assume backlight is off, get polarity from current state of pin */
+ bl_props.power = FB_BLANK_POWERDOWN;
+
+ /* Force polarity to true */
+ par->polarity = true;
+
+ bd = backlight_device_register(dev_driver_string(par->info->device),
+ par->info->device, par,
+ &fbtft_bl_ops, &bl_props);
+ if (IS_ERR(bd)) {
+ dev_err(par->info->device,
+ "cannot register backlight device (%ld)\n",
+ PTR_ERR(bd));
+ return;
+ }
+ par->info->bl_dev = bd;
+
+ if (!par->fbtftops.unregister_backlight)
+ par->fbtftops.unregister_backlight = fbtft_unregister_backlight;
+}
+
+static void unregister_backlight(struct fbtft_par *par)
+{
+ if (par->info->bl_dev) {
+ par->info->bl_dev->props.power = FB_BLANK_POWERDOWN;
+ backlight_update_status(par->info->bl_dev);
+ backlight_device_unregister(par->info->bl_dev);
+ par->info->bl_dev = NULL;
+ }
+
+ /* Just to hook the remove routine */
+ if (reg_gpx1) iounmap(reg_gpx1);
+ if (reg_gpx2) iounmap(reg_gpx2);
+ if (reg_gpa2) iounmap(reg_gpa2);
+}
+
+static int verify_gpios(struct fbtft_par *par)
+{
+ struct fbtft_platform_data *pdata = par->pdata;
+ int i;
+
+ fbtft_par_dbg(DEBUG_VERIFY_GPIOS, par, "%s()\n", __func__);
+
+ if (pdata->display.buswidth != 9 && par->startbyte == 0 &&
+ !par->gpio.dc) {
+ dev_err(par->info->device,
+ "Missing info about 'dc' gpio. Aborting.\n");
+ return -EINVAL;
+ }
+
+ if (!par->pdev)
+ return 0;
+
+ if (!par->gpio.wr) {
+ dev_err(par->info->device, "Missing 'wr' gpio. Aborting.\n");
+ return -EINVAL;
+ }
+ for (i = 0; i < pdata->display.buswidth; i++) {
+ if (!par->gpio.db[i]) {
+ dev_err(par->info->device,
+ "Missing 'db%02d' gpio. Aborting.\n", i);
+ return -EINVAL;
+ }
+ }
+
+ /* Just to hook the probe routine */
+ reg_gpx1 = ioremap(ODROIDXU3_GPX1_REG, 4);
+ reg_gpx2 = ioremap(ODROIDXU3_GPX2_REG, 4);
+ reg_gpa2 = ioremap(ODROIDXU3_GPA2_REG, 4);
+ if ((reg_gpx1 == NULL) || (reg_gpx2 == NULL) || (reg_gpa2 == NULL)) {
+ pr_err("%s : ioremap gpio registers error!\n", __func__);
+ } else {
+ pr_info("%s : ioremap gpio registers success!\n", __func__);
+ }
+
+ return 0;
+}
+
+static void reset(struct fbtft_par *par)
+{
+ if (!par->gpio.reset)
+ return;
+ fbtft_par_dbg(DEBUG_RESET, par, "%s()\n", __func__);
+ gpiod_set_value_cansleep(par->gpio.reset, 0);
+ usleep_range(20, 40);
+ gpiod_set_value_cansleep(par->gpio.reset, 1);
+ msleep(120);
+}
+
+static int write(struct fbtft_par *par, void *buf, size_t len)
+{
+ u8 data;
+ union reg_bitfield gpx1, gpx2, gpa2;
+
+ if ((reg_gpx1 == NULL) || (reg_gpx2 == NULL) || (reg_gpa2 == NULL)) {
+ pr_err("%s : ioremap gpio register fail!\n", __func__);
+ return 0;
+ }
+
+ fbtft_par_dbg_hex(DEBUG_WRITE, par, par->info->device, u8, buf, len,
+ "%s(len=%zu): ", __func__, len);
+
+ gpx1.wvalue = ioread32(reg_gpx1);
+ gpx2.wvalue = ioread32(reg_gpx2);
+ gpa2.wvalue = ioread32(reg_gpa2);
+
+ while (len--) {
+ data = *(u8 *) buf;
+ gpx1.bits.bit7 = (data & 0x01) ? 1 : 0;
+ gpx2.bits.bit0 = (data & 0x02) ? 1 : 0;
+ gpx1.bits.bit3 = (data & 0x04) ? 1 : 0;
+ gpa2.bits.bit4 = (data & 0x08) ? 1 : 0;
+ gpa2.bits.bit6 = (data & 0x10) ? 1 : 0;
+ gpa2.bits.bit7 = (data & 0x20) ? 1 : 0;
+ gpx1.bits.bit6 = (data & 0x40) ? 1 : 0;
+ gpx1.bits.bit5 = (data & 0x80) ? 1 : 0;
+ /* Start writing by pulling down /WR */
+ gpa2.bits.bit5 = 0;
+ iowrite32(gpx1.wvalue, reg_gpx1);
+ iowrite32(gpx2.wvalue, reg_gpx2);
+ iowrite32(gpa2.wvalue, reg_gpa2);
+ gpa2.bits.bit5 = 1;
+ iowrite32(gpa2.wvalue, reg_gpa2);
+
+ buf++;
+ }
+
+ return 0;
+}
+
+static struct fbtft_display display = {
+ .regwidth = 8,
+ .buswidth = 8,
+ .width = WIDTH,
+ .height = HEIGHT,
+ .init_sequence = default_init_sequence,
+ .fbtftops = {
+ .set_addr_win = set_addr_win,
+ .set_var = set_var,
+ .verify_gpios = verify_gpios,
+ .register_backlight = register_backlight,
+ .unregister_backlight = unregister_backlight,
+ .reset = reset,
+ .write = write,
+ },
+};
+FBTFT_REGISTER_DRIVER(DRVNAME, "odroid,hktft35", &display);
+
+MODULE_ALIAS("platform:" DRVNAME);
+MODULE_ALIAS("platform:hktft35");
+
+MODULE_DESCRIPTION("FB driver for the Hardkernel 3.5 inch TFT LCD uses the ILI9488 LCD Controller");
+MODULE_AUTHOR("Yang Deokgyu");
+MODULE_LICENSE("GPL");
--
2.25.1

View file

@ -0,0 +1,206 @@
From 9ff2e63c808cf020872b375fcc237284c72aed99 Mon Sep 17 00:00:00 2001
From: Yang Deokgyu <secugyu@gmail.com>
Date: Thu, 21 Nov 2019 15:17:36 +0900
Subject: [PATCH 66/74] ODROID-XU4: drivers/fbtft: Add fb_hktft32 module for
Hardkernel 3.2 inch TFT LCD
No longer use flexfb, fbtft_device that is deprecated since kernel 5.4.
Signed-off-by: Yang Deokgyu <secugyu@gmail.com>
Change-Id: Iebd014360f90eab5210722102d54c6169be5e28e
---
drivers/staging/fbtft/Kconfig | 7 ++
drivers/staging/fbtft/Makefile | 1 +
drivers/staging/fbtft/fb_hktft32.c | 156 +++++++++++++++++++++++++++++
3 files changed, 164 insertions(+)
create mode 100644 drivers/staging/fbtft/fb_hktft32.c
diff --git a/drivers/staging/fbtft/Kconfig b/drivers/staging/fbtft/Kconfig
index b6cd416ebb26..408ef1a2f978 100644
--- a/drivers/staging/fbtft/Kconfig
+++ b/drivers/staging/fbtft/Kconfig
@@ -213,3 +213,10 @@ config FB_TFT_HKTFT35
help
Generic Framebuffer support for the Hardkernel 3.5 inch TFT LCD
that uses the ILI9488 LCD Controller
+
+config FB_TFT_HKTFT32
+ tristate "FB driver for the Hardkernel 3.2 inch TFT LCD"
+ depends on FB_TFT
+ help
+ Generic Framebuffer support for the Hardkernel 3.2 inch TFT LCD
+ that uses the ILI9340 LCD Controller
diff --git a/drivers/staging/fbtft/Makefile b/drivers/staging/fbtft/Makefile
index 3d41175663ed..34a5a14d1ab4 100644
--- a/drivers/staging/fbtft/Makefile
+++ b/drivers/staging/fbtft/Makefile
@@ -38,3 +38,4 @@ obj-$(CONFIG_FB_TFT_UC1701) += fb_uc1701.o
obj-$(CONFIG_FB_TFT_UPD161704) += fb_upd161704.o
obj-$(CONFIG_FB_TFT_WATTEROTT) += fb_watterott.o
obj-$(CONFIG_FB_TFT_HKTFT35) += fb_hktft35.o
+obj-$(CONFIG_FB_TFT_HKTFT32) += fb_hktft32.o
diff --git a/drivers/staging/fbtft/fb_hktft32.c b/drivers/staging/fbtft/fb_hktft32.c
new file mode 100644
index 000000000000..33ac19603cad
--- /dev/null
+++ b/drivers/staging/fbtft/fb_hktft32.c
@@ -0,0 +1,156 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * FB driver for the Hardkernel 3.2 inch TFT LCD
+ * that uses the ILI9340 LCD Controller
+ *
+ * Copyright (C) 2019 Yang Deokgyu
+ *
+ * Based on fb_ili9340.c by Noralf Tronnes
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/gpio/consumer.h>
+#include <linux/delay.h>
+#include <video/mipi_display.h>
+
+#include "fbtft.h"
+
+#define DRVNAME "fb_hktft32"
+#define WIDTH 240
+#define HEIGHT 320
+
+/* Init sequence taken from: Arduino Library for the Adafruit 2.2" display */
+static int init_display(struct fbtft_par *par)
+{
+ par->fbtftops.reset(par);
+
+ write_reg(par, 0xEF, 0x03, 0x80, 0x02);
+ write_reg(par, 0xCF, 0x00, 0XC1, 0X30);
+ write_reg(par, 0xED, 0x64, 0x03, 0X12, 0X81);
+ write_reg(par, 0xE8, 0x85, 0x00, 0x78);
+ write_reg(par, 0xCB, 0x39, 0x2C, 0x00, 0x34, 0x02);
+ write_reg(par, 0xF7, 0x20);
+ write_reg(par, 0xEA, 0x00, 0x00);
+
+ /* Power Control 1 */
+ write_reg(par, 0xC0, 0x23);
+
+ /* Power Control 2 */
+ write_reg(par, 0xC1, 0x10);
+
+ /* VCOM Control 1 */
+ write_reg(par, 0xC5, 0x3e, 0x28);
+
+ /* VCOM Control 2 */
+ write_reg(par, 0xC7, 0x86);
+
+ /* COLMOD: Pixel Format Set */
+ /* 16 bits/pixel */
+ write_reg(par, MIPI_DCS_SET_PIXEL_FORMAT, 0x55);
+
+ /* Frame Rate Control */
+ /* Division ratio = fosc, Frame Rate = 79Hz */
+ write_reg(par, 0xB1, 0x00, 0x18);
+
+ /* Display Function Control */
+ write_reg(par, 0xB6, 0x08, 0x82, 0x27);
+
+ /* Gamma Function Disable */
+ write_reg(par, 0xF2, 0x00);
+
+ /* Gamma curve selection */
+ write_reg(par, MIPI_DCS_SET_GAMMA_CURVE, 0x01);
+
+ /* Positive Gamma Correction */
+ write_reg(par, 0xE0,
+ 0x0F, 0x31, 0x2B, 0x0C, 0x0E, 0x08, 0x4E, 0xF1,
+ 0x37, 0x07, 0x10, 0x03, 0x0E, 0x09, 0x00);
+
+ /* Negative Gamma Correction */
+ write_reg(par, 0xE1,
+ 0x00, 0x0E, 0x14, 0x03, 0x11, 0x07, 0x31, 0xC1,
+ 0x48, 0x08, 0x0F, 0x0C, 0x31, 0x36, 0x0F);
+
+ write_reg(par, MIPI_DCS_EXIT_SLEEP_MODE);
+
+ mdelay(120);
+
+ write_reg(par, MIPI_DCS_SET_DISPLAY_ON);
+
+ return 0;
+}
+
+static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye)
+{
+ write_reg(par, MIPI_DCS_SET_COLUMN_ADDRESS,
+ xs >> 8, xs & 0xFF, xe >> 8, xe & 0xFF);
+
+ write_reg(par, MIPI_DCS_SET_PAGE_ADDRESS,
+ ys >> 8, ys & 0xFF, ye >> 8, ye & 0xFF);
+
+ write_reg(par, MIPI_DCS_WRITE_MEMORY_START);
+}
+
+#define ILI9340_MADCTL_MV 0x20
+#define ILI9340_MADCTL_MX 0x40
+#define ILI9340_MADCTL_MY 0x80
+static int set_var(struct fbtft_par *par)
+{
+ u8 val;
+
+ switch (par->info->var.rotate) {
+ case 270:
+ val = ILI9340_MADCTL_MV;
+ break;
+ case 180:
+ val = ILI9340_MADCTL_MY;
+ break;
+ case 90:
+ val = ILI9340_MADCTL_MV | ILI9340_MADCTL_MY | ILI9340_MADCTL_MX;
+ break;
+ default:
+ val = ILI9340_MADCTL_MX;
+ break;
+ }
+ /* Memory Access Control */
+ write_reg(par, MIPI_DCS_SET_ADDRESS_MODE, val | (par->bgr << 3));
+
+ return 0;
+}
+
+static void reset(struct fbtft_par *par)
+{
+ if (!par->gpio.reset)
+ return;
+ fbtft_par_dbg(DEBUG_RESET, par, "%s()\n", __func__);
+ gpiod_set_value_cansleep(par->gpio.reset, 0);
+ usleep_range(20, 40);
+ gpiod_set_value_cansleep(par->gpio.reset, 1);
+ msleep(120);
+}
+
+static struct fbtft_display display = {
+ .regwidth = 8,
+ .buswidth = 8,
+ .width = WIDTH,
+ .height = HEIGHT,
+ .fbtftops = {
+ .init_display = init_display,
+ .set_addr_win = set_addr_win,
+ .set_var = set_var,
+ .reset = reset,
+ },
+};
+
+FBTFT_REGISTER_DRIVER(DRVNAME, "odroid,hktft32", &display);
+
+MODULE_ALIAS("spi:" DRVNAME);
+MODULE_ALIAS("platform:" DRVNAME);
+MODULE_ALIAS("spi:hktft32");
+MODULE_ALIAS("platform:hktft32");
+
+MODULE_DESCRIPTION("FB driver for the Hardkernel 3.2 inch TFT LCD uses the ILI9340 LCD Controller");
+MODULE_AUTHOR("Yang Deokgyu");
+MODULE_LICENSE("GPL");
--
2.25.1

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@ -0,0 +1,134 @@
From 02d953789c7fd0f8efd6d4168ab43c9e4ff97349 Mon Sep 17 00:00:00 2001
From: Yang Deokgyu <secugyu@gmail.com>
Date: Thu, 5 Dec 2019 12:08:23 +0900
Subject: [PATCH 68/74] ODROID-XU4: dts: Add nodes for Hardkernel LCDs of 2
HATs, Cloudshell, OGST
It doesn't include its touchscreen yet.
Signed-off-by: Yang Deokgyu <secugyu@gmail.com>
Change-Id: I110e897746dea17fc32e9fdc442c492d70888dfa
---
arch/arm/boot/dts/exynos5422-odroidxu4.dts | 101 +++++++++++++++++++++
1 file changed, 101 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5422-odroidxu4.dts b/arch/arm/boot/dts/exynos5422-odroidxu4.dts
index a2b9a892c7df..6e7da591654f 100644
--- a/arch/arm/boot/dts/exynos5422-odroidxu4.dts
+++ b/arch/arm/boot/dts/exynos5422-odroidxu4.dts
@@ -68,6 +68,49 @@ codec {
sound-dai = <&hdmi>;
};
};
+
+ hktft35: hktft35 {
+ status = "disabled";
+ compatible = "odroid,hktft35";
+ pinctrl-names = "default";
+ pinctrl-0 = <&hktft35_pins>;
+
+ rotate = <270>;
+ bgr;
+ fps = <20>;
+ bpp = <16>;
+ reset-gpios = <&gpa0 3 GPIO_ACTIVE_HIGH>;
+ dc-gpios = <&gpx2 4 GPIO_ACTIVE_HIGH>;
+ wr-gpios = <&gpa2 5 GPIO_ACTIVE_HIGH>;
+ cs-gpios = <&gpa0 2 GPIO_ACTIVE_HIGH>;
+ led-gpios = <&gpx2 7 GPIO_ACTIVE_HIGH>;
+ db-gpios = <&gpx1 7 GPIO_ACTIVE_HIGH>,
+ <&gpx2 0 GPIO_ACTIVE_HIGH>,
+ <&gpx1 3 GPIO_ACTIVE_HIGH>,
+ <&gpa2 4 GPIO_ACTIVE_HIGH>,
+ <&gpa2 6 GPIO_ACTIVE_HIGH>,
+ <&gpa2 7 GPIO_ACTIVE_HIGH>,
+ <&gpx1 6 GPIO_ACTIVE_HIGH>,
+ <&gpx1 5 GPIO_ACTIVE_HIGH>;
+ debug = <0>;
+
+ hktft35_pins: hktft35_pins {
+ samsung,pins = "gpa0-3", /* reset */
+ "gpx2-4", /* dc */
+ "gpa2-5", /* wr */
+ "gpa0-2", /* cs */
+ "gpx2-7", /* led */
+ "gpx1-7", /* db00 */
+ "gpx2-0", /* db01 */
+ "gpx1-3", /* db02 */
+ "gpa2-4", /* db03 */
+ "gpa2-6", /* db04 */
+ "gpa2-7", /* db05 */
+ "gpx1-6", /* db06 */
+ "gpx1-5"; /* db07 */
+ samsung,pin-function = <1>;
+ };
+ };
};
&clock_audss {
@@ -128,4 +171,62 @@ controller-data {
samsung,spi-feedback-delay = <0>;
};
};
+
+ hktft_cs_ogst: hktft_cs_ogst@0 {
+ status = "disabled";
+ compatible = "odroid,hktft32";
+ reg = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&hktft_cs_ogst_pins>;
+
+ spi-max-frequency = <40000000>;
+ rotate = <270>;
+ bgr;
+ backlight;
+ fps = <20>;
+ bpp = <16>;
+ reset-gpios = <&gpx1 5 GPIO_ACTIVE_HIGH>;
+ dc-gpios = <&gpx1 6 GPIO_ACTIVE_HIGH>;
+ led-gpios = <&gpx1 2 GPIO_ACTIVE_HIGH>;
+ debug = <0>;
+
+ hktft_cs_ogst_pins: hktft_cs_ogst_pins {
+ samsung,pins = "gpx1-5", /* reset */
+ "gpx1-6", /* dc */
+ "gpx1-2"; /* led */
+ };
+
+ controller-data {
+ cs-gpio = <&gpa2 5 GPIO_ACTIVE_HIGH>;
+ samsung,spi-feedback-delay = <0>;
+ };
+ };
+
+ hktft32: hktft32@0 {
+ status = "disabled";
+ compatible = "odroid,hktft32";
+ reg = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&hktft32_pins>;
+
+ spi-max-frequency = <40000000>;
+ rotate = <90>;
+ bgr;
+ backlight;
+ fps = <20>;
+ bpp = <16>;
+ reset-gpios = <&gpx1 5 GPIO_ACTIVE_HIGH>;
+ dc-gpios = <&gpx1 6 GPIO_ACTIVE_HIGH>;
+ debug = <0>;
+
+ hktft32_pins: hktft32_pins {
+ samsung,pins = "gpx1-5", /* reset */
+ "gpx1-6"; /* dc */
+ };
+
+ controller-data {
+ cs-gpio = <&gpa2 5 GPIO_ACTIVE_HIGH>;
+ samsung,spi-feedback-delay = <0>;
+ };
+ };
};
--
2.25.1

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@ -0,0 +1,33 @@
From b2084cf9ab91258d7b0a6313ed4e478b4267e6bc Mon Sep 17 00:00:00 2001
From: Dongjin Kim <tobetter@gmail.com>
Date: Thu, 27 Feb 2020 11:50:05 +0900
Subject: [PATCH 69/74] ODROID-XU4: FIXME: Revert "regulator: core: Let boot-on
regulators be powered off"
FIXME: this patch crashes when Mali is activated
This reverts commit f44b07472f29ae313ce875dc7b9c75b100c608b8.
Change-Id: I2f3e8e68b3172c2c1d035032b47fb256c5757be8
---
drivers/regulator/core.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/regulator/core.c b/drivers/regulator/core.c
index 03154f5b939f..432550f2cee1 100644
--- a/drivers/regulator/core.c
+++ b/drivers/regulator/core.c
@@ -1407,9 +1407,7 @@ static int set_machine_constraints(struct regulator_dev *rdev,
rdev_err(rdev, "failed to enable\n");
return ret;
}
-
- if (rdev->constraints->always_on)
- rdev->use_count++;
+ rdev->use_count++;
}
print_constraints(rdev);
--
2.25.1

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@ -0,0 +1,34 @@
From 5a6b0ec4a6998f0c14f4c78bd12cce434abe1ad5 Mon Sep 17 00:00:00 2001
From: ckkim <changkon12@gmail.com>
Date: Thu, 5 Mar 2020 14:26:42 +0900
Subject: [PATCH 70/74] ODROID-XU4: arm/dts: remove write-protect pin from SD
card
This patch removes the write-protect pin from SD card since it's not
being supported by a hardware and used at all.
Signed-off-by: ckkim <changkon12@gmail.com>
Change-Id: I72af94f7fd0a01e65f7ca3e15ccd66e797395df4
---
arch/arm/boot/dts/exynos5422-odroid-core.dtsi | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/exynos5422-odroid-core.dtsi b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi
index 4a4710efb429..3f0e0452f294 100644
--- a/arch/arm/boot/dts/exynos5422-odroid-core.dtsi
+++ b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi
@@ -976,9 +976,10 @@ &mmc_2 {
samsung,dw-mshc-sdr-timing = <0 4>;
samsung,dw-mshc-ddr-timing = <0 2>;
pinctrl-names = "default";
- pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_wp &sd2_bus1 &sd2_bus4>;
+ pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus1 &sd2_bus4>;
bus-width = <4>;
cap-sd-highspeed;
+ disable-wp;
max-frequency = <200000000>;
vmmc-supply = <&ldo19_reg>;
vqmmc-supply = <&ldo13_reg>;
--
2.25.1

View file

@ -0,0 +1,60 @@
From c9bd7369ae4d2de0937acf8afd565f64419611d2 Mon Sep 17 00:00:00 2001
From: "charles.park" <charles.park@hardkernel.com>
Date: Fri, 1 Jun 2018 18:12:01 +0900
Subject: [PATCH 71/74] ODROID-XU4: Update hack avoiding the invalid
temperature by TMU broken
Change-Id: I6092834427950a50746535458e99bf7089212044
---
drivers/thermal/thermal_helpers.c | 28 ++++++++++++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/drivers/thermal/thermal_helpers.c b/drivers/thermal/thermal_helpers.c
index 87b1256fa2f2..e44d2d6109d4 100644
--- a/drivers/thermal/thermal_helpers.c
+++ b/drivers/thermal/thermal_helpers.c
@@ -75,6 +75,10 @@ EXPORT_SYMBOL(get_thermal_instance);
*
* Return: On success returns 0, an error code otherwise
*/
+
+#define CRITICAL_TEMP 120000
+int thermal_zone_data[4] = { 0, };
+
int thermal_zone_get_temp(struct thermal_zone_device *tz, int *temp)
{
int ret = -EINVAL;
@@ -108,6 +112,30 @@ int thermal_zone_get_temp(struct thermal_zone_device *tz, int *temp)
*temp = tz->emul_temperature;
}
+ /* save thermal_zone data */
+ if (!ret)
+ thermal_zone_data[tz->id] = *temp;
+ /*
+ * This case is that the thermal sensor is broken.
+ * That's not real temperature. Set the fake temperature value in order to
+ * avoid reaching the ciritical temperature.
+ */
+ if ((thermal_zone_data[tz->id] > CRITICAL_TEMP) && (tz->id != 4)) {
+ int i, broken_sensor = 0, correct_temp = 0;
+ for (i = 0; i < 4; i++) {
+ if ((thermal_zone_data[i] <= CRITICAL_TEMP) &&
+ (correct_temp <= thermal_zone_data[i]))
+ correct_temp = thermal_zone_data[i];
+ if (thermal_zone_data[i] > CRITICAL_TEMP)
+ broken_sensor++;
+ }
+ /*
+ * if all thermal sensor broken then critical temperature data send
+ * for system poweroff.
+ */
+ *temp = (broken_sensor == 4) ? CRITICAL_TEMP : correct_temp;
+ }
+
mutex_unlock(&tz->lock);
exit:
return ret;
--
2.25.1

View file

@ -0,0 +1,35 @@
From 7ad9d90c7fc146ad321e011a06e2eb2e7a9a45d6 Mon Sep 17 00:00:00 2001
From: Marian Mihailescu <mihailescu2m@gmail.com>
Date: Thu, 14 Nov 2019 10:39:00 +1030
Subject: [PATCH 72/74] ODROID-XU4: ARM: dts: exynos5420: add mali dt node and
enable mali on Odroid XU3/4
Add device tree node for Mali GPU for Exynos 542x SoC.
GPU is disabled by default, and is enabled for each board after the
regulator is defined. Tested on Odroid-XU4.
Change-Id: I902932d29c7093b666fa3a8a8e1d0fda8fb11d5c
Signed-off-by: Marian Mihailescu <mihailescu2m@gmail.com>
---
arch/arm/boot/dts/exynos5422-odroid-core.dtsi | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5422-odroid-core.dtsi b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi
index 3f0e0452f294..b1c506a34026 100644
--- a/arch/arm/boot/dts/exynos5422-odroid-core.dtsi
+++ b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi
@@ -1059,6 +1059,11 @@ &gpu {
status = "okay";
};
+&gpu {
+ mali-supply = <&buck4_reg>;
+ status = "okay";
+};
+
&rtc {
status = "okay";
clocks = <&clock CLK_RTC>, <&s2mps11_osc S2MPS11_CLK_AP>;
--
2.25.1

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@ -0,0 +1,381 @@
From 0594a26789410266b6e8f456fe9fb60efcf52706 Mon Sep 17 00:00:00 2001
From: Yang Deokgyu <secugyu@gmail.com>
Date: Thu, 5 Dec 2019 18:07:13 +0900
Subject: [PATCH 73/74] ODROID-XU4: Introduce device tree overlay
Copy *.dtbo files at arch/arm/boot/dts/overlays to boot
partition, e.g, /media/boot/overlays/. Then use "fdtoverlay" tool
to integrate DTB and DTBOs. Or, you also can use "fdt apply" u-boot
command to prepare device tree blob at booting time.
Signed-off-by: Yang Deokgyu <secugyu@gmail.com>
Change-Id: I40e6a915e2149952fb548f64e7fae335ba12db18
---
.gitignore | 1 +
Makefile | 3 ++
arch/arm/boot/dts/Makefile | 4 +++
arch/arm/boot/dts/exynos5422-odroidxu4.dts | 8 ++---
arch/arm/boot/dts/overlays/Makefile | 12 +++++++
.../dts/overlays/hktft-cs-ogst-overlay.dts | 36 +++++++++++++++++++
.../arm/boot/dts/overlays/hktft32-overlay.dts | 36 +++++++++++++++++++
.../arm/boot/dts/overlays/hktft35-overlay.dts | 36 +++++++++++++++++++
arch/arm/boot/dts/overlays/i2c1-overlay.dts | 12 +++++++
arch/arm/boot/dts/overlays/i2c5-overlay.dts | 12 +++++++
.../arm/boot/dts/overlays/spidev1-overlay.dts | 20 +++++++++++
scripts/Makefile.dtbinst | 6 +++-
scripts/Makefile.lib | 16 ++++++++-
13 files changed, 196 insertions(+), 6 deletions(-)
create mode 100644 arch/arm/boot/dts/overlays/Makefile
create mode 100644 arch/arm/boot/dts/overlays/hktft-cs-ogst-overlay.dts
create mode 100644 arch/arm/boot/dts/overlays/hktft32-overlay.dts
create mode 100644 arch/arm/boot/dts/overlays/hktft35-overlay.dts
create mode 100644 arch/arm/boot/dts/overlays/i2c1-overlay.dts
create mode 100644 arch/arm/boot/dts/overlays/i2c5-overlay.dts
create mode 100644 arch/arm/boot/dts/overlays/spidev1-overlay.dts
diff --git a/.gitignore b/.gitignore
index d5f4804ed07c..56971a9bf749 100644
--- a/.gitignore
+++ b/.gitignore
@@ -18,6 +18,7 @@
*.c.[012]*.*
*.dt.yaml
*.dtb
+*.dtbo
*.dtb.S
*.dwo
*.elf
diff --git a/Makefile b/Makefile
index 24a4c1b97bb0..d0a5399008f9 100644
--- a/Makefile
+++ b/Makefile
@@ -1301,6 +1301,9 @@ ifneq ($(dtstree),)
%.dtb: include/config/kernel.release scripts_dtc
$(Q)$(MAKE) $(build)=$(dtstree) $(dtstree)/$@
+%.dtbo:
+ $(Q)$(MAKE) $(build)=$(dtstree)/overlays $(dtstree)/overlays/$@
+
PHONY += dtbs dtbs_install dtbs_check
dtbs: include/config/kernel.release scripts_dtc
$(Q)$(MAKE) $(build)=$(dtstree)
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index e6a1cac0bfc7..6474d2c54a29 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -1373,3 +1373,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
aspeed-bmc-opp-zaius.dtb \
aspeed-bmc-portwell-neptune.dtb \
aspeed-bmc-quanta-q71l.dtb
+
+targets += $(dtb-y)
+
+subdir-y := overlays
diff --git a/arch/arm/boot/dts/exynos5422-odroidxu4.dts b/arch/arm/boot/dts/exynos5422-odroidxu4.dts
index 6e7da591654f..6768dc18ebee 100644
--- a/arch/arm/boot/dts/exynos5422-odroidxu4.dts
+++ b/arch/arm/boot/dts/exynos5422-odroidxu4.dts
@@ -143,25 +143,25 @@ &usbdrd_dwc3_1 {
/* i2c@12C70000 */
&i2c_1 {
- status = "okay";
+ status = "disabled";
samsung,i2c-max-bus-freq = <400000>;
};
/* i2c@12cb0000 */
&hsi2c_5 {
- status = "okay";
+ status = "disabled";
samsung,hs-mode;
clock-frequency = <400000>;
};
&spi_1 {
- status = "okay";
+ status = "disabled";
samsung,spi-src-clk = <0>;
num-cs = <2>;
cs-gpios = <&gpa2 5 GPIO_ACTIVE_HIGH>, <&gpx2 1 GPIO_ACTIVE_HIGH>;
spidev: spidev@0 {
- status = "okay";
+ status = "disabled";
reg = <0>;
compatible = "odroid,spidev";
spi-max-frequency = <1000000>;
diff --git a/arch/arm/boot/dts/overlays/Makefile b/arch/arm/boot/dts/overlays/Makefile
new file mode 100644
index 000000000000..9502f67ce928
--- /dev/null
+++ b/arch/arm/boot/dts/overlays/Makefile
@@ -0,0 +1,12 @@
+# Overlays for the Odroid platform
+
+dtbo-y += \
+ spidev1-overlay.dtbo \
+ i2c1-overlay.dtbo \
+ i2c5-overlay.dtbo \
+ hktft32-overlay.dtbo \
+ hktft35-overlay.dtbo \
+ hktft-cs-ogst-overlay.dtbo
+
+targets += $(dtbo-y)
+always := $(dtbo-y)
diff --git a/arch/arm/boot/dts/overlays/hktft-cs-ogst-overlay.dts b/arch/arm/boot/dts/overlays/hktft-cs-ogst-overlay.dts
new file mode 100644
index 000000000000..a727fb311574
--- /dev/null
+++ b/arch/arm/boot/dts/overlays/hktft-cs-ogst-overlay.dts
@@ -0,0 +1,36 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ fragment@0 {
+ target = <&i2c_1>;
+
+ __overlay__ {
+ status = "disabled";
+ };
+ };
+
+ fragment@1 {
+ target = <&hsi2c_5>;
+
+ __overlay__ {
+ status = "disabled";
+ };
+ };
+
+ fragment@2 {
+ target = <&spi_1>;
+
+ __overlay__ {
+ status = "okay";
+ };
+ };
+
+ fragment@3 {
+ target = <&hktft_cs_ogst>;
+
+ __overlay__ {
+ status = "okay";
+ };
+ };
+};
diff --git a/arch/arm/boot/dts/overlays/hktft32-overlay.dts b/arch/arm/boot/dts/overlays/hktft32-overlay.dts
new file mode 100644
index 000000000000..7bda6cd8e6d8
--- /dev/null
+++ b/arch/arm/boot/dts/overlays/hktft32-overlay.dts
@@ -0,0 +1,36 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ fragment@0 {
+ target = <&i2c_1>;
+
+ __overlay__ {
+ status = "disabled";
+ };
+ };
+
+ fragment@1 {
+ target = <&hsi2c_5>;
+
+ __overlay__ {
+ status = "disabled";
+ };
+ };
+
+ fragment@2 {
+ target = <&spi_1>;
+
+ __overlay__ {
+ status = "okay";
+ };
+ };
+
+ fragment@3 {
+ target = <&hktft32>;
+
+ __overlay__ {
+ status = "okay";
+ };
+ };
+};
diff --git a/arch/arm/boot/dts/overlays/hktft35-overlay.dts b/arch/arm/boot/dts/overlays/hktft35-overlay.dts
new file mode 100644
index 000000000000..a656dd272165
--- /dev/null
+++ b/arch/arm/boot/dts/overlays/hktft35-overlay.dts
@@ -0,0 +1,36 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ fragment@0 {
+ target = <&i2c_1>;
+
+ __overlay__ {
+ status = "disabled";
+ };
+ };
+
+ fragment@1 {
+ target = <&hsi2c_5>;
+
+ __overlay__ {
+ status = "disabled";
+ };
+ };
+
+ fragment@2 {
+ target = <&spi_1>;
+
+ __overlay__ {
+ status = "disabled";
+ };
+ };
+
+ fragment@3 {
+ target = <&hktft35>;
+
+ __overlay__ {
+ status = "okay";
+ };
+ };
+};
diff --git a/arch/arm/boot/dts/overlays/i2c1-overlay.dts b/arch/arm/boot/dts/overlays/i2c1-overlay.dts
new file mode 100644
index 000000000000..2fd27754e7c8
--- /dev/null
+++ b/arch/arm/boot/dts/overlays/i2c1-overlay.dts
@@ -0,0 +1,12 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ fragment@0 {
+ target = <&i2c_1>;
+
+ __overlay__ {
+ status = "okay";
+ };
+ };
+};
diff --git a/arch/arm/boot/dts/overlays/i2c5-overlay.dts b/arch/arm/boot/dts/overlays/i2c5-overlay.dts
new file mode 100644
index 000000000000..9ef9e66699e0
--- /dev/null
+++ b/arch/arm/boot/dts/overlays/i2c5-overlay.dts
@@ -0,0 +1,12 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ fragment@0 {
+ target = <&hsi2c_5>;
+
+ __overlay__ {
+ status = "okay";
+ };
+ };
+};
diff --git a/arch/arm/boot/dts/overlays/spidev1-overlay.dts b/arch/arm/boot/dts/overlays/spidev1-overlay.dts
new file mode 100644
index 000000000000..c5cb6bcb6011
--- /dev/null
+++ b/arch/arm/boot/dts/overlays/spidev1-overlay.dts
@@ -0,0 +1,20 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ fragment@0 {
+ target = <&spi_1>;
+
+ __overlay__ {
+ status = "okay";
+ };
+ };
+
+ fragment@1 {
+ target = <&spidev>;
+
+ __overlay__ {
+ status = "okay";
+ };
+ };
+};
diff --git a/scripts/Makefile.dtbinst b/scripts/Makefile.dtbinst
index 50d580d77ae9..079b83308011 100644
--- a/scripts/Makefile.dtbinst
+++ b/scripts/Makefile.dtbinst
@@ -18,9 +18,10 @@ include scripts/Kbuild.include
include $(src)/Makefile
dtbs := $(addprefix $(dst)/, $(dtb-y) $(if $(CONFIG_OF_ALL_DTBS),$(dtb-)))
+dtbos := $(addprefix $(dst)/, $(dtbo-y) $(if $(CONFIG_OF_ALL_DTBS),$(dtb-)))
subdirs := $(addprefix $(obj)/, $(subdir-y) $(subdir-m))
-__dtbs_install: $(dtbs) $(subdirs)
+__dtbs_install: $(dtbs) $(dtbos) $(subdirs)
@:
quiet_cmd_dtb_install = INSTALL $@
@@ -29,6 +30,9 @@ quiet_cmd_dtb_install = INSTALL $@
$(dst)/%.dtb: $(obj)/%.dtb
$(call cmd,dtb_install)
+$(dst)/%.dtbo: $(obj)/%.dtbo
+ $(call cmd,dtb_install)
+
PHONY += $(subdirs)
$(subdirs):
$(Q)$(MAKE) $(dtbinst)=$@ dst=$(patsubst $(obj)/%,$(dst)/%,$@)
diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
index 916b2f7f7098..1d5af395d33f 100644
--- a/scripts/Makefile.lib
+++ b/scripts/Makefile.lib
@@ -268,12 +268,14 @@ DTC_FLAGS += -Wno-interrupt_provider
ifeq ($(findstring 1,$(KBUILD_EXTRA_WARN)),)
DTC_FLAGS += -Wno-unit_address_vs_reg \
-Wno-unit_address_format \
+ -Wno-gpios_property \
-Wno-avoid_unnecessary_addr_size \
-Wno-alias_paths \
-Wno-graph_child_address \
-Wno-simple_bus_reg \
-Wno-unique_unit_address \
- -Wno-pci_device_reg
+ -Wno-pci_device_reg \
+ --symbol
endif
ifneq ($(findstring 2,$(KBUILD_EXTRA_WARN)),)
@@ -329,6 +331,18 @@ endef
$(obj)/%.dt.yaml: $(src)/%.dts $(DTC) $(DT_TMP_SCHEMA) FORCE
$(call if_changed_rule,dtc,yaml)
+quiet_cmd_dtco = DTCO $@
+cmd_dtco = mkdir -p $(dir ${dtc-tmp}) ; \
+ $(CPP) $(dtc_cpp_flags) -x assembler-with-cpp -o $(dtc-tmp) $< ; \
+ $(DTC) -@ -H epapr -O dtb -o $@ -b 0 \
+ -i $(dir $<) $(DTC_FLAGS) \
+ -Wno-interrupts_property \
+ -d $(depfile).dtc.tmp $(dtc-tmp) ; \
+ cat $(depfile).pre.tmp $(depfile).dtc.tmp > $(depfile)
+
+$(obj)/%.dtbo: $(obj)/%.dts FORCE
+ $(call if_changed_dep,dtco)
+
dtc-tmp = $(subst $(comma),_,$(dot-target).dts.tmp)
# Bzip2
--
2.25.1