diff --git a/patch/kernel/rockchip-next/9200_DTS_tinkerboard_wifi.patch b/patch/kernel/rockchip-next/9200_DTS_tinkerboard_wifi.patch new file mode 100644 index 000000000..1bb5b2acd --- /dev/null +++ b/patch/kernel/rockchip-next/9200_DTS_tinkerboard_wifi.patch @@ -0,0 +1,134 @@ +diff --git a/arch/arm/boot/dts/rk3288-miniarm.dts b/arch/arm/boot/dts/rk3288-miniarm.dts +index 6bc4b39..79cdede 100644 +--- a/arch/arm/boot/dts/rk3288-miniarm.dts ++++ b/arch/arm/boot/dts/rk3288-miniarm.dts +@@ -44,6 +44,7 @@ + + #include "rk3288.dtsi" + #include ++#include + + / { + model = "Rockchip RK3288 Tinker Board"; +@@ -54,6 +55,15 @@ + device_type = "memory"; + }; + ++ wireless-wlan { ++ compatible = "wlan-platdata"; ++ rockchip,grf = <&grf>; ++ wifi_chip_type = "8723bs"; ++ sdio_vref = <1800>; ++ WIFI,host_wake_irq = <&gpio4 30 GPIO_ACTIVE_HIGH>; ++ status = "okay"; ++ }; ++ + ext_gmac: external-gmac-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; +@@ -133,6 +143,23 @@ + startup-delay-us = <100000>; + vin-supply = <&vcc_io>; + }; ++ ++ sdio_pwrseq: sdio-pwrseq { ++ compatible = "mmc-pwrseq-simple"; ++ clocks = <&rk808 RK808_CLKOUT1>; ++ clock-names = "ext_clock"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&chip_enable_h>, <&wifi_enable_h>; ++ ++ /* ++ * On the module itself this is one of these (depending ++ * on the actual card populated): ++ * - SDIO_RESET_L_WL_REG_ON ++ * - PDN (power down when low) ++ */ ++ reset-gpios = <&gpio4 RK_PD4 GPIO_ACTIVE_LOW>, <&gpio4 RK_PD3 GPIO_ACTIVE_LOW>; ++ }; ++ + }; + + &cpu0 { +@@ -396,9 +423,30 @@ + status = "okay"; + }; + +-&io_domains { ++&sdio0 { + status = "okay"; ++ clock-frequency = <50000000>; ++ clock-freq-min-max = <200000 50000000>; ++ bus-width = <4>; ++ cap-sd-highspeed; ++ cap-sdio-irq; ++ disable-wp; ++ keep-power-in-suspend; ++ mmc-pwrseq = <&sdio_pwrseq>; ++ non-removable; ++ num-slots = <1>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; ++ sd-uhs-sdr104; ++ supports-sdio; ++ ++}; + ++ ++&io_domains { ++ status = "okay"; ++ rockchip,grf = <&grf>; ++ wifi-supply = <&vcc_18>; + sdcard-supply = <&vccio_sd>; + }; + +@@ -447,6 +495,17 @@ + }; + }; + ++ sdio-pwrseq { ++ wifi_enable_h: wifienable-h { ++ rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ chip_enable_h: chip-enable-h { ++ rockchip,pins = <4 27 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ + sdmmc { + sdmmc_bus4: sdmmc-bus4 { + rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up_drv_8ma>, +@@ -478,6 +537,13 @@ + rockchip,pins = <7 8 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; ++ ++ wireless-bluetooth { ++ uart0_gpios: uart0-gpios { ++ rockchip,pins = <4 19 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ + }; + + &pwm0 { +@@ -493,12 +559,17 @@ + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; ++ sd-uhs-sdr12; ++ sd-uhs-sdr25; ++ sd-uhs-sdr50; ++ sd-uhs-sdr104; + card-detect-delay = <200>; + disable-wp; /* wp not hooked up */ + num-slots = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; + status = "okay"; ++ supports-sd; + vmmc-supply = <&vcc33_sd>; + vqmmc-supply = <&vccio_sd>; + }; diff --git a/patch/kernel/rockchip-next/9210_DTS_update.patch b/patch/kernel/rockchip-next/9210_DTS_update.patch new file mode 100644 index 000000000..de6833825 --- /dev/null +++ b/patch/kernel/rockchip-next/9210_DTS_update.patch @@ -0,0 +1,151 @@ +diff --git a/arch/arm/boot/dts/rk3288-miniarm.dts b/arch/arm/boot/dts/rk3288-miniarm.dts +index 79cdede..348e9be 100644 +--- a/arch/arm/boot/dts/rk3288-miniarm.dts ++++ b/arch/arm/boot/dts/rk3288-miniarm.dts +@@ -50,11 +50,23 @@ + model = "Rockchip RK3288 Tinker Board"; + compatible = "asus,rk3288-tinker", "rockchip,rk3288"; + +- memory { ++ memory@0 { + reg = <0x0 0x80000000>; + device_type = "memory"; + }; + ++ wireless-bluetooth { ++ compatible = "bluetooth-platdata"; ++ uart_rts_gpios = <&gpio4 19 GPIO_ACTIVE_LOW>; ++ pinctrl-names = "default","rts_gpio"; ++ pinctrl-0 = <&uart0_rts>; ++ pinctrl-1 = <&uart0_gpios>; ++ BT,reset_gpio = <&gpio4 29 GPIO_ACTIVE_HIGH>; ++ BT,wake_gpio = <&gpio4 26 GPIO_ACTIVE_HIGH>; ++ BT,wake_host_irq = <&gpio4 31 GPIO_ACTIVE_HIGH>; ++ status = "okay"; ++ }; ++ + wireless-wlan { + compatible = "wlan-platdata"; + rockchip,grf = <&grf>; +@@ -314,6 +326,8 @@ + }; + + vccio_sd: LDO_REG5 { ++ regulator-always-on; ++ regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vccio_sd"; +@@ -385,6 +399,11 @@ + + &i2c2 { + status = "okay"; ++ ++ eeprom:m24c08@50 { ++ compatible = "at,24c08"; ++ reg = <0x50>; ++ }; + }; + + &i2c3 { +@@ -581,6 +600,8 @@ + }; + + &uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_xfer>, <&uart0_cts>; + status = "okay"; + }; + +diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi +index e1938d2..458d545 100644 +--- a/arch/arm/boot/dts/rk3288.dtsi ++++ b/arch/arm/boot/dts/rk3288.dtsi +@@ -360,6 +360,8 @@ + clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; + fifo-depth = <0x100>; + interrupts = ; ++ #address-cells = <1>; ++ #size-cells = <0>; + reg = <0xff0c0000 0x4000>; + resets = <&cru SRST_MMC0>; + reset-names = "reset"; +@@ -374,6 +376,8 @@ + clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; + fifo-depth = <0x100>; + interrupts = ; ++ #address-cells = <1>; ++ #size-cells = <0>; + reg = <0xff0d0000 0x4000>; + resets = <&cru SRST_SDIO0>; + reset-names = "reset"; +@@ -388,6 +392,8 @@ + clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; + fifo-depth = <0x100>; + interrupts = ; ++ #address-cells = <1>; ++ #size-cells = <0>; + reg = <0xff0e0000 0x4000>; + resets = <&cru SRST_SDIO1>; + reset-names = "reset"; +@@ -402,6 +408,8 @@ + clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; + fifo-depth = <0x100>; + interrupts = ; ++ #address-cells = <1>; ++ #size-cells = <0>; + reg = <0xff0f0000 0x4000>; + resets = <&cru SRST_EMMC>; + reset-names = "reset"; +@@ -1038,7 +1046,7 @@ + status = "disabled"; + }; + +- spdif: sound@ff88b0000 { ++ spdif: sound@ff8b0000 { + compatible = "rockchip,rk3288-spdif", "rockchip,rk3066-spdif"; + reg = <0xff8b0000 0x10000>; + #sound-dai-cells = <0>; +@@ -1082,9 +1090,24 @@ + status = "okay"; + }; + ++ rga: rga@ff920000 { ++ compatible = "rockchip,rk3288-rga"; ++ reg = <0xff920000 0x180>; ++ interrupts = ; ++ interrupt-names = "rga"; ++ clocks = <&cru ACLK_RGA>, <&cru HCLK_RGA>, <&cru SCLK_RGA>; ++ clock-names = "aclk", "hclk", "sclk"; ++ power-domains = <&power RK3288_PD_VIO>; ++ resets = <&cru SRST_RGA_CORE>, <&cru SRST_RGA_AXI>, <&cru SRST_RGA_AHB>; ++ ++ reset-names = "core", "axi", "ahb"; ++ status = "disabled"; ++ }; ++ ++ + vopb: vop@ff930000 { + compatible = "rockchip,rk3288-vop"; +- reg = <0xff930000 0x19c>; ++ reg = <0xff930000 0x19c>, <0xff931000 0x1000>; + interrupts = ; + clocks = <&cru ACLK_VOP0>, <&cru DCLK_VOP0>, <&cru HCLK_VOP0>; + clock-names = "aclk_vop", "dclk_vop", "hclk_vop"; +@@ -1127,7 +1150,7 @@ + + vopl: vop@ff940000 { + compatible = "rockchip,rk3288-vop"; +- reg = <0xff940000 0x19c>; ++ reg = <0xff940000 0x19c>, <0xff941000 0x1000>; + interrupts = ; + clocks = <&cru ACLK_VOP1>, <&cru DCLK_VOP1>, <&cru HCLK_VOP1>; + clock-names = "aclk_vop", "dclk_vop", "hclk_vop"; +@@ -1202,6 +1225,7 @@ + interrupts = ; + clocks = <&cru SCLK_EDP>, <&cru PCLK_EDP_CTRL>; + clock-names = "dp", "pclk"; ++ power-domains = <&power RK3288_PD_VIO>; + phys = <&edp_phy>; + phy-names = "dp"; + resets = <&cru SRST_EDP>;