mirror of
https://github.com/Fishwaldo/build.git
synced 2025-03-18 04:41:35 +00:00
Merge pull request #1050 from 5kft/add-nanopi-neo-core2-lts
add board support for the NanoPi NEO Core2
This commit is contained in:
Igor Pečovnik
GitHub
commit
e6b0592ae5
3 changed files with 402 additions and 0 deletions
17
config/boards/nanopineocore2.conf
Normal file
17
config/boards/nanopineocore2.conf
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@ -0,0 +1,17 @@
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# H5 quad core 1GB SoC Headless GBE eMMC WiFi/BT
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BOARD_NAME="NanoPi Neo Core 2"
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BOARDFAMILY="sun50iw2"
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BOOTCONFIG="nanopi_neo_core2_defconfig"
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#
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MODULES=""
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MODULES_NEXT="g_serial"
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DEFAULT_OVERLAYS="usbhost1 usbhost2"
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CPUMIN="408000"
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CPUMAX="1392000"
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#
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BUILD_DESKTOP="no"
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#
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KERNEL_TARGET="next,dev"
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CLI_TARGET="stretch:next"
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#
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CLI_BETA_TARGET="bionic:dev"
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229
patch/kernel/sunxi-next/update-board-add-nanopi-neo-core2.patch
Normal file
229
patch/kernel/sunxi-next/update-board-add-nanopi-neo-core2.patch
Normal file
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@ -0,0 +1,229 @@
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diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
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index c6fc096..731e2ae 100644
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--- a/arch/arm64/boot/dts/allwinner/Makefile
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+++ b/arch/arm64/boot/dts/allwinner/Makefile
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@@ -17,6 +17,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus.dtb
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dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus2.dtb
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dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo2.dtb
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dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo-plus2.dtb
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+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo-core2.dtb
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dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-m1-plus2.dtb
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dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-pine-h64.dtb
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-subdir-y := $(dts-dirs) overlay
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\ No newline at end of file
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+subdir-y := $(dts-dirs) overlay
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diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-core2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-core2.dts
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new file mode 100644
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index 0000000..80b6dec
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--- /dev/null
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+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-core2.dts
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@@ -0,0 +1,209 @@
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+/*
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+ * Copyright (C) 2017 Antony Antony <antony@phenome.org>
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+ * Copyright (C) 2016 ARM Ltd.
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+ *
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+ * This file is dual-licensed: you can use it either under the terms
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+ * of the GPL or the X11 license, at your option. Note that this dual
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+ * licensing only applies to this file, and not this project as a
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+ * whole.
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+ *
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+ * a) This file is free software; you can redistribute it and/or
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+ * modify it under the terms of the GNU General Public License as
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+ * published by the Free Software Foundation; either version 2 of the
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+ * License, or (at your option) any later version.
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+ *
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+ * This file is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ *
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+ * Or, alternatively,
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+ *
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+ * b) Permission is hereby granted, free of charge, to any person
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+ * obtaining a copy of this software and associated documentation
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+ * files (the "Software"), to deal in the Software without
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+ * restriction, including without limitation the rights to use,
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+ * copy, modify, merge, publish, distribute, sublicense, and/or
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+ * sell copies of the Software, and to permit persons to whom the
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+ * Software is furnished to do so, subject to the following
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+ * conditions:
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+ *
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+ * The above copyright notice and this permission notice shall be
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+ * included in all copies or substantial portions of the Software.
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+ *
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+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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+ * OTHER DEALINGS IN THE SOFTWARE.
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+ */
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+
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+/dts-v1/;
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+#include "sun50i-h5.dtsi"
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+
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+#include <dt-bindings/gpio/gpio.h>
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+#include <dt-bindings/input/input.h>
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+#include <dt-bindings/pinctrl/sun4i-a10.h>
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+
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+/ {
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+ model = "FriendlyARM NanoPi NEO Core2";
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+ compatible = "friendlyarm,nanopi-neo-core2", "allwinner,sun50i-h5";
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+
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+ aliases {
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+ ethernet0 = &emac;
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+ serial0 = &uart0;
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+ };
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+
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+ chosen {
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+ stdout-path = "serial0:115200n8";
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+ };
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+
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+ leds {
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+ compatible = "gpio-leds";
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+
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+ pwr {
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+ label = "nanopi:red:pwr";
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+ gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PL10 */
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+ linux,default-trigger = "default-on";
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+ };
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+
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+ status {
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+ label = "nanopi:green:status";
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+ gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>; /* PA10 */
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+ linux,default-trigger = "heartbeat";
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+ };
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+ };
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+
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+ reg_gmac_3v3: gmac-3v3 {
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+ compatible = "regulator-fixed";
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+ pinctrl-names = "default";
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+ regulator-name = "gmac-3v3";
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ startup-delay-us = <100000>;
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+ enable-active-high;
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+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
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+ };
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+
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+ reg_vcc3v3: vcc3v3 {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc3v3";
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ };
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+
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+ wifi_pwrseq: wifi_pwrseq {
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+ compatible = "mmc-pwrseq-simple";
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+ pinctrl-names = "default";
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+ reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
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+ post-power-on-delay-ms = <200>;
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+ };
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+};
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+
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+&cpu0 {
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+ cpu-supply = <&vdd_cpux>;
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+};
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+
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+&codec {
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+ allwinner,audio-routing =
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+ "Line Out", "LINEOUT",
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+ "MIC1", "Mic",
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+ "Mic", "MBIAS";
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+ status = "okay";
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+};
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+
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+&ehci0 {
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+ status = "okay";
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+};
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+
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+&ehci3 {
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+ status = "okay";
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+};
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+
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+&emac {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&emac_rgmii_pins>;
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+ phy-supply = <®_gmac_3v3>;
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+ phy-handle = <&ext_rgmii_phy>;
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+ phy-mode = "rgmii";
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+ status = "okay";
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+};
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+
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+&external_mdio {
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+ ext_rgmii_phy: ethernet-phy@7 {
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+ compatible = "ethernet-phy-ieee802.3-c22";
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+ reg = <7>;
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+ };
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+};
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+
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+&mmc0 {
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+ vmmc-supply = <®_vcc3v3>;
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+ bus-width = <4>;
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+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
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+ status = "okay";
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+};
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+
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+&mmc1 {
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+ vmmc-supply = <®_vcc3v3>;
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+ vqmmc-supply = <®_vcc3v3>;
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+ mmc-pwrseq = <&wifi_pwrseq>;
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+ bus-width = <4>;
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+ non-removable;
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+ status = "okay";
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+
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+ brcmf: wifi@1 {
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+ reg = <1>;
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+ compatible = "brcm,bcm4329-fmac";
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+ };
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+};
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+
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+&mmc2 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&mmc2_8bit_pins>;
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+ vmmc-supply = <®_vcc3v3>;
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+ bus-width = <8>;
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+ non-removable;
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+ cap-mmc-hw-reset;
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+ status = "okay";
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+};
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+
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+&ohci0 {
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+ status = "okay";
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+};
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+
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+&ohci3 {
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+ status = "okay";
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+};
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+
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+&r_i2c {
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+ status = "okay";
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+
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+ vdd_cpux: regulator@65 {
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+ compatible = "silergy,sy8106a";
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+ reg = <0x65>;
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+ regulator-min-microvolt = <1000000>;
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+ regulator-max-microvolt = <1400000>;
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+ regulator-ramp-delay = <200>;
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+ regulator-boot-on;
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+ regulator-always-on;
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+ };
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+};
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+
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+&uart0 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&uart0_pins_a>;
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+ status = "okay";
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+};
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+
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+&usb_otg {
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+ dr_mode = "host";
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+ status = "okay";
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+};
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+
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+&usbphy {
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+ /* USB Type-A ports' VBUS is always on */
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+ status = "okay";
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+};
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156
patch/u-boot/u-boot-sunxi/add-xx-nanopineocore2.patch
Normal file
156
patch/u-boot/u-boot-sunxi/add-xx-nanopineocore2.patch
Normal file
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@ -0,0 +1,156 @@
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diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
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index 6b064ad..2ef6fae 100644
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--- a/arch/arm/dts/Makefile
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+++ b/arch/arm/dts/Makefile
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@@ -378,6 +378,7 @@ dtb-$(CONFIG_MACH_SUN8I_V3S) += \
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sun8i-v3s-licheepi-zero.dtb
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dtb-$(CONFIG_MACH_SUN50I_H5) += \
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sun50i-h5-nanopi-neo-plus2.dtb \
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+ sun50i-h5-nanopi-neo-core2.dtb \
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sun50i-h5-nanopi-neo2.dtb \
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sun50i-h5-nanopi-neo-plus2.dtb \
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sun50i-h5-orangepi-zero-plus.dtb \
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diff --git a/arch/arm/dts/sun50i-h5-nanopi-neo-core2.dts b/arch/arm/dts/sun50i-h5-nanopi-neo-core2.dts
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new file mode 100644
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index 0000000..dd25549
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--- /dev/null
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+++ b/arch/arm/dts/sun50i-h5-nanopi-neo-core2.dts
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@@ -0,0 +1,113 @@
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+/*
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+ * Copyright (C) 2017 Antony Antony <antony@phenome.org>
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+ * Copyright (c) 2016 ARM Ltd.
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+ *
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+ * This file is dual-licensed: you can use it either under the terms
|
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+ * of the GPL or the X11 license, at your option. Note that this dual
|
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+ * licensing only applies to this file, and not this project as a
|
||||
+ * whole.
|
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+ *
|
||||
+ * a) This library is free software; you can redistribute it and/or
|
||||
+ * modify it under the terms of the GNU General Public License as
|
||||
+ * published by the Free Software Foundation; either version 2 of the
|
||||
+ * License, or (at your option) any later version.
|
||||
+ *
|
||||
+ * This library is distributed in the hope that it will be useful,
|
||||
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
+ * GNU General Public License for more details.
|
||||
+ *
|
||||
+ * Or, alternatively,
|
||||
+ *
|
||||
+ * b) Permission is hereby granted, free of charge, to any person
|
||||
+ * obtaining a copy of this software and associated documentation
|
||||
+ * files (the "Software"), to deal in the Software without
|
||||
+ * restriction, including without limitation the rights to use,
|
||||
+ * copy, modify, merge, publish, distribute, sublicense, and/or
|
||||
+ * sell copies of the Software, and to permit persons to whom the
|
||||
+ * Software is furnished to do so, subject to the following
|
||||
+ * conditions:
|
||||
+ *
|
||||
+ * The above copyright notice and this permission notice shall be
|
||||
+ * included in all copies or substantial portions of the Software.
|
||||
+ *
|
||||
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
|
||||
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
|
||||
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
+ * OTHER DEALINGS IN THE SOFTWARE.
|
||||
+ */
|
||||
+
|
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+/dts-v1/;
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+
|
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+#include "sun50i-h5.dtsi"
|
||||
+
|
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+#include <dt-bindings/gpio/gpio.h>
|
||||
+
|
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+/ {
|
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+ model = "FriendlyARM NanoPi NEO Core 2";
|
||||
+ compatible = "friendlyarm,nanopi-neo-core2", "allwinner,sun50i-h5";
|
||||
+
|
||||
+ aliases {
|
||||
+ serial0 = &uart0;
|
||||
+ };
|
||||
+
|
||||
+ chosen {
|
||||
+ stdout-path = "serial0:115200n8";
|
||||
+ };
|
||||
+
|
||||
+ memory {
|
||||
+ reg = <0x40000000 0x40000000>;
|
||||
+ };
|
||||
+
|
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+ reg_vcc3v3: vcc3v3 {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "vcc3v3";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&ehci1 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&mmc0 {
|
||||
+ compatible = "allwinner,sun50i-h5-mmc",
|
||||
+ "allwinner,sun50i-a64-mmc",
|
||||
+ "allwinner,sun5i-a13-mmc";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
|
||||
+ vmmc-supply = <®_vcc3v3>;
|
||||
+ bus-width = <4>;
|
||||
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>;
|
||||
+ cd-inverted;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&mmc2 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&mmc2_8bit_pins>;
|
||||
+ vmmc-supply = <®_vcc3v3>;
|
||||
+ bus-width = <8>;
|
||||
+ non-removable;
|
||||
+ cap-mmc-hw-reset;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&ohci1 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&uart0 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&uart0_pins_a>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usbphy {
|
||||
+ status = "okay";
|
||||
+};
|
||||
diff --git a/configs/nanopi_neo_core2_defconfig b/configs/nanopi_neo_core2_defconfig
|
||||
new file mode 100644
|
||||
index 0000000..4624ec3
|
||||
--- /dev/null
|
||||
+++ b/configs/nanopi_neo_core2_defconfig
|
||||
@@ -0,0 +1,19 @@
|
||||
+CONFIG_ARM=y
|
||||
+CONFIG_ARCH_SUNXI=y
|
||||
+CONFIG_MACH_SUN50I_H5=y
|
||||
+CONFIG_DRAM_CLK=624
|
||||
+CONFIG_DRAM_ZQ=3881977
|
||||
+CONFIG_MACPWR="PD6"
|
||||
+CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-nanopi-neo-core2"
|
||||
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
|
||||
+CONFIG_SPL=y
|
||||
+# CONFIG_CMD_IMLS is not set
|
||||
+# CONFIG_CMD_FLASH is not set
|
||||
+# CONFIG_CMD_FPGA is not set
|
||||
+# CONFIG_SPL_DOS_PARTITION is not set
|
||||
+# CONFIG_SPL_ISO_PARTITION is not set
|
||||
+# CONFIG_SPL_EFI_PARTITION is not set
|
||||
+CONFIG_SUN8I_EMAC=y
|
||||
+CONFIG_USB_EHCI_HCD=y
|
||||
+CONFIG_MMC_SUNXI_SLOT_EXTRA=2
|
||||
+CONFIG_SD_BOOT=y
|
||||
Loading…
Add table
Reference in a new issue