Lower DRAM clockspeed for H5 boards

For NEO2 please see https://irclog.whitequark.org/linux-sunxi/2017-04-15
This commit is contained in:
ThomasKaiser 2017-04-26 00:46:19 -07:00
parent 1356c293d4
commit f6875b1415
5 changed files with 6 additions and 6 deletions

View file

@ -9,7 +9,7 @@ index c73efd5..5783a72 100644
--- a/u-boot/configs/sun50i_h5_spl32_defconfig
+++ b/u-boot/configs/sun50i_h5_spl32_defconfig
@@ -4,12 +4,14 @@ CONFIG_MACH_SUN50I_H5_32=y
CONFIG_DRAM_CLK=672
CONFIG_DRAM_CLK=624
CONFIG_DRAM_ZQ=3881977
CONFIG_DRAM_ODT_EN=y
-# CONFIG_FIT is not set

View file

@ -8,7 +8,7 @@ index 0000000..6e550c8
+CONFIG_ARCH_SUNXI=y
+CONFIG_MACH_SUN50I_H5_64=y
+CONFIG_SPL=y
+CONFIG_DRAM_CLK=672
+CONFIG_DRAM_CLK=504
+CONFIG_DRAM_ZQ=3881977
+CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-nanopi2"
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set

View file

@ -181,7 +181,7 @@ index 0000000..68f889d
+CONFIG_ARCH_SUNXI=y
+CONFIG_MACH_SUN50I_H5_64=y
+CONFIG_SPL=y
+CONFIG_DRAM_CLK=672
+CONFIG_DRAM_CLK=624
+CONFIG_DRAM_ZQ=3881977
+CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-orangepi-prime"
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set

View file

@ -165,7 +165,7 @@ index 0000000..68f889d
+CONFIG_ARCH_SUNXI=y
+CONFIG_MACH_SUN50I_H5_64=y
+CONFIG_SPL=y
+CONFIG_DRAM_CLK=672
+CONFIG_DRAM_CLK=624
+CONFIG_DRAM_ZQ=3881977
+CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-orangepi-zeroplus"
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
@ -173,7 +173,7 @@ index 0000000..68f889d
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_SUN8I_EMAC=y
+CONFIG_MMC_SUNXI_SLOT_EXTRA=2
+CONFIG_USB_EHCI_HCD=y
+CONFIG_VIDEO=y
+CONFIG_VIDEO_COMPOSITE=y

View file

@ -193,7 +193,7 @@ index 0000000..68f889d
+CONFIG_ARCH_SUNXI=y
+CONFIG_MACH_SUN50I_H5_64=y
+CONFIG_SPL=y
+CONFIG_DRAM_CLK=672
+CONFIG_DRAM_CLK=624
+CONFIG_DRAM_ZQ=3881977
+CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-nanopim1plus2"
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set