From ce42cfc82f47d90515d11c985063d6a535bfd9d7 Mon Sep 17 00:00:00 2001 From: Jerome Brunet Date: Thu, 30 Mar 2017 15:19:04 +0200 Subject: [PATCH] ARM64: dts: meson-gx: add audio controller nodes Add audio controller nodes for Amlogic meson gxbb and gxl. This includes the audio-core node, the i2s and spdif DAIs Audio on this SoC family is still a work in progress. More nodes are likely to be added later on (pcm DAIs, input DMAs, etc ...) Signed-off-by: Jerome Brunet --- arch/arm64/boot/dts/amlogic/meson-gx.dtsi | 23 +++++++++++++++++ arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 28 +++++++++++++++++++++ arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 28 +++++++++++++++++++++ 3 files changed, 79 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi index f1e5cdbade5e..bcef1d2f6367 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi @@ -203,6 +203,29 @@ #reset-cells = <1>; }; + audio: audio@5400 { + compatible = "amlogic,meson-gx-audio-core"; + reg = <0x0 0x5400 0x0 0x2ac>, + <0x0 0xa000 0x0 0x304>; + reg-names = "aiu", "audin"; + status = "disabled"; + + aiu_i2s: audio-controller-0 { + #sound-dai-cells = <0>; + compatible = "amlogic,meson-aiu-i2s"; + interrupts = ; + status = "disabled"; + }; + + aiu_spdif: audio-controller-1 { + #sound-dai-cells = <0>; + compatible = "amlogic,meson-aiu-spdif"; + interrupts = ; + status = "disabled"; + }; + + }; + uart_A: serial@84c0 { compatible = "amlogic,meson-gx-uart"; reg = <0x0 0x84c0 0x0 0x18>; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi index 1ade7e486828..2c17cd2d732e 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi @@ -659,6 +659,24 @@ }; }; +&audio { + clocks = <&clkc CLKID_AIU>, + <&clkc CLKID_AIU_GLUE>, + <&clkc CLKID_I2S_SPDIF>; + clock-names = "aiu_top", "aiu_glue", "audin"; + resets = <&reset RESET_AIU>, + <&reset RESET_AUDIN>; + reset-names = "aiu", "audin"; +}; + +&aiu_i2s { + clocks = <&clkc CLKID_I2S_OUT>, + <&clkc CLKID_MIXER_IFACE>, + <&clkc CLKID_AOCLK_GATE>, + <&clkc CLKID_CTS_AMCLK>; + clock-names = "fast", "iface", "bclks", "mclk"; +}; + &pwrc_vpu { resets = <&reset RESET_VIU>, <&reset RESET_VENC>, @@ -741,6 +759,15 @@ num-cs = <1>; }; +&aiu_spdif { + clocks = <&clkc CLKID_IEC958>, + <&clkc CLKID_IEC958_GATE>, + <&clkc CLKID_CTS_MCLK_I958>, + <&clkc CLKID_CTS_AMCLK>, + <&clkc CLKID_CTS_I958>; + clock-names = "fast", "iface", "mclk_i958", "mclk_i2s", "mclk"; +}; + &spifc { clocks = <&clkc CLKID_SPI>; }; @@ -774,3 +801,4 @@ compatible = "amlogic,meson-gxbb-vpu", "amlogic,meson-gx-vpu"; power-domains = <&pwrc_vpu>; }; + diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi index 8f0bb3c44bd6..ad0f5448ad64 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi @@ -660,6 +660,24 @@ }; }; +&audio { + clocks = <&clkc CLKID_AIU>, + <&clkc CLKID_AIU_GLUE>, + <&clkc CLKID_I2S_SPDIF>; + clock-names = "aiu_top", "aiu_glue", "audin"; + resets = <&reset RESET_AIU>, + <&reset RESET_AUDIN>; + reset-names = "aiu", "audin"; +}; + +&aiu_i2s { + clocks = <&clkc CLKID_I2S_OUT>, + <&clkc CLKID_MIXER_IFACE>, + <&clkc CLKID_AOCLK_GATE>, + <&clkc CLKID_CTS_AMCLK>; + clock-names = "fast", "iface", "bclks", "mclk"; +}; + &pwrc_vpu { resets = <&reset RESET_VIU>, <&reset RESET_VENC>, @@ -742,6 +760,15 @@ num-cs = <1>; }; +&aiu_spdif { + clocks = <&clkc CLKID_IEC958>, + <&clkc CLKID_IEC958_GATE>, + <&clkc CLKID_CTS_MCLK_I958>, + <&clkc CLKID_CTS_AMCLK>, + <&clkc CLKID_CTS_I958>; + clock-names = "fast", "iface", "mclk_i958", "mclk_i2s", "mclk"; +}; + &spifc { clocks = <&clkc CLKID_SPI>; }; @@ -775,3 +802,4 @@ compatible = "amlogic,meson-gxl-vpu", "amlogic,meson-gx-vpu"; power-domains = <&pwrc_vpu>; }; +