mirror of
https://github.com/Fishwaldo/build.git
synced 2025-07-11 23:48:30 +00:00
662 lines
14 KiB
Diff
662 lines
14 KiB
Diff
diff --git a/arch/arm/boot/dts/overlay/Makefile b/arch/arm/boot/dts/overlay/Makefile
|
|
new file mode 100755
|
|
index 000000000..e39fd5d37
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlay/Makefile
|
|
@@ -0,0 +1,24 @@
|
|
+# SPDX-License-Identifier: GPL-2.0
|
|
+dtbo-$(CONFIG_ARCH_ROCKCHIP) += \
|
|
+ rk322x-emmc.dtbo \
|
|
+ rk322x-nand.dtbo \
|
|
+ rk322x-emmc-nand.dtbo \
|
|
+ rk322x-led-conf1.dtbo \
|
|
+ rk322x-led-conf2.dtbo \
|
|
+ rk322x-led-conf3.dtbo \
|
|
+ rk322x-led-conf4.dtbo \
|
|
+ rk322x-cpu-hs.dtbo \
|
|
+ rk322x-wlan-alt-wiring.dtbo \
|
|
+ rk322x-cpu-stability.dtbo
|
|
+
|
|
+scr-$(CONFIG_ARCH_ROCKCHIP) += \
|
|
+ rk322x-fixup.scr
|
|
+
|
|
+dtbotxt-$(CONFIG_ARCH_ROCKCHIP) += \
|
|
+ README.rk322x-overlays
|
|
+
|
|
+targets += $(dtbo-y) $(scr-y) $(dtbotxt-y)
|
|
+
|
|
+always := $(dtbo-y) $(scr-y) $(dtbotxt-y)
|
|
+clean-files := *.dtbo *.scr
|
|
+
|
|
diff --git a/arch/arm/boot/dts/overlay/README.rk322x-overlays b/arch/arm/boot/dts/overlay/README.rk322x-overlays
|
|
new file mode 100755
|
|
index 000000000..e4ea2f573
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlay/README.rk322x-overlays
|
|
@@ -0,0 +1,68 @@
|
|
+This document describes overlays provided in the kernel packages
|
|
+For generic Armbian overlays documentation please see
|
|
+https://docs.armbian.com/User-Guide_Allwinner_overlays/
|
|
+
|
|
+### Platform:
|
|
+
|
|
+rk322x (Rockchip)
|
|
+
|
|
+### Provided overlays:
|
|
+
|
|
+- rk322x-cpu-hs
|
|
+- rk322x-cpu-stability
|
|
+- rk322x-emmc
|
|
+- rk322x-nand
|
|
+- rk322x-emmc-nand
|
|
+- rk322x-led1-low
|
|
+- rk322x-led1-high
|
|
+- rk322x-led2-low
|
|
+- rk322x-led2-high
|
|
+- rk322x-wlan-alt-wiring
|
|
+
|
|
+### Overlay details:
|
|
+
|
|
+### rk322x-cpu-hs
|
|
+
|
|
+Activates higher CPU speed (up to 1.4ghz) for rk3228b/rk3229 boxes
|
|
+
|
|
+### rk322x-cpu-stability
|
|
+
|
|
+Increases the voltage of the lowest operating point to increase stability
|
|
+on some boards which have power regulation issues. Also adds a settling
|
|
+time to allow power regulator stabilize voltage.
|
|
+
|
|
+### emmc
|
|
+
|
|
+Activates onboard emmc device node and deactivates the nand controller.
|
|
+Also sets up the pin controller default pull up/down configuration
|
|
+
|
|
+### nand
|
|
+
|
|
+Activates onboard nand device node and deactivates the emmc controller.
|
|
+Also sets up the pin controller default pull up/down configuration
|
|
+
|
|
+### emmc-nand
|
|
+
|
|
+Activates onboard nand and emmc devices. Usually they are alternative
|
|
+because manufacturers share the same pads so emmc and nand cannot be
|
|
+mixed together. Usually this works because the emmc and nand drivers
|
|
+can automatically guess what's in the pads, but may bring instabilities
|
|
+or misdetections. Also does not set up the pin controller default
|
|
+configuration, which in turn can be detrimental of stability and
|
|
+performance
|
|
+
|
|
+### rk322x-led-conf*
|
|
+
|
|
+Each device tree of this kind provides a different known wiring configuration
|
|
+(ie: gpio and active low/high) of the onboard leds. Each board manufacturer
|
|
+usually choose a different GPIO for the auxiliary led, but the main "working"
|
|
+led is always wired to the same gpio (although it may be active high or low)
|
|
+led-conf1 is commonly found in boards made by Chiptrip manufacturer
|
|
+led-conf2 is found in other boards with R329Q and MXQ_RK3229 marking
|
|
+led-conf3 is found in boards with R28-MXQ marking
|
|
+led-conf4 is found on boards with T066 marking
|
|
+
|
|
+### rk322x-alt-wiring
|
|
+
|
|
+Some boards have different SDIO wiring setup for wifi chips. This overlay
|
|
+enables the different pin controller wiring and power enable
|
|
diff --git a/arch/arm/boot/dts/overlay/rk322x-cpu-hs.dts b/arch/arm/boot/dts/overlay/rk322x-cpu-hs.dts
|
|
new file mode 100755
|
|
index 000000000..1c2fc79e1
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlay/rk322x-cpu-hs.dts
|
|
@@ -0,0 +1,28 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&cpu0_opp_table>;
|
|
+ __overlay__ {
|
|
+
|
|
+ opp-1296000000 {
|
|
+ opp-hz = /bits/ 64 <1296000000>;
|
|
+ opp-microvolt = <1325000 1325000 1400000>;
|
|
+ };
|
|
+ opp-1392000000 {
|
|
+ opp-hz = /bits/ 64 <1392000000>;
|
|
+ opp-microvolt = <1350000 1350000 1400000>;
|
|
+ };
|
|
+ /*
|
|
+ opp-1464000000 {
|
|
+ opp-hz = /bits/ 64 <1464000000>;
|
|
+ opp-microvolt = <1400000 1400000 1400000>;
|
|
+ };
|
|
+ */
|
|
+
|
|
+ };
|
|
+ };
|
|
+
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlay/rk322x-cpu-stability.dts b/arch/arm/boot/dts/overlay/rk322x-cpu-stability.dts
|
|
new file mode 100644
|
|
index 000000000..f434af926
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlay/rk322x-cpu-stability.dts
|
|
@@ -0,0 +1,52 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+
|
|
+ /*
|
|
+ Device tree overlay that tries to overcome issues on power regulators (expecially ARM
|
|
+ power regulator) increasing lowest voltage and adding settling time to allow voltage
|
|
+ stabilization
|
|
+ */
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&cpu0_opp_table>;
|
|
+ __overlay__ {
|
|
+
|
|
+ /*
|
|
+ Increase 600 and 800 Mhz operating points voltage to decrease the range
|
|
+ between minimum and maximum voltages
|
|
+ */
|
|
+ opp-600000000 {
|
|
+ opp-hz = /bits/ 64 <600000000>;
|
|
+ opp-microvolt = <1100000>;
|
|
+ };
|
|
+
|
|
+ opp-816000000 {
|
|
+ opp-hz = /bits/ 64 <816000000>;
|
|
+ opp-microvolt = <1100000>;
|
|
+ };
|
|
+
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&vdd_arm>;
|
|
+ __overlay__ {
|
|
+
|
|
+ regulator-ramp-delay = <300>; // 30 uV/us, so 0.3v transition settling time is 1ms
|
|
+
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&vdd_log>;
|
|
+ __overlay__ {
|
|
+
|
|
+ regulator-ramp-delay = <600>; // 600 uV/us, so 0,3v transition settling time is 0.5ms
|
|
+
|
|
+ };
|
|
+
|
|
+ };
|
|
+
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlay/rk322x-emmc-nand.dts b/arch/arm/boot/dts/overlay/rk322x-emmc-nand.dts
|
|
new file mode 100755
|
|
index 000000000..9b273bf75
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlay/rk322x-emmc-nand.dts
|
|
@@ -0,0 +1,22 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&emmc>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ mmc-ddr-1_8v;
|
|
+ rockchip,default-sample-phase = <180>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&nfc>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlay/rk322x-emmc.dts b/arch/arm/boot/dts/overlay/rk322x-emmc.dts
|
|
new file mode 100755
|
|
index 000000000..10b2f0f0d
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlay/rk322x-emmc.dts
|
|
@@ -0,0 +1,24 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&emmc>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8 &emmc_pwr &emmc_rst>;
|
|
+ mmc-ddr-1_8v;
|
|
+ rockchip,default-sample-phase = <180>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&nfc>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlay/rk322x-fixup.scr-cmd b/arch/arm/boot/dts/overlay/rk322x-fixup.scr-cmd
|
|
new file mode 100755
|
|
index 000000000..d4c39e20a
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlay/rk322x-fixup.scr-cmd
|
|
@@ -0,0 +1,4 @@
|
|
+# overlays fixup script
|
|
+# implements (or rather substitutes) overlay arguments functionality
|
|
+# using u-boot scripting, environment variables and "fdt" command
|
|
+
|
|
diff --git a/arch/arm/boot/dts/overlay/rk322x-led-conf1.dts b/arch/arm/boot/dts/overlay/rk322x-led-conf1.dts
|
|
new file mode 100755
|
|
index 000000000..6846109d3
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlay/rk322x-led-conf1.dts
|
|
@@ -0,0 +1,64 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+#include <dt-bindings/gpio/gpio.h>
|
|
+#include <dt-bindings/input/input.h>
|
|
+#include <dt-bindings/pinctrl/rockchip.h>
|
|
+
|
|
+/ {
|
|
+
|
|
+ fragment@0 {
|
|
+ target-path = "/gpio-leds";
|
|
+ __overlay__ {
|
|
+
|
|
+ working {
|
|
+ gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
|
|
+ linux,default-trigger = "none";
|
|
+ };
|
|
+
|
|
+ auxiliary {
|
|
+ gpios = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>;
|
|
+ label = "auxiliary";
|
|
+ linux,default-trigger = "mmc2";
|
|
+ default-state = "off";
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&gpio_led_aux>;
|
|
+ };
|
|
+
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target-path = "/pinctrl/gpio";
|
|
+ __overlay__ {
|
|
+
|
|
+ gpio_led_aux: gpio-led-aux {
|
|
+ rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+
|
|
+ reset_key: reset-key {
|
|
+ rockchip,pins = <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
+ };
|
|
+
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&gpio_keys>;
|
|
+ __overlay__ {
|
|
+
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&reset_key>;
|
|
+
|
|
+ reset {
|
|
+ gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_LOW>;
|
|
+ label = "reset";
|
|
+ linux,code = <KEY_RESTART>;
|
|
+ debounce-interval = <200>;
|
|
+ wakeup-source;
|
|
+ };
|
|
+
|
|
+ };
|
|
+ };
|
|
+
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlay/rk322x-led-conf2.dts b/arch/arm/boot/dts/overlay/rk322x-led-conf2.dts
|
|
new file mode 100755
|
|
index 000000000..40bdd5421
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlay/rk322x-led-conf2.dts
|
|
@@ -0,0 +1,64 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+#include <dt-bindings/gpio/gpio.h>
|
|
+#include <dt-bindings/input/input.h>
|
|
+#include <dt-bindings/pinctrl/rockchip.h>
|
|
+
|
|
+/ {
|
|
+
|
|
+ fragment@0 {
|
|
+ target-path = "/gpio-leds";
|
|
+ __overlay__ {
|
|
+
|
|
+ working {
|
|
+ gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_LOW>;
|
|
+ linux,default-trigger = "none";
|
|
+ };
|
|
+
|
|
+ auxiliary {
|
|
+ gpios = <&gpio1 RK_PA7 GPIO_ACTIVE_LOW>;
|
|
+ label = "auxiliary";
|
|
+ linux,default-trigger = "mmc2";
|
|
+ default-state = "off";
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&gpio_led_aux>;
|
|
+ };
|
|
+
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target-path = "/pinctrl/gpio";
|
|
+ __overlay__ {
|
|
+
|
|
+ gpio_led_aux: gpio-led-aux {
|
|
+ rockchip,pins = <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+
|
|
+ reset_key: reset-key {
|
|
+ rockchip,pins = <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
+ };
|
|
+
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&gpio_keys>;
|
|
+ __overlay__ {
|
|
+
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&reset_key>;
|
|
+
|
|
+ reset {
|
|
+ gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_LOW>;
|
|
+ label = "reset";
|
|
+ linux,code = <KEY_RESTART>;
|
|
+ debounce-interval = <200>;
|
|
+ wakeup-source;
|
|
+ };
|
|
+
|
|
+ };
|
|
+ };
|
|
+
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlay/rk322x-led-conf3.dts b/arch/arm/boot/dts/overlay/rk322x-led-conf3.dts
|
|
new file mode 100755
|
|
index 000000000..03c99ef8b
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlay/rk322x-led-conf3.dts
|
|
@@ -0,0 +1,64 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+#include <dt-bindings/gpio/gpio.h>
|
|
+#include <dt-bindings/input/input.h>
|
|
+#include <dt-bindings/pinctrl/rockchip.h>
|
|
+
|
|
+/ {
|
|
+
|
|
+ fragment@0 {
|
|
+ target-path = "/gpio-leds";
|
|
+ __overlay__ {
|
|
+
|
|
+ working {
|
|
+ gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
|
|
+ linux,default-trigger = "none";
|
|
+ };
|
|
+
|
|
+ auxiliary {
|
|
+ gpios = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>;
|
|
+ label = "auxiliary";
|
|
+ linux,default-trigger = "mmc2";
|
|
+ default-state = "off";
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&gpio_led_aux>;
|
|
+ };
|
|
+
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target-path = "/pinctrl/gpio";
|
|
+ __overlay__ {
|
|
+
|
|
+ gpio_led_aux: gpio-led-aux {
|
|
+ rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+
|
|
+ reset_key: reset-key {
|
|
+ rockchip,pins = <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
+ };
|
|
+
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&gpio_keys>;
|
|
+ __overlay__ {
|
|
+
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&reset_key>;
|
|
+
|
|
+ reset {
|
|
+ gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_LOW>;
|
|
+ label = "reset";
|
|
+ linux,code = <KEY_RESTART>;
|
|
+ debounce-interval = <200>;
|
|
+ wakeup-source;
|
|
+ };
|
|
+
|
|
+ };
|
|
+ };
|
|
+
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlay/rk322x-led-conf4.dts b/arch/arm/boot/dts/overlay/rk322x-led-conf4.dts
|
|
new file mode 100644
|
|
index 000000000..0ebd846eb
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlay/rk322x-led-conf4.dts
|
|
@@ -0,0 +1,81 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+#include <dt-bindings/gpio/gpio.h>
|
|
+#include <dt-bindings/input/input.h>
|
|
+#include <dt-bindings/pinctrl/rockchip.h>
|
|
+
|
|
+/ {
|
|
+
|
|
+ fragment@0 {
|
|
+ target-path = "/gpio-leds";
|
|
+ __overlay__ {
|
|
+
|
|
+ working {
|
|
+ gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_HIGH>;
|
|
+ linux,default-trigger = "none";
|
|
+ };
|
|
+
|
|
+ auxiliary {
|
|
+ gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_HIGH>;
|
|
+ label = "auxiliary";
|
|
+ linux,default-trigger = "mmc2";
|
|
+ default-state = "off";
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&gpio_led_aux>;
|
|
+ };
|
|
+
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target-path = "/pinctrl/gpio";
|
|
+ __overlay__ {
|
|
+
|
|
+ gpio_led_working: gpio-led-working {
|
|
+ rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+
|
|
+ gpio_led_aux: gpio-led-aux {
|
|
+ rockchip,pins = <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&gpio_keys>;
|
|
+ __overlay__ {
|
|
+
|
|
+ reset {
|
|
+ gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_LOW>;
|
|
+ label = "reset";
|
|
+ linux,code = <KEY_RESTART>;
|
|
+ debounce-interval = <200>;
|
|
+ wakeup-source;
|
|
+ };
|
|
+
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target = <&sdio_pwrseq>;
|
|
+ __overlay__ {
|
|
+
|
|
+ reset-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>; /* GPIO2_D3 */
|
|
+
|
|
+ };
|
|
+
|
|
+ };
|
|
+
|
|
+ fragment@4 {
|
|
+ target = <&wifi_enable_h>;
|
|
+ __overlay__ {
|
|
+
|
|
+ rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+
|
|
+ };
|
|
+
|
|
+ };
|
|
+
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlay/rk322x-nand.dts b/arch/arm/boot/dts/overlay/rk322x-nand.dts
|
|
new file mode 100755
|
|
index 000000000..2a939ab49
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlay/rk322x-nand.dts
|
|
@@ -0,0 +1,22 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&nfc>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ pinctrl-0 = <&flash_cs0 &flash_cs1 &flash_cs2 &flash_cs3 &flash_rdy &flash_ale &flash_cle &flash_wrn &flash_bus8 &flash_dqs &flash_wp>;
|
|
+ pinctrl-names = "default";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&emmc>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlay/rk322x-wlan-alt-wiring.dts b/arch/arm/boot/dts/overlay/rk322x-wlan-alt-wiring.dts
|
|
new file mode 100755
|
|
index 000000000..f04c9ac16
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlay/rk322x-wlan-alt-wiring.dts
|
|
@@ -0,0 +1,67 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+#include <dt-bindings/gpio/gpio.h>
|
|
+#include <dt-bindings/pinctrl/rockchip.h>
|
|
+
|
|
+/ {
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&pinctrl>;
|
|
+ __overlay__ {
|
|
+
|
|
+ pcfg_pull_none_drv_4ma: pcfg-pull-none-drv-4ma {
|
|
+ bias-disable;
|
|
+ drive-strength = <0x04>;
|
|
+ };
|
|
+
|
|
+ pcfg_pull_up_drv_4ma: pcfg-pull-up-drv-4ma {
|
|
+ bias-pull-up;
|
|
+ drive-strength = <0x04>;
|
|
+ };
|
|
+
|
|
+ sdio {
|
|
+ sdio_clk: sdio-clk {
|
|
+ rockchip,pins = <1 0 1 &pcfg_pull_none_drv_4ma>;
|
|
+ };
|
|
+
|
|
+ sdio_cmd: sdio-cmd {
|
|
+ rockchip,pins = <0 3 2 &pcfg_pull_up_drv_4ma>;
|
|
+ };
|
|
+
|
|
+ sdio_bus4: sdio-bus4 {
|
|
+ rockchip,pins = <1 1 1 &pcfg_pull_up_drv_4ma>,
|
|
+ <1 2 1 &pcfg_pull_up_drv_4ma>,
|
|
+ <1 4 1 &pcfg_pull_up_drv_4ma>,
|
|
+ <1 5 1 &pcfg_pull_up_drv_4ma>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ };
|
|
+
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&sdio_pwrseq>;
|
|
+ __overlay__ {
|
|
+ reset-gpios = <&gpio2 RK_PD5 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&wifi_enable_h>;
|
|
+ __overlay__ {
|
|
+ rockchip,pins = <2 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target = <&sdio>;
|
|
+ __overlay__ {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sdio_clk &sdio_cmd &sdio_bus4>;
|
|
+ };
|
|
+
|
|
+ };
|
|
+
|
|
+};
|