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03f380178d
* Move Meson64 to 5.6.y * Move Meson64 U-boot to 2020.04 Tested on Odroid C2 * Merge, replace and update patches from Khadas branch
110 lines
3.2 KiB
Diff
110 lines
3.2 KiB
Diff
From 842a328b53d5ebb7dc6a63a15a9e15935aac55b0 Mon Sep 17 00:00:00 2001
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From: Jianxin Pan <jianxin.pan@amlogic.com>
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Date: Wed, 15 Jan 2020 19:30:29 +0800
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Subject: [PATCH 028/101] FROMGIT: dt-bindings: power: add Amlogic secure power
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domains bindings
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Add the bindings for the Amlogic Secure power domains, controlling the
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secure power domains.
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The bindings targets the Amlogic A1 and C1 compatible SoCs, in which the
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power domain registers are in secure world.
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Signed-off-by: Jianxin Pan <jianxin.pan@amlogic.com>
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Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Reviewed-by: Rob Herring <robh@kernel.org>
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Link: https://lore.kernel.org/r/1579087831-94965-3-git-send-email-jianxin.pan@amlogic.com
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---
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.../power/amlogic,meson-sec-pwrc.yaml | 40 +++++++++++++++++++
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include/dt-bindings/power/meson-a1-power.h | 32 +++++++++++++++
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2 files changed, 72 insertions(+)
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create mode 100644 Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml
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create mode 100644 include/dt-bindings/power/meson-a1-power.h
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diff --git a/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml b/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml
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new file mode 100644
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index 000000000000..af32209218bb
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--- /dev/null
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+++ b/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml
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@@ -0,0 +1,40 @@
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+# SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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+# Copyright (c) 2019 Amlogic, Inc
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+# Author: Jianxin Pan <jianxin.pan@amlogic.com>
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+%YAML 1.2
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+---
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+$id: "http://devicetree.org/schemas/power/amlogic,meson-sec-pwrc.yaml#"
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+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
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+
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+title: Amlogic Meson Secure Power Domains
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+
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+maintainers:
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+ - Jianxin Pan <jianxin.pan@amlogic.com>
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+
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+description: |+
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+ Secure Power Domains used in Meson A1/C1 SoCs, and should be the child node
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+ of secure-monitor.
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+
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+properties:
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+ compatible:
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+ enum:
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+ - amlogic,meson-a1-pwrc
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+
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+ "#power-domain-cells":
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+ const: 1
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+
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+required:
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+ - compatible
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+ - "#power-domain-cells"
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+
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+examples:
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+ - |
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+ secure-monitor {
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+ compatible = "amlogic,meson-gxbb-sm";
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+
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+ pwrc: power-controller {
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+ compatible = "amlogic,meson-a1-pwrc";
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+ #power-domain-cells = <1>;
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+ };
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+ }
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+
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diff --git a/include/dt-bindings/power/meson-a1-power.h b/include/dt-bindings/power/meson-a1-power.h
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new file mode 100644
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index 000000000000..6cf50bfb8ccf
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--- /dev/null
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+++ b/include/dt-bindings/power/meson-a1-power.h
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@@ -0,0 +1,32 @@
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+/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */
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+/*
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+ * Copyright (c) 2019 Amlogic, Inc.
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+ * Author: Jianxin Pan <jianxin.pan@amlogic.com>
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+ */
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+
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+#ifndef _DT_BINDINGS_MESON_A1_POWER_H
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+#define _DT_BINDINGS_MESON_A1_POWER_H
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+
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+#define PWRC_DSPA_ID 8
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+#define PWRC_DSPB_ID 9
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+#define PWRC_UART_ID 10
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+#define PWRC_DMC_ID 11
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+#define PWRC_I2C_ID 12
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+#define PWRC_PSRAM_ID 13
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+#define PWRC_ACODEC_ID 14
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+#define PWRC_AUDIO_ID 15
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+#define PWRC_OTP_ID 16
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+#define PWRC_DMA_ID 17
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+#define PWRC_SD_EMMC_ID 18
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+#define PWRC_RAMA_ID 19
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+#define PWRC_RAMB_ID 20
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+#define PWRC_IR_ID 21
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+#define PWRC_SPICC_ID 22
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+#define PWRC_SPIFC_ID 23
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+#define PWRC_USB_ID 24
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+#define PWRC_NIC_ID 25
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+#define PWRC_PDMIN_ID 26
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+#define PWRC_RSA_ID 27
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+#define PWRC_MAX_ID 28
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+
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+#endif
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--
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2.17.1
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