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150ac0c2af
AR-1 - Adding support category for distributions AR-4 - Remove Allwinner legacy AR-5 - Drop Udoo family and move Udoo board into newly created imx6 family AR-9 - Rename sunxi-next to sunxi-legacy AR-10 - Rename sunxi-dev to sunxi-current AR-11 - Adding Radxa Rockpi S support AR-13 - Rename rockchip64-default to rockchip64-legacy AR-14 - Add rockchip64-current as mainline source AR-15 - Drop Rockchip 4.19.y NEXT, current become 5.3.y AR-16 - Rename RK3399 default to legacy AR-17 - Rename Odroid XU4 next and default to legacy 4.14.y, add DEV 5.4.y AR-18 - Add Odroid N2 current mainline AR-19 - Move Odroid C1 to meson family AR-20 - Rename mvebu64-default to mvebu64-legacy AR-21 - Rename mvebu-default to mvebu-legacy AR-22 - Rename mvebu-next to mvebu-current AR-23 - Drop meson64 default and next, current becomes former DEV 5.3.y AR-24 - Drop cubox family and move Cubox/Hummingboard boards under imx6 AR-26 - Adjust motd AR-27 - Enabling distribution release status AR-28 - Added new GCC compilers AR-29 - Implementing Ubuntu Eoan AR-30 - Add desktop packages per board or family AR-31 - Remove (Ubuntu/Debian) distribution name from image filename AR-32 - Move arch configs from configuration.sh to separate arm64 and armhf config files AR-33 - Revision numbers for beta builds changed to day_in_the_year AR-34 - Patches support linked patches AR-35 - Break meson64 family into gxbb and gxl AR-36 - Add Nanopineo2 Black AR-38 - Upgrade option from old branches to new one via armbian-config AR-41 - Show full timezone info AR-43 - Merge Odroid N2 to meson64 AR-44 - Enable FORCE_BOOTSCRIPT_UPDATE for all builds
75 lines
2.3 KiB
Diff
75 lines
2.3 KiB
Diff
Some boards like the Turris Omnia have an RTC chip that does not get
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initialized. Initializing the RTC at the driver level helps get rid of
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bootloader hacks that write special register values.
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--- a/drivers/rtc/rtc-armada38x.c
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+++ b/drivers/rtc/rtc-armada38x.c
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@@ -30,7 +30,10 @@
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#define RTC_IRQ_FREQ_1HZ BIT(2)
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#define RTC_CCR 0x18
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#define RTC_CCR_MODE BIT(15)
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+#define RTC_CCR_NORMAL_PPB 0x2000
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#define RTC_CONF_TEST 0x1C
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+#define RTC_TEST_CONF 0x1c
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+#define RTC_TEST_CONF_MASK 0xff
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#define RTC_NOMINAL_TIMING BIT(13)
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#define RTC_TIME 0xC
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@@ -91,6 +94,7 @@ struct armada38x_rtc_data {
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void (*clear_isr)(struct armada38x_rtc *rtc);
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void (*unmask_interrupt)(struct armada38x_rtc *rtc);
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u32 alarm;
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+ void (*init_rtc)(struct armada38x_rtc *rtc);
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};
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/*
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@@ -202,6 +206,23 @@ static void armada38x_unmask_interrupt(s
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writel(val | SOC_RTC_ALARM1_MASK, rtc->regs_soc + SOC_RTC_INTERRUPT);
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}
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+static void armada38x_rtc_init(struct armada38x_rtc *rtc)
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+{
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+ u32 reg;
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+
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+ /* Test RTC test configuration register bits [7:0] */
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+ reg = readl(rtc->regs + RTC_TEST_CONF);
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+ /* If bits [7:0] are non-zero, assume RTC was uninitialized */
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+ if (reg & RTC_TEST_CONF_MASK) {
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+ rtc_delayed_write(0, rtc, RTC_TEST_CONF);
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+ rtc_delayed_write(0, rtc, RTC_TIME);
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+ rtc_delayed_write((RTC_STATUS_ALARM1 | RTC_STATUS_ALARM2),
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+ rtc, RTC_STATUS);
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+ rtc_delayed_write(RTC_CCR_NORMAL_PPB, rtc, RTC_CCR);
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+ }
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+ return;
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+}
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+
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static void armada8k_clear_isr(struct armada38x_rtc *rtc)
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{
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writel(RTC_8K_ALARM2, rtc->regs_soc + RTC_8K_ISR);
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@@ -464,6 +485,7 @@ static const struct armada38x_rtc_data a
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.clear_isr = armada38x_clear_isr,
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.unmask_interrupt = armada38x_unmask_interrupt,
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.alarm = ALARM1,
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+ .init_rtc = armada38x_rtc_init,
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};
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static const struct armada38x_rtc_data armada8k_data = {
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@@ -558,6 +580,17 @@ static __init int armada38x_rtc_probe(st
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dev_err(&pdev->dev, "Failed to register RTC device: %d\n", ret);
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return ret;
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}
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+
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+ /*
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+ * Try to detect if RTC is in uninitialized state.
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+ * It is not definitive to know if the RTC is in an uninialized state or not,
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+ * but the following call will read some bits in the RTC unit and guess if
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+ * if it's in that state, and accordingly set it to sane default values.
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+ */
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+ if (rtc->data->init_rtc) {
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+ rtc->data->init_rtc(rtc);
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+ }
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+
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return 0;
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}
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