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49 lines
1.9 KiB
Diff
49 lines
1.9 KiB
Diff
From 9faac4dec35ecb92a6eb348a0904b5484b89df72 Mon Sep 17 00:00:00 2001
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From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
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Date: Tue, 17 Jan 2017 10:29:09 +0200
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Subject: [PATCH 29/93] drm: bridge: dw-hdmi: Assert SVSRET before resetting
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the PHY
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According to the PHY IP core vendor, the SVSRET signal must be asserted
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before resetting the PHY. Tests on RK3288 and R-Car Gen3 showed no
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regression, the change should thus be safe.
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Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
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Reviewed-by: Jose Abreu <joabreu@synopsys.com>
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Signed-off-by: Archit Taneja <architt@codeaurora.org>
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Link: http://patchwork.freedesktop.org/patch/msgid/20170117082910.27023-20-laurent.pinchart+renesas@ideasonboard.com
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---
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drivers/gpu/drm/bridge/dw-hdmi.c | 10 +++++-----
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1 file changed, 5 insertions(+), 5 deletions(-)
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diff --git a/drivers/gpu/drm/bridge/dw-hdmi.c b/drivers/gpu/drm/bridge/dw-hdmi.c
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index 93e8816..4fda071 100644
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--- a/drivers/gpu/drm/bridge/dw-hdmi.c
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+++ b/drivers/gpu/drm/bridge/dw-hdmi.c
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@@ -986,6 +986,10 @@ static int hdmi_phy_configure(struct dw_hdmi *hdmi, int cscon)
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/* gen2 pddq */
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dw_hdmi_phy_gen2_pddq(hdmi, 1);
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+ /* Leave low power consumption mode by asserting SVSRET. */
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+ if (hdmi->phy->has_svsret)
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+ dw_hdmi_phy_enable_svsret(hdmi, 1);
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+
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/* PHY reset. The reset signal is active high on Gen2 PHYs. */
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hdmi_writeb(hdmi, HDMI_MC_PHYRSTZ_PHYRSTZ, HDMI_MC_PHYRSTZ);
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hdmi_writeb(hdmi, 0, HDMI_MC_PHYRSTZ);
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@@ -1028,11 +1032,7 @@ static int hdmi_phy_configure(struct dw_hdmi *hdmi, int cscon)
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dw_hdmi_phy_gen2_txpwron(hdmi, 1);
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dw_hdmi_phy_gen2_pddq(hdmi, 0);
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- /* The DWC MHL and HDMI 2.0 PHYs need the SVSRET signal to be set. */
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- if (hdmi->phy->has_svsret)
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- dw_hdmi_phy_enable_svsret(hdmi, 1);
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-
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- /*Wait for PHY PLL lock */
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+ /* Wait for PHY PLL lock */
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msec = 5;
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do {
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val = hdmi_readb(hdmi, HDMI_PHY_STAT0) & HDMI_PHY_TX_PHY_LOCK;
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--
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1.9.1
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